PCI: cadence: Use bridge resources for outbound window setup
authorRob Herring <robh@kernel.org>
Wed, 22 Jul 2020 02:25:07 +0000 (20:25 -0600)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 23 Jul 2020 16:13:13 +0000 (17:13 +0100)
Instead of parsing 'ranges' from DT again, use the bridge window
resources.

Link: https://lore.kernel.org/r/20200722022514.1283916-13-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Tom Joseph <tjoseph@cadence.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/controller/cadence/pcie-cadence-host.c

index ec41c6d..d178887 100644 (file)
@@ -104,16 +104,14 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
 static int cdns_pcie_host_init_address_translation(struct cdns_pcie_rc *rc)
 {
        struct cdns_pcie *pcie = &rc->pcie;
+       struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rc);
        struct resource *mem_res = pcie->mem_res;
        struct resource *bus_range = rc->bus_range;
        struct resource *cfg_res = rc->cfg_res;
-       struct device *dev = pcie->dev;
-       struct device_node *np = dev->of_node;
-       struct of_pci_range_parser parser;
-       struct of_pci_range range;
+       struct resource_entry *entry;
        u32 addr0, addr1, desc1;
        u64 cpu_addr;
-       int r, err;
+       int r;
 
        /*
         * Reserve region 0 for PCI configure space accesses:
@@ -132,25 +130,22 @@ static int cdns_pcie_host_init_address_translation(struct cdns_pcie_rc *rc)
        cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(0), addr0);
        cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(0), addr1);
 
-       err = of_pci_range_parser_init(&parser, np);
-       if (err)
-               return err;
-
        r = 1;
-       for_each_of_pci_range(&parser, &range) {
-               bool is_io;
-
-               if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
-                       is_io = false;
-               else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
-                       is_io = true;
+       resource_list_for_each_entry(entry, &bridge->windows) {
+               struct resource *res = entry->res;
+               u64 pci_addr = res->start - entry->offset;
+
+               if (resource_type(res) == IORESOURCE_IO)
+                       cdns_pcie_set_outbound_region(pcie, 0, r, true,
+                                                     pci_pio_to_address(res->start),
+                                                     pci_addr,
+                                                     resource_size(res));
                else
-                       continue;
+                       cdns_pcie_set_outbound_region(pcie, 0, r, false,
+                                                     res->start,
+                                                     pci_addr,
+                                                     resource_size(res));
 
-               cdns_pcie_set_outbound_region(pcie, 0, r, is_io,
-                                             range.cpu_addr,
-                                             range.pci_addr,
-                                             range.size);
                r++;
        }