Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux...

ARM: dts: amlogic updates for v5.12
- add thermal zones with cooling configuration

* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson8b: add the thermal-zones with cooling configuration
  ARM: dts: meson8: add the thermal-zones with cooling configuration
  ARM: dts: meson: add the ADC thermal sensor to meson.dtsi
  ARM: dts: meson: move iio-hwmon for the SoC temperature to meson.dtsi

Link: https://lore.kernel.org/r/7ho8h12bto.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index 7649dd1..e0ca5f0 100644 (file)
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -11,6 +11,11 @@
        #size-cells = <1>;
        interrupt-parent = <&gic>;
 
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&saradc 8>;
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -293,6 +298,13 @@
                };
        };
 
+       thermal_sensor: thermal-sensor {
+               compatible = "generic-adc-thermal";
+               #thermal-sensor-cells = <0>;
+               io-channels = <&saradc 8>;
+               io-channel-names = "sensor-channel";
+       };
+
        xtal: xtal-clk {
                compatible = "fixed-clock";
                clock-frequency = <24000000>;

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 04688e8..420324e 100644 (file)
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/power/meson8-power.h>
 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
+#include <dt-bindings/thermal/thermal.h>
 #include "meson.dtsi"
 
 / {
@@ -28,6 +29,7 @@
                        resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu1: cpu@201 {
@@ -39,6 +41,7 @@
                        resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu2: cpu@202 {
@@ -50,6 +53,7 @@
                        resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu3: cpu@203 {
@@ -61,6 +65,7 @@
                        resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
        };
 
@@ -190,6 +195,54 @@
                };
        };
 
+       thermal-zones {
+               soc {
+                       polling-delay-passive = <250>; /* milliseconds */
+                       polling-delay = <1000>; /* milliseconds */
+                       thermal-sensors = <&thermal_sensor>;
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&soc_passive>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+
+                               map1 {
+                                       trip = <&soc_hot>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+
+                       trips {
+                               soc_passive: soc-passive {
+                                       temperature = <80000>; /* millicelsius */
+                                       hysteresis = <2000>; /* millicelsius */
+                                       type = "passive";
+                               };
+
+                               soc_hot: soc-hot {
+                                       temperature = <90000>; /* millicelsius */
+                                       hysteresis = <2000>; /* millicelsius */
+                                       type = "hot";
+                               };
+
+                               soc_critical: soc-critical {
+                                       temperature = <110000>; /* millicelsius */
+                                       hysteresis = <2000>; /* millicelsius */
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        mmcbus: bus@c8000000 {
                compatible = "simple-bus";
                reg = <0xc8000000 0x8000>;
@@ -254,6 +307,7 @@
                        clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
                        clock-names = "bus", "core";
                        operating-points-v2 = <&gpu_opp_table>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
        };
 }; /* end of / */

diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index ed06102..8e48ccc 100644 (file)
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -70,11 +70,6 @@
                timeout-ms = <20000>;
        };
 
-       iio-hwmon {
-               compatible = "iio-hwmon";
-               io-channels = <&saradc 8>;
-       };
-
        leds {
                compatible = "gpio-leds";
 

diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts
index 33037ef..f3937d5 100644 (file)
--- a/arch/arm/boot/dts/meson8b-mxq.dts
+++ b/arch/arm/boot/dts/meson8b-mxq.dts
@@ -27,11 +27,6 @@
                reg = <0x40000000 0x40000000>;
        };
 
-       iio-hwmon {
-               compatible = "iio-hwmon";
-               io-channels = <&saradc 8>;
-       };
-
        vcck: regulator-vcck {
                compatible = "pwm-regulator";
 

diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 5963566..c440ef9 100644 (file)
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -85,11 +85,6 @@
                          1800000 1>;
        };
 
-       iio-hwmon {
-               compatible = "iio-hwmon";
-               io-channels = <&saradc 8>;
-       };
-
        rtc32k_xtal: rtc32k-xtal-clk {
                /* X3 in the schematics */
                compatible = "fixed-clock";

diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 2401cdf..dbf7963 100644 (file)
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -10,6 +10,7 @@
 #include <dt-bindings/power/meson8-power.h>
 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
+#include <dt-bindings/thermal/thermal.h>
 #include "meson.dtsi"
 
 / {
@@ -26,6 +27,7 @@
                        resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu1: cpu@201 {
@@ -37,6 +39,7 @@
                        resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu2: cpu@202 {
@@ -48,6 +51,7 @@
                        resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu3: cpu@203 {
@@ -59,6 +63,7 @@
                        resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>;
                        operating-points-v2 = <&cpu_opp_table>;
                        clocks = <&clkc CLKID_CPUCLK>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
        };
 
@@ -167,6 +172,54 @@
                };
        };
 
+       thermal-zones {
+               soc {
+                       polling-delay-passive = <250>; /* milliseconds */
+                       polling-delay = <1000>; /* milliseconds */
+                       thermal-sensors = <&thermal_sensor>;
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&soc_passive>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+
+                               map1 {
+                                       trip = <&soc_hot>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+
+                       trips {
+                               soc_passive: soc-passive {
+                                       temperature = <80000>; /* millicelsius */
+                                       hysteresis = <2000>; /* millicelsius */
+                                       type = "passive";
+                               };
+
+                               soc_hot: soc-hot {
+                                       temperature = <90000>; /* millicelsius */
+                                       hysteresis = <2000>; /* millicelsius */
+                                       type = "hot";
+                               };
+
+                               soc_critical: soc-critical {
+                                       temperature = <110000>; /* millicelsius */
+                                       hysteresis = <2000>; /* millicelsius */
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        mmcbus: bus@c8000000 {
                compatible = "simple-bus";
                reg = <0xc8000000 0x8000>;
@@ -221,6 +274,7 @@
                        clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
                        clock-names = "bus", "core";
                        operating-points-v2 = <&gpu_opp_table>;
+                       #cooling-cells = <2>; /* min followed by max */
                };
        };
 }; /* end of / */

diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
index 8f4eb1e..fa6d55f 100644 (file)
--- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
@@ -45,11 +45,6 @@
                };
        };
 
-       iio-hwmon {
-               compatible = "iio-hwmon";
-               io-channels = <&saradc 8>;
-       };
-
        vcc_3v3: regulator-vcc3v3 {
                compatible = "regulator-fixed";
                regulator-name = "VCC3V3";