This adds the support for 2 others MIPS based VCore III SoCs: Luton
and Jaguar2.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
microchip Sparx5 armv8 SoC's.
Required Properties:
microchip Sparx5 armv8 SoC's.
Required Properties:
- - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
+
+ - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
+ "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"