RDMA/hns: Remove unsupport cmdq mode

CMDQ support un-interrupt mode only, and firmware ignores this mode flag,
so remove it.

Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Link: https://lore.kernel.org/r/1629539607-33217-2-git-send-email-liangwenpeng@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 594d4ce..a1fb903 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1248,8 +1248,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
 {
        memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
        desc->opcode = cpu_to_le16(opcode);
-       desc->flag =
-               cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+       desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
        if (is_read)
                desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
        else
@@ -1288,16 +1287,11 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
        /* Write to hardware */
        roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, csq->head);
 
-       /* If the command is sync, wait for the firmware to write back,
-        * if multi descriptors to be sent, use the first one to check
-        */
-       if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
-               do {
-                       if (hns_roce_cmq_csq_done(hr_dev))
-                               break;
-                       udelay(1);
-               } while (++timeout < priv->cmq.tx_timeout);
-       }
+       do {
+               if (hns_roce_cmq_csq_done(hr_dev))
+                       break;
+               udelay(1);
+       } while (++timeout < priv->cmq.tx_timeout);
 
        if (hns_roce_cmq_csq_done(hr_dev)) {
                for (ret = 0, i = 0; i < num; i++) {
@@ -1761,8 +1755,7 @@ static int __hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev,
        if (ret)
                return ret;
 
-       desc.flag =
-               cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+       desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
        desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
        roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
        roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index b8a09d4..54c1223 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -129,19 +129,13 @@
 
 #define HNS_ROCE_V2_TABLE_CHUNK_SIZE           (1 << 18)
 
-#define HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT       0
-#define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT      1
-#define HNS_ROCE_CMD_FLAG_NEXT_SHIFT           2
-#define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT       3
-#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT                4
-#define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT       5
-
-#define HNS_ROCE_CMD_FLAG_IN           BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
-#define HNS_ROCE_CMD_FLAG_OUT          BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
-#define HNS_ROCE_CMD_FLAG_NEXT         BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
-#define HNS_ROCE_CMD_FLAG_WR           BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
-#define HNS_ROCE_CMD_FLAG_NO_INTR      BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
-#define HNS_ROCE_CMD_FLAG_ERR_INTR     BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
+enum {
+       HNS_ROCE_CMD_FLAG_IN = BIT(0),
+       HNS_ROCE_CMD_FLAG_OUT = BIT(1),
+       HNS_ROCE_CMD_FLAG_NEXT = BIT(2),
+       HNS_ROCE_CMD_FLAG_WR = BIT(3),
+       HNS_ROCE_CMD_FLAG_ERR_INTR = BIT(5),
+};
 
 #define HNS_ROCE_CMQ_DESC_NUM_S                3