Merge tag 'defconfig-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / nvidia / tegra194.dtsi

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index b7d5328..5ba7a45 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -948,6 +948,10 @@
                                 <&bpmp TEGRA194_CLK_XUSB_SS>,
                                 <&bpmp TEGRA194_CLK_XUSB_FS>;
                        clock-names = "dev", "ss", "ss_src", "fs_src";
+                       interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVR &emc>,
+                                       <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVW &emc>;
+                       interconnect-names = "dma-mem", "write";
+                       iommus = <&smmu TEGRA194_SID_XUSB_DEV>;
                        power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>,
                                        <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
                        power-domain-names = "dev", "ss";
@@ -977,6 +981,10 @@
                                      "xusb_ss", "xusb_ss_src", "xusb_hs_src",
                                      "xusb_fs_src", "pll_u_480m", "clk_m",
                                      "pll_e";
+                       interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
+                                       <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
+                       interconnect-names = "dma-mem", "write";
+                       iommus = <&smmu TEGRA194_SID_XUSB_HOST>;
 
                        power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
                                        <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
@@ -1832,7 +1840,11 @@
 
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>;
-               interconnect-names = "read", "write";
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE1>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE1 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie@14120000 {
@@ -1882,7 +1894,11 @@
 
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE2AR &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE2AW &emc>;
-               interconnect-names = "read", "write";
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE2>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE2 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie@14140000 {
@@ -1932,7 +1948,11 @@
 
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE3R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE3W &emc>;
-               interconnect-names = "read", "write";
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE3>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE3 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie@14160000 {
@@ -1982,7 +2002,11 @@
 
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
-               interconnect-names = "read", "write";
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE4>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE4 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie@14180000 {
@@ -2032,7 +2056,11 @@
 
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
-               interconnect-names = "read", "write";
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE0>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE0 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie@141a0000 {
@@ -2086,7 +2114,11 @@
 
                interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
                                <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;
-               interconnect-names = "read", "write";
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE5>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE5 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie_ep@14160000 {
@@ -2119,6 +2151,14 @@
                nvidia,aspm-cmrt-us = <60>;
                nvidia,aspm-pwr-on-t-us = <20>;
                nvidia,aspm-l0s-entrance-latency-us = <3>;
+
+               interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
+                               <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE4>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE4 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie_ep@14180000 {
@@ -2151,6 +2191,14 @@
                nvidia,aspm-cmrt-us = <60>;
                nvidia,aspm-pwr-on-t-us = <20>;
                nvidia,aspm-l0s-entrance-latency-us = <3>;
+
+               interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
+                               <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE0>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE0 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        pcie_ep@141a0000 {
@@ -2186,6 +2234,14 @@
                nvidia,aspm-cmrt-us = <60>;
                nvidia,aspm-pwr-on-t-us = <20>;
                nvidia,aspm-l0s-entrance-latency-us = <3>;
+
+               interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
+                               <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_PCIE5>;
+               iommu-map = <0x0 &smmu TEGRA194_SID_PCIE5 0x1000>;
+               iommu-map-mask = <0x0>;
+               dma-coherent;
        };
 
        sram@40000000 {
@@ -2469,6 +2525,11 @@
                 * for 8x and 11.025x sample rate streams.
                 */
                assigned-clock-rates = <258000000>;
+
+               interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>,
+                               <&mc TEGRA194_MEMORY_CLIENT_APEDMAW &emc>;
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA194_SID_APE>;
        };
 
        tcu: tcu {