tools/power/x86/turbostat/turbostat.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * turbostat -- show CPU frequency and C-state residency
   4  * on modern Intel and AMD processors.
   5  *
   6  * Copyright (c) 2013 Intel Corporation.
   7  * Len Brown <len.brown@intel.com>
   8  */
   9
  10 #define _GNU_SOURCE
  11 #include MSRHEADER
  12 #include INTEL_FAMILY_HEADER
  13 #include <stdarg.h>
  14 #include <stdio.h>
  15 #include <err.h>
  16 #include <unistd.h>
  17 #include <sys/types.h>
  18 #include <sys/wait.h>
  19 #include <sys/stat.h>
  20 #include <sys/select.h>
  21 #include <sys/resource.h>
  22 #include <fcntl.h>
  23 #include <signal.h>
  24 #include <sys/time.h>
  25 #include <stdlib.h>
  26 #include <getopt.h>
  27 #include <dirent.h>
  28 #include <string.h>
  29 #include <ctype.h>
  30 #include <sched.h>
  31 #include <time.h>
  32 #include <cpuid.h>
  33 #include <sys/capability.h>
  34 #include <errno.h>
  35 #include <math.h>
  36 #include <linux/perf_event.h>
  37 #include <asm/unistd.h>
  38
  39 char *proc_stat = "/proc/stat";
  40 FILE *outf;
  41 int *fd_percpu;
  42 int *fd_instr_count_percpu;
  43 struct timeval interval_tv = {5, 0};
  44 struct timespec interval_ts = {5, 0};
  45 unsigned int num_iterations;
  46 unsigned int debug;
  47 unsigned int quiet;
  48 unsigned int shown;
  49 unsigned int sums_need_wide_columns;
  50 unsigned int rapl_joules;
  51 unsigned int summary_only;
  52 unsigned int list_header_only;
  53 unsigned int dump_only;
  54 unsigned int do_snb_cstates;
  55 unsigned int do_knl_cstates;
  56 unsigned int do_slm_cstates;
  57 unsigned int use_c1_residency_msr;
  58 unsigned int has_aperf;
  59 unsigned int has_epb;
  60 unsigned int do_irtl_snb;
  61 unsigned int do_irtl_hsw;
  62 unsigned int units = 1000000;   /* MHz etc */
  63 unsigned int genuine_intel;
  64 unsigned int authentic_amd;
  65 unsigned int hygon_genuine;
  66 unsigned int max_level, max_extended_level;
  67 unsigned int has_invariant_tsc;
  68 unsigned int do_nhm_platform_info;
  69 unsigned int no_MSR_MISC_PWR_MGMT;
  70 unsigned int aperf_mperf_multiplier = 1;
  71 double bclk;
  72 double base_hz;
  73 unsigned int has_base_hz;
  74 double tsc_tweak = 1.0;
  75 unsigned int show_pkg_only;
  76 unsigned int show_core_only;
  77 char *output_buffer, *outp;
  78 unsigned int do_rapl;
  79 unsigned int do_dts;
  80 unsigned int do_ptm;
  81 unsigned int do_ipc;
  82 unsigned long long  gfx_cur_rc6_ms;
  83 unsigned long long cpuidle_cur_cpu_lpi_us;
  84 unsigned long long cpuidle_cur_sys_lpi_us;
  85 unsigned int gfx_cur_mhz;
  86 unsigned int gfx_act_mhz;
  87 unsigned int tcc_activation_temp;
  88 unsigned int tcc_activation_temp_override;
  89 double rapl_power_units, rapl_time_units;
  90 double rapl_dram_energy_units, rapl_energy_units;
  91 double rapl_joule_counter_range;
  92 unsigned int do_core_perf_limit_reasons;
  93 unsigned int has_automatic_cstate_conversion;
  94 unsigned int dis_cstate_prewake;
  95 unsigned int do_gfx_perf_limit_reasons;
  96 unsigned int do_ring_perf_limit_reasons;
  97 unsigned int crystal_hz;
  98 unsigned long long tsc_hz;
  99 int base_cpu;
 100 double discover_bclk(unsigned int family, unsigned int model);
 101 unsigned int has_hwp;   /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
 102                         /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
 103 unsigned int has_hwp_notify;            /* IA32_HWP_INTERRUPT */
 104 unsigned int has_hwp_activity_window;   /* IA32_HWP_REQUEST[bits 41:32] */
 105 unsigned int has_hwp_epp;               /* IA32_HWP_REQUEST[bits 31:24] */
 106 unsigned int has_hwp_pkg;               /* IA32_HWP_REQUEST_PKG */
 107 unsigned int has_misc_feature_control;
 108 unsigned int first_counter_read = 1;
 109 int ignore_stdin;
 110
 111 #define RAPL_PKG                (1 << 0)
 112                                         /* 0x610 MSR_PKG_POWER_LIMIT */
 113                                         /* 0x611 MSR_PKG_ENERGY_STATUS */
 114 #define RAPL_PKG_PERF_STATUS    (1 << 1)
 115                                         /* 0x613 MSR_PKG_PERF_STATUS */
 116 #define RAPL_PKG_POWER_INFO     (1 << 2)
 117                                         /* 0x614 MSR_PKG_POWER_INFO */
 118
 119 #define RAPL_DRAM               (1 << 3)
 120                                         /* 0x618 MSR_DRAM_POWER_LIMIT */
 121                                         /* 0x619 MSR_DRAM_ENERGY_STATUS */
 122 #define RAPL_DRAM_PERF_STATUS   (1 << 4)
 123                                         /* 0x61b MSR_DRAM_PERF_STATUS */
 124 #define RAPL_DRAM_POWER_INFO    (1 << 5)
 125                                         /* 0x61c MSR_DRAM_POWER_INFO */
 126
 127 #define RAPL_CORES_POWER_LIMIT  (1 << 6)
 128                                         /* 0x638 MSR_PP0_POWER_LIMIT */
 129 #define RAPL_CORE_POLICY        (1 << 7)
 130                                         /* 0x63a MSR_PP0_POLICY */
 131
 132 #define RAPL_GFX                (1 << 8)
 133                                         /* 0x640 MSR_PP1_POWER_LIMIT */
 134                                         /* 0x641 MSR_PP1_ENERGY_STATUS */
 135                                         /* 0x642 MSR_PP1_POLICY */
 136
 137 #define RAPL_CORES_ENERGY_STATUS        (1 << 9)
 138                                         /* 0x639 MSR_PP0_ENERGY_STATUS */
 139 #define RAPL_PER_CORE_ENERGY    (1 << 10)
 140                                         /* Indicates cores energy collection is per-core,
 141                                          * not per-package. */
 142 #define RAPL_AMD_F17H           (1 << 11)
 143                                         /* 0xc0010299 MSR_RAPL_PWR_UNIT */
 144                                         /* 0xc001029a MSR_CORE_ENERGY_STAT */
 145                                         /* 0xc001029b MSR_PKG_ENERGY_STAT */
 146 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
 147 #define TJMAX_DEFAULT   100
 148
 149 /* MSRs that are not yet in the kernel-provided header. */
 150 #define MSR_RAPL_PWR_UNIT       0xc0010299
 151 #define MSR_CORE_ENERGY_STAT    0xc001029a
 152 #define MSR_PKG_ENERGY_STAT     0xc001029b
 153
 154 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 155
 156 /*
 157  * buffer size used by sscanf() for added column names
 158  * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
 159  */
 160 #define NAME_BYTES 20
 161 #define PATH_BYTES 128
 162
 163 int backwards_count;
 164 char *progname;
 165
 166 #define CPU_SUBSET_MAXCPUS      1024    /* need to use before probe... */
 167 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
 168 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
 169 #define MAX_ADDED_COUNTERS 8
 170 #define MAX_ADDED_THREAD_COUNTERS 24
 171 #define BITMASK_SIZE 32
 172
 173 struct thread_data {
 174         struct timeval tv_begin;
 175         struct timeval tv_end;
 176         struct timeval tv_delta;
 177         unsigned long long tsc;
 178         unsigned long long aperf;
 179         unsigned long long mperf;
 180         unsigned long long c1;
 181         unsigned long long instr_count;
 182         unsigned long long  irq_count;
 183         unsigned int smi_count;
 184         unsigned int cpu_id;
 185         unsigned int apic_id;
 186         unsigned int x2apic_id;
 187         unsigned int flags;
 188 #define CPU_IS_FIRST_THREAD_IN_CORE     0x2
 189 #define CPU_IS_FIRST_CORE_IN_PACKAGE    0x4
 190         unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
 191 } *thread_even, *thread_odd;
 192
 193 struct core_data {
 194         unsigned long long c3;
 195         unsigned long long c6;
 196         unsigned long long c7;
 197         unsigned long long mc6_us;      /* duplicate as per-core for now, even though per module */
 198         unsigned int core_temp_c;
 199         unsigned int core_energy;       /* MSR_CORE_ENERGY_STAT */
 200         unsigned int core_id;
 201         unsigned long long counter[MAX_ADDED_COUNTERS];
 202 } *core_even, *core_odd;
 203
 204 struct pkg_data {
 205         unsigned long long pc2;
 206         unsigned long long pc3;
 207         unsigned long long pc6;
 208         unsigned long long pc7;
 209         unsigned long long pc8;
 210         unsigned long long pc9;
 211         unsigned long long pc10;
 212         unsigned long long cpu_lpi;
 213         unsigned long long sys_lpi;
 214         unsigned long long pkg_wtd_core_c0;
 215         unsigned long long pkg_any_core_c0;
 216         unsigned long long pkg_any_gfxe_c0;
 217         unsigned long long pkg_both_core_gfxe_c0;
 218         long long gfx_rc6_ms;
 219         unsigned int gfx_mhz;
 220         unsigned int gfx_act_mhz;
 221         unsigned int package_id;
 222         unsigned long long energy_pkg;  /* MSR_PKG_ENERGY_STATUS */
 223         unsigned long long energy_dram; /* MSR_DRAM_ENERGY_STATUS */
 224         unsigned long long energy_cores;        /* MSR_PP0_ENERGY_STATUS */
 225         unsigned long long energy_gfx;  /* MSR_PP1_ENERGY_STATUS */
 226         unsigned long long rapl_pkg_perf_status;        /* MSR_PKG_PERF_STATUS */
 227         unsigned long long rapl_dram_perf_status;       /* MSR_DRAM_PERF_STATUS */
 228         unsigned int pkg_temp_c;
 229         unsigned long long counter[MAX_ADDED_COUNTERS];
 230 } *package_even, *package_odd;
 231
 232 #define ODD_COUNTERS thread_odd, core_odd, package_odd
 233 #define EVEN_COUNTERS thread_even, core_even, package_even
 234
 235 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no)          \
 236         ((thread_base) +                                                      \
 237          ((pkg_no) *                                                          \
 238           topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
 239          ((node_no) * topo.cores_per_node * topo.threads_per_core) +          \
 240          ((core_no) * topo.threads_per_core) +                                \
 241          (thread_no))
 242
 243 #define GET_CORE(core_base, core_no, node_no, pkg_no)                   \
 244         ((core_base) +                                                  \
 245          ((pkg_no) *  topo.nodes_per_pkg * topo.cores_per_node) +       \
 246          ((node_no) * topo.cores_per_node) +                            \
 247          (core_no))
 248
 249
 250 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
 251
 252 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
 253 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
 254 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
 255
 256 struct msr_counter {
 257         unsigned int msr_num;
 258         char name[NAME_BYTES];
 259         char path[PATH_BYTES];
 260         unsigned int width;
 261         enum counter_type type;
 262         enum counter_format format;
 263         struct msr_counter *next;
 264         unsigned int flags;
 265 #define FLAGS_HIDE      (1 << 0)
 266 #define FLAGS_SHOW      (1 << 1)
 267 #define SYSFS_PERCPU    (1 << 1)
 268 };
 269
 270 /*
 271  * The accumulated sum of MSR is defined as a monotonic
 272  * increasing MSR, it will be accumulated periodically,
 273  * despite its register's bit width.
 274  */
 275 enum {
 276         IDX_PKG_ENERGY,
 277         IDX_DRAM_ENERGY,
 278         IDX_PP0_ENERGY,
 279         IDX_PP1_ENERGY,
 280         IDX_PKG_PERF,
 281         IDX_DRAM_PERF,
 282         IDX_COUNT,
 283 };
 284
 285 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr);
 286
 287 struct msr_sum_array {
 288         /* get_msr_sum() = sum + (get_msr() - last) */
 289         struct {
 290                 /*The accumulated MSR value is updated by the timer*/
 291                 unsigned long long sum;
 292                 /*The MSR footprint recorded in last timer*/
 293                 unsigned long long last;
 294         } entries[IDX_COUNT];
 295 };
 296
 297 /* The percpu MSR sum array.*/
 298 struct msr_sum_array *per_cpu_msr_sum;
 299
 300 off_t idx_to_offset(int idx)
 301 {
 302         off_t offset;
 303
 304         switch (idx) {
 305         case IDX_PKG_ENERGY:
 306                 if (do_rapl & RAPL_AMD_F17H)
 307                         offset = MSR_PKG_ENERGY_STAT;
 308                 else
 309                         offset = MSR_PKG_ENERGY_STATUS;
 310                 break;
 311         case IDX_DRAM_ENERGY:
 312                 offset = MSR_DRAM_ENERGY_STATUS;
 313                 break;
 314         case IDX_PP0_ENERGY:
 315                 offset = MSR_PP0_ENERGY_STATUS;
 316                 break;
 317         case IDX_PP1_ENERGY:
 318                 offset = MSR_PP1_ENERGY_STATUS;
 319                 break;
 320         case IDX_PKG_PERF:
 321                 offset = MSR_PKG_PERF_STATUS;
 322                 break;
 323         case IDX_DRAM_PERF:
 324                 offset = MSR_DRAM_PERF_STATUS;
 325                 break;
 326         default:
 327                 offset = -1;
 328         }
 329         return offset;
 330 }
 331
 332 int offset_to_idx(off_t offset)
 333 {
 334         int idx;
 335
 336         switch (offset) {
 337         case MSR_PKG_ENERGY_STATUS:
 338         case MSR_PKG_ENERGY_STAT:
 339                 idx = IDX_PKG_ENERGY;
 340                 break;
 341         case MSR_DRAM_ENERGY_STATUS:
 342                 idx = IDX_DRAM_ENERGY;
 343                 break;
 344         case MSR_PP0_ENERGY_STATUS:
 345                 idx = IDX_PP0_ENERGY;
 346                 break;
 347         case MSR_PP1_ENERGY_STATUS:
 348                 idx = IDX_PP1_ENERGY;
 349                 break;
 350         case MSR_PKG_PERF_STATUS:
 351                 idx = IDX_PKG_PERF;
 352                 break;
 353         case MSR_DRAM_PERF_STATUS:
 354                 idx = IDX_DRAM_PERF;
 355                 break;
 356         default:
 357                 idx = -1;
 358         }
 359         return idx;
 360 }
 361
 362 int idx_valid(int idx)
 363 {
 364         switch (idx) {
 365         case IDX_PKG_ENERGY:
 366                 return do_rapl & (RAPL_PKG | RAPL_AMD_F17H);
 367         case IDX_DRAM_ENERGY:
 368                 return do_rapl & RAPL_DRAM;
 369         case IDX_PP0_ENERGY:
 370                 return do_rapl & RAPL_CORES_ENERGY_STATUS;
 371         case IDX_PP1_ENERGY:
 372                 return do_rapl & RAPL_GFX;
 373         case IDX_PKG_PERF:
 374                 return do_rapl & RAPL_PKG_PERF_STATUS;
 375         case IDX_DRAM_PERF:
 376                 return do_rapl & RAPL_DRAM_PERF_STATUS;
 377         default:
 378                 return 0;
 379         }
 380 }
 381 struct sys_counters {
 382         unsigned int added_thread_counters;
 383         unsigned int added_core_counters;
 384         unsigned int added_package_counters;
 385         struct msr_counter *tp;
 386         struct msr_counter *cp;
 387         struct msr_counter *pp;
 388 } sys;
 389
 390 struct system_summary {
 391         struct thread_data threads;
 392         struct core_data cores;
 393         struct pkg_data packages;
 394 } average;
 395
 396 struct cpu_topology {
 397         int physical_package_id;
 398         int die_id;
 399         int logical_cpu_id;
 400         int physical_node_id;
 401         int logical_node_id;    /* 0-based count within the package */
 402         int physical_core_id;
 403         int thread_id;
 404         cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
 405 } *cpus;
 406
 407 struct topo_params {
 408         int num_packages;
 409         int num_die;
 410         int num_cpus;
 411         int num_cores;
 412         int max_cpu_num;
 413         int max_node_num;
 414         int nodes_per_pkg;
 415         int cores_per_node;
 416         int threads_per_core;
 417 } topo;
 418
 419 struct timeval tv_even, tv_odd, tv_delta;
 420
 421 int *irq_column_2_cpu;  /* /proc/interrupts column numbers */
 422 int *irqs_per_cpu;              /* indexed by cpu_num */
 423
 424 void setup_all_buffers(void);
 425
 426 char *sys_lpi_file;
 427 char *sys_lpi_file_sysfs = "/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us";
 428 char *sys_lpi_file_debugfs = "/sys/kernel/debug/pmc_core/slp_s0_residency_usec";
 429
 430 int cpu_is_not_present(int cpu)
 431 {
 432         return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
 433 }
 434 /*
 435  * run func(thread, core, package) in topology order
 436  * skip non-present cpus
 437  */
 438
 439 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
 440         struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
 441 {
 442         int retval, pkg_no, core_no, thread_no, node_no;
 443
 444         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
 445                 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
 446                         for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
 447                                 for (thread_no = 0; thread_no <
 448                                         topo.threads_per_core; ++thread_no) {
 449                                         struct thread_data *t;
 450                                         struct core_data *c;
 451                                         struct pkg_data *p;
 452
 453                                         t = GET_THREAD(thread_base, thread_no,
 454                                                        core_no, node_no,
 455                                                        pkg_no);
 456
 457                                         if (cpu_is_not_present(t->cpu_id))
 458                                                 continue;
 459
 460                                         c = GET_CORE(core_base, core_no,
 461                                                      node_no, pkg_no);
 462                                         p = GET_PKG(pkg_base, pkg_no);
 463
 464                                         retval = func(t, c, p);
 465                                         if (retval)
 466                                                 return retval;
 467                                 }
 468                         }
 469                 }
 470         }
 471         return 0;
 472 }
 473
 474 int cpu_migrate(int cpu)
 475 {
 476         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
 477         CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
 478         if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
 479                 return -1;
 480         else
 481                 return 0;
 482 }
 483 int get_msr_fd(int cpu)
 484 {
 485         char pathname[32];
 486         int fd;
 487
 488         fd = fd_percpu[cpu];
 489
 490         if (fd)
 491                 return fd;
 492
 493         sprintf(pathname, "/dev/cpu/%d/msr", cpu);
 494         fd = open(pathname, O_RDONLY);
 495         if (fd < 0)
 496                 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
 497
 498         fd_percpu[cpu] = fd;
 499
 500         return fd;
 501 }
 502
 503 static long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu, int group_fd, unsigned long flags)
 504 {
 505         return syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
 506 }
 507
 508 static int perf_instr_count_open(int cpu_num)
 509 {
 510         struct perf_event_attr pea;
 511         int fd;
 512
 513         memset(&pea, 0, sizeof(struct perf_event_attr));
 514         pea.type = PERF_TYPE_HARDWARE;
 515         pea.size = sizeof(struct perf_event_attr);
 516         pea.config = PERF_COUNT_HW_INSTRUCTIONS;
 517
 518         /* counter for cpu_num, including user + kernel and all processes */
 519         fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
 520         if (fd == -1)
 521                 err(-1, "cpu%d: perf instruction counter\n", cpu_num);
 522
 523         return fd;
 524 }
 525
 526 int get_instr_count_fd(int cpu)
 527 {
 528         if (fd_instr_count_percpu[cpu])
 529                 return fd_instr_count_percpu[cpu];
 530
 531         fd_instr_count_percpu[cpu] = perf_instr_count_open(cpu);
 532
 533         return fd_instr_count_percpu[cpu];
 534 }
 535
 536 int get_msr(int cpu, off_t offset, unsigned long long *msr)
 537 {
 538         ssize_t retval;
 539
 540         retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
 541
 542         if (retval != sizeof *msr)
 543                 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
 544
 545         return 0;
 546 }
 547
 548 /*
 549  * This list matches the column headers, except
 550  * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
 551  * 2. Core and CPU are moved to the end, we can't have strings that contain them
 552  *    matching on them for --show and --hide.
 553  */
 554 struct msr_counter bic[] = {
 555         { 0x0, "usec" },
 556         { 0x0, "Time_Of_Day_Seconds" },
 557         { 0x0, "Package" },
 558         { 0x0, "Node" },
 559         { 0x0, "Avg_MHz" },
 560         { 0x0, "Busy%" },
 561         { 0x0, "Bzy_MHz" },
 562         { 0x0, "TSC_MHz" },
 563         { 0x0, "IRQ" },
 564         { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
 565         { 0x0, "sysfs" },
 566         { 0x0, "CPU%c1" },
 567         { 0x0, "CPU%c3" },
 568         { 0x0, "CPU%c6" },
 569         { 0x0, "CPU%c7" },
 570         { 0x0, "ThreadC" },
 571         { 0x0, "CoreTmp" },
 572         { 0x0, "CoreCnt" },
 573         { 0x0, "PkgTmp" },
 574         { 0x0, "GFX%rc6" },
 575         { 0x0, "GFXMHz" },
 576         { 0x0, "Pkg%pc2" },
 577         { 0x0, "Pkg%pc3" },
 578         { 0x0, "Pkg%pc6" },
 579         { 0x0, "Pkg%pc7" },
 580         { 0x0, "Pkg%pc8" },
 581         { 0x0, "Pkg%pc9" },
 582         { 0x0, "Pk%pc10" },
 583         { 0x0, "CPU%LPI" },
 584         { 0x0, "SYS%LPI" },
 585         { 0x0, "PkgWatt" },
 586         { 0x0, "CorWatt" },
 587         { 0x0, "GFXWatt" },
 588         { 0x0, "PkgCnt" },
 589         { 0x0, "RAMWatt" },
 590         { 0x0, "PKG_%" },
 591         { 0x0, "RAM_%" },
 592         { 0x0, "Pkg_J" },
 593         { 0x0, "Cor_J" },
 594         { 0x0, "GFX_J" },
 595         { 0x0, "RAM_J" },
 596         { 0x0, "Mod%c6" },
 597         { 0x0, "Totl%C0" },
 598         { 0x0, "Any%C0" },
 599         { 0x0, "GFX%C0" },
 600         { 0x0, "CPUGFX%" },
 601         { 0x0, "Core" },
 602         { 0x0, "CPU" },
 603         { 0x0, "APIC" },
 604         { 0x0, "X2APIC" },
 605         { 0x0, "Die" },
 606         { 0x0, "GFXAMHz" },
 607         { 0x0, "IPC" },
 608 };
 609
 610 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
 611 #define BIC_USEC        (1ULL << 0)
 612 #define BIC_TOD         (1ULL << 1)
 613 #define BIC_Package     (1ULL << 2)
 614 #define BIC_Node        (1ULL << 3)
 615 #define BIC_Avg_MHz     (1ULL << 4)
 616 #define BIC_Busy        (1ULL << 5)
 617 #define BIC_Bzy_MHz     (1ULL << 6)
 618 #define BIC_TSC_MHz     (1ULL << 7)
 619 #define BIC_IRQ         (1ULL << 8)
 620 #define BIC_SMI         (1ULL << 9)
 621 #define BIC_sysfs       (1ULL << 10)
 622 #define BIC_CPU_c1      (1ULL << 11)
 623 #define BIC_CPU_c3      (1ULL << 12)
 624 #define BIC_CPU_c6      (1ULL << 13)
 625 #define BIC_CPU_c7      (1ULL << 14)
 626 #define BIC_ThreadC     (1ULL << 15)
 627 #define BIC_CoreTmp     (1ULL << 16)
 628 #define BIC_CoreCnt     (1ULL << 17)
 629 #define BIC_PkgTmp      (1ULL << 18)
 630 #define BIC_GFX_rc6     (1ULL << 19)
 631 #define BIC_GFXMHz      (1ULL << 20)
 632 #define BIC_Pkgpc2      (1ULL << 21)
 633 #define BIC_Pkgpc3      (1ULL << 22)
 634 #define BIC_Pkgpc6      (1ULL << 23)
 635 #define BIC_Pkgpc7      (1ULL << 24)
 636 #define BIC_Pkgpc8      (1ULL << 25)
 637 #define BIC_Pkgpc9      (1ULL << 26)
 638 #define BIC_Pkgpc10     (1ULL << 27)
 639 #define BIC_CPU_LPI     (1ULL << 28)
 640 #define BIC_SYS_LPI     (1ULL << 29)
 641 #define BIC_PkgWatt     (1ULL << 30)
 642 #define BIC_CorWatt     (1ULL << 31)
 643 #define BIC_GFXWatt     (1ULL << 32)
 644 #define BIC_PkgCnt      (1ULL << 33)
 645 #define BIC_RAMWatt     (1ULL << 34)
 646 #define BIC_PKG__       (1ULL << 35)
 647 #define BIC_RAM__       (1ULL << 36)
 648 #define BIC_Pkg_J       (1ULL << 37)
 649 #define BIC_Cor_J       (1ULL << 38)
 650 #define BIC_GFX_J       (1ULL << 39)
 651 #define BIC_RAM_J       (1ULL << 40)
 652 #define BIC_Mod_c6      (1ULL << 41)
 653 #define BIC_Totl_c0     (1ULL << 42)
 654 #define BIC_Any_c0      (1ULL << 43)
 655 #define BIC_GFX_c0      (1ULL << 44)
 656 #define BIC_CPUGFX      (1ULL << 45)
 657 #define BIC_Core        (1ULL << 46)
 658 #define BIC_CPU         (1ULL << 47)
 659 #define BIC_APIC        (1ULL << 48)
 660 #define BIC_X2APIC      (1ULL << 49)
 661 #define BIC_Die         (1ULL << 50)
 662 #define BIC_GFXACTMHz   (1ULL << 51)
 663 #define BIC_IPC         (1ULL << 52)
 664
 665 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
 666
 667 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
 668 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
 669
 670 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
 671 #define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
 672 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
 673 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
 674 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
 675 #define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
 676
 677
 678 #define MAX_DEFERRED 16
 679 char *deferred_skip_names[MAX_DEFERRED];
 680 int deferred_skip_index;
 681
 682 /*
 683  * HIDE_LIST - hide this list of counters, show the rest [default]
 684  * SHOW_LIST - show this list of counters, hide the rest
 685  */
 686 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
 687
 688 void help(void)
 689 {
 690         fprintf(outf,
 691         "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
 692         "\n"
 693         "Turbostat forks the specified COMMAND and prints statistics\n"
 694         "when COMMAND completes.\n"
 695         "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
 696         "to print statistics, until interrupted.\n"
 697         "  -a, --add    add a counter\n"
 698         "                 eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
 699         "  -c, --cpu    cpu-set limit output to summary plus cpu-set:\n"
 700         "                 {core | package | j,k,l..m,n-p }\n"
 701         "  -d, --debug  displays usec, Time_Of_Day_Seconds and more debugging\n"
 702         "  -D, --Dump   displays the raw counter values\n"
 703         "  -e, --enable [all | column]\n"
 704         "               shows all or the specified disabled column\n"
 705         "  -H, --hide [column|column,column,...]\n"
 706         "               hide the specified column(s)\n"
 707         "  -i, --interval sec.subsec\n"
 708         "               Override default 5-second measurement interval\n"
 709         "  -J, --Joules displays energy in Joules instead of Watts\n"
 710         "  -l, --list   list column headers only\n"
 711         "  -n, --num_iterations num\n"
 712         "               number of the measurement iterations\n"
 713         "  -o, --out file\n"
 714         "               create or truncate \"file\" for all output\n"
 715         "  -q, --quiet  skip decoding system configuration header\n"
 716         "  -s, --show [column|column,column,...]\n"
 717         "               show only the specified column(s)\n"
 718         "  -S, --Summary\n"
 719         "               limits output to 1-line system summary per interval\n"
 720         "  -T, --TCC temperature\n"
 721         "               sets the Thermal Control Circuit temperature in\n"
 722         "                 degrees Celsius\n"
 723         "  -h, --help   print this help message\n"
 724         "  -v, --version        print version information\n"
 725         "\n"
 726         "For more help, run \"man turbostat\"\n");
 727 }
 728
 729 /*
 730  * bic_lookup
 731  * for all the strings in comma separate name_list,
 732  * set the approprate bit in return value.
 733  */
 734 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
 735 {
 736         int i;
 737         unsigned long long retval = 0;
 738
 739         while (name_list) {
 740                 char *comma;
 741
 742                 comma = strchr(name_list, ',');
 743
 744                 if (comma)
 745                         *comma = '\0';
 746
 747                 if (!strcmp(name_list, "all"))
 748                         return ~0;
 749
 750                 for (i = 0; i < MAX_BIC; ++i) {
 751                         if (!strcmp(name_list, bic[i].name)) {
 752                                 retval |= (1ULL << i);
 753                                 break;
 754                         }
 755                 }
 756                 if (i == MAX_BIC) {
 757                         if (mode == SHOW_LIST) {
 758                                 fprintf(stderr, "Invalid counter name: %s\n", name_list);
 759                                 exit(-1);
 760                         }
 761                         deferred_skip_names[deferred_skip_index++] = name_list;
 762                         if (debug)
 763                                 fprintf(stderr, "deferred \"%s\"\n", name_list);
 764                         if (deferred_skip_index >= MAX_DEFERRED) {
 765                                 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
 766                                         MAX_DEFERRED, name_list);
 767                                 help();
 768                                 exit(1);
 769                         }
 770                 }
 771
 772                 name_list = comma;
 773                 if (name_list)
 774                         name_list++;
 775
 776         }
 777         return retval;
 778 }
 779
 780
 781 void print_header(char *delim)
 782 {
 783         struct msr_counter *mp;
 784         int printed = 0;
 785
 786         if (DO_BIC(BIC_USEC))
 787                 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
 788         if (DO_BIC(BIC_TOD))
 789                 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
 790         if (DO_BIC(BIC_Package))
 791                 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
 792         if (DO_BIC(BIC_Die))
 793                 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
 794         if (DO_BIC(BIC_Node))
 795                 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
 796         if (DO_BIC(BIC_Core))
 797                 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
 798         if (DO_BIC(BIC_CPU))
 799                 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
 800         if (DO_BIC(BIC_APIC))
 801                 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
 802         if (DO_BIC(BIC_X2APIC))
 803                 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
 804         if (DO_BIC(BIC_Avg_MHz))
 805                 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
 806         if (DO_BIC(BIC_Busy))
 807                 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
 808         if (DO_BIC(BIC_Bzy_MHz))
 809                 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
 810         if (DO_BIC(BIC_TSC_MHz))
 811                 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
 812
 813         if (DO_BIC(BIC_IPC))
 814                 outp += sprintf(outp, "%sIPC", (printed++ ? delim : ""));
 815
 816         if (DO_BIC(BIC_IRQ)) {
 817                 if (sums_need_wide_columns)
 818                         outp += sprintf(outp, "%s     IRQ", (printed++ ? delim : ""));
 819                 else
 820                         outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
 821         }
 822
 823         if (DO_BIC(BIC_SMI))
 824                 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
 825
 826         for (mp = sys.tp; mp; mp = mp->next) {
 827
 828                 if (mp->format == FORMAT_RAW) {
 829                         if (mp->width == 64)
 830                                 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
 831                         else
 832                                 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
 833                 } else {
 834                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 835                                 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
 836                         else
 837                                 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
 838                 }
 839         }
 840
 841         if (DO_BIC(BIC_CPU_c1))
 842                 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
 843         if (DO_BIC(BIC_CPU_c3))
 844                 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
 845         if (DO_BIC(BIC_CPU_c6))
 846                 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
 847         if (DO_BIC(BIC_CPU_c7))
 848                 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
 849
 850         if (DO_BIC(BIC_Mod_c6))
 851                 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
 852
 853         if (DO_BIC(BIC_CoreTmp))
 854                 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
 855
 856         if (do_rapl && !rapl_joules) {
 857                 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
 858                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 859         } else if (do_rapl && rapl_joules) {
 860                 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
 861                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 862         }
 863
 864         for (mp = sys.cp; mp; mp = mp->next) {
 865                 if (mp->format == FORMAT_RAW) {
 866                         if (mp->width == 64)
 867                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 868                         else
 869                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 870                 } else {
 871                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 872                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 873                         else
 874                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 875                 }
 876         }
 877
 878         if (DO_BIC(BIC_PkgTmp))
 879                 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
 880
 881         if (DO_BIC(BIC_GFX_rc6))
 882                 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
 883
 884         if (DO_BIC(BIC_GFXMHz))
 885                 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
 886
 887         if (DO_BIC(BIC_GFXACTMHz))
 888                 outp += sprintf(outp, "%sGFXAMHz", (printed++ ? delim : ""));
 889
 890         if (DO_BIC(BIC_Totl_c0))
 891                 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
 892         if (DO_BIC(BIC_Any_c0))
 893                 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
 894         if (DO_BIC(BIC_GFX_c0))
 895                 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
 896         if (DO_BIC(BIC_CPUGFX))
 897                 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
 898
 899         if (DO_BIC(BIC_Pkgpc2))
 900                 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
 901         if (DO_BIC(BIC_Pkgpc3))
 902                 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
 903         if (DO_BIC(BIC_Pkgpc6))
 904                 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
 905         if (DO_BIC(BIC_Pkgpc7))
 906                 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
 907         if (DO_BIC(BIC_Pkgpc8))
 908                 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
 909         if (DO_BIC(BIC_Pkgpc9))
 910                 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
 911         if (DO_BIC(BIC_Pkgpc10))
 912                 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
 913         if (DO_BIC(BIC_CPU_LPI))
 914                 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
 915         if (DO_BIC(BIC_SYS_LPI))
 916                 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
 917
 918         if (do_rapl && !rapl_joules) {
 919                 if (DO_BIC(BIC_PkgWatt))
 920                         outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
 921                 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 922                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 923                 if (DO_BIC(BIC_GFXWatt))
 924                         outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
 925                 if (DO_BIC(BIC_RAMWatt))
 926                         outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
 927                 if (DO_BIC(BIC_PKG__))
 928                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 929                 if (DO_BIC(BIC_RAM__))
 930                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 931         } else if (do_rapl && rapl_joules) {
 932                 if (DO_BIC(BIC_Pkg_J))
 933                         outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
 934                 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 935                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 936                 if (DO_BIC(BIC_GFX_J))
 937                         outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
 938                 if (DO_BIC(BIC_RAM_J))
 939                         outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
 940                 if (DO_BIC(BIC_PKG__))
 941                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 942                 if (DO_BIC(BIC_RAM__))
 943                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 944         }
 945         for (mp = sys.pp; mp; mp = mp->next) {
 946                 if (mp->format == FORMAT_RAW) {
 947                         if (mp->width == 64)
 948                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 949                         else
 950                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 951                 } else {
 952                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 953                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 954                         else
 955                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 956                 }
 957         }
 958
 959         outp += sprintf(outp, "\n");
 960 }
 961
 962 int dump_counters(struct thread_data *t, struct core_data *c,
 963         struct pkg_data *p)
 964 {
 965         int i;
 966         struct msr_counter *mp;
 967
 968         outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
 969
 970         if (t) {
 971                 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
 972                         t->cpu_id, t->flags);
 973                 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
 974                 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
 975                 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
 976                 outp += sprintf(outp, "c1: %016llX\n", t->c1);
 977
 978                 if (DO_BIC(BIC_IPC))
 979                         outp += sprintf(outp, "IPC: %lld\n", t->instr_count);
 980
 981                 if (DO_BIC(BIC_IRQ))
 982                         outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
 983                 if (DO_BIC(BIC_SMI))
 984                         outp += sprintf(outp, "SMI: %d\n", t->smi_count);
 985
 986                 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
 987                         outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
 988                                 i, mp->msr_num, t->counter[i]);
 989                 }
 990         }
 991
 992         if (c) {
 993                 outp += sprintf(outp, "core: %d\n", c->core_id);
 994                 outp += sprintf(outp, "c3: %016llX\n", c->c3);
 995                 outp += sprintf(outp, "c6: %016llX\n", c->c6);
 996                 outp += sprintf(outp, "c7: %016llX\n", c->c7);
 997                 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
 998                 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
 999
1000                 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1001                         outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
1002                                 i, mp->msr_num, c->counter[i]);
1003                 }
1004                 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
1005         }
1006
1007         if (p) {
1008                 outp += sprintf(outp, "package: %d\n", p->package_id);
1009
1010                 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
1011                 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
1012                 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
1013                 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
1014
1015                 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
1016                 if (DO_BIC(BIC_Pkgpc3))
1017                         outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
1018                 if (DO_BIC(BIC_Pkgpc6))
1019                         outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
1020                 if (DO_BIC(BIC_Pkgpc7))
1021                         outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
1022                 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
1023                 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
1024                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
1025                 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
1026                 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
1027                 outp += sprintf(outp, "Joules PKG: %0llX\n", p->energy_pkg);
1028                 outp += sprintf(outp, "Joules COR: %0llX\n", p->energy_cores);
1029                 outp += sprintf(outp, "Joules GFX: %0llX\n", p->energy_gfx);
1030                 outp += sprintf(outp, "Joules RAM: %0llX\n", p->energy_dram);
1031                 outp += sprintf(outp, "Throttle PKG: %0llX\n",
1032                         p->rapl_pkg_perf_status);
1033                 outp += sprintf(outp, "Throttle RAM: %0llX\n",
1034                         p->rapl_dram_perf_status);
1035                 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
1036
1037                 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1038                         outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
1039                                 i, mp->msr_num, p->counter[i]);
1040                 }
1041         }
1042
1043         outp += sprintf(outp, "\n");
1044
1045         return 0;
1046 }
1047
1048 /*
1049  * column formatting convention & formats
1050  */
1051 int format_counters(struct thread_data *t, struct core_data *c,
1052         struct pkg_data *p)
1053 {
1054         double interval_float, tsc;
1055         char *fmt8;
1056         int i;
1057         struct msr_counter *mp;
1058         char *delim = "\t";
1059         int printed = 0;
1060
1061          /* if showing only 1st thread in core and this isn't one, bail out */
1062         if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1063                 return 0;
1064
1065          /* if showing only 1st thread in pkg and this isn't one, bail out */
1066         if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1067                 return 0;
1068
1069         /*if not summary line and --cpu is used */
1070         if ((t != &average.threads) &&
1071                 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
1072                 return 0;
1073
1074         if (DO_BIC(BIC_USEC)) {
1075                 /* on each row, print how many usec each timestamp took to gather */
1076                 struct timeval tv;
1077
1078                 timersub(&t->tv_end, &t->tv_begin, &tv);
1079                 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
1080         }
1081
1082         /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
1083         if (DO_BIC(BIC_TOD))
1084                 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
1085
1086         interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
1087
1088         tsc = t->tsc * tsc_tweak;
1089
1090         /* topo columns, print blanks on 1st (average) line */
1091         if (t == &average.threads) {
1092                 if (DO_BIC(BIC_Package))
1093                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1094                 if (DO_BIC(BIC_Die))
1095                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1096                 if (DO_BIC(BIC_Node))
1097                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1098                 if (DO_BIC(BIC_Core))
1099                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1100                 if (DO_BIC(BIC_CPU))
1101                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1102                 if (DO_BIC(BIC_APIC))
1103                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1104                 if (DO_BIC(BIC_X2APIC))
1105                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1106         } else {
1107                 if (DO_BIC(BIC_Package)) {
1108                         if (p)
1109                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
1110                         else
1111                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1112                 }
1113                 if (DO_BIC(BIC_Die)) {
1114                         if (c)
1115                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
1116                         else
1117                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1118                 }
1119                 if (DO_BIC(BIC_Node)) {
1120                         if (t)
1121                                 outp += sprintf(outp, "%s%d",
1122                                                 (printed++ ? delim : ""),
1123                                               cpus[t->cpu_id].physical_node_id);
1124                         else
1125                                 outp += sprintf(outp, "%s-",
1126                                                 (printed++ ? delim : ""));
1127                 }
1128                 if (DO_BIC(BIC_Core)) {
1129                         if (c)
1130                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
1131                         else
1132                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1133                 }
1134                 if (DO_BIC(BIC_CPU))
1135                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
1136                 if (DO_BIC(BIC_APIC))
1137                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
1138                 if (DO_BIC(BIC_X2APIC))
1139                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
1140         }
1141
1142         if (DO_BIC(BIC_Avg_MHz))
1143                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
1144                         1.0 / units * t->aperf / interval_float);
1145
1146         if (DO_BIC(BIC_Busy))
1147                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
1148
1149         if (DO_BIC(BIC_Bzy_MHz)) {
1150                 if (has_base_hz)
1151                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
1152                 else
1153                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
1154                                 tsc / units * t->aperf / t->mperf / interval_float);
1155         }
1156
1157         if (DO_BIC(BIC_TSC_MHz))
1158                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
1159
1160         if (DO_BIC(BIC_IPC))
1161                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 1.0 * t->instr_count / t->aperf);
1162
1163         /* IRQ */
1164         if (DO_BIC(BIC_IRQ)) {
1165                 if (sums_need_wide_columns)
1166                         outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
1167                 else
1168                         outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
1169         }
1170
1171         /* SMI */
1172         if (DO_BIC(BIC_SMI))
1173                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1174
1175         /* Added counters */
1176         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1177                 if (mp->format == FORMAT_RAW) {
1178                         if (mp->width == 32)
1179                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
1180                         else
1181                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
1182                 } else if (mp->format == FORMAT_DELTA) {
1183                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1184                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
1185                         else
1186                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
1187                 } else if (mp->format == FORMAT_PERCENT) {
1188                         if (mp->type == COUNTER_USEC)
1189                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
1190                         else
1191                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
1192                 }
1193         }
1194
1195         /* C1 */
1196         if (DO_BIC(BIC_CPU_c1))
1197                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
1198
1199
1200         /* print per-core data only for 1st thread in core */
1201         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1202                 goto done;
1203
1204         if (DO_BIC(BIC_CPU_c3))
1205                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
1206         if (DO_BIC(BIC_CPU_c6))
1207                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
1208         if (DO_BIC(BIC_CPU_c7))
1209                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
1210
1211         /* Mod%c6 */
1212         if (DO_BIC(BIC_Mod_c6))
1213                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
1214
1215         if (DO_BIC(BIC_CoreTmp))
1216                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
1217
1218         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1219                 if (mp->format == FORMAT_RAW) {
1220                         if (mp->width == 32)
1221                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
1222                         else
1223                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
1224                 } else if (mp->format == FORMAT_DELTA) {
1225                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1226                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
1227                         else
1228                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
1229                 } else if (mp->format == FORMAT_PERCENT) {
1230                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
1231                 }
1232         }
1233
1234         fmt8 = "%s%.2f";
1235
1236         if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1237                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1238         if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1239                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1240
1241         /* print per-package data only for 1st core in package */
1242         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1243                 goto done;
1244
1245         /* PkgTmp */
1246         if (DO_BIC(BIC_PkgTmp))
1247                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1248
1249         /* GFXrc6 */
1250         if (DO_BIC(BIC_GFX_rc6)) {
1251                 if (p->gfx_rc6_ms == -1) {      /* detect GFX counter reset */
1252                         outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1253                 } else {
1254                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1255                                 p->gfx_rc6_ms / 10.0 / interval_float);
1256                 }
1257         }
1258
1259         /* GFXMHz */
1260         if (DO_BIC(BIC_GFXMHz))
1261                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1262
1263         /* GFXACTMHz */
1264         if (DO_BIC(BIC_GFXACTMHz))
1265                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_act_mhz);
1266
1267         /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1268         if (DO_BIC(BIC_Totl_c0))
1269                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1270         if (DO_BIC(BIC_Any_c0))
1271                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1272         if (DO_BIC(BIC_GFX_c0))
1273                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1274         if (DO_BIC(BIC_CPUGFX))
1275                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1276
1277         if (DO_BIC(BIC_Pkgpc2))
1278                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1279         if (DO_BIC(BIC_Pkgpc3))
1280                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1281         if (DO_BIC(BIC_Pkgpc6))
1282                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1283         if (DO_BIC(BIC_Pkgpc7))
1284                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1285         if (DO_BIC(BIC_Pkgpc8))
1286                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1287         if (DO_BIC(BIC_Pkgpc9))
1288                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1289         if (DO_BIC(BIC_Pkgpc10))
1290                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1291
1292         if (DO_BIC(BIC_CPU_LPI))
1293                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1294         if (DO_BIC(BIC_SYS_LPI))
1295                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1296
1297         if (DO_BIC(BIC_PkgWatt))
1298                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1299         if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1300                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1301         if (DO_BIC(BIC_GFXWatt))
1302                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1303         if (DO_BIC(BIC_RAMWatt))
1304                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1305         if (DO_BIC(BIC_Pkg_J))
1306                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1307         if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1308                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1309         if (DO_BIC(BIC_GFX_J))
1310                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1311         if (DO_BIC(BIC_RAM_J))
1312                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1313         if (DO_BIC(BIC_PKG__))
1314                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1315         if (DO_BIC(BIC_RAM__))
1316                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1317
1318         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1319                 if (mp->format == FORMAT_RAW) {
1320                         if (mp->width == 32)
1321                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1322                         else
1323                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1324                 } else if (mp->format == FORMAT_DELTA) {
1325                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1326                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1327                         else
1328                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1329                 } else if (mp->format == FORMAT_PERCENT) {
1330                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1331                 }
1332         }
1333
1334 done:
1335         if (*(outp - 1) != '\n')
1336                 outp += sprintf(outp, "\n");
1337
1338         return 0;
1339 }
1340
1341 void flush_output_stdout(void)
1342 {
1343         FILE *filep;
1344
1345         if (outf == stderr)
1346                 filep = stdout;
1347         else
1348                 filep = outf;
1349
1350         fputs(output_buffer, filep);
1351         fflush(filep);
1352
1353         outp = output_buffer;
1354 }
1355 void flush_output_stderr(void)
1356 {
1357         fputs(output_buffer, outf);
1358         fflush(outf);
1359         outp = output_buffer;
1360 }
1361 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1362 {
1363         static int printed;
1364
1365         if (!printed || !summary_only)
1366                 print_header("\t");
1367
1368         format_counters(&average.threads, &average.cores, &average.packages);
1369
1370         printed = 1;
1371
1372         if (summary_only)
1373                 return;
1374
1375         for_all_cpus(format_counters, t, c, p);
1376 }
1377
1378 #define DELTA_WRAP32(new, old)                  \
1379         old = ((((unsigned long long)new << 32) - ((unsigned long long)old << 32)) >> 32);
1380
1381 int
1382 delta_package(struct pkg_data *new, struct pkg_data *old)
1383 {
1384         int i;
1385         struct msr_counter *mp;
1386
1387
1388         if (DO_BIC(BIC_Totl_c0))
1389                 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1390         if (DO_BIC(BIC_Any_c0))
1391                 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1392         if (DO_BIC(BIC_GFX_c0))
1393                 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1394         if (DO_BIC(BIC_CPUGFX))
1395                 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1396
1397         old->pc2 = new->pc2 - old->pc2;
1398         if (DO_BIC(BIC_Pkgpc3))
1399                 old->pc3 = new->pc3 - old->pc3;
1400         if (DO_BIC(BIC_Pkgpc6))
1401                 old->pc6 = new->pc6 - old->pc6;
1402         if (DO_BIC(BIC_Pkgpc7))
1403                 old->pc7 = new->pc7 - old->pc7;
1404         old->pc8 = new->pc8 - old->pc8;
1405         old->pc9 = new->pc9 - old->pc9;
1406         old->pc10 = new->pc10 - old->pc10;
1407         old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1408         old->sys_lpi = new->sys_lpi - old->sys_lpi;
1409         old->pkg_temp_c = new->pkg_temp_c;
1410
1411         /* flag an error when rc6 counter resets/wraps */
1412         if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
1413                 old->gfx_rc6_ms = -1;
1414         else
1415                 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1416
1417         old->gfx_mhz = new->gfx_mhz;
1418         old->gfx_act_mhz = new->gfx_act_mhz;
1419
1420         old->energy_pkg = new->energy_pkg - old->energy_pkg;
1421         old->energy_cores = new->energy_cores - old->energy_cores;
1422         old->energy_gfx = new->energy_gfx - old->energy_gfx;
1423         old->energy_dram = new->energy_dram - old->energy_dram;
1424         old->rapl_pkg_perf_status = new->rapl_pkg_perf_status - old->rapl_pkg_perf_status;
1425         old->rapl_dram_perf_status = new->rapl_dram_perf_status - old->rapl_dram_perf_status;
1426
1427         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1428                 if (mp->format == FORMAT_RAW)
1429                         old->counter[i] = new->counter[i];
1430                 else
1431                         old->counter[i] = new->counter[i] - old->counter[i];
1432         }
1433
1434         return 0;
1435 }
1436
1437 void
1438 delta_core(struct core_data *new, struct core_data *old)
1439 {
1440         int i;
1441         struct msr_counter *mp;
1442
1443         old->c3 = new->c3 - old->c3;
1444         old->c6 = new->c6 - old->c6;
1445         old->c7 = new->c7 - old->c7;
1446         old->core_temp_c = new->core_temp_c;
1447         old->mc6_us = new->mc6_us - old->mc6_us;
1448
1449         DELTA_WRAP32(new->core_energy, old->core_energy);
1450
1451         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1452                 if (mp->format == FORMAT_RAW)
1453                         old->counter[i] = new->counter[i];
1454                 else
1455                         old->counter[i] = new->counter[i] - old->counter[i];
1456         }
1457 }
1458
1459 int soft_c1_residency_display(int bic)
1460 {
1461         if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1462                 return 0;
1463
1464         return DO_BIC_READ(bic);
1465 }
1466
1467 /*
1468  * old = new - old
1469  */
1470 int
1471 delta_thread(struct thread_data *new, struct thread_data *old,
1472         struct core_data *core_delta)
1473 {
1474         int i;
1475         struct msr_counter *mp;
1476
1477         /* we run cpuid just the 1st time, copy the results */
1478         if (DO_BIC(BIC_APIC))
1479                 new->apic_id = old->apic_id;
1480         if (DO_BIC(BIC_X2APIC))
1481                 new->x2apic_id = old->x2apic_id;
1482
1483         /*
1484          * the timestamps from start of measurement interval are in "old"
1485          * the timestamp from end of measurement interval are in "new"
1486          * over-write old w/ new so we can print end of interval values
1487          */
1488
1489         timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
1490         old->tv_begin = new->tv_begin;
1491         old->tv_end = new->tv_end;
1492
1493         old->tsc = new->tsc - old->tsc;
1494
1495         /* check for TSC < 1 Mcycles over interval */
1496         if (old->tsc < (1000 * 1000))
1497                 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1498                      "You can disable all c-states by booting with \"idle=poll\"\n"
1499                      "or just the deep ones with \"processor.max_cstate=1\"");
1500
1501         old->c1 = new->c1 - old->c1;
1502
1503         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1504             soft_c1_residency_display(BIC_Avg_MHz)) {
1505                 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1506                         old->aperf = new->aperf - old->aperf;
1507                         old->mperf = new->mperf - old->mperf;
1508                 } else {
1509                         return -1;
1510                 }
1511         }
1512
1513
1514         if (use_c1_residency_msr) {
1515                 /*
1516                  * Some models have a dedicated C1 residency MSR,
1517                  * which should be more accurate than the derivation below.
1518                  */
1519         } else {
1520                 /*
1521                  * As counter collection is not atomic,
1522                  * it is possible for mperf's non-halted cycles + idle states
1523                  * to exceed TSC's all cycles: show c1 = 0% in that case.
1524                  */
1525                 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1526                         old->c1 = 0;
1527                 else {
1528                         /* normal case, derive c1 */
1529                         old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1530                                 - core_delta->c6 - core_delta->c7;
1531                 }
1532         }
1533
1534         if (old->mperf == 0) {
1535                 if (debug > 1)
1536                         fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1537                 old->mperf = 1; /* divide by 0 protection */
1538         }
1539
1540         if (DO_BIC(BIC_IPC))
1541                 old->instr_count = new->instr_count - old->instr_count;
1542
1543         if (DO_BIC(BIC_IRQ))
1544                 old->irq_count = new->irq_count - old->irq_count;
1545
1546         if (DO_BIC(BIC_SMI))
1547                 old->smi_count = new->smi_count - old->smi_count;
1548
1549         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1550                 if (mp->format == FORMAT_RAW)
1551                         old->counter[i] = new->counter[i];
1552                 else
1553                         old->counter[i] = new->counter[i] - old->counter[i];
1554         }
1555         return 0;
1556 }
1557
1558 int delta_cpu(struct thread_data *t, struct core_data *c,
1559         struct pkg_data *p, struct thread_data *t2,
1560         struct core_data *c2, struct pkg_data *p2)
1561 {
1562         int retval = 0;
1563
1564         /* calculate core delta only for 1st thread in core */
1565         if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1566                 delta_core(c, c2);
1567
1568         /* always calculate thread delta */
1569         retval = delta_thread(t, t2, c2);       /* c2 is core delta */
1570         if (retval)
1571                 return retval;
1572
1573         /* calculate package delta only for 1st core in package */
1574         if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1575                 retval = delta_package(p, p2);
1576
1577         return retval;
1578 }
1579
1580 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1581 {
1582         int i;
1583         struct msr_counter  *mp;
1584
1585         t->tv_begin.tv_sec = 0;
1586         t->tv_begin.tv_usec = 0;
1587         t->tv_end.tv_sec = 0;
1588         t->tv_end.tv_usec = 0;
1589         t->tv_delta.tv_sec = 0;
1590         t->tv_delta.tv_usec = 0;
1591
1592         t->tsc = 0;
1593         t->aperf = 0;
1594         t->mperf = 0;
1595         t->c1 = 0;
1596
1597         t->instr_count = 0;
1598
1599         t->irq_count = 0;
1600         t->smi_count = 0;
1601
1602         /* tells format_counters to dump all fields from this set */
1603         t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1604
1605         c->c3 = 0;
1606         c->c6 = 0;
1607         c->c7 = 0;
1608         c->mc6_us = 0;
1609         c->core_temp_c = 0;
1610         c->core_energy = 0;
1611
1612         p->pkg_wtd_core_c0 = 0;
1613         p->pkg_any_core_c0 = 0;
1614         p->pkg_any_gfxe_c0 = 0;
1615         p->pkg_both_core_gfxe_c0 = 0;
1616
1617         p->pc2 = 0;
1618         if (DO_BIC(BIC_Pkgpc3))
1619                 p->pc3 = 0;
1620         if (DO_BIC(BIC_Pkgpc6))
1621                 p->pc6 = 0;
1622         if (DO_BIC(BIC_Pkgpc7))
1623                 p->pc7 = 0;
1624         p->pc8 = 0;
1625         p->pc9 = 0;
1626         p->pc10 = 0;
1627         p->cpu_lpi = 0;
1628         p->sys_lpi = 0;
1629
1630         p->energy_pkg = 0;
1631         p->energy_dram = 0;
1632         p->energy_cores = 0;
1633         p->energy_gfx = 0;
1634         p->rapl_pkg_perf_status = 0;
1635         p->rapl_dram_perf_status = 0;
1636         p->pkg_temp_c = 0;
1637
1638         p->gfx_rc6_ms = 0;
1639         p->gfx_mhz = 0;
1640         p->gfx_act_mhz = 0;
1641         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1642                 t->counter[i] = 0;
1643
1644         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1645                 c->counter[i] = 0;
1646
1647         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1648                 p->counter[i] = 0;
1649 }
1650 int sum_counters(struct thread_data *t, struct core_data *c,
1651         struct pkg_data *p)
1652 {
1653         int i;
1654         struct msr_counter *mp;
1655
1656         /* copy un-changing apic_id's */
1657         if (DO_BIC(BIC_APIC))
1658                 average.threads.apic_id = t->apic_id;
1659         if (DO_BIC(BIC_X2APIC))
1660                 average.threads.x2apic_id = t->x2apic_id;
1661
1662         /* remember first tv_begin */
1663         if (average.threads.tv_begin.tv_sec == 0)
1664                 average.threads.tv_begin = t->tv_begin;
1665
1666         /* remember last tv_end */
1667         average.threads.tv_end = t->tv_end;
1668
1669         average.threads.tsc += t->tsc;
1670         average.threads.aperf += t->aperf;
1671         average.threads.mperf += t->mperf;
1672         average.threads.c1 += t->c1;
1673
1674         average.threads.instr_count += t->instr_count;
1675
1676         average.threads.irq_count += t->irq_count;
1677         average.threads.smi_count += t->smi_count;
1678
1679         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1680                 if (mp->format == FORMAT_RAW)
1681                         continue;
1682                 average.threads.counter[i] += t->counter[i];
1683         }
1684
1685         /* sum per-core values only for 1st thread in core */
1686         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1687                 return 0;
1688
1689         average.cores.c3 += c->c3;
1690         average.cores.c6 += c->c6;
1691         average.cores.c7 += c->c7;
1692         average.cores.mc6_us += c->mc6_us;
1693
1694         average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1695
1696         average.cores.core_energy += c->core_energy;
1697
1698         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1699                 if (mp->format == FORMAT_RAW)
1700                         continue;
1701                 average.cores.counter[i] += c->counter[i];
1702         }
1703
1704         /* sum per-pkg values only for 1st core in pkg */
1705         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1706                 return 0;
1707
1708         if (DO_BIC(BIC_Totl_c0))
1709                 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1710         if (DO_BIC(BIC_Any_c0))
1711                 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1712         if (DO_BIC(BIC_GFX_c0))
1713                 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1714         if (DO_BIC(BIC_CPUGFX))
1715                 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1716
1717         average.packages.pc2 += p->pc2;
1718         if (DO_BIC(BIC_Pkgpc3))
1719                 average.packages.pc3 += p->pc3;
1720         if (DO_BIC(BIC_Pkgpc6))
1721                 average.packages.pc6 += p->pc6;
1722         if (DO_BIC(BIC_Pkgpc7))
1723                 average.packages.pc7 += p->pc7;
1724         average.packages.pc8 += p->pc8;
1725         average.packages.pc9 += p->pc9;
1726         average.packages.pc10 += p->pc10;
1727
1728         average.packages.cpu_lpi = p->cpu_lpi;
1729         average.packages.sys_lpi = p->sys_lpi;
1730
1731         average.packages.energy_pkg += p->energy_pkg;
1732         average.packages.energy_dram += p->energy_dram;
1733         average.packages.energy_cores += p->energy_cores;
1734         average.packages.energy_gfx += p->energy_gfx;
1735
1736         average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1737         average.packages.gfx_mhz = p->gfx_mhz;
1738         average.packages.gfx_act_mhz = p->gfx_act_mhz;
1739
1740         average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1741
1742         average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1743         average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1744
1745         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1746                 if (mp->format == FORMAT_RAW)
1747                         continue;
1748                 average.packages.counter[i] += p->counter[i];
1749         }
1750         return 0;
1751 }
1752 /*
1753  * sum the counters for all cpus in the system
1754  * compute the weighted average
1755  */
1756 void compute_average(struct thread_data *t, struct core_data *c,
1757         struct pkg_data *p)
1758 {
1759         int i;
1760         struct msr_counter *mp;
1761
1762         clear_counters(&average.threads, &average.cores, &average.packages);
1763
1764         for_all_cpus(sum_counters, t, c, p);
1765
1766         /* Use the global time delta for the average. */
1767         average.threads.tv_delta = tv_delta;
1768
1769         average.threads.tsc /= topo.num_cpus;
1770         average.threads.aperf /= topo.num_cpus;
1771         average.threads.mperf /= topo.num_cpus;
1772         average.threads.instr_count /= topo.num_cpus;
1773         average.threads.c1 /= topo.num_cpus;
1774
1775         if (average.threads.irq_count > 9999999)
1776                 sums_need_wide_columns = 1;
1777
1778         average.cores.c3 /= topo.num_cores;
1779         average.cores.c6 /= topo.num_cores;
1780         average.cores.c7 /= topo.num_cores;
1781         average.cores.mc6_us /= topo.num_cores;
1782
1783         if (DO_BIC(BIC_Totl_c0))
1784                 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1785         if (DO_BIC(BIC_Any_c0))
1786                 average.packages.pkg_any_core_c0 /= topo.num_packages;
1787         if (DO_BIC(BIC_GFX_c0))
1788                 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1789         if (DO_BIC(BIC_CPUGFX))
1790                 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1791
1792         average.packages.pc2 /= topo.num_packages;
1793         if (DO_BIC(BIC_Pkgpc3))
1794                 average.packages.pc3 /= topo.num_packages;
1795         if (DO_BIC(BIC_Pkgpc6))
1796                 average.packages.pc6 /= topo.num_packages;
1797         if (DO_BIC(BIC_Pkgpc7))
1798                 average.packages.pc7 /= topo.num_packages;
1799
1800         average.packages.pc8 /= topo.num_packages;
1801         average.packages.pc9 /= topo.num_packages;
1802         average.packages.pc10 /= topo.num_packages;
1803
1804         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1805                 if (mp->format == FORMAT_RAW)
1806                         continue;
1807                 if (mp->type == COUNTER_ITEMS) {
1808                         if (average.threads.counter[i] > 9999999)
1809                                 sums_need_wide_columns = 1;
1810                         continue;
1811                 }
1812                 average.threads.counter[i] /= topo.num_cpus;
1813         }
1814         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1815                 if (mp->format == FORMAT_RAW)
1816                         continue;
1817                 if (mp->type == COUNTER_ITEMS) {
1818                         if (average.cores.counter[i] > 9999999)
1819                                 sums_need_wide_columns = 1;
1820                 }
1821                 average.cores.counter[i] /= topo.num_cores;
1822         }
1823         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1824                 if (mp->format == FORMAT_RAW)
1825                         continue;
1826                 if (mp->type == COUNTER_ITEMS) {
1827                         if (average.packages.counter[i] > 9999999)
1828                                 sums_need_wide_columns = 1;
1829                 }
1830                 average.packages.counter[i] /= topo.num_packages;
1831         }
1832 }
1833
1834 static unsigned long long rdtsc(void)
1835 {
1836         unsigned int low, high;
1837
1838         asm volatile("rdtsc" : "=a" (low), "=d" (high));
1839
1840         return low | ((unsigned long long)high) << 32;
1841 }
1842
1843 /*
1844  * Open a file, and exit on failure
1845  */
1846 FILE *fopen_or_die(const char *path, const char *mode)
1847 {
1848         FILE *filep = fopen(path, mode);
1849
1850         if (!filep)
1851                 err(1, "%s: open failed", path);
1852         return filep;
1853 }
1854 /*
1855  * snapshot_sysfs_counter()
1856  *
1857  * return snapshot of given counter
1858  */
1859 unsigned long long snapshot_sysfs_counter(char *path)
1860 {
1861         FILE *fp;
1862         int retval;
1863         unsigned long long counter;
1864
1865         fp = fopen_or_die(path, "r");
1866
1867         retval = fscanf(fp, "%lld", &counter);
1868         if (retval != 1)
1869                 err(1, "snapshot_sysfs_counter(%s)", path);
1870
1871         fclose(fp);
1872
1873         return counter;
1874 }
1875
1876 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1877 {
1878         if (mp->msr_num != 0) {
1879                 if (get_msr(cpu, mp->msr_num, counterp))
1880                         return -1;
1881         } else {
1882                 char path[128 + PATH_BYTES];
1883
1884                 if (mp->flags & SYSFS_PERCPU) {
1885                         sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1886                                  cpu, mp->path);
1887
1888                         *counterp = snapshot_sysfs_counter(path);
1889                 } else {
1890                         *counterp = snapshot_sysfs_counter(mp->path);
1891                 }
1892         }
1893
1894         return 0;
1895 }
1896
1897 int get_epb(int cpu)
1898 {
1899         char path[128 + PATH_BYTES];
1900         unsigned long long msr;
1901         int ret, epb = -1;
1902         FILE *fp;
1903
1904         sprintf(path, "/sys/devices/system/cpu/cpu%d/power/energy_perf_bias", cpu);
1905
1906         fp = fopen(path, "r");
1907         if (!fp)
1908                 goto msr_fallback;
1909
1910         ret = fscanf(fp, "%d", &epb);
1911         if (ret != 1)
1912                 err(1, "%s(%s)", __func__, path);
1913
1914         fclose(fp);
1915
1916         return epb;
1917
1918 msr_fallback:
1919         get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr);
1920
1921         return msr & 0xf;
1922 }
1923
1924 void get_apic_id(struct thread_data *t)
1925 {
1926         unsigned int eax, ebx, ecx, edx;
1927
1928         if (DO_BIC(BIC_APIC)) {
1929                 eax = ebx = ecx = edx = 0;
1930                 __cpuid(1, eax, ebx, ecx, edx);
1931
1932                 t->apic_id = (ebx >> 24) & 0xff;
1933         }
1934
1935         if (!DO_BIC(BIC_X2APIC))
1936                 return;
1937
1938         if (authentic_amd || hygon_genuine) {
1939                 unsigned int topology_extensions;
1940
1941                 if (max_extended_level < 0x8000001e)
1942                         return;
1943
1944                 eax = ebx = ecx = edx = 0;
1945                 __cpuid(0x80000001, eax, ebx, ecx, edx);
1946                         topology_extensions = ecx & (1 << 22);
1947
1948                 if (topology_extensions == 0)
1949                         return;
1950
1951                 eax = ebx = ecx = edx = 0;
1952                 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1953
1954                 t->x2apic_id = eax;
1955                 return;
1956         }
1957
1958         if (!genuine_intel)
1959                 return;
1960
1961         if (max_level < 0xb)
1962                 return;
1963
1964         ecx = 0;
1965         __cpuid(0xb, eax, ebx, ecx, edx);
1966         t->x2apic_id = edx;
1967
1968         if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1969                 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1970                                 t->cpu_id, t->apic_id, t->x2apic_id);
1971 }
1972
1973 /*
1974  * get_counters(...)
1975  * migrate to cpu
1976  * acquire and record local counters for that cpu
1977  */
1978 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1979 {
1980         int cpu = t->cpu_id;
1981         unsigned long long msr;
1982         int aperf_mperf_retry_count = 0;
1983         struct msr_counter *mp;
1984         int i;
1985
1986         if (cpu_migrate(cpu)) {
1987                 fprintf(outf, "get_counters: Could not migrate to CPU %d\n", cpu);
1988                 return -1;
1989         }
1990
1991         gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1992
1993         if (first_counter_read)
1994                 get_apic_id(t);
1995 retry:
1996         t->tsc = rdtsc();       /* we are running on local CPU of interest */
1997
1998         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1999             soft_c1_residency_display(BIC_Avg_MHz)) {
2000                 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
2001
2002                 /*
2003                  * The TSC, APERF and MPERF must be read together for
2004                  * APERF/MPERF and MPERF/TSC to give accurate results.
2005                  *
2006                  * Unfortunately, APERF and MPERF are read by
2007                  * individual system call, so delays may occur
2008                  * between them.  If the time to read them
2009                  * varies by a large amount, we re-read them.
2010                  */
2011
2012                 /*
2013                  * This initial dummy APERF read has been seen to
2014                  * reduce jitter in the subsequent reads.
2015                  */
2016
2017                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2018                         return -3;
2019
2020                 t->tsc = rdtsc();       /* re-read close to APERF */
2021
2022                 tsc_before = t->tsc;
2023
2024                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2025                         return -3;
2026
2027                 tsc_between = rdtsc();
2028
2029                 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
2030                         return -4;
2031
2032                 tsc_after = rdtsc();
2033
2034                 aperf_time = tsc_between - tsc_before;
2035                 mperf_time = tsc_after - tsc_between;
2036
2037                 /*
2038                  * If the system call latency to read APERF and MPERF
2039                  * differ by more than 2x, then try again.
2040                  */
2041                 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
2042                         aperf_mperf_retry_count++;
2043                         if (aperf_mperf_retry_count < 5)
2044                                 goto retry;
2045                         else
2046                                 warnx("cpu%d jitter %lld %lld",
2047                                         cpu, aperf_time, mperf_time);
2048                 }
2049                 aperf_mperf_retry_count = 0;
2050
2051                 t->aperf = t->aperf * aperf_mperf_multiplier;
2052                 t->mperf = t->mperf * aperf_mperf_multiplier;
2053         }
2054
2055         if (DO_BIC(BIC_IPC))
2056                 if (read(get_instr_count_fd(cpu), &t->instr_count, sizeof(long long)) != sizeof(long long))
2057                         return -4;
2058
2059         if (DO_BIC(BIC_IRQ))
2060                 t->irq_count = irqs_per_cpu[cpu];
2061         if (DO_BIC(BIC_SMI)) {
2062                 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
2063                         return -5;
2064                 t->smi_count = msr & 0xFFFFFFFF;
2065         }
2066         if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
2067                 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
2068                         return -6;
2069         }
2070
2071         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
2072                 if (get_mp(cpu, mp, &t->counter[i]))
2073                         return -10;
2074         }
2075
2076         /* collect core counters only for 1st thread in core */
2077         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2078                 goto done;
2079
2080         if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
2081                 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
2082                         return -6;
2083         }
2084
2085         if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
2086                 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
2087                         return -7;
2088         } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
2089                 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
2090                         return -7;
2091         }
2092
2093         if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
2094                 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
2095                         return -8;
2096
2097         if (DO_BIC(BIC_Mod_c6))
2098                 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
2099                         return -8;
2100
2101         if (DO_BIC(BIC_CoreTmp)) {
2102                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2103                         return -9;
2104                 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2105         }
2106
2107         if (do_rapl & RAPL_AMD_F17H) {
2108                 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
2109                         return -14;
2110                 c->core_energy = msr & 0xFFFFFFFF;
2111         }
2112
2113         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
2114                 if (get_mp(cpu, mp, &c->counter[i]))
2115                         return -10;
2116         }
2117
2118         /* collect package counters only for 1st core in package */
2119         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2120                 goto done;
2121
2122         if (DO_BIC(BIC_Totl_c0)) {
2123                 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
2124                         return -10;
2125         }
2126         if (DO_BIC(BIC_Any_c0)) {
2127                 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
2128                         return -11;
2129         }
2130         if (DO_BIC(BIC_GFX_c0)) {
2131                 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
2132                         return -12;
2133         }
2134         if (DO_BIC(BIC_CPUGFX)) {
2135                 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
2136                         return -13;
2137         }
2138         if (DO_BIC(BIC_Pkgpc3))
2139                 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
2140                         return -9;
2141         if (DO_BIC(BIC_Pkgpc6)) {
2142                 if (do_slm_cstates) {
2143                         if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
2144                                 return -10;
2145                 } else {
2146                         if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
2147                                 return -10;
2148                 }
2149         }
2150
2151         if (DO_BIC(BIC_Pkgpc2))
2152                 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
2153                         return -11;
2154         if (DO_BIC(BIC_Pkgpc7))
2155                 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
2156                         return -12;
2157         if (DO_BIC(BIC_Pkgpc8))
2158                 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
2159                         return -13;
2160         if (DO_BIC(BIC_Pkgpc9))
2161                 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
2162                         return -13;
2163         if (DO_BIC(BIC_Pkgpc10))
2164                 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
2165                         return -13;
2166
2167         if (DO_BIC(BIC_CPU_LPI))
2168                 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
2169         if (DO_BIC(BIC_SYS_LPI))
2170                 p->sys_lpi = cpuidle_cur_sys_lpi_us;
2171
2172         if (do_rapl & RAPL_PKG) {
2173                 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STATUS, &msr))
2174                         return -13;
2175                 p->energy_pkg = msr;
2176         }
2177         if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
2178                 if (get_msr_sum(cpu, MSR_PP0_ENERGY_STATUS, &msr))
2179                         return -14;
2180                 p->energy_cores = msr;
2181         }
2182         if (do_rapl & RAPL_DRAM) {
2183                 if (get_msr_sum(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
2184                         return -15;
2185                 p->energy_dram = msr;
2186         }
2187         if (do_rapl & RAPL_GFX) {
2188                 if (get_msr_sum(cpu, MSR_PP1_ENERGY_STATUS, &msr))
2189                         return -16;
2190                 p->energy_gfx = msr;
2191         }
2192         if (do_rapl & RAPL_PKG_PERF_STATUS) {
2193                 if (get_msr_sum(cpu, MSR_PKG_PERF_STATUS, &msr))
2194                         return -16;
2195                 p->rapl_pkg_perf_status = msr;
2196         }
2197         if (do_rapl & RAPL_DRAM_PERF_STATUS) {
2198                 if (get_msr_sum(cpu, MSR_DRAM_PERF_STATUS, &msr))
2199                         return -16;
2200                 p->rapl_dram_perf_status = msr;
2201         }
2202         if (do_rapl & RAPL_AMD_F17H) {
2203                 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STAT, &msr))
2204                         return -13;
2205                 p->energy_pkg = msr;
2206         }
2207         if (DO_BIC(BIC_PkgTmp)) {
2208                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2209                         return -17;
2210                 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2211         }
2212
2213         if (DO_BIC(BIC_GFX_rc6))
2214                 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2215
2216         if (DO_BIC(BIC_GFXMHz))
2217                 p->gfx_mhz = gfx_cur_mhz;
2218
2219         if (DO_BIC(BIC_GFXACTMHz))
2220                 p->gfx_act_mhz = gfx_act_mhz;
2221
2222         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
2223                 if (get_mp(cpu, mp, &p->counter[i]))
2224                         return -10;
2225         }
2226 done:
2227         gettimeofday(&t->tv_end, (struct timezone *)NULL);
2228
2229         return 0;
2230 }
2231
2232 /*
2233  * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2234  * If you change the values, note they are used both in comparisons
2235  * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2236  */
2237
2238 #define PCLUKN 0 /* Unknown */
2239 #define PCLRSV 1 /* Reserved */
2240 #define PCL__0 2 /* PC0 */
2241 #define PCL__1 3 /* PC1 */
2242 #define PCL__2 4 /* PC2 */
2243 #define PCL__3 5 /* PC3 */
2244 #define PCL__4 6 /* PC4 */
2245 #define PCL__6 7 /* PC6 */
2246 #define PCL_6N 8 /* PC6 No Retention */
2247 #define PCL_6R 9 /* PC6 Retention */
2248 #define PCL__7 10 /* PC7 */
2249 #define PCL_7S 11 /* PC7 Shrink */
2250 #define PCL__8 12 /* PC8 */
2251 #define PCL__9 13 /* PC9 */
2252 #define PCL_10 14 /* PC10 */
2253 #define PCLUNL 15 /* Unlimited */
2254
2255 int pkg_cstate_limit = PCLUKN;
2256 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
2257         "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
2258
2259 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2260 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2261 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2262 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
2263 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2264 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2265 int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2266 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2267 int icx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__6, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2268
2269 static void
2270 calculate_tsc_tweak()
2271 {
2272         tsc_tweak = base_hz / tsc_hz;
2273 }
2274
2275 void prewake_cstate_probe(unsigned int family, unsigned int model);
2276
2277 static void
2278 dump_nhm_platform_info(void)
2279 {
2280         unsigned long long msr;
2281         unsigned int ratio;
2282
2283         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2284
2285         fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
2286
2287         ratio = (msr >> 40) & 0xFF;
2288         fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
2289                 ratio, bclk, ratio * bclk);
2290
2291         ratio = (msr >> 8) & 0xFF;
2292         fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2293                 ratio, bclk, ratio * bclk);
2294
2295         get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
2296         fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
2297                 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
2298
2299         /* C-state Pre-wake Disable (CSTATE_PREWAKE_DISABLE) */
2300         if (dis_cstate_prewake)
2301                 fprintf(outf, "C-state Pre-wake: %sabled\n",
2302                         msr & 0x40000000 ? "DIS" : "EN");
2303
2304         return;
2305 }
2306
2307 static void
2308 dump_hsw_turbo_ratio_limits(void)
2309 {
2310         unsigned long long msr;
2311         unsigned int ratio;
2312
2313         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
2314
2315         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
2316
2317         ratio = (msr >> 8) & 0xFF;
2318         if (ratio)
2319                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
2320                         ratio, bclk, ratio * bclk);
2321
2322         ratio = (msr >> 0) & 0xFF;
2323         if (ratio)
2324                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
2325                         ratio, bclk, ratio * bclk);
2326         return;
2327 }
2328
2329 static void
2330 dump_ivt_turbo_ratio_limits(void)
2331 {
2332         unsigned long long msr;
2333         unsigned int ratio;
2334
2335         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
2336
2337         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
2338
2339         ratio = (msr >> 56) & 0xFF;
2340         if (ratio)
2341                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
2342                         ratio, bclk, ratio * bclk);
2343
2344         ratio = (msr >> 48) & 0xFF;
2345         if (ratio)
2346                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
2347                         ratio, bclk, ratio * bclk);
2348
2349         ratio = (msr >> 40) & 0xFF;
2350         if (ratio)
2351                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
2352                         ratio, bclk, ratio * bclk);
2353
2354         ratio = (msr >> 32) & 0xFF;
2355         if (ratio)
2356                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
2357                         ratio, bclk, ratio * bclk);
2358
2359         ratio = (msr >> 24) & 0xFF;
2360         if (ratio)
2361                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
2362                         ratio, bclk, ratio * bclk);
2363
2364         ratio = (msr >> 16) & 0xFF;
2365         if (ratio)
2366                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
2367                         ratio, bclk, ratio * bclk);
2368
2369         ratio = (msr >> 8) & 0xFF;
2370         if (ratio)
2371                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
2372                         ratio, bclk, ratio * bclk);
2373
2374         ratio = (msr >> 0) & 0xFF;
2375         if (ratio)
2376                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
2377                         ratio, bclk, ratio * bclk);
2378         return;
2379 }
2380 int has_turbo_ratio_group_limits(int family, int model)
2381 {
2382
2383         if (!genuine_intel)
2384                 return 0;
2385
2386         switch (model) {
2387         case INTEL_FAM6_ATOM_GOLDMONT:
2388         case INTEL_FAM6_SKYLAKE_X:
2389         case INTEL_FAM6_ICELAKE_X:
2390         case INTEL_FAM6_ATOM_GOLDMONT_D:
2391         case INTEL_FAM6_ATOM_TREMONT_D:
2392                 return 1;
2393         }
2394         return 0;
2395 }
2396
2397 static void
2398 dump_turbo_ratio_limits(int family, int model)
2399 {
2400         unsigned long long msr, core_counts;
2401         unsigned int ratio, group_size;
2402
2403         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2404         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2405
2406         if (has_turbo_ratio_group_limits(family, model)) {
2407                 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2408                 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2409         } else {
2410                 core_counts = 0x0807060504030201;
2411         }
2412
2413         ratio = (msr >> 56) & 0xFF;
2414         group_size = (core_counts >> 56) & 0xFF;
2415         if (ratio)
2416                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2417                         ratio, bclk, ratio * bclk, group_size);
2418
2419         ratio = (msr >> 48) & 0xFF;
2420         group_size = (core_counts >> 48) & 0xFF;
2421         if (ratio)
2422                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2423                         ratio, bclk, ratio * bclk, group_size);
2424
2425         ratio = (msr >> 40) & 0xFF;
2426         group_size = (core_counts >> 40) & 0xFF;
2427         if (ratio)
2428                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2429                         ratio, bclk, ratio * bclk, group_size);
2430
2431         ratio = (msr >> 32) & 0xFF;
2432         group_size = (core_counts >> 32) & 0xFF;
2433         if (ratio)
2434                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2435                         ratio, bclk, ratio * bclk, group_size);
2436
2437         ratio = (msr >> 24) & 0xFF;
2438         group_size = (core_counts >> 24) & 0xFF;
2439         if (ratio)
2440                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2441                         ratio, bclk, ratio * bclk, group_size);
2442
2443         ratio = (msr >> 16) & 0xFF;
2444         group_size = (core_counts >> 16) & 0xFF;
2445         if (ratio)
2446                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2447                         ratio, bclk, ratio * bclk, group_size);
2448
2449         ratio = (msr >> 8) & 0xFF;
2450         group_size = (core_counts >> 8) & 0xFF;
2451         if (ratio)
2452                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2453                         ratio, bclk, ratio * bclk, group_size);
2454
2455         ratio = (msr >> 0) & 0xFF;
2456         group_size = (core_counts >> 0) & 0xFF;
2457         if (ratio)
2458                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2459                         ratio, bclk, ratio * bclk, group_size);
2460         return;
2461 }
2462
2463 static void
2464 dump_atom_turbo_ratio_limits(void)
2465 {
2466         unsigned long long msr;
2467         unsigned int ratio;
2468
2469         get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2470         fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2471
2472         ratio = (msr >> 0) & 0x3F;
2473         if (ratio)
2474                 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2475                         ratio, bclk, ratio * bclk);
2476
2477         ratio = (msr >> 8) & 0x3F;
2478         if (ratio)
2479                 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2480                         ratio, bclk, ratio * bclk);
2481
2482         ratio = (msr >> 16) & 0x3F;
2483         if (ratio)
2484                 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2485                         ratio, bclk, ratio * bclk);
2486
2487         get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2488         fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2489
2490         ratio = (msr >> 24) & 0x3F;
2491         if (ratio)
2492                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2493                         ratio, bclk, ratio * bclk);
2494
2495         ratio = (msr >> 16) & 0x3F;
2496         if (ratio)
2497                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2498                         ratio, bclk, ratio * bclk);
2499
2500         ratio = (msr >> 8) & 0x3F;
2501         if (ratio)
2502                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2503                         ratio, bclk, ratio * bclk);
2504
2505         ratio = (msr >> 0) & 0x3F;
2506         if (ratio)
2507                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2508                         ratio, bclk, ratio * bclk);
2509 }
2510
2511 static void
2512 dump_knl_turbo_ratio_limits(void)
2513 {
2514         const unsigned int buckets_no = 7;
2515
2516         unsigned long long msr;
2517         int delta_cores, delta_ratio;
2518         int i, b_nr;
2519         unsigned int cores[buckets_no];
2520         unsigned int ratio[buckets_no];
2521
2522         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2523
2524         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2525                 base_cpu, msr);
2526
2527         /*
2528          * Turbo encoding in KNL is as follows:
2529          * [0] -- Reserved
2530          * [7:1] -- Base value of number of active cores of bucket 1.
2531          * [15:8] -- Base value of freq ratio of bucket 1.
2532          * [20:16] -- +ve delta of number of active cores of bucket 2.
2533          * i.e. active cores of bucket 2 =
2534          * active cores of bucket 1 + delta
2535          * [23:21] -- Negative delta of freq ratio of bucket 2.
2536          * i.e. freq ratio of bucket 2 =
2537          * freq ratio of bucket 1 - delta
2538          * [28:24]-- +ve delta of number of active cores of bucket 3.
2539          * [31:29]-- -ve delta of freq ratio of bucket 3.
2540          * [36:32]-- +ve delta of number of active cores of bucket 4.
2541          * [39:37]-- -ve delta of freq ratio of bucket 4.
2542          * [44:40]-- +ve delta of number of active cores of bucket 5.
2543          * [47:45]-- -ve delta of freq ratio of bucket 5.
2544          * [52:48]-- +ve delta of number of active cores of bucket 6.
2545          * [55:53]-- -ve delta of freq ratio of bucket 6.
2546          * [60:56]-- +ve delta of number of active cores of bucket 7.
2547          * [63:61]-- -ve delta of freq ratio of bucket 7.
2548          */
2549
2550         b_nr = 0;
2551         cores[b_nr] = (msr & 0xFF) >> 1;
2552         ratio[b_nr] = (msr >> 8) & 0xFF;
2553
2554         for (i = 16; i < 64; i += 8) {
2555                 delta_cores = (msr >> i) & 0x1F;
2556                 delta_ratio = (msr >> (i + 5)) & 0x7;
2557
2558                 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2559                 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2560                 b_nr++;
2561         }
2562
2563         for (i = buckets_no - 1; i >= 0; i--)
2564                 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2565                         fprintf(outf,
2566                                 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2567                                 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2568 }
2569
2570 static void
2571 dump_nhm_cst_cfg(void)
2572 {
2573         unsigned long long msr;
2574
2575         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2576
2577         fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2578
2579         fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2580                 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2581                 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2582                 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2583                 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2584                 (msr & (1 << 15)) ? "" : "UN",
2585                 (unsigned int)msr & 0xF,
2586                 pkg_cstate_limit_strings[pkg_cstate_limit]);
2587
2588 #define AUTOMATIC_CSTATE_CONVERSION             (1UL << 16)
2589         if (has_automatic_cstate_conversion) {
2590                 fprintf(outf, ", automatic c-state conversion=%s",
2591                         (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2592         }
2593
2594         fprintf(outf, ")\n");
2595
2596         return;
2597 }
2598
2599 static void
2600 dump_config_tdp(void)
2601 {
2602         unsigned long long msr;
2603
2604         get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2605         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2606         fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2607
2608         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2609         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2610         if (msr) {
2611                 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2612                 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2613                 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2614                 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2615         }
2616         fprintf(outf, ")\n");
2617
2618         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2619         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2620         if (msr) {
2621                 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2622                 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2623                 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2624                 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2625         }
2626         fprintf(outf, ")\n");
2627
2628         get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2629         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2630         if ((msr) & 0x3)
2631                 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2632         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2633         fprintf(outf, ")\n");
2634
2635         get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2636         fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2637         fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2638         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2639         fprintf(outf, ")\n");
2640 }
2641
2642 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2643
2644 void print_irtl(void)
2645 {
2646         unsigned long long msr;
2647
2648         get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2649         fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2650         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2651                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2652
2653         get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2654         fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2655         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2656                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2657
2658         get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2659         fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2660         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2661                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2662
2663         if (!do_irtl_hsw)
2664                 return;
2665
2666         get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2667         fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2668         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2669                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2670
2671         get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2672         fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2673         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2674                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2675
2676         get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2677         fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2678         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2679                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2680
2681 }
2682 void free_fd_percpu(void)
2683 {
2684         int i;
2685
2686         for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2687                 if (fd_percpu[i] != 0)
2688                         close(fd_percpu[i]);
2689         }
2690
2691         free(fd_percpu);
2692 }
2693
2694 void free_all_buffers(void)
2695 {
2696         int i;
2697
2698         CPU_FREE(cpu_present_set);
2699         cpu_present_set = NULL;
2700         cpu_present_setsize = 0;
2701
2702         CPU_FREE(cpu_affinity_set);
2703         cpu_affinity_set = NULL;
2704         cpu_affinity_setsize = 0;
2705
2706         free(thread_even);
2707         free(core_even);
2708         free(package_even);
2709
2710         thread_even = NULL;
2711         core_even = NULL;
2712         package_even = NULL;
2713
2714         free(thread_odd);
2715         free(core_odd);
2716         free(package_odd);
2717
2718         thread_odd = NULL;
2719         core_odd = NULL;
2720         package_odd = NULL;
2721
2722         free(output_buffer);
2723         output_buffer = NULL;
2724         outp = NULL;
2725
2726         free_fd_percpu();
2727
2728         free(irq_column_2_cpu);
2729         free(irqs_per_cpu);
2730
2731         for (i = 0; i <= topo.max_cpu_num; ++i) {
2732                 if (cpus[i].put_ids)
2733                         CPU_FREE(cpus[i].put_ids);
2734         }
2735         free(cpus);
2736 }
2737
2738
2739 /*
2740  * Parse a file containing a single int.
2741  * Return 0 if file can not be opened
2742  * Exit if file can be opened, but can not be parsed
2743  */
2744 int parse_int_file(const char *fmt, ...)
2745 {
2746         va_list args;
2747         char path[PATH_MAX];
2748         FILE *filep;
2749         int value;
2750
2751         va_start(args, fmt);
2752         vsnprintf(path, sizeof(path), fmt, args);
2753         va_end(args);
2754         filep = fopen(path, "r");
2755         if (!filep)
2756                 return 0;
2757         if (fscanf(filep, "%d", &value) != 1)
2758                 err(1, "%s: failed to parse number from file", path);
2759         fclose(filep);
2760         return value;
2761 }
2762
2763 /*
2764  * cpu_is_first_core_in_package(cpu)
2765  * return 1 if given CPU is 1st core in package
2766  */
2767 int cpu_is_first_core_in_package(int cpu)
2768 {
2769         return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2770 }
2771
2772 int get_physical_package_id(int cpu)
2773 {
2774         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2775 }
2776
2777 int get_die_id(int cpu)
2778 {
2779         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2780 }
2781
2782 int get_core_id(int cpu)
2783 {
2784         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2785 }
2786
2787 void set_node_data(void)
2788 {
2789         int pkg, node, lnode, cpu, cpux;
2790         int cpu_count;
2791
2792         /* initialize logical_node_id */
2793         for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2794                 cpus[cpu].logical_node_id = -1;
2795
2796         cpu_count = 0;
2797         for (pkg = 0; pkg < topo.num_packages; pkg++) {
2798                 lnode = 0;
2799                 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2800                         if (cpus[cpu].physical_package_id != pkg)
2801                                 continue;
2802                         /* find a cpu with an unset logical_node_id */
2803                         if (cpus[cpu].logical_node_id != -1)
2804                                 continue;
2805                         cpus[cpu].logical_node_id = lnode;
2806                         node = cpus[cpu].physical_node_id;
2807                         cpu_count++;
2808                         /*
2809                          * find all matching cpus on this pkg and set
2810                          * the logical_node_id
2811                          */
2812                         for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2813                                 if ((cpus[cpux].physical_package_id == pkg) &&
2814                                    (cpus[cpux].physical_node_id == node)) {
2815                                         cpus[cpux].logical_node_id = lnode;
2816                                         cpu_count++;
2817                                 }
2818                         }
2819                         lnode++;
2820                         if (lnode > topo.nodes_per_pkg)
2821                                 topo.nodes_per_pkg = lnode;
2822                 }
2823                 if (cpu_count >= topo.max_cpu_num)
2824                         break;
2825         }
2826 }
2827
2828 int get_physical_node_id(struct cpu_topology *thiscpu)
2829 {
2830         char path[80];
2831         FILE *filep;
2832         int i;
2833         int cpu = thiscpu->logical_cpu_id;
2834
2835         for (i = 0; i <= topo.max_cpu_num; i++) {
2836                 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2837                         cpu, i);
2838                 filep = fopen(path, "r");
2839                 if (!filep)
2840                         continue;
2841                 fclose(filep);
2842                 return i;
2843         }
2844         return -1;
2845 }
2846
2847 int get_thread_siblings(struct cpu_topology *thiscpu)
2848 {
2849         char path[80], character;
2850         FILE *filep;
2851         unsigned long map;
2852         int so, shift, sib_core;
2853         int cpu = thiscpu->logical_cpu_id;
2854         int offset = topo.max_cpu_num + 1;
2855         size_t size;
2856         int thread_id = 0;
2857
2858         thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2859         if (thiscpu->thread_id < 0)
2860                 thiscpu->thread_id = thread_id++;
2861         if (!thiscpu->put_ids)
2862                 return -1;
2863
2864         size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2865         CPU_ZERO_S(size, thiscpu->put_ids);
2866
2867         sprintf(path,
2868                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2869         filep = fopen(path, "r");
2870
2871         if (!filep) {
2872                 warnx("%s: open failed", path);
2873                 return -1;
2874         }
2875         do {
2876                 offset -= BITMASK_SIZE;
2877                 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2878                         err(1, "%s: failed to parse file", path);
2879                 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2880                         if ((map >> shift) & 0x1) {
2881                                 so = shift + offset;
2882                                 sib_core = get_core_id(so);
2883                                 if (sib_core == thiscpu->physical_core_id) {
2884                                         CPU_SET_S(so, size, thiscpu->put_ids);
2885                                         if ((so != cpu) &&
2886                                             (cpus[so].thread_id < 0))
2887                                                 cpus[so].thread_id =
2888                                                                     thread_id++;
2889                                 }
2890                         }
2891                 }
2892         } while (!strncmp(&character, ",", 1));
2893         fclose(filep);
2894
2895         return CPU_COUNT_S(size, thiscpu->put_ids);
2896 }
2897
2898 /*
2899  * run func(thread, core, package) in topology order
2900  * skip non-present cpus
2901  */
2902
2903 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2904         struct pkg_data *, struct thread_data *, struct core_data *,
2905         struct pkg_data *), struct thread_data *thread_base,
2906         struct core_data *core_base, struct pkg_data *pkg_base,
2907         struct thread_data *thread_base2, struct core_data *core_base2,
2908         struct pkg_data *pkg_base2)
2909 {
2910         int retval, pkg_no, node_no, core_no, thread_no;
2911
2912         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2913                 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2914                         for (core_no = 0; core_no < topo.cores_per_node;
2915                              ++core_no) {
2916                                 for (thread_no = 0; thread_no <
2917                                         topo.threads_per_core; ++thread_no) {
2918                                         struct thread_data *t, *t2;
2919                                         struct core_data *c, *c2;
2920                                         struct pkg_data *p, *p2;
2921
2922                                         t = GET_THREAD(thread_base, thread_no,
2923                                                        core_no, node_no,
2924                                                        pkg_no);
2925
2926                                         if (cpu_is_not_present(t->cpu_id))
2927                                                 continue;
2928
2929                                         t2 = GET_THREAD(thread_base2, thread_no,
2930                                                         core_no, node_no,
2931                                                         pkg_no);
2932
2933                                         c = GET_CORE(core_base, core_no,
2934                                                      node_no, pkg_no);
2935                                         c2 = GET_CORE(core_base2, core_no,
2936                                                       node_no,
2937                                                       pkg_no);
2938
2939                                         p = GET_PKG(pkg_base, pkg_no);
2940                                         p2 = GET_PKG(pkg_base2, pkg_no);
2941
2942                                         retval = func(t, c, p, t2, c2, p2);
2943                                         if (retval)
2944                                                 return retval;
2945                                 }
2946                         }
2947                 }
2948         }
2949         return 0;
2950 }
2951
2952 /*
2953  * run func(cpu) on every cpu in /proc/stat
2954  * return max_cpu number
2955  */
2956 int for_all_proc_cpus(int (func)(int))
2957 {
2958         FILE *fp;
2959         int cpu_num;
2960         int retval;
2961
2962         fp = fopen_or_die(proc_stat, "r");
2963
2964         retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2965         if (retval != 0)
2966                 err(1, "%s: failed to parse format", proc_stat);
2967
2968         while (1) {
2969                 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2970                 if (retval != 1)
2971                         break;
2972
2973                 retval = func(cpu_num);
2974                 if (retval) {
2975                         fclose(fp);
2976                         return(retval);
2977                 }
2978         }
2979         fclose(fp);
2980         return 0;
2981 }
2982
2983 void re_initialize(void)
2984 {
2985         free_all_buffers();
2986         setup_all_buffers();
2987         fprintf(outf, "turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2988 }
2989
2990 void set_max_cpu_num(void)
2991 {
2992         FILE *filep;
2993         int base_cpu;
2994         unsigned long dummy;
2995         char pathname[64];
2996
2997         base_cpu = sched_getcpu();
2998         if (base_cpu < 0)
2999                 err(1, "cannot find calling cpu ID");
3000         sprintf(pathname,
3001                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings",
3002                 base_cpu);
3003
3004         filep = fopen_or_die(pathname, "r");
3005         topo.max_cpu_num = 0;
3006         while (fscanf(filep, "%lx,", &dummy) == 1)
3007                 topo.max_cpu_num += BITMASK_SIZE;
3008         fclose(filep);
3009         topo.max_cpu_num--; /* 0 based */
3010 }
3011
3012 /*
3013  * count_cpus()
3014  * remember the last one seen, it will be the max
3015  */
3016 int count_cpus(int cpu)
3017 {
3018         topo.num_cpus++;
3019         return 0;
3020 }
3021 int mark_cpu_present(int cpu)
3022 {
3023         CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
3024         return 0;
3025 }
3026
3027 int init_thread_id(int cpu)
3028 {
3029         cpus[cpu].thread_id = -1;
3030         return 0;
3031 }
3032
3033 /*
3034  * snapshot_proc_interrupts()
3035  *
3036  * read and record summary of /proc/interrupts
3037  *
3038  * return 1 if config change requires a restart, else return 0
3039  */
3040 int snapshot_proc_interrupts(void)
3041 {
3042         static FILE *fp;
3043         int column, retval;
3044
3045         if (fp == NULL)
3046                 fp = fopen_or_die("/proc/interrupts", "r");
3047         else
3048                 rewind(fp);
3049
3050         /* read 1st line of /proc/interrupts to get cpu* name for each column */
3051         for (column = 0; column < topo.num_cpus; ++column) {
3052                 int cpu_number;
3053
3054                 retval = fscanf(fp, " CPU%d", &cpu_number);
3055                 if (retval != 1)
3056                         break;
3057
3058                 if (cpu_number > topo.max_cpu_num) {
3059                         warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
3060                         return 1;
3061                 }
3062
3063                 irq_column_2_cpu[column] = cpu_number;
3064                 irqs_per_cpu[cpu_number] = 0;
3065         }
3066
3067         /* read /proc/interrupt count lines and sum up irqs per cpu */
3068         while (1) {
3069                 int column;
3070                 char buf[64];
3071
3072                 retval = fscanf(fp, " %s:", buf);       /* flush irq# "N:" */
3073                 if (retval != 1)
3074                         break;
3075
3076                 /* read the count per cpu */
3077                 for (column = 0; column < topo.num_cpus; ++column) {
3078
3079                         int cpu_number, irq_count;
3080
3081                         retval = fscanf(fp, " %d", &irq_count);
3082                         if (retval != 1)
3083                                 break;
3084
3085                         cpu_number = irq_column_2_cpu[column];
3086                         irqs_per_cpu[cpu_number] += irq_count;
3087
3088                 }
3089
3090                 while (getc(fp) != '\n')
3091                         ;       /* flush interrupt description */
3092
3093         }
3094         return 0;
3095 }
3096 /*
3097  * snapshot_gfx_rc6_ms()
3098  *
3099  * record snapshot of
3100  * /sys/class/drm/card0/power/rc6_residency_ms
3101  *
3102  * return 1 if config change requires a restart, else return 0
3103  */
3104 int snapshot_gfx_rc6_ms(void)
3105 {
3106         FILE *fp;
3107         int retval;
3108
3109         fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
3110
3111         retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
3112         if (retval != 1)
3113                 err(1, "GFX rc6");
3114
3115         fclose(fp);
3116
3117         return 0;
3118 }
3119 /*
3120  * snapshot_gfx_mhz()
3121  *
3122  * record snapshot of
3123  * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
3124  *
3125  * return 1 if config change requires a restart, else return 0
3126  */
3127 int snapshot_gfx_mhz(void)
3128 {
3129         static FILE *fp;
3130         int retval;
3131
3132         if (fp == NULL)
3133                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
3134         else {
3135                 rewind(fp);
3136                 fflush(fp);
3137         }
3138
3139         retval = fscanf(fp, "%d", &gfx_cur_mhz);
3140         if (retval != 1)
3141                 err(1, "GFX MHz");
3142
3143         return 0;
3144 }
3145
3146 /*
3147  * snapshot_gfx_cur_mhz()
3148  *
3149  * record snapshot of
3150  * /sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz
3151  *
3152  * return 1 if config change requires a restart, else return 0
3153  */
3154 int snapshot_gfx_act_mhz(void)
3155 {
3156         static FILE *fp;
3157         int retval;
3158
3159         if (fp == NULL)
3160                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", "r");
3161         else {
3162                 rewind(fp);
3163                 fflush(fp);
3164         }
3165
3166         retval = fscanf(fp, "%d", &gfx_act_mhz);
3167         if (retval != 1)
3168                 err(1, "GFX ACT MHz");
3169
3170         return 0;
3171 }
3172
3173 /*
3174  * snapshot_cpu_lpi()
3175  *
3176  * record snapshot of
3177  * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
3178  */
3179 int snapshot_cpu_lpi_us(void)
3180 {
3181         FILE *fp;
3182         int retval;
3183
3184         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
3185
3186         retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
3187         if (retval != 1) {
3188                 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
3189                 BIC_NOT_PRESENT(BIC_CPU_LPI);
3190                 fclose(fp);
3191                 return -1;
3192         }
3193
3194         fclose(fp);
3195
3196         return 0;
3197 }
3198 /*
3199  * snapshot_sys_lpi()
3200  *
3201  * record snapshot of sys_lpi_file
3202  */
3203 int snapshot_sys_lpi_us(void)
3204 {
3205         FILE *fp;
3206         int retval;
3207
3208         fp = fopen_or_die(sys_lpi_file, "r");
3209
3210         retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
3211         if (retval != 1) {
3212                 fprintf(stderr, "Disabling Low Power Idle System output\n");
3213                 BIC_NOT_PRESENT(BIC_SYS_LPI);
3214                 fclose(fp);
3215                 return -1;
3216         }
3217         fclose(fp);
3218
3219         return 0;
3220 }
3221 /*
3222  * snapshot /proc and /sys files
3223  *
3224  * return 1 if configuration restart needed, else return 0
3225  */
3226 int snapshot_proc_sysfs_files(void)
3227 {
3228         if (DO_BIC(BIC_IRQ))
3229                 if (snapshot_proc_interrupts())
3230                         return 1;
3231
3232         if (DO_BIC(BIC_GFX_rc6))
3233                 snapshot_gfx_rc6_ms();
3234
3235         if (DO_BIC(BIC_GFXMHz))
3236                 snapshot_gfx_mhz();
3237
3238         if (DO_BIC(BIC_GFXACTMHz))
3239                 snapshot_gfx_act_mhz();
3240
3241         if (DO_BIC(BIC_CPU_LPI))
3242                 snapshot_cpu_lpi_us();
3243
3244         if (DO_BIC(BIC_SYS_LPI))
3245                 snapshot_sys_lpi_us();
3246
3247         return 0;
3248 }
3249
3250 int exit_requested;
3251
3252 static void signal_handler (int signal)
3253 {
3254         switch (signal) {
3255         case SIGINT:
3256                 exit_requested = 1;
3257                 if (debug)
3258                         fprintf(stderr, " SIGINT\n");
3259                 break;
3260         case SIGUSR1:
3261                 if (debug > 1)
3262                         fprintf(stderr, "SIGUSR1\n");
3263                 break;
3264         }
3265 }
3266
3267 void setup_signal_handler(void)
3268 {
3269         struct sigaction sa;
3270
3271         memset(&sa, 0, sizeof(sa));
3272
3273         sa.sa_handler = &signal_handler;
3274
3275         if (sigaction(SIGINT, &sa, NULL) < 0)
3276                 err(1, "sigaction SIGINT");
3277         if (sigaction(SIGUSR1, &sa, NULL) < 0)
3278                 err(1, "sigaction SIGUSR1");
3279 }
3280
3281 void do_sleep(void)
3282 {
3283         struct timeval tout;
3284         struct timespec rest;
3285         fd_set readfds;
3286         int retval;
3287
3288         FD_ZERO(&readfds);
3289         FD_SET(0, &readfds);
3290
3291         if (ignore_stdin) {
3292                 nanosleep(&interval_ts, NULL);
3293                 return;
3294         }
3295
3296         tout = interval_tv;
3297         retval = select(1, &readfds, NULL, NULL, &tout);
3298
3299         if (retval == 1) {
3300                 switch (getc(stdin)) {
3301                 case 'q':
3302                         exit_requested = 1;
3303                         break;
3304                 case EOF:
3305                         /*
3306                          * 'stdin' is a pipe closed on the other end. There
3307                          * won't be any further input.
3308                          */
3309                         ignore_stdin = 1;
3310                         /* Sleep the rest of the time */
3311                         rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3312                         rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3313                         nanosleep(&rest, NULL);
3314                 }
3315         }
3316 }
3317
3318 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
3319 {
3320         int ret, idx;
3321         unsigned long long msr_cur, msr_last;
3322
3323         if (!per_cpu_msr_sum)
3324                 return 1;
3325
3326         idx = offset_to_idx(offset);
3327         if (idx < 0)
3328                 return idx;
3329         /* get_msr_sum() = sum + (get_msr() - last) */
3330         ret = get_msr(cpu, offset, &msr_cur);
3331         if (ret)
3332                 return ret;
3333         msr_last = per_cpu_msr_sum[cpu].entries[idx].last;
3334         DELTA_WRAP32(msr_cur, msr_last);
3335         *msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;
3336
3337         return 0;
3338 }
3339
3340 timer_t timerid;
3341
3342 /* Timer callback, update the sum of MSRs periodically. */
3343 static int update_msr_sum(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3344 {
3345         int i, ret;
3346         int cpu = t->cpu_id;
3347
3348         for (i = IDX_PKG_ENERGY; i < IDX_COUNT; i++) {
3349                 unsigned long long msr_cur, msr_last;
3350                 off_t offset;
3351
3352                 if (!idx_valid(i))
3353                         continue;
3354                 offset = idx_to_offset(i);
3355                 if (offset < 0)
3356                         continue;
3357                 ret = get_msr(cpu, offset, &msr_cur);
3358                 if (ret) {
3359                         fprintf(outf, "Can not update msr(0x%llx)\n",
3360                                 (unsigned long long)offset);
3361                         continue;
3362                 }
3363
3364                 msr_last = per_cpu_msr_sum[cpu].entries[i].last;
3365                 per_cpu_msr_sum[cpu].entries[i].last = msr_cur & 0xffffffff;
3366
3367                 DELTA_WRAP32(msr_cur, msr_last);
3368                 per_cpu_msr_sum[cpu].entries[i].sum += msr_last;
3369         }
3370         return 0;
3371 }
3372
3373 static void
3374 msr_record_handler(union sigval v)
3375 {
3376         for_all_cpus(update_msr_sum, EVEN_COUNTERS);
3377 }
3378
3379 void msr_sum_record(void)
3380 {
3381         struct itimerspec its;
3382         struct sigevent sev;
3383
3384         per_cpu_msr_sum = calloc(topo.max_cpu_num + 1, sizeof(struct msr_sum_array));
3385         if (!per_cpu_msr_sum) {
3386                 fprintf(outf, "Can not allocate memory for long time MSR.\n");
3387                 return;
3388         }
3389         /*
3390          * Signal handler might be restricted, so use thread notifier instead.
3391          */
3392         memset(&sev, 0, sizeof(struct sigevent));
3393         sev.sigev_notify = SIGEV_THREAD;
3394         sev.sigev_notify_function = msr_record_handler;
3395
3396         sev.sigev_value.sival_ptr = &timerid;
3397         if (timer_create(CLOCK_REALTIME, &sev, &timerid) == -1) {
3398                 fprintf(outf, "Can not create timer.\n");
3399                 goto release_msr;
3400         }
3401
3402         its.it_value.tv_sec = 0;
3403         its.it_value.tv_nsec = 1;
3404         /*
3405          * A wraparound time has been calculated early.
3406          * Some sources state that the peak power for a
3407          * microprocessor is usually 1.5 times the TDP rating,
3408          * use 2 * TDP for safety.
3409          */
3410         its.it_interval.tv_sec = rapl_joule_counter_range / 2;
3411         its.it_interval.tv_nsec = 0;
3412
3413         if (timer_settime(timerid, 0, &its, NULL) == -1) {
3414                 fprintf(outf, "Can not set timer.\n");
3415                 goto release_timer;
3416         }
3417         return;
3418
3419  release_timer:
3420         timer_delete(timerid);
3421  release_msr:
3422         free(per_cpu_msr_sum);
3423 }
3424
3425 void turbostat_loop()
3426 {
3427         int retval;
3428         int restarted = 0;
3429         int done_iters = 0;
3430
3431         setup_signal_handler();
3432
3433 restart:
3434         restarted++;
3435
3436         snapshot_proc_sysfs_files();
3437         retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3438         first_counter_read = 0;
3439         if (retval < -1) {
3440                 exit(retval);
3441         } else if (retval == -1) {
3442                 if (restarted > 10) {
3443                         exit(retval);
3444                 }
3445                 re_initialize();
3446                 goto restart;
3447         }
3448         restarted = 0;
3449         done_iters = 0;
3450         gettimeofday(&tv_even, (struct timezone *)NULL);
3451
3452         while (1) {
3453                 if (for_all_proc_cpus(cpu_is_not_present)) {
3454                         re_initialize();
3455                         goto restart;
3456                 }
3457                 do_sleep();
3458                 if (snapshot_proc_sysfs_files())
3459                         goto restart;
3460                 retval = for_all_cpus(get_counters, ODD_COUNTERS);
3461                 if (retval < -1) {
3462                         exit(retval);
3463                 } else if (retval == -1) {
3464                         re_initialize();
3465                         goto restart;
3466                 }
3467                 gettimeofday(&tv_odd, (struct timezone *)NULL);
3468                 timersub(&tv_odd, &tv_even, &tv_delta);
3469                 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3470                         re_initialize();
3471                         goto restart;
3472                 }
3473                 compute_average(EVEN_COUNTERS);
3474                 format_all_counters(EVEN_COUNTERS);
3475                 flush_output_stdout();
3476                 if (exit_requested)
3477                         break;
3478                 if (num_iterations && ++done_iters >= num_iterations)
3479                         break;
3480                 do_sleep();
3481                 if (snapshot_proc_sysfs_files())
3482                         goto restart;
3483                 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3484                 if (retval < -1) {
3485                         exit(retval);
3486                 } else if (retval == -1) {
3487                         re_initialize();
3488                         goto restart;
3489                 }
3490                 gettimeofday(&tv_even, (struct timezone *)NULL);
3491                 timersub(&tv_even, &tv_odd, &tv_delta);
3492                 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3493                         re_initialize();
3494                         goto restart;
3495                 }
3496                 compute_average(ODD_COUNTERS);
3497                 format_all_counters(ODD_COUNTERS);
3498                 flush_output_stdout();
3499                 if (exit_requested)
3500                         break;
3501                 if (num_iterations && ++done_iters >= num_iterations)
3502                         break;
3503         }
3504 }
3505
3506 void check_dev_msr()
3507 {
3508         struct stat sb;
3509         char pathname[32];
3510
3511         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3512         if (stat(pathname, &sb))
3513                 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3514                         err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
3515 }
3516
3517 /*
3518  * check for CAP_SYS_RAWIO
3519  * return 0 on success
3520  * return 1 on fail
3521  */
3522 int check_for_cap_sys_rawio(void)
3523 {
3524         cap_t caps;
3525         cap_flag_value_t cap_flag_value;
3526
3527         caps = cap_get_proc();
3528         if (caps == NULL)
3529                 err(-6, "cap_get_proc\n");
3530
3531         if (cap_get_flag(caps, CAP_SYS_RAWIO, CAP_EFFECTIVE, &cap_flag_value))
3532                 err(-6, "cap_get\n");
3533
3534         if (cap_flag_value != CAP_SET) {
3535                 warnx("capget(CAP_SYS_RAWIO) failed,"
3536                         " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3537                 return 1;
3538         }
3539
3540         if (cap_free(caps) == -1)
3541                 err(-6, "cap_free\n");
3542
3543         return 0;
3544 }
3545 void check_permissions(void)
3546 {
3547         int do_exit = 0;
3548         char pathname[32];
3549
3550         /* check for CAP_SYS_RAWIO */
3551         do_exit += check_for_cap_sys_rawio();
3552
3553         /* test file permissions */
3554         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3555         if (euidaccess(pathname, R_OK)) {
3556                 do_exit++;
3557                 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3558         }
3559
3560         /* if all else fails, thell them to be root */
3561         if (do_exit)
3562                 if (getuid() != 0)
3563                         warnx("... or simply run as root");
3564
3565         if (do_exit)
3566                 exit(-6);
3567 }
3568
3569 /*
3570  * NHM adds support for additional MSRs:
3571  *
3572  * MSR_SMI_COUNT                   0x00000034
3573  *
3574  * MSR_PLATFORM_INFO               0x000000ce
3575  * MSR_PKG_CST_CONFIG_CONTROL     0x000000e2
3576  *
3577  * MSR_MISC_PWR_MGMT               0x000001aa
3578  *
3579  * MSR_PKG_C3_RESIDENCY            0x000003f8
3580  * MSR_PKG_C6_RESIDENCY            0x000003f9
3581  * MSR_CORE_C3_RESIDENCY           0x000003fc
3582  * MSR_CORE_C6_RESIDENCY           0x000003fd
3583  *
3584  * Side effect:
3585  * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3586  * sets has_misc_feature_control
3587  */
3588 int probe_nhm_msrs(unsigned int family, unsigned int model)
3589 {
3590         unsigned long long msr;
3591         unsigned int base_ratio;
3592         int *pkg_cstate_limits;
3593
3594         if (!genuine_intel)
3595                 return 0;
3596
3597         if (family != 6)
3598                 return 0;
3599
3600         bclk = discover_bclk(family, model);
3601
3602         switch (model) {
3603         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3604         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3605                 pkg_cstate_limits = nhm_pkg_cstate_limits;
3606                 break;
3607         case INTEL_FAM6_SANDYBRIDGE:    /* SNB */
3608         case INTEL_FAM6_SANDYBRIDGE_X:  /* SNB Xeon */
3609         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3610         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3611                 pkg_cstate_limits = snb_pkg_cstate_limits;
3612                 has_misc_feature_control = 1;
3613                 break;
3614         case INTEL_FAM6_HASWELL:        /* HSW */
3615         case INTEL_FAM6_HASWELL_G:      /* HSW */
3616         case INTEL_FAM6_HASWELL_X:      /* HSX */
3617         case INTEL_FAM6_HASWELL_L:      /* HSW */
3618         case INTEL_FAM6_BROADWELL:      /* BDW */
3619         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3620         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3621         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3622         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3623                 pkg_cstate_limits = hsw_pkg_cstate_limits;
3624                 has_misc_feature_control = 1;
3625                 break;
3626         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3627                 pkg_cstate_limits = skx_pkg_cstate_limits;
3628                 has_misc_feature_control = 1;
3629                 break;
3630         case INTEL_FAM6_ICELAKE_X:      /* ICX */
3631                 pkg_cstate_limits = icx_pkg_cstate_limits;
3632                 has_misc_feature_control = 1;
3633                 break;
3634         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3635                 no_MSR_MISC_PWR_MGMT = 1;
3636         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
3637                 pkg_cstate_limits = slv_pkg_cstate_limits;
3638                 break;
3639         case INTEL_FAM6_ATOM_AIRMONT:   /* AMT */
3640                 pkg_cstate_limits = amt_pkg_cstate_limits;
3641                 no_MSR_MISC_PWR_MGMT = 1;
3642                 break;
3643         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI */
3644                 pkg_cstate_limits = phi_pkg_cstate_limits;
3645                 break;
3646         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3647         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3648         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
3649         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
3650         case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
3651                 pkg_cstate_limits = glm_pkg_cstate_limits;
3652                 break;
3653         default:
3654                 return 0;
3655         }
3656         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3657         pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3658
3659         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3660         base_ratio = (msr >> 8) & 0xFF;
3661
3662         base_hz = base_ratio * bclk * 1000000;
3663         has_base_hz = 1;
3664         return 1;
3665 }
3666 /*
3667  * SLV client has support for unique MSRs:
3668  *
3669  * MSR_CC6_DEMOTION_POLICY_CONFIG
3670  * MSR_MC6_DEMOTION_POLICY_CONFIG
3671  */
3672
3673 int has_slv_msrs(unsigned int family, unsigned int model)
3674 {
3675         if (!genuine_intel)
3676                 return 0;
3677
3678         switch (model) {
3679         case INTEL_FAM6_ATOM_SILVERMONT:
3680         case INTEL_FAM6_ATOM_SILVERMONT_MID:
3681         case INTEL_FAM6_ATOM_AIRMONT_MID:
3682                 return 1;
3683         }
3684         return 0;
3685 }
3686 int is_dnv(unsigned int family, unsigned int model)
3687 {
3688
3689         if (!genuine_intel)
3690                 return 0;
3691
3692         switch (model) {
3693         case INTEL_FAM6_ATOM_GOLDMONT_D:
3694                 return 1;
3695         }
3696         return 0;
3697 }
3698 int is_bdx(unsigned int family, unsigned int model)
3699 {
3700
3701         if (!genuine_intel)
3702                 return 0;
3703
3704         switch (model) {
3705         case INTEL_FAM6_BROADWELL_X:
3706                 return 1;
3707         }
3708         return 0;
3709 }
3710 int is_skx(unsigned int family, unsigned int model)
3711 {
3712
3713         if (!genuine_intel)
3714                 return 0;
3715
3716         switch (model) {
3717         case INTEL_FAM6_SKYLAKE_X:
3718                 return 1;
3719         }
3720         return 0;
3721 }
3722
3723 int is_icx(unsigned int family, unsigned int model)
3724 {
3725
3726         if (!genuine_intel)
3727                 return 0;
3728
3729         switch (model) {
3730         case INTEL_FAM6_ICELAKE_X:
3731                 return 1;
3732         }
3733         return 0;
3734 }
3735
3736 int is_ehl(unsigned int family, unsigned int model)
3737 {
3738         if (!genuine_intel)
3739                 return 0;
3740
3741         switch (model) {
3742         case INTEL_FAM6_ATOM_TREMONT:
3743                 return 1;
3744         }
3745         return 0;
3746 }
3747 int is_jvl(unsigned int family, unsigned int model)
3748 {
3749         if (!genuine_intel)
3750                 return 0;
3751
3752         switch (model) {
3753         case INTEL_FAM6_ATOM_TREMONT_D:
3754                 return 1;
3755         }
3756         return 0;
3757 }
3758
3759 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3760 {
3761         if (has_slv_msrs(family, model))
3762                 return 0;
3763
3764         switch (model) {
3765         /* Nehalem compatible, but do not include turbo-ratio limit support */
3766         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3767         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI - Knights Landing (different MSR definition) */
3768                 return 0;
3769         default:
3770                 return 1;
3771         }
3772 }
3773 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3774 {
3775         if (has_slv_msrs(family, model))
3776                 return 1;
3777
3778         return 0;
3779 }
3780 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3781 {
3782         if (!genuine_intel)
3783                 return 0;
3784
3785         if (family != 6)
3786                 return 0;
3787
3788         switch (model) {
3789         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3790         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3791                 return 1;
3792         default:
3793                 return 0;
3794         }
3795 }
3796 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3797 {
3798         if (!genuine_intel)
3799                 return 0;
3800
3801         if (family != 6)
3802                 return 0;
3803
3804         switch (model) {
3805         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3806                 return 1;
3807         default:
3808                 return 0;
3809         }
3810 }
3811
3812 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3813 {
3814         if (!genuine_intel)
3815                 return 0;
3816
3817         if (family != 6)
3818                 return 0;
3819
3820         switch (model) {
3821         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3822                 return 1;
3823         default:
3824                 return 0;
3825         }
3826 }
3827 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3828 {
3829         if (!genuine_intel)
3830                 return 0;
3831
3832         if (family != 6)
3833                 return 0;
3834
3835         switch (model) {
3836         case INTEL_FAM6_ATOM_GOLDMONT:
3837         case INTEL_FAM6_SKYLAKE_X:
3838         case INTEL_FAM6_ICELAKE_X:
3839                 return 1;
3840         default:
3841                 return 0;
3842         }
3843 }
3844 int has_config_tdp(unsigned int family, unsigned int model)
3845 {
3846         if (!genuine_intel)
3847                 return 0;
3848
3849         if (family != 6)
3850                 return 0;
3851
3852         switch (model) {
3853         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3854         case INTEL_FAM6_HASWELL:        /* HSW */
3855         case INTEL_FAM6_HASWELL_X:      /* HSX */
3856         case INTEL_FAM6_HASWELL_L:      /* HSW */
3857         case INTEL_FAM6_HASWELL_G:      /* HSW */
3858         case INTEL_FAM6_BROADWELL:      /* BDW */
3859         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3860         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3861         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3862         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3863         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3864         case INTEL_FAM6_ICELAKE_X:      /* ICX */
3865
3866         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3867                 return 1;
3868         default:
3869                 return 0;
3870         }
3871 }
3872
3873 static void
3874 remove_underbar(char *s)
3875 {
3876         char *to = s;
3877
3878         while (*s) {
3879                 if (*s != '_')
3880                         *to++ = *s;
3881                 s++;
3882         }
3883
3884         *to = 0;
3885 }
3886
3887 static void
3888 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3889 {
3890         if (!do_nhm_platform_info)
3891                 return;
3892
3893         dump_nhm_platform_info();
3894
3895         if (has_hsw_turbo_ratio_limit(family, model))
3896                 dump_hsw_turbo_ratio_limits();
3897
3898         if (has_ivt_turbo_ratio_limit(family, model))
3899                 dump_ivt_turbo_ratio_limits();
3900
3901         if (has_turbo_ratio_limit(family, model))
3902                 dump_turbo_ratio_limits(family, model);
3903
3904         if (has_atom_turbo_ratio_limit(family, model))
3905                 dump_atom_turbo_ratio_limits();
3906
3907         if (has_knl_turbo_ratio_limit(family, model))
3908                 dump_knl_turbo_ratio_limits();
3909
3910         if (has_config_tdp(family, model))
3911                 dump_config_tdp();
3912
3913         dump_nhm_cst_cfg();
3914 }
3915
3916 static void dump_sysfs_file(char *path)
3917 {
3918         FILE *input;
3919         char cpuidle_buf[64];
3920
3921         input = fopen(path, "r");
3922         if (input == NULL) {
3923                 if (debug)
3924                         fprintf(outf, "NSFOD %s\n", path);
3925                 return;
3926         }
3927         if (!fgets(cpuidle_buf, sizeof(cpuidle_buf), input))
3928                 err(1, "%s: failed to read file", path);
3929         fclose(input);
3930
3931         fprintf(outf, "%s: %s", strrchr(path, '/') + 1, cpuidle_buf);
3932 }
3933 static void
3934 dump_sysfs_cstate_config(void)
3935 {
3936         char path[64];
3937         char name_buf[16];
3938         char desc[64];
3939         FILE *input;
3940         int state;
3941         char *sp;
3942
3943         if (access("/sys/devices/system/cpu/cpuidle", R_OK)) {
3944                 fprintf(outf, "cpuidle not loaded\n");
3945                 return;
3946         }
3947
3948         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_driver");
3949         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor");
3950         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor_ro");
3951
3952         for (state = 0; state < 10; ++state) {
3953
3954                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3955                         base_cpu, state);
3956                 input = fopen(path, "r");
3957                 if (input == NULL)
3958                         continue;
3959                 if (!fgets(name_buf, sizeof(name_buf), input))
3960                         err(1, "%s: failed to read file", path);
3961
3962                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3963                 sp = strchr(name_buf, '-');
3964                 if (!sp)
3965                         sp = strchrnul(name_buf, '\n');
3966                 *sp = '\0';
3967                 fclose(input);
3968
3969                 remove_underbar(name_buf);
3970
3971                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3972                         base_cpu, state);
3973                 input = fopen(path, "r");
3974                 if (input == NULL)
3975                         continue;
3976                 if (!fgets(desc, sizeof(desc), input))
3977                         err(1, "%s: failed to read file", path);
3978
3979                 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3980                 fclose(input);
3981         }
3982 }
3983 static void
3984 dump_sysfs_pstate_config(void)
3985 {
3986         char path[64];
3987         char driver_buf[64];
3988         char governor_buf[64];
3989         FILE *input;
3990         int turbo;
3991
3992         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3993                         base_cpu);
3994         input = fopen(path, "r");
3995         if (input == NULL) {
3996                 fprintf(outf, "NSFOD %s\n", path);
3997                 return;
3998         }
3999         if (!fgets(driver_buf, sizeof(driver_buf), input))
4000                 err(1, "%s: failed to read file", path);
4001         fclose(input);
4002
4003         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
4004                         base_cpu);
4005         input = fopen(path, "r");
4006         if (input == NULL) {
4007                 fprintf(outf, "NSFOD %s\n", path);
4008                 return;
4009         }
4010         if (!fgets(governor_buf, sizeof(governor_buf), input))
4011                 err(1, "%s: failed to read file", path);
4012         fclose(input);
4013
4014         fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
4015         fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
4016
4017         sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
4018         input = fopen(path, "r");
4019         if (input != NULL) {
4020                 if (fscanf(input, "%d", &turbo) != 1)
4021                         err(1, "%s: failed to parse number from file", path);
4022                 fprintf(outf, "cpufreq boost: %d\n", turbo);
4023                 fclose(input);
4024         }
4025
4026         sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
4027         input = fopen(path, "r");
4028         if (input != NULL) {
4029                 if (fscanf(input, "%d", &turbo) != 1)
4030                         err(1, "%s: failed to parse number from file", path);
4031                 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
4032                 fclose(input);
4033         }
4034 }
4035
4036
4037 /*
4038  * print_epb()
4039  * Decode the ENERGY_PERF_BIAS MSR
4040  */
4041 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4042 {
4043         char *epb_string;
4044         int cpu, epb;
4045
4046         if (!has_epb)
4047                 return 0;
4048
4049         cpu = t->cpu_id;
4050
4051         /* EPB is per-package */
4052         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4053                 return 0;
4054
4055         if (cpu_migrate(cpu)) {
4056                 fprintf(outf, "print_epb: Could not migrate to CPU %d\n", cpu);
4057                 return -1;
4058         }
4059
4060         epb = get_epb(cpu);
4061         if (epb < 0)
4062                 return 0;
4063
4064         switch (epb) {
4065         case ENERGY_PERF_BIAS_PERFORMANCE:
4066                 epb_string = "performance";
4067                 break;
4068         case ENERGY_PERF_BIAS_NORMAL:
4069                 epb_string = "balanced";
4070                 break;
4071         case ENERGY_PERF_BIAS_POWERSAVE:
4072                 epb_string = "powersave";
4073                 break;
4074         default:
4075                 epb_string = "custom";
4076                 break;
4077         }
4078         fprintf(outf, "cpu%d: EPB: %d (%s)\n", cpu, epb, epb_string);
4079
4080         return 0;
4081 }
4082 /*
4083  * print_hwp()
4084  * Decode the MSR_HWP_CAPABILITIES
4085  */
4086 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4087 {
4088         unsigned long long msr;
4089         int cpu;
4090
4091         if (!has_hwp)
4092                 return 0;
4093
4094         cpu = t->cpu_id;
4095
4096         /* MSR_HWP_CAPABILITIES is per-package */
4097         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4098                 return 0;
4099
4100         if (cpu_migrate(cpu)) {
4101                 fprintf(outf, "print_hwp: Could not migrate to CPU %d\n", cpu);
4102                 return -1;
4103         }
4104
4105         if (get_msr(cpu, MSR_PM_ENABLE, &msr))
4106                 return 0;
4107
4108         fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
4109                 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
4110
4111         /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
4112         if ((msr & (1 << 0)) == 0)
4113                 return 0;
4114
4115         if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
4116                 return 0;
4117
4118         fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
4119                         "(high %d guar %d eff %d low %d)\n",
4120                         cpu, msr,
4121                         (unsigned int)HWP_HIGHEST_PERF(msr),
4122                         (unsigned int)HWP_GUARANTEED_PERF(msr),
4123                         (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
4124                         (unsigned int)HWP_LOWEST_PERF(msr));
4125
4126         if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
4127                 return 0;
4128
4129         fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
4130                         "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
4131                         cpu, msr,
4132                         (unsigned int)(((msr) >> 0) & 0xff),
4133                         (unsigned int)(((msr) >> 8) & 0xff),
4134                         (unsigned int)(((msr) >> 16) & 0xff),
4135                         (unsigned int)(((msr) >> 24) & 0xff),
4136                         (unsigned int)(((msr) >> 32) & 0xff3),
4137                         (unsigned int)(((msr) >> 42) & 0x1));
4138
4139         if (has_hwp_pkg) {
4140                 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
4141                         return 0;
4142
4143                 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
4144                         "(min %d max %d des %d epp 0x%x window 0x%x)\n",
4145                         cpu, msr,
4146                         (unsigned int)(((msr) >> 0) & 0xff),
4147                         (unsigned int)(((msr) >> 8) & 0xff),
4148                         (unsigned int)(((msr) >> 16) & 0xff),
4149                         (unsigned int)(((msr) >> 24) & 0xff),
4150                         (unsigned int)(((msr) >> 32) & 0xff3));
4151         }
4152         if (has_hwp_notify) {
4153                 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
4154                         return 0;
4155
4156                 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
4157                         "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
4158                         cpu, msr,
4159                         ((msr) & 0x1) ? "EN" : "Dis",
4160                         ((msr) & 0x2) ? "EN" : "Dis");
4161         }
4162         if (get_msr(cpu, MSR_HWP_STATUS, &msr))
4163                 return 0;
4164
4165         fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
4166                         "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
4167                         cpu, msr,
4168                         ((msr) & 0x1) ? "" : "No-",
4169                         ((msr) & 0x2) ? "" : "No-");
4170
4171         return 0;
4172 }
4173
4174 /*
4175  * print_perf_limit()
4176  */
4177 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4178 {
4179         unsigned long long msr;
4180         int cpu;
4181
4182         cpu = t->cpu_id;
4183
4184         /* per-package */
4185         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4186                 return 0;
4187
4188         if (cpu_migrate(cpu)) {
4189                 fprintf(outf, "print_perf_limit: Could not migrate to CPU %d\n", cpu);
4190                 return -1;
4191         }
4192
4193         if (do_core_perf_limit_reasons) {
4194                 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
4195                 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4196                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
4197                         (msr & 1 << 15) ? "bit15, " : "",
4198                         (msr & 1 << 14) ? "bit14, " : "",
4199                         (msr & 1 << 13) ? "Transitions, " : "",
4200                         (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
4201                         (msr & 1 << 11) ? "PkgPwrL2, " : "",
4202                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4203                         (msr & 1 << 9) ? "CorePwr, " : "",
4204                         (msr & 1 << 8) ? "Amps, " : "",
4205                         (msr & 1 << 6) ? "VR-Therm, " : "",
4206                         (msr & 1 << 5) ? "Auto-HWP, " : "",
4207                         (msr & 1 << 4) ? "Graphics, " : "",
4208                         (msr & 1 << 2) ? "bit2, " : "",
4209                         (msr & 1 << 1) ? "ThermStatus, " : "",
4210                         (msr & 1 << 0) ? "PROCHOT, " : "");
4211                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
4212                         (msr & 1 << 31) ? "bit31, " : "",
4213                         (msr & 1 << 30) ? "bit30, " : "",
4214                         (msr & 1 << 29) ? "Transitions, " : "",
4215                         (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
4216                         (msr & 1 << 27) ? "PkgPwrL2, " : "",
4217                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4218                         (msr & 1 << 25) ? "CorePwr, " : "",
4219                         (msr & 1 << 24) ? "Amps, " : "",
4220                         (msr & 1 << 22) ? "VR-Therm, " : "",
4221                         (msr & 1 << 21) ? "Auto-HWP, " : "",
4222                         (msr & 1 << 20) ? "Graphics, " : "",
4223                         (msr & 1 << 18) ? "bit18, " : "",
4224                         (msr & 1 << 17) ? "ThermStatus, " : "",
4225                         (msr & 1 << 16) ? "PROCHOT, " : "");
4226
4227         }
4228         if (do_gfx_perf_limit_reasons) {
4229                 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
4230                 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4231                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
4232                         (msr & 1 << 0) ? "PROCHOT, " : "",
4233                         (msr & 1 << 1) ? "ThermStatus, " : "",
4234                         (msr & 1 << 4) ? "Graphics, " : "",
4235                         (msr & 1 << 6) ? "VR-Therm, " : "",
4236                         (msr & 1 << 8) ? "Amps, " : "",
4237                         (msr & 1 << 9) ? "GFXPwr, " : "",
4238                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4239                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
4240                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
4241                         (msr & 1 << 16) ? "PROCHOT, " : "",
4242                         (msr & 1 << 17) ? "ThermStatus, " : "",
4243                         (msr & 1 << 20) ? "Graphics, " : "",
4244                         (msr & 1 << 22) ? "VR-Therm, " : "",
4245                         (msr & 1 << 24) ? "Amps, " : "",
4246                         (msr & 1 << 25) ? "GFXPwr, " : "",
4247                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4248                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
4249         }
4250         if (do_ring_perf_limit_reasons) {
4251                 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
4252                 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4253                 fprintf(outf, " (Active: %s%s%s%s%s%s)",
4254                         (msr & 1 << 0) ? "PROCHOT, " : "",
4255                         (msr & 1 << 1) ? "ThermStatus, " : "",
4256                         (msr & 1 << 6) ? "VR-Therm, " : "",
4257                         (msr & 1 << 8) ? "Amps, " : "",
4258                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4259                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
4260                 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
4261                         (msr & 1 << 16) ? "PROCHOT, " : "",
4262                         (msr & 1 << 17) ? "ThermStatus, " : "",
4263                         (msr & 1 << 22) ? "VR-Therm, " : "",
4264                         (msr & 1 << 24) ? "Amps, " : "",
4265                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4266                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
4267         }
4268         return 0;
4269 }
4270
4271 #define RAPL_POWER_GRANULARITY  0x7FFF  /* 15 bit power granularity */
4272 #define RAPL_TIME_GRANULARITY   0x3F /* 6 bit time granularity */
4273
4274 double get_tdp_intel(unsigned int model)
4275 {
4276         unsigned long long msr;
4277
4278         if (do_rapl & RAPL_PKG_POWER_INFO)
4279                 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
4280                         return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
4281
4282         switch (model) {
4283         case INTEL_FAM6_ATOM_SILVERMONT:
4284         case INTEL_FAM6_ATOM_SILVERMONT_D:
4285                 return 30.0;
4286         default:
4287                 return 135.0;
4288         }
4289 }
4290
4291 double get_tdp_amd(unsigned int family)
4292 {
4293         /* This is the max stock TDP of HEDT/Server Fam17h+ chips */
4294         return 280.0;
4295 }
4296
4297 /*
4298  * rapl_dram_energy_units_probe()
4299  * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
4300  */
4301 static double
4302 rapl_dram_energy_units_probe(int  model, double rapl_energy_units)
4303 {
4304         /* only called for genuine_intel, family 6 */
4305
4306         switch (model) {
4307         case INTEL_FAM6_HASWELL_X:      /* HSX */
4308         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4309         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4310         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4311                 return (rapl_dram_energy_units = 15.3 / 1000000);
4312         default:
4313                 return (rapl_energy_units);
4314         }
4315 }
4316
4317 void rapl_probe_intel(unsigned int family, unsigned int model)
4318 {
4319         unsigned long long msr;
4320         unsigned int time_unit;
4321         double tdp;
4322
4323         if (family != 6)
4324                 return;
4325
4326         switch (model) {
4327         case INTEL_FAM6_SANDYBRIDGE:
4328         case INTEL_FAM6_IVYBRIDGE:
4329         case INTEL_FAM6_HASWELL:        /* HSW */
4330         case INTEL_FAM6_HASWELL_L:      /* HSW */
4331         case INTEL_FAM6_HASWELL_G:      /* HSW */
4332         case INTEL_FAM6_BROADWELL:      /* BDW */
4333         case INTEL_FAM6_BROADWELL_G:    /* BDW */
4334                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
4335                 if (rapl_joules) {
4336                         BIC_PRESENT(BIC_Pkg_J);
4337                         BIC_PRESENT(BIC_Cor_J);
4338                         BIC_PRESENT(BIC_GFX_J);
4339                 } else {
4340                         BIC_PRESENT(BIC_PkgWatt);
4341                         BIC_PRESENT(BIC_CorWatt);
4342                         BIC_PRESENT(BIC_GFXWatt);
4343                 }
4344                 break;
4345         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4346         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4347                 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
4348                 if (rapl_joules)
4349                         BIC_PRESENT(BIC_Pkg_J);
4350                 else
4351                         BIC_PRESENT(BIC_PkgWatt);
4352                 break;
4353         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
4354                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4355                 if (rapl_joules) {
4356                         BIC_PRESENT(BIC_Pkg_J);
4357                         BIC_PRESENT(BIC_Cor_J);
4358                         BIC_PRESENT(BIC_RAM_J);
4359                         BIC_PRESENT(BIC_GFX_J);
4360                 } else {
4361                         BIC_PRESENT(BIC_PkgWatt);
4362                         BIC_PRESENT(BIC_CorWatt);
4363                         BIC_PRESENT(BIC_RAMWatt);
4364                         BIC_PRESENT(BIC_GFXWatt);
4365                 }
4366                 break;
4367         case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
4368                 do_rapl = RAPL_PKG | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4369                 BIC_PRESENT(BIC_PKG__);
4370                 if (rapl_joules)
4371                         BIC_PRESENT(BIC_Pkg_J);
4372                 else
4373                         BIC_PRESENT(BIC_PkgWatt);
4374                 break;
4375         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4376         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4377                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4378                 BIC_PRESENT(BIC_PKG__);
4379                 BIC_PRESENT(BIC_RAM__);
4380                 if (rapl_joules) {
4381                         BIC_PRESENT(BIC_Pkg_J);
4382                         BIC_PRESENT(BIC_Cor_J);
4383                         BIC_PRESENT(BIC_RAM_J);
4384                         BIC_PRESENT(BIC_GFX_J);
4385                 } else {
4386                         BIC_PRESENT(BIC_PkgWatt);
4387                         BIC_PRESENT(BIC_CorWatt);
4388                         BIC_PRESENT(BIC_RAMWatt);
4389                         BIC_PRESENT(BIC_GFXWatt);
4390                 }
4391                 break;
4392         case INTEL_FAM6_HASWELL_X:      /* HSX */
4393         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4394         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4395         case INTEL_FAM6_ICELAKE_X:      /* ICX */
4396         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4397                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4398                 BIC_PRESENT(BIC_PKG__);
4399                 BIC_PRESENT(BIC_RAM__);
4400                 if (rapl_joules) {
4401                         BIC_PRESENT(BIC_Pkg_J);
4402                         BIC_PRESENT(BIC_RAM_J);
4403                 } else {
4404                         BIC_PRESENT(BIC_PkgWatt);
4405                         BIC_PRESENT(BIC_RAMWatt);
4406                 }
4407                 break;
4408         case INTEL_FAM6_SANDYBRIDGE_X:
4409         case INTEL_FAM6_IVYBRIDGE_X:
4410                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
4411                 BIC_PRESENT(BIC_PKG__);
4412                 BIC_PRESENT(BIC_RAM__);
4413                 if (rapl_joules) {
4414                         BIC_PRESENT(BIC_Pkg_J);
4415                         BIC_PRESENT(BIC_Cor_J);
4416                         BIC_PRESENT(BIC_RAM_J);
4417                 } else {
4418                         BIC_PRESENT(BIC_PkgWatt);
4419                         BIC_PRESENT(BIC_CorWatt);
4420                         BIC_PRESENT(BIC_RAMWatt);
4421                 }
4422                 break;
4423         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4424         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4425                 do_rapl = RAPL_PKG | RAPL_CORES;
4426                 if (rapl_joules) {
4427                         BIC_PRESENT(BIC_Pkg_J);
4428                         BIC_PRESENT(BIC_Cor_J);
4429                 } else {
4430                         BIC_PRESENT(BIC_PkgWatt);
4431                         BIC_PRESENT(BIC_CorWatt);
4432                 }
4433                 break;
4434         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4435                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
4436                 BIC_PRESENT(BIC_PKG__);
4437                 BIC_PRESENT(BIC_RAM__);
4438                 if (rapl_joules) {
4439                         BIC_PRESENT(BIC_Pkg_J);
4440                         BIC_PRESENT(BIC_Cor_J);
4441                         BIC_PRESENT(BIC_RAM_J);
4442                 } else {
4443                         BIC_PRESENT(BIC_PkgWatt);
4444                         BIC_PRESENT(BIC_CorWatt);
4445                         BIC_PRESENT(BIC_RAMWatt);
4446                 }
4447                 break;
4448         default:
4449                 return;
4450         }
4451
4452         /* units on package 0, verify later other packages match */
4453         if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
4454                 return;
4455
4456         rapl_power_units = 1.0 / (1 << (msr & 0xF));
4457         if (model == INTEL_FAM6_ATOM_SILVERMONT)
4458                 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
4459         else
4460                 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
4461
4462         rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
4463
4464         time_unit = msr >> 16 & 0xF;
4465         if (time_unit == 0)
4466                 time_unit = 0xA;
4467
4468         rapl_time_units = 1.0 / (1 << (time_unit));
4469
4470         tdp = get_tdp_intel(model);
4471
4472         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4473         if (!quiet)
4474                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4475 }
4476
4477 void rapl_probe_amd(unsigned int family, unsigned int model)
4478 {
4479         unsigned long long msr;
4480         unsigned int eax, ebx, ecx, edx;
4481         unsigned int has_rapl = 0;
4482         double tdp;
4483
4484         if (max_extended_level >= 0x80000007) {
4485                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4486                 /* RAPL (Fam 17h+) */
4487                 has_rapl = edx & (1 << 14);
4488         }
4489
4490         if (!has_rapl || family < 0x17)
4491                 return;
4492
4493         do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
4494         if (rapl_joules) {
4495                 BIC_PRESENT(BIC_Pkg_J);
4496                 BIC_PRESENT(BIC_Cor_J);
4497         } else {
4498                 BIC_PRESENT(BIC_PkgWatt);
4499                 BIC_PRESENT(BIC_CorWatt);
4500         }
4501
4502         if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4503                 return;
4504
4505         rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4506         rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4507         rapl_power_units = ldexp(1.0, -(msr & 0xf));
4508
4509         tdp = get_tdp_amd(family);
4510
4511         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4512         if (!quiet)
4513                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4514 }
4515
4516 /*
4517  * rapl_probe()
4518  *
4519  * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4520  */
4521 void rapl_probe(unsigned int family, unsigned int model)
4522 {
4523         if (genuine_intel)
4524                 rapl_probe_intel(family, model);
4525         if (authentic_amd || hygon_genuine)
4526                 rapl_probe_amd(family, model);
4527 }
4528
4529 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
4530 {
4531         if (!genuine_intel)
4532                 return;
4533
4534         if (family != 6)
4535                 return;
4536
4537         switch (model) {
4538         case INTEL_FAM6_HASWELL:        /* HSW */
4539         case INTEL_FAM6_HASWELL_L:      /* HSW */
4540         case INTEL_FAM6_HASWELL_G:      /* HSW */
4541                 do_gfx_perf_limit_reasons = 1;
4542         case INTEL_FAM6_HASWELL_X:      /* HSX */
4543                 do_core_perf_limit_reasons = 1;
4544                 do_ring_perf_limit_reasons = 1;
4545         default:
4546                 return;
4547         }
4548 }
4549
4550 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4551 {
4552         if (is_skx(family, model) || is_bdx(family, model) ||
4553             is_icx(family, model))
4554                 has_automatic_cstate_conversion = 1;
4555 }
4556
4557 void prewake_cstate_probe(unsigned int family, unsigned int model)
4558 {
4559         if (is_icx(family, model))
4560                 dis_cstate_prewake = 1;
4561 }
4562
4563 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4564 {
4565         unsigned long long msr;
4566         unsigned int dts, dts2;
4567         int cpu;
4568
4569         if (!(do_dts || do_ptm))
4570                 return 0;
4571
4572         cpu = t->cpu_id;
4573
4574         /* DTS is per-core, no need to print for each thread */
4575         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
4576                 return 0;
4577
4578         if (cpu_migrate(cpu)) {
4579                 fprintf(outf, "print_thermal: Could not migrate to CPU %d\n", cpu);
4580                 return -1;
4581         }
4582
4583         if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4584                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4585                         return 0;
4586
4587                 dts = (msr >> 16) & 0x7F;
4588                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4589                         cpu, msr, tcc_activation_temp - dts);
4590
4591                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4592                         return 0;
4593
4594                 dts = (msr >> 16) & 0x7F;
4595                 dts2 = (msr >> 8) & 0x7F;
4596                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4597                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4598         }
4599
4600
4601         if (do_dts && debug) {
4602                 unsigned int resolution;
4603
4604                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4605                         return 0;
4606
4607                 dts = (msr >> 16) & 0x7F;
4608                 resolution = (msr >> 27) & 0xF;
4609                 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4610                         cpu, msr, tcc_activation_temp - dts, resolution);
4611
4612                 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4613                         return 0;
4614
4615                 dts = (msr >> 16) & 0x7F;
4616                 dts2 = (msr >> 8) & 0x7F;
4617                 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4618                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4619         }
4620
4621         return 0;
4622 }
4623
4624 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4625 {
4626         fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
4627                 cpu, label,
4628                 ((msr >> 15) & 1) ? "EN" : "DIS",
4629                 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4630                 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4631                 (((msr >> 16) & 1) ? "EN" : "DIS"));
4632
4633         return;
4634 }
4635
4636 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4637 {
4638         unsigned long long msr;
4639         const char *msr_name;
4640         int cpu;
4641
4642         if (!do_rapl)
4643                 return 0;
4644
4645         /* RAPL counters are per package, so print only for 1st thread/package */
4646         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4647                 return 0;
4648
4649         cpu = t->cpu_id;
4650         if (cpu_migrate(cpu)) {
4651                 fprintf(outf, "print_rapl: Could not migrate to CPU %d\n", cpu);
4652                 return -1;
4653         }
4654
4655         if (do_rapl & RAPL_AMD_F17H) {
4656                 msr_name = "MSR_RAPL_PWR_UNIT";
4657                 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4658                         return -1;
4659         } else {
4660                 msr_name = "MSR_RAPL_POWER_UNIT";
4661                 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4662                         return -1;
4663         }
4664
4665         fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
4666                 rapl_power_units, rapl_energy_units, rapl_time_units);
4667
4668         if (do_rapl & RAPL_PKG_POWER_INFO) {
4669
4670                 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4671                         return -5;
4672
4673
4674                 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4675                         cpu, msr,
4676                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4677                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4678                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4679                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4680
4681         }
4682         if (do_rapl & RAPL_PKG) {
4683
4684                 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4685                         return -9;
4686
4687                 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
4688                         cpu, msr, (msr >> 63) & 1 ? "" : "UN");
4689
4690                 print_power_limit_msr(cpu, msr, "PKG Limit #1");
4691                 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
4692                         cpu,
4693                         ((msr >> 47) & 1) ? "EN" : "DIS",
4694                         ((msr >> 32) & 0x7FFF) * rapl_power_units,
4695                         (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4696                         ((msr >> 48) & 1) ? "EN" : "DIS");
4697         }
4698
4699         if (do_rapl & RAPL_DRAM_POWER_INFO) {
4700                 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4701                         return -6;
4702
4703                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4704                         cpu, msr,
4705                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4706                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4707                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4708                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4709         }
4710         if (do_rapl & RAPL_DRAM) {
4711                 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4712                         return -9;
4713                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4714                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4715
4716                 print_power_limit_msr(cpu, msr, "DRAM Limit");
4717         }
4718         if (do_rapl & RAPL_CORE_POLICY) {
4719                 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4720                         return -7;
4721
4722                 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4723         }
4724         if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4725                 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4726                         return -9;
4727                 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4728                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4729                 print_power_limit_msr(cpu, msr, "Cores Limit");
4730         }
4731         if (do_rapl & RAPL_GFX) {
4732                 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4733                         return -8;
4734
4735                 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4736
4737                 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4738                         return -9;
4739                 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4740                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4741                 print_power_limit_msr(cpu, msr, "GFX Limit");
4742         }
4743         return 0;
4744 }
4745
4746 /*
4747  * SNB adds support for additional MSRs:
4748  *
4749  * MSR_PKG_C7_RESIDENCY            0x000003fa
4750  * MSR_CORE_C7_RESIDENCY           0x000003fe
4751  * MSR_PKG_C2_RESIDENCY            0x0000060d
4752  */
4753
4754 int has_snb_msrs(unsigned int family, unsigned int model)
4755 {
4756         if (!genuine_intel)
4757                 return 0;
4758
4759         switch (model) {
4760         case INTEL_FAM6_SANDYBRIDGE:
4761         case INTEL_FAM6_SANDYBRIDGE_X:
4762         case INTEL_FAM6_IVYBRIDGE:              /* IVB */
4763         case INTEL_FAM6_IVYBRIDGE_X:            /* IVB Xeon */
4764         case INTEL_FAM6_HASWELL:                /* HSW */
4765         case INTEL_FAM6_HASWELL_X:              /* HSW */
4766         case INTEL_FAM6_HASWELL_L:              /* HSW */
4767         case INTEL_FAM6_HASWELL_G:              /* HSW */
4768         case INTEL_FAM6_BROADWELL:              /* BDW */
4769         case INTEL_FAM6_BROADWELL_G:            /* BDW */
4770         case INTEL_FAM6_BROADWELL_X:            /* BDX */
4771         case INTEL_FAM6_SKYLAKE_L:              /* SKL */
4772         case INTEL_FAM6_CANNONLAKE_L:           /* CNL */
4773         case INTEL_FAM6_SKYLAKE_X:              /* SKX */
4774         case INTEL_FAM6_ICELAKE_X:              /* ICX */
4775         case INTEL_FAM6_ATOM_GOLDMONT:          /* BXT */
4776         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4777         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4778         case INTEL_FAM6_ATOM_TREMONT:           /* EHL */
4779         case INTEL_FAM6_ATOM_TREMONT_D:         /* JVL */
4780                 return 1;
4781         }
4782         return 0;
4783 }
4784
4785 /*
4786  * HSW ULT added support for C8/C9/C10 MSRs:
4787  *
4788  * MSR_PKG_C8_RESIDENCY         0x00000630
4789  * MSR_PKG_C9_RESIDENCY         0x00000631
4790  * MSR_PKG_C10_RESIDENCY        0x00000632
4791  *
4792  * MSR_PKGC8_IRTL               0x00000633
4793  * MSR_PKGC9_IRTL               0x00000634
4794  * MSR_PKGC10_IRTL              0x00000635
4795  *
4796  */
4797 int has_c8910_msrs(unsigned int family, unsigned int model)
4798 {
4799         if (!genuine_intel)
4800                 return 0;
4801
4802         switch (model) {
4803         case INTEL_FAM6_HASWELL_L:      /* HSW */
4804         case INTEL_FAM6_BROADWELL:      /* BDW */
4805         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4806         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4807         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4808         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4809         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
4810                 return 1;
4811         }
4812         return 0;
4813 }
4814
4815 /*
4816  * SKL adds support for additional MSRS:
4817  *
4818  * MSR_PKG_WEIGHTED_CORE_C0_RES    0x00000658
4819  * MSR_PKG_ANY_CORE_C0_RES         0x00000659
4820  * MSR_PKG_ANY_GFXE_C0_RES         0x0000065A
4821  * MSR_PKG_BOTH_CORE_GFXE_C0_RES   0x0000065B
4822  */
4823 int has_skl_msrs(unsigned int family, unsigned int model)
4824 {
4825         if (!genuine_intel)
4826                 return 0;
4827
4828         switch (model) {
4829         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4830         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4831                 return 1;
4832         }
4833         return 0;
4834 }
4835
4836 int is_slm(unsigned int family, unsigned int model)
4837 {
4838         if (!genuine_intel)
4839                 return 0;
4840         switch (model) {
4841         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4842         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4843                 return 1;
4844         }
4845         return 0;
4846 }
4847
4848 int is_knl(unsigned int family, unsigned int model)
4849 {
4850         if (!genuine_intel)
4851                 return 0;
4852         switch (model) {
4853         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4854                 return 1;
4855         }
4856         return 0;
4857 }
4858
4859 int is_cnl(unsigned int family, unsigned int model)
4860 {
4861         if (!genuine_intel)
4862                 return 0;
4863
4864         switch (model) {
4865         case INTEL_FAM6_CANNONLAKE_L: /* CNL */
4866                 return 1;
4867         }
4868
4869         return 0;
4870 }
4871
4872 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4873 {
4874         if (is_knl(family, model))
4875                 return 1024;
4876         return 1;
4877 }
4878
4879 #define SLM_BCLK_FREQS 5
4880 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4881
4882 double slm_bclk(void)
4883 {
4884         unsigned long long msr = 3;
4885         unsigned int i;
4886         double freq;
4887
4888         if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4889                 fprintf(outf, "SLM BCLK: unknown\n");
4890
4891         i = msr & 0xf;
4892         if (i >= SLM_BCLK_FREQS) {
4893                 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4894                 i = 3;
4895         }
4896         freq = slm_freq_table[i];
4897
4898         if (!quiet)
4899                 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4900
4901         return freq;
4902 }
4903
4904 double discover_bclk(unsigned int family, unsigned int model)
4905 {
4906         if (has_snb_msrs(family, model) || is_knl(family, model))
4907                 return 100.00;
4908         else if (is_slm(family, model))
4909                 return slm_bclk();
4910         else
4911                 return 133.33;
4912 }
4913
4914 /*
4915  * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4916  * the Thermal Control Circuit (TCC) activates.
4917  * This is usually equal to tjMax.
4918  *
4919  * Older processors do not have this MSR, so there we guess,
4920  * but also allow cmdline over-ride with -T.
4921  *
4922  * Several MSR temperature values are in units of degrees-C
4923  * below this value, including the Digital Thermal Sensor (DTS),
4924  * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4925  */
4926 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4927 {
4928         unsigned long long msr;
4929         unsigned int target_c_local;
4930         int cpu;
4931
4932         /* tcc_activation_temp is used only for dts or ptm */
4933         if (!(do_dts || do_ptm))
4934                 return 0;
4935
4936         /* this is a per-package concept */
4937         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4938                 return 0;
4939
4940         cpu = t->cpu_id;
4941         if (cpu_migrate(cpu)) {
4942                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4943                 return -1;
4944         }
4945
4946         if (tcc_activation_temp_override != 0) {
4947                 tcc_activation_temp = tcc_activation_temp_override;
4948                 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
4949                         cpu, tcc_activation_temp);
4950                 return 0;
4951         }
4952
4953         /* Temperature Target MSR is Nehalem and newer only */
4954         if (!do_nhm_platform_info)
4955                 goto guess;
4956
4957         if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4958                 goto guess;
4959
4960         target_c_local = (msr >> 16) & 0xFF;
4961
4962         if (!quiet)
4963                 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
4964                         cpu, msr, target_c_local);
4965
4966         if (!target_c_local)
4967                 goto guess;
4968
4969         tcc_activation_temp = target_c_local;
4970
4971         return 0;
4972
4973 guess:
4974         tcc_activation_temp = TJMAX_DEFAULT;
4975         fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
4976                 cpu, tcc_activation_temp);
4977
4978         return 0;
4979 }
4980
4981 void decode_feature_control_msr(void)
4982 {
4983         unsigned long long msr;
4984
4985         if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr))
4986                 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4987                         base_cpu, msr,
4988                         msr & FEAT_CTL_LOCKED ? "" : "UN-",
4989                         msr & (1 << 18) ? "SGX" : "");
4990 }
4991
4992 void decode_misc_enable_msr(void)
4993 {
4994         unsigned long long msr;
4995
4996         if (!genuine_intel)
4997                 return;
4998
4999         if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
5000                 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
5001                         base_cpu, msr,
5002                         msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
5003                         msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
5004                         msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
5005                         msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
5006                         msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
5007 }
5008
5009 void decode_misc_feature_control(void)
5010 {
5011         unsigned long long msr;
5012
5013         if (!has_misc_feature_control)
5014                 return;
5015
5016         if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
5017                 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
5018                         base_cpu, msr,
5019                         msr & (0 << 0) ? "No-" : "",
5020                         msr & (1 << 0) ? "No-" : "",
5021                         msr & (2 << 0) ? "No-" : "",
5022                         msr & (3 << 0) ? "No-" : "");
5023 }
5024 /*
5025  * Decode MSR_MISC_PWR_MGMT
5026  *
5027  * Decode the bits according to the Nehalem documentation
5028  * bit[0] seems to continue to have same meaning going forward
5029  * bit[1] less so...
5030  */
5031 void decode_misc_pwr_mgmt_msr(void)
5032 {
5033         unsigned long long msr;
5034
5035         if (!do_nhm_platform_info)
5036                 return;
5037
5038         if (no_MSR_MISC_PWR_MGMT)
5039                 return;
5040
5041         if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
5042                 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
5043                         base_cpu, msr,
5044                         msr & (1 << 0) ? "DIS" : "EN",
5045                         msr & (1 << 1) ? "EN" : "DIS",
5046                         msr & (1 << 8) ? "EN" : "DIS");
5047 }
5048 /*
5049  * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
5050  *
5051  * This MSRs are present on Silvermont processors,
5052  * Intel Atom processor E3000 series (Baytrail), and friends.
5053  */
5054 void decode_c6_demotion_policy_msr(void)
5055 {
5056         unsigned long long msr;
5057
5058         if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
5059                 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
5060                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5061
5062         if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
5063                 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
5064                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5065 }
5066
5067 /*
5068  * When models are the same, for the purpose of turbostat, reuse
5069  */
5070 unsigned int intel_model_duplicates(unsigned int model)
5071 {
5072
5073         switch(model) {
5074         case INTEL_FAM6_NEHALEM_EP:     /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
5075         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
5076         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
5077         case INTEL_FAM6_WESTMERE:       /* Westmere Client - Clarkdale, Arrandale */
5078         case INTEL_FAM6_WESTMERE_EP:    /* Westmere EP - Gulftown */
5079                 return INTEL_FAM6_NEHALEM;
5080
5081         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
5082         case INTEL_FAM6_WESTMERE_EX:    /* Westmere-EX Xeon - Eagleton */
5083                 return INTEL_FAM6_NEHALEM_EX;
5084
5085         case INTEL_FAM6_XEON_PHI_KNM:
5086                 return INTEL_FAM6_XEON_PHI_KNL;
5087
5088         case INTEL_FAM6_BROADWELL_X:
5089         case INTEL_FAM6_BROADWELL_D:    /* BDX-DE */
5090                 return INTEL_FAM6_BROADWELL_X;
5091
5092         case INTEL_FAM6_SKYLAKE_L:
5093         case INTEL_FAM6_SKYLAKE:
5094         case INTEL_FAM6_KABYLAKE_L:
5095         case INTEL_FAM6_KABYLAKE:
5096         case INTEL_FAM6_COMETLAKE_L:
5097         case INTEL_FAM6_COMETLAKE:
5098                 return INTEL_FAM6_SKYLAKE_L;
5099
5100         case INTEL_FAM6_ICELAKE_L:
5101         case INTEL_FAM6_ICELAKE_NNPI:
5102         case INTEL_FAM6_TIGERLAKE_L:
5103         case INTEL_FAM6_TIGERLAKE:
5104         case INTEL_FAM6_ROCKETLAKE:
5105         case INTEL_FAM6_LAKEFIELD:
5106         case INTEL_FAM6_ALDERLAKE:
5107         case INTEL_FAM6_ALDERLAKE_L:
5108                 return INTEL_FAM6_CANNONLAKE_L;
5109
5110         case INTEL_FAM6_ATOM_TREMONT_L:
5111                 return INTEL_FAM6_ATOM_TREMONT;
5112
5113         case INTEL_FAM6_ICELAKE_D:
5114         case INTEL_FAM6_SAPPHIRERAPIDS_X:
5115                 return INTEL_FAM6_ICELAKE_X;
5116         }
5117         return model;
5118 }
5119
5120 void print_dev_latency(void)
5121 {
5122         char *path = "/dev/cpu_dma_latency";
5123         int fd;
5124         int value;
5125         int retval;
5126
5127         fd = open(path, O_RDONLY);
5128         if (fd < 0) {
5129                 warn("fopen %s\n", path);
5130                 return;
5131         }
5132
5133         retval = read(fd, (void *)&value, sizeof(int));
5134         if (retval != sizeof(int)) {
5135                 warn("read %s\n", path);
5136                 close(fd);
5137                 return;
5138         }
5139         fprintf(outf, "/dev/cpu_dma_latency: %d usec (%s)\n",
5140                 value, value == 2000000000 ? "default" : "constrained");
5141
5142         close(fd);
5143 }
5144
5145
5146 /*
5147  * Linux-perf manages the the HW instructions-retired counter
5148  * by enabling when requested, and hiding rollover
5149  */
5150 void linux_perf_init(void)
5151 {
5152         if (!BIC_IS_ENABLED(BIC_IPC))
5153                 return;
5154
5155         if (access("/proc/sys/kernel/perf_event_paranoid", F_OK))
5156                 return;
5157
5158         fd_instr_count_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5159         if (fd_instr_count_percpu == NULL)
5160                 err(-1, "calloc fd_instr_count_percpu");
5161
5162         BIC_PRESENT(BIC_IPC);
5163 }
5164
5165 void process_cpuid()
5166 {
5167         unsigned int eax, ebx, ecx, edx;
5168         unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
5169         unsigned int has_turbo;
5170         unsigned long long ucode_patch = 0;
5171
5172         eax = ebx = ecx = edx = 0;
5173
5174         __cpuid(0, max_level, ebx, ecx, edx);
5175
5176         if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
5177                 genuine_intel = 1;
5178         else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
5179                 authentic_amd = 1;
5180         else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e)
5181                 hygon_genuine = 1;
5182
5183         if (!quiet)
5184                 fprintf(outf, "CPUID(0): %.4s%.4s%.4s 0x%x CPUID levels\n",
5185                         (char *)&ebx, (char *)&edx, (char *)&ecx, max_level);
5186
5187         __cpuid(1, fms, ebx, ecx, edx);
5188         family = (fms >> 8) & 0xf;
5189         model = (fms >> 4) & 0xf;
5190         stepping = fms & 0xf;
5191         if (family == 0xf)
5192                 family += (fms >> 20) & 0xff;
5193         if (family >= 6)
5194                 model += ((fms >> 16) & 0xf) << 4;
5195         ecx_flags = ecx;
5196         edx_flags = edx;
5197
5198         if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch))
5199                 warnx("get_msr(UCODE)\n");
5200
5201         /*
5202          * check max extended function levels of CPUID.
5203          * This is needed to check for invariant TSC.
5204          * This check is valid for both Intel and AMD.
5205          */
5206         ebx = ecx = edx = 0;
5207         __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
5208
5209         if (!quiet) {
5210                 fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d) microcode 0x%x\n",
5211                         family, model, stepping, family, model, stepping, (unsigned int)((ucode_patch >> 32) & 0xFFFFFFFF));
5212                 fprintf(outf, "CPUID(0x80000000): max_extended_levels: 0x%x\n", max_extended_level);
5213                 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
5214                         ecx_flags & (1 << 0) ? "SSE3" : "-",
5215                         ecx_flags & (1 << 3) ? "MONITOR" : "-",
5216                         ecx_flags & (1 << 6) ? "SMX" : "-",
5217                         ecx_flags & (1 << 7) ? "EIST" : "-",
5218                         ecx_flags & (1 << 8) ? "TM2" : "-",
5219                         edx_flags & (1 << 4) ? "TSC" : "-",
5220                         edx_flags & (1 << 5) ? "MSR" : "-",
5221                         edx_flags & (1 << 22) ? "ACPI-TM" : "-",
5222                         edx_flags & (1 << 28) ? "HT" : "-",
5223                         edx_flags & (1 << 29) ? "TM" : "-");
5224         }
5225         if (genuine_intel) {
5226                 model = intel_model_duplicates(model);
5227         }
5228
5229         if (!(edx_flags & (1 << 5)))
5230                 errx(1, "CPUID: no MSR");
5231
5232         if (max_extended_level >= 0x80000007) {
5233
5234                 /*
5235                  * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
5236                  * this check is valid for both Intel and AMD
5237                  */
5238                 __cpuid(0x80000007, eax, ebx, ecx, edx);
5239                 has_invariant_tsc = edx & (1 << 8);
5240         }
5241
5242         /*
5243          * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
5244          * this check is valid for both Intel and AMD
5245          */
5246
5247         __cpuid(0x6, eax, ebx, ecx, edx);
5248         has_aperf = ecx & (1 << 0);
5249         if (has_aperf) {
5250                 BIC_PRESENT(BIC_Avg_MHz);
5251                 BIC_PRESENT(BIC_Busy);
5252                 BIC_PRESENT(BIC_Bzy_MHz);
5253         }
5254         do_dts = eax & (1 << 0);
5255         if (do_dts)
5256                 BIC_PRESENT(BIC_CoreTmp);
5257         has_turbo = eax & (1 << 1);
5258         do_ptm = eax & (1 << 6);
5259         if (do_ptm)
5260                 BIC_PRESENT(BIC_PkgTmp);
5261         has_hwp = eax & (1 << 7);
5262         has_hwp_notify = eax & (1 << 8);
5263         has_hwp_activity_window = eax & (1 << 9);
5264         has_hwp_epp = eax & (1 << 10);
5265         has_hwp_pkg = eax & (1 << 11);
5266         has_epb = ecx & (1 << 3);
5267
5268         if (!quiet)
5269                 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
5270                         "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
5271                         has_aperf ? "" : "No-",
5272                         has_turbo ? "" : "No-",
5273                         do_dts ? "" : "No-",
5274                         do_ptm ? "" : "No-",
5275                         has_hwp ? "" : "No-",
5276                         has_hwp_notify ? "" : "No-",
5277                         has_hwp_activity_window ? "" : "No-",
5278                         has_hwp_epp ? "" : "No-",
5279                         has_hwp_pkg ? "" : "No-",
5280                         has_epb ? "" : "No-");
5281
5282         if (!quiet)
5283                 decode_misc_enable_msr();
5284
5285
5286         if (max_level >= 0x7 && !quiet) {
5287                 int has_sgx;
5288
5289                 ecx = 0;
5290
5291                 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
5292
5293                 has_sgx = ebx & (1 << 2);
5294                 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
5295
5296                 if (has_sgx)
5297                         decode_feature_control_msr();
5298         }
5299
5300         if (max_level >= 0x15) {
5301                 unsigned int eax_crystal;
5302                 unsigned int ebx_tsc;
5303
5304                 /*
5305                  * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
5306                  */
5307                 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5308                 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
5309
5310                 if (ebx_tsc != 0) {
5311
5312                         if (!quiet && (ebx != 0))
5313                                 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
5314                                         eax_crystal, ebx_tsc, crystal_hz);
5315
5316                         if (crystal_hz == 0)
5317                                 switch(model) {
5318                                 case INTEL_FAM6_SKYLAKE_L:      /* SKL */
5319                                         crystal_hz = 24000000;  /* 24.0 MHz */
5320                                         break;
5321                                 case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
5322                                         crystal_hz = 25000000;  /* 25.0 MHz */
5323                                         break;
5324                                 case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
5325                                 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
5326                                         crystal_hz = 19200000;  /* 19.2 MHz */
5327                                         break;
5328                                 default:
5329                                         crystal_hz = 0;
5330                         }
5331
5332                         if (crystal_hz) {
5333                                 tsc_hz =  (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
5334                                 if (!quiet)
5335                                         fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
5336                                                 tsc_hz / 1000000, crystal_hz, ebx_tsc,  eax_crystal);
5337                         }
5338                 }
5339         }
5340         if (max_level >= 0x16) {
5341                 unsigned int base_mhz, max_mhz, bus_mhz, edx;
5342
5343                 /*
5344                  * CPUID 16H Base MHz, Max MHz, Bus MHz
5345                  */
5346                 base_mhz = max_mhz = bus_mhz = edx = 0;
5347
5348                 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
5349                 if (!quiet)
5350                         fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
5351                                 base_mhz, max_mhz, bus_mhz);
5352         }
5353
5354         if (has_aperf)
5355                 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
5356
5357         BIC_PRESENT(BIC_IRQ);
5358         BIC_PRESENT(BIC_TSC_MHz);
5359
5360         if (probe_nhm_msrs(family, model)) {
5361                 do_nhm_platform_info = 1;
5362                 BIC_PRESENT(BIC_CPU_c1);
5363                 BIC_PRESENT(BIC_CPU_c3);
5364                 BIC_PRESENT(BIC_CPU_c6);
5365                 BIC_PRESENT(BIC_SMI);
5366         }
5367         do_snb_cstates = has_snb_msrs(family, model);
5368
5369         if (do_snb_cstates)
5370                 BIC_PRESENT(BIC_CPU_c7);
5371
5372         do_irtl_snb = has_snb_msrs(family, model);
5373         if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
5374                 BIC_PRESENT(BIC_Pkgpc2);
5375         if (pkg_cstate_limit >= PCL__3)
5376                 BIC_PRESENT(BIC_Pkgpc3);
5377         if (pkg_cstate_limit >= PCL__6)
5378                 BIC_PRESENT(BIC_Pkgpc6);
5379         if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
5380                 BIC_PRESENT(BIC_Pkgpc7);
5381         if (has_slv_msrs(family, model)) {
5382                 BIC_NOT_PRESENT(BIC_Pkgpc2);
5383                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5384                 BIC_PRESENT(BIC_Pkgpc6);
5385                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5386                 BIC_PRESENT(BIC_Mod_c6);
5387                 use_c1_residency_msr = 1;
5388         }
5389         if (is_jvl(family, model)) {
5390                 BIC_NOT_PRESENT(BIC_CPU_c3);
5391                 BIC_NOT_PRESENT(BIC_CPU_c7);
5392                 BIC_NOT_PRESENT(BIC_Pkgpc2);
5393                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5394                 BIC_NOT_PRESENT(BIC_Pkgpc6);
5395                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5396         }
5397         if (is_dnv(family, model)) {
5398                 BIC_PRESENT(BIC_CPU_c1);
5399                 BIC_NOT_PRESENT(BIC_CPU_c3);
5400                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5401                 BIC_NOT_PRESENT(BIC_CPU_c7);
5402                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5403                 use_c1_residency_msr = 1;
5404         }
5405         if (is_skx(family, model) || is_icx(family, model)) {
5406                 BIC_NOT_PRESENT(BIC_CPU_c3);
5407                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5408                 BIC_NOT_PRESENT(BIC_CPU_c7);
5409                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5410         }
5411         if (is_bdx(family, model)) {
5412                 BIC_NOT_PRESENT(BIC_CPU_c7);
5413                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5414         }
5415         if (has_c8910_msrs(family, model)) {
5416                 if (pkg_cstate_limit >= PCL__8)
5417                         BIC_PRESENT(BIC_Pkgpc8);
5418                 if (pkg_cstate_limit >= PCL__9)
5419                         BIC_PRESENT(BIC_Pkgpc9);
5420                 if (pkg_cstate_limit >= PCL_10)
5421                         BIC_PRESENT(BIC_Pkgpc10);
5422         }
5423         do_irtl_hsw = has_c8910_msrs(family, model);
5424         if (has_skl_msrs(family, model)) {
5425                 BIC_PRESENT(BIC_Totl_c0);
5426                 BIC_PRESENT(BIC_Any_c0);
5427                 BIC_PRESENT(BIC_GFX_c0);
5428                 BIC_PRESENT(BIC_CPUGFX);
5429         }
5430         do_slm_cstates = is_slm(family, model);
5431         do_knl_cstates  = is_knl(family, model);
5432
5433         if (do_slm_cstates || do_knl_cstates || is_cnl(family, model) ||
5434             is_ehl(family, model))
5435                 BIC_NOT_PRESENT(BIC_CPU_c3);
5436
5437         if (!quiet)
5438                 decode_misc_pwr_mgmt_msr();
5439
5440         if (!quiet && has_slv_msrs(family, model))
5441                 decode_c6_demotion_policy_msr();
5442
5443         rapl_probe(family, model);
5444         perf_limit_reasons_probe(family, model);
5445         automatic_cstate_conversion_probe(family, model);
5446
5447         if (!quiet)
5448                 dump_cstate_pstate_config_info(family, model);
5449
5450         if (!quiet)
5451                 print_dev_latency();
5452         if (!quiet)
5453                 dump_sysfs_cstate_config();
5454         if (!quiet)
5455                 dump_sysfs_pstate_config();
5456
5457         if (has_skl_msrs(family, model) || is_ehl(family, model))
5458                 calculate_tsc_tweak();
5459
5460         if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
5461                 BIC_PRESENT(BIC_GFX_rc6);
5462
5463         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
5464                 BIC_PRESENT(BIC_GFXMHz);
5465
5466         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", R_OK))
5467                 BIC_PRESENT(BIC_GFXACTMHz);
5468
5469         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
5470                 BIC_PRESENT(BIC_CPU_LPI);
5471         else
5472                 BIC_NOT_PRESENT(BIC_CPU_LPI);
5473
5474         if (!access(sys_lpi_file_sysfs, R_OK)) {
5475                 sys_lpi_file = sys_lpi_file_sysfs;
5476                 BIC_PRESENT(BIC_SYS_LPI);
5477         } else if (!access(sys_lpi_file_debugfs, R_OK)) {
5478                 sys_lpi_file = sys_lpi_file_debugfs;
5479                 BIC_PRESENT(BIC_SYS_LPI);
5480         } else {
5481                 sys_lpi_file_sysfs = NULL;
5482                 BIC_NOT_PRESENT(BIC_SYS_LPI);
5483         }
5484
5485         if (!quiet)
5486                 decode_misc_feature_control();
5487
5488         return;
5489 }
5490
5491 /*
5492  * in /dev/cpu/ return success for names that are numbers
5493  * ie. filter out ".", "..", "microcode".
5494  */
5495 int dir_filter(const struct dirent *dirp)
5496 {
5497         if (isdigit(dirp->d_name[0]))
5498                 return 1;
5499         else
5500                 return 0;
5501 }
5502
5503 int open_dev_cpu_msr(int dummy1)
5504 {
5505         return 0;
5506 }
5507
5508 void topology_probe()
5509 {
5510         int i;
5511         int max_core_id = 0;
5512         int max_package_id = 0;
5513         int max_die_id = 0;
5514         int max_siblings = 0;
5515
5516         /* Initialize num_cpus, max_cpu_num */
5517         set_max_cpu_num();
5518         topo.num_cpus = 0;
5519         for_all_proc_cpus(count_cpus);
5520         if (!summary_only && topo.num_cpus > 1)
5521                 BIC_PRESENT(BIC_CPU);
5522
5523         if (debug > 1)
5524                 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
5525
5526         cpus = calloc(1, (topo.max_cpu_num  + 1) * sizeof(struct cpu_topology));
5527         if (cpus == NULL)
5528                 err(1, "calloc cpus");
5529
5530         /*
5531          * Allocate and initialize cpu_present_set
5532          */
5533         cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
5534         if (cpu_present_set == NULL)
5535                 err(3, "CPU_ALLOC");
5536         cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5537         CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
5538         for_all_proc_cpus(mark_cpu_present);
5539
5540         /*
5541          * Validate that all cpus in cpu_subset are also in cpu_present_set
5542          */
5543         for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
5544                 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
5545                         if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
5546                                 err(1, "cpu%d not present", i);
5547         }
5548
5549         /*
5550          * Allocate and initialize cpu_affinity_set
5551          */
5552         cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
5553         if (cpu_affinity_set == NULL)
5554                 err(3, "CPU_ALLOC");
5555         cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5556         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
5557
5558         for_all_proc_cpus(init_thread_id);
5559
5560         /*
5561          * For online cpus
5562          * find max_core_id, max_package_id
5563          */
5564         for (i = 0; i <= topo.max_cpu_num; ++i) {
5565                 int siblings;
5566
5567                 if (cpu_is_not_present(i)) {
5568                         if (debug > 1)
5569                                 fprintf(outf, "cpu%d NOT PRESENT\n", i);
5570                         continue;
5571                 }
5572
5573                 cpus[i].logical_cpu_id = i;
5574
5575                 /* get package information */
5576                 cpus[i].physical_package_id = get_physical_package_id(i);
5577                 if (cpus[i].physical_package_id > max_package_id)
5578                         max_package_id = cpus[i].physical_package_id;
5579
5580                 /* get die information */
5581                 cpus[i].die_id = get_die_id(i);
5582                 if (cpus[i].die_id > max_die_id)
5583                         max_die_id = cpus[i].die_id;
5584
5585                 /* get numa node information */
5586                 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
5587                 if (cpus[i].physical_node_id > topo.max_node_num)
5588                         topo.max_node_num = cpus[i].physical_node_id;
5589
5590                 /* get core information */
5591                 cpus[i].physical_core_id = get_core_id(i);
5592                 if (cpus[i].physical_core_id > max_core_id)
5593                         max_core_id = cpus[i].physical_core_id;
5594
5595                 /* get thread information */
5596                 siblings = get_thread_siblings(&cpus[i]);
5597                 if (siblings > max_siblings)
5598                         max_siblings = siblings;
5599                 if (cpus[i].thread_id == 0)
5600                         topo.num_cores++;
5601         }
5602
5603         topo.cores_per_node = max_core_id + 1;
5604         if (debug > 1)
5605                 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
5606                         max_core_id, topo.cores_per_node);
5607         if (!summary_only && topo.cores_per_node > 1)
5608                 BIC_PRESENT(BIC_Core);
5609
5610         topo.num_die = max_die_id + 1;
5611         if (debug > 1)
5612                 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5613                                 max_die_id, topo.num_die);
5614         if (!summary_only && topo.num_die > 1)
5615                 BIC_PRESENT(BIC_Die);
5616
5617         topo.num_packages = max_package_id + 1;
5618         if (debug > 1)
5619                 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
5620                         max_package_id, topo.num_packages);
5621         if (!summary_only && topo.num_packages > 1)
5622                 BIC_PRESENT(BIC_Package);
5623
5624         set_node_data();
5625         if (debug > 1)
5626                 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
5627         if (!summary_only && topo.nodes_per_pkg > 1)
5628                 BIC_PRESENT(BIC_Node);
5629
5630         topo.threads_per_core = max_siblings;
5631         if (debug > 1)
5632                 fprintf(outf, "max_siblings %d\n", max_siblings);
5633
5634         if (debug < 1)
5635                 return;
5636
5637         for (i = 0; i <= topo.max_cpu_num; ++i) {
5638                 if (cpu_is_not_present(i))
5639                         continue;
5640                 fprintf(outf,
5641                         "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5642                         i, cpus[i].physical_package_id, cpus[i].die_id,
5643                         cpus[i].physical_node_id,
5644                         cpus[i].logical_node_id,
5645                         cpus[i].physical_core_id,
5646                         cpus[i].thread_id);
5647         }
5648
5649 }
5650
5651 void
5652 allocate_counters(struct thread_data **t, struct core_data **c,
5653                   struct pkg_data **p)
5654 {
5655         int i;
5656         int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5657                         topo.num_packages;
5658         int num_threads = topo.threads_per_core * num_cores;
5659
5660         *t = calloc(num_threads, sizeof(struct thread_data));
5661         if (*t == NULL)
5662                 goto error;
5663
5664         for (i = 0; i < num_threads; i++)
5665                 (*t)[i].cpu_id = -1;
5666
5667         *c = calloc(num_cores, sizeof(struct core_data));
5668         if (*c == NULL)
5669                 goto error;
5670
5671         for (i = 0; i < num_cores; i++)
5672                 (*c)[i].core_id = -1;
5673
5674         *p = calloc(topo.num_packages, sizeof(struct pkg_data));
5675         if (*p == NULL)
5676                 goto error;
5677
5678         for (i = 0; i < topo.num_packages; i++)
5679                 (*p)[i].package_id = i;
5680
5681         return;
5682 error:
5683         err(1, "calloc counters");
5684 }
5685 /*
5686  * init_counter()
5687  *
5688  * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
5689  */
5690 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
5691         struct pkg_data *pkg_base, int cpu_id)
5692 {
5693         int pkg_id = cpus[cpu_id].physical_package_id;
5694         int node_id = cpus[cpu_id].logical_node_id;
5695         int core_id = cpus[cpu_id].physical_core_id;
5696         int thread_id = cpus[cpu_id].thread_id;
5697         struct thread_data *t;
5698         struct core_data *c;
5699         struct pkg_data *p;
5700
5701
5702         /* Workaround for systems where physical_node_id==-1
5703          * and logical_node_id==(-1 - topo.num_cpus)
5704          */
5705         if (node_id < 0)
5706                 node_id = 0;
5707
5708         t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5709         c = GET_CORE(core_base, core_id, node_id, pkg_id);
5710         p = GET_PKG(pkg_base, pkg_id);
5711
5712         t->cpu_id = cpu_id;
5713         if (thread_id == 0) {
5714                 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5715                 if (cpu_is_first_core_in_package(cpu_id))
5716                         t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5717         }
5718
5719         c->core_id = core_id;
5720         p->package_id = pkg_id;
5721 }
5722
5723
5724 int initialize_counters(int cpu_id)
5725 {
5726         init_counter(EVEN_COUNTERS, cpu_id);
5727         init_counter(ODD_COUNTERS, cpu_id);
5728         return 0;
5729 }
5730
5731 void allocate_output_buffer()
5732 {
5733         output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
5734         outp = output_buffer;
5735         if (outp == NULL)
5736                 err(-1, "calloc output buffer");
5737 }
5738 void allocate_fd_percpu(void)
5739 {
5740         fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5741         if (fd_percpu == NULL)
5742                 err(-1, "calloc fd_percpu");
5743 }
5744 void allocate_irq_buffers(void)
5745 {
5746         irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5747         if (irq_column_2_cpu == NULL)
5748                 err(-1, "calloc %d", topo.num_cpus);
5749
5750         irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5751         if (irqs_per_cpu == NULL)
5752                 err(-1, "calloc %d", topo.max_cpu_num + 1);
5753 }
5754 void setup_all_buffers(void)
5755 {
5756         topology_probe();
5757         allocate_irq_buffers();
5758         allocate_fd_percpu();
5759         allocate_counters(&thread_even, &core_even, &package_even);
5760         allocate_counters(&thread_odd, &core_odd, &package_odd);
5761         allocate_output_buffer();
5762         for_all_proc_cpus(initialize_counters);
5763 }
5764
5765 void set_base_cpu(void)
5766 {
5767         base_cpu = sched_getcpu();
5768         if (base_cpu < 0)
5769                 err(-ENODEV, "No valid cpus found");
5770
5771         if (debug > 1)
5772                 fprintf(outf, "base_cpu = %d\n", base_cpu);
5773 }
5774
5775 void turbostat_init()
5776 {
5777         setup_all_buffers();
5778         set_base_cpu();
5779         check_dev_msr();
5780         check_permissions();
5781         process_cpuid();
5782         linux_perf_init();
5783
5784
5785         if (!quiet)
5786                 for_all_cpus(print_hwp, ODD_COUNTERS);
5787
5788         if (!quiet)
5789                 for_all_cpus(print_epb, ODD_COUNTERS);
5790
5791         if (!quiet)
5792                 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5793
5794         if (!quiet)
5795                 for_all_cpus(print_rapl, ODD_COUNTERS);
5796
5797         for_all_cpus(set_temperature_target, ODD_COUNTERS);
5798
5799         if (!quiet)
5800                 for_all_cpus(print_thermal, ODD_COUNTERS);
5801
5802         if (!quiet && do_irtl_snb)
5803                 print_irtl();
5804 }
5805
5806 int fork_it(char **argv)
5807 {
5808         pid_t child_pid;
5809         int status;
5810
5811         snapshot_proc_sysfs_files();
5812         status = for_all_cpus(get_counters, EVEN_COUNTERS);
5813         first_counter_read = 0;
5814         if (status)
5815                 exit(status);
5816         /* clear affinity side-effect of get_counters() */
5817         sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
5818         gettimeofday(&tv_even, (struct timezone *)NULL);
5819
5820         child_pid = fork();
5821         if (!child_pid) {
5822                 /* child */
5823                 execvp(argv[0], argv);
5824                 err(errno, "exec %s", argv[0]);
5825         } else {
5826
5827                 /* parent */
5828                 if (child_pid == -1)
5829                         err(1, "fork");
5830
5831                 signal(SIGINT, SIG_IGN);
5832                 signal(SIGQUIT, SIG_IGN);
5833                 if (waitpid(child_pid, &status, 0) == -1)
5834                         err(status, "waitpid");
5835
5836                 if (WIFEXITED(status))
5837                         status = WEXITSTATUS(status);
5838         }
5839         /*
5840          * n.b. fork_it() does not check for errors from for_all_cpus()
5841          * because re-starting is problematic when forking
5842          */
5843         snapshot_proc_sysfs_files();
5844         for_all_cpus(get_counters, ODD_COUNTERS);
5845         gettimeofday(&tv_odd, (struct timezone *)NULL);
5846         timersub(&tv_odd, &tv_even, &tv_delta);
5847         if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5848                 fprintf(outf, "%s: Counter reset detected\n", progname);
5849         else {
5850                 compute_average(EVEN_COUNTERS);
5851                 format_all_counters(EVEN_COUNTERS);
5852         }
5853
5854         fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5855
5856         flush_output_stderr();
5857
5858         return status;
5859 }
5860
5861 int get_and_dump_counters(void)
5862 {
5863         int status;
5864
5865         snapshot_proc_sysfs_files();
5866         status = for_all_cpus(get_counters, ODD_COUNTERS);
5867         if (status)
5868                 return status;
5869
5870         status = for_all_cpus(dump_counters, ODD_COUNTERS);
5871         if (status)
5872                 return status;
5873
5874         flush_output_stdout();
5875
5876         return status;
5877 }
5878
5879 void print_version() {
5880         fprintf(outf, "turbostat version 21.03.12"
5881                 " - Len Brown <lenb@kernel.org>\n");
5882 }
5883
5884 int add_counter(unsigned int msr_num, char *path, char *name,
5885         unsigned int width, enum counter_scope scope,
5886         enum counter_type type, enum counter_format format, int flags)
5887 {
5888         struct msr_counter *msrp;
5889
5890         msrp = calloc(1, sizeof(struct msr_counter));
5891         if (msrp == NULL) {
5892                 perror("calloc");
5893                 exit(1);
5894         }
5895
5896         msrp->msr_num = msr_num;
5897         strncpy(msrp->name, name, NAME_BYTES - 1);
5898         if (path)
5899                 strncpy(msrp->path, path, PATH_BYTES - 1);
5900         msrp->width = width;
5901         msrp->type = type;
5902         msrp->format = format;
5903         msrp->flags = flags;
5904
5905         switch (scope) {
5906
5907         case SCOPE_CPU:
5908                 msrp->next = sys.tp;
5909                 sys.tp = msrp;
5910                 sys.added_thread_counters++;
5911                 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5912                         fprintf(stderr, "exceeded max %d added thread counters\n",
5913                                 MAX_ADDED_COUNTERS);
5914                         exit(-1);
5915                 }
5916                 break;
5917
5918         case SCOPE_CORE:
5919                 msrp->next = sys.cp;
5920                 sys.cp = msrp;
5921                 sys.added_core_counters++;
5922                 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5923                         fprintf(stderr, "exceeded max %d added core counters\n",
5924                                 MAX_ADDED_COUNTERS);
5925                         exit(-1);
5926                 }
5927                 break;
5928
5929         case SCOPE_PACKAGE:
5930                 msrp->next = sys.pp;
5931                 sys.pp = msrp;
5932                 sys.added_package_counters++;
5933                 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5934                         fprintf(stderr, "exceeded max %d added package counters\n",
5935                                 MAX_ADDED_COUNTERS);
5936                         exit(-1);
5937                 }
5938                 break;
5939         }
5940
5941         return 0;
5942 }
5943
5944 void parse_add_command(char *add_command)
5945 {
5946         int msr_num = 0;
5947         char *path = NULL;
5948         char name_buffer[NAME_BYTES] = "";
5949         int width = 64;
5950         int fail = 0;
5951         enum counter_scope scope = SCOPE_CPU;
5952         enum counter_type type = COUNTER_CYCLES;
5953         enum counter_format format = FORMAT_DELTA;
5954
5955         while (add_command) {
5956
5957                 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5958                         goto next;
5959
5960                 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5961                         goto next;
5962
5963                 if (*add_command == '/') {
5964                         path = add_command;
5965                         goto next;
5966                 }
5967
5968                 if (sscanf(add_command, "u%d", &width) == 1) {
5969                         if ((width == 32) || (width == 64))
5970                                 goto next;
5971                         width = 64;
5972                 }
5973                 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5974                         scope = SCOPE_CPU;
5975                         goto next;
5976                 }
5977                 if (!strncmp(add_command, "core", strlen("core"))) {
5978                         scope = SCOPE_CORE;
5979                         goto next;
5980                 }
5981                 if (!strncmp(add_command, "package", strlen("package"))) {
5982                         scope = SCOPE_PACKAGE;
5983                         goto next;
5984                 }
5985                 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5986                         type = COUNTER_CYCLES;
5987                         goto next;
5988                 }
5989                 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5990                         type = COUNTER_SECONDS;
5991                         goto next;
5992                 }
5993                 if (!strncmp(add_command, "usec", strlen("usec"))) {
5994                         type = COUNTER_USEC;
5995                         goto next;
5996                 }
5997                 if (!strncmp(add_command, "raw", strlen("raw"))) {
5998                         format = FORMAT_RAW;
5999                         goto next;
6000                 }
6001                 if (!strncmp(add_command, "delta", strlen("delta"))) {
6002                         format = FORMAT_DELTA;
6003                         goto next;
6004                 }
6005                 if (!strncmp(add_command, "percent", strlen("percent"))) {
6006                         format = FORMAT_PERCENT;
6007                         goto next;
6008                 }
6009
6010                 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) {        /* 18 < NAME_BYTES */
6011                         char *eos;
6012
6013                         eos = strchr(name_buffer, ',');
6014                         if (eos)
6015                                 *eos = '\0';
6016                         goto next;
6017                 }
6018
6019 next:
6020                 add_command = strchr(add_command, ',');
6021                 if (add_command) {
6022                         *add_command = '\0';
6023                         add_command++;
6024                 }
6025
6026         }
6027         if ((msr_num == 0) && (path == NULL)) {
6028                 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
6029                 fail++;
6030         }
6031
6032         /* generate default column header */
6033         if (*name_buffer == '\0') {
6034                 if (width == 32)
6035                         sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
6036                 else
6037                         sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
6038         }
6039
6040         if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
6041                 fail++;
6042
6043         if (fail) {
6044                 help();
6045                 exit(1);
6046         }
6047 }
6048
6049 int is_deferred_skip(char *name)
6050 {
6051         int i;
6052
6053         for (i = 0; i < deferred_skip_index; ++i)
6054                 if (!strcmp(name, deferred_skip_names[i]))
6055                         return 1;
6056         return 0;
6057 }
6058
6059 void probe_sysfs(void)
6060 {
6061         char path[64];
6062         char name_buf[16];
6063         FILE *input;
6064         int state;
6065         char *sp;
6066
6067         if (!DO_BIC(BIC_sysfs))
6068                 return;
6069
6070         for (state = 10; state >= 0; --state) {
6071
6072                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6073                         base_cpu, state);
6074                 input = fopen(path, "r");
6075                 if (input == NULL)
6076                         continue;
6077                 if (!fgets(name_buf, sizeof(name_buf), input))
6078                         err(1, "%s: failed to read file", path);
6079
6080                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6081                 sp = strchr(name_buf, '-');
6082                 if (!sp)
6083                         sp = strchrnul(name_buf, '\n');
6084                 *sp = '%';
6085                 *(sp + 1) = '\0';
6086
6087                 remove_underbar(name_buf);
6088
6089                 fclose(input);
6090
6091                 sprintf(path, "cpuidle/state%d/time", state);
6092
6093                 if (is_deferred_skip(name_buf))
6094                         continue;
6095
6096                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
6097                                 FORMAT_PERCENT, SYSFS_PERCPU);
6098         }
6099
6100         for (state = 10; state >= 0; --state) {
6101
6102                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6103                         base_cpu, state);
6104                 input = fopen(path, "r");
6105                 if (input == NULL)
6106                         continue;
6107                 if (!fgets(name_buf, sizeof(name_buf), input))
6108                         err(1, "%s: failed to read file", path);
6109                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6110                 sp = strchr(name_buf, '-');
6111                 if (!sp)
6112                         sp = strchrnul(name_buf, '\n');
6113                 *sp = '\0';
6114                 fclose(input);
6115
6116                 remove_underbar(name_buf);
6117
6118                 sprintf(path, "cpuidle/state%d/usage", state);
6119
6120                 if (is_deferred_skip(name_buf))
6121                         continue;
6122
6123                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
6124                                 FORMAT_DELTA, SYSFS_PERCPU);
6125         }
6126
6127 }
6128
6129
6130 /*
6131  * parse cpuset with following syntax
6132  * 1,2,4..6,8-10 and set bits in cpu_subset
6133  */
6134 void parse_cpu_command(char *optarg)
6135 {
6136         unsigned int start, end;
6137         char *next;
6138
6139         if (!strcmp(optarg, "core")) {
6140                 if (cpu_subset)
6141                         goto error;
6142                 show_core_only++;
6143                 return;
6144         }
6145         if (!strcmp(optarg, "package")) {
6146                 if (cpu_subset)
6147                         goto error;
6148                 show_pkg_only++;
6149                 return;
6150         }
6151         if (show_core_only || show_pkg_only)
6152                 goto error;
6153
6154         cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
6155         if (cpu_subset == NULL)
6156                 err(3, "CPU_ALLOC");
6157         cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
6158
6159         CPU_ZERO_S(cpu_subset_size, cpu_subset);
6160
6161         next = optarg;
6162
6163         while (next && *next) {
6164
6165                 if (*next == '-')       /* no negative cpu numbers */
6166                         goto error;
6167
6168                 start = strtoul(next, &next, 10);
6169
6170                 if (start >= CPU_SUBSET_MAXCPUS)
6171                         goto error;
6172                 CPU_SET_S(start, cpu_subset_size, cpu_subset);
6173
6174                 if (*next == '\0')
6175                         break;
6176
6177                 if (*next == ',') {
6178                         next += 1;
6179                         continue;
6180                 }
6181
6182                 if (*next == '-') {
6183                         next += 1;      /* start range */
6184                 } else if (*next == '.') {
6185                         next += 1;
6186                         if (*next == '.')
6187                                 next += 1;      /* start range */
6188                         else
6189                                 goto error;
6190                 }
6191
6192                 end = strtoul(next, &next, 10);
6193                 if (end <= start)
6194                         goto error;
6195
6196                 while (++start <= end) {
6197                         if (start >= CPU_SUBSET_MAXCPUS)
6198                                 goto error;
6199                         CPU_SET_S(start, cpu_subset_size, cpu_subset);
6200                 }
6201
6202                 if (*next == ',')
6203                         next += 1;
6204                 else if (*next != '\0')
6205                         goto error;
6206         }
6207
6208         return;
6209
6210 error:
6211         fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
6212         help();
6213         exit(-1);
6214 }
6215
6216
6217 void cmdline(int argc, char **argv)
6218 {
6219         int opt;
6220         int option_index = 0;
6221         static struct option long_options[] = {
6222                 {"add",         required_argument,      0, 'a'},
6223                 {"cpu",         required_argument,      0, 'c'},
6224                 {"Dump",        no_argument,            0, 'D'},
6225                 {"debug",       no_argument,            0, 'd'},        /* internal, not documented */
6226                 {"enable",      required_argument,      0, 'e'},
6227                 {"interval",    required_argument,      0, 'i'},
6228                 {"IPC", no_argument,                    0, 'I'},
6229                 {"num_iterations",      required_argument,      0, 'n'},
6230                 {"help",        no_argument,            0, 'h'},
6231                 {"hide",        required_argument,      0, 'H'},        // meh, -h taken by --help
6232                 {"Joules",      no_argument,            0, 'J'},
6233                 {"list",        no_argument,            0, 'l'},
6234                 {"out",         required_argument,      0, 'o'},
6235                 {"quiet",       no_argument,            0, 'q'},
6236                 {"show",        required_argument,      0, 's'},
6237                 {"Summary",     no_argument,            0, 'S'},
6238                 {"TCC",         required_argument,      0, 'T'},
6239                 {"version",     no_argument,            0, 'v' },
6240                 {0,             0,                      0,  0 }
6241         };
6242
6243         progname = argv[0];
6244
6245         while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
6246                                 long_options, &option_index)) != -1) {
6247                 switch (opt) {
6248                 case 'a':
6249                         parse_add_command(optarg);
6250                         break;
6251                 case 'c':
6252                         parse_cpu_command(optarg);
6253                         break;
6254                 case 'D':
6255                         dump_only++;
6256                         break;
6257                 case 'e':
6258                         /* --enable specified counter */
6259                         bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
6260                         break;
6261                 case 'd':
6262                         debug++;
6263                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
6264                         break;
6265                 case 'H':
6266                         /*
6267                          * --hide: do not show those specified
6268                          *  multiple invocations simply clear more bits in enabled mask
6269                          */
6270                         bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
6271                         break;
6272                 case 'h':
6273                 default:
6274                         help();
6275                         exit(1);
6276                 case 'i':
6277                         {
6278                                 double interval = strtod(optarg, NULL);
6279
6280                                 if (interval < 0.001) {
6281                                         fprintf(outf, "interval %f seconds is too small\n",
6282                                                 interval);
6283                                         exit(2);
6284                                 }
6285
6286                                 interval_tv.tv_sec = interval_ts.tv_sec = interval;
6287                                 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
6288                                 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
6289                         }
6290                         break;
6291                 case 'J':
6292                         rapl_joules++;
6293                         break;
6294                 case 'l':
6295                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
6296                         list_header_only++;
6297                         quiet++;
6298                         break;
6299                 case 'o':
6300                         outf = fopen_or_die(optarg, "w");
6301                         break;
6302                 case 'q':
6303                         quiet = 1;
6304                         break;
6305                 case 'n':
6306                         num_iterations = strtod(optarg, NULL);
6307
6308                         if (num_iterations <= 0) {
6309                                 fprintf(outf, "iterations %d should be positive number\n",
6310                                         num_iterations);
6311                                 exit(2);
6312                         }
6313                         break;
6314                 case 's':
6315                         /*
6316                          * --show: show only those specified
6317                          *  The 1st invocation will clear and replace the enabled mask
6318                          *  subsequent invocations can add to it.
6319                          */
6320                         if (shown == 0)
6321                                 bic_enabled = bic_lookup(optarg, SHOW_LIST);
6322                         else
6323                                 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
6324                         shown = 1;
6325                         break;
6326                 case 'S':
6327                         summary_only++;
6328                         break;
6329                 case 'T':
6330                         tcc_activation_temp_override = atoi(optarg);
6331                         break;
6332                 case 'v':
6333                         print_version();
6334                         exit(0);
6335                         break;
6336                 }
6337         }
6338 }
6339
6340 int main(int argc, char **argv)
6341 {
6342         outf = stderr;
6343         cmdline(argc, argv);
6344
6345         if (!quiet)
6346                 print_version();
6347
6348         probe_sysfs();
6349
6350         turbostat_init();
6351
6352         /* dump counters and exit */
6353         if (dump_only)
6354                 return get_and_dump_counters();
6355
6356         /* list header and exit */
6357         if (list_header_only) {
6358                 print_header(",");
6359                 flush_output_stdout();
6360                 return 0;
6361         }
6362
6363         msr_sum_record();
6364         /*
6365          * if any params left, it must be a command to fork
6366          */
6367         if (argc - optind)
6368                 return fork_it(argv + optind);
6369         else
6370                 turbostat_loop();
6371
6372         return 0;
6373 }