tools/power/x86/turbostat/turbostat.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * turbostat -- show CPU frequency and C-state residency
   4  * on modern Intel and AMD processors.
   5  *
   6  * Copyright (c) 2013 Intel Corporation.
   7  * Len Brown <len.brown@intel.com>
   8  */
   9
  10 #define _GNU_SOURCE
  11 #include MSRHEADER
  12 #include INTEL_FAMILY_HEADER
  13 #include <stdarg.h>
  14 #include <stdio.h>
  15 #include <err.h>
  16 #include <unistd.h>
  17 #include <sys/types.h>
  18 #include <sys/wait.h>
  19 #include <sys/stat.h>
  20 #include <sys/select.h>
  21 #include <sys/resource.h>
  22 #include <fcntl.h>
  23 #include <signal.h>
  24 #include <sys/time.h>
  25 #include <stdlib.h>
  26 #include <getopt.h>
  27 #include <dirent.h>
  28 #include <string.h>
  29 #include <ctype.h>
  30 #include <sched.h>
  31 #include <time.h>
  32 #include <cpuid.h>
  33 #include <sys/capability.h>
  34 #include <errno.h>
  35 #include <math.h>
  36 #include <linux/perf_event.h>
  37 #include <asm/unistd.h>
  38
  39 char *proc_stat = "/proc/stat";
  40 FILE *outf;
  41 int *fd_percpu;
  42 int *fd_instr_count_percpu;
  43 struct timeval interval_tv = {5, 0};
  44 struct timespec interval_ts = {5, 0};
  45 unsigned int num_iterations;
  46 unsigned int debug;
  47 unsigned int quiet;
  48 unsigned int shown;
  49 unsigned int sums_need_wide_columns;
  50 unsigned int rapl_joules;
  51 unsigned int summary_only;
  52 unsigned int list_header_only;
  53 unsigned int dump_only;
  54 unsigned int do_snb_cstates;
  55 unsigned int do_knl_cstates;
  56 unsigned int do_slm_cstates;
  57 unsigned int use_c1_residency_msr;
  58 unsigned int has_aperf;
  59 unsigned int has_epb;
  60 unsigned int do_irtl_snb;
  61 unsigned int do_irtl_hsw;
  62 unsigned int units = 1000000;   /* MHz etc */
  63 unsigned int genuine_intel;
  64 unsigned int authentic_amd;
  65 unsigned int hygon_genuine;
  66 unsigned int max_level, max_extended_level;
  67 unsigned int has_invariant_tsc;
  68 unsigned int do_nhm_platform_info;
  69 unsigned int no_MSR_MISC_PWR_MGMT;
  70 unsigned int aperf_mperf_multiplier = 1;
  71 double bclk;
  72 double base_hz;
  73 unsigned int has_base_hz;
  74 double tsc_tweak = 1.0;
  75 unsigned int show_pkg_only;
  76 unsigned int show_core_only;
  77 char *output_buffer, *outp;
  78 unsigned int do_rapl;
  79 unsigned int do_dts;
  80 unsigned int do_ptm;
  81 unsigned int do_ipc;
  82 unsigned long long  gfx_cur_rc6_ms;
  83 unsigned long long cpuidle_cur_cpu_lpi_us;
  84 unsigned long long cpuidle_cur_sys_lpi_us;
  85 unsigned int gfx_cur_mhz;
  86 unsigned int gfx_act_mhz;
  87 unsigned int tcc_activation_temp;
  88 unsigned int tcc_activation_temp_override;
  89 double rapl_power_units, rapl_time_units;
  90 double rapl_dram_energy_units, rapl_energy_units;
  91 double rapl_joule_counter_range;
  92 unsigned int do_core_perf_limit_reasons;
  93 unsigned int has_automatic_cstate_conversion;
  94 unsigned int do_gfx_perf_limit_reasons;
  95 unsigned int do_ring_perf_limit_reasons;
  96 unsigned int crystal_hz;
  97 unsigned long long tsc_hz;
  98 int base_cpu;
  99 double discover_bclk(unsigned int family, unsigned int model);
 100 unsigned int has_hwp;   /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
 101                         /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
 102 unsigned int has_hwp_notify;            /* IA32_HWP_INTERRUPT */
 103 unsigned int has_hwp_activity_window;   /* IA32_HWP_REQUEST[bits 41:32] */
 104 unsigned int has_hwp_epp;               /* IA32_HWP_REQUEST[bits 31:24] */
 105 unsigned int has_hwp_pkg;               /* IA32_HWP_REQUEST_PKG */
 106 unsigned int has_misc_feature_control;
 107 unsigned int first_counter_read = 1;
 108 int ignore_stdin;
 109
 110 #define RAPL_PKG                (1 << 0)
 111                                         /* 0x610 MSR_PKG_POWER_LIMIT */
 112                                         /* 0x611 MSR_PKG_ENERGY_STATUS */
 113 #define RAPL_PKG_PERF_STATUS    (1 << 1)
 114                                         /* 0x613 MSR_PKG_PERF_STATUS */
 115 #define RAPL_PKG_POWER_INFO     (1 << 2)
 116                                         /* 0x614 MSR_PKG_POWER_INFO */
 117
 118 #define RAPL_DRAM               (1 << 3)
 119                                         /* 0x618 MSR_DRAM_POWER_LIMIT */
 120                                         /* 0x619 MSR_DRAM_ENERGY_STATUS */
 121 #define RAPL_DRAM_PERF_STATUS   (1 << 4)
 122                                         /* 0x61b MSR_DRAM_PERF_STATUS */
 123 #define RAPL_DRAM_POWER_INFO    (1 << 5)
 124                                         /* 0x61c MSR_DRAM_POWER_INFO */
 125
 126 #define RAPL_CORES_POWER_LIMIT  (1 << 6)
 127                                         /* 0x638 MSR_PP0_POWER_LIMIT */
 128 #define RAPL_CORE_POLICY        (1 << 7)
 129                                         /* 0x63a MSR_PP0_POLICY */
 130
 131 #define RAPL_GFX                (1 << 8)
 132                                         /* 0x640 MSR_PP1_POWER_LIMIT */
 133                                         /* 0x641 MSR_PP1_ENERGY_STATUS */
 134                                         /* 0x642 MSR_PP1_POLICY */
 135
 136 #define RAPL_CORES_ENERGY_STATUS        (1 << 9)
 137                                         /* 0x639 MSR_PP0_ENERGY_STATUS */
 138 #define RAPL_PER_CORE_ENERGY    (1 << 10)
 139                                         /* Indicates cores energy collection is per-core,
 140                                          * not per-package. */
 141 #define RAPL_AMD_F17H           (1 << 11)
 142                                         /* 0xc0010299 MSR_RAPL_PWR_UNIT */
 143                                         /* 0xc001029a MSR_CORE_ENERGY_STAT */
 144                                         /* 0xc001029b MSR_PKG_ENERGY_STAT */
 145 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
 146 #define TJMAX_DEFAULT   100
 147
 148 /* MSRs that are not yet in the kernel-provided header. */
 149 #define MSR_RAPL_PWR_UNIT       0xc0010299
 150 #define MSR_CORE_ENERGY_STAT    0xc001029a
 151 #define MSR_PKG_ENERGY_STAT     0xc001029b
 152
 153 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 154
 155 /*
 156  * buffer size used by sscanf() for added column names
 157  * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
 158  */
 159 #define NAME_BYTES 20
 160 #define PATH_BYTES 128
 161
 162 int backwards_count;
 163 char *progname;
 164
 165 #define CPU_SUBSET_MAXCPUS      1024    /* need to use before probe... */
 166 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
 167 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
 168 #define MAX_ADDED_COUNTERS 8
 169 #define MAX_ADDED_THREAD_COUNTERS 24
 170 #define BITMASK_SIZE 32
 171
 172 struct thread_data {
 173         struct timeval tv_begin;
 174         struct timeval tv_end;
 175         struct timeval tv_delta;
 176         unsigned long long tsc;
 177         unsigned long long aperf;
 178         unsigned long long mperf;
 179         unsigned long long c1;
 180         unsigned long long instr_count;
 181         unsigned long long  irq_count;
 182         unsigned int smi_count;
 183         unsigned int cpu_id;
 184         unsigned int apic_id;
 185         unsigned int x2apic_id;
 186         unsigned int flags;
 187 #define CPU_IS_FIRST_THREAD_IN_CORE     0x2
 188 #define CPU_IS_FIRST_CORE_IN_PACKAGE    0x4
 189         unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
 190 } *thread_even, *thread_odd;
 191
 192 struct core_data {
 193         unsigned long long c3;
 194         unsigned long long c6;
 195         unsigned long long c7;
 196         unsigned long long mc6_us;      /* duplicate as per-core for now, even though per module */
 197         unsigned int core_temp_c;
 198         unsigned int core_energy;       /* MSR_CORE_ENERGY_STAT */
 199         unsigned int core_id;
 200         unsigned long long counter[MAX_ADDED_COUNTERS];
 201 } *core_even, *core_odd;
 202
 203 struct pkg_data {
 204         unsigned long long pc2;
 205         unsigned long long pc3;
 206         unsigned long long pc6;
 207         unsigned long long pc7;
 208         unsigned long long pc8;
 209         unsigned long long pc9;
 210         unsigned long long pc10;
 211         unsigned long long cpu_lpi;
 212         unsigned long long sys_lpi;
 213         unsigned long long pkg_wtd_core_c0;
 214         unsigned long long pkg_any_core_c0;
 215         unsigned long long pkg_any_gfxe_c0;
 216         unsigned long long pkg_both_core_gfxe_c0;
 217         long long gfx_rc6_ms;
 218         unsigned int gfx_mhz;
 219         unsigned int gfx_act_mhz;
 220         unsigned int package_id;
 221         unsigned long long energy_pkg;  /* MSR_PKG_ENERGY_STATUS */
 222         unsigned long long energy_dram; /* MSR_DRAM_ENERGY_STATUS */
 223         unsigned long long energy_cores;        /* MSR_PP0_ENERGY_STATUS */
 224         unsigned long long energy_gfx;  /* MSR_PP1_ENERGY_STATUS */
 225         unsigned long long rapl_pkg_perf_status;        /* MSR_PKG_PERF_STATUS */
 226         unsigned long long rapl_dram_perf_status;       /* MSR_DRAM_PERF_STATUS */
 227         unsigned int pkg_temp_c;
 228         unsigned long long counter[MAX_ADDED_COUNTERS];
 229 } *package_even, *package_odd;
 230
 231 #define ODD_COUNTERS thread_odd, core_odd, package_odd
 232 #define EVEN_COUNTERS thread_even, core_even, package_even
 233
 234 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no)          \
 235         ((thread_base) +                                                      \
 236          ((pkg_no) *                                                          \
 237           topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
 238          ((node_no) * topo.cores_per_node * topo.threads_per_core) +          \
 239          ((core_no) * topo.threads_per_core) +                                \
 240          (thread_no))
 241
 242 #define GET_CORE(core_base, core_no, node_no, pkg_no)                   \
 243         ((core_base) +                                                  \
 244          ((pkg_no) *  topo.nodes_per_pkg * topo.cores_per_node) +       \
 245          ((node_no) * topo.cores_per_node) +                            \
 246          (core_no))
 247
 248
 249 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
 250
 251 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
 252 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
 253 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
 254
 255 struct msr_counter {
 256         unsigned int msr_num;
 257         char name[NAME_BYTES];
 258         char path[PATH_BYTES];
 259         unsigned int width;
 260         enum counter_type type;
 261         enum counter_format format;
 262         struct msr_counter *next;
 263         unsigned int flags;
 264 #define FLAGS_HIDE      (1 << 0)
 265 #define FLAGS_SHOW      (1 << 1)
 266 #define SYSFS_PERCPU    (1 << 1)
 267 };
 268
 269 /*
 270  * The accumulated sum of MSR is defined as a monotonic
 271  * increasing MSR, it will be accumulated periodically,
 272  * despite its register's bit width.
 273  */
 274 enum {
 275         IDX_PKG_ENERGY,
 276         IDX_DRAM_ENERGY,
 277         IDX_PP0_ENERGY,
 278         IDX_PP1_ENERGY,
 279         IDX_PKG_PERF,
 280         IDX_DRAM_PERF,
 281         IDX_COUNT,
 282 };
 283
 284 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr);
 285
 286 struct msr_sum_array {
 287         /* get_msr_sum() = sum + (get_msr() - last) */
 288         struct {
 289                 /*The accumulated MSR value is updated by the timer*/
 290                 unsigned long long sum;
 291                 /*The MSR footprint recorded in last timer*/
 292                 unsigned long long last;
 293         } entries[IDX_COUNT];
 294 };
 295
 296 /* The percpu MSR sum array.*/
 297 struct msr_sum_array *per_cpu_msr_sum;
 298
 299 int idx_to_offset(int idx)
 300 {
 301         int offset;
 302
 303         switch (idx) {
 304         case IDX_PKG_ENERGY:
 305                 if (do_rapl & RAPL_AMD_F17H)
 306                         offset = MSR_PKG_ENERGY_STAT;
 307                 else
 308                         offset = MSR_PKG_ENERGY_STATUS;
 309                 break;
 310         case IDX_DRAM_ENERGY:
 311                 offset = MSR_DRAM_ENERGY_STATUS;
 312                 break;
 313         case IDX_PP0_ENERGY:
 314                 offset = MSR_PP0_ENERGY_STATUS;
 315                 break;
 316         case IDX_PP1_ENERGY:
 317                 offset = MSR_PP1_ENERGY_STATUS;
 318                 break;
 319         case IDX_PKG_PERF:
 320                 offset = MSR_PKG_PERF_STATUS;
 321                 break;
 322         case IDX_DRAM_PERF:
 323                 offset = MSR_DRAM_PERF_STATUS;
 324                 break;
 325         default:
 326                 offset = -1;
 327         }
 328         return offset;
 329 }
 330
 331 int offset_to_idx(int offset)
 332 {
 333         int idx;
 334
 335         switch (offset) {
 336         case MSR_PKG_ENERGY_STATUS:
 337         case MSR_PKG_ENERGY_STAT:
 338                 idx = IDX_PKG_ENERGY;
 339                 break;
 340         case MSR_DRAM_ENERGY_STATUS:
 341                 idx = IDX_DRAM_ENERGY;
 342                 break;
 343         case MSR_PP0_ENERGY_STATUS:
 344                 idx = IDX_PP0_ENERGY;
 345                 break;
 346         case MSR_PP1_ENERGY_STATUS:
 347                 idx = IDX_PP1_ENERGY;
 348                 break;
 349         case MSR_PKG_PERF_STATUS:
 350                 idx = IDX_PKG_PERF;
 351                 break;
 352         case MSR_DRAM_PERF_STATUS:
 353                 idx = IDX_DRAM_PERF;
 354                 break;
 355         default:
 356                 idx = -1;
 357         }
 358         return idx;
 359 }
 360
 361 int idx_valid(int idx)
 362 {
 363         switch (idx) {
 364         case IDX_PKG_ENERGY:
 365                 return do_rapl & (RAPL_PKG | RAPL_AMD_F17H);
 366         case IDX_DRAM_ENERGY:
 367                 return do_rapl & RAPL_DRAM;
 368         case IDX_PP0_ENERGY:
 369                 return do_rapl & RAPL_CORES_ENERGY_STATUS;
 370         case IDX_PP1_ENERGY:
 371                 return do_rapl & RAPL_GFX;
 372         case IDX_PKG_PERF:
 373                 return do_rapl & RAPL_PKG_PERF_STATUS;
 374         case IDX_DRAM_PERF:
 375                 return do_rapl & RAPL_DRAM_PERF_STATUS;
 376         default:
 377                 return 0;
 378         }
 379 }
 380 struct sys_counters {
 381         unsigned int added_thread_counters;
 382         unsigned int added_core_counters;
 383         unsigned int added_package_counters;
 384         struct msr_counter *tp;
 385         struct msr_counter *cp;
 386         struct msr_counter *pp;
 387 } sys;
 388
 389 struct system_summary {
 390         struct thread_data threads;
 391         struct core_data cores;
 392         struct pkg_data packages;
 393 } average;
 394
 395 struct cpu_topology {
 396         int physical_package_id;
 397         int die_id;
 398         int logical_cpu_id;
 399         int physical_node_id;
 400         int logical_node_id;    /* 0-based count within the package */
 401         int physical_core_id;
 402         int thread_id;
 403         cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
 404 } *cpus;
 405
 406 struct topo_params {
 407         int num_packages;
 408         int num_die;
 409         int num_cpus;
 410         int num_cores;
 411         int max_cpu_num;
 412         int max_node_num;
 413         int nodes_per_pkg;
 414         int cores_per_node;
 415         int threads_per_core;
 416 } topo;
 417
 418 struct timeval tv_even, tv_odd, tv_delta;
 419
 420 int *irq_column_2_cpu;  /* /proc/interrupts column numbers */
 421 int *irqs_per_cpu;              /* indexed by cpu_num */
 422
 423 void setup_all_buffers(void);
 424
 425 char *sys_lpi_file;
 426 char *sys_lpi_file_sysfs = "/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us";
 427 char *sys_lpi_file_debugfs = "/sys/kernel/debug/pmc_core/slp_s0_residency_usec";
 428
 429 int cpu_is_not_present(int cpu)
 430 {
 431         return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
 432 }
 433 /*
 434  * run func(thread, core, package) in topology order
 435  * skip non-present cpus
 436  */
 437
 438 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
 439         struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
 440 {
 441         int retval, pkg_no, core_no, thread_no, node_no;
 442
 443         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
 444                 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
 445                         for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
 446                                 for (thread_no = 0; thread_no <
 447                                         topo.threads_per_core; ++thread_no) {
 448                                         struct thread_data *t;
 449                                         struct core_data *c;
 450                                         struct pkg_data *p;
 451
 452                                         t = GET_THREAD(thread_base, thread_no,
 453                                                        core_no, node_no,
 454                                                        pkg_no);
 455
 456                                         if (cpu_is_not_present(t->cpu_id))
 457                                                 continue;
 458
 459                                         c = GET_CORE(core_base, core_no,
 460                                                      node_no, pkg_no);
 461                                         p = GET_PKG(pkg_base, pkg_no);
 462
 463                                         retval = func(t, c, p);
 464                                         if (retval)
 465                                                 return retval;
 466                                 }
 467                         }
 468                 }
 469         }
 470         return 0;
 471 }
 472
 473 int cpu_migrate(int cpu)
 474 {
 475         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
 476         CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
 477         if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
 478                 return -1;
 479         else
 480                 return 0;
 481 }
 482 int get_msr_fd(int cpu)
 483 {
 484         char pathname[32];
 485         int fd;
 486
 487         fd = fd_percpu[cpu];
 488
 489         if (fd)
 490                 return fd;
 491
 492         sprintf(pathname, "/dev/cpu/%d/msr", cpu);
 493         fd = open(pathname, O_RDONLY);
 494         if (fd < 0)
 495                 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
 496
 497         fd_percpu[cpu] = fd;
 498
 499         return fd;
 500 }
 501
 502 static long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu, int group_fd, unsigned long flags)
 503 {
 504         return syscall(__NR_perf_event_open, hw_event, pid, cpu, group_fd, flags);
 505 }
 506
 507 static int perf_instr_count_open(int cpu_num)
 508 {
 509         struct perf_event_attr pea;
 510         int fd;
 511
 512         memset(&pea, 0, sizeof(struct perf_event_attr));
 513         pea.type = PERF_TYPE_HARDWARE;
 514         pea.size = sizeof(struct perf_event_attr);
 515         pea.config = PERF_COUNT_HW_INSTRUCTIONS;
 516
 517         /* counter for cpu_num, including user + kernel and all processes */
 518         fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
 519         if (fd == -1)
 520                 err(-1, "cpu%d: perf instruction counter\n", cpu_num);
 521
 522         return fd;
 523 }
 524
 525 int get_instr_count_fd(int cpu)
 526 {
 527         if (fd_instr_count_percpu[cpu])
 528                 return fd_instr_count_percpu[cpu];
 529
 530         fd_instr_count_percpu[cpu] = perf_instr_count_open(cpu);
 531
 532         return fd_instr_count_percpu[cpu];
 533 }
 534
 535 int get_msr(int cpu, off_t offset, unsigned long long *msr)
 536 {
 537         ssize_t retval;
 538
 539         retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
 540
 541         if (retval != sizeof *msr)
 542                 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
 543
 544         return 0;
 545 }
 546
 547 /*
 548  * This list matches the column headers, except
 549  * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
 550  * 2. Core and CPU are moved to the end, we can't have strings that contain them
 551  *    matching on them for --show and --hide.
 552  */
 553 struct msr_counter bic[] = {
 554         { 0x0, "usec" },
 555         { 0x0, "Time_Of_Day_Seconds" },
 556         { 0x0, "Package" },
 557         { 0x0, "Node" },
 558         { 0x0, "Avg_MHz" },
 559         { 0x0, "Busy%" },
 560         { 0x0, "Bzy_MHz" },
 561         { 0x0, "TSC_MHz" },
 562         { 0x0, "IRQ" },
 563         { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
 564         { 0x0, "sysfs" },
 565         { 0x0, "CPU%c1" },
 566         { 0x0, "CPU%c3" },
 567         { 0x0, "CPU%c6" },
 568         { 0x0, "CPU%c7" },
 569         { 0x0, "ThreadC" },
 570         { 0x0, "CoreTmp" },
 571         { 0x0, "CoreCnt" },
 572         { 0x0, "PkgTmp" },
 573         { 0x0, "GFX%rc6" },
 574         { 0x0, "GFXMHz" },
 575         { 0x0, "Pkg%pc2" },
 576         { 0x0, "Pkg%pc3" },
 577         { 0x0, "Pkg%pc6" },
 578         { 0x0, "Pkg%pc7" },
 579         { 0x0, "Pkg%pc8" },
 580         { 0x0, "Pkg%pc9" },
 581         { 0x0, "Pk%pc10" },
 582         { 0x0, "CPU%LPI" },
 583         { 0x0, "SYS%LPI" },
 584         { 0x0, "PkgWatt" },
 585         { 0x0, "CorWatt" },
 586         { 0x0, "GFXWatt" },
 587         { 0x0, "PkgCnt" },
 588         { 0x0, "RAMWatt" },
 589         { 0x0, "PKG_%" },
 590         { 0x0, "RAM_%" },
 591         { 0x0, "Pkg_J" },
 592         { 0x0, "Cor_J" },
 593         { 0x0, "GFX_J" },
 594         { 0x0, "RAM_J" },
 595         { 0x0, "Mod%c6" },
 596         { 0x0, "Totl%C0" },
 597         { 0x0, "Any%C0" },
 598         { 0x0, "GFX%C0" },
 599         { 0x0, "CPUGFX%" },
 600         { 0x0, "Core" },
 601         { 0x0, "CPU" },
 602         { 0x0, "APIC" },
 603         { 0x0, "X2APIC" },
 604         { 0x0, "Die" },
 605         { 0x0, "GFXAMHz" },
 606         { 0x0, "IPC" },
 607 };
 608
 609 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
 610 #define BIC_USEC        (1ULL << 0)
 611 #define BIC_TOD         (1ULL << 1)
 612 #define BIC_Package     (1ULL << 2)
 613 #define BIC_Node        (1ULL << 3)
 614 #define BIC_Avg_MHz     (1ULL << 4)
 615 #define BIC_Busy        (1ULL << 5)
 616 #define BIC_Bzy_MHz     (1ULL << 6)
 617 #define BIC_TSC_MHz     (1ULL << 7)
 618 #define BIC_IRQ         (1ULL << 8)
 619 #define BIC_SMI         (1ULL << 9)
 620 #define BIC_sysfs       (1ULL << 10)
 621 #define BIC_CPU_c1      (1ULL << 11)
 622 #define BIC_CPU_c3      (1ULL << 12)
 623 #define BIC_CPU_c6      (1ULL << 13)
 624 #define BIC_CPU_c7      (1ULL << 14)
 625 #define BIC_ThreadC     (1ULL << 15)
 626 #define BIC_CoreTmp     (1ULL << 16)
 627 #define BIC_CoreCnt     (1ULL << 17)
 628 #define BIC_PkgTmp      (1ULL << 18)
 629 #define BIC_GFX_rc6     (1ULL << 19)
 630 #define BIC_GFXMHz      (1ULL << 20)
 631 #define BIC_Pkgpc2      (1ULL << 21)
 632 #define BIC_Pkgpc3      (1ULL << 22)
 633 #define BIC_Pkgpc6      (1ULL << 23)
 634 #define BIC_Pkgpc7      (1ULL << 24)
 635 #define BIC_Pkgpc8      (1ULL << 25)
 636 #define BIC_Pkgpc9      (1ULL << 26)
 637 #define BIC_Pkgpc10     (1ULL << 27)
 638 #define BIC_CPU_LPI     (1ULL << 28)
 639 #define BIC_SYS_LPI     (1ULL << 29)
 640 #define BIC_PkgWatt     (1ULL << 30)
 641 #define BIC_CorWatt     (1ULL << 31)
 642 #define BIC_GFXWatt     (1ULL << 32)
 643 #define BIC_PkgCnt      (1ULL << 33)
 644 #define BIC_RAMWatt     (1ULL << 34)
 645 #define BIC_PKG__       (1ULL << 35)
 646 #define BIC_RAM__       (1ULL << 36)
 647 #define BIC_Pkg_J       (1ULL << 37)
 648 #define BIC_Cor_J       (1ULL << 38)
 649 #define BIC_GFX_J       (1ULL << 39)
 650 #define BIC_RAM_J       (1ULL << 40)
 651 #define BIC_Mod_c6      (1ULL << 41)
 652 #define BIC_Totl_c0     (1ULL << 42)
 653 #define BIC_Any_c0      (1ULL << 43)
 654 #define BIC_GFX_c0      (1ULL << 44)
 655 #define BIC_CPUGFX      (1ULL << 45)
 656 #define BIC_Core        (1ULL << 46)
 657 #define BIC_CPU         (1ULL << 47)
 658 #define BIC_APIC        (1ULL << 48)
 659 #define BIC_X2APIC      (1ULL << 49)
 660 #define BIC_Die         (1ULL << 50)
 661 #define BIC_GFXACTMHz   (1ULL << 51)
 662 #define BIC_IPC         (1ULL << 52)
 663
 664 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
 665
 666 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
 667 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
 668
 669 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
 670 #define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
 671 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
 672 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
 673 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
 674 #define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
 675
 676
 677 #define MAX_DEFERRED 16
 678 char *deferred_skip_names[MAX_DEFERRED];
 679 int deferred_skip_index;
 680
 681 /*
 682  * HIDE_LIST - hide this list of counters, show the rest [default]
 683  * SHOW_LIST - show this list of counters, hide the rest
 684  */
 685 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
 686
 687 void help(void)
 688 {
 689         fprintf(outf,
 690         "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
 691         "\n"
 692         "Turbostat forks the specified COMMAND and prints statistics\n"
 693         "when COMMAND completes.\n"
 694         "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
 695         "to print statistics, until interrupted.\n"
 696         "  -a, --add    add a counter\n"
 697         "                 eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
 698         "  -c, --cpu    cpu-set limit output to summary plus cpu-set:\n"
 699         "                 {core | package | j,k,l..m,n-p }\n"
 700         "  -d, --debug  displays usec, Time_Of_Day_Seconds and more debugging\n"
 701         "  -D, --Dump   displays the raw counter values\n"
 702         "  -e, --enable [all | column]\n"
 703         "               shows all or the specified disabled column\n"
 704         "  -H, --hide [column|column,column,...]\n"
 705         "               hide the specified column(s)\n"
 706         "  -i, --interval sec.subsec\n"
 707         "               Override default 5-second measurement interval\n"
 708         "  -J, --Joules displays energy in Joules instead of Watts\n"
 709         "  -l, --list   list column headers only\n"
 710         "  -n, --num_iterations num\n"
 711         "               number of the measurement iterations\n"
 712         "  -o, --out file\n"
 713         "               create or truncate \"file\" for all output\n"
 714         "  -q, --quiet  skip decoding system configuration header\n"
 715         "  -s, --show [column|column,column,...]\n"
 716         "               show only the specified column(s)\n"
 717         "  -S, --Summary\n"
 718         "               limits output to 1-line system summary per interval\n"
 719         "  -T, --TCC temperature\n"
 720         "               sets the Thermal Control Circuit temperature in\n"
 721         "                 degrees Celsius\n"
 722         "  -h, --help   print this help message\n"
 723         "  -v, --version        print version information\n"
 724         "\n"
 725         "For more help, run \"man turbostat\"\n");
 726 }
 727
 728 /*
 729  * bic_lookup
 730  * for all the strings in comma separate name_list,
 731  * set the approprate bit in return value.
 732  */
 733 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
 734 {
 735         int i;
 736         unsigned long long retval = 0;
 737
 738         while (name_list) {
 739                 char *comma;
 740
 741                 comma = strchr(name_list, ',');
 742
 743                 if (comma)
 744                         *comma = '\0';
 745
 746                 if (!strcmp(name_list, "all"))
 747                         return ~0;
 748
 749                 for (i = 0; i < MAX_BIC; ++i) {
 750                         if (!strcmp(name_list, bic[i].name)) {
 751                                 retval |= (1ULL << i);
 752                                 break;
 753                         }
 754                 }
 755                 if (i == MAX_BIC) {
 756                         if (mode == SHOW_LIST) {
 757                                 fprintf(stderr, "Invalid counter name: %s\n", name_list);
 758                                 exit(-1);
 759                         }
 760                         deferred_skip_names[deferred_skip_index++] = name_list;
 761                         if (debug)
 762                                 fprintf(stderr, "deferred \"%s\"\n", name_list);
 763                         if (deferred_skip_index >= MAX_DEFERRED) {
 764                                 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
 765                                         MAX_DEFERRED, name_list);
 766                                 help();
 767                                 exit(1);
 768                         }
 769                 }
 770
 771                 name_list = comma;
 772                 if (name_list)
 773                         name_list++;
 774
 775         }
 776         return retval;
 777 }
 778
 779
 780 void print_header(char *delim)
 781 {
 782         struct msr_counter *mp;
 783         int printed = 0;
 784
 785         if (DO_BIC(BIC_USEC))
 786                 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
 787         if (DO_BIC(BIC_TOD))
 788                 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
 789         if (DO_BIC(BIC_Package))
 790                 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
 791         if (DO_BIC(BIC_Die))
 792                 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
 793         if (DO_BIC(BIC_Node))
 794                 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
 795         if (DO_BIC(BIC_Core))
 796                 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
 797         if (DO_BIC(BIC_CPU))
 798                 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
 799         if (DO_BIC(BIC_APIC))
 800                 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
 801         if (DO_BIC(BIC_X2APIC))
 802                 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
 803         if (DO_BIC(BIC_Avg_MHz))
 804                 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
 805         if (DO_BIC(BIC_Busy))
 806                 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
 807         if (DO_BIC(BIC_Bzy_MHz))
 808                 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
 809         if (DO_BIC(BIC_TSC_MHz))
 810                 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
 811
 812         if (DO_BIC(BIC_IPC))
 813                 outp += sprintf(outp, "%sIPC", (printed++ ? delim : ""));
 814
 815         if (DO_BIC(BIC_IRQ)) {
 816                 if (sums_need_wide_columns)
 817                         outp += sprintf(outp, "%s     IRQ", (printed++ ? delim : ""));
 818                 else
 819                         outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
 820         }
 821
 822         if (DO_BIC(BIC_SMI))
 823                 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
 824
 825         for (mp = sys.tp; mp; mp = mp->next) {
 826
 827                 if (mp->format == FORMAT_RAW) {
 828                         if (mp->width == 64)
 829                                 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
 830                         else
 831                                 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
 832                 } else {
 833                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 834                                 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
 835                         else
 836                                 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
 837                 }
 838         }
 839
 840         if (DO_BIC(BIC_CPU_c1))
 841                 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
 842         if (DO_BIC(BIC_CPU_c3))
 843                 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
 844         if (DO_BIC(BIC_CPU_c6))
 845                 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
 846         if (DO_BIC(BIC_CPU_c7))
 847                 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
 848
 849         if (DO_BIC(BIC_Mod_c6))
 850                 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
 851
 852         if (DO_BIC(BIC_CoreTmp))
 853                 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
 854
 855         if (do_rapl && !rapl_joules) {
 856                 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
 857                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 858         } else if (do_rapl && rapl_joules) {
 859                 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
 860                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 861         }
 862
 863         for (mp = sys.cp; mp; mp = mp->next) {
 864                 if (mp->format == FORMAT_RAW) {
 865                         if (mp->width == 64)
 866                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 867                         else
 868                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 869                 } else {
 870                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 871                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 872                         else
 873                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 874                 }
 875         }
 876
 877         if (DO_BIC(BIC_PkgTmp))
 878                 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
 879
 880         if (DO_BIC(BIC_GFX_rc6))
 881                 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
 882
 883         if (DO_BIC(BIC_GFXMHz))
 884                 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
 885
 886         if (DO_BIC(BIC_GFXACTMHz))
 887                 outp += sprintf(outp, "%sGFXAMHz", (printed++ ? delim : ""));
 888
 889         if (DO_BIC(BIC_Totl_c0))
 890                 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
 891         if (DO_BIC(BIC_Any_c0))
 892                 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
 893         if (DO_BIC(BIC_GFX_c0))
 894                 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
 895         if (DO_BIC(BIC_CPUGFX))
 896                 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
 897
 898         if (DO_BIC(BIC_Pkgpc2))
 899                 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
 900         if (DO_BIC(BIC_Pkgpc3))
 901                 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
 902         if (DO_BIC(BIC_Pkgpc6))
 903                 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
 904         if (DO_BIC(BIC_Pkgpc7))
 905                 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
 906         if (DO_BIC(BIC_Pkgpc8))
 907                 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
 908         if (DO_BIC(BIC_Pkgpc9))
 909                 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
 910         if (DO_BIC(BIC_Pkgpc10))
 911                 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
 912         if (DO_BIC(BIC_CPU_LPI))
 913                 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
 914         if (DO_BIC(BIC_SYS_LPI))
 915                 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
 916
 917         if (do_rapl && !rapl_joules) {
 918                 if (DO_BIC(BIC_PkgWatt))
 919                         outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
 920                 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 921                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 922                 if (DO_BIC(BIC_GFXWatt))
 923                         outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
 924                 if (DO_BIC(BIC_RAMWatt))
 925                         outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
 926                 if (DO_BIC(BIC_PKG__))
 927                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 928                 if (DO_BIC(BIC_RAM__))
 929                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 930         } else if (do_rapl && rapl_joules) {
 931                 if (DO_BIC(BIC_Pkg_J))
 932                         outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
 933                 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 934                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 935                 if (DO_BIC(BIC_GFX_J))
 936                         outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
 937                 if (DO_BIC(BIC_RAM_J))
 938                         outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
 939                 if (DO_BIC(BIC_PKG__))
 940                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 941                 if (DO_BIC(BIC_RAM__))
 942                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 943         }
 944         for (mp = sys.pp; mp; mp = mp->next) {
 945                 if (mp->format == FORMAT_RAW) {
 946                         if (mp->width == 64)
 947                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 948                         else
 949                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 950                 } else {
 951                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 952                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 953                         else
 954                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 955                 }
 956         }
 957
 958         outp += sprintf(outp, "\n");
 959 }
 960
 961 int dump_counters(struct thread_data *t, struct core_data *c,
 962         struct pkg_data *p)
 963 {
 964         int i;
 965         struct msr_counter *mp;
 966
 967         outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
 968
 969         if (t) {
 970                 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
 971                         t->cpu_id, t->flags);
 972                 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
 973                 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
 974                 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
 975                 outp += sprintf(outp, "c1: %016llX\n", t->c1);
 976
 977                 if (DO_BIC(BIC_IPC))
 978                         outp += sprintf(outp, "IPC: %lld\n", t->instr_count);
 979
 980                 if (DO_BIC(BIC_IRQ))
 981                         outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
 982                 if (DO_BIC(BIC_SMI))
 983                         outp += sprintf(outp, "SMI: %d\n", t->smi_count);
 984
 985                 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
 986                         outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
 987                                 i, mp->msr_num, t->counter[i]);
 988                 }
 989         }
 990
 991         if (c) {
 992                 outp += sprintf(outp, "core: %d\n", c->core_id);
 993                 outp += sprintf(outp, "c3: %016llX\n", c->c3);
 994                 outp += sprintf(outp, "c6: %016llX\n", c->c6);
 995                 outp += sprintf(outp, "c7: %016llX\n", c->c7);
 996                 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
 997                 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
 998
 999                 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1000                         outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
1001                                 i, mp->msr_num, c->counter[i]);
1002                 }
1003                 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
1004         }
1005
1006         if (p) {
1007                 outp += sprintf(outp, "package: %d\n", p->package_id);
1008
1009                 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
1010                 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
1011                 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
1012                 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
1013
1014                 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
1015                 if (DO_BIC(BIC_Pkgpc3))
1016                         outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
1017                 if (DO_BIC(BIC_Pkgpc6))
1018                         outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
1019                 if (DO_BIC(BIC_Pkgpc7))
1020                         outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
1021                 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
1022                 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
1023                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
1024                 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
1025                 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
1026                 outp += sprintf(outp, "Joules PKG: %0llX\n", p->energy_pkg);
1027                 outp += sprintf(outp, "Joules COR: %0llX\n", p->energy_cores);
1028                 outp += sprintf(outp, "Joules GFX: %0llX\n", p->energy_gfx);
1029                 outp += sprintf(outp, "Joules RAM: %0llX\n", p->energy_dram);
1030                 outp += sprintf(outp, "Throttle PKG: %0llX\n",
1031                         p->rapl_pkg_perf_status);
1032                 outp += sprintf(outp, "Throttle RAM: %0llX\n",
1033                         p->rapl_dram_perf_status);
1034                 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
1035
1036                 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1037                         outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
1038                                 i, mp->msr_num, p->counter[i]);
1039                 }
1040         }
1041
1042         outp += sprintf(outp, "\n");
1043
1044         return 0;
1045 }
1046
1047 /*
1048  * column formatting convention & formats
1049  */
1050 int format_counters(struct thread_data *t, struct core_data *c,
1051         struct pkg_data *p)
1052 {
1053         double interval_float, tsc;
1054         char *fmt8;
1055         int i;
1056         struct msr_counter *mp;
1057         char *delim = "\t";
1058         int printed = 0;
1059
1060          /* if showing only 1st thread in core and this isn't one, bail out */
1061         if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1062                 return 0;
1063
1064          /* if showing only 1st thread in pkg and this isn't one, bail out */
1065         if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1066                 return 0;
1067
1068         /*if not summary line and --cpu is used */
1069         if ((t != &average.threads) &&
1070                 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
1071                 return 0;
1072
1073         if (DO_BIC(BIC_USEC)) {
1074                 /* on each row, print how many usec each timestamp took to gather */
1075                 struct timeval tv;
1076
1077                 timersub(&t->tv_end, &t->tv_begin, &tv);
1078                 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
1079         }
1080
1081         /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
1082         if (DO_BIC(BIC_TOD))
1083                 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
1084
1085         interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
1086
1087         tsc = t->tsc * tsc_tweak;
1088
1089         /* topo columns, print blanks on 1st (average) line */
1090         if (t == &average.threads) {
1091                 if (DO_BIC(BIC_Package))
1092                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1093                 if (DO_BIC(BIC_Die))
1094                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1095                 if (DO_BIC(BIC_Node))
1096                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1097                 if (DO_BIC(BIC_Core))
1098                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1099                 if (DO_BIC(BIC_CPU))
1100                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1101                 if (DO_BIC(BIC_APIC))
1102                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1103                 if (DO_BIC(BIC_X2APIC))
1104                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1105         } else {
1106                 if (DO_BIC(BIC_Package)) {
1107                         if (p)
1108                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
1109                         else
1110                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1111                 }
1112                 if (DO_BIC(BIC_Die)) {
1113                         if (c)
1114                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
1115                         else
1116                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1117                 }
1118                 if (DO_BIC(BIC_Node)) {
1119                         if (t)
1120                                 outp += sprintf(outp, "%s%d",
1121                                                 (printed++ ? delim : ""),
1122                                               cpus[t->cpu_id].physical_node_id);
1123                         else
1124                                 outp += sprintf(outp, "%s-",
1125                                                 (printed++ ? delim : ""));
1126                 }
1127                 if (DO_BIC(BIC_Core)) {
1128                         if (c)
1129                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
1130                         else
1131                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
1132                 }
1133                 if (DO_BIC(BIC_CPU))
1134                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
1135                 if (DO_BIC(BIC_APIC))
1136                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
1137                 if (DO_BIC(BIC_X2APIC))
1138                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
1139         }
1140
1141         if (DO_BIC(BIC_Avg_MHz))
1142                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
1143                         1.0 / units * t->aperf / interval_float);
1144
1145         if (DO_BIC(BIC_Busy))
1146                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
1147
1148         if (DO_BIC(BIC_Bzy_MHz)) {
1149                 if (has_base_hz)
1150                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
1151                 else
1152                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
1153                                 tsc / units * t->aperf / t->mperf / interval_float);
1154         }
1155
1156         if (DO_BIC(BIC_TSC_MHz))
1157                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
1158
1159         if (DO_BIC(BIC_IPC))
1160                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 1.0 * t->instr_count / t->aperf);
1161
1162         /* IRQ */
1163         if (DO_BIC(BIC_IRQ)) {
1164                 if (sums_need_wide_columns)
1165                         outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
1166                 else
1167                         outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
1168         }
1169
1170         /* SMI */
1171         if (DO_BIC(BIC_SMI))
1172                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1173
1174         /* Added counters */
1175         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1176                 if (mp->format == FORMAT_RAW) {
1177                         if (mp->width == 32)
1178                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
1179                         else
1180                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
1181                 } else if (mp->format == FORMAT_DELTA) {
1182                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1183                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
1184                         else
1185                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
1186                 } else if (mp->format == FORMAT_PERCENT) {
1187                         if (mp->type == COUNTER_USEC)
1188                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
1189                         else
1190                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
1191                 }
1192         }
1193
1194         /* C1 */
1195         if (DO_BIC(BIC_CPU_c1))
1196                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
1197
1198
1199         /* print per-core data only for 1st thread in core */
1200         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1201                 goto done;
1202
1203         if (DO_BIC(BIC_CPU_c3))
1204                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
1205         if (DO_BIC(BIC_CPU_c6))
1206                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
1207         if (DO_BIC(BIC_CPU_c7))
1208                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
1209
1210         /* Mod%c6 */
1211         if (DO_BIC(BIC_Mod_c6))
1212                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
1213
1214         if (DO_BIC(BIC_CoreTmp))
1215                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
1216
1217         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1218                 if (mp->format == FORMAT_RAW) {
1219                         if (mp->width == 32)
1220                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
1221                         else
1222                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
1223                 } else if (mp->format == FORMAT_DELTA) {
1224                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1225                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
1226                         else
1227                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
1228                 } else if (mp->format == FORMAT_PERCENT) {
1229                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
1230                 }
1231         }
1232
1233         fmt8 = "%s%.2f";
1234
1235         if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1236                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1237         if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1238                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1239
1240         /* print per-package data only for 1st core in package */
1241         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1242                 goto done;
1243
1244         /* PkgTmp */
1245         if (DO_BIC(BIC_PkgTmp))
1246                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1247
1248         /* GFXrc6 */
1249         if (DO_BIC(BIC_GFX_rc6)) {
1250                 if (p->gfx_rc6_ms == -1) {      /* detect GFX counter reset */
1251                         outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1252                 } else {
1253                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1254                                 p->gfx_rc6_ms / 10.0 / interval_float);
1255                 }
1256         }
1257
1258         /* GFXMHz */
1259         if (DO_BIC(BIC_GFXMHz))
1260                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1261
1262         /* GFXACTMHz */
1263         if (DO_BIC(BIC_GFXACTMHz))
1264                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_act_mhz);
1265
1266         /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1267         if (DO_BIC(BIC_Totl_c0))
1268                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1269         if (DO_BIC(BIC_Any_c0))
1270                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1271         if (DO_BIC(BIC_GFX_c0))
1272                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1273         if (DO_BIC(BIC_CPUGFX))
1274                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1275
1276         if (DO_BIC(BIC_Pkgpc2))
1277                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1278         if (DO_BIC(BIC_Pkgpc3))
1279                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1280         if (DO_BIC(BIC_Pkgpc6))
1281                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1282         if (DO_BIC(BIC_Pkgpc7))
1283                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1284         if (DO_BIC(BIC_Pkgpc8))
1285                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1286         if (DO_BIC(BIC_Pkgpc9))
1287                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1288         if (DO_BIC(BIC_Pkgpc10))
1289                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1290
1291         if (DO_BIC(BIC_CPU_LPI))
1292                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1293         if (DO_BIC(BIC_SYS_LPI))
1294                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1295
1296         if (DO_BIC(BIC_PkgWatt))
1297                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1298         if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1299                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1300         if (DO_BIC(BIC_GFXWatt))
1301                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1302         if (DO_BIC(BIC_RAMWatt))
1303                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1304         if (DO_BIC(BIC_Pkg_J))
1305                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1306         if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1307                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1308         if (DO_BIC(BIC_GFX_J))
1309                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1310         if (DO_BIC(BIC_RAM_J))
1311                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1312         if (DO_BIC(BIC_PKG__))
1313                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1314         if (DO_BIC(BIC_RAM__))
1315                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1316
1317         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1318                 if (mp->format == FORMAT_RAW) {
1319                         if (mp->width == 32)
1320                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1321                         else
1322                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1323                 } else if (mp->format == FORMAT_DELTA) {
1324                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1325                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1326                         else
1327                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1328                 } else if (mp->format == FORMAT_PERCENT) {
1329                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1330                 }
1331         }
1332
1333 done:
1334         if (*(outp - 1) != '\n')
1335                 outp += sprintf(outp, "\n");
1336
1337         return 0;
1338 }
1339
1340 void flush_output_stdout(void)
1341 {
1342         FILE *filep;
1343
1344         if (outf == stderr)
1345                 filep = stdout;
1346         else
1347                 filep = outf;
1348
1349         fputs(output_buffer, filep);
1350         fflush(filep);
1351
1352         outp = output_buffer;
1353 }
1354 void flush_output_stderr(void)
1355 {
1356         fputs(output_buffer, outf);
1357         fflush(outf);
1358         outp = output_buffer;
1359 }
1360 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1361 {
1362         static int printed;
1363
1364         if (!printed || !summary_only)
1365                 print_header("\t");
1366
1367         format_counters(&average.threads, &average.cores, &average.packages);
1368
1369         printed = 1;
1370
1371         if (summary_only)
1372                 return;
1373
1374         for_all_cpus(format_counters, t, c, p);
1375 }
1376
1377 #define DELTA_WRAP32(new, old)                  \
1378         old = ((((unsigned long long)new << 32) - ((unsigned long long)old << 32)) >> 32);
1379
1380 int
1381 delta_package(struct pkg_data *new, struct pkg_data *old)
1382 {
1383         int i;
1384         struct msr_counter *mp;
1385
1386
1387         if (DO_BIC(BIC_Totl_c0))
1388                 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1389         if (DO_BIC(BIC_Any_c0))
1390                 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1391         if (DO_BIC(BIC_GFX_c0))
1392                 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1393         if (DO_BIC(BIC_CPUGFX))
1394                 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1395
1396         old->pc2 = new->pc2 - old->pc2;
1397         if (DO_BIC(BIC_Pkgpc3))
1398                 old->pc3 = new->pc3 - old->pc3;
1399         if (DO_BIC(BIC_Pkgpc6))
1400                 old->pc6 = new->pc6 - old->pc6;
1401         if (DO_BIC(BIC_Pkgpc7))
1402                 old->pc7 = new->pc7 - old->pc7;
1403         old->pc8 = new->pc8 - old->pc8;
1404         old->pc9 = new->pc9 - old->pc9;
1405         old->pc10 = new->pc10 - old->pc10;
1406         old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1407         old->sys_lpi = new->sys_lpi - old->sys_lpi;
1408         old->pkg_temp_c = new->pkg_temp_c;
1409
1410         /* flag an error when rc6 counter resets/wraps */
1411         if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
1412                 old->gfx_rc6_ms = -1;
1413         else
1414                 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1415
1416         old->gfx_mhz = new->gfx_mhz;
1417         old->gfx_act_mhz = new->gfx_act_mhz;
1418
1419         old->energy_pkg = new->energy_pkg - old->energy_pkg;
1420         old->energy_cores = new->energy_cores - old->energy_cores;
1421         old->energy_gfx = new->energy_gfx - old->energy_gfx;
1422         old->energy_dram = new->energy_dram - old->energy_dram;
1423         old->rapl_pkg_perf_status = new->rapl_pkg_perf_status - old->rapl_pkg_perf_status;
1424         old->rapl_dram_perf_status = new->rapl_dram_perf_status - old->rapl_dram_perf_status;
1425
1426         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1427                 if (mp->format == FORMAT_RAW)
1428                         old->counter[i] = new->counter[i];
1429                 else
1430                         old->counter[i] = new->counter[i] - old->counter[i];
1431         }
1432
1433         return 0;
1434 }
1435
1436 void
1437 delta_core(struct core_data *new, struct core_data *old)
1438 {
1439         int i;
1440         struct msr_counter *mp;
1441
1442         old->c3 = new->c3 - old->c3;
1443         old->c6 = new->c6 - old->c6;
1444         old->c7 = new->c7 - old->c7;
1445         old->core_temp_c = new->core_temp_c;
1446         old->mc6_us = new->mc6_us - old->mc6_us;
1447
1448         DELTA_WRAP32(new->core_energy, old->core_energy);
1449
1450         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1451                 if (mp->format == FORMAT_RAW)
1452                         old->counter[i] = new->counter[i];
1453                 else
1454                         old->counter[i] = new->counter[i] - old->counter[i];
1455         }
1456 }
1457
1458 int soft_c1_residency_display(int bic)
1459 {
1460         if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1461                 return 0;
1462
1463         return DO_BIC_READ(bic);
1464 }
1465
1466 /*
1467  * old = new - old
1468  */
1469 int
1470 delta_thread(struct thread_data *new, struct thread_data *old,
1471         struct core_data *core_delta)
1472 {
1473         int i;
1474         struct msr_counter *mp;
1475
1476         /* we run cpuid just the 1st time, copy the results */
1477         if (DO_BIC(BIC_APIC))
1478                 new->apic_id = old->apic_id;
1479         if (DO_BIC(BIC_X2APIC))
1480                 new->x2apic_id = old->x2apic_id;
1481
1482         /*
1483          * the timestamps from start of measurement interval are in "old"
1484          * the timestamp from end of measurement interval are in "new"
1485          * over-write old w/ new so we can print end of interval values
1486          */
1487
1488         timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
1489         old->tv_begin = new->tv_begin;
1490         old->tv_end = new->tv_end;
1491
1492         old->tsc = new->tsc - old->tsc;
1493
1494         /* check for TSC < 1 Mcycles over interval */
1495         if (old->tsc < (1000 * 1000))
1496                 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1497                      "You can disable all c-states by booting with \"idle=poll\"\n"
1498                      "or just the deep ones with \"processor.max_cstate=1\"");
1499
1500         old->c1 = new->c1 - old->c1;
1501
1502         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1503             soft_c1_residency_display(BIC_Avg_MHz)) {
1504                 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1505                         old->aperf = new->aperf - old->aperf;
1506                         old->mperf = new->mperf - old->mperf;
1507                 } else {
1508                         return -1;
1509                 }
1510         }
1511
1512
1513         if (use_c1_residency_msr) {
1514                 /*
1515                  * Some models have a dedicated C1 residency MSR,
1516                  * which should be more accurate than the derivation below.
1517                  */
1518         } else {
1519                 /*
1520                  * As counter collection is not atomic,
1521                  * it is possible for mperf's non-halted cycles + idle states
1522                  * to exceed TSC's all cycles: show c1 = 0% in that case.
1523                  */
1524                 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1525                         old->c1 = 0;
1526                 else {
1527                         /* normal case, derive c1 */
1528                         old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1529                                 - core_delta->c6 - core_delta->c7;
1530                 }
1531         }
1532
1533         if (old->mperf == 0) {
1534                 if (debug > 1)
1535                         fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1536                 old->mperf = 1; /* divide by 0 protection */
1537         }
1538
1539         if (DO_BIC(BIC_IPC))
1540                 old->instr_count = new->instr_count - old->instr_count;
1541
1542         if (DO_BIC(BIC_IRQ))
1543                 old->irq_count = new->irq_count - old->irq_count;
1544
1545         if (DO_BIC(BIC_SMI))
1546                 old->smi_count = new->smi_count - old->smi_count;
1547
1548         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1549                 if (mp->format == FORMAT_RAW)
1550                         old->counter[i] = new->counter[i];
1551                 else
1552                         old->counter[i] = new->counter[i] - old->counter[i];
1553         }
1554         return 0;
1555 }
1556
1557 int delta_cpu(struct thread_data *t, struct core_data *c,
1558         struct pkg_data *p, struct thread_data *t2,
1559         struct core_data *c2, struct pkg_data *p2)
1560 {
1561         int retval = 0;
1562
1563         /* calculate core delta only for 1st thread in core */
1564         if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1565                 delta_core(c, c2);
1566
1567         /* always calculate thread delta */
1568         retval = delta_thread(t, t2, c2);       /* c2 is core delta */
1569         if (retval)
1570                 return retval;
1571
1572         /* calculate package delta only for 1st core in package */
1573         if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1574                 retval = delta_package(p, p2);
1575
1576         return retval;
1577 }
1578
1579 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1580 {
1581         int i;
1582         struct msr_counter  *mp;
1583
1584         t->tv_begin.tv_sec = 0;
1585         t->tv_begin.tv_usec = 0;
1586         t->tv_end.tv_sec = 0;
1587         t->tv_end.tv_usec = 0;
1588         t->tv_delta.tv_sec = 0;
1589         t->tv_delta.tv_usec = 0;
1590
1591         t->tsc = 0;
1592         t->aperf = 0;
1593         t->mperf = 0;
1594         t->c1 = 0;
1595
1596         t->instr_count = 0;
1597
1598         t->irq_count = 0;
1599         t->smi_count = 0;
1600
1601         /* tells format_counters to dump all fields from this set */
1602         t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1603
1604         c->c3 = 0;
1605         c->c6 = 0;
1606         c->c7 = 0;
1607         c->mc6_us = 0;
1608         c->core_temp_c = 0;
1609         c->core_energy = 0;
1610
1611         p->pkg_wtd_core_c0 = 0;
1612         p->pkg_any_core_c0 = 0;
1613         p->pkg_any_gfxe_c0 = 0;
1614         p->pkg_both_core_gfxe_c0 = 0;
1615
1616         p->pc2 = 0;
1617         if (DO_BIC(BIC_Pkgpc3))
1618                 p->pc3 = 0;
1619         if (DO_BIC(BIC_Pkgpc6))
1620                 p->pc6 = 0;
1621         if (DO_BIC(BIC_Pkgpc7))
1622                 p->pc7 = 0;
1623         p->pc8 = 0;
1624         p->pc9 = 0;
1625         p->pc10 = 0;
1626         p->cpu_lpi = 0;
1627         p->sys_lpi = 0;
1628
1629         p->energy_pkg = 0;
1630         p->energy_dram = 0;
1631         p->energy_cores = 0;
1632         p->energy_gfx = 0;
1633         p->rapl_pkg_perf_status = 0;
1634         p->rapl_dram_perf_status = 0;
1635         p->pkg_temp_c = 0;
1636
1637         p->gfx_rc6_ms = 0;
1638         p->gfx_mhz = 0;
1639         p->gfx_act_mhz = 0;
1640         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1641                 t->counter[i] = 0;
1642
1643         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1644                 c->counter[i] = 0;
1645
1646         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1647                 p->counter[i] = 0;
1648 }
1649 int sum_counters(struct thread_data *t, struct core_data *c,
1650         struct pkg_data *p)
1651 {
1652         int i;
1653         struct msr_counter *mp;
1654
1655         /* copy un-changing apic_id's */
1656         if (DO_BIC(BIC_APIC))
1657                 average.threads.apic_id = t->apic_id;
1658         if (DO_BIC(BIC_X2APIC))
1659                 average.threads.x2apic_id = t->x2apic_id;
1660
1661         /* remember first tv_begin */
1662         if (average.threads.tv_begin.tv_sec == 0)
1663                 average.threads.tv_begin = t->tv_begin;
1664
1665         /* remember last tv_end */
1666         average.threads.tv_end = t->tv_end;
1667
1668         average.threads.tsc += t->tsc;
1669         average.threads.aperf += t->aperf;
1670         average.threads.mperf += t->mperf;
1671         average.threads.c1 += t->c1;
1672
1673         average.threads.instr_count += t->instr_count;
1674
1675         average.threads.irq_count += t->irq_count;
1676         average.threads.smi_count += t->smi_count;
1677
1678         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1679                 if (mp->format == FORMAT_RAW)
1680                         continue;
1681                 average.threads.counter[i] += t->counter[i];
1682         }
1683
1684         /* sum per-core values only for 1st thread in core */
1685         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1686                 return 0;
1687
1688         average.cores.c3 += c->c3;
1689         average.cores.c6 += c->c6;
1690         average.cores.c7 += c->c7;
1691         average.cores.mc6_us += c->mc6_us;
1692
1693         average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1694
1695         average.cores.core_energy += c->core_energy;
1696
1697         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1698                 if (mp->format == FORMAT_RAW)
1699                         continue;
1700                 average.cores.counter[i] += c->counter[i];
1701         }
1702
1703         /* sum per-pkg values only for 1st core in pkg */
1704         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1705                 return 0;
1706
1707         if (DO_BIC(BIC_Totl_c0))
1708                 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1709         if (DO_BIC(BIC_Any_c0))
1710                 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1711         if (DO_BIC(BIC_GFX_c0))
1712                 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1713         if (DO_BIC(BIC_CPUGFX))
1714                 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1715
1716         average.packages.pc2 += p->pc2;
1717         if (DO_BIC(BIC_Pkgpc3))
1718                 average.packages.pc3 += p->pc3;
1719         if (DO_BIC(BIC_Pkgpc6))
1720                 average.packages.pc6 += p->pc6;
1721         if (DO_BIC(BIC_Pkgpc7))
1722                 average.packages.pc7 += p->pc7;
1723         average.packages.pc8 += p->pc8;
1724         average.packages.pc9 += p->pc9;
1725         average.packages.pc10 += p->pc10;
1726
1727         average.packages.cpu_lpi = p->cpu_lpi;
1728         average.packages.sys_lpi = p->sys_lpi;
1729
1730         average.packages.energy_pkg += p->energy_pkg;
1731         average.packages.energy_dram += p->energy_dram;
1732         average.packages.energy_cores += p->energy_cores;
1733         average.packages.energy_gfx += p->energy_gfx;
1734
1735         average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1736         average.packages.gfx_mhz = p->gfx_mhz;
1737         average.packages.gfx_act_mhz = p->gfx_act_mhz;
1738
1739         average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1740
1741         average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1742         average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1743
1744         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1745                 if (mp->format == FORMAT_RAW)
1746                         continue;
1747                 average.packages.counter[i] += p->counter[i];
1748         }
1749         return 0;
1750 }
1751 /*
1752  * sum the counters for all cpus in the system
1753  * compute the weighted average
1754  */
1755 void compute_average(struct thread_data *t, struct core_data *c,
1756         struct pkg_data *p)
1757 {
1758         int i;
1759         struct msr_counter *mp;
1760
1761         clear_counters(&average.threads, &average.cores, &average.packages);
1762
1763         for_all_cpus(sum_counters, t, c, p);
1764
1765         /* Use the global time delta for the average. */
1766         average.threads.tv_delta = tv_delta;
1767
1768         average.threads.tsc /= topo.num_cpus;
1769         average.threads.aperf /= topo.num_cpus;
1770         average.threads.mperf /= topo.num_cpus;
1771         average.threads.instr_count /= topo.num_cpus;
1772         average.threads.c1 /= topo.num_cpus;
1773
1774         if (average.threads.irq_count > 9999999)
1775                 sums_need_wide_columns = 1;
1776
1777         average.cores.c3 /= topo.num_cores;
1778         average.cores.c6 /= topo.num_cores;
1779         average.cores.c7 /= topo.num_cores;
1780         average.cores.mc6_us /= topo.num_cores;
1781
1782         if (DO_BIC(BIC_Totl_c0))
1783                 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1784         if (DO_BIC(BIC_Any_c0))
1785                 average.packages.pkg_any_core_c0 /= topo.num_packages;
1786         if (DO_BIC(BIC_GFX_c0))
1787                 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1788         if (DO_BIC(BIC_CPUGFX))
1789                 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1790
1791         average.packages.pc2 /= topo.num_packages;
1792         if (DO_BIC(BIC_Pkgpc3))
1793                 average.packages.pc3 /= topo.num_packages;
1794         if (DO_BIC(BIC_Pkgpc6))
1795                 average.packages.pc6 /= topo.num_packages;
1796         if (DO_BIC(BIC_Pkgpc7))
1797                 average.packages.pc7 /= topo.num_packages;
1798
1799         average.packages.pc8 /= topo.num_packages;
1800         average.packages.pc9 /= topo.num_packages;
1801         average.packages.pc10 /= topo.num_packages;
1802
1803         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1804                 if (mp->format == FORMAT_RAW)
1805                         continue;
1806                 if (mp->type == COUNTER_ITEMS) {
1807                         if (average.threads.counter[i] > 9999999)
1808                                 sums_need_wide_columns = 1;
1809                         continue;
1810                 }
1811                 average.threads.counter[i] /= topo.num_cpus;
1812         }
1813         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1814                 if (mp->format == FORMAT_RAW)
1815                         continue;
1816                 if (mp->type == COUNTER_ITEMS) {
1817                         if (average.cores.counter[i] > 9999999)
1818                                 sums_need_wide_columns = 1;
1819                 }
1820                 average.cores.counter[i] /= topo.num_cores;
1821         }
1822         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1823                 if (mp->format == FORMAT_RAW)
1824                         continue;
1825                 if (mp->type == COUNTER_ITEMS) {
1826                         if (average.packages.counter[i] > 9999999)
1827                                 sums_need_wide_columns = 1;
1828                 }
1829                 average.packages.counter[i] /= topo.num_packages;
1830         }
1831 }
1832
1833 static unsigned long long rdtsc(void)
1834 {
1835         unsigned int low, high;
1836
1837         asm volatile("rdtsc" : "=a" (low), "=d" (high));
1838
1839         return low | ((unsigned long long)high) << 32;
1840 }
1841
1842 /*
1843  * Open a file, and exit on failure
1844  */
1845 FILE *fopen_or_die(const char *path, const char *mode)
1846 {
1847         FILE *filep = fopen(path, mode);
1848
1849         if (!filep)
1850                 err(1, "%s: open failed", path);
1851         return filep;
1852 }
1853 /*
1854  * snapshot_sysfs_counter()
1855  *
1856  * return snapshot of given counter
1857  */
1858 unsigned long long snapshot_sysfs_counter(char *path)
1859 {
1860         FILE *fp;
1861         int retval;
1862         unsigned long long counter;
1863
1864         fp = fopen_or_die(path, "r");
1865
1866         retval = fscanf(fp, "%lld", &counter);
1867         if (retval != 1)
1868                 err(1, "snapshot_sysfs_counter(%s)", path);
1869
1870         fclose(fp);
1871
1872         return counter;
1873 }
1874
1875 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1876 {
1877         if (mp->msr_num != 0) {
1878                 if (get_msr(cpu, mp->msr_num, counterp))
1879                         return -1;
1880         } else {
1881                 char path[128 + PATH_BYTES];
1882
1883                 if (mp->flags & SYSFS_PERCPU) {
1884                         sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1885                                  cpu, mp->path);
1886
1887                         *counterp = snapshot_sysfs_counter(path);
1888                 } else {
1889                         *counterp = snapshot_sysfs_counter(mp->path);
1890                 }
1891         }
1892
1893         return 0;
1894 }
1895
1896 int get_epb(int cpu)
1897 {
1898         char path[128 + PATH_BYTES];
1899         unsigned long long msr;
1900         int ret, epb = -1;
1901         FILE *fp;
1902
1903         sprintf(path, "/sys/devices/system/cpu/cpu%d/power/energy_perf_bias", cpu);
1904
1905         fp = fopen(path, "r");
1906         if (!fp)
1907                 goto msr_fallback;
1908
1909         ret = fscanf(fp, "%d", &epb);
1910         if (ret != 1)
1911                 err(1, "%s(%s)", __func__, path);
1912
1913         fclose(fp);
1914
1915         return epb;
1916
1917 msr_fallback:
1918         get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr);
1919
1920         return msr & 0xf;
1921 }
1922
1923 void get_apic_id(struct thread_data *t)
1924 {
1925         unsigned int eax, ebx, ecx, edx;
1926
1927         if (DO_BIC(BIC_APIC)) {
1928                 eax = ebx = ecx = edx = 0;
1929                 __cpuid(1, eax, ebx, ecx, edx);
1930
1931                 t->apic_id = (ebx >> 24) & 0xff;
1932         }
1933
1934         if (!DO_BIC(BIC_X2APIC))
1935                 return;
1936
1937         if (authentic_amd || hygon_genuine) {
1938                 unsigned int topology_extensions;
1939
1940                 if (max_extended_level < 0x8000001e)
1941                         return;
1942
1943                 eax = ebx = ecx = edx = 0;
1944                 __cpuid(0x80000001, eax, ebx, ecx, edx);
1945                         topology_extensions = ecx & (1 << 22);
1946
1947                 if (topology_extensions == 0)
1948                         return;
1949
1950                 eax = ebx = ecx = edx = 0;
1951                 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1952
1953                 t->x2apic_id = eax;
1954                 return;
1955         }
1956
1957         if (!genuine_intel)
1958                 return;
1959
1960         if (max_level < 0xb)
1961                 return;
1962
1963         ecx = 0;
1964         __cpuid(0xb, eax, ebx, ecx, edx);
1965         t->x2apic_id = edx;
1966
1967         if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1968                 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1969                                 t->cpu_id, t->apic_id, t->x2apic_id);
1970 }
1971
1972 /*
1973  * get_counters(...)
1974  * migrate to cpu
1975  * acquire and record local counters for that cpu
1976  */
1977 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1978 {
1979         int cpu = t->cpu_id;
1980         unsigned long long msr;
1981         int aperf_mperf_retry_count = 0;
1982         struct msr_counter *mp;
1983         int i;
1984
1985         if (cpu_migrate(cpu)) {
1986                 fprintf(outf, "get_counters: Could not migrate to CPU %d\n", cpu);
1987                 return -1;
1988         }
1989
1990         gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1991
1992         if (first_counter_read)
1993                 get_apic_id(t);
1994 retry:
1995         t->tsc = rdtsc();       /* we are running on local CPU of interest */
1996
1997         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1998             soft_c1_residency_display(BIC_Avg_MHz)) {
1999                 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
2000
2001                 /*
2002                  * The TSC, APERF and MPERF must be read together for
2003                  * APERF/MPERF and MPERF/TSC to give accurate results.
2004                  *
2005                  * Unfortunately, APERF and MPERF are read by
2006                  * individual system call, so delays may occur
2007                  * between them.  If the time to read them
2008                  * varies by a large amount, we re-read them.
2009                  */
2010
2011                 /*
2012                  * This initial dummy APERF read has been seen to
2013                  * reduce jitter in the subsequent reads.
2014                  */
2015
2016                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2017                         return -3;
2018
2019                 t->tsc = rdtsc();       /* re-read close to APERF */
2020
2021                 tsc_before = t->tsc;
2022
2023                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
2024                         return -3;
2025
2026                 tsc_between = rdtsc();
2027
2028                 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
2029                         return -4;
2030
2031                 tsc_after = rdtsc();
2032
2033                 aperf_time = tsc_between - tsc_before;
2034                 mperf_time = tsc_after - tsc_between;
2035
2036                 /*
2037                  * If the system call latency to read APERF and MPERF
2038                  * differ by more than 2x, then try again.
2039                  */
2040                 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
2041                         aperf_mperf_retry_count++;
2042                         if (aperf_mperf_retry_count < 5)
2043                                 goto retry;
2044                         else
2045                                 warnx("cpu%d jitter %lld %lld",
2046                                         cpu, aperf_time, mperf_time);
2047                 }
2048                 aperf_mperf_retry_count = 0;
2049
2050                 t->aperf = t->aperf * aperf_mperf_multiplier;
2051                 t->mperf = t->mperf * aperf_mperf_multiplier;
2052         }
2053
2054         if (DO_BIC(BIC_IPC))
2055                 if (read(get_instr_count_fd(cpu), &t->instr_count, sizeof(long long)) != sizeof(long long))
2056                         return -4;
2057
2058         if (DO_BIC(BIC_IRQ))
2059                 t->irq_count = irqs_per_cpu[cpu];
2060         if (DO_BIC(BIC_SMI)) {
2061                 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
2062                         return -5;
2063                 t->smi_count = msr & 0xFFFFFFFF;
2064         }
2065         if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
2066                 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
2067                         return -6;
2068         }
2069
2070         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
2071                 if (get_mp(cpu, mp, &t->counter[i]))
2072                         return -10;
2073         }
2074
2075         /* collect core counters only for 1st thread in core */
2076         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2077                 goto done;
2078
2079         if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
2080                 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
2081                         return -6;
2082         }
2083
2084         if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
2085                 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
2086                         return -7;
2087         } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
2088                 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
2089                         return -7;
2090         }
2091
2092         if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
2093                 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
2094                         return -8;
2095
2096         if (DO_BIC(BIC_Mod_c6))
2097                 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
2098                         return -8;
2099
2100         if (DO_BIC(BIC_CoreTmp)) {
2101                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2102                         return -9;
2103                 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2104         }
2105
2106         if (do_rapl & RAPL_AMD_F17H) {
2107                 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
2108                         return -14;
2109                 c->core_energy = msr & 0xFFFFFFFF;
2110         }
2111
2112         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
2113                 if (get_mp(cpu, mp, &c->counter[i]))
2114                         return -10;
2115         }
2116
2117         /* collect package counters only for 1st core in package */
2118         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2119                 goto done;
2120
2121         if (DO_BIC(BIC_Totl_c0)) {
2122                 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
2123                         return -10;
2124         }
2125         if (DO_BIC(BIC_Any_c0)) {
2126                 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
2127                         return -11;
2128         }
2129         if (DO_BIC(BIC_GFX_c0)) {
2130                 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
2131                         return -12;
2132         }
2133         if (DO_BIC(BIC_CPUGFX)) {
2134                 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
2135                         return -13;
2136         }
2137         if (DO_BIC(BIC_Pkgpc3))
2138                 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
2139                         return -9;
2140         if (DO_BIC(BIC_Pkgpc6)) {
2141                 if (do_slm_cstates) {
2142                         if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
2143                                 return -10;
2144                 } else {
2145                         if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
2146                                 return -10;
2147                 }
2148         }
2149
2150         if (DO_BIC(BIC_Pkgpc2))
2151                 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
2152                         return -11;
2153         if (DO_BIC(BIC_Pkgpc7))
2154                 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
2155                         return -12;
2156         if (DO_BIC(BIC_Pkgpc8))
2157                 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
2158                         return -13;
2159         if (DO_BIC(BIC_Pkgpc9))
2160                 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
2161                         return -13;
2162         if (DO_BIC(BIC_Pkgpc10))
2163                 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
2164                         return -13;
2165
2166         if (DO_BIC(BIC_CPU_LPI))
2167                 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
2168         if (DO_BIC(BIC_SYS_LPI))
2169                 p->sys_lpi = cpuidle_cur_sys_lpi_us;
2170
2171         if (do_rapl & RAPL_PKG) {
2172                 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STATUS, &msr))
2173                         return -13;
2174                 p->energy_pkg = msr;
2175         }
2176         if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
2177                 if (get_msr_sum(cpu, MSR_PP0_ENERGY_STATUS, &msr))
2178                         return -14;
2179                 p->energy_cores = msr;
2180         }
2181         if (do_rapl & RAPL_DRAM) {
2182                 if (get_msr_sum(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
2183                         return -15;
2184                 p->energy_dram = msr;
2185         }
2186         if (do_rapl & RAPL_GFX) {
2187                 if (get_msr_sum(cpu, MSR_PP1_ENERGY_STATUS, &msr))
2188                         return -16;
2189                 p->energy_gfx = msr;
2190         }
2191         if (do_rapl & RAPL_PKG_PERF_STATUS) {
2192                 if (get_msr_sum(cpu, MSR_PKG_PERF_STATUS, &msr))
2193                         return -16;
2194                 p->rapl_pkg_perf_status = msr;
2195         }
2196         if (do_rapl & RAPL_DRAM_PERF_STATUS) {
2197                 if (get_msr_sum(cpu, MSR_DRAM_PERF_STATUS, &msr))
2198                         return -16;
2199                 p->rapl_dram_perf_status = msr;
2200         }
2201         if (do_rapl & RAPL_AMD_F17H) {
2202                 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STAT, &msr))
2203                         return -13;
2204                 p->energy_pkg = msr;
2205         }
2206         if (DO_BIC(BIC_PkgTmp)) {
2207                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2208                         return -17;
2209                 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2210         }
2211
2212         if (DO_BIC(BIC_GFX_rc6))
2213                 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2214
2215         if (DO_BIC(BIC_GFXMHz))
2216                 p->gfx_mhz = gfx_cur_mhz;
2217
2218         if (DO_BIC(BIC_GFXACTMHz))
2219                 p->gfx_act_mhz = gfx_act_mhz;
2220
2221         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
2222                 if (get_mp(cpu, mp, &p->counter[i]))
2223                         return -10;
2224         }
2225 done:
2226         gettimeofday(&t->tv_end, (struct timezone *)NULL);
2227
2228         return 0;
2229 }
2230
2231 /*
2232  * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2233  * If you change the values, note they are used both in comparisons
2234  * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2235  */
2236
2237 #define PCLUKN 0 /* Unknown */
2238 #define PCLRSV 1 /* Reserved */
2239 #define PCL__0 2 /* PC0 */
2240 #define PCL__1 3 /* PC1 */
2241 #define PCL__2 4 /* PC2 */
2242 #define PCL__3 5 /* PC3 */
2243 #define PCL__4 6 /* PC4 */
2244 #define PCL__6 7 /* PC6 */
2245 #define PCL_6N 8 /* PC6 No Retention */
2246 #define PCL_6R 9 /* PC6 Retention */
2247 #define PCL__7 10 /* PC7 */
2248 #define PCL_7S 11 /* PC7 Shrink */
2249 #define PCL__8 12 /* PC8 */
2250 #define PCL__9 13 /* PC9 */
2251 #define PCL_10 14 /* PC10 */
2252 #define PCLUNL 15 /* Unlimited */
2253
2254 int pkg_cstate_limit = PCLUKN;
2255 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
2256         "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
2257
2258 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2259 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2260 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2261 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
2262 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2263 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2264 int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2265 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2266
2267
2268 static void
2269 calculate_tsc_tweak()
2270 {
2271         tsc_tweak = base_hz / tsc_hz;
2272 }
2273
2274 static void
2275 dump_nhm_platform_info(void)
2276 {
2277         unsigned long long msr;
2278         unsigned int ratio;
2279
2280         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2281
2282         fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
2283
2284         ratio = (msr >> 40) & 0xFF;
2285         fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
2286                 ratio, bclk, ratio * bclk);
2287
2288         ratio = (msr >> 8) & 0xFF;
2289         fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2290                 ratio, bclk, ratio * bclk);
2291
2292         get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
2293         fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
2294                 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
2295
2296         return;
2297 }
2298
2299 static void
2300 dump_hsw_turbo_ratio_limits(void)
2301 {
2302         unsigned long long msr;
2303         unsigned int ratio;
2304
2305         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
2306
2307         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
2308
2309         ratio = (msr >> 8) & 0xFF;
2310         if (ratio)
2311                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
2312                         ratio, bclk, ratio * bclk);
2313
2314         ratio = (msr >> 0) & 0xFF;
2315         if (ratio)
2316                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
2317                         ratio, bclk, ratio * bclk);
2318         return;
2319 }
2320
2321 static void
2322 dump_ivt_turbo_ratio_limits(void)
2323 {
2324         unsigned long long msr;
2325         unsigned int ratio;
2326
2327         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
2328
2329         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
2330
2331         ratio = (msr >> 56) & 0xFF;
2332         if (ratio)
2333                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
2334                         ratio, bclk, ratio * bclk);
2335
2336         ratio = (msr >> 48) & 0xFF;
2337         if (ratio)
2338                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
2339                         ratio, bclk, ratio * bclk);
2340
2341         ratio = (msr >> 40) & 0xFF;
2342         if (ratio)
2343                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
2344                         ratio, bclk, ratio * bclk);
2345
2346         ratio = (msr >> 32) & 0xFF;
2347         if (ratio)
2348                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
2349                         ratio, bclk, ratio * bclk);
2350
2351         ratio = (msr >> 24) & 0xFF;
2352         if (ratio)
2353                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
2354                         ratio, bclk, ratio * bclk);
2355
2356         ratio = (msr >> 16) & 0xFF;
2357         if (ratio)
2358                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
2359                         ratio, bclk, ratio * bclk);
2360
2361         ratio = (msr >> 8) & 0xFF;
2362         if (ratio)
2363                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
2364                         ratio, bclk, ratio * bclk);
2365
2366         ratio = (msr >> 0) & 0xFF;
2367         if (ratio)
2368                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
2369                         ratio, bclk, ratio * bclk);
2370         return;
2371 }
2372 int has_turbo_ratio_group_limits(int family, int model)
2373 {
2374
2375         if (!genuine_intel)
2376                 return 0;
2377
2378         switch (model) {
2379         case INTEL_FAM6_ATOM_GOLDMONT:
2380         case INTEL_FAM6_SKYLAKE_X:
2381         case INTEL_FAM6_ATOM_GOLDMONT_D:
2382         case INTEL_FAM6_ATOM_TREMONT_D:
2383                 return 1;
2384         }
2385         return 0;
2386 }
2387
2388 static void
2389 dump_turbo_ratio_limits(int family, int model)
2390 {
2391         unsigned long long msr, core_counts;
2392         unsigned int ratio, group_size;
2393
2394         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2395         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2396
2397         if (has_turbo_ratio_group_limits(family, model)) {
2398                 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2399                 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2400         } else {
2401                 core_counts = 0x0807060504030201;
2402         }
2403
2404         ratio = (msr >> 56) & 0xFF;
2405         group_size = (core_counts >> 56) & 0xFF;
2406         if (ratio)
2407                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2408                         ratio, bclk, ratio * bclk, group_size);
2409
2410         ratio = (msr >> 48) & 0xFF;
2411         group_size = (core_counts >> 48) & 0xFF;
2412         if (ratio)
2413                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2414                         ratio, bclk, ratio * bclk, group_size);
2415
2416         ratio = (msr >> 40) & 0xFF;
2417         group_size = (core_counts >> 40) & 0xFF;
2418         if (ratio)
2419                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2420                         ratio, bclk, ratio * bclk, group_size);
2421
2422         ratio = (msr >> 32) & 0xFF;
2423         group_size = (core_counts >> 32) & 0xFF;
2424         if (ratio)
2425                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2426                         ratio, bclk, ratio * bclk, group_size);
2427
2428         ratio = (msr >> 24) & 0xFF;
2429         group_size = (core_counts >> 24) & 0xFF;
2430         if (ratio)
2431                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2432                         ratio, bclk, ratio * bclk, group_size);
2433
2434         ratio = (msr >> 16) & 0xFF;
2435         group_size = (core_counts >> 16) & 0xFF;
2436         if (ratio)
2437                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2438                         ratio, bclk, ratio * bclk, group_size);
2439
2440         ratio = (msr >> 8) & 0xFF;
2441         group_size = (core_counts >> 8) & 0xFF;
2442         if (ratio)
2443                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2444                         ratio, bclk, ratio * bclk, group_size);
2445
2446         ratio = (msr >> 0) & 0xFF;
2447         group_size = (core_counts >> 0) & 0xFF;
2448         if (ratio)
2449                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2450                         ratio, bclk, ratio * bclk, group_size);
2451         return;
2452 }
2453
2454 static void
2455 dump_atom_turbo_ratio_limits(void)
2456 {
2457         unsigned long long msr;
2458         unsigned int ratio;
2459
2460         get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2461         fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2462
2463         ratio = (msr >> 0) & 0x3F;
2464         if (ratio)
2465                 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2466                         ratio, bclk, ratio * bclk);
2467
2468         ratio = (msr >> 8) & 0x3F;
2469         if (ratio)
2470                 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2471                         ratio, bclk, ratio * bclk);
2472
2473         ratio = (msr >> 16) & 0x3F;
2474         if (ratio)
2475                 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2476                         ratio, bclk, ratio * bclk);
2477
2478         get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2479         fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2480
2481         ratio = (msr >> 24) & 0x3F;
2482         if (ratio)
2483                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2484                         ratio, bclk, ratio * bclk);
2485
2486         ratio = (msr >> 16) & 0x3F;
2487         if (ratio)
2488                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2489                         ratio, bclk, ratio * bclk);
2490
2491         ratio = (msr >> 8) & 0x3F;
2492         if (ratio)
2493                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2494                         ratio, bclk, ratio * bclk);
2495
2496         ratio = (msr >> 0) & 0x3F;
2497         if (ratio)
2498                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2499                         ratio, bclk, ratio * bclk);
2500 }
2501
2502 static void
2503 dump_knl_turbo_ratio_limits(void)
2504 {
2505         const unsigned int buckets_no = 7;
2506
2507         unsigned long long msr;
2508         int delta_cores, delta_ratio;
2509         int i, b_nr;
2510         unsigned int cores[buckets_no];
2511         unsigned int ratio[buckets_no];
2512
2513         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2514
2515         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2516                 base_cpu, msr);
2517
2518         /**
2519          * Turbo encoding in KNL is as follows:
2520          * [0] -- Reserved
2521          * [7:1] -- Base value of number of active cores of bucket 1.
2522          * [15:8] -- Base value of freq ratio of bucket 1.
2523          * [20:16] -- +ve delta of number of active cores of bucket 2.
2524          * i.e. active cores of bucket 2 =
2525          * active cores of bucket 1 + delta
2526          * [23:21] -- Negative delta of freq ratio of bucket 2.
2527          * i.e. freq ratio of bucket 2 =
2528          * freq ratio of bucket 1 - delta
2529          * [28:24]-- +ve delta of number of active cores of bucket 3.
2530          * [31:29]-- -ve delta of freq ratio of bucket 3.
2531          * [36:32]-- +ve delta of number of active cores of bucket 4.
2532          * [39:37]-- -ve delta of freq ratio of bucket 4.
2533          * [44:40]-- +ve delta of number of active cores of bucket 5.
2534          * [47:45]-- -ve delta of freq ratio of bucket 5.
2535          * [52:48]-- +ve delta of number of active cores of bucket 6.
2536          * [55:53]-- -ve delta of freq ratio of bucket 6.
2537          * [60:56]-- +ve delta of number of active cores of bucket 7.
2538          * [63:61]-- -ve delta of freq ratio of bucket 7.
2539          */
2540
2541         b_nr = 0;
2542         cores[b_nr] = (msr & 0xFF) >> 1;
2543         ratio[b_nr] = (msr >> 8) & 0xFF;
2544
2545         for (i = 16; i < 64; i += 8) {
2546                 delta_cores = (msr >> i) & 0x1F;
2547                 delta_ratio = (msr >> (i + 5)) & 0x7;
2548
2549                 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2550                 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2551                 b_nr++;
2552         }
2553
2554         for (i = buckets_no - 1; i >= 0; i--)
2555                 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2556                         fprintf(outf,
2557                                 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2558                                 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2559 }
2560
2561 static void
2562 dump_nhm_cst_cfg(void)
2563 {
2564         unsigned long long msr;
2565
2566         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2567
2568         fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2569
2570         fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2571                 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2572                 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2573                 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2574                 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2575                 (msr & (1 << 15)) ? "" : "UN",
2576                 (unsigned int)msr & 0xF,
2577                 pkg_cstate_limit_strings[pkg_cstate_limit]);
2578
2579 #define AUTOMATIC_CSTATE_CONVERSION             (1UL << 16)
2580         if (has_automatic_cstate_conversion) {
2581                 fprintf(outf, ", automatic c-state conversion=%s",
2582                         (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2583         }
2584
2585         fprintf(outf, ")\n");
2586
2587         return;
2588 }
2589
2590 static void
2591 dump_config_tdp(void)
2592 {
2593         unsigned long long msr;
2594
2595         get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2596         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2597         fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2598
2599         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2600         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2601         if (msr) {
2602                 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2603                 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2604                 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2605                 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2606         }
2607         fprintf(outf, ")\n");
2608
2609         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2610         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2611         if (msr) {
2612                 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2613                 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2614                 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2615                 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2616         }
2617         fprintf(outf, ")\n");
2618
2619         get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2620         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2621         if ((msr) & 0x3)
2622                 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2623         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2624         fprintf(outf, ")\n");
2625
2626         get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2627         fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2628         fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2629         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2630         fprintf(outf, ")\n");
2631 }
2632
2633 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2634
2635 void print_irtl(void)
2636 {
2637         unsigned long long msr;
2638
2639         get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2640         fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2641         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2642                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2643
2644         get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2645         fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2646         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2647                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2648
2649         get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2650         fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2651         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2652                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2653
2654         if (!do_irtl_hsw)
2655                 return;
2656
2657         get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2658         fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2659         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2660                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2661
2662         get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2663         fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2664         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2665                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2666
2667         get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2668         fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2669         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2670                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2671
2672 }
2673 void free_fd_percpu(void)
2674 {
2675         int i;
2676
2677         for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2678                 if (fd_percpu[i] != 0)
2679                         close(fd_percpu[i]);
2680         }
2681
2682         free(fd_percpu);
2683 }
2684
2685 void free_all_buffers(void)
2686 {
2687         int i;
2688
2689         CPU_FREE(cpu_present_set);
2690         cpu_present_set = NULL;
2691         cpu_present_setsize = 0;
2692
2693         CPU_FREE(cpu_affinity_set);
2694         cpu_affinity_set = NULL;
2695         cpu_affinity_setsize = 0;
2696
2697         free(thread_even);
2698         free(core_even);
2699         free(package_even);
2700
2701         thread_even = NULL;
2702         core_even = NULL;
2703         package_even = NULL;
2704
2705         free(thread_odd);
2706         free(core_odd);
2707         free(package_odd);
2708
2709         thread_odd = NULL;
2710         core_odd = NULL;
2711         package_odd = NULL;
2712
2713         free(output_buffer);
2714         output_buffer = NULL;
2715         outp = NULL;
2716
2717         free_fd_percpu();
2718
2719         free(irq_column_2_cpu);
2720         free(irqs_per_cpu);
2721
2722         for (i = 0; i <= topo.max_cpu_num; ++i) {
2723                 if (cpus[i].put_ids)
2724                         CPU_FREE(cpus[i].put_ids);
2725         }
2726         free(cpus);
2727 }
2728
2729
2730 /*
2731  * Parse a file containing a single int.
2732  * Return 0 if file can not be opened
2733  * Exit if file can be opened, but can not be parsed
2734  */
2735 int parse_int_file(const char *fmt, ...)
2736 {
2737         va_list args;
2738         char path[PATH_MAX];
2739         FILE *filep;
2740         int value;
2741
2742         va_start(args, fmt);
2743         vsnprintf(path, sizeof(path), fmt, args);
2744         va_end(args);
2745         filep = fopen(path, "r");
2746         if (!filep)
2747                 return 0;
2748         if (fscanf(filep, "%d", &value) != 1)
2749                 err(1, "%s: failed to parse number from file", path);
2750         fclose(filep);
2751         return value;
2752 }
2753
2754 /*
2755  * cpu_is_first_core_in_package(cpu)
2756  * return 1 if given CPU is 1st core in package
2757  */
2758 int cpu_is_first_core_in_package(int cpu)
2759 {
2760         return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2761 }
2762
2763 int get_physical_package_id(int cpu)
2764 {
2765         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2766 }
2767
2768 int get_die_id(int cpu)
2769 {
2770         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2771 }
2772
2773 int get_core_id(int cpu)
2774 {
2775         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2776 }
2777
2778 void set_node_data(void)
2779 {
2780         int pkg, node, lnode, cpu, cpux;
2781         int cpu_count;
2782
2783         /* initialize logical_node_id */
2784         for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2785                 cpus[cpu].logical_node_id = -1;
2786
2787         cpu_count = 0;
2788         for (pkg = 0; pkg < topo.num_packages; pkg++) {
2789                 lnode = 0;
2790                 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2791                         if (cpus[cpu].physical_package_id != pkg)
2792                                 continue;
2793                         /* find a cpu with an unset logical_node_id */
2794                         if (cpus[cpu].logical_node_id != -1)
2795                                 continue;
2796                         cpus[cpu].logical_node_id = lnode;
2797                         node = cpus[cpu].physical_node_id;
2798                         cpu_count++;
2799                         /*
2800                          * find all matching cpus on this pkg and set
2801                          * the logical_node_id
2802                          */
2803                         for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2804                                 if ((cpus[cpux].physical_package_id == pkg) &&
2805                                    (cpus[cpux].physical_node_id == node)) {
2806                                         cpus[cpux].logical_node_id = lnode;
2807                                         cpu_count++;
2808                                 }
2809                         }
2810                         lnode++;
2811                         if (lnode > topo.nodes_per_pkg)
2812                                 topo.nodes_per_pkg = lnode;
2813                 }
2814                 if (cpu_count >= topo.max_cpu_num)
2815                         break;
2816         }
2817 }
2818
2819 int get_physical_node_id(struct cpu_topology *thiscpu)
2820 {
2821         char path[80];
2822         FILE *filep;
2823         int i;
2824         int cpu = thiscpu->logical_cpu_id;
2825
2826         for (i = 0; i <= topo.max_cpu_num; i++) {
2827                 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2828                         cpu, i);
2829                 filep = fopen(path, "r");
2830                 if (!filep)
2831                         continue;
2832                 fclose(filep);
2833                 return i;
2834         }
2835         return -1;
2836 }
2837
2838 int get_thread_siblings(struct cpu_topology *thiscpu)
2839 {
2840         char path[80], character;
2841         FILE *filep;
2842         unsigned long map;
2843         int so, shift, sib_core;
2844         int cpu = thiscpu->logical_cpu_id;
2845         int offset = topo.max_cpu_num + 1;
2846         size_t size;
2847         int thread_id = 0;
2848
2849         thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2850         if (thiscpu->thread_id < 0)
2851                 thiscpu->thread_id = thread_id++;
2852         if (!thiscpu->put_ids)
2853                 return -1;
2854
2855         size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2856         CPU_ZERO_S(size, thiscpu->put_ids);
2857
2858         sprintf(path,
2859                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2860         filep = fopen(path, "r");
2861
2862         if (!filep) {
2863                 warnx("%s: open failed", path);
2864                 return -1;
2865         }
2866         do {
2867                 offset -= BITMASK_SIZE;
2868                 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2869                         err(1, "%s: failed to parse file", path);
2870                 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2871                         if ((map >> shift) & 0x1) {
2872                                 so = shift + offset;
2873                                 sib_core = get_core_id(so);
2874                                 if (sib_core == thiscpu->physical_core_id) {
2875                                         CPU_SET_S(so, size, thiscpu->put_ids);
2876                                         if ((so != cpu) &&
2877                                             (cpus[so].thread_id < 0))
2878                                                 cpus[so].thread_id =
2879                                                                     thread_id++;
2880                                 }
2881                         }
2882                 }
2883         } while (!strncmp(&character, ",", 1));
2884         fclose(filep);
2885
2886         return CPU_COUNT_S(size, thiscpu->put_ids);
2887 }
2888
2889 /*
2890  * run func(thread, core, package) in topology order
2891  * skip non-present cpus
2892  */
2893
2894 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2895         struct pkg_data *, struct thread_data *, struct core_data *,
2896         struct pkg_data *), struct thread_data *thread_base,
2897         struct core_data *core_base, struct pkg_data *pkg_base,
2898         struct thread_data *thread_base2, struct core_data *core_base2,
2899         struct pkg_data *pkg_base2)
2900 {
2901         int retval, pkg_no, node_no, core_no, thread_no;
2902
2903         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2904                 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2905                         for (core_no = 0; core_no < topo.cores_per_node;
2906                              ++core_no) {
2907                                 for (thread_no = 0; thread_no <
2908                                         topo.threads_per_core; ++thread_no) {
2909                                         struct thread_data *t, *t2;
2910                                         struct core_data *c, *c2;
2911                                         struct pkg_data *p, *p2;
2912
2913                                         t = GET_THREAD(thread_base, thread_no,
2914                                                        core_no, node_no,
2915                                                        pkg_no);
2916
2917                                         if (cpu_is_not_present(t->cpu_id))
2918                                                 continue;
2919
2920                                         t2 = GET_THREAD(thread_base2, thread_no,
2921                                                         core_no, node_no,
2922                                                         pkg_no);
2923
2924                                         c = GET_CORE(core_base, core_no,
2925                                                      node_no, pkg_no);
2926                                         c2 = GET_CORE(core_base2, core_no,
2927                                                       node_no,
2928                                                       pkg_no);
2929
2930                                         p = GET_PKG(pkg_base, pkg_no);
2931                                         p2 = GET_PKG(pkg_base2, pkg_no);
2932
2933                                         retval = func(t, c, p, t2, c2, p2);
2934                                         if (retval)
2935                                                 return retval;
2936                                 }
2937                         }
2938                 }
2939         }
2940         return 0;
2941 }
2942
2943 /*
2944  * run func(cpu) on every cpu in /proc/stat
2945  * return max_cpu number
2946  */
2947 int for_all_proc_cpus(int (func)(int))
2948 {
2949         FILE *fp;
2950         int cpu_num;
2951         int retval;
2952
2953         fp = fopen_or_die(proc_stat, "r");
2954
2955         retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2956         if (retval != 0)
2957                 err(1, "%s: failed to parse format", proc_stat);
2958
2959         while (1) {
2960                 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2961                 if (retval != 1)
2962                         break;
2963
2964                 retval = func(cpu_num);
2965                 if (retval) {
2966                         fclose(fp);
2967                         return(retval);
2968                 }
2969         }
2970         fclose(fp);
2971         return 0;
2972 }
2973
2974 void re_initialize(void)
2975 {
2976         free_all_buffers();
2977         setup_all_buffers();
2978         fprintf(outf, "turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2979 }
2980
2981 void set_max_cpu_num(void)
2982 {
2983         FILE *filep;
2984         int base_cpu;
2985         unsigned long dummy;
2986         char pathname[64];
2987
2988         base_cpu = sched_getcpu();
2989         if (base_cpu < 0)
2990                 err(1, "cannot find calling cpu ID");
2991         sprintf(pathname,
2992                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings",
2993                 base_cpu);
2994
2995         filep = fopen_or_die(pathname, "r");
2996         topo.max_cpu_num = 0;
2997         while (fscanf(filep, "%lx,", &dummy) == 1)
2998                 topo.max_cpu_num += BITMASK_SIZE;
2999         fclose(filep);
3000         topo.max_cpu_num--; /* 0 based */
3001 }
3002
3003 /*
3004  * count_cpus()
3005  * remember the last one seen, it will be the max
3006  */
3007 int count_cpus(int cpu)
3008 {
3009         topo.num_cpus++;
3010         return 0;
3011 }
3012 int mark_cpu_present(int cpu)
3013 {
3014         CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
3015         return 0;
3016 }
3017
3018 int init_thread_id(int cpu)
3019 {
3020         cpus[cpu].thread_id = -1;
3021         return 0;
3022 }
3023
3024 /*
3025  * snapshot_proc_interrupts()
3026  *
3027  * read and record summary of /proc/interrupts
3028  *
3029  * return 1 if config change requires a restart, else return 0
3030  */
3031 int snapshot_proc_interrupts(void)
3032 {
3033         static FILE *fp;
3034         int column, retval;
3035
3036         if (fp == NULL)
3037                 fp = fopen_or_die("/proc/interrupts", "r");
3038         else
3039                 rewind(fp);
3040
3041         /* read 1st line of /proc/interrupts to get cpu* name for each column */
3042         for (column = 0; column < topo.num_cpus; ++column) {
3043                 int cpu_number;
3044
3045                 retval = fscanf(fp, " CPU%d", &cpu_number);
3046                 if (retval != 1)
3047                         break;
3048
3049                 if (cpu_number > topo.max_cpu_num) {
3050                         warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
3051                         return 1;
3052                 }
3053
3054                 irq_column_2_cpu[column] = cpu_number;
3055                 irqs_per_cpu[cpu_number] = 0;
3056         }
3057
3058         /* read /proc/interrupt count lines and sum up irqs per cpu */
3059         while (1) {
3060                 int column;
3061                 char buf[64];
3062
3063                 retval = fscanf(fp, " %s:", buf);       /* flush irq# "N:" */
3064                 if (retval != 1)
3065                         break;
3066
3067                 /* read the count per cpu */
3068                 for (column = 0; column < topo.num_cpus; ++column) {
3069
3070                         int cpu_number, irq_count;
3071
3072                         retval = fscanf(fp, " %d", &irq_count);
3073                         if (retval != 1)
3074                                 break;
3075
3076                         cpu_number = irq_column_2_cpu[column];
3077                         irqs_per_cpu[cpu_number] += irq_count;
3078
3079                 }
3080
3081                 while (getc(fp) != '\n')
3082                         ;       /* flush interrupt description */
3083
3084         }
3085         return 0;
3086 }
3087 /*
3088  * snapshot_gfx_rc6_ms()
3089  *
3090  * record snapshot of
3091  * /sys/class/drm/card0/power/rc6_residency_ms
3092  *
3093  * return 1 if config change requires a restart, else return 0
3094  */
3095 int snapshot_gfx_rc6_ms(void)
3096 {
3097         FILE *fp;
3098         int retval;
3099
3100         fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
3101
3102         retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
3103         if (retval != 1)
3104                 err(1, "GFX rc6");
3105
3106         fclose(fp);
3107
3108         return 0;
3109 }
3110 /*
3111  * snapshot_gfx_mhz()
3112  *
3113  * record snapshot of
3114  * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
3115  *
3116  * return 1 if config change requires a restart, else return 0
3117  */
3118 int snapshot_gfx_mhz(void)
3119 {
3120         static FILE *fp;
3121         int retval;
3122
3123         if (fp == NULL)
3124                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
3125         else {
3126                 rewind(fp);
3127                 fflush(fp);
3128         }
3129
3130         retval = fscanf(fp, "%d", &gfx_cur_mhz);
3131         if (retval != 1)
3132                 err(1, "GFX MHz");
3133
3134         return 0;
3135 }
3136
3137 /*
3138  * snapshot_gfx_cur_mhz()
3139  *
3140  * record snapshot of
3141  * /sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz
3142  *
3143  * return 1 if config change requires a restart, else return 0
3144  */
3145 int snapshot_gfx_act_mhz(void)
3146 {
3147         static FILE *fp;
3148         int retval;
3149
3150         if (fp == NULL)
3151                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", "r");
3152         else {
3153                 rewind(fp);
3154                 fflush(fp);
3155         }
3156
3157         retval = fscanf(fp, "%d", &gfx_act_mhz);
3158         if (retval != 1)
3159                 err(1, "GFX ACT MHz");
3160
3161         return 0;
3162 }
3163
3164 /*
3165  * snapshot_cpu_lpi()
3166  *
3167  * record snapshot of
3168  * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
3169  */
3170 int snapshot_cpu_lpi_us(void)
3171 {
3172         FILE *fp;
3173         int retval;
3174
3175         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
3176
3177         retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
3178         if (retval != 1) {
3179                 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
3180                 BIC_NOT_PRESENT(BIC_CPU_LPI);
3181                 fclose(fp);
3182                 return -1;
3183         }
3184
3185         fclose(fp);
3186
3187         return 0;
3188 }
3189 /*
3190  * snapshot_sys_lpi()
3191  *
3192  * record snapshot of sys_lpi_file
3193  */
3194 int snapshot_sys_lpi_us(void)
3195 {
3196         FILE *fp;
3197         int retval;
3198
3199         fp = fopen_or_die(sys_lpi_file, "r");
3200
3201         retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
3202         if (retval != 1) {
3203                 fprintf(stderr, "Disabling Low Power Idle System output\n");
3204                 BIC_NOT_PRESENT(BIC_SYS_LPI);
3205                 fclose(fp);
3206                 return -1;
3207         }
3208         fclose(fp);
3209
3210         return 0;
3211 }
3212 /*
3213  * snapshot /proc and /sys files
3214  *
3215  * return 1 if configuration restart needed, else return 0
3216  */
3217 int snapshot_proc_sysfs_files(void)
3218 {
3219         if (DO_BIC(BIC_IRQ))
3220                 if (snapshot_proc_interrupts())
3221                         return 1;
3222
3223         if (DO_BIC(BIC_GFX_rc6))
3224                 snapshot_gfx_rc6_ms();
3225
3226         if (DO_BIC(BIC_GFXMHz))
3227                 snapshot_gfx_mhz();
3228
3229         if (DO_BIC(BIC_GFXACTMHz))
3230                 snapshot_gfx_act_mhz();
3231
3232         if (DO_BIC(BIC_CPU_LPI))
3233                 snapshot_cpu_lpi_us();
3234
3235         if (DO_BIC(BIC_SYS_LPI))
3236                 snapshot_sys_lpi_us();
3237
3238         return 0;
3239 }
3240
3241 int exit_requested;
3242
3243 static void signal_handler (int signal)
3244 {
3245         switch (signal) {
3246         case SIGINT:
3247                 exit_requested = 1;
3248                 if (debug)
3249                         fprintf(stderr, " SIGINT\n");
3250                 break;
3251         case SIGUSR1:
3252                 if (debug > 1)
3253                         fprintf(stderr, "SIGUSR1\n");
3254                 break;
3255         }
3256 }
3257
3258 void setup_signal_handler(void)
3259 {
3260         struct sigaction sa;
3261
3262         memset(&sa, 0, sizeof(sa));
3263
3264         sa.sa_handler = &signal_handler;
3265
3266         if (sigaction(SIGINT, &sa, NULL) < 0)
3267                 err(1, "sigaction SIGINT");
3268         if (sigaction(SIGUSR1, &sa, NULL) < 0)
3269                 err(1, "sigaction SIGUSR1");
3270 }
3271
3272 void do_sleep(void)
3273 {
3274         struct timeval tout;
3275         struct timespec rest;
3276         fd_set readfds;
3277         int retval;
3278
3279         FD_ZERO(&readfds);
3280         FD_SET(0, &readfds);
3281
3282         if (ignore_stdin) {
3283                 nanosleep(&interval_ts, NULL);
3284                 return;
3285         }
3286
3287         tout = interval_tv;
3288         retval = select(1, &readfds, NULL, NULL, &tout);
3289
3290         if (retval == 1) {
3291                 switch (getc(stdin)) {
3292                 case 'q':
3293                         exit_requested = 1;
3294                         break;
3295                 case EOF:
3296                         /*
3297                          * 'stdin' is a pipe closed on the other end. There
3298                          * won't be any further input.
3299                          */
3300                         ignore_stdin = 1;
3301                         /* Sleep the rest of the time */
3302                         rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3303                         rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3304                         nanosleep(&rest, NULL);
3305                 }
3306         }
3307 }
3308
3309 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
3310 {
3311         int ret, idx;
3312         unsigned long long msr_cur, msr_last;
3313
3314         if (!per_cpu_msr_sum)
3315                 return 1;
3316
3317         idx = offset_to_idx(offset);
3318         if (idx < 0)
3319                 return idx;
3320         /* get_msr_sum() = sum + (get_msr() - last) */
3321         ret = get_msr(cpu, offset, &msr_cur);
3322         if (ret)
3323                 return ret;
3324         msr_last = per_cpu_msr_sum[cpu].entries[idx].last;
3325         DELTA_WRAP32(msr_cur, msr_last);
3326         *msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;
3327
3328         return 0;
3329 }
3330
3331 timer_t timerid;
3332
3333 /* Timer callback, update the sum of MSRs periodically. */
3334 static int update_msr_sum(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3335 {
3336         int i, ret;
3337         int cpu = t->cpu_id;
3338
3339         for (i = IDX_PKG_ENERGY; i < IDX_COUNT; i++) {
3340                 unsigned long long msr_cur, msr_last;
3341                 int offset;
3342
3343                 if (!idx_valid(i))
3344                         continue;
3345                 offset = idx_to_offset(i);
3346                 if (offset < 0)
3347                         continue;
3348                 ret = get_msr(cpu, offset, &msr_cur);
3349                 if (ret) {
3350                         fprintf(outf, "Can not update msr(0x%x)\n", offset);
3351                         continue;
3352                 }
3353
3354                 msr_last = per_cpu_msr_sum[cpu].entries[i].last;
3355                 per_cpu_msr_sum[cpu].entries[i].last = msr_cur & 0xffffffff;
3356
3357                 DELTA_WRAP32(msr_cur, msr_last);
3358                 per_cpu_msr_sum[cpu].entries[i].sum += msr_last;
3359         }
3360         return 0;
3361 }
3362
3363 static void
3364 msr_record_handler(union sigval v)
3365 {
3366         for_all_cpus(update_msr_sum, EVEN_COUNTERS);
3367 }
3368
3369 void msr_sum_record(void)
3370 {
3371         struct itimerspec its;
3372         struct sigevent sev;
3373
3374         per_cpu_msr_sum = calloc(topo.max_cpu_num + 1, sizeof(struct msr_sum_array));
3375         if (!per_cpu_msr_sum) {
3376                 fprintf(outf, "Can not allocate memory for long time MSR.\n");
3377                 return;
3378         }
3379         /*
3380          * Signal handler might be restricted, so use thread notifier instead.
3381          */
3382         memset(&sev, 0, sizeof(struct sigevent));
3383         sev.sigev_notify = SIGEV_THREAD;
3384         sev.sigev_notify_function = msr_record_handler;
3385
3386         sev.sigev_value.sival_ptr = &timerid;
3387         if (timer_create(CLOCK_REALTIME, &sev, &timerid) == -1) {
3388                 fprintf(outf, "Can not create timer.\n");
3389                 goto release_msr;
3390         }
3391
3392         its.it_value.tv_sec = 0;
3393         its.it_value.tv_nsec = 1;
3394         /*
3395          * A wraparound time has been calculated early.
3396          * Some sources state that the peak power for a
3397          * microprocessor is usually 1.5 times the TDP rating,
3398          * use 2 * TDP for safety.
3399          */
3400         its.it_interval.tv_sec = rapl_joule_counter_range / 2;
3401         its.it_interval.tv_nsec = 0;
3402
3403         if (timer_settime(timerid, 0, &its, NULL) == -1) {
3404                 fprintf(outf, "Can not set timer.\n");
3405                 goto release_timer;
3406         }
3407         return;
3408
3409  release_timer:
3410         timer_delete(timerid);
3411  release_msr:
3412         free(per_cpu_msr_sum);
3413 }
3414
3415 void turbostat_loop()
3416 {
3417         int retval;
3418         int restarted = 0;
3419         int done_iters = 0;
3420
3421         setup_signal_handler();
3422
3423 restart:
3424         restarted++;
3425
3426         snapshot_proc_sysfs_files();
3427         retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3428         first_counter_read = 0;
3429         if (retval < -1) {
3430                 exit(retval);
3431         } else if (retval == -1) {
3432                 if (restarted > 10) {
3433                         exit(retval);
3434                 }
3435                 re_initialize();
3436                 goto restart;
3437         }
3438         restarted = 0;
3439         done_iters = 0;
3440         gettimeofday(&tv_even, (struct timezone *)NULL);
3441
3442         while (1) {
3443                 if (for_all_proc_cpus(cpu_is_not_present)) {
3444                         re_initialize();
3445                         goto restart;
3446                 }
3447                 do_sleep();
3448                 if (snapshot_proc_sysfs_files())
3449                         goto restart;
3450                 retval = for_all_cpus(get_counters, ODD_COUNTERS);
3451                 if (retval < -1) {
3452                         exit(retval);
3453                 } else if (retval == -1) {
3454                         re_initialize();
3455                         goto restart;
3456                 }
3457                 gettimeofday(&tv_odd, (struct timezone *)NULL);
3458                 timersub(&tv_odd, &tv_even, &tv_delta);
3459                 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3460                         re_initialize();
3461                         goto restart;
3462                 }
3463                 compute_average(EVEN_COUNTERS);
3464                 format_all_counters(EVEN_COUNTERS);
3465                 flush_output_stdout();
3466                 if (exit_requested)
3467                         break;
3468                 if (num_iterations && ++done_iters >= num_iterations)
3469                         break;
3470                 do_sleep();
3471                 if (snapshot_proc_sysfs_files())
3472                         goto restart;
3473                 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3474                 if (retval < -1) {
3475                         exit(retval);
3476                 } else if (retval == -1) {
3477                         re_initialize();
3478                         goto restart;
3479                 }
3480                 gettimeofday(&tv_even, (struct timezone *)NULL);
3481                 timersub(&tv_even, &tv_odd, &tv_delta);
3482                 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3483                         re_initialize();
3484                         goto restart;
3485                 }
3486                 compute_average(ODD_COUNTERS);
3487                 format_all_counters(ODD_COUNTERS);
3488                 flush_output_stdout();
3489                 if (exit_requested)
3490                         break;
3491                 if (num_iterations && ++done_iters >= num_iterations)
3492                         break;
3493         }
3494 }
3495
3496 void check_dev_msr()
3497 {
3498         struct stat sb;
3499         char pathname[32];
3500
3501         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3502         if (stat(pathname, &sb))
3503                 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3504                         err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
3505 }
3506
3507 /*
3508  * check for CAP_SYS_RAWIO
3509  * return 0 on success
3510  * return 1 on fail
3511  */
3512 int check_for_cap_sys_rawio(void)
3513 {
3514         cap_t caps;
3515         cap_flag_value_t cap_flag_value;
3516
3517         caps = cap_get_proc();
3518         if (caps == NULL)
3519                 err(-6, "cap_get_proc\n");
3520
3521         if (cap_get_flag(caps, CAP_SYS_RAWIO, CAP_EFFECTIVE, &cap_flag_value))
3522                 err(-6, "cap_get\n");
3523
3524         if (cap_flag_value != CAP_SET) {
3525                 warnx("capget(CAP_SYS_RAWIO) failed,"
3526                         " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3527                 return 1;
3528         }
3529
3530         if (cap_free(caps) == -1)
3531                 err(-6, "cap_free\n");
3532
3533         return 0;
3534 }
3535 void check_permissions(void)
3536 {
3537         int do_exit = 0;
3538         char pathname[32];
3539
3540         /* check for CAP_SYS_RAWIO */
3541         do_exit += check_for_cap_sys_rawio();
3542
3543         /* test file permissions */
3544         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3545         if (euidaccess(pathname, R_OK)) {
3546                 do_exit++;
3547                 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3548         }
3549
3550         /* if all else fails, thell them to be root */
3551         if (do_exit)
3552                 if (getuid() != 0)
3553                         warnx("... or simply run as root");
3554
3555         if (do_exit)
3556                 exit(-6);
3557 }
3558
3559 /*
3560  * NHM adds support for additional MSRs:
3561  *
3562  * MSR_SMI_COUNT                   0x00000034
3563  *
3564  * MSR_PLATFORM_INFO               0x000000ce
3565  * MSR_PKG_CST_CONFIG_CONTROL     0x000000e2
3566  *
3567  * MSR_MISC_PWR_MGMT               0x000001aa
3568  *
3569  * MSR_PKG_C3_RESIDENCY            0x000003f8
3570  * MSR_PKG_C6_RESIDENCY            0x000003f9
3571  * MSR_CORE_C3_RESIDENCY           0x000003fc
3572  * MSR_CORE_C6_RESIDENCY           0x000003fd
3573  *
3574  * Side effect:
3575  * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3576  * sets has_misc_feature_control
3577  */
3578 int probe_nhm_msrs(unsigned int family, unsigned int model)
3579 {
3580         unsigned long long msr;
3581         unsigned int base_ratio;
3582         int *pkg_cstate_limits;
3583
3584         if (!genuine_intel)
3585                 return 0;
3586
3587         if (family != 6)
3588                 return 0;
3589
3590         bclk = discover_bclk(family, model);
3591
3592         switch (model) {
3593         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3594         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3595                 pkg_cstate_limits = nhm_pkg_cstate_limits;
3596                 break;
3597         case INTEL_FAM6_SANDYBRIDGE:    /* SNB */
3598         case INTEL_FAM6_SANDYBRIDGE_X:  /* SNB Xeon */
3599         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3600         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3601                 pkg_cstate_limits = snb_pkg_cstate_limits;
3602                 has_misc_feature_control = 1;
3603                 break;
3604         case INTEL_FAM6_HASWELL:        /* HSW */
3605         case INTEL_FAM6_HASWELL_G:      /* HSW */
3606         case INTEL_FAM6_HASWELL_X:      /* HSX */
3607         case INTEL_FAM6_HASWELL_L:      /* HSW */
3608         case INTEL_FAM6_BROADWELL:      /* BDW */
3609         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3610         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3611         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3612         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3613                 pkg_cstate_limits = hsw_pkg_cstate_limits;
3614                 has_misc_feature_control = 1;
3615                 break;
3616         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3617                 pkg_cstate_limits = skx_pkg_cstate_limits;
3618                 has_misc_feature_control = 1;
3619                 break;
3620         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3621                 no_MSR_MISC_PWR_MGMT = 1;
3622         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
3623                 pkg_cstate_limits = slv_pkg_cstate_limits;
3624                 break;
3625         case INTEL_FAM6_ATOM_AIRMONT:   /* AMT */
3626                 pkg_cstate_limits = amt_pkg_cstate_limits;
3627                 no_MSR_MISC_PWR_MGMT = 1;
3628                 break;
3629         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI */
3630                 pkg_cstate_limits = phi_pkg_cstate_limits;
3631                 break;
3632         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3633         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3634         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
3635         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
3636         case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
3637                 pkg_cstate_limits = glm_pkg_cstate_limits;
3638                 break;
3639         default:
3640                 return 0;
3641         }
3642         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3643         pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3644
3645         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3646         base_ratio = (msr >> 8) & 0xFF;
3647
3648         base_hz = base_ratio * bclk * 1000000;
3649         has_base_hz = 1;
3650         return 1;
3651 }
3652 /*
3653  * SLV client has support for unique MSRs:
3654  *
3655  * MSR_CC6_DEMOTION_POLICY_CONFIG
3656  * MSR_MC6_DEMOTION_POLICY_CONFIG
3657  */
3658
3659 int has_slv_msrs(unsigned int family, unsigned int model)
3660 {
3661         if (!genuine_intel)
3662                 return 0;
3663
3664         switch (model) {
3665         case INTEL_FAM6_ATOM_SILVERMONT:
3666         case INTEL_FAM6_ATOM_SILVERMONT_MID:
3667         case INTEL_FAM6_ATOM_AIRMONT_MID:
3668                 return 1;
3669         }
3670         return 0;
3671 }
3672 int is_dnv(unsigned int family, unsigned int model)
3673 {
3674
3675         if (!genuine_intel)
3676                 return 0;
3677
3678         switch (model) {
3679         case INTEL_FAM6_ATOM_GOLDMONT_D:
3680                 return 1;
3681         }
3682         return 0;
3683 }
3684 int is_bdx(unsigned int family, unsigned int model)
3685 {
3686
3687         if (!genuine_intel)
3688                 return 0;
3689
3690         switch (model) {
3691         case INTEL_FAM6_BROADWELL_X:
3692                 return 1;
3693         }
3694         return 0;
3695 }
3696 int is_skx(unsigned int family, unsigned int model)
3697 {
3698
3699         if (!genuine_intel)
3700                 return 0;
3701
3702         switch (model) {
3703         case INTEL_FAM6_SKYLAKE_X:
3704                 return 1;
3705         }
3706         return 0;
3707 }
3708 int is_ehl(unsigned int family, unsigned int model)
3709 {
3710         if (!genuine_intel)
3711                 return 0;
3712
3713         switch (model) {
3714         case INTEL_FAM6_ATOM_TREMONT:
3715                 return 1;
3716         }
3717         return 0;
3718 }
3719 int is_jvl(unsigned int family, unsigned int model)
3720 {
3721         if (!genuine_intel)
3722                 return 0;
3723
3724         switch (model) {
3725         case INTEL_FAM6_ATOM_TREMONT_D:
3726                 return 1;
3727         }
3728         return 0;
3729 }
3730
3731 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3732 {
3733         if (has_slv_msrs(family, model))
3734                 return 0;
3735
3736         switch (model) {
3737         /* Nehalem compatible, but do not include turbo-ratio limit support */
3738         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3739         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI - Knights Landing (different MSR definition) */
3740                 return 0;
3741         default:
3742                 return 1;
3743         }
3744 }
3745 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3746 {
3747         if (has_slv_msrs(family, model))
3748                 return 1;
3749
3750         return 0;
3751 }
3752 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3753 {
3754         if (!genuine_intel)
3755                 return 0;
3756
3757         if (family != 6)
3758                 return 0;
3759
3760         switch (model) {
3761         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3762         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3763                 return 1;
3764         default:
3765                 return 0;
3766         }
3767 }
3768 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3769 {
3770         if (!genuine_intel)
3771                 return 0;
3772
3773         if (family != 6)
3774                 return 0;
3775
3776         switch (model) {
3777         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3778                 return 1;
3779         default:
3780                 return 0;
3781         }
3782 }
3783
3784 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3785 {
3786         if (!genuine_intel)
3787                 return 0;
3788
3789         if (family != 6)
3790                 return 0;
3791
3792         switch (model) {
3793         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3794                 return 1;
3795         default:
3796                 return 0;
3797         }
3798 }
3799 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3800 {
3801         if (!genuine_intel)
3802                 return 0;
3803
3804         if (family != 6)
3805                 return 0;
3806
3807         switch (model) {
3808         case INTEL_FAM6_ATOM_GOLDMONT:
3809         case INTEL_FAM6_SKYLAKE_X:
3810                 return 1;
3811         default:
3812                 return 0;
3813         }
3814 }
3815 int has_config_tdp(unsigned int family, unsigned int model)
3816 {
3817         if (!genuine_intel)
3818                 return 0;
3819
3820         if (family != 6)
3821                 return 0;
3822
3823         switch (model) {
3824         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3825         case INTEL_FAM6_HASWELL:        /* HSW */
3826         case INTEL_FAM6_HASWELL_X:      /* HSX */
3827         case INTEL_FAM6_HASWELL_L:      /* HSW */
3828         case INTEL_FAM6_HASWELL_G:      /* HSW */
3829         case INTEL_FAM6_BROADWELL:      /* BDW */
3830         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3831         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3832         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3833         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3834         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3835
3836         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3837                 return 1;
3838         default:
3839                 return 0;
3840         }
3841 }
3842
3843 static void
3844 remove_underbar(char *s)
3845 {
3846         char *to = s;
3847
3848         while (*s) {
3849                 if (*s != '_')
3850                         *to++ = *s;
3851                 s++;
3852         }
3853
3854         *to = 0;
3855 }
3856
3857 static void
3858 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3859 {
3860         if (!do_nhm_platform_info)
3861                 return;
3862
3863         dump_nhm_platform_info();
3864
3865         if (has_hsw_turbo_ratio_limit(family, model))
3866                 dump_hsw_turbo_ratio_limits();
3867
3868         if (has_ivt_turbo_ratio_limit(family, model))
3869                 dump_ivt_turbo_ratio_limits();
3870
3871         if (has_turbo_ratio_limit(family, model))
3872                 dump_turbo_ratio_limits(family, model);
3873
3874         if (has_atom_turbo_ratio_limit(family, model))
3875                 dump_atom_turbo_ratio_limits();
3876
3877         if (has_knl_turbo_ratio_limit(family, model))
3878                 dump_knl_turbo_ratio_limits();
3879
3880         if (has_config_tdp(family, model))
3881                 dump_config_tdp();
3882
3883         dump_nhm_cst_cfg();
3884 }
3885
3886 static void dump_sysfs_file(char *path)
3887 {
3888         FILE *input;
3889         char cpuidle_buf[64];
3890
3891         input = fopen(path, "r");
3892         if (input == NULL) {
3893                 if (debug)
3894                         fprintf(outf, "NSFOD %s\n", path);
3895                 return;
3896         }
3897         if (!fgets(cpuidle_buf, sizeof(cpuidle_buf), input))
3898                 err(1, "%s: failed to read file", path);
3899         fclose(input);
3900
3901         fprintf(outf, "%s: %s", strrchr(path, '/') + 1, cpuidle_buf);
3902 }
3903 static void
3904 dump_sysfs_cstate_config(void)
3905 {
3906         char path[64];
3907         char name_buf[16];
3908         char desc[64];
3909         FILE *input;
3910         int state;
3911         char *sp;
3912
3913         if (access("/sys/devices/system/cpu/cpuidle", R_OK)) {
3914                 fprintf(outf, "cpuidle not loaded\n");
3915                 return;
3916         }
3917
3918         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_driver");
3919         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor");
3920         dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor_ro");
3921
3922         for (state = 0; state < 10; ++state) {
3923
3924                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3925                         base_cpu, state);
3926                 input = fopen(path, "r");
3927                 if (input == NULL)
3928                         continue;
3929                 if (!fgets(name_buf, sizeof(name_buf), input))
3930                         err(1, "%s: failed to read file", path);
3931
3932                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3933                 sp = strchr(name_buf, '-');
3934                 if (!sp)
3935                         sp = strchrnul(name_buf, '\n');
3936                 *sp = '\0';
3937                 fclose(input);
3938
3939                 remove_underbar(name_buf);
3940
3941                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3942                         base_cpu, state);
3943                 input = fopen(path, "r");
3944                 if (input == NULL)
3945                         continue;
3946                 if (!fgets(desc, sizeof(desc), input))
3947                         err(1, "%s: failed to read file", path);
3948
3949                 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3950                 fclose(input);
3951         }
3952 }
3953 static void
3954 dump_sysfs_pstate_config(void)
3955 {
3956         char path[64];
3957         char driver_buf[64];
3958         char governor_buf[64];
3959         FILE *input;
3960         int turbo;
3961
3962         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3963                         base_cpu);
3964         input = fopen(path, "r");
3965         if (input == NULL) {
3966                 fprintf(outf, "NSFOD %s\n", path);
3967                 return;
3968         }
3969         if (!fgets(driver_buf, sizeof(driver_buf), input))
3970                 err(1, "%s: failed to read file", path);
3971         fclose(input);
3972
3973         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3974                         base_cpu);
3975         input = fopen(path, "r");
3976         if (input == NULL) {
3977                 fprintf(outf, "NSFOD %s\n", path);
3978                 return;
3979         }
3980         if (!fgets(governor_buf, sizeof(governor_buf), input))
3981                 err(1, "%s: failed to read file", path);
3982         fclose(input);
3983
3984         fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3985         fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3986
3987         sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3988         input = fopen(path, "r");
3989         if (input != NULL) {
3990                 if (fscanf(input, "%d", &turbo) != 1)
3991                         err(1, "%s: failed to parse number from file", path);
3992                 fprintf(outf, "cpufreq boost: %d\n", turbo);
3993                 fclose(input);
3994         }
3995
3996         sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3997         input = fopen(path, "r");
3998         if (input != NULL) {
3999                 if (fscanf(input, "%d", &turbo) != 1)
4000                         err(1, "%s: failed to parse number from file", path);
4001                 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
4002                 fclose(input);
4003         }
4004 }
4005
4006
4007 /*
4008  * print_epb()
4009  * Decode the ENERGY_PERF_BIAS MSR
4010  */
4011 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4012 {
4013         char *epb_string;
4014         int cpu, epb;
4015
4016         if (!has_epb)
4017                 return 0;
4018
4019         cpu = t->cpu_id;
4020
4021         /* EPB is per-package */
4022         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4023                 return 0;
4024
4025         if (cpu_migrate(cpu)) {
4026                 fprintf(outf, "print_epb: Could not migrate to CPU %d\n", cpu);
4027                 return -1;
4028         }
4029
4030         epb = get_epb(cpu);
4031         if (epb < 0)
4032                 return 0;
4033
4034         switch (epb) {
4035         case ENERGY_PERF_BIAS_PERFORMANCE:
4036                 epb_string = "performance";
4037                 break;
4038         case ENERGY_PERF_BIAS_NORMAL:
4039                 epb_string = "balanced";
4040                 break;
4041         case ENERGY_PERF_BIAS_POWERSAVE:
4042                 epb_string = "powersave";
4043                 break;
4044         default:
4045                 epb_string = "custom";
4046                 break;
4047         }
4048         fprintf(outf, "cpu%d: EPB: %d (%s)\n", cpu, epb, epb_string);
4049
4050         return 0;
4051 }
4052 /*
4053  * print_hwp()
4054  * Decode the MSR_HWP_CAPABILITIES
4055  */
4056 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4057 {
4058         unsigned long long msr;
4059         int cpu;
4060
4061         if (!has_hwp)
4062                 return 0;
4063
4064         cpu = t->cpu_id;
4065
4066         /* MSR_HWP_CAPABILITIES is per-package */
4067         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4068                 return 0;
4069
4070         if (cpu_migrate(cpu)) {
4071                 fprintf(outf, "print_hwp: Could not migrate to CPU %d\n", cpu);
4072                 return -1;
4073         }
4074
4075         if (get_msr(cpu, MSR_PM_ENABLE, &msr))
4076                 return 0;
4077
4078         fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
4079                 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
4080
4081         /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
4082         if ((msr & (1 << 0)) == 0)
4083                 return 0;
4084
4085         if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
4086                 return 0;
4087
4088         fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
4089                         "(high %d guar %d eff %d low %d)\n",
4090                         cpu, msr,
4091                         (unsigned int)HWP_HIGHEST_PERF(msr),
4092                         (unsigned int)HWP_GUARANTEED_PERF(msr),
4093                         (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
4094                         (unsigned int)HWP_LOWEST_PERF(msr));
4095
4096         if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
4097                 return 0;
4098
4099         fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
4100                         "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
4101                         cpu, msr,
4102                         (unsigned int)(((msr) >> 0) & 0xff),
4103                         (unsigned int)(((msr) >> 8) & 0xff),
4104                         (unsigned int)(((msr) >> 16) & 0xff),
4105                         (unsigned int)(((msr) >> 24) & 0xff),
4106                         (unsigned int)(((msr) >> 32) & 0xff3),
4107                         (unsigned int)(((msr) >> 42) & 0x1));
4108
4109         if (has_hwp_pkg) {
4110                 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
4111                         return 0;
4112
4113                 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
4114                         "(min %d max %d des %d epp 0x%x window 0x%x)\n",
4115                         cpu, msr,
4116                         (unsigned int)(((msr) >> 0) & 0xff),
4117                         (unsigned int)(((msr) >> 8) & 0xff),
4118                         (unsigned int)(((msr) >> 16) & 0xff),
4119                         (unsigned int)(((msr) >> 24) & 0xff),
4120                         (unsigned int)(((msr) >> 32) & 0xff3));
4121         }
4122         if (has_hwp_notify) {
4123                 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
4124                         return 0;
4125
4126                 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
4127                         "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
4128                         cpu, msr,
4129                         ((msr) & 0x1) ? "EN" : "Dis",
4130                         ((msr) & 0x2) ? "EN" : "Dis");
4131         }
4132         if (get_msr(cpu, MSR_HWP_STATUS, &msr))
4133                 return 0;
4134
4135         fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
4136                         "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
4137                         cpu, msr,
4138                         ((msr) & 0x1) ? "" : "No-",
4139                         ((msr) & 0x2) ? "" : "No-");
4140
4141         return 0;
4142 }
4143
4144 /*
4145  * print_perf_limit()
4146  */
4147 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4148 {
4149         unsigned long long msr;
4150         int cpu;
4151
4152         cpu = t->cpu_id;
4153
4154         /* per-package */
4155         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4156                 return 0;
4157
4158         if (cpu_migrate(cpu)) {
4159                 fprintf(outf, "print_perf_limit: Could not migrate to CPU %d\n", cpu);
4160                 return -1;
4161         }
4162
4163         if (do_core_perf_limit_reasons) {
4164                 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
4165                 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4166                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
4167                         (msr & 1 << 15) ? "bit15, " : "",
4168                         (msr & 1 << 14) ? "bit14, " : "",
4169                         (msr & 1 << 13) ? "Transitions, " : "",
4170                         (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
4171                         (msr & 1 << 11) ? "PkgPwrL2, " : "",
4172                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4173                         (msr & 1 << 9) ? "CorePwr, " : "",
4174                         (msr & 1 << 8) ? "Amps, " : "",
4175                         (msr & 1 << 6) ? "VR-Therm, " : "",
4176                         (msr & 1 << 5) ? "Auto-HWP, " : "",
4177                         (msr & 1 << 4) ? "Graphics, " : "",
4178                         (msr & 1 << 2) ? "bit2, " : "",
4179                         (msr & 1 << 1) ? "ThermStatus, " : "",
4180                         (msr & 1 << 0) ? "PROCHOT, " : "");
4181                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
4182                         (msr & 1 << 31) ? "bit31, " : "",
4183                         (msr & 1 << 30) ? "bit30, " : "",
4184                         (msr & 1 << 29) ? "Transitions, " : "",
4185                         (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
4186                         (msr & 1 << 27) ? "PkgPwrL2, " : "",
4187                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4188                         (msr & 1 << 25) ? "CorePwr, " : "",
4189                         (msr & 1 << 24) ? "Amps, " : "",
4190                         (msr & 1 << 22) ? "VR-Therm, " : "",
4191                         (msr & 1 << 21) ? "Auto-HWP, " : "",
4192                         (msr & 1 << 20) ? "Graphics, " : "",
4193                         (msr & 1 << 18) ? "bit18, " : "",
4194                         (msr & 1 << 17) ? "ThermStatus, " : "",
4195                         (msr & 1 << 16) ? "PROCHOT, " : "");
4196
4197         }
4198         if (do_gfx_perf_limit_reasons) {
4199                 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
4200                 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4201                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
4202                         (msr & 1 << 0) ? "PROCHOT, " : "",
4203                         (msr & 1 << 1) ? "ThermStatus, " : "",
4204                         (msr & 1 << 4) ? "Graphics, " : "",
4205                         (msr & 1 << 6) ? "VR-Therm, " : "",
4206                         (msr & 1 << 8) ? "Amps, " : "",
4207                         (msr & 1 << 9) ? "GFXPwr, " : "",
4208                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4209                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
4210                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
4211                         (msr & 1 << 16) ? "PROCHOT, " : "",
4212                         (msr & 1 << 17) ? "ThermStatus, " : "",
4213                         (msr & 1 << 20) ? "Graphics, " : "",
4214                         (msr & 1 << 22) ? "VR-Therm, " : "",
4215                         (msr & 1 << 24) ? "Amps, " : "",
4216                         (msr & 1 << 25) ? "GFXPwr, " : "",
4217                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4218                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
4219         }
4220         if (do_ring_perf_limit_reasons) {
4221                 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
4222                 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
4223                 fprintf(outf, " (Active: %s%s%s%s%s%s)",
4224                         (msr & 1 << 0) ? "PROCHOT, " : "",
4225                         (msr & 1 << 1) ? "ThermStatus, " : "",
4226                         (msr & 1 << 6) ? "VR-Therm, " : "",
4227                         (msr & 1 << 8) ? "Amps, " : "",
4228                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
4229                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
4230                 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
4231                         (msr & 1 << 16) ? "PROCHOT, " : "",
4232                         (msr & 1 << 17) ? "ThermStatus, " : "",
4233                         (msr & 1 << 22) ? "VR-Therm, " : "",
4234                         (msr & 1 << 24) ? "Amps, " : "",
4235                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
4236                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
4237         }
4238         return 0;
4239 }
4240
4241 #define RAPL_POWER_GRANULARITY  0x7FFF  /* 15 bit power granularity */
4242 #define RAPL_TIME_GRANULARITY   0x3F /* 6 bit time granularity */
4243
4244 double get_tdp_intel(unsigned int model)
4245 {
4246         unsigned long long msr;
4247
4248         if (do_rapl & RAPL_PKG_POWER_INFO)
4249                 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
4250                         return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
4251
4252         switch (model) {
4253         case INTEL_FAM6_ATOM_SILVERMONT:
4254         case INTEL_FAM6_ATOM_SILVERMONT_D:
4255                 return 30.0;
4256         default:
4257                 return 135.0;
4258         }
4259 }
4260
4261 double get_tdp_amd(unsigned int family)
4262 {
4263         /* This is the max stock TDP of HEDT/Server Fam17h+ chips */
4264         return 280.0;
4265 }
4266
4267 /*
4268  * rapl_dram_energy_units_probe()
4269  * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
4270  */
4271 static double
4272 rapl_dram_energy_units_probe(int  model, double rapl_energy_units)
4273 {
4274         /* only called for genuine_intel, family 6 */
4275
4276         switch (model) {
4277         case INTEL_FAM6_HASWELL_X:      /* HSX */
4278         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4279         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4280         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4281                 return (rapl_dram_energy_units = 15.3 / 1000000);
4282         default:
4283                 return (rapl_energy_units);
4284         }
4285 }
4286
4287 void rapl_probe_intel(unsigned int family, unsigned int model)
4288 {
4289         unsigned long long msr;
4290         unsigned int time_unit;
4291         double tdp;
4292
4293         if (family != 6)
4294                 return;
4295
4296         switch (model) {
4297         case INTEL_FAM6_SANDYBRIDGE:
4298         case INTEL_FAM6_IVYBRIDGE:
4299         case INTEL_FAM6_HASWELL:        /* HSW */
4300         case INTEL_FAM6_HASWELL_L:      /* HSW */
4301         case INTEL_FAM6_HASWELL_G:      /* HSW */
4302         case INTEL_FAM6_BROADWELL:      /* BDW */
4303         case INTEL_FAM6_BROADWELL_G:    /* BDW */
4304                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
4305                 if (rapl_joules) {
4306                         BIC_PRESENT(BIC_Pkg_J);
4307                         BIC_PRESENT(BIC_Cor_J);
4308                         BIC_PRESENT(BIC_GFX_J);
4309                 } else {
4310                         BIC_PRESENT(BIC_PkgWatt);
4311                         BIC_PRESENT(BIC_CorWatt);
4312                         BIC_PRESENT(BIC_GFXWatt);
4313                 }
4314                 break;
4315         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4316         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4317                 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
4318                 if (rapl_joules)
4319                         BIC_PRESENT(BIC_Pkg_J);
4320                 else
4321                         BIC_PRESENT(BIC_PkgWatt);
4322                 break;
4323         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
4324                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4325                 if (rapl_joules) {
4326                         BIC_PRESENT(BIC_Pkg_J);
4327                         BIC_PRESENT(BIC_Cor_J);
4328                         BIC_PRESENT(BIC_RAM_J);
4329                         BIC_PRESENT(BIC_GFX_J);
4330                 } else {
4331                         BIC_PRESENT(BIC_PkgWatt);
4332                         BIC_PRESENT(BIC_CorWatt);
4333                         BIC_PRESENT(BIC_RAMWatt);
4334                         BIC_PRESENT(BIC_GFXWatt);
4335                 }
4336                 break;
4337         case INTEL_FAM6_ATOM_TREMONT_D: /* JVL */
4338                 do_rapl = RAPL_PKG | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4339                 BIC_PRESENT(BIC_PKG__);
4340                 if (rapl_joules)
4341                         BIC_PRESENT(BIC_Pkg_J);
4342                 else
4343                         BIC_PRESENT(BIC_PkgWatt);
4344                 break;
4345         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4346         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4347                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
4348                 BIC_PRESENT(BIC_PKG__);
4349                 BIC_PRESENT(BIC_RAM__);
4350                 if (rapl_joules) {
4351                         BIC_PRESENT(BIC_Pkg_J);
4352                         BIC_PRESENT(BIC_Cor_J);
4353                         BIC_PRESENT(BIC_RAM_J);
4354                         BIC_PRESENT(BIC_GFX_J);
4355                 } else {
4356                         BIC_PRESENT(BIC_PkgWatt);
4357                         BIC_PRESENT(BIC_CorWatt);
4358                         BIC_PRESENT(BIC_RAMWatt);
4359                         BIC_PRESENT(BIC_GFXWatt);
4360                 }
4361                 break;
4362         case INTEL_FAM6_HASWELL_X:      /* HSX */
4363         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4364         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4365         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4366                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
4367                 BIC_PRESENT(BIC_PKG__);
4368                 BIC_PRESENT(BIC_RAM__);
4369                 if (rapl_joules) {
4370                         BIC_PRESENT(BIC_Pkg_J);
4371                         BIC_PRESENT(BIC_RAM_J);
4372                 } else {
4373                         BIC_PRESENT(BIC_PkgWatt);
4374                         BIC_PRESENT(BIC_RAMWatt);
4375                 }
4376                 break;
4377         case INTEL_FAM6_SANDYBRIDGE_X:
4378         case INTEL_FAM6_IVYBRIDGE_X:
4379                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
4380                 BIC_PRESENT(BIC_PKG__);
4381                 BIC_PRESENT(BIC_RAM__);
4382                 if (rapl_joules) {
4383                         BIC_PRESENT(BIC_Pkg_J);
4384                         BIC_PRESENT(BIC_Cor_J);
4385                         BIC_PRESENT(BIC_RAM_J);
4386                 } else {
4387                         BIC_PRESENT(BIC_PkgWatt);
4388                         BIC_PRESENT(BIC_CorWatt);
4389                         BIC_PRESENT(BIC_RAMWatt);
4390                 }
4391                 break;
4392         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4393         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4394                 do_rapl = RAPL_PKG | RAPL_CORES;
4395                 if (rapl_joules) {
4396                         BIC_PRESENT(BIC_Pkg_J);
4397                         BIC_PRESENT(BIC_Cor_J);
4398                 } else {
4399                         BIC_PRESENT(BIC_PkgWatt);
4400                         BIC_PRESENT(BIC_CorWatt);
4401                 }
4402                 break;
4403         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4404                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
4405                 BIC_PRESENT(BIC_PKG__);
4406                 BIC_PRESENT(BIC_RAM__);
4407                 if (rapl_joules) {
4408                         BIC_PRESENT(BIC_Pkg_J);
4409                         BIC_PRESENT(BIC_Cor_J);
4410                         BIC_PRESENT(BIC_RAM_J);
4411                 } else {
4412                         BIC_PRESENT(BIC_PkgWatt);
4413                         BIC_PRESENT(BIC_CorWatt);
4414                         BIC_PRESENT(BIC_RAMWatt);
4415                 }
4416                 break;
4417         default:
4418                 return;
4419         }
4420
4421         /* units on package 0, verify later other packages match */
4422         if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
4423                 return;
4424
4425         rapl_power_units = 1.0 / (1 << (msr & 0xF));
4426         if (model == INTEL_FAM6_ATOM_SILVERMONT)
4427                 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
4428         else
4429                 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
4430
4431         rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
4432
4433         time_unit = msr >> 16 & 0xF;
4434         if (time_unit == 0)
4435                 time_unit = 0xA;
4436
4437         rapl_time_units = 1.0 / (1 << (time_unit));
4438
4439         tdp = get_tdp_intel(model);
4440
4441         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4442         if (!quiet)
4443                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4444 }
4445
4446 void rapl_probe_amd(unsigned int family, unsigned int model)
4447 {
4448         unsigned long long msr;
4449         unsigned int eax, ebx, ecx, edx;
4450         unsigned int has_rapl = 0;
4451         double tdp;
4452
4453         if (max_extended_level >= 0x80000007) {
4454                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4455                 /* RAPL (Fam 17h+) */
4456                 has_rapl = edx & (1 << 14);
4457         }
4458
4459         if (!has_rapl || family < 0x17)
4460                 return;
4461
4462         do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
4463         if (rapl_joules) {
4464                 BIC_PRESENT(BIC_Pkg_J);
4465                 BIC_PRESENT(BIC_Cor_J);
4466         } else {
4467                 BIC_PRESENT(BIC_PkgWatt);
4468                 BIC_PRESENT(BIC_CorWatt);
4469         }
4470
4471         if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4472                 return;
4473
4474         rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4475         rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4476         rapl_power_units = ldexp(1.0, -(msr & 0xf));
4477
4478         tdp = get_tdp_amd(family);
4479
4480         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4481         if (!quiet)
4482                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4483 }
4484
4485 /*
4486  * rapl_probe()
4487  *
4488  * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4489  */
4490 void rapl_probe(unsigned int family, unsigned int model)
4491 {
4492         if (genuine_intel)
4493                 rapl_probe_intel(family, model);
4494         if (authentic_amd || hygon_genuine)
4495                 rapl_probe_amd(family, model);
4496 }
4497
4498 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
4499 {
4500         if (!genuine_intel)
4501                 return;
4502
4503         if (family != 6)
4504                 return;
4505
4506         switch (model) {
4507         case INTEL_FAM6_HASWELL:        /* HSW */
4508         case INTEL_FAM6_HASWELL_L:      /* HSW */
4509         case INTEL_FAM6_HASWELL_G:      /* HSW */
4510                 do_gfx_perf_limit_reasons = 1;
4511         case INTEL_FAM6_HASWELL_X:      /* HSX */
4512                 do_core_perf_limit_reasons = 1;
4513                 do_ring_perf_limit_reasons = 1;
4514         default:
4515                 return;
4516         }
4517 }
4518
4519 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4520 {
4521         if (is_skx(family, model) || is_bdx(family, model))
4522                 has_automatic_cstate_conversion = 1;
4523 }
4524
4525 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4526 {
4527         unsigned long long msr;
4528         unsigned int dts, dts2;
4529         int cpu;
4530
4531         if (!(do_dts || do_ptm))
4532                 return 0;
4533
4534         cpu = t->cpu_id;
4535
4536         /* DTS is per-core, no need to print for each thread */
4537         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
4538                 return 0;
4539
4540         if (cpu_migrate(cpu)) {
4541                 fprintf(outf, "print_thermal: Could not migrate to CPU %d\n", cpu);
4542                 return -1;
4543         }
4544
4545         if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4546                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4547                         return 0;
4548
4549                 dts = (msr >> 16) & 0x7F;
4550                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4551                         cpu, msr, tcc_activation_temp - dts);
4552
4553                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4554                         return 0;
4555
4556                 dts = (msr >> 16) & 0x7F;
4557                 dts2 = (msr >> 8) & 0x7F;
4558                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4559                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4560         }
4561
4562
4563         if (do_dts && debug) {
4564                 unsigned int resolution;
4565
4566                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4567                         return 0;
4568
4569                 dts = (msr >> 16) & 0x7F;
4570                 resolution = (msr >> 27) & 0xF;
4571                 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4572                         cpu, msr, tcc_activation_temp - dts, resolution);
4573
4574                 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4575                         return 0;
4576
4577                 dts = (msr >> 16) & 0x7F;
4578                 dts2 = (msr >> 8) & 0x7F;
4579                 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4580                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4581         }
4582
4583         return 0;
4584 }
4585
4586 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4587 {
4588         fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
4589                 cpu, label,
4590                 ((msr >> 15) & 1) ? "EN" : "DIS",
4591                 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4592                 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4593                 (((msr >> 16) & 1) ? "EN" : "DIS"));
4594
4595         return;
4596 }
4597
4598 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4599 {
4600         unsigned long long msr;
4601         const char *msr_name;
4602         int cpu;
4603
4604         if (!do_rapl)
4605                 return 0;
4606
4607         /* RAPL counters are per package, so print only for 1st thread/package */
4608         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4609                 return 0;
4610
4611         cpu = t->cpu_id;
4612         if (cpu_migrate(cpu)) {
4613                 fprintf(outf, "print_rapl: Could not migrate to CPU %d\n", cpu);
4614                 return -1;
4615         }
4616
4617         if (do_rapl & RAPL_AMD_F17H) {
4618                 msr_name = "MSR_RAPL_PWR_UNIT";
4619                 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4620                         return -1;
4621         } else {
4622                 msr_name = "MSR_RAPL_POWER_UNIT";
4623                 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4624                         return -1;
4625         }
4626
4627         fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
4628                 rapl_power_units, rapl_energy_units, rapl_time_units);
4629
4630         if (do_rapl & RAPL_PKG_POWER_INFO) {
4631
4632                 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4633                         return -5;
4634
4635
4636                 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4637                         cpu, msr,
4638                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4639                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4640                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4641                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4642
4643         }
4644         if (do_rapl & RAPL_PKG) {
4645
4646                 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4647                         return -9;
4648
4649                 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
4650                         cpu, msr, (msr >> 63) & 1 ? "" : "UN");
4651
4652                 print_power_limit_msr(cpu, msr, "PKG Limit #1");
4653                 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
4654                         cpu,
4655                         ((msr >> 47) & 1) ? "EN" : "DIS",
4656                         ((msr >> 32) & 0x7FFF) * rapl_power_units,
4657                         (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4658                         ((msr >> 48) & 1) ? "EN" : "DIS");
4659         }
4660
4661         if (do_rapl & RAPL_DRAM_POWER_INFO) {
4662                 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4663                         return -6;
4664
4665                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4666                         cpu, msr,
4667                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4668                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4669                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4670                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4671         }
4672         if (do_rapl & RAPL_DRAM) {
4673                 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4674                         return -9;
4675                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4676                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4677
4678                 print_power_limit_msr(cpu, msr, "DRAM Limit");
4679         }
4680         if (do_rapl & RAPL_CORE_POLICY) {
4681                 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4682                         return -7;
4683
4684                 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4685         }
4686         if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4687                 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4688                         return -9;
4689                 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4690                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4691                 print_power_limit_msr(cpu, msr, "Cores Limit");
4692         }
4693         if (do_rapl & RAPL_GFX) {
4694                 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4695                         return -8;
4696
4697                 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4698
4699                 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4700                         return -9;
4701                 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4702                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4703                 print_power_limit_msr(cpu, msr, "GFX Limit");
4704         }
4705         return 0;
4706 }
4707
4708 /*
4709  * SNB adds support for additional MSRs:
4710  *
4711  * MSR_PKG_C7_RESIDENCY            0x000003fa
4712  * MSR_CORE_C7_RESIDENCY           0x000003fe
4713  * MSR_PKG_C2_RESIDENCY            0x0000060d
4714  */
4715
4716 int has_snb_msrs(unsigned int family, unsigned int model)
4717 {
4718         if (!genuine_intel)
4719                 return 0;
4720
4721         switch (model) {
4722         case INTEL_FAM6_SANDYBRIDGE:
4723         case INTEL_FAM6_SANDYBRIDGE_X:
4724         case INTEL_FAM6_IVYBRIDGE:              /* IVB */
4725         case INTEL_FAM6_IVYBRIDGE_X:            /* IVB Xeon */
4726         case INTEL_FAM6_HASWELL:                /* HSW */
4727         case INTEL_FAM6_HASWELL_X:              /* HSW */
4728         case INTEL_FAM6_HASWELL_L:              /* HSW */
4729         case INTEL_FAM6_HASWELL_G:              /* HSW */
4730         case INTEL_FAM6_BROADWELL:              /* BDW */
4731         case INTEL_FAM6_BROADWELL_G:            /* BDW */
4732         case INTEL_FAM6_BROADWELL_X:            /* BDX */
4733         case INTEL_FAM6_SKYLAKE_L:              /* SKL */
4734         case INTEL_FAM6_CANNONLAKE_L:           /* CNL */
4735         case INTEL_FAM6_SKYLAKE_X:              /* SKX */
4736         case INTEL_FAM6_ATOM_GOLDMONT:          /* BXT */
4737         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4738         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4739         case INTEL_FAM6_ATOM_TREMONT:           /* EHL */
4740         case INTEL_FAM6_ATOM_TREMONT_D:         /* JVL */
4741                 return 1;
4742         }
4743         return 0;
4744 }
4745
4746 /*
4747  * HSW ULT added support for C8/C9/C10 MSRs:
4748  *
4749  * MSR_PKG_C8_RESIDENCY         0x00000630
4750  * MSR_PKG_C9_RESIDENCY         0x00000631
4751  * MSR_PKG_C10_RESIDENCY        0x00000632
4752  *
4753  * MSR_PKGC8_IRTL               0x00000633
4754  * MSR_PKGC9_IRTL               0x00000634
4755  * MSR_PKGC10_IRTL              0x00000635
4756  *
4757  */
4758 int has_c8910_msrs(unsigned int family, unsigned int model)
4759 {
4760         if (!genuine_intel)
4761                 return 0;
4762
4763         switch (model) {
4764         case INTEL_FAM6_HASWELL_L:      /* HSW */
4765         case INTEL_FAM6_BROADWELL:      /* BDW */
4766         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4767         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4768         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4769         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4770         case INTEL_FAM6_ATOM_TREMONT:   /* EHL */
4771                 return 1;
4772         }
4773         return 0;
4774 }
4775
4776 /*
4777  * SKL adds support for additional MSRS:
4778  *
4779  * MSR_PKG_WEIGHTED_CORE_C0_RES    0x00000658
4780  * MSR_PKG_ANY_CORE_C0_RES         0x00000659
4781  * MSR_PKG_ANY_GFXE_C0_RES         0x0000065A
4782  * MSR_PKG_BOTH_CORE_GFXE_C0_RES   0x0000065B
4783  */
4784 int has_skl_msrs(unsigned int family, unsigned int model)
4785 {
4786         if (!genuine_intel)
4787                 return 0;
4788
4789         switch (model) {
4790         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4791         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4792                 return 1;
4793         }
4794         return 0;
4795 }
4796
4797 int is_slm(unsigned int family, unsigned int model)
4798 {
4799         if (!genuine_intel)
4800                 return 0;
4801         switch (model) {
4802         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4803         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4804                 return 1;
4805         }
4806         return 0;
4807 }
4808
4809 int is_knl(unsigned int family, unsigned int model)
4810 {
4811         if (!genuine_intel)
4812                 return 0;
4813         switch (model) {
4814         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4815                 return 1;
4816         }
4817         return 0;
4818 }
4819
4820 int is_cnl(unsigned int family, unsigned int model)
4821 {
4822         if (!genuine_intel)
4823                 return 0;
4824
4825         switch (model) {
4826         case INTEL_FAM6_CANNONLAKE_L: /* CNL */
4827                 return 1;
4828         }
4829
4830         return 0;
4831 }
4832
4833 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4834 {
4835         if (is_knl(family, model))
4836                 return 1024;
4837         return 1;
4838 }
4839
4840 #define SLM_BCLK_FREQS 5
4841 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4842
4843 double slm_bclk(void)
4844 {
4845         unsigned long long msr = 3;
4846         unsigned int i;
4847         double freq;
4848
4849         if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4850                 fprintf(outf, "SLM BCLK: unknown\n");
4851
4852         i = msr & 0xf;
4853         if (i >= SLM_BCLK_FREQS) {
4854                 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4855                 i = 3;
4856         }
4857         freq = slm_freq_table[i];
4858
4859         if (!quiet)
4860                 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4861
4862         return freq;
4863 }
4864
4865 double discover_bclk(unsigned int family, unsigned int model)
4866 {
4867         if (has_snb_msrs(family, model) || is_knl(family, model))
4868                 return 100.00;
4869         else if (is_slm(family, model))
4870                 return slm_bclk();
4871         else
4872                 return 133.33;
4873 }
4874
4875 /*
4876  * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4877  * the Thermal Control Circuit (TCC) activates.
4878  * This is usually equal to tjMax.
4879  *
4880  * Older processors do not have this MSR, so there we guess,
4881  * but also allow cmdline over-ride with -T.
4882  *
4883  * Several MSR temperature values are in units of degrees-C
4884  * below this value, including the Digital Thermal Sensor (DTS),
4885  * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4886  */
4887 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4888 {
4889         unsigned long long msr;
4890         unsigned int target_c_local;
4891         int cpu;
4892
4893         /* tcc_activation_temp is used only for dts or ptm */
4894         if (!(do_dts || do_ptm))
4895                 return 0;
4896
4897         /* this is a per-package concept */
4898         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4899                 return 0;
4900
4901         cpu = t->cpu_id;
4902         if (cpu_migrate(cpu)) {
4903                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4904                 return -1;
4905         }
4906
4907         if (tcc_activation_temp_override != 0) {
4908                 tcc_activation_temp = tcc_activation_temp_override;
4909                 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
4910                         cpu, tcc_activation_temp);
4911                 return 0;
4912         }
4913
4914         /* Temperature Target MSR is Nehalem and newer only */
4915         if (!do_nhm_platform_info)
4916                 goto guess;
4917
4918         if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4919                 goto guess;
4920
4921         target_c_local = (msr >> 16) & 0xFF;
4922
4923         if (!quiet)
4924                 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
4925                         cpu, msr, target_c_local);
4926
4927         if (!target_c_local)
4928                 goto guess;
4929
4930         tcc_activation_temp = target_c_local;
4931
4932         return 0;
4933
4934 guess:
4935         tcc_activation_temp = TJMAX_DEFAULT;
4936         fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
4937                 cpu, tcc_activation_temp);
4938
4939         return 0;
4940 }
4941
4942 void decode_feature_control_msr(void)
4943 {
4944         unsigned long long msr;
4945
4946         if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr))
4947                 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4948                         base_cpu, msr,
4949                         msr & FEAT_CTL_LOCKED ? "" : "UN-",
4950                         msr & (1 << 18) ? "SGX" : "");
4951 }
4952
4953 void decode_misc_enable_msr(void)
4954 {
4955         unsigned long long msr;
4956
4957         if (!genuine_intel)
4958                 return;
4959
4960         if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
4961                 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
4962                         base_cpu, msr,
4963                         msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4964                         msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
4965                         msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
4966                         msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4967                         msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
4968 }
4969
4970 void decode_misc_feature_control(void)
4971 {
4972         unsigned long long msr;
4973
4974         if (!has_misc_feature_control)
4975                 return;
4976
4977         if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4978                 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4979                         base_cpu, msr,
4980                         msr & (0 << 0) ? "No-" : "",
4981                         msr & (1 << 0) ? "No-" : "",
4982                         msr & (2 << 0) ? "No-" : "",
4983                         msr & (3 << 0) ? "No-" : "");
4984 }
4985 /*
4986  * Decode MSR_MISC_PWR_MGMT
4987  *
4988  * Decode the bits according to the Nehalem documentation
4989  * bit[0] seems to continue to have same meaning going forward
4990  * bit[1] less so...
4991  */
4992 void decode_misc_pwr_mgmt_msr(void)
4993 {
4994         unsigned long long msr;
4995
4996         if (!do_nhm_platform_info)
4997                 return;
4998
4999         if (no_MSR_MISC_PWR_MGMT)
5000                 return;
5001
5002         if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
5003                 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
5004                         base_cpu, msr,
5005                         msr & (1 << 0) ? "DIS" : "EN",
5006                         msr & (1 << 1) ? "EN" : "DIS",
5007                         msr & (1 << 8) ? "EN" : "DIS");
5008 }
5009 /*
5010  * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
5011  *
5012  * This MSRs are present on Silvermont processors,
5013  * Intel Atom processor E3000 series (Baytrail), and friends.
5014  */
5015 void decode_c6_demotion_policy_msr(void)
5016 {
5017         unsigned long long msr;
5018
5019         if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
5020                 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
5021                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5022
5023         if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
5024                 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
5025                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
5026 }
5027
5028 /*
5029  * When models are the same, for the purpose of turbostat, reuse
5030  */
5031 unsigned int intel_model_duplicates(unsigned int model)
5032 {
5033
5034         switch(model) {
5035         case INTEL_FAM6_NEHALEM_EP:     /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
5036         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
5037         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
5038         case INTEL_FAM6_WESTMERE:       /* Westmere Client - Clarkdale, Arrandale */
5039         case INTEL_FAM6_WESTMERE_EP:    /* Westmere EP - Gulftown */
5040                 return INTEL_FAM6_NEHALEM;
5041
5042         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
5043         case INTEL_FAM6_WESTMERE_EX:    /* Westmere-EX Xeon - Eagleton */
5044                 return INTEL_FAM6_NEHALEM_EX;
5045
5046         case INTEL_FAM6_XEON_PHI_KNM:
5047                 return INTEL_FAM6_XEON_PHI_KNL;
5048
5049         case INTEL_FAM6_BROADWELL_X:
5050         case INTEL_FAM6_BROADWELL_D:    /* BDX-DE */
5051                 return INTEL_FAM6_BROADWELL_X;
5052
5053         case INTEL_FAM6_SKYLAKE_L:
5054         case INTEL_FAM6_SKYLAKE:
5055         case INTEL_FAM6_KABYLAKE_L:
5056         case INTEL_FAM6_KABYLAKE:
5057         case INTEL_FAM6_COMETLAKE_L:
5058         case INTEL_FAM6_COMETLAKE:
5059                 return INTEL_FAM6_SKYLAKE_L;
5060
5061         case INTEL_FAM6_ICELAKE_L:
5062         case INTEL_FAM6_ICELAKE_NNPI:
5063         case INTEL_FAM6_TIGERLAKE_L:
5064         case INTEL_FAM6_TIGERLAKE:
5065         case INTEL_FAM6_ROCKETLAKE:
5066         case INTEL_FAM6_LAKEFIELD:
5067         case INTEL_FAM6_ALDERLAKE:
5068         case INTEL_FAM6_ALDERLAKE_L:
5069                 return INTEL_FAM6_CANNONLAKE_L;
5070
5071         case INTEL_FAM6_ATOM_TREMONT_L:
5072                 return INTEL_FAM6_ATOM_TREMONT;
5073
5074         case INTEL_FAM6_ICELAKE_X:
5075         case INTEL_FAM6_ICELAKE_D:
5076         case INTEL_FAM6_SAPPHIRERAPIDS_X:
5077                 return INTEL_FAM6_SKYLAKE_X;
5078         }
5079         return model;
5080 }
5081
5082 void print_dev_latency(void)
5083 {
5084         char *path = "/dev/cpu_dma_latency";
5085         int fd;
5086         int value;
5087         int retval;
5088
5089         fd = open(path, O_RDONLY);
5090         if (fd < 0) {
5091                 warn("fopen %s\n", path);
5092                 return;
5093         }
5094
5095         retval = read(fd, (void *)&value, sizeof(int));
5096         if (retval != sizeof(int)) {
5097                 warn("read %s\n", path);
5098                 close(fd);
5099                 return;
5100         }
5101         fprintf(outf, "/dev/cpu_dma_latency: %d usec (%s)\n",
5102                 value, value == 2000000000 ? "default" : "constrained");
5103
5104         close(fd);
5105 }
5106
5107
5108 /*
5109  * Linux-perf manages the the HW instructions-retired counter
5110  * by enabling when requested, and hiding rollover
5111  */
5112 void linux_perf_init(void)
5113 {
5114         if (!BIC_IS_ENABLED(BIC_IPC))
5115                 return;
5116
5117         if (access("/proc/sys/kernel/perf_event_paranoid", F_OK))
5118                 return;
5119
5120         fd_instr_count_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5121         if (fd_instr_count_percpu == NULL)
5122                 err(-1, "calloc fd_instr_count_percpu");
5123
5124         BIC_PRESENT(BIC_IPC);
5125 }
5126
5127 void process_cpuid()
5128 {
5129         unsigned int eax, ebx, ecx, edx;
5130         unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
5131         unsigned int has_turbo;
5132         unsigned long long ucode_patch = 0;
5133
5134         eax = ebx = ecx = edx = 0;
5135
5136         __cpuid(0, max_level, ebx, ecx, edx);
5137
5138         if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
5139                 genuine_intel = 1;
5140         else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
5141                 authentic_amd = 1;
5142         else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e)
5143                 hygon_genuine = 1;
5144
5145         if (!quiet)
5146                 fprintf(outf, "CPUID(0): %.4s%.4s%.4s 0x%x CPUID levels\n",
5147                         (char *)&ebx, (char *)&edx, (char *)&ecx, max_level);
5148
5149         __cpuid(1, fms, ebx, ecx, edx);
5150         family = (fms >> 8) & 0xf;
5151         model = (fms >> 4) & 0xf;
5152         stepping = fms & 0xf;
5153         if (family == 0xf)
5154                 family += (fms >> 20) & 0xff;
5155         if (family >= 6)
5156                 model += ((fms >> 16) & 0xf) << 4;
5157         ecx_flags = ecx;
5158         edx_flags = edx;
5159
5160         if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch))
5161                 warnx("get_msr(UCODE)\n");
5162
5163         /*
5164          * check max extended function levels of CPUID.
5165          * This is needed to check for invariant TSC.
5166          * This check is valid for both Intel and AMD.
5167          */
5168         ebx = ecx = edx = 0;
5169         __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
5170
5171         if (!quiet) {
5172                 fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d) microcode 0x%x\n",
5173                         family, model, stepping, family, model, stepping, (unsigned int)((ucode_patch >> 32) & 0xFFFFFFFF));
5174                 fprintf(outf, "CPUID(0x80000000): max_extended_levels: 0x%x\n", max_extended_level);
5175                 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
5176                         ecx_flags & (1 << 0) ? "SSE3" : "-",
5177                         ecx_flags & (1 << 3) ? "MONITOR" : "-",
5178                         ecx_flags & (1 << 6) ? "SMX" : "-",
5179                         ecx_flags & (1 << 7) ? "EIST" : "-",
5180                         ecx_flags & (1 << 8) ? "TM2" : "-",
5181                         edx_flags & (1 << 4) ? "TSC" : "-",
5182                         edx_flags & (1 << 5) ? "MSR" : "-",
5183                         edx_flags & (1 << 22) ? "ACPI-TM" : "-",
5184                         edx_flags & (1 << 28) ? "HT" : "-",
5185                         edx_flags & (1 << 29) ? "TM" : "-");
5186         }
5187         if (genuine_intel)
5188                 model = intel_model_duplicates(model);
5189
5190         if (!(edx_flags & (1 << 5)))
5191                 errx(1, "CPUID: no MSR");
5192
5193         if (max_extended_level >= 0x80000007) {
5194
5195                 /*
5196                  * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
5197                  * this check is valid for both Intel and AMD
5198                  */
5199                 __cpuid(0x80000007, eax, ebx, ecx, edx);
5200                 has_invariant_tsc = edx & (1 << 8);
5201         }
5202
5203         /*
5204          * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
5205          * this check is valid for both Intel and AMD
5206          */
5207
5208         __cpuid(0x6, eax, ebx, ecx, edx);
5209         has_aperf = ecx & (1 << 0);
5210         if (has_aperf) {
5211                 BIC_PRESENT(BIC_Avg_MHz);
5212                 BIC_PRESENT(BIC_Busy);
5213                 BIC_PRESENT(BIC_Bzy_MHz);
5214         }
5215         do_dts = eax & (1 << 0);
5216         if (do_dts)
5217                 BIC_PRESENT(BIC_CoreTmp);
5218         has_turbo = eax & (1 << 1);
5219         do_ptm = eax & (1 << 6);
5220         if (do_ptm)
5221                 BIC_PRESENT(BIC_PkgTmp);
5222         has_hwp = eax & (1 << 7);
5223         has_hwp_notify = eax & (1 << 8);
5224         has_hwp_activity_window = eax & (1 << 9);
5225         has_hwp_epp = eax & (1 << 10);
5226         has_hwp_pkg = eax & (1 << 11);
5227         has_epb = ecx & (1 << 3);
5228
5229         if (!quiet)
5230                 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
5231                         "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
5232                         has_aperf ? "" : "No-",
5233                         has_turbo ? "" : "No-",
5234                         do_dts ? "" : "No-",
5235                         do_ptm ? "" : "No-",
5236                         has_hwp ? "" : "No-",
5237                         has_hwp_notify ? "" : "No-",
5238                         has_hwp_activity_window ? "" : "No-",
5239                         has_hwp_epp ? "" : "No-",
5240                         has_hwp_pkg ? "" : "No-",
5241                         has_epb ? "" : "No-");
5242
5243         if (!quiet)
5244                 decode_misc_enable_msr();
5245
5246
5247         if (max_level >= 0x7 && !quiet) {
5248                 int has_sgx;
5249
5250                 ecx = 0;
5251
5252                 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
5253
5254                 has_sgx = ebx & (1 << 2);
5255                 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
5256
5257                 if (has_sgx)
5258                         decode_feature_control_msr();
5259         }
5260
5261         if (max_level >= 0x15) {
5262                 unsigned int eax_crystal;
5263                 unsigned int ebx_tsc;
5264
5265                 /*
5266                  * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
5267                  */
5268                 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5269                 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
5270
5271                 if (ebx_tsc != 0) {
5272
5273                         if (!quiet && (ebx != 0))
5274                                 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
5275                                         eax_crystal, ebx_tsc, crystal_hz);
5276
5277                         if (crystal_hz == 0)
5278                                 switch(model) {
5279                                 case INTEL_FAM6_SKYLAKE_L:      /* SKL */
5280                                         crystal_hz = 24000000;  /* 24.0 MHz */
5281                                         break;
5282                                 case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
5283                                         crystal_hz = 25000000;  /* 25.0 MHz */
5284                                         break;
5285                                 case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
5286                                 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
5287                                         crystal_hz = 19200000;  /* 19.2 MHz */
5288                                         break;
5289                                 default:
5290                                         crystal_hz = 0;
5291                         }
5292
5293                         if (crystal_hz) {
5294                                 tsc_hz =  (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
5295                                 if (!quiet)
5296                                         fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
5297                                                 tsc_hz / 1000000, crystal_hz, ebx_tsc,  eax_crystal);
5298                         }
5299                 }
5300         }
5301         if (max_level >= 0x16) {
5302                 unsigned int base_mhz, max_mhz, bus_mhz, edx;
5303
5304                 /*
5305                  * CPUID 16H Base MHz, Max MHz, Bus MHz
5306                  */
5307                 base_mhz = max_mhz = bus_mhz = edx = 0;
5308
5309                 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
5310                 if (!quiet)
5311                         fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
5312                                 base_mhz, max_mhz, bus_mhz);
5313         }
5314
5315         if (has_aperf)
5316                 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
5317
5318         BIC_PRESENT(BIC_IRQ);
5319         BIC_PRESENT(BIC_TSC_MHz);
5320
5321         if (probe_nhm_msrs(family, model)) {
5322                 do_nhm_platform_info = 1;
5323                 BIC_PRESENT(BIC_CPU_c1);
5324                 BIC_PRESENT(BIC_CPU_c3);
5325                 BIC_PRESENT(BIC_CPU_c6);
5326                 BIC_PRESENT(BIC_SMI);
5327         }
5328         do_snb_cstates = has_snb_msrs(family, model);
5329
5330         if (do_snb_cstates)
5331                 BIC_PRESENT(BIC_CPU_c7);
5332
5333         do_irtl_snb = has_snb_msrs(family, model);
5334         if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
5335                 BIC_PRESENT(BIC_Pkgpc2);
5336         if (pkg_cstate_limit >= PCL__3)
5337                 BIC_PRESENT(BIC_Pkgpc3);
5338         if (pkg_cstate_limit >= PCL__6)
5339                 BIC_PRESENT(BIC_Pkgpc6);
5340         if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
5341                 BIC_PRESENT(BIC_Pkgpc7);
5342         if (has_slv_msrs(family, model)) {
5343                 BIC_NOT_PRESENT(BIC_Pkgpc2);
5344                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5345                 BIC_PRESENT(BIC_Pkgpc6);
5346                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5347                 BIC_PRESENT(BIC_Mod_c6);
5348                 use_c1_residency_msr = 1;
5349         }
5350         if (is_jvl(family, model)) {
5351                 BIC_NOT_PRESENT(BIC_CPU_c3);
5352                 BIC_NOT_PRESENT(BIC_CPU_c7);
5353                 BIC_NOT_PRESENT(BIC_Pkgpc2);
5354                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5355                 BIC_NOT_PRESENT(BIC_Pkgpc6);
5356                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5357         }
5358         if (is_dnv(family, model)) {
5359                 BIC_PRESENT(BIC_CPU_c1);
5360                 BIC_NOT_PRESENT(BIC_CPU_c3);
5361                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5362                 BIC_NOT_PRESENT(BIC_CPU_c7);
5363                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5364                 use_c1_residency_msr = 1;
5365         }
5366         if (is_skx(family, model)) {
5367                 BIC_NOT_PRESENT(BIC_CPU_c3);
5368                 BIC_NOT_PRESENT(BIC_Pkgpc3);
5369                 BIC_NOT_PRESENT(BIC_CPU_c7);
5370                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5371         }
5372         if (is_bdx(family, model)) {
5373                 BIC_NOT_PRESENT(BIC_CPU_c7);
5374                 BIC_NOT_PRESENT(BIC_Pkgpc7);
5375         }
5376         if (has_c8910_msrs(family, model)) {
5377                 if (pkg_cstate_limit >= PCL__8)
5378                         BIC_PRESENT(BIC_Pkgpc8);
5379                 if (pkg_cstate_limit >= PCL__9)
5380                         BIC_PRESENT(BIC_Pkgpc9);
5381                 if (pkg_cstate_limit >= PCL_10)
5382                         BIC_PRESENT(BIC_Pkgpc10);
5383         }
5384         do_irtl_hsw = has_c8910_msrs(family, model);
5385         if (has_skl_msrs(family, model)) {
5386                 BIC_PRESENT(BIC_Totl_c0);
5387                 BIC_PRESENT(BIC_Any_c0);
5388                 BIC_PRESENT(BIC_GFX_c0);
5389                 BIC_PRESENT(BIC_CPUGFX);
5390         }
5391         do_slm_cstates = is_slm(family, model);
5392         do_knl_cstates  = is_knl(family, model);
5393
5394         if (do_slm_cstates || do_knl_cstates || is_cnl(family, model) ||
5395             is_ehl(family, model))
5396                 BIC_NOT_PRESENT(BIC_CPU_c3);
5397
5398         if (!quiet)
5399                 decode_misc_pwr_mgmt_msr();
5400
5401         if (!quiet && has_slv_msrs(family, model))
5402                 decode_c6_demotion_policy_msr();
5403
5404         rapl_probe(family, model);
5405         perf_limit_reasons_probe(family, model);
5406         automatic_cstate_conversion_probe(family, model);
5407
5408         if (!quiet)
5409                 dump_cstate_pstate_config_info(family, model);
5410
5411         if (!quiet)
5412                 print_dev_latency();
5413         if (!quiet)
5414                 dump_sysfs_cstate_config();
5415         if (!quiet)
5416                 dump_sysfs_pstate_config();
5417
5418         if (has_skl_msrs(family, model))
5419                 calculate_tsc_tweak();
5420
5421         if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
5422                 BIC_PRESENT(BIC_GFX_rc6);
5423
5424         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
5425                 BIC_PRESENT(BIC_GFXMHz);
5426
5427         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_act_freq_mhz", R_OK))
5428                 BIC_PRESENT(BIC_GFXACTMHz);
5429
5430         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
5431                 BIC_PRESENT(BIC_CPU_LPI);
5432         else
5433                 BIC_NOT_PRESENT(BIC_CPU_LPI);
5434
5435         if (!access(sys_lpi_file_sysfs, R_OK)) {
5436                 sys_lpi_file = sys_lpi_file_sysfs;
5437                 BIC_PRESENT(BIC_SYS_LPI);
5438         } else if (!access(sys_lpi_file_debugfs, R_OK)) {
5439                 sys_lpi_file = sys_lpi_file_debugfs;
5440                 BIC_PRESENT(BIC_SYS_LPI);
5441         } else {
5442                 sys_lpi_file_sysfs = NULL;
5443                 BIC_NOT_PRESENT(BIC_SYS_LPI);
5444         }
5445
5446         if (!quiet)
5447                 decode_misc_feature_control();
5448
5449         return;
5450 }
5451
5452 /*
5453  * in /dev/cpu/ return success for names that are numbers
5454  * ie. filter out ".", "..", "microcode".
5455  */
5456 int dir_filter(const struct dirent *dirp)
5457 {
5458         if (isdigit(dirp->d_name[0]))
5459                 return 1;
5460         else
5461                 return 0;
5462 }
5463
5464 int open_dev_cpu_msr(int dummy1)
5465 {
5466         return 0;
5467 }
5468
5469 void topology_probe()
5470 {
5471         int i;
5472         int max_core_id = 0;
5473         int max_package_id = 0;
5474         int max_die_id = 0;
5475         int max_siblings = 0;
5476
5477         /* Initialize num_cpus, max_cpu_num */
5478         set_max_cpu_num();
5479         topo.num_cpus = 0;
5480         for_all_proc_cpus(count_cpus);
5481         if (!summary_only && topo.num_cpus > 1)
5482                 BIC_PRESENT(BIC_CPU);
5483
5484         if (debug > 1)
5485                 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
5486
5487         cpus = calloc(1, (topo.max_cpu_num  + 1) * sizeof(struct cpu_topology));
5488         if (cpus == NULL)
5489                 err(1, "calloc cpus");
5490
5491         /*
5492          * Allocate and initialize cpu_present_set
5493          */
5494         cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
5495         if (cpu_present_set == NULL)
5496                 err(3, "CPU_ALLOC");
5497         cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5498         CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
5499         for_all_proc_cpus(mark_cpu_present);
5500
5501         /*
5502          * Validate that all cpus in cpu_subset are also in cpu_present_set
5503          */
5504         for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
5505                 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
5506                         if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
5507                                 err(1, "cpu%d not present", i);
5508         }
5509
5510         /*
5511          * Allocate and initialize cpu_affinity_set
5512          */
5513         cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
5514         if (cpu_affinity_set == NULL)
5515                 err(3, "CPU_ALLOC");
5516         cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5517         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
5518
5519         for_all_proc_cpus(init_thread_id);
5520
5521         /*
5522          * For online cpus
5523          * find max_core_id, max_package_id
5524          */
5525         for (i = 0; i <= topo.max_cpu_num; ++i) {
5526                 int siblings;
5527
5528                 if (cpu_is_not_present(i)) {
5529                         if (debug > 1)
5530                                 fprintf(outf, "cpu%d NOT PRESENT\n", i);
5531                         continue;
5532                 }
5533
5534                 cpus[i].logical_cpu_id = i;
5535
5536                 /* get package information */
5537                 cpus[i].physical_package_id = get_physical_package_id(i);
5538                 if (cpus[i].physical_package_id > max_package_id)
5539                         max_package_id = cpus[i].physical_package_id;
5540
5541                 /* get die information */
5542                 cpus[i].die_id = get_die_id(i);
5543                 if (cpus[i].die_id > max_die_id)
5544                         max_die_id = cpus[i].die_id;
5545
5546                 /* get numa node information */
5547                 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
5548                 if (cpus[i].physical_node_id > topo.max_node_num)
5549                         topo.max_node_num = cpus[i].physical_node_id;
5550
5551                 /* get core information */
5552                 cpus[i].physical_core_id = get_core_id(i);
5553                 if (cpus[i].physical_core_id > max_core_id)
5554                         max_core_id = cpus[i].physical_core_id;
5555
5556                 /* get thread information */
5557                 siblings = get_thread_siblings(&cpus[i]);
5558                 if (siblings > max_siblings)
5559                         max_siblings = siblings;
5560                 if (cpus[i].thread_id == 0)
5561                         topo.num_cores++;
5562         }
5563
5564         topo.cores_per_node = max_core_id + 1;
5565         if (debug > 1)
5566                 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
5567                         max_core_id, topo.cores_per_node);
5568         if (!summary_only && topo.cores_per_node > 1)
5569                 BIC_PRESENT(BIC_Core);
5570
5571         topo.num_die = max_die_id + 1;
5572         if (debug > 1)
5573                 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5574                                 max_die_id, topo.num_die);
5575         if (!summary_only && topo.num_die > 1)
5576                 BIC_PRESENT(BIC_Die);
5577
5578         topo.num_packages = max_package_id + 1;
5579         if (debug > 1)
5580                 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
5581                         max_package_id, topo.num_packages);
5582         if (!summary_only && topo.num_packages > 1)
5583                 BIC_PRESENT(BIC_Package);
5584
5585         set_node_data();
5586         if (debug > 1)
5587                 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
5588         if (!summary_only && topo.nodes_per_pkg > 1)
5589                 BIC_PRESENT(BIC_Node);
5590
5591         topo.threads_per_core = max_siblings;
5592         if (debug > 1)
5593                 fprintf(outf, "max_siblings %d\n", max_siblings);
5594
5595         if (debug < 1)
5596                 return;
5597
5598         for (i = 0; i <= topo.max_cpu_num; ++i) {
5599                 if (cpu_is_not_present(i))
5600                         continue;
5601                 fprintf(outf,
5602                         "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5603                         i, cpus[i].physical_package_id, cpus[i].die_id,
5604                         cpus[i].physical_node_id,
5605                         cpus[i].logical_node_id,
5606                         cpus[i].physical_core_id,
5607                         cpus[i].thread_id);
5608         }
5609
5610 }
5611
5612 void
5613 allocate_counters(struct thread_data **t, struct core_data **c,
5614                   struct pkg_data **p)
5615 {
5616         int i;
5617         int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5618                         topo.num_packages;
5619         int num_threads = topo.threads_per_core * num_cores;
5620
5621         *t = calloc(num_threads, sizeof(struct thread_data));
5622         if (*t == NULL)
5623                 goto error;
5624
5625         for (i = 0; i < num_threads; i++)
5626                 (*t)[i].cpu_id = -1;
5627
5628         *c = calloc(num_cores, sizeof(struct core_data));
5629         if (*c == NULL)
5630                 goto error;
5631
5632         for (i = 0; i < num_cores; i++)
5633                 (*c)[i].core_id = -1;
5634
5635         *p = calloc(topo.num_packages, sizeof(struct pkg_data));
5636         if (*p == NULL)
5637                 goto error;
5638
5639         for (i = 0; i < topo.num_packages; i++)
5640                 (*p)[i].package_id = i;
5641
5642         return;
5643 error:
5644         err(1, "calloc counters");
5645 }
5646 /*
5647  * init_counter()
5648  *
5649  * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
5650  */
5651 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
5652         struct pkg_data *pkg_base, int cpu_id)
5653 {
5654         int pkg_id = cpus[cpu_id].physical_package_id;
5655         int node_id = cpus[cpu_id].logical_node_id;
5656         int core_id = cpus[cpu_id].physical_core_id;
5657         int thread_id = cpus[cpu_id].thread_id;
5658         struct thread_data *t;
5659         struct core_data *c;
5660         struct pkg_data *p;
5661
5662
5663         /* Workaround for systems where physical_node_id==-1
5664          * and logical_node_id==(-1 - topo.num_cpus)
5665          */
5666         if (node_id < 0)
5667                 node_id = 0;
5668
5669         t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5670         c = GET_CORE(core_base, core_id, node_id, pkg_id);
5671         p = GET_PKG(pkg_base, pkg_id);
5672
5673         t->cpu_id = cpu_id;
5674         if (thread_id == 0) {
5675                 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5676                 if (cpu_is_first_core_in_package(cpu_id))
5677                         t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5678         }
5679
5680         c->core_id = core_id;
5681         p->package_id = pkg_id;
5682 }
5683
5684
5685 int initialize_counters(int cpu_id)
5686 {
5687         init_counter(EVEN_COUNTERS, cpu_id);
5688         init_counter(ODD_COUNTERS, cpu_id);
5689         return 0;
5690 }
5691
5692 void allocate_output_buffer()
5693 {
5694         output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
5695         outp = output_buffer;
5696         if (outp == NULL)
5697                 err(-1, "calloc output buffer");
5698 }
5699 void allocate_fd_percpu(void)
5700 {
5701         fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5702         if (fd_percpu == NULL)
5703                 err(-1, "calloc fd_percpu");
5704 }
5705 void allocate_irq_buffers(void)
5706 {
5707         irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5708         if (irq_column_2_cpu == NULL)
5709                 err(-1, "calloc %d", topo.num_cpus);
5710
5711         irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5712         if (irqs_per_cpu == NULL)
5713                 err(-1, "calloc %d", topo.max_cpu_num + 1);
5714 }
5715 void setup_all_buffers(void)
5716 {
5717         topology_probe();
5718         allocate_irq_buffers();
5719         allocate_fd_percpu();
5720         allocate_counters(&thread_even, &core_even, &package_even);
5721         allocate_counters(&thread_odd, &core_odd, &package_odd);
5722         allocate_output_buffer();
5723         for_all_proc_cpus(initialize_counters);
5724 }
5725
5726 void set_base_cpu(void)
5727 {
5728         base_cpu = sched_getcpu();
5729         if (base_cpu < 0)
5730                 err(-ENODEV, "No valid cpus found");
5731
5732         if (debug > 1)
5733                 fprintf(outf, "base_cpu = %d\n", base_cpu);
5734 }
5735
5736 void turbostat_init()
5737 {
5738         setup_all_buffers();
5739         set_base_cpu();
5740         check_dev_msr();
5741         check_permissions();
5742         process_cpuid();
5743         linux_perf_init();
5744
5745
5746         if (!quiet)
5747                 for_all_cpus(print_hwp, ODD_COUNTERS);
5748
5749         if (!quiet)
5750                 for_all_cpus(print_epb, ODD_COUNTERS);
5751
5752         if (!quiet)
5753                 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5754
5755         if (!quiet)
5756                 for_all_cpus(print_rapl, ODD_COUNTERS);
5757
5758         for_all_cpus(set_temperature_target, ODD_COUNTERS);
5759
5760         if (!quiet)
5761                 for_all_cpus(print_thermal, ODD_COUNTERS);
5762
5763         if (!quiet && do_irtl_snb)
5764                 print_irtl();
5765 }
5766
5767 int fork_it(char **argv)
5768 {
5769         pid_t child_pid;
5770         int status;
5771
5772         snapshot_proc_sysfs_files();
5773         status = for_all_cpus(get_counters, EVEN_COUNTERS);
5774         first_counter_read = 0;
5775         if (status)
5776                 exit(status);
5777         /* clear affinity side-effect of get_counters() */
5778         sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
5779         gettimeofday(&tv_even, (struct timezone *)NULL);
5780
5781         child_pid = fork();
5782         if (!child_pid) {
5783                 /* child */
5784                 execvp(argv[0], argv);
5785                 err(errno, "exec %s", argv[0]);
5786         } else {
5787
5788                 /* parent */
5789                 if (child_pid == -1)
5790                         err(1, "fork");
5791
5792                 signal(SIGINT, SIG_IGN);
5793                 signal(SIGQUIT, SIG_IGN);
5794                 if (waitpid(child_pid, &status, 0) == -1)
5795                         err(status, "waitpid");
5796
5797                 if (WIFEXITED(status))
5798                         status = WEXITSTATUS(status);
5799         }
5800         /*
5801          * n.b. fork_it() does not check for errors from for_all_cpus()
5802          * because re-starting is problematic when forking
5803          */
5804         snapshot_proc_sysfs_files();
5805         for_all_cpus(get_counters, ODD_COUNTERS);
5806         gettimeofday(&tv_odd, (struct timezone *)NULL);
5807         timersub(&tv_odd, &tv_even, &tv_delta);
5808         if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5809                 fprintf(outf, "%s: Counter reset detected\n", progname);
5810         else {
5811                 compute_average(EVEN_COUNTERS);
5812                 format_all_counters(EVEN_COUNTERS);
5813         }
5814
5815         fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5816
5817         flush_output_stderr();
5818
5819         return status;
5820 }
5821
5822 int get_and_dump_counters(void)
5823 {
5824         int status;
5825
5826         snapshot_proc_sysfs_files();
5827         status = for_all_cpus(get_counters, ODD_COUNTERS);
5828         if (status)
5829                 return status;
5830
5831         status = for_all_cpus(dump_counters, ODD_COUNTERS);
5832         if (status)
5833                 return status;
5834
5835         flush_output_stdout();
5836
5837         return status;
5838 }
5839
5840 void print_version() {
5841         fprintf(outf, "turbostat version 21.03.12"
5842                 " - Len Brown <lenb@kernel.org>\n");
5843 }
5844
5845 int add_counter(unsigned int msr_num, char *path, char *name,
5846         unsigned int width, enum counter_scope scope,
5847         enum counter_type type, enum counter_format format, int flags)
5848 {
5849         struct msr_counter *msrp;
5850
5851         msrp = calloc(1, sizeof(struct msr_counter));
5852         if (msrp == NULL) {
5853                 perror("calloc");
5854                 exit(1);
5855         }
5856
5857         msrp->msr_num = msr_num;
5858         strncpy(msrp->name, name, NAME_BYTES - 1);
5859         if (path)
5860                 strncpy(msrp->path, path, PATH_BYTES - 1);
5861         msrp->width = width;
5862         msrp->type = type;
5863         msrp->format = format;
5864         msrp->flags = flags;
5865
5866         switch (scope) {
5867
5868         case SCOPE_CPU:
5869                 msrp->next = sys.tp;
5870                 sys.tp = msrp;
5871                 sys.added_thread_counters++;
5872                 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5873                         fprintf(stderr, "exceeded max %d added thread counters\n",
5874                                 MAX_ADDED_COUNTERS);
5875                         exit(-1);
5876                 }
5877                 break;
5878
5879         case SCOPE_CORE:
5880                 msrp->next = sys.cp;
5881                 sys.cp = msrp;
5882                 sys.added_core_counters++;
5883                 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5884                         fprintf(stderr, "exceeded max %d added core counters\n",
5885                                 MAX_ADDED_COUNTERS);
5886                         exit(-1);
5887                 }
5888                 break;
5889
5890         case SCOPE_PACKAGE:
5891                 msrp->next = sys.pp;
5892                 sys.pp = msrp;
5893                 sys.added_package_counters++;
5894                 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5895                         fprintf(stderr, "exceeded max %d added package counters\n",
5896                                 MAX_ADDED_COUNTERS);
5897                         exit(-1);
5898                 }
5899                 break;
5900         }
5901
5902         return 0;
5903 }
5904
5905 void parse_add_command(char *add_command)
5906 {
5907         int msr_num = 0;
5908         char *path = NULL;
5909         char name_buffer[NAME_BYTES] = "";
5910         int width = 64;
5911         int fail = 0;
5912         enum counter_scope scope = SCOPE_CPU;
5913         enum counter_type type = COUNTER_CYCLES;
5914         enum counter_format format = FORMAT_DELTA;
5915
5916         while (add_command) {
5917
5918                 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5919                         goto next;
5920
5921                 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5922                         goto next;
5923
5924                 if (*add_command == '/') {
5925                         path = add_command;
5926                         goto next;
5927                 }
5928
5929                 if (sscanf(add_command, "u%d", &width) == 1) {
5930                         if ((width == 32) || (width == 64))
5931                                 goto next;
5932                         width = 64;
5933                 }
5934                 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5935                         scope = SCOPE_CPU;
5936                         goto next;
5937                 }
5938                 if (!strncmp(add_command, "core", strlen("core"))) {
5939                         scope = SCOPE_CORE;
5940                         goto next;
5941                 }
5942                 if (!strncmp(add_command, "package", strlen("package"))) {
5943                         scope = SCOPE_PACKAGE;
5944                         goto next;
5945                 }
5946                 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5947                         type = COUNTER_CYCLES;
5948                         goto next;
5949                 }
5950                 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5951                         type = COUNTER_SECONDS;
5952                         goto next;
5953                 }
5954                 if (!strncmp(add_command, "usec", strlen("usec"))) {
5955                         type = COUNTER_USEC;
5956                         goto next;
5957                 }
5958                 if (!strncmp(add_command, "raw", strlen("raw"))) {
5959                         format = FORMAT_RAW;
5960                         goto next;
5961                 }
5962                 if (!strncmp(add_command, "delta", strlen("delta"))) {
5963                         format = FORMAT_DELTA;
5964                         goto next;
5965                 }
5966                 if (!strncmp(add_command, "percent", strlen("percent"))) {
5967                         format = FORMAT_PERCENT;
5968                         goto next;
5969                 }
5970
5971                 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) {        /* 18 < NAME_BYTES */
5972                         char *eos;
5973
5974                         eos = strchr(name_buffer, ',');
5975                         if (eos)
5976                                 *eos = '\0';
5977                         goto next;
5978                 }
5979
5980 next:
5981                 add_command = strchr(add_command, ',');
5982                 if (add_command) {
5983                         *add_command = '\0';
5984                         add_command++;
5985                 }
5986
5987         }
5988         if ((msr_num == 0) && (path == NULL)) {
5989                 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
5990                 fail++;
5991         }
5992
5993         /* generate default column header */
5994         if (*name_buffer == '\0') {
5995                 if (width == 32)
5996                         sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5997                 else
5998                         sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5999         }
6000
6001         if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
6002                 fail++;
6003
6004         if (fail) {
6005                 help();
6006                 exit(1);
6007         }
6008 }
6009
6010 int is_deferred_skip(char *name)
6011 {
6012         int i;
6013
6014         for (i = 0; i < deferred_skip_index; ++i)
6015                 if (!strcmp(name, deferred_skip_names[i]))
6016                         return 1;
6017         return 0;
6018 }
6019
6020 void probe_sysfs(void)
6021 {
6022         char path[64];
6023         char name_buf[16];
6024         FILE *input;
6025         int state;
6026         char *sp;
6027
6028         if (!DO_BIC(BIC_sysfs))
6029                 return;
6030
6031         for (state = 10; state >= 0; --state) {
6032
6033                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6034                         base_cpu, state);
6035                 input = fopen(path, "r");
6036                 if (input == NULL)
6037                         continue;
6038                 if (!fgets(name_buf, sizeof(name_buf), input))
6039                         err(1, "%s: failed to read file", path);
6040
6041                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6042                 sp = strchr(name_buf, '-');
6043                 if (!sp)
6044                         sp = strchrnul(name_buf, '\n');
6045                 *sp = '%';
6046                 *(sp + 1) = '\0';
6047
6048                 remove_underbar(name_buf);
6049
6050                 fclose(input);
6051
6052                 sprintf(path, "cpuidle/state%d/time", state);
6053
6054                 if (is_deferred_skip(name_buf))
6055                         continue;
6056
6057                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
6058                                 FORMAT_PERCENT, SYSFS_PERCPU);
6059         }
6060
6061         for (state = 10; state >= 0; --state) {
6062
6063                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
6064                         base_cpu, state);
6065                 input = fopen(path, "r");
6066                 if (input == NULL)
6067                         continue;
6068                 if (!fgets(name_buf, sizeof(name_buf), input))
6069                         err(1, "%s: failed to read file", path);
6070                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
6071                 sp = strchr(name_buf, '-');
6072                 if (!sp)
6073                         sp = strchrnul(name_buf, '\n');
6074                 *sp = '\0';
6075                 fclose(input);
6076
6077                 remove_underbar(name_buf);
6078
6079                 sprintf(path, "cpuidle/state%d/usage", state);
6080
6081                 if (is_deferred_skip(name_buf))
6082                         continue;
6083
6084                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
6085                                 FORMAT_DELTA, SYSFS_PERCPU);
6086         }
6087
6088 }
6089
6090
6091 /*
6092  * parse cpuset with following syntax
6093  * 1,2,4..6,8-10 and set bits in cpu_subset
6094  */
6095 void parse_cpu_command(char *optarg)
6096 {
6097         unsigned int start, end;
6098         char *next;
6099
6100         if (!strcmp(optarg, "core")) {
6101                 if (cpu_subset)
6102                         goto error;
6103                 show_core_only++;
6104                 return;
6105         }
6106         if (!strcmp(optarg, "package")) {
6107                 if (cpu_subset)
6108                         goto error;
6109                 show_pkg_only++;
6110                 return;
6111         }
6112         if (show_core_only || show_pkg_only)
6113                 goto error;
6114
6115         cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
6116         if (cpu_subset == NULL)
6117                 err(3, "CPU_ALLOC");
6118         cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
6119
6120         CPU_ZERO_S(cpu_subset_size, cpu_subset);
6121
6122         next = optarg;
6123
6124         while (next && *next) {
6125
6126                 if (*next == '-')       /* no negative cpu numbers */
6127                         goto error;
6128
6129                 start = strtoul(next, &next, 10);
6130
6131                 if (start >= CPU_SUBSET_MAXCPUS)
6132                         goto error;
6133                 CPU_SET_S(start, cpu_subset_size, cpu_subset);
6134
6135                 if (*next == '\0')
6136                         break;
6137
6138                 if (*next == ',') {
6139                         next += 1;
6140                         continue;
6141                 }
6142
6143                 if (*next == '-') {
6144                         next += 1;      /* start range */
6145                 } else if (*next == '.') {
6146                         next += 1;
6147                         if (*next == '.')
6148                                 next += 1;      /* start range */
6149                         else
6150                                 goto error;
6151                 }
6152
6153                 end = strtoul(next, &next, 10);
6154                 if (end <= start)
6155                         goto error;
6156
6157                 while (++start <= end) {
6158                         if (start >= CPU_SUBSET_MAXCPUS)
6159                                 goto error;
6160                         CPU_SET_S(start, cpu_subset_size, cpu_subset);
6161                 }
6162
6163                 if (*next == ',')
6164                         next += 1;
6165                 else if (*next != '\0')
6166                         goto error;
6167         }
6168
6169         return;
6170
6171 error:
6172         fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
6173         help();
6174         exit(-1);
6175 }
6176
6177
6178 void cmdline(int argc, char **argv)
6179 {
6180         int opt;
6181         int option_index = 0;
6182         static struct option long_options[] = {
6183                 {"add",         required_argument,      0, 'a'},
6184                 {"cpu",         required_argument,      0, 'c'},
6185                 {"Dump",        no_argument,            0, 'D'},
6186                 {"debug",       no_argument,            0, 'd'},        /* internal, not documented */
6187                 {"enable",      required_argument,      0, 'e'},
6188                 {"interval",    required_argument,      0, 'i'},
6189                 {"IPC", no_argument,                    0, 'I'},
6190                 {"num_iterations",      required_argument,      0, 'n'},
6191                 {"help",        no_argument,            0, 'h'},
6192                 {"hide",        required_argument,      0, 'H'},        // meh, -h taken by --help
6193                 {"Joules",      no_argument,            0, 'J'},
6194                 {"list",        no_argument,            0, 'l'},
6195                 {"out",         required_argument,      0, 'o'},
6196                 {"quiet",       no_argument,            0, 'q'},
6197                 {"show",        required_argument,      0, 's'},
6198                 {"Summary",     no_argument,            0, 'S'},
6199                 {"TCC",         required_argument,      0, 'T'},
6200                 {"version",     no_argument,            0, 'v' },
6201                 {0,             0,                      0,  0 }
6202         };
6203
6204         progname = argv[0];
6205
6206         while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
6207                                 long_options, &option_index)) != -1) {
6208                 switch (opt) {
6209                 case 'a':
6210                         parse_add_command(optarg);
6211                         break;
6212                 case 'c':
6213                         parse_cpu_command(optarg);
6214                         break;
6215                 case 'D':
6216                         dump_only++;
6217                         break;
6218                 case 'e':
6219                         /* --enable specified counter */
6220                         bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
6221                         break;
6222                 case 'd':
6223                         debug++;
6224                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
6225                         break;
6226                 case 'H':
6227                         /*
6228                          * --hide: do not show those specified
6229                          *  multiple invocations simply clear more bits in enabled mask
6230                          */
6231                         bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
6232                         break;
6233                 case 'h':
6234                 default:
6235                         help();
6236                         exit(1);
6237                 case 'i':
6238                         {
6239                                 double interval = strtod(optarg, NULL);
6240
6241                                 if (interval < 0.001) {
6242                                         fprintf(outf, "interval %f seconds is too small\n",
6243                                                 interval);
6244                                         exit(2);
6245                                 }
6246
6247                                 interval_tv.tv_sec = interval_ts.tv_sec = interval;
6248                                 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
6249                                 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
6250                         }
6251                         break;
6252                 case 'J':
6253                         rapl_joules++;
6254                         break;
6255                 case 'l':
6256                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
6257                         list_header_only++;
6258                         quiet++;
6259                         break;
6260                 case 'o':
6261                         outf = fopen_or_die(optarg, "w");
6262                         break;
6263                 case 'q':
6264                         quiet = 1;
6265                         break;
6266                 case 'n':
6267                         num_iterations = strtod(optarg, NULL);
6268
6269                         if (num_iterations <= 0) {
6270                                 fprintf(outf, "iterations %d should be positive number\n",
6271                                         num_iterations);
6272                                 exit(2);
6273                         }
6274                         break;
6275                 case 's':
6276                         /*
6277                          * --show: show only those specified
6278                          *  The 1st invocation will clear and replace the enabled mask
6279                          *  subsequent invocations can add to it.
6280                          */
6281                         if (shown == 0)
6282                                 bic_enabled = bic_lookup(optarg, SHOW_LIST);
6283                         else
6284                                 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
6285                         shown = 1;
6286                         break;
6287                 case 'S':
6288                         summary_only++;
6289                         break;
6290                 case 'T':
6291                         tcc_activation_temp_override = atoi(optarg);
6292                         break;
6293                 case 'v':
6294                         print_version();
6295                         exit(0);
6296                         break;
6297                 }
6298         }
6299 }
6300
6301 int main(int argc, char **argv)
6302 {
6303         outf = stderr;
6304         cmdline(argc, argv);
6305
6306         if (!quiet)
6307                 print_version();
6308
6309         probe_sysfs();
6310
6311         turbostat_init();
6312
6313         /* dump counters and exit */
6314         if (dump_only)
6315                 return get_and_dump_counters();
6316
6317         /* list header and exit */
6318         if (list_header_only) {
6319                 print_header(",");
6320                 flush_output_stdout();
6321                 return 0;
6322         }
6323
6324         msr_sum_record();
6325         /*
6326          * if any params left, it must be a command to fork
6327          */
6328         if (argc - optind)
6329                 return fork_it(argv + optind);
6330         else
6331                 turbostat_loop();
6332
6333         return 0;
6334 }