tools/perf/util/intel-pt.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * intel_pt.c: Intel Processor Trace support
   4  * Copyright (c) 2013-2015, Intel Corporation.
   5  */
   6
   7 #include <inttypes.h>
   8 #include <stdio.h>
   9 #include <stdbool.h>
  10 #include <errno.h>
  11 #include <linux/kernel.h>
  12 #include <linux/string.h>
  13 #include <linux/types.h>
  14 #include <linux/zalloc.h>
  15
  16 #include "session.h"
  17 #include "machine.h"
  18 #include "memswap.h"
  19 #include "sort.h"
  20 #include "tool.h"
  21 #include "event.h"
  22 #include "evlist.h"
  23 #include "evsel.h"
  24 #include "map.h"
  25 #include "color.h"
  26 #include "thread.h"
  27 #include "thread-stack.h"
  28 #include "symbol.h"
  29 #include "callchain.h"
  30 #include "dso.h"
  31 #include "debug.h"
  32 #include "auxtrace.h"
  33 #include "tsc.h"
  34 #include "intel-pt.h"
  35 #include "config.h"
  36 #include "util/perf_api_probe.h"
  37 #include "util/synthetic-events.h"
  38 #include "time-utils.h"
  39
  40 #include "../arch/x86/include/uapi/asm/perf_regs.h"
  41
  42 #include "intel-pt-decoder/intel-pt-log.h"
  43 #include "intel-pt-decoder/intel-pt-decoder.h"
  44 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
  45 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
  46
  47 #define MAX_TIMESTAMP (~0ULL)
  48
  49 struct range {
  50         u64 start;
  51         u64 end;
  52 };
  53
  54 struct intel_pt {
  55         struct auxtrace auxtrace;
  56         struct auxtrace_queues queues;
  57         struct auxtrace_heap heap;
  58         u32 auxtrace_type;
  59         struct perf_session *session;
  60         struct machine *machine;
  61         struct evsel *switch_evsel;
  62         struct thread *unknown_thread;
  63         bool timeless_decoding;
  64         bool sampling_mode;
  65         bool snapshot_mode;
  66         bool per_cpu_mmaps;
  67         bool have_tsc;
  68         bool data_queued;
  69         bool est_tsc;
  70         bool sync_switch;
  71         bool mispred_all;
  72         bool use_thread_stack;
  73         bool callstack;
  74         unsigned int br_stack_sz;
  75         unsigned int br_stack_sz_plus;
  76         int have_sched_switch;
  77         u32 pmu_type;
  78         u64 kernel_start;
  79         u64 switch_ip;
  80         u64 ptss_ip;
  81
  82         struct perf_tsc_conversion tc;
  83         bool cap_user_time_zero;
  84
  85         struct itrace_synth_opts synth_opts;
  86
  87         bool sample_instructions;
  88         u64 instructions_sample_type;
  89         u64 instructions_id;
  90
  91         bool sample_branches;
  92         u32 branches_filter;
  93         u64 branches_sample_type;
  94         u64 branches_id;
  95
  96         bool sample_transactions;
  97         u64 transactions_sample_type;
  98         u64 transactions_id;
  99
 100         bool sample_ptwrites;
 101         u64 ptwrites_sample_type;
 102         u64 ptwrites_id;
 103
 104         bool sample_pwr_events;
 105         u64 pwr_events_sample_type;
 106         u64 mwait_id;
 107         u64 pwre_id;
 108         u64 exstop_id;
 109         u64 pwrx_id;
 110         u64 cbr_id;
 111         u64 psb_id;
 112
 113         bool sample_pebs;
 114         struct evsel *pebs_evsel;
 115
 116         u64 tsc_bit;
 117         u64 mtc_bit;
 118         u64 mtc_freq_bits;
 119         u32 tsc_ctc_ratio_n;
 120         u32 tsc_ctc_ratio_d;
 121         u64 cyc_bit;
 122         u64 noretcomp_bit;
 123         unsigned max_non_turbo_ratio;
 124         unsigned cbr2khz;
 125
 126         unsigned long num_events;
 127
 128         char *filter;
 129         struct addr_filters filts;
 130
 131         struct range *time_ranges;
 132         unsigned int range_cnt;
 133
 134         struct ip_callchain *chain;
 135         struct branch_stack *br_stack;
 136 };
 137
 138 enum switch_state {
 139         INTEL_PT_SS_NOT_TRACING,
 140         INTEL_PT_SS_UNKNOWN,
 141         INTEL_PT_SS_TRACING,
 142         INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
 143         INTEL_PT_SS_EXPECTING_SWITCH_IP,
 144 };
 145
 146 struct intel_pt_queue {
 147         struct intel_pt *pt;
 148         unsigned int queue_nr;
 149         struct auxtrace_buffer *buffer;
 150         struct auxtrace_buffer *old_buffer;
 151         void *decoder;
 152         const struct intel_pt_state *state;
 153         struct ip_callchain *chain;
 154         struct branch_stack *last_branch;
 155         union perf_event *event_buf;
 156         bool on_heap;
 157         bool stop;
 158         bool step_through_buffers;
 159         bool use_buffer_pid_tid;
 160         bool sync_switch;
 161         pid_t pid, tid;
 162         int cpu;
 163         int switch_state;
 164         pid_t next_tid;
 165         struct thread *thread;
 166         struct machine *guest_machine;
 167         struct thread *unknown_guest_thread;
 168         pid_t guest_machine_pid;
 169         bool exclude_kernel;
 170         bool have_sample;
 171         u64 time;
 172         u64 timestamp;
 173         u64 sel_timestamp;
 174         bool sel_start;
 175         unsigned int sel_idx;
 176         u32 flags;
 177         u16 insn_len;
 178         u64 last_insn_cnt;
 179         u64 ipc_insn_cnt;
 180         u64 ipc_cyc_cnt;
 181         u64 last_in_insn_cnt;
 182         u64 last_in_cyc_cnt;
 183         u64 last_br_insn_cnt;
 184         u64 last_br_cyc_cnt;
 185         unsigned int cbr_seen;
 186         char insn[INTEL_PT_INSN_BUF_SZ];
 187 };
 188
 189 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
 190                           unsigned char *buf, size_t len)
 191 {
 192         struct intel_pt_pkt packet;
 193         size_t pos = 0;
 194         int ret, pkt_len, i;
 195         char desc[INTEL_PT_PKT_DESC_MAX];
 196         const char *color = PERF_COLOR_BLUE;
 197         enum intel_pt_pkt_ctx ctx = INTEL_PT_NO_CTX;
 198
 199         color_fprintf(stdout, color,
 200                       ". ... Intel Processor Trace data: size %zu bytes\n",
 201                       len);
 202
 203         while (len) {
 204                 ret = intel_pt_get_packet(buf, len, &packet, &ctx);
 205                 if (ret > 0)
 206                         pkt_len = ret;
 207                 else
 208                         pkt_len = 1;
 209                 printf(".");
 210                 color_fprintf(stdout, color, "  %08x: ", pos);
 211                 for (i = 0; i < pkt_len; i++)
 212                         color_fprintf(stdout, color, " %02x", buf[i]);
 213                 for (; i < 16; i++)
 214                         color_fprintf(stdout, color, "   ");
 215                 if (ret > 0) {
 216                         ret = intel_pt_pkt_desc(&packet, desc,
 217                                                 INTEL_PT_PKT_DESC_MAX);
 218                         if (ret > 0)
 219                                 color_fprintf(stdout, color, " %s\n", desc);
 220                 } else {
 221                         color_fprintf(stdout, color, " Bad packet!\n");
 222                 }
 223                 pos += pkt_len;
 224                 buf += pkt_len;
 225                 len -= pkt_len;
 226         }
 227 }
 228
 229 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
 230                                 size_t len)
 231 {
 232         printf(".\n");
 233         intel_pt_dump(pt, buf, len);
 234 }
 235
 236 static void intel_pt_log_event(union perf_event *event)
 237 {
 238         FILE *f = intel_pt_log_fp();
 239
 240         if (!intel_pt_enable_logging || !f)
 241                 return;
 242
 243         perf_event__fprintf(event, NULL, f);
 244 }
 245
 246 static void intel_pt_dump_sample(struct perf_session *session,
 247                                  struct perf_sample *sample)
 248 {
 249         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
 250                                            auxtrace);
 251
 252         printf("\n");
 253         intel_pt_dump(pt, sample->aux_sample.data, sample->aux_sample.size);
 254 }
 255
 256 static bool intel_pt_log_events(struct intel_pt *pt, u64 tm)
 257 {
 258         struct perf_time_interval *range = pt->synth_opts.ptime_range;
 259         int n = pt->synth_opts.range_num;
 260
 261         if (pt->synth_opts.log_plus_flags & AUXTRACE_LOG_FLG_ALL_PERF_EVTS)
 262                 return true;
 263
 264         if (pt->synth_opts.log_minus_flags & AUXTRACE_LOG_FLG_ALL_PERF_EVTS)
 265                 return false;
 266
 267         /* perf_time__ranges_skip_sample does not work if time is zero */
 268         if (!tm)
 269                 tm = 1;
 270
 271         return !n || !perf_time__ranges_skip_sample(range, n, tm);
 272 }
 273
 274 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
 275                                    struct auxtrace_buffer *b)
 276 {
 277         bool consecutive = false;
 278         void *start;
 279
 280         start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
 281                                       pt->have_tsc, &consecutive);
 282         if (!start)
 283                 return -EINVAL;
 284         b->use_size = b->data + b->size - start;
 285         b->use_data = start;
 286         if (b->use_size && consecutive)
 287                 b->consecutive = true;
 288         return 0;
 289 }
 290
 291 static int intel_pt_get_buffer(struct intel_pt_queue *ptq,
 292                                struct auxtrace_buffer *buffer,
 293                                struct auxtrace_buffer *old_buffer,
 294                                struct intel_pt_buffer *b)
 295 {
 296         bool might_overlap;
 297
 298         if (!buffer->data) {
 299                 int fd = perf_data__fd(ptq->pt->session->data);
 300
 301                 buffer->data = auxtrace_buffer__get_data(buffer, fd);
 302                 if (!buffer->data)
 303                         return -ENOMEM;
 304         }
 305
 306         might_overlap = ptq->pt->snapshot_mode || ptq->pt->sampling_mode;
 307         if (might_overlap && !buffer->consecutive && old_buffer &&
 308             intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
 309                 return -ENOMEM;
 310
 311         if (buffer->use_data) {
 312                 b->len = buffer->use_size;
 313                 b->buf = buffer->use_data;
 314         } else {
 315                 b->len = buffer->size;
 316                 b->buf = buffer->data;
 317         }
 318         b->ref_timestamp = buffer->reference;
 319
 320         if (!old_buffer || (might_overlap && !buffer->consecutive)) {
 321                 b->consecutive = false;
 322                 b->trace_nr = buffer->buffer_nr + 1;
 323         } else {
 324                 b->consecutive = true;
 325         }
 326
 327         return 0;
 328 }
 329
 330 /* Do not drop buffers with references - refer intel_pt_get_trace() */
 331 static void intel_pt_lookahead_drop_buffer(struct intel_pt_queue *ptq,
 332                                            struct auxtrace_buffer *buffer)
 333 {
 334         if (!buffer || buffer == ptq->buffer || buffer == ptq->old_buffer)
 335                 return;
 336
 337         auxtrace_buffer__drop_data(buffer);
 338 }
 339
 340 /* Must be serialized with respect to intel_pt_get_trace() */
 341 static int intel_pt_lookahead(void *data, intel_pt_lookahead_cb_t cb,
 342                               void *cb_data)
 343 {
 344         struct intel_pt_queue *ptq = data;
 345         struct auxtrace_buffer *buffer = ptq->buffer;
 346         struct auxtrace_buffer *old_buffer = ptq->old_buffer;
 347         struct auxtrace_queue *queue;
 348         int err = 0;
 349
 350         queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
 351
 352         while (1) {
 353                 struct intel_pt_buffer b = { .len = 0 };
 354
 355                 buffer = auxtrace_buffer__next(queue, buffer);
 356                 if (!buffer)
 357                         break;
 358
 359                 err = intel_pt_get_buffer(ptq, buffer, old_buffer, &b);
 360                 if (err)
 361                         break;
 362
 363                 if (b.len) {
 364                         intel_pt_lookahead_drop_buffer(ptq, old_buffer);
 365                         old_buffer = buffer;
 366                 } else {
 367                         intel_pt_lookahead_drop_buffer(ptq, buffer);
 368                         continue;
 369                 }
 370
 371                 err = cb(&b, cb_data);
 372                 if (err)
 373                         break;
 374         }
 375
 376         if (buffer != old_buffer)
 377                 intel_pt_lookahead_drop_buffer(ptq, buffer);
 378         intel_pt_lookahead_drop_buffer(ptq, old_buffer);
 379
 380         return err;
 381 }
 382
 383 /*
 384  * This function assumes data is processed sequentially only.
 385  * Must be serialized with respect to intel_pt_lookahead()
 386  */
 387 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
 388 {
 389         struct intel_pt_queue *ptq = data;
 390         struct auxtrace_buffer *buffer = ptq->buffer;
 391         struct auxtrace_buffer *old_buffer = ptq->old_buffer;
 392         struct auxtrace_queue *queue;
 393         int err;
 394
 395         if (ptq->stop) {
 396                 b->len = 0;
 397                 return 0;
 398         }
 399
 400         queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
 401
 402         buffer = auxtrace_buffer__next(queue, buffer);
 403         if (!buffer) {
 404                 if (old_buffer)
 405                         auxtrace_buffer__drop_data(old_buffer);
 406                 b->len = 0;
 407                 return 0;
 408         }
 409
 410         ptq->buffer = buffer;
 411
 412         err = intel_pt_get_buffer(ptq, buffer, old_buffer, b);
 413         if (err)
 414                 return err;
 415
 416         if (ptq->step_through_buffers)
 417                 ptq->stop = true;
 418
 419         if (b->len) {
 420                 if (old_buffer)
 421                         auxtrace_buffer__drop_data(old_buffer);
 422                 ptq->old_buffer = buffer;
 423         } else {
 424                 auxtrace_buffer__drop_data(buffer);
 425                 return intel_pt_get_trace(b, data);
 426         }
 427
 428         return 0;
 429 }
 430
 431 struct intel_pt_cache_entry {
 432         struct auxtrace_cache_entry     entry;
 433         u64                             insn_cnt;
 434         u64                             byte_cnt;
 435         enum intel_pt_insn_op           op;
 436         enum intel_pt_insn_branch       branch;
 437         int                             length;
 438         int32_t                         rel;
 439         char                            insn[INTEL_PT_INSN_BUF_SZ];
 440 };
 441
 442 static int intel_pt_config_div(const char *var, const char *value, void *data)
 443 {
 444         int *d = data;
 445         long val;
 446
 447         if (!strcmp(var, "intel-pt.cache-divisor")) {
 448                 val = strtol(value, NULL, 0);
 449                 if (val > 0 && val <= INT_MAX)
 450                         *d = val;
 451         }
 452
 453         return 0;
 454 }
 455
 456 static int intel_pt_cache_divisor(void)
 457 {
 458         static int d;
 459
 460         if (d)
 461                 return d;
 462
 463         perf_config(intel_pt_config_div, &d);
 464
 465         if (!d)
 466                 d = 64;
 467
 468         return d;
 469 }
 470
 471 static unsigned int intel_pt_cache_size(struct dso *dso,
 472                                         struct machine *machine)
 473 {
 474         off_t size;
 475
 476         size = dso__data_size(dso, machine);
 477         size /= intel_pt_cache_divisor();
 478         if (size < 1000)
 479                 return 10;
 480         if (size > (1 << 21))
 481                 return 21;
 482         return 32 - __builtin_clz(size);
 483 }
 484
 485 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
 486                                              struct machine *machine)
 487 {
 488         struct auxtrace_cache *c;
 489         unsigned int bits;
 490
 491         if (dso->auxtrace_cache)
 492                 return dso->auxtrace_cache;
 493
 494         bits = intel_pt_cache_size(dso, machine);
 495
 496         /* Ignoring cache creation failure */
 497         c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
 498
 499         dso->auxtrace_cache = c;
 500
 501         return c;
 502 }
 503
 504 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
 505                               u64 offset, u64 insn_cnt, u64 byte_cnt,
 506                               struct intel_pt_insn *intel_pt_insn)
 507 {
 508         struct auxtrace_cache *c = intel_pt_cache(dso, machine);
 509         struct intel_pt_cache_entry *e;
 510         int err;
 511
 512         if (!c)
 513                 return -ENOMEM;
 514
 515         e = auxtrace_cache__alloc_entry(c);
 516         if (!e)
 517                 return -ENOMEM;
 518
 519         e->insn_cnt = insn_cnt;
 520         e->byte_cnt = byte_cnt;
 521         e->op = intel_pt_insn->op;
 522         e->branch = intel_pt_insn->branch;
 523         e->length = intel_pt_insn->length;
 524         e->rel = intel_pt_insn->rel;
 525         memcpy(e->insn, intel_pt_insn->buf, INTEL_PT_INSN_BUF_SZ);
 526
 527         err = auxtrace_cache__add(c, offset, &e->entry);
 528         if (err)
 529                 auxtrace_cache__free_entry(c, e);
 530
 531         return err;
 532 }
 533
 534 static struct intel_pt_cache_entry *
 535 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
 536 {
 537         struct auxtrace_cache *c = intel_pt_cache(dso, machine);
 538
 539         if (!c)
 540                 return NULL;
 541
 542         return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
 543 }
 544
 545 static void intel_pt_cache_invalidate(struct dso *dso, struct machine *machine,
 546                                       u64 offset)
 547 {
 548         struct auxtrace_cache *c = intel_pt_cache(dso, machine);
 549
 550         if (!c)
 551                 return;
 552
 553         auxtrace_cache__remove(dso->auxtrace_cache, offset);
 554 }
 555
 556 static inline bool intel_pt_guest_kernel_ip(uint64_t ip)
 557 {
 558         /* Assumes 64-bit kernel */
 559         return ip & (1ULL << 63);
 560 }
 561
 562 static inline u8 intel_pt_nr_cpumode(struct intel_pt_queue *ptq, uint64_t ip, bool nr)
 563 {
 564         if (nr) {
 565                 return intel_pt_guest_kernel_ip(ip) ?
 566                        PERF_RECORD_MISC_GUEST_KERNEL :
 567                        PERF_RECORD_MISC_GUEST_USER;
 568         }
 569
 570         return ip >= ptq->pt->kernel_start ?
 571                PERF_RECORD_MISC_KERNEL :
 572                PERF_RECORD_MISC_USER;
 573 }
 574
 575 static inline u8 intel_pt_cpumode(struct intel_pt_queue *ptq, uint64_t from_ip, uint64_t to_ip)
 576 {
 577         /* No support for non-zero CS base */
 578         if (from_ip)
 579                 return intel_pt_nr_cpumode(ptq, from_ip, ptq->state->from_nr);
 580         return intel_pt_nr_cpumode(ptq, to_ip, ptq->state->to_nr);
 581 }
 582
 583 static int intel_pt_get_guest(struct intel_pt_queue *ptq)
 584 {
 585         struct machines *machines = &ptq->pt->session->machines;
 586         struct machine *machine;
 587         pid_t pid = ptq->pid <= 0 ? DEFAULT_GUEST_KERNEL_ID : ptq->pid;
 588
 589         if (ptq->guest_machine && pid == ptq->guest_machine_pid)
 590                 return 0;
 591
 592         ptq->guest_machine = NULL;
 593         thread__zput(ptq->unknown_guest_thread);
 594
 595         machine = machines__find_guest(machines, pid);
 596         if (!machine)
 597                 return -1;
 598
 599         ptq->unknown_guest_thread = machine__idle_thread(machine);
 600         if (!ptq->unknown_guest_thread)
 601                 return -1;
 602
 603         ptq->guest_machine = machine;
 604         ptq->guest_machine_pid = pid;
 605
 606         return 0;
 607 }
 608
 609 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
 610                                    uint64_t *insn_cnt_ptr, uint64_t *ip,
 611                                    uint64_t to_ip, uint64_t max_insn_cnt,
 612                                    void *data)
 613 {
 614         struct intel_pt_queue *ptq = data;
 615         struct machine *machine = ptq->pt->machine;
 616         struct thread *thread;
 617         struct addr_location al;
 618         unsigned char buf[INTEL_PT_INSN_BUF_SZ];
 619         ssize_t len;
 620         int x86_64;
 621         u8 cpumode;
 622         u64 offset, start_offset, start_ip;
 623         u64 insn_cnt = 0;
 624         bool one_map = true;
 625         bool nr;
 626
 627         intel_pt_insn->length = 0;
 628
 629         if (to_ip && *ip == to_ip)
 630                 goto out_no_cache;
 631
 632         nr = ptq->state->to_nr;
 633         cpumode = intel_pt_nr_cpumode(ptq, *ip, nr);
 634
 635         if (nr) {
 636                 if (cpumode != PERF_RECORD_MISC_GUEST_KERNEL ||
 637                     intel_pt_get_guest(ptq))
 638                         return -EINVAL;
 639                 machine = ptq->guest_machine;
 640                 thread = ptq->unknown_guest_thread;
 641         } else {
 642                 thread = ptq->thread;
 643                 if (!thread) {
 644                         if (cpumode != PERF_RECORD_MISC_KERNEL)
 645                                 return -EINVAL;
 646                         thread = ptq->pt->unknown_thread;
 647                 }
 648         }
 649
 650         while (1) {
 651                 if (!thread__find_map(thread, cpumode, *ip, &al) || !al.map->dso)
 652                         return -EINVAL;
 653
 654                 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
 655                     dso__data_status_seen(al.map->dso,
 656                                           DSO_DATA_STATUS_SEEN_ITRACE))
 657                         return -ENOENT;
 658
 659                 offset = al.map->map_ip(al.map, *ip);
 660
 661                 if (!to_ip && one_map) {
 662                         struct intel_pt_cache_entry *e;
 663
 664                         e = intel_pt_cache_lookup(al.map->dso, machine, offset);
 665                         if (e &&
 666                             (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
 667                                 *insn_cnt_ptr = e->insn_cnt;
 668                                 *ip += e->byte_cnt;
 669                                 intel_pt_insn->op = e->op;
 670                                 intel_pt_insn->branch = e->branch;
 671                                 intel_pt_insn->length = e->length;
 672                                 intel_pt_insn->rel = e->rel;
 673                                 memcpy(intel_pt_insn->buf, e->insn,
 674                                        INTEL_PT_INSN_BUF_SZ);
 675                                 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
 676                                 return 0;
 677                         }
 678                 }
 679
 680                 start_offset = offset;
 681                 start_ip = *ip;
 682
 683                 /* Load maps to ensure dso->is_64_bit has been updated */
 684                 map__load(al.map);
 685
 686                 x86_64 = al.map->dso->is_64_bit;
 687
 688                 while (1) {
 689                         len = dso__data_read_offset(al.map->dso, machine,
 690                                                     offset, buf,
 691                                                     INTEL_PT_INSN_BUF_SZ);
 692                         if (len <= 0)
 693                                 return -EINVAL;
 694
 695                         if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
 696                                 return -EINVAL;
 697
 698                         intel_pt_log_insn(intel_pt_insn, *ip);
 699
 700                         insn_cnt += 1;
 701
 702                         if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
 703                                 goto out;
 704
 705                         if (max_insn_cnt && insn_cnt >= max_insn_cnt)
 706                                 goto out_no_cache;
 707
 708                         *ip += intel_pt_insn->length;
 709
 710                         if (to_ip && *ip == to_ip) {
 711                                 intel_pt_insn->length = 0;
 712                                 goto out_no_cache;
 713                         }
 714
 715                         if (*ip >= al.map->end)
 716                                 break;
 717
 718                         offset += intel_pt_insn->length;
 719                 }
 720                 one_map = false;
 721         }
 722 out:
 723         *insn_cnt_ptr = insn_cnt;
 724
 725         if (!one_map)
 726                 goto out_no_cache;
 727
 728         /*
 729          * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
 730          * entries.
 731          */
 732         if (to_ip) {
 733                 struct intel_pt_cache_entry *e;
 734
 735                 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
 736                 if (e)
 737                         return 0;
 738         }
 739
 740         /* Ignore cache errors */
 741         intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
 742                            *ip - start_ip, intel_pt_insn);
 743
 744         return 0;
 745
 746 out_no_cache:
 747         *insn_cnt_ptr = insn_cnt;
 748         return 0;
 749 }
 750
 751 static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
 752                                   uint64_t offset, const char *filename)
 753 {
 754         struct addr_filter *filt;
 755         bool have_filter   = false;
 756         bool hit_tracestop = false;
 757         bool hit_filter    = false;
 758
 759         list_for_each_entry(filt, &pt->filts.head, list) {
 760                 if (filt->start)
 761                         have_filter = true;
 762
 763                 if ((filename && !filt->filename) ||
 764                     (!filename && filt->filename) ||
 765                     (filename && strcmp(filename, filt->filename)))
 766                         continue;
 767
 768                 if (!(offset >= filt->addr && offset < filt->addr + filt->size))
 769                         continue;
 770
 771                 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
 772                              ip, offset, filename ? filename : "[kernel]",
 773                              filt->start ? "filter" : "stop",
 774                              filt->addr, filt->size);
 775
 776                 if (filt->start)
 777                         hit_filter = true;
 778                 else
 779                         hit_tracestop = true;
 780         }
 781
 782         if (!hit_tracestop && !hit_filter)
 783                 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
 784                              ip, offset, filename ? filename : "[kernel]");
 785
 786         return hit_tracestop || (have_filter && !hit_filter);
 787 }
 788
 789 static int __intel_pt_pgd_ip(uint64_t ip, void *data)
 790 {
 791         struct intel_pt_queue *ptq = data;
 792         struct thread *thread;
 793         struct addr_location al;
 794         u8 cpumode;
 795         u64 offset;
 796
 797         if (ptq->state->to_nr) {
 798                 if (intel_pt_guest_kernel_ip(ip))
 799                         return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
 800                 /* No support for decoding guest user space */
 801                 return -EINVAL;
 802         } else if (ip >= ptq->pt->kernel_start) {
 803                 return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
 804         }
 805
 806         cpumode = PERF_RECORD_MISC_USER;
 807
 808         thread = ptq->thread;
 809         if (!thread)
 810                 return -EINVAL;
 811
 812         if (!thread__find_map(thread, cpumode, ip, &al) || !al.map->dso)
 813                 return -EINVAL;
 814
 815         offset = al.map->map_ip(al.map, ip);
 816
 817         return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
 818                                      al.map->dso->long_name);
 819 }
 820
 821 static bool intel_pt_pgd_ip(uint64_t ip, void *data)
 822 {
 823         return __intel_pt_pgd_ip(ip, data) > 0;
 824 }
 825
 826 static bool intel_pt_get_config(struct intel_pt *pt,
 827                                 struct perf_event_attr *attr, u64 *config)
 828 {
 829         if (attr->type == pt->pmu_type) {
 830                 if (config)
 831                         *config = attr->config;
 832                 return true;
 833         }
 834
 835         return false;
 836 }
 837
 838 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
 839 {
 840         struct evsel *evsel;
 841
 842         evlist__for_each_entry(pt->session->evlist, evsel) {
 843                 if (intel_pt_get_config(pt, &evsel->core.attr, NULL) &&
 844                     !evsel->core.attr.exclude_kernel)
 845                         return false;
 846         }
 847         return true;
 848 }
 849
 850 static bool intel_pt_return_compression(struct intel_pt *pt)
 851 {
 852         struct evsel *evsel;
 853         u64 config;
 854
 855         if (!pt->noretcomp_bit)
 856                 return true;
 857
 858         evlist__for_each_entry(pt->session->evlist, evsel) {
 859                 if (intel_pt_get_config(pt, &evsel->core.attr, &config) &&
 860                     (config & pt->noretcomp_bit))
 861                         return false;
 862         }
 863         return true;
 864 }
 865
 866 static bool intel_pt_branch_enable(struct intel_pt *pt)
 867 {
 868         struct evsel *evsel;
 869         u64 config;
 870
 871         evlist__for_each_entry(pt->session->evlist, evsel) {
 872                 if (intel_pt_get_config(pt, &evsel->core.attr, &config) &&
 873                     (config & 1) && !(config & 0x2000))
 874                         return false;
 875         }
 876         return true;
 877 }
 878
 879 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
 880 {
 881         struct evsel *evsel;
 882         unsigned int shift;
 883         u64 config;
 884
 885         if (!pt->mtc_freq_bits)
 886                 return 0;
 887
 888         for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
 889                 config >>= 1;
 890
 891         evlist__for_each_entry(pt->session->evlist, evsel) {
 892                 if (intel_pt_get_config(pt, &evsel->core.attr, &config))
 893                         return (config & pt->mtc_freq_bits) >> shift;
 894         }
 895         return 0;
 896 }
 897
 898 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
 899 {
 900         struct evsel *evsel;
 901         bool timeless_decoding = true;
 902         u64 config;
 903
 904         if (!pt->tsc_bit || !pt->cap_user_time_zero)
 905                 return true;
 906
 907         evlist__for_each_entry(pt->session->evlist, evsel) {
 908                 if (!(evsel->core.attr.sample_type & PERF_SAMPLE_TIME))
 909                         return true;
 910                 if (intel_pt_get_config(pt, &evsel->core.attr, &config)) {
 911                         if (config & pt->tsc_bit)
 912                                 timeless_decoding = false;
 913                         else
 914                                 return true;
 915                 }
 916         }
 917         return timeless_decoding;
 918 }
 919
 920 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
 921 {
 922         struct evsel *evsel;
 923
 924         evlist__for_each_entry(pt->session->evlist, evsel) {
 925                 if (intel_pt_get_config(pt, &evsel->core.attr, NULL) &&
 926                     !evsel->core.attr.exclude_kernel)
 927                         return true;
 928         }
 929         return false;
 930 }
 931
 932 static bool intel_pt_have_tsc(struct intel_pt *pt)
 933 {
 934         struct evsel *evsel;
 935         bool have_tsc = false;
 936         u64 config;
 937
 938         if (!pt->tsc_bit)
 939                 return false;
 940
 941         evlist__for_each_entry(pt->session->evlist, evsel) {
 942                 if (intel_pt_get_config(pt, &evsel->core.attr, &config)) {
 943                         if (config & pt->tsc_bit)
 944                                 have_tsc = true;
 945                         else
 946                                 return false;
 947                 }
 948         }
 949         return have_tsc;
 950 }
 951
 952 static bool intel_pt_sampling_mode(struct intel_pt *pt)
 953 {
 954         struct evsel *evsel;
 955
 956         evlist__for_each_entry(pt->session->evlist, evsel) {
 957                 if ((evsel->core.attr.sample_type & PERF_SAMPLE_AUX) &&
 958                     evsel->core.attr.aux_sample_size)
 959                         return true;
 960         }
 961         return false;
 962 }
 963
 964 static u64 intel_pt_ctl(struct intel_pt *pt)
 965 {
 966         struct evsel *evsel;
 967         u64 config;
 968
 969         evlist__for_each_entry(pt->session->evlist, evsel) {
 970                 if (intel_pt_get_config(pt, &evsel->core.attr, &config))
 971                         return config;
 972         }
 973         return 0;
 974 }
 975
 976 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
 977 {
 978         u64 quot, rem;
 979
 980         quot = ns / pt->tc.time_mult;
 981         rem  = ns % pt->tc.time_mult;
 982         return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
 983                 pt->tc.time_mult;
 984 }
 985
 986 static struct ip_callchain *intel_pt_alloc_chain(struct intel_pt *pt)
 987 {
 988         size_t sz = sizeof(struct ip_callchain);
 989
 990         /* Add 1 to callchain_sz for callchain context */
 991         sz += (pt->synth_opts.callchain_sz + 1) * sizeof(u64);
 992         return zalloc(sz);
 993 }
 994
 995 static int intel_pt_callchain_init(struct intel_pt *pt)
 996 {
 997         struct evsel *evsel;
 998
 999         evlist__for_each_entry(pt->session->evlist, evsel) {
1000                 if (!(evsel->core.attr.sample_type & PERF_SAMPLE_CALLCHAIN))
1001                         evsel->synth_sample_type |= PERF_SAMPLE_CALLCHAIN;
1002         }
1003
1004         pt->chain = intel_pt_alloc_chain(pt);
1005         if (!pt->chain)
1006                 return -ENOMEM;
1007
1008         return 0;
1009 }
1010
1011 static void intel_pt_add_callchain(struct intel_pt *pt,
1012                                    struct perf_sample *sample)
1013 {
1014         struct thread *thread = machine__findnew_thread(pt->machine,
1015                                                         sample->pid,
1016                                                         sample->tid);
1017
1018         thread_stack__sample_late(thread, sample->cpu, pt->chain,
1019                                   pt->synth_opts.callchain_sz + 1, sample->ip,
1020                                   pt->kernel_start);
1021
1022         sample->callchain = pt->chain;
1023 }
1024
1025 static struct branch_stack *intel_pt_alloc_br_stack(unsigned int entry_cnt)
1026 {
1027         size_t sz = sizeof(struct branch_stack);
1028
1029         sz += entry_cnt * sizeof(struct branch_entry);
1030         return zalloc(sz);
1031 }
1032
1033 static int intel_pt_br_stack_init(struct intel_pt *pt)
1034 {
1035         struct evsel *evsel;
1036
1037         evlist__for_each_entry(pt->session->evlist, evsel) {
1038                 if (!(evsel->core.attr.sample_type & PERF_SAMPLE_BRANCH_STACK))
1039                         evsel->synth_sample_type |= PERF_SAMPLE_BRANCH_STACK;
1040         }
1041
1042         pt->br_stack = intel_pt_alloc_br_stack(pt->br_stack_sz);
1043         if (!pt->br_stack)
1044                 return -ENOMEM;
1045
1046         return 0;
1047 }
1048
1049 static void intel_pt_add_br_stack(struct intel_pt *pt,
1050                                   struct perf_sample *sample)
1051 {
1052         struct thread *thread = machine__findnew_thread(pt->machine,
1053                                                         sample->pid,
1054                                                         sample->tid);
1055
1056         thread_stack__br_sample_late(thread, sample->cpu, pt->br_stack,
1057                                      pt->br_stack_sz, sample->ip,
1058                                      pt->kernel_start);
1059
1060         sample->branch_stack = pt->br_stack;
1061 }
1062
1063 /* INTEL_PT_LBR_0, INTEL_PT_LBR_1 and INTEL_PT_LBR_2 */
1064 #define LBRS_MAX (INTEL_PT_BLK_ITEM_ID_CNT * 3U)
1065
1066 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
1067                                                    unsigned int queue_nr)
1068 {
1069         struct intel_pt_params params = { .get_trace = 0, };
1070         struct perf_env *env = pt->machine->env;
1071         struct intel_pt_queue *ptq;
1072
1073         ptq = zalloc(sizeof(struct intel_pt_queue));
1074         if (!ptq)
1075                 return NULL;
1076
1077         if (pt->synth_opts.callchain) {
1078                 ptq->chain = intel_pt_alloc_chain(pt);
1079                 if (!ptq->chain)
1080                         goto out_free;
1081         }
1082
1083         if (pt->synth_opts.last_branch || pt->synth_opts.other_events) {
1084                 unsigned int entry_cnt = max(LBRS_MAX, pt->br_stack_sz);
1085
1086                 ptq->last_branch = intel_pt_alloc_br_stack(entry_cnt);
1087                 if (!ptq->last_branch)
1088                         goto out_free;
1089         }
1090
1091         ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
1092         if (!ptq->event_buf)
1093                 goto out_free;
1094
1095         ptq->pt = pt;
1096         ptq->queue_nr = queue_nr;
1097         ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
1098         ptq->pid = -1;
1099         ptq->tid = -1;
1100         ptq->cpu = -1;
1101         ptq->next_tid = -1;
1102
1103         params.get_trace = intel_pt_get_trace;
1104         params.walk_insn = intel_pt_walk_next_insn;
1105         params.lookahead = intel_pt_lookahead;
1106         params.data = ptq;
1107         params.return_compression = intel_pt_return_compression(pt);
1108         params.branch_enable = intel_pt_branch_enable(pt);
1109         params.ctl = intel_pt_ctl(pt);
1110         params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
1111         params.mtc_period = intel_pt_mtc_period(pt);
1112         params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
1113         params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
1114         params.quick = pt->synth_opts.quick;
1115
1116         if (pt->filts.cnt > 0)
1117                 params.pgd_ip = intel_pt_pgd_ip;
1118
1119         if (pt->synth_opts.instructions) {
1120                 if (pt->synth_opts.period) {
1121                         switch (pt->synth_opts.period_type) {
1122                         case PERF_ITRACE_PERIOD_INSTRUCTIONS:
1123                                 params.period_type =
1124                                                 INTEL_PT_PERIOD_INSTRUCTIONS;
1125                                 params.period = pt->synth_opts.period;
1126                                 break;
1127                         case PERF_ITRACE_PERIOD_TICKS:
1128                                 params.period_type = INTEL_PT_PERIOD_TICKS;
1129                                 params.period = pt->synth_opts.period;
1130                                 break;
1131                         case PERF_ITRACE_PERIOD_NANOSECS:
1132                                 params.period_type = INTEL_PT_PERIOD_TICKS;
1133                                 params.period = intel_pt_ns_to_ticks(pt,
1134                                                         pt->synth_opts.period);
1135                                 break;
1136                         default:
1137                                 break;
1138                         }
1139                 }
1140
1141                 if (!params.period) {
1142                         params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
1143                         params.period = 1;
1144                 }
1145         }
1146
1147         if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
1148                 params.flags |= INTEL_PT_FUP_WITH_NLIP;
1149
1150         ptq->decoder = intel_pt_decoder_new(&params);
1151         if (!ptq->decoder)
1152                 goto out_free;
1153
1154         return ptq;
1155
1156 out_free:
1157         zfree(&ptq->event_buf);
1158         zfree(&ptq->last_branch);
1159         zfree(&ptq->chain);
1160         free(ptq);
1161         return NULL;
1162 }
1163
1164 static void intel_pt_free_queue(void *priv)
1165 {
1166         struct intel_pt_queue *ptq = priv;
1167
1168         if (!ptq)
1169                 return;
1170         thread__zput(ptq->thread);
1171         thread__zput(ptq->unknown_guest_thread);
1172         intel_pt_decoder_free(ptq->decoder);
1173         zfree(&ptq->event_buf);
1174         zfree(&ptq->last_branch);
1175         zfree(&ptq->chain);
1176         free(ptq);
1177 }
1178
1179 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
1180                                      struct auxtrace_queue *queue)
1181 {
1182         struct intel_pt_queue *ptq = queue->priv;
1183
1184         if (queue->tid == -1 || pt->have_sched_switch) {
1185                 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
1186                 if (ptq->tid == -1)
1187                         ptq->pid = -1;
1188                 thread__zput(ptq->thread);
1189         }
1190
1191         if (!ptq->thread && ptq->tid != -1)
1192                 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
1193
1194         if (ptq->thread) {
1195                 ptq->pid = ptq->thread->pid_;
1196                 if (queue->cpu == -1)
1197                         ptq->cpu = ptq->thread->cpu;
1198         }
1199 }
1200
1201 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
1202 {
1203         ptq->insn_len = 0;
1204         if (ptq->state->flags & INTEL_PT_ABORT_TX) {
1205                 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
1206         } else if (ptq->state->flags & INTEL_PT_ASYNC) {
1207                 if (!ptq->state->to_ip)
1208                         ptq->flags = PERF_IP_FLAG_BRANCH |
1209                                      PERF_IP_FLAG_TRACE_END;
1210                 else if (ptq->state->from_nr && !ptq->state->to_nr)
1211                         ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
1212                                      PERF_IP_FLAG_VMEXIT;
1213                 else
1214                         ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
1215                                      PERF_IP_FLAG_ASYNC |
1216                                      PERF_IP_FLAG_INTERRUPT;
1217         } else {
1218                 if (ptq->state->from_ip)
1219                         ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
1220                 else
1221                         ptq->flags = PERF_IP_FLAG_BRANCH |
1222                                      PERF_IP_FLAG_TRACE_BEGIN;
1223                 if (ptq->state->flags & INTEL_PT_IN_TX)
1224                         ptq->flags |= PERF_IP_FLAG_IN_TX;
1225                 ptq->insn_len = ptq->state->insn_len;
1226                 memcpy(ptq->insn, ptq->state->insn, INTEL_PT_INSN_BUF_SZ);
1227         }
1228
1229         if (ptq->state->type & INTEL_PT_TRACE_BEGIN)
1230                 ptq->flags |= PERF_IP_FLAG_TRACE_BEGIN;
1231         if (ptq->state->type & INTEL_PT_TRACE_END)
1232                 ptq->flags |= PERF_IP_FLAG_TRACE_END;
1233 }
1234
1235 static void intel_pt_setup_time_range(struct intel_pt *pt,
1236                                       struct intel_pt_queue *ptq)
1237 {
1238         if (!pt->range_cnt)
1239                 return;
1240
1241         ptq->sel_timestamp = pt->time_ranges[0].start;
1242         ptq->sel_idx = 0;
1243
1244         if (ptq->sel_timestamp) {
1245                 ptq->sel_start = true;
1246         } else {
1247                 ptq->sel_timestamp = pt->time_ranges[0].end;
1248                 ptq->sel_start = false;
1249         }
1250 }
1251
1252 static int intel_pt_setup_queue(struct intel_pt *pt,
1253                                 struct auxtrace_queue *queue,
1254                                 unsigned int queue_nr)
1255 {
1256         struct intel_pt_queue *ptq = queue->priv;
1257
1258         if (list_empty(&queue->head))
1259                 return 0;
1260
1261         if (!ptq) {
1262                 ptq = intel_pt_alloc_queue(pt, queue_nr);
1263                 if (!ptq)
1264                         return -ENOMEM;
1265                 queue->priv = ptq;
1266
1267                 if (queue->cpu != -1)
1268                         ptq->cpu = queue->cpu;
1269                 ptq->tid = queue->tid;
1270
1271                 ptq->cbr_seen = UINT_MAX;
1272
1273                 if (pt->sampling_mode && !pt->snapshot_mode &&
1274                     pt->timeless_decoding)
1275                         ptq->step_through_buffers = true;
1276
1277                 ptq->sync_switch = pt->sync_switch;
1278
1279                 intel_pt_setup_time_range(pt, ptq);
1280         }
1281
1282         if (!ptq->on_heap &&
1283             (!ptq->sync_switch ||
1284              ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
1285                 const struct intel_pt_state *state;
1286                 int ret;
1287
1288                 if (pt->timeless_decoding)
1289                         return 0;
1290
1291                 intel_pt_log("queue %u getting timestamp\n", queue_nr);
1292                 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1293                              queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1294
1295                 if (ptq->sel_start && ptq->sel_timestamp) {
1296                         ret = intel_pt_fast_forward(ptq->decoder,
1297                                                     ptq->sel_timestamp);
1298                         if (ret)
1299                                 return ret;
1300                 }
1301
1302                 while (1) {
1303                         state = intel_pt_decode(ptq->decoder);
1304                         if (state->err) {
1305                                 if (state->err == INTEL_PT_ERR_NODATA) {
1306                                         intel_pt_log("queue %u has no timestamp\n",
1307                                                      queue_nr);
1308                                         return 0;
1309                                 }
1310                                 continue;
1311                         }
1312                         if (state->timestamp)
1313                                 break;
1314                 }
1315
1316                 ptq->timestamp = state->timestamp;
1317                 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
1318                              queue_nr, ptq->timestamp);
1319                 ptq->state = state;
1320                 ptq->have_sample = true;
1321                 if (ptq->sel_start && ptq->sel_timestamp &&
1322                     ptq->timestamp < ptq->sel_timestamp)
1323                         ptq->have_sample = false;
1324                 intel_pt_sample_flags(ptq);
1325                 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
1326                 if (ret)
1327                         return ret;
1328                 ptq->on_heap = true;
1329         }
1330
1331         return 0;
1332 }
1333
1334 static int intel_pt_setup_queues(struct intel_pt *pt)
1335 {
1336         unsigned int i;
1337         int ret;
1338
1339         for (i = 0; i < pt->queues.nr_queues; i++) {
1340                 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
1341                 if (ret)
1342                         return ret;
1343         }
1344         return 0;
1345 }
1346
1347 static inline bool intel_pt_skip_event(struct intel_pt *pt)
1348 {
1349         return pt->synth_opts.initial_skip &&
1350                pt->num_events++ < pt->synth_opts.initial_skip;
1351 }
1352
1353 /*
1354  * Cannot count CBR as skipped because it won't go away until cbr == cbr_seen.
1355  * Also ensure CBR is first non-skipped event by allowing for 4 more samples
1356  * from this decoder state.
1357  */
1358 static inline bool intel_pt_skip_cbr_event(struct intel_pt *pt)
1359 {
1360         return pt->synth_opts.initial_skip &&
1361                pt->num_events + 4 < pt->synth_opts.initial_skip;
1362 }
1363
1364 static void intel_pt_prep_a_sample(struct intel_pt_queue *ptq,
1365                                    union perf_event *event,
1366                                    struct perf_sample *sample)
1367 {
1368         event->sample.header.type = PERF_RECORD_SAMPLE;
1369         event->sample.header.size = sizeof(struct perf_event_header);
1370
1371         sample->pid = ptq->pid;
1372         sample->tid = ptq->tid;
1373         sample->cpu = ptq->cpu;
1374         sample->insn_len = ptq->insn_len;
1375         memcpy(sample->insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
1376 }
1377
1378 static void intel_pt_prep_b_sample(struct intel_pt *pt,
1379                                    struct intel_pt_queue *ptq,
1380                                    union perf_event *event,
1381                                    struct perf_sample *sample)
1382 {
1383         intel_pt_prep_a_sample(ptq, event, sample);
1384
1385         if (!pt->timeless_decoding)
1386                 sample->time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1387
1388         sample->ip = ptq->state->from_ip;
1389         sample->addr = ptq->state->to_ip;
1390         sample->cpumode = intel_pt_cpumode(ptq, sample->ip, sample->addr);
1391         sample->period = 1;
1392         sample->flags = ptq->flags;
1393
1394         event->sample.header.misc = sample->cpumode;
1395 }
1396
1397 static int intel_pt_inject_event(union perf_event *event,
1398                                  struct perf_sample *sample, u64 type)
1399 {
1400         event->header.size = perf_event__sample_event_size(sample, type, 0);
1401         return perf_event__synthesize_sample(event, type, 0, sample);
1402 }
1403
1404 static inline int intel_pt_opt_inject(struct intel_pt *pt,
1405                                       union perf_event *event,
1406                                       struct perf_sample *sample, u64 type)
1407 {
1408         if (!pt->synth_opts.inject)
1409                 return 0;
1410
1411         return intel_pt_inject_event(event, sample, type);
1412 }
1413
1414 static int intel_pt_deliver_synth_event(struct intel_pt *pt,
1415                                         union perf_event *event,
1416                                         struct perf_sample *sample, u64 type)
1417 {
1418         int ret;
1419
1420         ret = intel_pt_opt_inject(pt, event, sample, type);
1421         if (ret)
1422                 return ret;
1423
1424         ret = perf_session__deliver_synth_event(pt->session, event, sample);
1425         if (ret)
1426                 pr_err("Intel PT: failed to deliver event, error %d\n", ret);
1427
1428         return ret;
1429 }
1430
1431 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
1432 {
1433         struct intel_pt *pt = ptq->pt;
1434         union perf_event *event = ptq->event_buf;
1435         struct perf_sample sample = { .ip = 0, };
1436         struct dummy_branch_stack {
1437                 u64                     nr;
1438                 u64                     hw_idx;
1439                 struct branch_entry     entries;
1440         } dummy_bs;
1441
1442         if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
1443                 return 0;
1444
1445         if (intel_pt_skip_event(pt))
1446                 return 0;
1447
1448         intel_pt_prep_b_sample(pt, ptq, event, &sample);
1449
1450         sample.id = ptq->pt->branches_id;
1451         sample.stream_id = ptq->pt->branches_id;
1452
1453         /*
1454          * perf report cannot handle events without a branch stack when using
1455          * SORT_MODE__BRANCH so make a dummy one.
1456          */
1457         if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1458                 dummy_bs = (struct dummy_branch_stack){
1459                         .nr = 1,
1460                         .hw_idx = -1ULL,
1461                         .entries = {
1462                                 .from = sample.ip,
1463                                 .to = sample.addr,
1464                         },
1465                 };
1466                 sample.branch_stack = (struct branch_stack *)&dummy_bs;
1467         }
1468
1469         if (ptq->state->flags & INTEL_PT_SAMPLE_IPC)
1470                 sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_br_cyc_cnt;
1471         if (sample.cyc_cnt) {
1472                 sample.insn_cnt = ptq->ipc_insn_cnt - ptq->last_br_insn_cnt;
1473                 ptq->last_br_insn_cnt = ptq->ipc_insn_cnt;
1474                 ptq->last_br_cyc_cnt = ptq->ipc_cyc_cnt;
1475         }
1476
1477         return intel_pt_deliver_synth_event(pt, event, &sample,
1478                                             pt->branches_sample_type);
1479 }
1480
1481 static void intel_pt_prep_sample(struct intel_pt *pt,
1482                                  struct intel_pt_queue *ptq,
1483                                  union perf_event *event,
1484                                  struct perf_sample *sample)
1485 {
1486         intel_pt_prep_b_sample(pt, ptq, event, sample);
1487
1488         if (pt->synth_opts.callchain) {
1489                 thread_stack__sample(ptq->thread, ptq->cpu, ptq->chain,
1490                                      pt->synth_opts.callchain_sz + 1,
1491                                      sample->ip, pt->kernel_start);
1492                 sample->callchain = ptq->chain;
1493         }
1494
1495         if (pt->synth_opts.last_branch) {
1496                 thread_stack__br_sample(ptq->thread, ptq->cpu, ptq->last_branch,
1497                                         pt->br_stack_sz);
1498                 sample->branch_stack = ptq->last_branch;
1499         }
1500 }
1501
1502 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1503 {
1504         struct intel_pt *pt = ptq->pt;
1505         union perf_event *event = ptq->event_buf;
1506         struct perf_sample sample = { .ip = 0, };
1507
1508         if (intel_pt_skip_event(pt))
1509                 return 0;
1510
1511         intel_pt_prep_sample(pt, ptq, event, &sample);
1512
1513         sample.id = ptq->pt->instructions_id;
1514         sample.stream_id = ptq->pt->instructions_id;
1515         if (pt->synth_opts.quick)
1516                 sample.period = 1;
1517         else
1518                 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1519
1520         if (ptq->state->flags & INTEL_PT_SAMPLE_IPC)
1521                 sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_in_cyc_cnt;
1522         if (sample.cyc_cnt) {
1523                 sample.insn_cnt = ptq->ipc_insn_cnt - ptq->last_in_insn_cnt;
1524                 ptq->last_in_insn_cnt = ptq->ipc_insn_cnt;
1525                 ptq->last_in_cyc_cnt = ptq->ipc_cyc_cnt;
1526         }
1527
1528         ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1529
1530         return intel_pt_deliver_synth_event(pt, event, &sample,
1531                                             pt->instructions_sample_type);
1532 }
1533
1534 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1535 {
1536         struct intel_pt *pt = ptq->pt;
1537         union perf_event *event = ptq->event_buf;
1538         struct perf_sample sample = { .ip = 0, };
1539
1540         if (intel_pt_skip_event(pt))
1541                 return 0;
1542
1543         intel_pt_prep_sample(pt, ptq, event, &sample);
1544
1545         sample.id = ptq->pt->transactions_id;
1546         sample.stream_id = ptq->pt->transactions_id;
1547
1548         return intel_pt_deliver_synth_event(pt, event, &sample,
1549                                             pt->transactions_sample_type);
1550 }
1551
1552 static void intel_pt_prep_p_sample(struct intel_pt *pt,
1553                                    struct intel_pt_queue *ptq,
1554                                    union perf_event *event,
1555                                    struct perf_sample *sample)
1556 {
1557         intel_pt_prep_sample(pt, ptq, event, sample);
1558
1559         /*
1560          * Zero IP is used to mean "trace start" but that is not the case for
1561          * power or PTWRITE events with no IP, so clear the flags.
1562          */
1563         if (!sample->ip)
1564                 sample->flags = 0;
1565 }
1566
1567 static int intel_pt_synth_ptwrite_sample(struct intel_pt_queue *ptq)
1568 {
1569         struct intel_pt *pt = ptq->pt;
1570         union perf_event *event = ptq->event_buf;
1571         struct perf_sample sample = { .ip = 0, };
1572         struct perf_synth_intel_ptwrite raw;
1573
1574         if (intel_pt_skip_event(pt))
1575                 return 0;
1576
1577         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1578
1579         sample.id = ptq->pt->ptwrites_id;
1580         sample.stream_id = ptq->pt->ptwrites_id;
1581
1582         raw.flags = 0;
1583         raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1584         raw.payload = cpu_to_le64(ptq->state->ptw_payload);
1585
1586         sample.raw_size = perf_synth__raw_size(raw);
1587         sample.raw_data = perf_synth__raw_data(&raw);
1588
1589         return intel_pt_deliver_synth_event(pt, event, &sample,
1590                                             pt->ptwrites_sample_type);
1591 }
1592
1593 static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
1594 {
1595         struct intel_pt *pt = ptq->pt;
1596         union perf_event *event = ptq->event_buf;
1597         struct perf_sample sample = { .ip = 0, };
1598         struct perf_synth_intel_cbr raw;
1599         u32 flags;
1600
1601         if (intel_pt_skip_cbr_event(pt))
1602                 return 0;
1603
1604         ptq->cbr_seen = ptq->state->cbr;
1605
1606         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1607
1608         sample.id = ptq->pt->cbr_id;
1609         sample.stream_id = ptq->pt->cbr_id;
1610
1611         flags = (u16)ptq->state->cbr_payload | (pt->max_non_turbo_ratio << 16);
1612         raw.flags = cpu_to_le32(flags);
1613         raw.freq = cpu_to_le32(raw.cbr * pt->cbr2khz);
1614         raw.reserved3 = 0;
1615
1616         sample.raw_size = perf_synth__raw_size(raw);
1617         sample.raw_data = perf_synth__raw_data(&raw);
1618
1619         return intel_pt_deliver_synth_event(pt, event, &sample,
1620                                             pt->pwr_events_sample_type);
1621 }
1622
1623 static int intel_pt_synth_psb_sample(struct intel_pt_queue *ptq)
1624 {
1625         struct intel_pt *pt = ptq->pt;
1626         union perf_event *event = ptq->event_buf;
1627         struct perf_sample sample = { .ip = 0, };
1628         struct perf_synth_intel_psb raw;
1629
1630         if (intel_pt_skip_event(pt))
1631                 return 0;
1632
1633         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1634
1635         sample.id = ptq->pt->psb_id;
1636         sample.stream_id = ptq->pt->psb_id;
1637         sample.flags = 0;
1638
1639         raw.reserved = 0;
1640         raw.offset = ptq->state->psb_offset;
1641
1642         sample.raw_size = perf_synth__raw_size(raw);
1643         sample.raw_data = perf_synth__raw_data(&raw);
1644
1645         return intel_pt_deliver_synth_event(pt, event, &sample,
1646                                             pt->pwr_events_sample_type);
1647 }
1648
1649 static int intel_pt_synth_mwait_sample(struct intel_pt_queue *ptq)
1650 {
1651         struct intel_pt *pt = ptq->pt;
1652         union perf_event *event = ptq->event_buf;
1653         struct perf_sample sample = { .ip = 0, };
1654         struct perf_synth_intel_mwait raw;
1655
1656         if (intel_pt_skip_event(pt))
1657                 return 0;
1658
1659         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1660
1661         sample.id = ptq->pt->mwait_id;
1662         sample.stream_id = ptq->pt->mwait_id;
1663
1664         raw.reserved = 0;
1665         raw.payload = cpu_to_le64(ptq->state->mwait_payload);
1666
1667         sample.raw_size = perf_synth__raw_size(raw);
1668         sample.raw_data = perf_synth__raw_data(&raw);
1669
1670         return intel_pt_deliver_synth_event(pt, event, &sample,
1671                                             pt->pwr_events_sample_type);
1672 }
1673
1674 static int intel_pt_synth_pwre_sample(struct intel_pt_queue *ptq)
1675 {
1676         struct intel_pt *pt = ptq->pt;
1677         union perf_event *event = ptq->event_buf;
1678         struct perf_sample sample = { .ip = 0, };
1679         struct perf_synth_intel_pwre raw;
1680
1681         if (intel_pt_skip_event(pt))
1682                 return 0;
1683
1684         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1685
1686         sample.id = ptq->pt->pwre_id;
1687         sample.stream_id = ptq->pt->pwre_id;
1688
1689         raw.reserved = 0;
1690         raw.payload = cpu_to_le64(ptq->state->pwre_payload);
1691
1692         sample.raw_size = perf_synth__raw_size(raw);
1693         sample.raw_data = perf_synth__raw_data(&raw);
1694
1695         return intel_pt_deliver_synth_event(pt, event, &sample,
1696                                             pt->pwr_events_sample_type);
1697 }
1698
1699 static int intel_pt_synth_exstop_sample(struct intel_pt_queue *ptq)
1700 {
1701         struct intel_pt *pt = ptq->pt;
1702         union perf_event *event = ptq->event_buf;
1703         struct perf_sample sample = { .ip = 0, };
1704         struct perf_synth_intel_exstop raw;
1705
1706         if (intel_pt_skip_event(pt))
1707                 return 0;
1708
1709         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1710
1711         sample.id = ptq->pt->exstop_id;
1712         sample.stream_id = ptq->pt->exstop_id;
1713
1714         raw.flags = 0;
1715         raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1716
1717         sample.raw_size = perf_synth__raw_size(raw);
1718         sample.raw_data = perf_synth__raw_data(&raw);
1719
1720         return intel_pt_deliver_synth_event(pt, event, &sample,
1721                                             pt->pwr_events_sample_type);
1722 }
1723
1724 static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
1725 {
1726         struct intel_pt *pt = ptq->pt;
1727         union perf_event *event = ptq->event_buf;
1728         struct perf_sample sample = { .ip = 0, };
1729         struct perf_synth_intel_pwrx raw;
1730
1731         if (intel_pt_skip_event(pt))
1732                 return 0;
1733
1734         intel_pt_prep_p_sample(pt, ptq, event, &sample);
1735
1736         sample.id = ptq->pt->pwrx_id;
1737         sample.stream_id = ptq->pt->pwrx_id;
1738
1739         raw.reserved = 0;
1740         raw.payload = cpu_to_le64(ptq->state->pwrx_payload);
1741
1742         sample.raw_size = perf_synth__raw_size(raw);
1743         sample.raw_data = perf_synth__raw_data(&raw);
1744
1745         return intel_pt_deliver_synth_event(pt, event, &sample,
1746                                             pt->pwr_events_sample_type);
1747 }
1748
1749 /*
1750  * PEBS gp_regs array indexes plus 1 so that 0 means not present. Refer
1751  * intel_pt_add_gp_regs().
1752  */
1753 static const int pebs_gp_regs[] = {
1754         [PERF_REG_X86_FLAGS]    = 1,
1755         [PERF_REG_X86_IP]       = 2,
1756         [PERF_REG_X86_AX]       = 3,
1757         [PERF_REG_X86_CX]       = 4,
1758         [PERF_REG_X86_DX]       = 5,
1759         [PERF_REG_X86_BX]       = 6,
1760         [PERF_REG_X86_SP]       = 7,
1761         [PERF_REG_X86_BP]       = 8,
1762         [PERF_REG_X86_SI]       = 9,
1763         [PERF_REG_X86_DI]       = 10,
1764         [PERF_REG_X86_R8]       = 11,
1765         [PERF_REG_X86_R9]       = 12,
1766         [PERF_REG_X86_R10]      = 13,
1767         [PERF_REG_X86_R11]      = 14,
1768         [PERF_REG_X86_R12]      = 15,
1769         [PERF_REG_X86_R13]      = 16,
1770         [PERF_REG_X86_R14]      = 17,
1771         [PERF_REG_X86_R15]      = 18,
1772 };
1773
1774 static u64 *intel_pt_add_gp_regs(struct regs_dump *intr_regs, u64 *pos,
1775                                  const struct intel_pt_blk_items *items,
1776                                  u64 regs_mask)
1777 {
1778         const u64 *gp_regs = items->val[INTEL_PT_GP_REGS_POS];
1779         u32 mask = items->mask[INTEL_PT_GP_REGS_POS];
1780         u32 bit;
1781         int i;
1782
1783         for (i = 0, bit = 1; i < PERF_REG_X86_64_MAX; i++, bit <<= 1) {
1784                 /* Get the PEBS gp_regs array index */
1785                 int n = pebs_gp_regs[i] - 1;
1786
1787                 if (n < 0)
1788                         continue;
1789                 /*
1790                  * Add only registers that were requested (i.e. 'regs_mask') and
1791                  * that were provided (i.e. 'mask'), and update the resulting
1792                  * mask (i.e. 'intr_regs->mask') accordingly.
1793                  */
1794                 if (mask & 1 << n && regs_mask & bit) {
1795                         intr_regs->mask |= bit;
1796                         *pos++ = gp_regs[n];
1797                 }
1798         }
1799
1800         return pos;
1801 }
1802
1803 #ifndef PERF_REG_X86_XMM0
1804 #define PERF_REG_X86_XMM0 32
1805 #endif
1806
1807 static void intel_pt_add_xmm(struct regs_dump *intr_regs, u64 *pos,
1808                              const struct intel_pt_blk_items *items,
1809                              u64 regs_mask)
1810 {
1811         u32 mask = items->has_xmm & (regs_mask >> PERF_REG_X86_XMM0);
1812         const u64 *xmm = items->xmm;
1813
1814         /*
1815          * If there are any XMM registers, then there should be all of them.
1816          * Nevertheless, follow the logic to add only registers that were
1817          * requested (i.e. 'regs_mask') and that were provided (i.e. 'mask'),
1818          * and update the resulting mask (i.e. 'intr_regs->mask') accordingly.
1819          */
1820         intr_regs->mask |= (u64)mask << PERF_REG_X86_XMM0;
1821
1822         for (; mask; mask >>= 1, xmm++) {
1823                 if (mask & 1)
1824                         *pos++ = *xmm;
1825         }
1826 }
1827
1828 #define LBR_INFO_MISPRED        (1ULL << 63)
1829 #define LBR_INFO_IN_TX          (1ULL << 62)
1830 #define LBR_INFO_ABORT          (1ULL << 61)
1831 #define LBR_INFO_CYCLES         0xffff
1832
1833 /* Refer kernel's intel_pmu_store_pebs_lbrs() */
1834 static u64 intel_pt_lbr_flags(u64 info)
1835 {
1836         union {
1837                 struct branch_flags flags;
1838                 u64 result;
1839         } u;
1840
1841         u.result          = 0;
1842         u.flags.mispred   = !!(info & LBR_INFO_MISPRED);
1843         u.flags.predicted = !(info & LBR_INFO_MISPRED);
1844         u.flags.in_tx     = !!(info & LBR_INFO_IN_TX);
1845         u.flags.abort     = !!(info & LBR_INFO_ABORT);
1846         u.flags.cycles    = info & LBR_INFO_CYCLES;
1847
1848         return u.result;
1849 }
1850
1851 static void intel_pt_add_lbrs(struct branch_stack *br_stack,
1852                               const struct intel_pt_blk_items *items)
1853 {
1854         u64 *to;
1855         int i;
1856
1857         br_stack->nr = 0;
1858
1859         to = &br_stack->entries[0].from;
1860
1861         for (i = INTEL_PT_LBR_0_POS; i <= INTEL_PT_LBR_2_POS; i++) {
1862                 u32 mask = items->mask[i];
1863                 const u64 *from = items->val[i];
1864
1865                 for (; mask; mask >>= 3, from += 3) {
1866                         if ((mask & 7) == 7) {
1867                                 *to++ = from[0];
1868                                 *to++ = from[1];
1869                                 *to++ = intel_pt_lbr_flags(from[2]);
1870                                 br_stack->nr += 1;
1871                         }
1872                 }
1873         }
1874 }
1875
1876 static int intel_pt_synth_pebs_sample(struct intel_pt_queue *ptq)
1877 {
1878         const struct intel_pt_blk_items *items = &ptq->state->items;
1879         struct perf_sample sample = { .ip = 0, };
1880         union perf_event *event = ptq->event_buf;
1881         struct intel_pt *pt = ptq->pt;
1882         struct evsel *evsel = pt->pebs_evsel;
1883         u64 sample_type = evsel->core.attr.sample_type;
1884         u64 id = evsel->core.id[0];
1885         u8 cpumode;
1886         u64 regs[8 * sizeof(sample.intr_regs.mask)];
1887
1888         if (intel_pt_skip_event(pt))
1889                 return 0;
1890
1891         intel_pt_prep_a_sample(ptq, event, &sample);
1892
1893         sample.id = id;
1894         sample.stream_id = id;
1895
1896         if (!evsel->core.attr.freq)
1897                 sample.period = evsel->core.attr.sample_period;
1898
1899         /* No support for non-zero CS base */
1900         if (items->has_ip)
1901                 sample.ip = items->ip;
1902         else if (items->has_rip)
1903                 sample.ip = items->rip;
1904         else
1905                 sample.ip = ptq->state->from_ip;
1906
1907         cpumode = intel_pt_cpumode(ptq, sample.ip, 0);
1908
1909         event->sample.header.misc = cpumode | PERF_RECORD_MISC_EXACT_IP;
1910
1911         sample.cpumode = cpumode;
1912
1913         if (sample_type & PERF_SAMPLE_TIME) {
1914                 u64 timestamp = 0;
1915
1916                 if (items->has_timestamp)
1917                         timestamp = items->timestamp;
1918                 else if (!pt->timeless_decoding)
1919                         timestamp = ptq->timestamp;
1920                 if (timestamp)
1921                         sample.time = tsc_to_perf_time(timestamp, &pt->tc);
1922         }
1923
1924         if (sample_type & PERF_SAMPLE_CALLCHAIN &&
1925             pt->synth_opts.callchain) {
1926                 thread_stack__sample(ptq->thread, ptq->cpu, ptq->chain,
1927                                      pt->synth_opts.callchain_sz, sample.ip,
1928                                      pt->kernel_start);
1929                 sample.callchain = ptq->chain;
1930         }
1931
1932         if (sample_type & PERF_SAMPLE_REGS_INTR &&
1933             (items->mask[INTEL_PT_GP_REGS_POS] ||
1934              items->mask[INTEL_PT_XMM_POS])) {
1935                 u64 regs_mask = evsel->core.attr.sample_regs_intr;
1936                 u64 *pos;
1937
1938                 sample.intr_regs.abi = items->is_32_bit ?
1939                                        PERF_SAMPLE_REGS_ABI_32 :
1940                                        PERF_SAMPLE_REGS_ABI_64;
1941                 sample.intr_regs.regs = regs;
1942
1943                 pos = intel_pt_add_gp_regs(&sample.intr_regs, regs, items, regs_mask);
1944
1945                 intel_pt_add_xmm(&sample.intr_regs, pos, items, regs_mask);
1946         }
1947
1948         if (sample_type & PERF_SAMPLE_BRANCH_STACK) {
1949                 if (items->mask[INTEL_PT_LBR_0_POS] ||
1950                     items->mask[INTEL_PT_LBR_1_POS] ||
1951                     items->mask[INTEL_PT_LBR_2_POS]) {
1952                         intel_pt_add_lbrs(ptq->last_branch, items);
1953                 } else if (pt->synth_opts.last_branch) {
1954                         thread_stack__br_sample(ptq->thread, ptq->cpu,
1955                                                 ptq->last_branch,
1956                                                 pt->br_stack_sz);
1957                 } else {
1958                         ptq->last_branch->nr = 0;
1959                 }
1960                 sample.branch_stack = ptq->last_branch;
1961         }
1962
1963         if (sample_type & PERF_SAMPLE_ADDR && items->has_mem_access_address)
1964                 sample.addr = items->mem_access_address;
1965
1966         if (sample_type & PERF_SAMPLE_WEIGHT_TYPE) {
1967                 /*
1968                  * Refer kernel's setup_pebs_adaptive_sample_data() and
1969                  * intel_hsw_weight().
1970                  */
1971                 if (items->has_mem_access_latency) {
1972                         u64 weight = items->mem_access_latency >> 32;
1973
1974                         /*
1975                          * Starts from SPR, the mem access latency field
1976                          * contains both cache latency [47:32] and instruction
1977                          * latency [15:0]. The cache latency is the same as the
1978                          * mem access latency on previous platforms.
1979                          *
1980                          * In practice, no memory access could last than 4G
1981                          * cycles. Use latency >> 32 to distinguish the
1982                          * different format of the mem access latency field.
1983                          */
1984                         if (weight > 0) {
1985                                 sample.weight = weight & 0xffff;
1986                                 sample.ins_lat = items->mem_access_latency & 0xffff;
1987                         } else
1988                                 sample.weight = items->mem_access_latency;
1989                 }
1990                 if (!sample.weight && items->has_tsx_aux_info) {
1991                         /* Cycles last block */
1992                         sample.weight = (u32)items->tsx_aux_info;
1993                 }
1994         }
1995
1996         if (sample_type & PERF_SAMPLE_TRANSACTION && items->has_tsx_aux_info) {
1997                 u64 ax = items->has_rax ? items->rax : 0;
1998                 /* Refer kernel's intel_hsw_transaction() */
1999                 u64 txn = (u8)(items->tsx_aux_info >> 32);
2000
2001                 /* For RTM XABORTs also log the abort code from AX */
2002                 if (txn & PERF_TXN_TRANSACTION && ax & 1)
2003                         txn |= ((ax >> 24) & 0xff) << PERF_TXN_ABORT_SHIFT;
2004                 sample.transaction = txn;
2005         }
2006
2007         return intel_pt_deliver_synth_event(pt, event, &sample, sample_type);
2008 }
2009
2010 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
2011                                 pid_t pid, pid_t tid, u64 ip, u64 timestamp)
2012 {
2013         union perf_event event;
2014         char msg[MAX_AUXTRACE_ERROR_MSG];
2015         int err;
2016
2017         if (pt->synth_opts.error_minus_flags) {
2018                 if (code == INTEL_PT_ERR_OVR &&
2019                     pt->synth_opts.error_minus_flags & AUXTRACE_ERR_FLG_OVERFLOW)
2020                         return 0;
2021                 if (code == INTEL_PT_ERR_LOST &&
2022                     pt->synth_opts.error_minus_flags & AUXTRACE_ERR_FLG_DATA_LOST)
2023                         return 0;
2024         }
2025
2026         intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
2027
2028         auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
2029                              code, cpu, pid, tid, ip, msg, timestamp);
2030
2031         err = perf_session__deliver_synth_event(pt->session, &event, NULL);
2032         if (err)
2033                 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
2034                        err);
2035
2036         return err;
2037 }
2038
2039 static int intel_ptq_synth_error(struct intel_pt_queue *ptq,
2040                                  const struct intel_pt_state *state)
2041 {
2042         struct intel_pt *pt = ptq->pt;
2043         u64 tm = ptq->timestamp;
2044
2045         tm = pt->timeless_decoding ? 0 : tsc_to_perf_time(tm, &pt->tc);
2046
2047         return intel_pt_synth_error(pt, state->err, ptq->cpu, ptq->pid,
2048                                     ptq->tid, state->from_ip, tm);
2049 }
2050
2051 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
2052 {
2053         struct auxtrace_queue *queue;
2054         pid_t tid = ptq->next_tid;
2055         int err;
2056
2057         if (tid == -1)
2058                 return 0;
2059
2060         intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
2061
2062         err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
2063
2064         queue = &pt->queues.queue_array[ptq->queue_nr];
2065         intel_pt_set_pid_tid_cpu(pt, queue);
2066
2067         ptq->next_tid = -1;
2068
2069         return err;
2070 }
2071
2072 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
2073 {
2074         struct intel_pt *pt = ptq->pt;
2075
2076         return ip == pt->switch_ip &&
2077                (ptq->flags & PERF_IP_FLAG_BRANCH) &&
2078                !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
2079                                PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
2080 }
2081
2082 #define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
2083                           INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT)
2084
2085 static int intel_pt_sample(struct intel_pt_queue *ptq)
2086 {
2087         const struct intel_pt_state *state = ptq->state;
2088         struct intel_pt *pt = ptq->pt;
2089         int err;
2090
2091         if (!ptq->have_sample)
2092                 return 0;
2093
2094         ptq->have_sample = false;
2095
2096         ptq->ipc_insn_cnt = ptq->state->tot_insn_cnt;
2097         ptq->ipc_cyc_cnt = ptq->state->tot_cyc_cnt;
2098
2099         /*
2100          * Do PEBS first to allow for the possibility that the PEBS timestamp
2101          * precedes the current timestamp.
2102          */
2103         if (pt->sample_pebs && state->type & INTEL_PT_BLK_ITEMS) {
2104                 err = intel_pt_synth_pebs_sample(ptq);
2105                 if (err)
2106                         return err;
2107         }
2108
2109         if (pt->sample_pwr_events) {
2110                 if (state->type & INTEL_PT_PSB_EVT) {
2111                         err = intel_pt_synth_psb_sample(ptq);
2112                         if (err)
2113                                 return err;
2114                 }
2115                 if (ptq->state->cbr != ptq->cbr_seen) {
2116                         err = intel_pt_synth_cbr_sample(ptq);
2117                         if (err)
2118                                 return err;
2119                 }
2120                 if (state->type & INTEL_PT_PWR_EVT) {
2121                         if (state->type & INTEL_PT_MWAIT_OP) {
2122                                 err = intel_pt_synth_mwait_sample(ptq);
2123                                 if (err)
2124                                         return err;
2125                         }
2126                         if (state->type & INTEL_PT_PWR_ENTRY) {
2127                                 err = intel_pt_synth_pwre_sample(ptq);
2128                                 if (err)
2129                                         return err;
2130                         }
2131                         if (state->type & INTEL_PT_EX_STOP) {
2132                                 err = intel_pt_synth_exstop_sample(ptq);
2133                                 if (err)
2134                                         return err;
2135                         }
2136                         if (state->type & INTEL_PT_PWR_EXIT) {
2137                                 err = intel_pt_synth_pwrx_sample(ptq);
2138                                 if (err)
2139                                         return err;
2140                         }
2141                 }
2142         }
2143
2144         if (pt->sample_instructions && (state->type & INTEL_PT_INSTRUCTION)) {
2145                 err = intel_pt_synth_instruction_sample(ptq);
2146                 if (err)
2147                         return err;
2148         }
2149
2150         if (pt->sample_transactions && (state->type & INTEL_PT_TRANSACTION)) {
2151                 err = intel_pt_synth_transaction_sample(ptq);
2152                 if (err)
2153                         return err;
2154         }
2155
2156         if (pt->sample_ptwrites && (state->type & INTEL_PT_PTW)) {
2157                 err = intel_pt_synth_ptwrite_sample(ptq);
2158                 if (err)
2159                         return err;
2160         }
2161
2162         if (!(state->type & INTEL_PT_BRANCH))
2163                 return 0;
2164
2165         if (pt->use_thread_stack) {
2166                 thread_stack__event(ptq->thread, ptq->cpu, ptq->flags,
2167                                     state->from_ip, state->to_ip, ptq->insn_len,
2168                                     state->trace_nr, pt->callstack,
2169                                     pt->br_stack_sz_plus,
2170                                     pt->mispred_all);
2171         } else {
2172                 thread_stack__set_trace_nr(ptq->thread, ptq->cpu, state->trace_nr);
2173         }
2174
2175         if (pt->sample_branches) {
2176                 if (state->from_nr != state->to_nr &&
2177                     state->from_ip && state->to_ip) {
2178                         struct intel_pt_state *st = (struct intel_pt_state *)state;
2179                         u64 to_ip = st->to_ip;
2180                         u64 from_ip = st->from_ip;
2181
2182                         /*
2183                          * perf cannot handle having different machines for ip
2184                          * and addr, so create 2 branches.
2185                          */
2186                         st->to_ip = 0;
2187                         err = intel_pt_synth_branch_sample(ptq);
2188                         if (err)
2189                                 return err;
2190                         st->from_ip = 0;
2191                         st->to_ip = to_ip;
2192                         err = intel_pt_synth_branch_sample(ptq);
2193                         st->from_ip = from_ip;
2194                 } else {
2195                         err = intel_pt_synth_branch_sample(ptq);
2196                 }
2197                 if (err)
2198                         return err;
2199         }
2200
2201         if (!ptq->sync_switch)
2202                 return 0;
2203
2204         if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
2205                 switch (ptq->switch_state) {
2206                 case INTEL_PT_SS_NOT_TRACING:
2207                 case INTEL_PT_SS_UNKNOWN:
2208                 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
2209                         err = intel_pt_next_tid(pt, ptq);
2210                         if (err)
2211                                 return err;
2212                         ptq->switch_state = INTEL_PT_SS_TRACING;
2213                         break;
2214                 default:
2215                         ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
2216                         return 1;
2217                 }
2218         } else if (!state->to_ip) {
2219                 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
2220         } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
2221                 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
2222         } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
2223                    state->to_ip == pt->ptss_ip &&
2224                    (ptq->flags & PERF_IP_FLAG_CALL)) {
2225                 ptq->switch_state = INTEL_PT_SS_TRACING;
2226         }
2227
2228         return 0;
2229 }
2230
2231 static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
2232 {
2233         struct machine *machine = pt->machine;
2234         struct map *map;
2235         struct symbol *sym, *start;
2236         u64 ip, switch_ip = 0;
2237         const char *ptss;
2238
2239         if (ptss_ip)
2240                 *ptss_ip = 0;
2241
2242         map = machine__kernel_map(machine);
2243         if (!map)
2244                 return 0;
2245
2246         if (map__load(map))
2247                 return 0;
2248
2249         start = dso__first_symbol(map->dso);
2250
2251         for (sym = start; sym; sym = dso__next_symbol(sym)) {
2252                 if (sym->binding == STB_GLOBAL &&
2253                     !strcmp(sym->name, "__switch_to")) {
2254                         ip = map->unmap_ip(map, sym->start);
2255                         if (ip >= map->start && ip < map->end) {
2256                                 switch_ip = ip;
2257                                 break;
2258                         }
2259                 }
2260         }
2261
2262         if (!switch_ip || !ptss_ip)
2263                 return 0;
2264
2265         if (pt->have_sched_switch == 1)
2266                 ptss = "perf_trace_sched_switch";
2267         else
2268                 ptss = "__perf_event_task_sched_out";
2269
2270         for (sym = start; sym; sym = dso__next_symbol(sym)) {
2271                 if (!strcmp(sym->name, ptss)) {
2272                         ip = map->unmap_ip(map, sym->start);
2273                         if (ip >= map->start && ip < map->end) {
2274                                 *ptss_ip = ip;
2275                                 break;
2276                         }
2277                 }
2278         }
2279
2280         return switch_ip;
2281 }
2282
2283 static void intel_pt_enable_sync_switch(struct intel_pt *pt)
2284 {
2285         unsigned int i;
2286
2287         pt->sync_switch = true;
2288
2289         for (i = 0; i < pt->queues.nr_queues; i++) {
2290                 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
2291                 struct intel_pt_queue *ptq = queue->priv;
2292
2293                 if (ptq)
2294                         ptq->sync_switch = true;
2295         }
2296 }
2297
2298 /*
2299  * To filter against time ranges, it is only necessary to look at the next start
2300  * or end time.
2301  */
2302 static bool intel_pt_next_time(struct intel_pt_queue *ptq)
2303 {
2304         struct intel_pt *pt = ptq->pt;
2305
2306         if (ptq->sel_start) {
2307                 /* Next time is an end time */
2308                 ptq->sel_start = false;
2309                 ptq->sel_timestamp = pt->time_ranges[ptq->sel_idx].end;
2310                 return true;
2311         } else if (ptq->sel_idx + 1 < pt->range_cnt) {
2312                 /* Next time is a start time */
2313                 ptq->sel_start = true;
2314                 ptq->sel_idx += 1;
2315                 ptq->sel_timestamp = pt->time_ranges[ptq->sel_idx].start;
2316                 return true;
2317         }
2318
2319         /* No next time */
2320         return false;
2321 }
2322
2323 static int intel_pt_time_filter(struct intel_pt_queue *ptq, u64 *ff_timestamp)
2324 {
2325         int err;
2326
2327         while (1) {
2328                 if (ptq->sel_start) {
2329                         if (ptq->timestamp >= ptq->sel_timestamp) {
2330                                 /* After start time, so consider next time */
2331                                 intel_pt_next_time(ptq);
2332                                 if (!ptq->sel_timestamp) {
2333                                         /* No end time */
2334                                         return 0;
2335                                 }
2336                                 /* Check against end time */
2337                                 continue;
2338                         }
2339                         /* Before start time, so fast forward */
2340                         ptq->have_sample = false;
2341                         if (ptq->sel_timestamp > *ff_timestamp) {
2342                                 if (ptq->sync_switch) {
2343                                         intel_pt_next_tid(ptq->pt, ptq);
2344                                         ptq->switch_state = INTEL_PT_SS_UNKNOWN;
2345                                 }
2346                                 *ff_timestamp = ptq->sel_timestamp;
2347                                 err = intel_pt_fast_forward(ptq->decoder,
2348                                                             ptq->sel_timestamp);
2349                                 if (err)
2350                                         return err;
2351                         }
2352                         return 0;
2353                 } else if (ptq->timestamp > ptq->sel_timestamp) {
2354                         /* After end time, so consider next time */
2355                         if (!intel_pt_next_time(ptq)) {
2356                                 /* No next time range, so stop decoding */
2357                                 ptq->have_sample = false;
2358                                 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
2359                                 return 1;
2360                         }
2361                         /* Check against next start time */
2362                         continue;
2363                 } else {
2364                         /* Before end time */
2365                         return 0;
2366                 }
2367         }
2368 }
2369
2370 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
2371 {
2372         const struct intel_pt_state *state = ptq->state;
2373         struct intel_pt *pt = ptq->pt;
2374         u64 ff_timestamp = 0;
2375         int err;
2376
2377         if (!pt->kernel_start) {
2378                 pt->kernel_start = machine__kernel_start(pt->machine);
2379                 if (pt->per_cpu_mmaps &&
2380                     (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
2381                     !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
2382                     !pt->sampling_mode) {
2383                         pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
2384                         if (pt->switch_ip) {
2385                                 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
2386                                              pt->switch_ip, pt->ptss_ip);
2387                                 intel_pt_enable_sync_switch(pt);
2388                         }
2389                 }
2390         }
2391
2392         intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
2393                      ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
2394         while (1) {
2395                 err = intel_pt_sample(ptq);
2396                 if (err)
2397                         return err;
2398
2399                 state = intel_pt_decode(ptq->decoder);
2400                 if (state->err) {
2401                         if (state->err == INTEL_PT_ERR_NODATA)
2402                                 return 1;
2403                         if (ptq->sync_switch &&
2404                             state->from_ip >= pt->kernel_start) {
2405                                 ptq->sync_switch = false;
2406                                 intel_pt_next_tid(pt, ptq);
2407                         }
2408                         if (pt->synth_opts.errors) {
2409                                 err = intel_ptq_synth_error(ptq, state);
2410                                 if (err)
2411                                         return err;
2412                         }
2413                         continue;
2414                 }
2415
2416                 ptq->state = state;
2417                 ptq->have_sample = true;
2418                 intel_pt_sample_flags(ptq);
2419
2420                 /* Use estimated TSC upon return to user space */
2421                 if (pt->est_tsc &&
2422                     (state->from_ip >= pt->kernel_start || !state->from_ip) &&
2423                     state->to_ip && state->to_ip < pt->kernel_start) {
2424                         intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
2425                                      state->timestamp, state->est_timestamp);
2426                         ptq->timestamp = state->est_timestamp;
2427                 /* Use estimated TSC in unknown switch state */
2428                 } else if (ptq->sync_switch &&
2429                            ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
2430                            intel_pt_is_switch_ip(ptq, state->to_ip) &&
2431                            ptq->next_tid == -1) {
2432                         intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
2433                                      state->timestamp, state->est_timestamp);
2434                         ptq->timestamp = state->est_timestamp;
2435                 } else if (state->timestamp > ptq->timestamp) {
2436                         ptq->timestamp = state->timestamp;
2437                 }
2438
2439                 if (ptq->sel_timestamp) {
2440                         err = intel_pt_time_filter(ptq, &ff_timestamp);
2441                         if (err)
2442                                 return err;
2443                 }
2444
2445                 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
2446                         *timestamp = ptq->timestamp;
2447                         return 0;
2448                 }
2449         }
2450         return 0;
2451 }
2452
2453 static inline int intel_pt_update_queues(struct intel_pt *pt)
2454 {
2455         if (pt->queues.new_data) {
2456                 pt->queues.new_data = false;
2457                 return intel_pt_setup_queues(pt);
2458         }
2459         return 0;
2460 }
2461
2462 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
2463 {
2464         unsigned int queue_nr;
2465         u64 ts;
2466         int ret;
2467
2468         while (1) {
2469                 struct auxtrace_queue *queue;
2470                 struct intel_pt_queue *ptq;
2471
2472                 if (!pt->heap.heap_cnt)
2473                         return 0;
2474
2475                 if (pt->heap.heap_array[0].ordinal >= timestamp)
2476                         return 0;
2477
2478                 queue_nr = pt->heap.heap_array[0].queue_nr;
2479                 queue = &pt->queues.queue_array[queue_nr];
2480                 ptq = queue->priv;
2481
2482                 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
2483                              queue_nr, pt->heap.heap_array[0].ordinal,
2484                              timestamp);
2485
2486                 auxtrace_heap__pop(&pt->heap);
2487
2488                 if (pt->heap.heap_cnt) {
2489                         ts = pt->heap.heap_array[0].ordinal + 1;
2490                         if (ts > timestamp)
2491                                 ts = timestamp;
2492                 } else {
2493                         ts = timestamp;
2494                 }
2495
2496                 intel_pt_set_pid_tid_cpu(pt, queue);
2497
2498                 ret = intel_pt_run_decoder(ptq, &ts);
2499
2500                 if (ret < 0) {
2501                         auxtrace_heap__add(&pt->heap, queue_nr, ts);
2502                         return ret;
2503                 }
2504
2505                 if (!ret) {
2506                         ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
2507                         if (ret < 0)
2508                                 return ret;
2509                 } else {
2510                         ptq->on_heap = false;
2511                 }
2512         }
2513
2514         return 0;
2515 }
2516
2517 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
2518                                             u64 time_)
2519 {
2520         struct auxtrace_queues *queues = &pt->queues;
2521         unsigned int i;
2522         u64 ts = 0;
2523
2524         for (i = 0; i < queues->nr_queues; i++) {
2525                 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
2526                 struct intel_pt_queue *ptq = queue->priv;
2527
2528                 if (ptq && (tid == -1 || ptq->tid == tid)) {
2529                         ptq->time = time_;
2530                         intel_pt_set_pid_tid_cpu(pt, queue);
2531                         intel_pt_run_decoder(ptq, &ts);
2532                 }
2533         }
2534         return 0;
2535 }
2536
2537 static void intel_pt_sample_set_pid_tid_cpu(struct intel_pt_queue *ptq,
2538                                             struct auxtrace_queue *queue,
2539                                             struct perf_sample *sample)
2540 {
2541         struct machine *m = ptq->pt->machine;
2542
2543         ptq->pid = sample->pid;
2544         ptq->tid = sample->tid;
2545         ptq->cpu = queue->cpu;
2546
2547         intel_pt_log("queue %u cpu %d pid %d tid %d\n",
2548                      ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
2549
2550         thread__zput(ptq->thread);
2551
2552         if (ptq->tid == -1)
2553                 return;
2554
2555         if (ptq->pid == -1) {
2556                 ptq->thread = machine__find_thread(m, -1, ptq->tid);
2557                 if (ptq->thread)
2558                         ptq->pid = ptq->thread->pid_;
2559                 return;
2560         }
2561
2562         ptq->thread = machine__findnew_thread(m, ptq->pid, ptq->tid);
2563 }
2564
2565 static int intel_pt_process_timeless_sample(struct intel_pt *pt,
2566                                             struct perf_sample *sample)
2567 {
2568         struct auxtrace_queue *queue;
2569         struct intel_pt_queue *ptq;
2570         u64 ts = 0;
2571
2572         queue = auxtrace_queues__sample_queue(&pt->queues, sample, pt->session);
2573         if (!queue)
2574                 return -EINVAL;
2575
2576         ptq = queue->priv;
2577         if (!ptq)
2578                 return 0;
2579
2580         ptq->stop = false;
2581         ptq->time = sample->time;
2582         intel_pt_sample_set_pid_tid_cpu(ptq, queue, sample);
2583         intel_pt_run_decoder(ptq, &ts);
2584         return 0;
2585 }
2586
2587 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
2588 {
2589         return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
2590                                     sample->pid, sample->tid, 0, sample->time);
2591 }
2592
2593 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
2594 {
2595         unsigned i, j;
2596
2597         if (cpu < 0 || !pt->queues.nr_queues)
2598                 return NULL;
2599
2600         if ((unsigned)cpu >= pt->queues.nr_queues)
2601                 i = pt->queues.nr_queues - 1;
2602         else
2603                 i = cpu;
2604
2605         if (pt->queues.queue_array[i].cpu == cpu)
2606                 return pt->queues.queue_array[i].priv;
2607
2608         for (j = 0; i > 0; j++) {
2609                 if (pt->queues.queue_array[--i].cpu == cpu)
2610                         return pt->queues.queue_array[i].priv;
2611         }
2612
2613         for (; j < pt->queues.nr_queues; j++) {
2614                 if (pt->queues.queue_array[j].cpu == cpu)
2615                         return pt->queues.queue_array[j].priv;
2616         }
2617
2618         return NULL;
2619 }
2620
2621 static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
2622                                 u64 timestamp)
2623 {
2624         struct intel_pt_queue *ptq;
2625         int err;
2626
2627         if (!pt->sync_switch)
2628                 return 1;
2629
2630         ptq = intel_pt_cpu_to_ptq(pt, cpu);
2631         if (!ptq || !ptq->sync_switch)
2632                 return 1;
2633
2634         switch (ptq->switch_state) {
2635         case INTEL_PT_SS_NOT_TRACING:
2636                 break;
2637         case INTEL_PT_SS_UNKNOWN:
2638         case INTEL_PT_SS_TRACING:
2639                 ptq->next_tid = tid;
2640                 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
2641                 return 0;
2642         case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
2643                 if (!ptq->on_heap) {
2644                         ptq->timestamp = perf_time_to_tsc(timestamp,
2645                                                           &pt->tc);
2646                         err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
2647                                                  ptq->timestamp);
2648                         if (err)
2649                                 return err;
2650                         ptq->on_heap = true;
2651                 }
2652                 ptq->switch_state = INTEL_PT_SS_TRACING;
2653                 break;
2654         case INTEL_PT_SS_EXPECTING_SWITCH_IP:
2655                 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
2656                 break;
2657         default:
2658                 break;
2659         }
2660
2661         ptq->next_tid = -1;
2662
2663         return 1;
2664 }
2665
2666 static int intel_pt_process_switch(struct intel_pt *pt,
2667                                    struct perf_sample *sample)
2668 {
2669         pid_t tid;
2670         int cpu, ret;
2671         struct evsel *evsel = evlist__id2evsel(pt->session->evlist, sample->id);
2672
2673         if (evsel != pt->switch_evsel)
2674                 return 0;
2675
2676         tid = evsel__intval(evsel, sample, "next_pid");
2677         cpu = sample->cpu;
2678
2679         intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
2680                      cpu, tid, sample->time, perf_time_to_tsc(sample->time,
2681                      &pt->tc));
2682
2683         ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
2684         if (ret <= 0)
2685                 return ret;
2686
2687         return machine__set_current_tid(pt->machine, cpu, -1, tid);
2688 }
2689
2690 static int intel_pt_context_switch_in(struct intel_pt *pt,
2691                                       struct perf_sample *sample)
2692 {
2693         pid_t pid = sample->pid;
2694         pid_t tid = sample->tid;
2695         int cpu = sample->cpu;
2696
2697         if (pt->sync_switch) {
2698                 struct intel_pt_queue *ptq;
2699
2700                 ptq = intel_pt_cpu_to_ptq(pt, cpu);
2701                 if (ptq && ptq->sync_switch) {
2702                         ptq->next_tid = -1;
2703                         switch (ptq->switch_state) {
2704                         case INTEL_PT_SS_NOT_TRACING:
2705                         case INTEL_PT_SS_UNKNOWN:
2706                         case INTEL_PT_SS_TRACING:
2707                                 break;
2708                         case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
2709                         case INTEL_PT_SS_EXPECTING_SWITCH_IP:
2710                                 ptq->switch_state = INTEL_PT_SS_TRACING;
2711                                 break;
2712                         default:
2713                                 break;
2714                         }
2715                 }
2716         }
2717
2718         /*
2719          * If the current tid has not been updated yet, ensure it is now that
2720          * a "switch in" event has occurred.
2721          */
2722         if (machine__get_current_tid(pt->machine, cpu) == tid)
2723                 return 0;
2724
2725         return machine__set_current_tid(pt->machine, cpu, pid, tid);
2726 }
2727
2728 static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
2729                                    struct perf_sample *sample)
2730 {
2731         bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
2732         pid_t pid, tid;
2733         int cpu, ret;
2734
2735         cpu = sample->cpu;
2736
2737         if (pt->have_sched_switch == 3) {
2738                 if (!out)
2739                         return intel_pt_context_switch_in(pt, sample);
2740                 if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
2741                         pr_err("Expecting CPU-wide context switch event\n");
2742                         return -EINVAL;
2743                 }
2744                 pid = event->context_switch.next_prev_pid;
2745                 tid = event->context_switch.next_prev_tid;
2746         } else {
2747                 if (out)
2748                         return 0;
2749                 pid = sample->pid;
2750                 tid = sample->tid;
2751         }
2752
2753         if (tid == -1)
2754                 intel_pt_log("context_switch event has no tid\n");
2755
2756         ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
2757         if (ret <= 0)
2758                 return ret;
2759
2760         return machine__set_current_tid(pt->machine, cpu, pid, tid);
2761 }
2762
2763 static int intel_pt_process_itrace_start(struct intel_pt *pt,
2764                                          union perf_event *event,
2765                                          struct perf_sample *sample)
2766 {
2767         if (!pt->per_cpu_mmaps)
2768                 return 0;
2769
2770         intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
2771                      sample->cpu, event->itrace_start.pid,
2772                      event->itrace_start.tid, sample->time,
2773                      perf_time_to_tsc(sample->time, &pt->tc));
2774
2775         return machine__set_current_tid(pt->machine, sample->cpu,
2776                                         event->itrace_start.pid,
2777                                         event->itrace_start.tid);
2778 }
2779
2780 static int intel_pt_find_map(struct thread *thread, u8 cpumode, u64 addr,
2781                              struct addr_location *al)
2782 {
2783         if (!al->map || addr < al->map->start || addr >= al->map->end) {
2784                 if (!thread__find_map(thread, cpumode, addr, al))
2785                         return -1;
2786         }
2787
2788         return 0;
2789 }
2790
2791 /* Invalidate all instruction cache entries that overlap the text poke */
2792 static int intel_pt_text_poke(struct intel_pt *pt, union perf_event *event)
2793 {
2794         u8 cpumode = event->header.misc & PERF_RECORD_MISC_CPUMODE_MASK;
2795         u64 addr = event->text_poke.addr + event->text_poke.new_len - 1;
2796         /* Assume text poke begins in a basic block no more than 4096 bytes */
2797         int cnt = 4096 + event->text_poke.new_len;
2798         struct thread *thread = pt->unknown_thread;
2799         struct addr_location al = { .map = NULL };
2800         struct machine *machine = pt->machine;
2801         struct intel_pt_cache_entry *e;
2802         u64 offset;
2803
2804         if (!event->text_poke.new_len)
2805                 return 0;
2806
2807         for (; cnt; cnt--, addr--) {
2808                 if (intel_pt_find_map(thread, cpumode, addr, &al)) {
2809                         if (addr < event->text_poke.addr)
2810                                 return 0;
2811                         continue;
2812                 }
2813
2814                 if (!al.map->dso || !al.map->dso->auxtrace_cache)
2815                         continue;
2816
2817                 offset = al.map->map_ip(al.map, addr);
2818
2819                 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
2820                 if (!e)
2821                         continue;
2822
2823                 if (addr + e->byte_cnt + e->length <= event->text_poke.addr) {
2824                         /*
2825                          * No overlap. Working backwards there cannot be another
2826                          * basic block that overlaps the text poke if there is a
2827                          * branch instruction before the text poke address.
2828                          */
2829                         if (e->branch != INTEL_PT_BR_NO_BRANCH)
2830                                 return 0;
2831                 } else {
2832                         intel_pt_cache_invalidate(al.map->dso, machine, offset);
2833                         intel_pt_log("Invalidated instruction cache for %s at %#"PRIx64"\n",
2834                                      al.map->dso->long_name, addr);
2835                 }
2836         }
2837
2838         return 0;
2839 }
2840
2841 static int intel_pt_process_event(struct perf_session *session,
2842                                   union perf_event *event,
2843                                   struct perf_sample *sample,
2844                                   struct perf_tool *tool)
2845 {
2846         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2847                                            auxtrace);
2848         u64 timestamp;
2849         int err = 0;
2850
2851         if (dump_trace)
2852                 return 0;
2853
2854         if (!tool->ordered_events) {
2855                 pr_err("Intel Processor Trace requires ordered events\n");
2856                 return -EINVAL;
2857         }
2858
2859         if (sample->time && sample->time != (u64)-1)
2860                 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
2861         else
2862                 timestamp = 0;
2863
2864         if (timestamp || pt->timeless_decoding) {
2865                 err = intel_pt_update_queues(pt);
2866                 if (err)
2867                         return err;
2868         }
2869
2870         if (pt->timeless_decoding) {
2871                 if (pt->sampling_mode) {
2872                         if (sample->aux_sample.size)
2873                                 err = intel_pt_process_timeless_sample(pt,
2874                                                                        sample);
2875                 } else if (event->header.type == PERF_RECORD_EXIT) {
2876                         err = intel_pt_process_timeless_queues(pt,
2877                                                                event->fork.tid,
2878                                                                sample->time);
2879                 }
2880         } else if (timestamp) {
2881                 err = intel_pt_process_queues(pt, timestamp);
2882         }
2883         if (err)
2884                 return err;
2885
2886         if (event->header.type == PERF_RECORD_SAMPLE) {
2887                 if (pt->synth_opts.add_callchain && !sample->callchain)
2888                         intel_pt_add_callchain(pt, sample);
2889                 if (pt->synth_opts.add_last_branch && !sample->branch_stack)
2890                         intel_pt_add_br_stack(pt, sample);
2891         }
2892
2893         if (event->header.type == PERF_RECORD_AUX &&
2894             (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
2895             pt->synth_opts.errors) {
2896                 err = intel_pt_lost(pt, sample);
2897                 if (err)
2898                         return err;
2899         }
2900
2901         if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
2902                 err = intel_pt_process_switch(pt, sample);
2903         else if (event->header.type == PERF_RECORD_ITRACE_START)
2904                 err = intel_pt_process_itrace_start(pt, event, sample);
2905         else if (event->header.type == PERF_RECORD_SWITCH ||
2906                  event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
2907                 err = intel_pt_context_switch(pt, event, sample);
2908
2909         if (!err && event->header.type == PERF_RECORD_TEXT_POKE)
2910                 err = intel_pt_text_poke(pt, event);
2911
2912         if (intel_pt_enable_logging && intel_pt_log_events(pt, sample->time)) {
2913                 intel_pt_log("event %u: cpu %d time %"PRIu64" tsc %#"PRIx64" ",
2914                              event->header.type, sample->cpu, sample->time, timestamp);
2915                 intel_pt_log_event(event);
2916         }
2917
2918         return err;
2919 }
2920
2921 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
2922 {
2923         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2924                                            auxtrace);
2925         int ret;
2926
2927         if (dump_trace)
2928                 return 0;
2929
2930         if (!tool->ordered_events)
2931                 return -EINVAL;
2932
2933         ret = intel_pt_update_queues(pt);
2934         if (ret < 0)
2935                 return ret;
2936
2937         if (pt->timeless_decoding)
2938                 return intel_pt_process_timeless_queues(pt, -1,
2939                                                         MAX_TIMESTAMP - 1);
2940
2941         return intel_pt_process_queues(pt, MAX_TIMESTAMP);
2942 }
2943
2944 static void intel_pt_free_events(struct perf_session *session)
2945 {
2946         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2947                                            auxtrace);
2948         struct auxtrace_queues *queues = &pt->queues;
2949         unsigned int i;
2950
2951         for (i = 0; i < queues->nr_queues; i++) {
2952                 intel_pt_free_queue(queues->queue_array[i].priv);
2953                 queues->queue_array[i].priv = NULL;
2954         }
2955         intel_pt_log_disable();
2956         auxtrace_queues__free(queues);
2957 }
2958
2959 static void intel_pt_free(struct perf_session *session)
2960 {
2961         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2962                                            auxtrace);
2963
2964         auxtrace_heap__free(&pt->heap);
2965         intel_pt_free_events(session);
2966         session->auxtrace = NULL;
2967         thread__put(pt->unknown_thread);
2968         addr_filters__exit(&pt->filts);
2969         zfree(&pt->chain);
2970         zfree(&pt->filter);
2971         zfree(&pt->time_ranges);
2972         free(pt);
2973 }
2974
2975 static bool intel_pt_evsel_is_auxtrace(struct perf_session *session,
2976                                        struct evsel *evsel)
2977 {
2978         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2979                                            auxtrace);
2980
2981         return evsel->core.attr.type == pt->pmu_type;
2982 }
2983
2984 static int intel_pt_process_auxtrace_event(struct perf_session *session,
2985                                            union perf_event *event,
2986                                            struct perf_tool *tool __maybe_unused)
2987 {
2988         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2989                                            auxtrace);
2990
2991         if (!pt->data_queued) {
2992                 struct auxtrace_buffer *buffer;
2993                 off_t data_offset;
2994                 int fd = perf_data__fd(session->data);
2995                 int err;
2996
2997                 if (perf_data__is_pipe(session->data)) {
2998                         data_offset = 0;
2999                 } else {
3000                         data_offset = lseek(fd, 0, SEEK_CUR);
3001                         if (data_offset == -1)
3002                                 return -errno;
3003                 }
3004
3005                 err = auxtrace_queues__add_event(&pt->queues, session, event,
3006                                                  data_offset, &buffer);
3007                 if (err)
3008                         return err;
3009
3010                 /* Dump here now we have copied a piped trace out of the pipe */
3011                 if (dump_trace) {
3012                         if (auxtrace_buffer__get_data(buffer, fd)) {
3013                                 intel_pt_dump_event(pt, buffer->data,
3014                                                     buffer->size);
3015                                 auxtrace_buffer__put_data(buffer);
3016                         }
3017                 }
3018         }
3019
3020         return 0;
3021 }
3022
3023 static int intel_pt_queue_data(struct perf_session *session,
3024                                struct perf_sample *sample,
3025                                union perf_event *event, u64 data_offset)
3026 {
3027         struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
3028                                            auxtrace);
3029         u64 timestamp;
3030
3031         if (event) {
3032                 return auxtrace_queues__add_event(&pt->queues, session, event,
3033                                                   data_offset, NULL);
3034         }
3035
3036         if (sample->time && sample->time != (u64)-1)
3037                 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
3038         else
3039                 timestamp = 0;
3040
3041         return auxtrace_queues__add_sample(&pt->queues, session, sample,
3042                                            data_offset, timestamp);
3043 }
3044
3045 struct intel_pt_synth {
3046         struct perf_tool dummy_tool;
3047         struct perf_session *session;
3048 };
3049
3050 static int intel_pt_event_synth(struct perf_tool *tool,
3051                                 union perf_event *event,
3052                                 struct perf_sample *sample __maybe_unused,
3053                                 struct machine *machine __maybe_unused)
3054 {
3055         struct intel_pt_synth *intel_pt_synth =
3056                         container_of(tool, struct intel_pt_synth, dummy_tool);
3057
3058         return perf_session__deliver_synth_event(intel_pt_synth->session, event,
3059                                                  NULL);
3060 }
3061
3062 static int intel_pt_synth_event(struct perf_session *session, const char *name,
3063                                 struct perf_event_attr *attr, u64 id)
3064 {
3065         struct intel_pt_synth intel_pt_synth;
3066         int err;
3067
3068         pr_debug("Synthesizing '%s' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
3069                  name, id, (u64)attr->sample_type);
3070
3071         memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
3072         intel_pt_synth.session = session;
3073
3074         err = perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
3075                                           &id, intel_pt_event_synth);
3076         if (err)
3077                 pr_err("%s: failed to synthesize '%s' event type\n",
3078                        __func__, name);
3079
3080         return err;
3081 }
3082
3083 static void intel_pt_set_event_name(struct evlist *evlist, u64 id,
3084                                     const char *name)
3085 {
3086         struct evsel *evsel;
3087
3088         evlist__for_each_entry(evlist, evsel) {
3089                 if (evsel->core.id && evsel->core.id[0] == id) {
3090                         if (evsel->name)
3091                                 zfree(&evsel->name);
3092                         evsel->name = strdup(name);
3093                         break;
3094                 }
3095         }
3096 }
3097
3098 static struct evsel *intel_pt_evsel(struct intel_pt *pt,
3099                                          struct evlist *evlist)
3100 {
3101         struct evsel *evsel;
3102
3103         evlist__for_each_entry(evlist, evsel) {
3104                 if (evsel->core.attr.type == pt->pmu_type && evsel->core.ids)
3105                         return evsel;
3106         }
3107
3108         return NULL;
3109 }
3110
3111 static int intel_pt_synth_events(struct intel_pt *pt,
3112                                  struct perf_session *session)
3113 {
3114         struct evlist *evlist = session->evlist;
3115         struct evsel *evsel = intel_pt_evsel(pt, evlist);
3116         struct perf_event_attr attr;
3117         u64 id;
3118         int err;
3119
3120         if (!evsel) {
3121                 pr_debug("There are no selected events with Intel Processor Trace data\n");
3122                 return 0;
3123         }
3124
3125         memset(&attr, 0, sizeof(struct perf_event_attr));
3126         attr.size = sizeof(struct perf_event_attr);
3127         attr.type = PERF_TYPE_HARDWARE;
3128         attr.sample_type = evsel->core.attr.sample_type & PERF_SAMPLE_MASK;
3129         attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
3130                             PERF_SAMPLE_PERIOD;
3131         if (pt->timeless_decoding)
3132                 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
3133         else
3134                 attr.sample_type |= PERF_SAMPLE_TIME;
3135         if (!pt->per_cpu_mmaps)
3136                 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
3137         attr.exclude_user = evsel->core.attr.exclude_user;
3138         attr.exclude_kernel = evsel->core.attr.exclude_kernel;
3139         attr.exclude_hv = evsel->core.attr.exclude_hv;
3140         attr.exclude_host = evsel->core.attr.exclude_host;
3141         attr.exclude_guest = evsel->core.attr.exclude_guest;
3142         attr.sample_id_all = evsel->core.attr.sample_id_all;
3143         attr.read_format = evsel->core.attr.read_format;
3144
3145         id = evsel->core.id[0] + 1000000000;
3146         if (!id)
3147                 id = 1;
3148
3149         if (pt->synth_opts.branches) {
3150                 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
3151                 attr.sample_period = 1;
3152                 attr.sample_type |= PERF_SAMPLE_ADDR;
3153                 err = intel_pt_synth_event(session, "branches", &attr, id);
3154                 if (err)
3155                         return err;
3156                 pt->sample_branches = true;
3157                 pt->branches_sample_type = attr.sample_type;
3158                 pt->branches_id = id;
3159                 id += 1;
3160                 attr.sample_type &= ~(u64)PERF_SAMPLE_ADDR;
3161         }
3162
3163         if (pt->synth_opts.callchain)
3164                 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
3165         if (pt->synth_opts.last_branch) {
3166                 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
3167                 /*
3168                  * We don't use the hardware index, but the sample generation
3169                  * code uses the new format branch_stack with this field,
3170                  * so the event attributes must indicate that it's present.
3171                  */
3172                 attr.branch_sample_type |= PERF_SAMPLE_BRANCH_HW_INDEX;
3173         }
3174
3175         if (pt->synth_opts.instructions) {
3176                 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
3177                 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
3178                         attr.sample_period =
3179                                 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
3180                 else
3181                         attr.sample_period = pt->synth_opts.period;
3182                 err = intel_pt_synth_event(session, "instructions", &attr, id);
3183                 if (err)
3184                         return err;
3185                 pt->sample_instructions = true;
3186                 pt->instructions_sample_type = attr.sample_type;
3187                 pt->instructions_id = id;
3188                 id += 1;
3189         }
3190
3191         attr.sample_type &= ~(u64)PERF_SAMPLE_PERIOD;
3192         attr.sample_period = 1;
3193
3194         if (pt->synth_opts.transactions) {
3195                 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
3196                 err = intel_pt_synth_event(session, "transactions", &attr, id);
3197                 if (err)
3198                         return err;
3199                 pt->sample_transactions = true;
3200                 pt->transactions_sample_type = attr.sample_type;
3201                 pt->transactions_id = id;
3202                 intel_pt_set_event_name(evlist, id, "transactions");
3203                 id += 1;
3204         }
3205
3206         attr.type = PERF_TYPE_SYNTH;
3207         attr.sample_type |= PERF_SAMPLE_RAW;
3208
3209         if (pt->synth_opts.ptwrites) {
3210                 attr.config = PERF_SYNTH_INTEL_PTWRITE;
3211                 err = intel_pt_synth_event(session, "ptwrite", &attr, id);
3212                 if (err)
3213                         return err;
3214                 pt->sample_ptwrites = true;
3215                 pt->ptwrites_sample_type = attr.sample_type;
3216                 pt->ptwrites_id = id;
3217                 intel_pt_set_event_name(evlist, id, "ptwrite");
3218                 id += 1;
3219         }
3220
3221         if (pt->synth_opts.pwr_events) {
3222                 pt->sample_pwr_events = true;
3223                 pt->pwr_events_sample_type = attr.sample_type;
3224
3225                 attr.config = PERF_SYNTH_INTEL_CBR;
3226                 err = intel_pt_synth_event(session, "cbr", &attr, id);
3227                 if (err)
3228                         return err;
3229                 pt->cbr_id = id;
3230                 intel_pt_set_event_name(evlist, id, "cbr");
3231                 id += 1;
3232
3233                 attr.config = PERF_SYNTH_INTEL_PSB;
3234                 err = intel_pt_synth_event(session, "psb", &attr, id);
3235                 if (err)
3236                         return err;
3237                 pt->psb_id = id;
3238                 intel_pt_set_event_name(evlist, id, "psb");
3239                 id += 1;
3240         }
3241
3242         if (pt->synth_opts.pwr_events && (evsel->core.attr.config & 0x10)) {
3243                 attr.config = PERF_SYNTH_INTEL_MWAIT;
3244                 err = intel_pt_synth_event(session, "mwait", &attr, id);
3245                 if (err)
3246                         return err;
3247                 pt->mwait_id = id;
3248                 intel_pt_set_event_name(evlist, id, "mwait");
3249                 id += 1;
3250
3251                 attr.config = PERF_SYNTH_INTEL_PWRE;
3252                 err = intel_pt_synth_event(session, "pwre", &attr, id);
3253                 if (err)
3254                         return err;
3255                 pt->pwre_id = id;
3256                 intel_pt_set_event_name(evlist, id, "pwre");
3257                 id += 1;
3258
3259                 attr.config = PERF_SYNTH_INTEL_EXSTOP;
3260                 err = intel_pt_synth_event(session, "exstop", &attr, id);
3261                 if (err)
3262                         return err;
3263                 pt->exstop_id = id;
3264                 intel_pt_set_event_name(evlist, id, "exstop");
3265                 id += 1;
3266
3267                 attr.config = PERF_SYNTH_INTEL_PWRX;
3268                 err = intel_pt_synth_event(session, "pwrx", &attr, id);
3269                 if (err)
3270                         return err;
3271                 pt->pwrx_id = id;
3272                 intel_pt_set_event_name(evlist, id, "pwrx");
3273                 id += 1;
3274         }
3275
3276         return 0;
3277 }
3278
3279 static void intel_pt_setup_pebs_events(struct intel_pt *pt)
3280 {
3281         struct evsel *evsel;
3282
3283         if (!pt->synth_opts.other_events)
3284                 return;
3285
3286         evlist__for_each_entry(pt->session->evlist, evsel) {
3287                 if (evsel->core.attr.aux_output && evsel->core.id) {
3288                         pt->sample_pebs = true;
3289                         pt->pebs_evsel = evsel;
3290                         return;
3291                 }
3292         }
3293 }
3294
3295 static struct evsel *intel_pt_find_sched_switch(struct evlist *evlist)
3296 {
3297         struct evsel *evsel;
3298
3299         evlist__for_each_entry_reverse(evlist, evsel) {
3300                 const char *name = evsel__name(evsel);
3301
3302                 if (!strcmp(name, "sched:sched_switch"))
3303                         return evsel;
3304         }
3305
3306         return NULL;
3307 }
3308
3309 static bool intel_pt_find_switch(struct evlist *evlist)
3310 {
3311         struct evsel *evsel;
3312
3313         evlist__for_each_entry(evlist, evsel) {
3314                 if (evsel->core.attr.context_switch)
3315                         return true;
3316         }
3317
3318         return false;
3319 }
3320
3321 static int intel_pt_perf_config(const char *var, const char *value, void *data)
3322 {
3323         struct intel_pt *pt = data;
3324
3325         if (!strcmp(var, "intel-pt.mispred-all"))
3326                 pt->mispred_all = perf_config_bool(var, value);
3327
3328         return 0;
3329 }
3330
3331 /* Find least TSC which converts to ns or later */
3332 static u64 intel_pt_tsc_start(u64 ns, struct intel_pt *pt)
3333 {
3334         u64 tsc, tm;
3335
3336         tsc = perf_time_to_tsc(ns, &pt->tc);
3337
3338         while (1) {
3339                 tm = tsc_to_perf_time(tsc, &pt->tc);
3340                 if (tm < ns)
3341                         break;
3342                 tsc -= 1;
3343         }
3344
3345         while (tm < ns)
3346                 tm = tsc_to_perf_time(++tsc, &pt->tc);
3347
3348         return tsc;
3349 }
3350
3351 /* Find greatest TSC which converts to ns or earlier */
3352 static u64 intel_pt_tsc_end(u64 ns, struct intel_pt *pt)
3353 {
3354         u64 tsc, tm;
3355
3356         tsc = perf_time_to_tsc(ns, &pt->tc);
3357
3358         while (1) {
3359                 tm = tsc_to_perf_time(tsc, &pt->tc);
3360                 if (tm > ns)
3361                         break;
3362                 tsc += 1;
3363         }
3364
3365         while (tm > ns)
3366                 tm = tsc_to_perf_time(--tsc, &pt->tc);
3367
3368         return tsc;
3369 }
3370
3371 static int intel_pt_setup_time_ranges(struct intel_pt *pt,
3372                                       struct itrace_synth_opts *opts)
3373 {
3374         struct perf_time_interval *p = opts->ptime_range;
3375         int n = opts->range_num;
3376         int i;
3377
3378         if (!n || !p || pt->timeless_decoding)
3379                 return 0;
3380
3381         pt->time_ranges = calloc(n, sizeof(struct range));
3382         if (!pt->time_ranges)
3383                 return -ENOMEM;
3384
3385         pt->range_cnt = n;
3386
3387         intel_pt_log("%s: %u range(s)\n", __func__, n);
3388
3389         for (i = 0; i < n; i++) {
3390                 struct range *r = &pt->time_ranges[i];
3391                 u64 ts = p[i].start;
3392                 u64 te = p[i].end;
3393
3394                 /*
3395                  * Take care to ensure the TSC range matches the perf-time range
3396                  * when converted back to perf-time.
3397                  */
3398                 r->start = ts ? intel_pt_tsc_start(ts, pt) : 0;
3399                 r->end   = te ? intel_pt_tsc_end(te, pt) : 0;
3400
3401                 intel_pt_log("range %d: perf time interval: %"PRIu64" to %"PRIu64"\n",
3402                              i, ts, te);
3403                 intel_pt_log("range %d: TSC time interval: %#"PRIx64" to %#"PRIx64"\n",
3404                              i, r->start, r->end);
3405         }
3406
3407         return 0;
3408 }
3409
3410 static const char * const intel_pt_info_fmts[] = {
3411         [INTEL_PT_PMU_TYPE]             = "  PMU Type            %"PRId64"\n",
3412         [INTEL_PT_TIME_SHIFT]           = "  Time Shift          %"PRIu64"\n",
3413         [INTEL_PT_TIME_MULT]            = "  Time Muliplier      %"PRIu64"\n",
3414         [INTEL_PT_TIME_ZERO]            = "  Time Zero           %"PRIu64"\n",
3415         [INTEL_PT_CAP_USER_TIME_ZERO]   = "  Cap Time Zero       %"PRId64"\n",
3416         [INTEL_PT_TSC_BIT]              = "  TSC bit             %#"PRIx64"\n",
3417         [INTEL_PT_NORETCOMP_BIT]        = "  NoRETComp bit       %#"PRIx64"\n",
3418         [INTEL_PT_HAVE_SCHED_SWITCH]    = "  Have sched_switch   %"PRId64"\n",
3419         [INTEL_PT_SNAPSHOT_MODE]        = "  Snapshot mode       %"PRId64"\n",
3420         [INTEL_PT_PER_CPU_MMAPS]        = "  Per-cpu maps        %"PRId64"\n",
3421         [INTEL_PT_MTC_BIT]              = "  MTC bit             %#"PRIx64"\n",
3422         [INTEL_PT_TSC_CTC_N]            = "  TSC:CTC numerator   %"PRIu64"\n",
3423         [INTEL_PT_TSC_CTC_D]            = "  TSC:CTC denominator %"PRIu64"\n",
3424         [INTEL_PT_CYC_BIT]              = "  CYC bit             %#"PRIx64"\n",
3425         [INTEL_PT_MAX_NONTURBO_RATIO]   = "  Max non-turbo ratio %"PRIu64"\n",
3426         [INTEL_PT_FILTER_STR_LEN]       = "  Filter string len.  %"PRIu64"\n",
3427 };
3428
3429 static void intel_pt_print_info(__u64 *arr, int start, int finish)
3430 {
3431         int i;
3432
3433         if (!dump_trace)
3434                 return;
3435
3436         for (i = start; i <= finish; i++)
3437                 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
3438 }
3439
3440 static void intel_pt_print_info_str(const char *name, const char *str)
3441 {
3442         if (!dump_trace)
3443                 return;
3444
3445         fprintf(stdout, "  %-20s%s\n", name, str ? str : "");
3446 }
3447
3448 static bool intel_pt_has(struct perf_record_auxtrace_info *auxtrace_info, int pos)
3449 {
3450         return auxtrace_info->header.size >=
3451                 sizeof(struct perf_record_auxtrace_info) + (sizeof(u64) * (pos + 1));
3452 }
3453
3454 int intel_pt_process_auxtrace_info(union perf_event *event,
3455                                    struct perf_session *session)
3456 {
3457         struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info;
3458         size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
3459         struct intel_pt *pt;
3460         void *info_end;
3461         __u64 *info;
3462         int err;
3463
3464         if (auxtrace_info->header.size < sizeof(struct perf_record_auxtrace_info) +
3465                                         min_sz)
3466                 return -EINVAL;
3467
3468         pt = zalloc(sizeof(struct intel_pt));
3469         if (!pt)
3470                 return -ENOMEM;
3471
3472         addr_filters__init(&pt->filts);
3473
3474         err = perf_config(intel_pt_perf_config, pt);
3475         if (err)
3476                 goto err_free;
3477
3478         err = auxtrace_queues__init(&pt->queues);
3479         if (err)
3480                 goto err_free;
3481
3482         intel_pt_log_set_name(INTEL_PT_PMU_NAME);
3483
3484         pt->session = session;
3485         pt->machine = &session->machines.host; /* No kvm support */
3486         pt->auxtrace_type = auxtrace_info->type;
3487         pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
3488         pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
3489         pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
3490         pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
3491         pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
3492         pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
3493         pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
3494         pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
3495         pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
3496         pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
3497         intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
3498                             INTEL_PT_PER_CPU_MMAPS);
3499
3500         if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
3501                 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
3502                 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
3503                 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
3504                 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
3505                 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
3506                 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
3507                                     INTEL_PT_CYC_BIT);
3508         }
3509
3510         if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
3511                 pt->max_non_turbo_ratio =
3512                         auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
3513                 intel_pt_print_info(&auxtrace_info->priv[0],
3514                                     INTEL_PT_MAX_NONTURBO_RATIO,
3515                                     INTEL_PT_MAX_NONTURBO_RATIO);
3516         }
3517
3518         info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
3519         info_end = (void *)info + auxtrace_info->header.size;
3520
3521         if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
3522                 size_t len;
3523
3524                 len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
3525                 intel_pt_print_info(&auxtrace_info->priv[0],
3526                                     INTEL_PT_FILTER_STR_LEN,
3527                                     INTEL_PT_FILTER_STR_LEN);
3528                 if (len) {
3529                         const char *filter = (const char *)info;
3530
3531                         len = roundup(len + 1, 8);
3532                         info += len >> 3;
3533                         if ((void *)info > info_end) {
3534                                 pr_err("%s: bad filter string length\n", __func__);
3535                                 err = -EINVAL;
3536                                 goto err_free_queues;
3537                         }
3538                         pt->filter = memdup(filter, len);
3539                         if (!pt->filter) {
3540                                 err = -ENOMEM;
3541                                 goto err_free_queues;
3542                         }
3543                         if (session->header.needs_swap)
3544                                 mem_bswap_64(pt->filter, len);
3545                         if (pt->filter[len - 1]) {
3546                                 pr_err("%s: filter string not null terminated\n", __func__);
3547                                 err = -EINVAL;
3548                                 goto err_free_queues;
3549                         }
3550                         err = addr_filters__parse_bare_filter(&pt->filts,
3551                                                               filter);
3552                         if (err)
3553                                 goto err_free_queues;
3554                 }
3555                 intel_pt_print_info_str("Filter string", pt->filter);
3556         }
3557
3558         pt->timeless_decoding = intel_pt_timeless_decoding(pt);
3559         if (pt->timeless_decoding && !pt->tc.time_mult)
3560                 pt->tc.time_mult = 1;
3561         pt->have_tsc = intel_pt_have_tsc(pt);
3562         pt->sampling_mode = intel_pt_sampling_mode(pt);
3563         pt->est_tsc = !pt->timeless_decoding;
3564
3565         pt->unknown_thread = thread__new(999999999, 999999999);
3566         if (!pt->unknown_thread) {
3567                 err = -ENOMEM;
3568                 goto err_free_queues;
3569         }
3570
3571         /*
3572          * Since this thread will not be kept in any rbtree not in a
3573          * list, initialize its list node so that at thread__put() the
3574          * current thread lifetime assumption is kept and we don't segfault
3575          * at list_del_init().
3576          */
3577         INIT_LIST_HEAD(&pt->unknown_thread->node);
3578
3579         err = thread__set_comm(pt->unknown_thread, "unknown", 0);
3580         if (err)
3581                 goto err_delete_thread;
3582         if (thread__init_maps(pt->unknown_thread, pt->machine)) {
3583                 err = -ENOMEM;
3584                 goto err_delete_thread;
3585         }
3586
3587         pt->auxtrace.process_event = intel_pt_process_event;
3588         pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
3589         pt->auxtrace.queue_data = intel_pt_queue_data;
3590         pt->auxtrace.dump_auxtrace_sample = intel_pt_dump_sample;
3591         pt->auxtrace.flush_events = intel_pt_flush;
3592         pt->auxtrace.free_events = intel_pt_free_events;
3593         pt->auxtrace.free = intel_pt_free;
3594         pt->auxtrace.evsel_is_auxtrace = intel_pt_evsel_is_auxtrace;
3595         session->auxtrace = &pt->auxtrace;
3596
3597         if (dump_trace)
3598                 return 0;
3599
3600         if (pt->have_sched_switch == 1) {
3601                 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
3602                 if (!pt->switch_evsel) {
3603                         pr_err("%s: missing sched_switch event\n", __func__);
3604                         err = -EINVAL;
3605                         goto err_delete_thread;
3606                 }
3607         } else if (pt->have_sched_switch == 2 &&
3608                    !intel_pt_find_switch(session->evlist)) {
3609                 pr_err("%s: missing context_switch attribute flag\n", __func__);
3610                 err = -EINVAL;
3611                 goto err_delete_thread;
3612         }
3613
3614         if (session->itrace_synth_opts->set) {
3615                 pt->synth_opts = *session->itrace_synth_opts;
3616         } else {
3617                 itrace_synth_opts__set_default(&pt->synth_opts,
3618                                 session->itrace_synth_opts->default_no_sample);
3619                 if (!session->itrace_synth_opts->default_no_sample &&
3620                     !session->itrace_synth_opts->inject) {
3621                         pt->synth_opts.branches = false;
3622                         pt->synth_opts.callchain = true;
3623                         pt->synth_opts.add_callchain = true;
3624                 }
3625                 pt->synth_opts.thread_stack =
3626                                 session->itrace_synth_opts->thread_stack;
3627         }
3628
3629         if (pt->synth_opts.log)
3630                 intel_pt_log_enable();
3631
3632         /* Maximum non-turbo ratio is TSC freq / 100 MHz */
3633         if (pt->tc.time_mult) {
3634                 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
3635
3636                 if (!pt->max_non_turbo_ratio)
3637                         pt->max_non_turbo_ratio =
3638                                         (tsc_freq + 50000000) / 100000000;
3639                 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
3640                 intel_pt_log("Maximum non-turbo ratio %u\n",
3641                              pt->max_non_turbo_ratio);
3642                 pt->cbr2khz = tsc_freq / pt->max_non_turbo_ratio / 1000;
3643         }
3644
3645         err = intel_pt_setup_time_ranges(pt, session->itrace_synth_opts);
3646         if (err)
3647                 goto err_delete_thread;
3648
3649         if (pt->synth_opts.calls)
3650                 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
3651                                        PERF_IP_FLAG_TRACE_END;
3652         if (pt->synth_opts.returns)
3653                 pt->branches_filter |= PERF_IP_FLAG_RETURN |
3654                                        PERF_IP_FLAG_TRACE_BEGIN;
3655
3656         if ((pt->synth_opts.callchain || pt->synth_opts.add_callchain) &&
3657             !symbol_conf.use_callchain) {
3658                 symbol_conf.use_callchain = true;
3659                 if (callchain_register_param(&callchain_param) < 0) {
3660                         symbol_conf.use_callchain = false;
3661                         pt->synth_opts.callchain = false;
3662                         pt->synth_opts.add_callchain = false;
3663                 }
3664         }
3665
3666         if (pt->synth_opts.add_callchain) {
3667                 err = intel_pt_callchain_init(pt);
3668                 if (err)
3669                         goto err_delete_thread;
3670         }
3671
3672         if (pt->synth_opts.last_branch || pt->synth_opts.add_last_branch) {
3673                 pt->br_stack_sz = pt->synth_opts.last_branch_sz;
3674                 pt->br_stack_sz_plus = pt->br_stack_sz;
3675         }
3676
3677         if (pt->synth_opts.add_last_branch) {
3678                 err = intel_pt_br_stack_init(pt);
3679                 if (err)
3680                         goto err_delete_thread;
3681                 /*
3682                  * Additional branch stack size to cater for tracing from the
3683                  * actual sample ip to where the sample time is recorded.
3684                  * Measured at about 200 branches, but generously set to 1024.
3685                  * If kernel space is not being traced, then add just 1 for the
3686                  * branch to kernel space.
3687                  */
3688                 if (intel_pt_tracing_kernel(pt))
3689                         pt->br_stack_sz_plus += 1024;
3690                 else
3691                         pt->br_stack_sz_plus += 1;
3692         }
3693
3694         pt->use_thread_stack = pt->synth_opts.callchain ||
3695                                pt->synth_opts.add_callchain ||
3696                                pt->synth_opts.thread_stack ||
3697                                pt->synth_opts.last_branch ||
3698                                pt->synth_opts.add_last_branch;
3699
3700         pt->callstack = pt->synth_opts.callchain ||
3701                         pt->synth_opts.add_callchain ||
3702                         pt->synth_opts.thread_stack;
3703
3704         err = intel_pt_synth_events(pt, session);
3705         if (err)
3706                 goto err_delete_thread;
3707
3708         intel_pt_setup_pebs_events(pt);
3709
3710         if (pt->sampling_mode || list_empty(&session->auxtrace_index))
3711                 err = auxtrace_queue_data(session, true, true);
3712         else
3713                 err = auxtrace_queues__process_index(&pt->queues, session);
3714         if (err)
3715                 goto err_delete_thread;
3716
3717         if (pt->queues.populated)
3718                 pt->data_queued = true;
3719
3720         if (pt->timeless_decoding)
3721                 pr_debug2("Intel PT decoding without timestamps\n");
3722
3723         return 0;
3724
3725 err_delete_thread:
3726         zfree(&pt->chain);
3727         thread__zput(pt->unknown_thread);
3728 err_free_queues:
3729         intel_pt_log_disable();
3730         auxtrace_queues__free(&pt->queues);
3731         session->auxtrace = NULL;
3732 err_free:
3733         addr_filters__exit(&pt->filts);
3734         zfree(&pt->filter);
3735         zfree(&pt->time_ranges);
3736         free(pt);
3737         return err;
3738 }