tools/include/uapi/linux/perf_event.h

   1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2 /*
   3  * Performance events:
   4  *
   5  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
   6  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
   7  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
   8  *
   9  * Data type definitions, declarations, prototypes.
  10  *
  11  *    Started by: Thomas Gleixner and Ingo Molnar
  12  *
  13  * For licencing details see kernel-base/COPYING
  14  */
  15 #ifndef _UAPI_LINUX_PERF_EVENT_H
  16 #define _UAPI_LINUX_PERF_EVENT_H
  17
  18 #include <linux/types.h>
  19 #include <linux/ioctl.h>
  20 #include <asm/byteorder.h>
  21
  22 /*
  23  * User-space ABI bits:
  24  */
  25
  26 /*
  27  * attr.type
  28  */
  29 enum perf_type_id {
  30         PERF_TYPE_HARDWARE                      = 0,
  31         PERF_TYPE_SOFTWARE                      = 1,
  32         PERF_TYPE_TRACEPOINT                    = 2,
  33         PERF_TYPE_HW_CACHE                      = 3,
  34         PERF_TYPE_RAW                           = 4,
  35         PERF_TYPE_BREAKPOINT                    = 5,
  36
  37         PERF_TYPE_MAX,                          /* non-ABI */
  38 };
  39
  40 /*
  41  * Generalized performance event event_id types, used by the
  42  * attr.event_id parameter of the sys_perf_event_open()
  43  * syscall:
  44  */
  45 enum perf_hw_id {
  46         /*
  47          * Common hardware events, generalized by the kernel:
  48          */
  49         PERF_COUNT_HW_CPU_CYCLES                = 0,
  50         PERF_COUNT_HW_INSTRUCTIONS              = 1,
  51         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
  52         PERF_COUNT_HW_CACHE_MISSES              = 3,
  53         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
  54         PERF_COUNT_HW_BRANCH_MISSES             = 5,
  55         PERF_COUNT_HW_BUS_CYCLES                = 6,
  56         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
  57         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
  58         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
  59
  60         PERF_COUNT_HW_MAX,                      /* non-ABI */
  61 };
  62
  63 /*
  64  * Generalized hardware cache events:
  65  *
  66  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
  67  *       { read, write, prefetch } x
  68  *       { accesses, misses }
  69  */
  70 enum perf_hw_cache_id {
  71         PERF_COUNT_HW_CACHE_L1D                 = 0,
  72         PERF_COUNT_HW_CACHE_L1I                 = 1,
  73         PERF_COUNT_HW_CACHE_LL                  = 2,
  74         PERF_COUNT_HW_CACHE_DTLB                = 3,
  75         PERF_COUNT_HW_CACHE_ITLB                = 4,
  76         PERF_COUNT_HW_CACHE_BPU                 = 5,
  77         PERF_COUNT_HW_CACHE_NODE                = 6,
  78
  79         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
  80 };
  81
  82 enum perf_hw_cache_op_id {
  83         PERF_COUNT_HW_CACHE_OP_READ             = 0,
  84         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
  85         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
  86
  87         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
  88 };
  89
  90 enum perf_hw_cache_op_result_id {
  91         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
  92         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
  93
  94         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
  95 };
  96
  97 /*
  98  * Special "software" events provided by the kernel, even if the hardware
  99  * does not support performance events. These events measure various
 100  * physical and sw events of the kernel (and allow the profiling of them as
 101  * well):
 102  */
 103 enum perf_sw_ids {
 104         PERF_COUNT_SW_CPU_CLOCK                 = 0,
 105         PERF_COUNT_SW_TASK_CLOCK                = 1,
 106         PERF_COUNT_SW_PAGE_FAULTS               = 2,
 107         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
 108         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
 109         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
 110         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
 111         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
 112         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
 113         PERF_COUNT_SW_DUMMY                     = 9,
 114         PERF_COUNT_SW_BPF_OUTPUT                = 10,
 115
 116         PERF_COUNT_SW_MAX,                      /* non-ABI */
 117 };
 118
 119 /*
 120  * Bits that can be set in attr.sample_type to request information
 121  * in the overflow packets.
 122  */
 123 enum perf_event_sample_format {
 124         PERF_SAMPLE_IP                          = 1U << 0,
 125         PERF_SAMPLE_TID                         = 1U << 1,
 126         PERF_SAMPLE_TIME                        = 1U << 2,
 127         PERF_SAMPLE_ADDR                        = 1U << 3,
 128         PERF_SAMPLE_READ                        = 1U << 4,
 129         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
 130         PERF_SAMPLE_ID                          = 1U << 6,
 131         PERF_SAMPLE_CPU                         = 1U << 7,
 132         PERF_SAMPLE_PERIOD                      = 1U << 8,
 133         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
 134         PERF_SAMPLE_RAW                         = 1U << 10,
 135         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
 136         PERF_SAMPLE_REGS_USER                   = 1U << 12,
 137         PERF_SAMPLE_STACK_USER                  = 1U << 13,
 138         PERF_SAMPLE_WEIGHT                      = 1U << 14,
 139         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
 140         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 141         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
 142         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
 143         PERF_SAMPLE_PHYS_ADDR                   = 1U << 19,
 144         PERF_SAMPLE_AUX                         = 1U << 20,
 145         PERF_SAMPLE_CGROUP                      = 1U << 21,
 146
 147         PERF_SAMPLE_MAX = 1U << 22,             /* non-ABI */
 148
 149         __PERF_SAMPLE_CALLCHAIN_EARLY           = 1ULL << 63, /* non-ABI; internal use */
 150 };
 151
 152 /*
 153  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
 154  *
 155  * If the user does not pass priv level information via branch_sample_type,
 156  * the kernel uses the event's priv level. Branch and event priv levels do
 157  * not have to match. Branch priv level is checked for permissions.
 158  *
 159  * The branch types can be combined, however BRANCH_ANY covers all types
 160  * of branches and therefore it supersedes all the other types.
 161  */
 162 enum perf_branch_sample_type_shift {
 163         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
 164         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
 165         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
 166
 167         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
 168         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
 169         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
 170         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
 171         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
 172         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
 173         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
 174         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
 175
 176         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
 177         PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT       = 12, /* indirect jumps */
 178         PERF_SAMPLE_BRANCH_CALL_SHIFT           = 13, /* direct call */
 179
 180         PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT       = 14, /* no flags */
 181         PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT      = 15, /* no cycles */
 182
 183         PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT      = 16, /* save branch type */
 184
 185         PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT       = 17, /* save low level index of raw branch records */
 186
 187         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
 188 };
 189
 190 enum perf_branch_sample_type {
 191         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
 192         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
 193         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
 194
 195         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
 196         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
 197         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
 198         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
 199         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
 200         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
 201         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
 202         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
 203
 204         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
 205         PERF_SAMPLE_BRANCH_IND_JUMP     = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
 206         PERF_SAMPLE_BRANCH_CALL         = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
 207
 208         PERF_SAMPLE_BRANCH_NO_FLAGS     = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
 209         PERF_SAMPLE_BRANCH_NO_CYCLES    = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
 210
 211         PERF_SAMPLE_BRANCH_TYPE_SAVE    =
 212                 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
 213
 214         PERF_SAMPLE_BRANCH_HW_INDEX     = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT,
 215
 216         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
 217 };
 218
 219 /*
 220  * Common flow change classification
 221  */
 222 enum {
 223         PERF_BR_UNKNOWN         = 0,    /* unknown */
 224         PERF_BR_COND            = 1,    /* conditional */
 225         PERF_BR_UNCOND          = 2,    /* unconditional  */
 226         PERF_BR_IND             = 3,    /* indirect */
 227         PERF_BR_CALL            = 4,    /* function call */
 228         PERF_BR_IND_CALL        = 5,    /* indirect function call */
 229         PERF_BR_RET             = 6,    /* function return */
 230         PERF_BR_SYSCALL         = 7,    /* syscall */
 231         PERF_BR_SYSRET          = 8,    /* syscall return */
 232         PERF_BR_COND_CALL       = 9,    /* conditional function call */
 233         PERF_BR_COND_RET        = 10,   /* conditional function return */
 234         PERF_BR_MAX,
 235 };
 236
 237 #define PERF_SAMPLE_BRANCH_PLM_ALL \
 238         (PERF_SAMPLE_BRANCH_USER|\
 239          PERF_SAMPLE_BRANCH_KERNEL|\
 240          PERF_SAMPLE_BRANCH_HV)
 241
 242 /*
 243  * Values to determine ABI of the registers dump.
 244  */
 245 enum perf_sample_regs_abi {
 246         PERF_SAMPLE_REGS_ABI_NONE       = 0,
 247         PERF_SAMPLE_REGS_ABI_32         = 1,
 248         PERF_SAMPLE_REGS_ABI_64         = 2,
 249 };
 250
 251 /*
 252  * Values for the memory transaction event qualifier, mostly for
 253  * abort events. Multiple bits can be set.
 254  */
 255 enum {
 256         PERF_TXN_ELISION        = (1 << 0), /* From elision */
 257         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
 258         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
 259         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
 260         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
 261         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
 262         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
 263         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
 264
 265         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
 266
 267         /* bits 32..63 are reserved for the abort code */
 268
 269         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
 270         PERF_TXN_ABORT_SHIFT = 32,
 271 };
 272
 273 /*
 274  * The format of the data returned by read() on a perf event fd,
 275  * as specified by attr.read_format:
 276  *
 277  * struct read_format {
 278  *      { u64           value;
 279  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 280  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 281  *        { u64         id;           } && PERF_FORMAT_ID
 282  *      } && !PERF_FORMAT_GROUP
 283  *
 284  *      { u64           nr;
 285  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 286  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 287  *        { u64         value;
 288  *          { u64       id;           } && PERF_FORMAT_ID
 289  *        }             cntr[nr];
 290  *      } && PERF_FORMAT_GROUP
 291  * };
 292  */
 293 enum perf_event_read_format {
 294         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
 295         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
 296         PERF_FORMAT_ID                          = 1U << 2,
 297         PERF_FORMAT_GROUP                       = 1U << 3,
 298
 299         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
 300 };
 301
 302 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
 303 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
 304 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 305 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
 306                                         /* add: sample_stack_user */
 307 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
 308 #define PERF_ATTR_SIZE_VER5     112     /* add: aux_watermark */
 309 #define PERF_ATTR_SIZE_VER6     120     /* add: aux_sample_size */
 310
 311 /*
 312  * Hardware event_id to monitor via a performance monitoring event:
 313  *
 314  * @sample_max_stack: Max number of frame pointers in a callchain,
 315  *                    should be < /proc/sys/kernel/perf_event_max_stack
 316  */
 317 struct perf_event_attr {
 318
 319         /*
 320          * Major type: hardware/software/tracepoint/etc.
 321          */
 322         __u32                   type;
 323
 324         /*
 325          * Size of the attr structure, for fwd/bwd compat.
 326          */
 327         __u32                   size;
 328
 329         /*
 330          * Type specific configuration information.
 331          */
 332         __u64                   config;
 333
 334         union {
 335                 __u64           sample_period;
 336                 __u64           sample_freq;
 337         };
 338
 339         __u64                   sample_type;
 340         __u64                   read_format;
 341
 342         __u64                   disabled       :  1, /* off by default        */
 343                                 inherit        :  1, /* children inherit it   */
 344                                 pinned         :  1, /* must always be on PMU */
 345                                 exclusive      :  1, /* only group on PMU     */
 346                                 exclude_user   :  1, /* don't count user      */
 347                                 exclude_kernel :  1, /* ditto kernel          */
 348                                 exclude_hv     :  1, /* ditto hypervisor      */
 349                                 exclude_idle   :  1, /* don't count when idle */
 350                                 mmap           :  1, /* include mmap data     */
 351                                 comm           :  1, /* include comm data     */
 352                                 freq           :  1, /* use freq, not period  */
 353                                 inherit_stat   :  1, /* per task counts       */
 354                                 enable_on_exec :  1, /* next exec enables     */
 355                                 task           :  1, /* trace fork/exit       */
 356                                 watermark      :  1, /* wakeup_watermark      */
 357                                 /*
 358                                  * precise_ip:
 359                                  *
 360                                  *  0 - SAMPLE_IP can have arbitrary skid
 361                                  *  1 - SAMPLE_IP must have constant skid
 362                                  *  2 - SAMPLE_IP requested to have 0 skid
 363                                  *  3 - SAMPLE_IP must have 0 skid
 364                                  *
 365                                  *  See also PERF_RECORD_MISC_EXACT_IP
 366                                  */
 367                                 precise_ip     :  2, /* skid constraint       */
 368                                 mmap_data      :  1, /* non-exec mmap data    */
 369                                 sample_id_all  :  1, /* sample_type all events */
 370
 371                                 exclude_host   :  1, /* don't count in host   */
 372                                 exclude_guest  :  1, /* don't count in guest  */
 373
 374                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
 375                                 exclude_callchain_user   : 1, /* exclude user callchains */
 376                                 mmap2          :  1, /* include mmap with inode data     */
 377                                 comm_exec      :  1, /* flag comm events that are due to an exec */
 378                                 use_clockid    :  1, /* use @clockid for time fields */
 379                                 context_switch :  1, /* context switch data */
 380                                 write_backward :  1, /* Write ring buffer from end to beginning */
 381                                 namespaces     :  1, /* include namespaces data */
 382                                 ksymbol        :  1, /* include ksymbol events */
 383                                 bpf_event      :  1, /* include bpf events */
 384                                 aux_output     :  1, /* generate AUX records instead of events */
 385                                 cgroup         :  1, /* include cgroup events */
 386                                 text_poke      :  1, /* include text poke events */
 387                                 __reserved_1   : 30;
 388
 389         union {
 390                 __u32           wakeup_events;    /* wakeup every n events */
 391                 __u32           wakeup_watermark; /* bytes before wakeup   */
 392         };
 393
 394         __u32                   bp_type;
 395         union {
 396                 __u64           bp_addr;
 397                 __u64           kprobe_func; /* for perf_kprobe */
 398                 __u64           uprobe_path; /* for perf_uprobe */
 399                 __u64           config1; /* extension of config */
 400         };
 401         union {
 402                 __u64           bp_len;
 403                 __u64           kprobe_addr; /* when kprobe_func == NULL */
 404                 __u64           probe_offset; /* for perf_[k,u]probe */
 405                 __u64           config2; /* extension of config1 */
 406         };
 407         __u64   branch_sample_type; /* enum perf_branch_sample_type */
 408
 409         /*
 410          * Defines set of user regs to dump on samples.
 411          * See asm/perf_regs.h for details.
 412          */
 413         __u64   sample_regs_user;
 414
 415         /*
 416          * Defines size of the user stack to dump on samples.
 417          */
 418         __u32   sample_stack_user;
 419
 420         __s32   clockid;
 421         /*
 422          * Defines set of regs to dump for each sample
 423          * state captured on:
 424          *  - precise = 0: PMU interrupt
 425          *  - precise > 0: sampled instruction
 426          *
 427          * See asm/perf_regs.h for details.
 428          */
 429         __u64   sample_regs_intr;
 430
 431         /*
 432          * Wakeup watermark for AUX area
 433          */
 434         __u32   aux_watermark;
 435         __u16   sample_max_stack;
 436         __u16   __reserved_2;
 437         __u32   aux_sample_size;
 438         __u32   __reserved_3;
 439 };
 440
 441 /*
 442  * Structure used by below PERF_EVENT_IOC_QUERY_BPF command
 443  * to query bpf programs attached to the same perf tracepoint
 444  * as the given perf event.
 445  */
 446 struct perf_event_query_bpf {
 447         /*
 448          * The below ids array length
 449          */
 450         __u32   ids_len;
 451         /*
 452          * Set by the kernel to indicate the number of
 453          * available programs
 454          */
 455         __u32   prog_cnt;
 456         /*
 457          * User provided buffer to store program ids
 458          */
 459         __u32   ids[0];
 460 };
 461
 462 /*
 463  * Ioctls that can be done on a perf event fd:
 464  */
 465 #define PERF_EVENT_IOC_ENABLE                   _IO ('$', 0)
 466 #define PERF_EVENT_IOC_DISABLE                  _IO ('$', 1)
 467 #define PERF_EVENT_IOC_REFRESH                  _IO ('$', 2)
 468 #define PERF_EVENT_IOC_RESET                    _IO ('$', 3)
 469 #define PERF_EVENT_IOC_PERIOD                   _IOW('$', 4, __u64)
 470 #define PERF_EVENT_IOC_SET_OUTPUT               _IO ('$', 5)
 471 #define PERF_EVENT_IOC_SET_FILTER               _IOW('$', 6, char *)
 472 #define PERF_EVENT_IOC_ID                       _IOR('$', 7, __u64 *)
 473 #define PERF_EVENT_IOC_SET_BPF                  _IOW('$', 8, __u32)
 474 #define PERF_EVENT_IOC_PAUSE_OUTPUT             _IOW('$', 9, __u32)
 475 #define PERF_EVENT_IOC_QUERY_BPF                _IOWR('$', 10, struct perf_event_query_bpf *)
 476 #define PERF_EVENT_IOC_MODIFY_ATTRIBUTES        _IOW('$', 11, struct perf_event_attr *)
 477
 478 enum perf_event_ioc_flags {
 479         PERF_IOC_FLAG_GROUP             = 1U << 0,
 480 };
 481
 482 /*
 483  * Structure of the page that can be mapped via mmap
 484  */
 485 struct perf_event_mmap_page {
 486         __u32   version;                /* version number of this structure */
 487         __u32   compat_version;         /* lowest version this is compat with */
 488
 489         /*
 490          * Bits needed to read the hw events in user-space.
 491          *
 492          *   u32 seq, time_mult, time_shift, index, width;
 493          *   u64 count, enabled, running;
 494          *   u64 cyc, time_offset;
 495          *   s64 pmc = 0;
 496          *
 497          *   do {
 498          *     seq = pc->lock;
 499          *     barrier()
 500          *
 501          *     enabled = pc->time_enabled;
 502          *     running = pc->time_running;
 503          *
 504          *     if (pc->cap_usr_time && enabled != running) {
 505          *       cyc = rdtsc();
 506          *       time_offset = pc->time_offset;
 507          *       time_mult   = pc->time_mult;
 508          *       time_shift  = pc->time_shift;
 509          *     }
 510          *
 511          *     index = pc->index;
 512          *     count = pc->offset;
 513          *     if (pc->cap_user_rdpmc && index) {
 514          *       width = pc->pmc_width;
 515          *       pmc = rdpmc(index - 1);
 516          *     }
 517          *
 518          *     barrier();
 519          *   } while (pc->lock != seq);
 520          *
 521          * NOTE: for obvious reason this only works on self-monitoring
 522          *       processes.
 523          */
 524         __u32   lock;                   /* seqlock for synchronization */
 525         __u32   index;                  /* hardware event identifier */
 526         __s64   offset;                 /* add to hardware event value */
 527         __u64   time_enabled;           /* time event active */
 528         __u64   time_running;           /* time event on cpu */
 529         union {
 530                 __u64   capabilities;
 531                 struct {
 532                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
 533                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
 534
 535                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
 536                                 cap_user_time           : 1, /* The time_{shift,mult,offset} fields are used */
 537                                 cap_user_time_zero      : 1, /* The time_zero field is used */
 538                                 cap_user_time_short     : 1, /* the time_{cycle,mask} fields are used */
 539                                 cap_____res             : 58;
 540                 };
 541         };
 542
 543         /*
 544          * If cap_user_rdpmc this field provides the bit-width of the value
 545          * read using the rdpmc() or equivalent instruction. This can be used
 546          * to sign extend the result like:
 547          *
 548          *   pmc <<= 64 - width;
 549          *   pmc >>= 64 - width; // signed shift right
 550          *   count += pmc;
 551          */
 552         __u16   pmc_width;
 553
 554         /*
 555          * If cap_usr_time the below fields can be used to compute the time
 556          * delta since time_enabled (in ns) using rdtsc or similar.
 557          *
 558          *   u64 quot, rem;
 559          *   u64 delta;
 560          *
 561          *   quot = (cyc >> time_shift);
 562          *   rem = cyc & (((u64)1 << time_shift) - 1);
 563          *   delta = time_offset + quot * time_mult +
 564          *              ((rem * time_mult) >> time_shift);
 565          *
 566          * Where time_offset,time_mult,time_shift and cyc are read in the
 567          * seqcount loop described above. This delta can then be added to
 568          * enabled and possible running (if index), improving the scaling:
 569          *
 570          *   enabled += delta;
 571          *   if (index)
 572          *     running += delta;
 573          *
 574          *   quot = count / running;
 575          *   rem  = count % running;
 576          *   count = quot * enabled + (rem * enabled) / running;
 577          */
 578         __u16   time_shift;
 579         __u32   time_mult;
 580         __u64   time_offset;
 581         /*
 582          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
 583          * from sample timestamps.
 584          *
 585          *   time = timestamp - time_zero;
 586          *   quot = time / time_mult;
 587          *   rem  = time % time_mult;
 588          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
 589          *
 590          * And vice versa:
 591          *
 592          *   quot = cyc >> time_shift;
 593          *   rem  = cyc & (((u64)1 << time_shift) - 1);
 594          *   timestamp = time_zero + quot * time_mult +
 595          *               ((rem * time_mult) >> time_shift);
 596          */
 597         __u64   time_zero;
 598
 599         __u32   size;                   /* Header size up to __reserved[] fields. */
 600         __u32   __reserved_1;
 601
 602         /*
 603          * If cap_usr_time_short, the hardware clock is less than 64bit wide
 604          * and we must compute the 'cyc' value, as used by cap_usr_time, as:
 605          *
 606          *   cyc = time_cycles + ((cyc - time_cycles) & time_mask)
 607          *
 608          * NOTE: this form is explicitly chosen such that cap_usr_time_short
 609          *       is a correction on top of cap_usr_time, and code that doesn't
 610          *       know about cap_usr_time_short still works under the assumption
 611          *       the counter doesn't wrap.
 612          */
 613         __u64   time_cycles;
 614         __u64   time_mask;
 615
 616                 /*
 617                  * Hole for extension of the self monitor capabilities
 618                  */
 619
 620         __u8    __reserved[116*8];      /* align to 1k. */
 621
 622         /*
 623          * Control data for the mmap() data buffer.
 624          *
 625          * User-space reading the @data_head value should issue an smp_rmb(),
 626          * after reading this value.
 627          *
 628          * When the mapping is PROT_WRITE the @data_tail value should be
 629          * written by userspace to reflect the last read data, after issueing
 630          * an smp_mb() to separate the data read from the ->data_tail store.
 631          * In this case the kernel will not over-write unread data.
 632          *
 633          * See perf_output_put_handle() for the data ordering.
 634          *
 635          * data_{offset,size} indicate the location and size of the perf record
 636          * buffer within the mmapped area.
 637          */
 638         __u64   data_head;              /* head in the data section */
 639         __u64   data_tail;              /* user-space written tail */
 640         __u64   data_offset;            /* where the buffer starts */
 641         __u64   data_size;              /* data buffer size */
 642
 643         /*
 644          * AUX area is defined by aux_{offset,size} fields that should be set
 645          * by the userspace, so that
 646          *
 647          *   aux_offset >= data_offset + data_size
 648          *
 649          * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
 650          *
 651          * Ring buffer pointers aux_{head,tail} have the same semantics as
 652          * data_{head,tail} and same ordering rules apply.
 653          */
 654         __u64   aux_head;
 655         __u64   aux_tail;
 656         __u64   aux_offset;
 657         __u64   aux_size;
 658 };
 659
 660 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
 661 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
 662 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
 663 #define PERF_RECORD_MISC_USER                   (2 << 0)
 664 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
 665 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 666 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 667
 668 /*
 669  * Indicates that /proc/PID/maps parsing are truncated by time out.
 670  */
 671 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
 672 /*
 673  * Following PERF_RECORD_MISC_* are used on different
 674  * events, so can reuse the same bit position:
 675  *
 676  *   PERF_RECORD_MISC_MMAP_DATA  - PERF_RECORD_MMAP* events
 677  *   PERF_RECORD_MISC_COMM_EXEC  - PERF_RECORD_COMM event
 678  *   PERF_RECORD_MISC_FORK_EXEC  - PERF_RECORD_FORK event (perf internal)
 679  *   PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events
 680  */
 681 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
 682 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
 683 #define PERF_RECORD_MISC_FORK_EXEC              (1 << 13)
 684 #define PERF_RECORD_MISC_SWITCH_OUT             (1 << 13)
 685 /*
 686  * These PERF_RECORD_MISC_* flags below are safely reused
 687  * for the following events:
 688  *
 689  *   PERF_RECORD_MISC_EXACT_IP           - PERF_RECORD_SAMPLE of precise events
 690  *   PERF_RECORD_MISC_SWITCH_OUT_PREEMPT - PERF_RECORD_SWITCH* events
 691  *
 692  *
 693  * PERF_RECORD_MISC_EXACT_IP:
 694  *   Indicates that the content of PERF_SAMPLE_IP points to
 695  *   the actual instruction that triggered the event. See also
 696  *   perf_event_attr::precise_ip.
 697  *
 698  * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT:
 699  *   Indicates that thread was preempted in TASK_RUNNING state.
 700  */
 701 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 702 #define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT     (1 << 14)
 703 /*
 704  * Reserve the last bit to indicate some extended misc field
 705  */
 706 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
 707
 708 struct perf_event_header {
 709         __u32   type;
 710         __u16   misc;
 711         __u16   size;
 712 };
 713
 714 struct perf_ns_link_info {
 715         __u64   dev;
 716         __u64   ino;
 717 };
 718
 719 enum {
 720         NET_NS_INDEX            = 0,
 721         UTS_NS_INDEX            = 1,
 722         IPC_NS_INDEX            = 2,
 723         PID_NS_INDEX            = 3,
 724         USER_NS_INDEX           = 4,
 725         MNT_NS_INDEX            = 5,
 726         CGROUP_NS_INDEX         = 6,
 727
 728         NR_NAMESPACES,          /* number of available namespaces */
 729 };
 730
 731 enum perf_event_type {
 732
 733         /*
 734          * If perf_event_attr.sample_id_all is set then all event types will
 735          * have the sample_type selected fields related to where/when
 736          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
 737          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
 738          * just after the perf_event_header and the fields already present for
 739          * the existing fields, i.e. at the end of the payload. That way a newer
 740          * perf.data file will be supported by older perf tools, with these new
 741          * optional fields being ignored.
 742          *
 743          * struct sample_id {
 744          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 745          *      { u64                   time;     } && PERF_SAMPLE_TIME
 746          *      { u64                   id;       } && PERF_SAMPLE_ID
 747          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 748          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 749          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 750          * } && perf_event_attr::sample_id_all
 751          *
 752          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
 753          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
 754          * relative to header.size.
 755          */
 756
 757         /*
 758          * The MMAP events record the PROT_EXEC mappings so that we can
 759          * correlate userspace IPs to code. They have the following structure:
 760          *
 761          * struct {
 762          *      struct perf_event_header        header;
 763          *
 764          *      u32                             pid, tid;
 765          *      u64                             addr;
 766          *      u64                             len;
 767          *      u64                             pgoff;
 768          *      char                            filename[];
 769          *      struct sample_id                sample_id;
 770          * };
 771          */
 772         PERF_RECORD_MMAP                        = 1,
 773
 774         /*
 775          * struct {
 776          *      struct perf_event_header        header;
 777          *      u64                             id;
 778          *      u64                             lost;
 779          *      struct sample_id                sample_id;
 780          * };
 781          */
 782         PERF_RECORD_LOST                        = 2,
 783
 784         /*
 785          * struct {
 786          *      struct perf_event_header        header;
 787          *
 788          *      u32                             pid, tid;
 789          *      char                            comm[];
 790          *      struct sample_id                sample_id;
 791          * };
 792          */
 793         PERF_RECORD_COMM                        = 3,
 794
 795         /*
 796          * struct {
 797          *      struct perf_event_header        header;
 798          *      u32                             pid, ppid;
 799          *      u32                             tid, ptid;
 800          *      u64                             time;
 801          *      struct sample_id                sample_id;
 802          * };
 803          */
 804         PERF_RECORD_EXIT                        = 4,
 805
 806         /*
 807          * struct {
 808          *      struct perf_event_header        header;
 809          *      u64                             time;
 810          *      u64                             id;
 811          *      u64                             stream_id;
 812          *      struct sample_id                sample_id;
 813          * };
 814          */
 815         PERF_RECORD_THROTTLE                    = 5,
 816         PERF_RECORD_UNTHROTTLE                  = 6,
 817
 818         /*
 819          * struct {
 820          *      struct perf_event_header        header;
 821          *      u32                             pid, ppid;
 822          *      u32                             tid, ptid;
 823          *      u64                             time;
 824          *      struct sample_id                sample_id;
 825          * };
 826          */
 827         PERF_RECORD_FORK                        = 7,
 828
 829         /*
 830          * struct {
 831          *      struct perf_event_header        header;
 832          *      u32                             pid, tid;
 833          *
 834          *      struct read_format              values;
 835          *      struct sample_id                sample_id;
 836          * };
 837          */
 838         PERF_RECORD_READ                        = 8,
 839
 840         /*
 841          * struct {
 842          *      struct perf_event_header        header;
 843          *
 844          *      #
 845          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
 846          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
 847          *      # is fixed relative to header.
 848          *      #
 849          *
 850          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 851          *      { u64                   ip;       } && PERF_SAMPLE_IP
 852          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 853          *      { u64                   time;     } && PERF_SAMPLE_TIME
 854          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
 855          *      { u64                   id;       } && PERF_SAMPLE_ID
 856          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 857          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 858          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
 859          *
 860          *      { struct read_format    values;   } && PERF_SAMPLE_READ
 861          *
 862          *      { u64                   nr,
 863          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
 864          *
 865          *      #
 866          *      # The RAW record below is opaque data wrt the ABI
 867          *      #
 868          *      # That is, the ABI doesn't make any promises wrt to
 869          *      # the stability of its content, it may vary depending
 870          *      # on event, hardware, kernel version and phase of
 871          *      # the moon.
 872          *      #
 873          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
 874          *      #
 875          *
 876          *      { u32                   size;
 877          *        char                  data[size];}&& PERF_SAMPLE_RAW
 878          *
 879          *      { u64                   nr;
 880          *        { u64 hw_idx; } && PERF_SAMPLE_BRANCH_HW_INDEX
 881          *        { u64 from, to, flags } lbr[nr];
 882          *      } && PERF_SAMPLE_BRANCH_STACK
 883          *
 884          *      { u64                   abi; # enum perf_sample_regs_abi
 885          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
 886          *
 887          *      { u64                   size;
 888          *        char                  data[size];
 889          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
 890          *
 891          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
 892          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
 893          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
 894          *      { u64                   abi; # enum perf_sample_regs_abi
 895          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
 896          *      { u64                   phys_addr;} && PERF_SAMPLE_PHYS_ADDR
 897          *      { u64                   size;
 898          *        char                  data[size]; } && PERF_SAMPLE_AUX
 899          * };
 900          */
 901         PERF_RECORD_SAMPLE                      = 9,
 902
 903         /*
 904          * The MMAP2 records are an augmented version of MMAP, they add
 905          * maj, min, ino numbers to be used to uniquely identify each mapping
 906          *
 907          * struct {
 908          *      struct perf_event_header        header;
 909          *
 910          *      u32                             pid, tid;
 911          *      u64                             addr;
 912          *      u64                             len;
 913          *      u64                             pgoff;
 914          *      u32                             maj;
 915          *      u32                             min;
 916          *      u64                             ino;
 917          *      u64                             ino_generation;
 918          *      u32                             prot, flags;
 919          *      char                            filename[];
 920          *      struct sample_id                sample_id;
 921          * };
 922          */
 923         PERF_RECORD_MMAP2                       = 10,
 924
 925         /*
 926          * Records that new data landed in the AUX buffer part.
 927          *
 928          * struct {
 929          *      struct perf_event_header        header;
 930          *
 931          *      u64                             aux_offset;
 932          *      u64                             aux_size;
 933          *      u64                             flags;
 934          *      struct sample_id                sample_id;
 935          * };
 936          */
 937         PERF_RECORD_AUX                         = 11,
 938
 939         /*
 940          * Indicates that instruction trace has started
 941          *
 942          * struct {
 943          *      struct perf_event_header        header;
 944          *      u32                             pid;
 945          *      u32                             tid;
 946          *      struct sample_id                sample_id;
 947          * };
 948          */
 949         PERF_RECORD_ITRACE_START                = 12,
 950
 951         /*
 952          * Records the dropped/lost sample number.
 953          *
 954          * struct {
 955          *      struct perf_event_header        header;
 956          *
 957          *      u64                             lost;
 958          *      struct sample_id                sample_id;
 959          * };
 960          */
 961         PERF_RECORD_LOST_SAMPLES                = 13,
 962
 963         /*
 964          * Records a context switch in or out (flagged by
 965          * PERF_RECORD_MISC_SWITCH_OUT). See also
 966          * PERF_RECORD_SWITCH_CPU_WIDE.
 967          *
 968          * struct {
 969          *      struct perf_event_header        header;
 970          *      struct sample_id                sample_id;
 971          * };
 972          */
 973         PERF_RECORD_SWITCH                      = 14,
 974
 975         /*
 976          * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and
 977          * next_prev_tid that are the next (switching out) or previous
 978          * (switching in) pid/tid.
 979          *
 980          * struct {
 981          *      struct perf_event_header        header;
 982          *      u32                             next_prev_pid;
 983          *      u32                             next_prev_tid;
 984          *      struct sample_id                sample_id;
 985          * };
 986          */
 987         PERF_RECORD_SWITCH_CPU_WIDE             = 15,
 988
 989         /*
 990          * struct {
 991          *      struct perf_event_header        header;
 992          *      u32                             pid;
 993          *      u32                             tid;
 994          *      u64                             nr_namespaces;
 995          *      { u64                           dev, inode; } [nr_namespaces];
 996          *      struct sample_id                sample_id;
 997          * };
 998          */
 999         PERF_RECORD_NAMESPACES                  = 16,
1000
1001         /*
1002          * Record ksymbol register/unregister events:
1003          *
1004          * struct {
1005          *      struct perf_event_header        header;
1006          *      u64                             addr;
1007          *      u32                             len;
1008          *      u16                             ksym_type;
1009          *      u16                             flags;
1010          *      char                            name[];
1011          *      struct sample_id                sample_id;
1012          * };
1013          */
1014         PERF_RECORD_KSYMBOL                     = 17,
1015
1016         /*
1017          * Record bpf events:
1018          *  enum perf_bpf_event_type {
1019          *      PERF_BPF_EVENT_UNKNOWN          = 0,
1020          *      PERF_BPF_EVENT_PROG_LOAD        = 1,
1021          *      PERF_BPF_EVENT_PROG_UNLOAD      = 2,
1022          *  };
1023          *
1024          * struct {
1025          *      struct perf_event_header        header;
1026          *      u16                             type;
1027          *      u16                             flags;
1028          *      u32                             id;
1029          *      u8                              tag[BPF_TAG_SIZE];
1030          *      struct sample_id                sample_id;
1031          * };
1032          */
1033         PERF_RECORD_BPF_EVENT                   = 18,
1034
1035         /*
1036          * struct {
1037          *      struct perf_event_header        header;
1038          *      u64                             id;
1039          *      char                            path[];
1040          *      struct sample_id                sample_id;
1041          * };
1042          */
1043         PERF_RECORD_CGROUP                      = 19,
1044
1045         /*
1046          * Records changes to kernel text i.e. self-modified code. 'old_len' is
1047          * the number of old bytes, 'new_len' is the number of new bytes. Either
1048          * 'old_len' or 'new_len' may be zero to indicate, for example, the
1049          * addition or removal of a trampoline. 'bytes' contains the old bytes
1050          * followed immediately by the new bytes.
1051          *
1052          * struct {
1053          *      struct perf_event_header        header;
1054          *      u64                             addr;
1055          *      u16                             old_len;
1056          *      u16                             new_len;
1057          *      u8                              bytes[];
1058          *      struct sample_id                sample_id;
1059          * };
1060          */
1061         PERF_RECORD_TEXT_POKE                   = 20,
1062
1063         PERF_RECORD_MAX,                        /* non-ABI */
1064 };
1065
1066 enum perf_record_ksymbol_type {
1067         PERF_RECORD_KSYMBOL_TYPE_UNKNOWN        = 0,
1068         PERF_RECORD_KSYMBOL_TYPE_BPF            = 1,
1069         /*
1070          * Out of line code such as kprobe-replaced instructions or optimized
1071          * kprobes or ftrace trampolines.
1072          */
1073         PERF_RECORD_KSYMBOL_TYPE_OOL            = 2,
1074         PERF_RECORD_KSYMBOL_TYPE_MAX            /* non-ABI */
1075 };
1076
1077 #define PERF_RECORD_KSYMBOL_FLAGS_UNREGISTER    (1 << 0)
1078
1079 enum perf_bpf_event_type {
1080         PERF_BPF_EVENT_UNKNOWN          = 0,
1081         PERF_BPF_EVENT_PROG_LOAD        = 1,
1082         PERF_BPF_EVENT_PROG_UNLOAD      = 2,
1083         PERF_BPF_EVENT_MAX,             /* non-ABI */
1084 };
1085
1086 #define PERF_MAX_STACK_DEPTH            127
1087 #define PERF_MAX_CONTEXTS_PER_STACK       8
1088
1089 enum perf_callchain_context {
1090         PERF_CONTEXT_HV                 = (__u64)-32,
1091         PERF_CONTEXT_KERNEL             = (__u64)-128,
1092         PERF_CONTEXT_USER               = (__u64)-512,
1093
1094         PERF_CONTEXT_GUEST              = (__u64)-2048,
1095         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
1096         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
1097
1098         PERF_CONTEXT_MAX                = (__u64)-4095,
1099 };
1100
1101 /**
1102  * PERF_RECORD_AUX::flags bits
1103  */
1104 #define PERF_AUX_FLAG_TRUNCATED         0x01    /* record was truncated to fit */
1105 #define PERF_AUX_FLAG_OVERWRITE         0x02    /* snapshot from overwrite mode */
1106 #define PERF_AUX_FLAG_PARTIAL           0x04    /* record contains gaps */
1107 #define PERF_AUX_FLAG_COLLISION         0x08    /* sample collided with another */
1108
1109 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
1110 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
1111 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
1112 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
1113
1114 #if defined(__LITTLE_ENDIAN_BITFIELD)
1115 union perf_mem_data_src {
1116         __u64 val;
1117         struct {
1118                 __u64   mem_op:5,       /* type of opcode */
1119                         mem_lvl:14,     /* memory hierarchy level */
1120                         mem_snoop:5,    /* snoop mode */
1121                         mem_lock:2,     /* lock instr */
1122                         mem_dtlb:7,     /* tlb access */
1123                         mem_lvl_num:4,  /* memory hierarchy level number */
1124                         mem_remote:1,   /* remote */
1125                         mem_snoopx:2,   /* snoop mode, ext */
1126                         mem_rsvd:24;
1127         };
1128 };
1129 #elif defined(__BIG_ENDIAN_BITFIELD)
1130 union perf_mem_data_src {
1131         __u64 val;
1132         struct {
1133                 __u64   mem_rsvd:24,
1134                         mem_snoopx:2,   /* snoop mode, ext */
1135                         mem_remote:1,   /* remote */
1136                         mem_lvl_num:4,  /* memory hierarchy level number */
1137                         mem_dtlb:7,     /* tlb access */
1138                         mem_lock:2,     /* lock instr */
1139                         mem_snoop:5,    /* snoop mode */
1140                         mem_lvl:14,     /* memory hierarchy level */
1141                         mem_op:5;       /* type of opcode */
1142         };
1143 };
1144 #else
1145 #error "Unknown endianness"
1146 #endif
1147
1148 /* type of opcode (load/store/prefetch,code) */
1149 #define PERF_MEM_OP_NA          0x01 /* not available */
1150 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
1151 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
1152 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
1153 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
1154 #define PERF_MEM_OP_SHIFT       0
1155
1156 /* memory hierarchy (memory level, hit or miss) */
1157 #define PERF_MEM_LVL_NA         0x01  /* not available */
1158 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
1159 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
1160 #define PERF_MEM_LVL_L1         0x08  /* L1 */
1161 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
1162 #define PERF_MEM_LVL_L2         0x20  /* L2 */
1163 #define PERF_MEM_LVL_L3         0x40  /* L3 */
1164 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
1165 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
1166 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
1167 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
1168 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
1169 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
1170 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
1171 #define PERF_MEM_LVL_SHIFT      5
1172
1173 #define PERF_MEM_REMOTE_REMOTE  0x01  /* Remote */
1174 #define PERF_MEM_REMOTE_SHIFT   37
1175
1176 #define PERF_MEM_LVLNUM_L1      0x01 /* L1 */
1177 #define PERF_MEM_LVLNUM_L2      0x02 /* L2 */
1178 #define PERF_MEM_LVLNUM_L3      0x03 /* L3 */
1179 #define PERF_MEM_LVLNUM_L4      0x04 /* L4 */
1180 /* 5-0xa available */
1181 #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
1182 #define PERF_MEM_LVLNUM_LFB     0x0c /* LFB */
1183 #define PERF_MEM_LVLNUM_RAM     0x0d /* RAM */
1184 #define PERF_MEM_LVLNUM_PMEM    0x0e /* PMEM */
1185 #define PERF_MEM_LVLNUM_NA      0x0f /* N/A */
1186
1187 #define PERF_MEM_LVLNUM_SHIFT   33
1188
1189 /* snoop mode */
1190 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
1191 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
1192 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
1193 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
1194 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
1195 #define PERF_MEM_SNOOP_SHIFT    19
1196
1197 #define PERF_MEM_SNOOPX_FWD     0x01 /* forward */
1198 /* 1 free */
1199 #define PERF_MEM_SNOOPX_SHIFT   38
1200
1201 /* locked instruction */
1202 #define PERF_MEM_LOCK_NA        0x01 /* not available */
1203 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
1204 #define PERF_MEM_LOCK_SHIFT     24
1205
1206 /* TLB access */
1207 #define PERF_MEM_TLB_NA         0x01 /* not available */
1208 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
1209 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
1210 #define PERF_MEM_TLB_L1         0x08 /* L1 */
1211 #define PERF_MEM_TLB_L2         0x10 /* L2 */
1212 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
1213 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
1214 #define PERF_MEM_TLB_SHIFT      26
1215
1216 #define PERF_MEM_S(a, s) \
1217         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
1218
1219 /*
1220  * single taken branch record layout:
1221  *
1222  *      from: source instruction (may not always be a branch insn)
1223  *        to: branch target
1224  *   mispred: branch target was mispredicted
1225  * predicted: branch target was predicted
1226  *
1227  * support for mispred, predicted is optional. In case it
1228  * is not supported mispred = predicted = 0.
1229  *
1230  *     in_tx: running in a hardware transaction
1231  *     abort: aborting a hardware transaction
1232  *    cycles: cycles from last branch (or 0 if not supported)
1233  *      type: branch type
1234  */
1235 struct perf_branch_entry {
1236         __u64   from;
1237         __u64   to;
1238         __u64   mispred:1,  /* target mispredicted */
1239                 predicted:1,/* target predicted */
1240                 in_tx:1,    /* in transaction */
1241                 abort:1,    /* transaction abort */
1242                 cycles:16,  /* cycle count to last branch */
1243                 type:4,     /* branch type */
1244                 reserved:40;
1245 };
1246
1247 #endif /* _UAPI_LINUX_PERF_EVENT_H */