perf tools powerpc: Add support for extended register capability
[linux-2.6-microblaze.git] / tools / arch / powerpc / include / uapi / asm / perf_regs.h
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _UAPI_ASM_POWERPC_PERF_REGS_H
3 #define _UAPI_ASM_POWERPC_PERF_REGS_H
4
5 enum perf_event_powerpc_regs {
6         PERF_REG_POWERPC_R0,
7         PERF_REG_POWERPC_R1,
8         PERF_REG_POWERPC_R2,
9         PERF_REG_POWERPC_R3,
10         PERF_REG_POWERPC_R4,
11         PERF_REG_POWERPC_R5,
12         PERF_REG_POWERPC_R6,
13         PERF_REG_POWERPC_R7,
14         PERF_REG_POWERPC_R8,
15         PERF_REG_POWERPC_R9,
16         PERF_REG_POWERPC_R10,
17         PERF_REG_POWERPC_R11,
18         PERF_REG_POWERPC_R12,
19         PERF_REG_POWERPC_R13,
20         PERF_REG_POWERPC_R14,
21         PERF_REG_POWERPC_R15,
22         PERF_REG_POWERPC_R16,
23         PERF_REG_POWERPC_R17,
24         PERF_REG_POWERPC_R18,
25         PERF_REG_POWERPC_R19,
26         PERF_REG_POWERPC_R20,
27         PERF_REG_POWERPC_R21,
28         PERF_REG_POWERPC_R22,
29         PERF_REG_POWERPC_R23,
30         PERF_REG_POWERPC_R24,
31         PERF_REG_POWERPC_R25,
32         PERF_REG_POWERPC_R26,
33         PERF_REG_POWERPC_R27,
34         PERF_REG_POWERPC_R28,
35         PERF_REG_POWERPC_R29,
36         PERF_REG_POWERPC_R30,
37         PERF_REG_POWERPC_R31,
38         PERF_REG_POWERPC_NIP,
39         PERF_REG_POWERPC_MSR,
40         PERF_REG_POWERPC_ORIG_R3,
41         PERF_REG_POWERPC_CTR,
42         PERF_REG_POWERPC_LINK,
43         PERF_REG_POWERPC_XER,
44         PERF_REG_POWERPC_CCR,
45         PERF_REG_POWERPC_SOFTE,
46         PERF_REG_POWERPC_TRAP,
47         PERF_REG_POWERPC_DAR,
48         PERF_REG_POWERPC_DSISR,
49         PERF_REG_POWERPC_SIER,
50         PERF_REG_POWERPC_MMCRA,
51         /* Extended registers */
52         PERF_REG_POWERPC_MMCR0,
53         PERF_REG_POWERPC_MMCR1,
54         PERF_REG_POWERPC_MMCR2,
55         /* Max regs without the extended regs */
56         PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
57 };
58
59 #define PERF_REG_PMU_MASK       ((1ULL << PERF_REG_POWERPC_MAX) - 1)
60
61 /* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 */
62 #define PERF_REG_PMU_MASK_300   (((1ULL << (PERF_REG_POWERPC_MMCR2 + 1)) - 1) - PERF_REG_PMU_MASK)
63
64 #define PERF_REG_MAX_ISA_300   (PERF_REG_POWERPC_MMCR2 + 1)
65 #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */