1 // SPDX-License-Identifier: GPL-2.0-only
3 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
6 * Copyright (C) 2015 Intel Corp
7 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
8 * Jeeja KP <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 #include <linux/slab.h>
13 #include <linux/pci.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <uapi/sound/skl-tplg-interface.h>
17 #include "skl-sst-dsp.h"
18 #include "cnl-sst-dsp.h"
19 #include "skl-sst-ipc.h"
21 #include "../common/sst-dsp.h"
22 #include "../common/sst-dsp-priv.h"
23 #include "skl-topology.h"
25 static int skl_alloc_dma_buf(struct device *dev,
26 struct snd_dma_buffer *dmab, size_t size)
28 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev, size, dmab);
31 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
33 snd_dma_free_pages(dmab);
37 #define SKL_ASTATE_PARAM_ID 4
39 void skl_dsp_set_astate_cfg(struct skl_dev *skl, u32 cnt, void *data)
41 struct skl_ipc_large_config_msg msg = {0};
43 msg.large_param_id = SKL_ASTATE_PARAM_ID;
44 msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
47 skl_ipc_set_large_config(&skl->ipc, &msg, data);
50 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
51 int stream_tag, int enable)
53 struct hdac_bus *bus = dev_get_drvdata(dev);
54 struct hdac_stream *stream = snd_hdac_get_stream(bus,
55 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
56 struct hdac_ext_stream *estream;
61 estream = stream_to_hdac_ext_stream(stream);
62 /* enable/disable SPIB for this hdac stream */
63 snd_hdac_ext_stream_spbcap_enable(bus, enable, stream->index);
65 /* set the spib value */
66 snd_hdac_ext_stream_set_spib(bus, estream, size);
71 static int skl_dsp_prepare(struct device *dev, unsigned int format,
72 unsigned int size, struct snd_dma_buffer *dmab)
74 struct hdac_bus *bus = dev_get_drvdata(dev);
75 struct hdac_ext_stream *estream;
76 struct hdac_stream *stream;
77 struct snd_pcm_substream substream;
83 memset(&substream, 0, sizeof(substream));
84 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
86 estream = snd_hdac_ext_stream_assign(bus, &substream,
87 HDAC_EXT_STREAM_TYPE_HOST);
91 stream = hdac_stream(estream);
93 /* assign decouple host dma channel */
94 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
98 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
100 return stream->stream_tag;
103 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
105 struct hdac_bus *bus = dev_get_drvdata(dev);
106 struct hdac_stream *stream;
111 stream = snd_hdac_get_stream(bus,
112 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
116 snd_hdac_dsp_trigger(stream, start);
121 static int skl_dsp_cleanup(struct device *dev,
122 struct snd_dma_buffer *dmab, int stream_tag)
124 struct hdac_bus *bus = dev_get_drvdata(dev);
125 struct hdac_stream *stream;
126 struct hdac_ext_stream *estream;
131 stream = snd_hdac_get_stream(bus,
132 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
136 estream = stream_to_hdac_ext_stream(stream);
137 skl_dsp_setup_spib(dev, 0, stream_tag, false);
138 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
140 snd_hdac_dsp_cleanup(stream, dmab);
145 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
147 struct skl_dsp_loader_ops loader_ops;
149 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
151 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
152 loader_ops.free_dma_buf = skl_free_dma_buf;
157 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
159 struct skl_dsp_loader_ops loader_ops;
161 memset(&loader_ops, 0, sizeof(loader_ops));
163 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
164 loader_ops.free_dma_buf = skl_free_dma_buf;
165 loader_ops.prepare = skl_dsp_prepare;
166 loader_ops.trigger = skl_dsp_trigger;
167 loader_ops.cleanup = skl_dsp_cleanup;
172 static const struct skl_dsp_ops dsp_ops[] = {
176 .loader_ops = skl_get_loader_ops,
177 .init = skl_sst_dsp_init,
178 .init_fw = skl_sst_init_fw,
179 .cleanup = skl_sst_dsp_cleanup
184 .loader_ops = skl_get_loader_ops,
185 .init = skl_sst_dsp_init,
186 .init_fw = skl_sst_init_fw,
187 .cleanup = skl_sst_dsp_cleanup
192 .loader_ops = bxt_get_loader_ops,
193 .init = bxt_sst_dsp_init,
194 .init_fw = bxt_sst_init_fw,
195 .cleanup = bxt_sst_dsp_cleanup
200 .loader_ops = bxt_get_loader_ops,
201 .init = bxt_sst_dsp_init,
202 .init_fw = bxt_sst_init_fw,
203 .cleanup = bxt_sst_dsp_cleanup
208 .loader_ops = bxt_get_loader_ops,
209 .init = cnl_sst_dsp_init,
210 .init_fw = cnl_sst_init_fw,
211 .cleanup = cnl_sst_dsp_cleanup
216 .loader_ops = bxt_get_loader_ops,
217 .init = cnl_sst_dsp_init,
218 .init_fw = cnl_sst_init_fw,
219 .cleanup = cnl_sst_dsp_cleanup
224 .loader_ops = bxt_get_loader_ops,
225 .init = cnl_sst_dsp_init,
226 .init_fw = cnl_sst_init_fw,
227 .cleanup = cnl_sst_dsp_cleanup
232 .loader_ops = bxt_get_loader_ops,
233 .init = cnl_sst_dsp_init,
234 .init_fw = cnl_sst_init_fw,
235 .cleanup = cnl_sst_dsp_cleanup
239 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
243 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
244 if (dsp_ops[i].id == pci_id)
251 int skl_init_dsp(struct skl_dev *skl)
253 void __iomem *mmio_base;
254 struct hdac_bus *bus = skl_to_bus(skl);
255 struct skl_dsp_loader_ops loader_ops;
257 const struct skl_dsp_ops *ops;
258 struct skl_dsp_cores *cores;
261 /* enable ppcap interrupt */
262 snd_hdac_ext_bus_ppcap_enable(bus, true);
263 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
265 /* read the BAR of the ADSP MMIO */
266 mmio_base = pci_ioremap_bar(skl->pci, 4);
267 if (mmio_base == NULL) {
268 dev_err(bus->dev, "ioremap error\n");
272 ops = skl_get_dsp_ops(skl->pci->device);
278 loader_ops = ops->loader_ops();
279 ret = ops->init(bus->dev, mmio_base, irq,
280 skl->fw_name, loader_ops,
288 cores->count = ops->num_cores;
290 cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
296 cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
298 if (!cores->usage_count) {
300 goto free_core_state;
303 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
316 int skl_free_dsp(struct skl_dev *skl)
318 struct hdac_bus *bus = skl_to_bus(skl);
320 /* disable ppcap interrupt */
321 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
323 skl->dsp_ops->cleanup(bus->dev, skl);
325 kfree(skl->cores.state);
326 kfree(skl->cores.usage_count);
328 if (skl->dsp->addr.lpe)
329 iounmap(skl->dsp->addr.lpe);
335 * In the case of "suspend_active" i.e, the Audio IP being active
336 * during system suspend, immediately excecute any pending D0i3 work
337 * before suspending. This is needed for the IP to work in low power
338 * mode during system suspend. In the case of normal suspend, cancel
339 * any pending D0i3 work.
341 int skl_suspend_late_dsp(struct skl_dev *skl)
343 struct delayed_work *dwork;
348 dwork = &skl->d0i3.work;
350 if (dwork->work.func) {
351 if (skl->supend_active)
352 flush_delayed_work(dwork);
354 cancel_delayed_work_sync(dwork);
360 int skl_suspend_dsp(struct skl_dev *skl)
362 struct hdac_bus *bus = skl_to_bus(skl);
365 /* if ppcap is not supported return 0 */
369 ret = skl_dsp_sleep(skl->dsp);
373 /* disable ppcap interrupt */
374 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
375 snd_hdac_ext_bus_ppcap_enable(bus, false);
380 int skl_resume_dsp(struct skl_dev *skl)
382 struct hdac_bus *bus = skl_to_bus(skl);
385 /* if ppcap is not supported return 0 */
389 /* enable ppcap interrupt */
390 snd_hdac_ext_bus_ppcap_enable(bus, true);
391 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
393 /* check if DSP 1st boot is done */
394 if (skl->is_first_boot)
398 * Disable dynamic clock and power gating during firmware
399 * and library download
401 skl->enable_miscbdcge(skl->dev, false);
402 skl->clock_power_gating(skl->dev, false);
404 ret = skl_dsp_wake(skl->dsp);
405 skl->enable_miscbdcge(skl->dev, true);
406 skl->clock_power_gating(skl->dev, true);
410 if (skl->cfg.astate_cfg != NULL) {
411 skl_dsp_set_astate_cfg(skl, skl->cfg.astate_cfg->count,
412 skl->cfg.astate_cfg);
417 enum skl_bitdepth skl_get_bit_depth(int params)
421 return SKL_DEPTH_8BIT;
424 return SKL_DEPTH_16BIT;
427 return SKL_DEPTH_24BIT;
430 return SKL_DEPTH_32BIT;
433 return SKL_DEPTH_INVALID;
439 * Each module in DSP expects a base module configuration, which consists of
440 * PCM format information, which we calculate in driver and resource values
441 * which are read from widget information passed through topology binary
442 * This is send when we create a module with INIT_INSTANCE IPC msg
444 static void skl_set_base_module_format(struct skl_dev *skl,
445 struct skl_module_cfg *mconfig,
446 struct skl_base_cfg *base_cfg)
448 struct skl_module *module = mconfig->module;
449 struct skl_module_res *res = &module->resources[mconfig->res_idx];
450 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
451 struct skl_module_fmt *format = &fmt->inputs[0].fmt;
453 base_cfg->audio_fmt.number_of_channels = format->channels;
455 base_cfg->audio_fmt.s_freq = format->s_freq;
456 base_cfg->audio_fmt.bit_depth = format->bit_depth;
457 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
458 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
459 base_cfg->audio_fmt.sample_type = format->sample_type;
461 dev_dbg(skl->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
462 format->bit_depth, format->valid_bit_depth,
465 base_cfg->audio_fmt.channel_map = format->ch_map;
467 base_cfg->audio_fmt.interleaving = format->interleaving_style;
469 base_cfg->cpc = res->cpc;
470 base_cfg->ibs = res->ibs;
471 base_cfg->obs = res->obs;
472 base_cfg->is_pages = res->is_pages;
475 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
476 struct skl_module_fmt *format)
478 pin_fmt->number_of_channels = format->channels;
479 pin_fmt->s_freq = format->s_freq;
480 pin_fmt->bit_depth = format->bit_depth;
481 pin_fmt->valid_bit_depth = format->valid_bit_depth;
482 pin_fmt->ch_cfg = format->ch_cfg;
483 pin_fmt->sample_type = format->sample_type;
484 pin_fmt->channel_map = format->ch_map;
485 pin_fmt->interleaving = format->interleaving_style;
489 * Any module configuration begins with a base module configuration but
490 * can be followed by a generic extension containing audio format for all
491 * module's pins that are in use.
493 static void skl_set_base_ext_module_format(struct skl_dev *skl,
494 struct skl_module_cfg *mconfig,
495 struct skl_base_cfg_ext *base_cfg_ext)
497 struct skl_module *module = mconfig->module;
498 struct skl_module_pin_resources *pin_res;
499 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
500 struct skl_module_res *res = &module->resources[mconfig->res_idx];
501 struct skl_module_fmt *format;
502 struct skl_pin_format *pin_fmt;
506 base_cfg_ext->nr_input_pins = res->nr_input_pins;
507 base_cfg_ext->nr_output_pins = res->nr_output_pins;
508 base_cfg_ext->priv_param_length =
509 mconfig->formats_config[SKL_PARAM_INIT].caps_size;
511 for (i = 0; i < res->nr_input_pins; i++) {
512 pin_res = &res->input[i];
513 pin_fmt = &base_cfg_ext->pins_fmt[i];
515 pin_fmt->pin_idx = pin_res->pin_index;
516 pin_fmt->buf_size = pin_res->buf_size;
518 format = &fmt->inputs[pin_res->pin_index].fmt;
519 fill_pin_params(&pin_fmt->audio_fmt, format);
522 for (i = 0; i < res->nr_output_pins; i++) {
523 pin_res = &res->output[i];
524 pin_fmt = &base_cfg_ext->pins_fmt[res->nr_input_pins + i];
526 pin_fmt->pin_idx = pin_res->pin_index;
527 pin_fmt->buf_size = pin_res->buf_size;
529 format = &fmt->outputs[pin_res->pin_index].fmt;
530 fill_pin_params(&pin_fmt->audio_fmt, format);
533 if (!base_cfg_ext->priv_param_length)
536 params = (char *)base_cfg_ext + sizeof(struct skl_base_cfg_ext);
537 params += (base_cfg_ext->nr_input_pins + base_cfg_ext->nr_output_pins) *
538 sizeof(struct skl_pin_format);
540 memcpy(params, mconfig->formats_config[SKL_PARAM_INIT].caps,
541 mconfig->formats_config[SKL_PARAM_INIT].caps_size);
545 * Copies copier capabilities into copier module and updates copier module
548 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
549 struct skl_cpr_cfg *cpr_mconfig)
551 if (mconfig->formats_config[SKL_PARAM_INIT].caps_size == 0)
554 memcpy(cpr_mconfig->gtw_cfg.config_data,
555 mconfig->formats_config[SKL_PARAM_INIT].caps,
556 mconfig->formats_config[SKL_PARAM_INIT].caps_size);
558 cpr_mconfig->gtw_cfg.config_length =
559 (mconfig->formats_config[SKL_PARAM_INIT].caps_size) / 4;
562 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
564 * Calculate the gatewat settings required for copier module, type of
565 * gateway and index of gateway to use
567 static u32 skl_get_node_id(struct skl_dev *skl,
568 struct skl_module_cfg *mconfig)
570 union skl_connector_node_id node_id = {0};
571 union skl_ssp_dma_node ssp_node = {0};
572 struct skl_pipe_params *params = mconfig->pipe->p_params;
574 switch (mconfig->dev_type) {
576 node_id.node.dma_type =
577 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
578 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
579 SKL_DMA_I2S_LINK_INPUT_CLASS;
580 node_id.node.vindex = params->host_dma_id +
581 (mconfig->vbus_id << 3);
585 node_id.node.dma_type =
586 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
587 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
588 SKL_DMA_I2S_LINK_INPUT_CLASS;
589 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
590 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
591 node_id.node.vindex = ssp_node.val;
594 case SKL_DEVICE_DMIC:
595 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
596 node_id.node.vindex = mconfig->vbus_id +
597 (mconfig->time_slot);
600 case SKL_DEVICE_HDALINK:
601 node_id.node.dma_type =
602 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
603 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
604 SKL_DMA_HDA_LINK_INPUT_CLASS;
605 node_id.node.vindex = params->link_dma_id;
608 case SKL_DEVICE_HDAHOST:
609 node_id.node.dma_type =
610 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
611 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
612 SKL_DMA_HDA_HOST_INPUT_CLASS;
613 node_id.node.vindex = params->host_dma_id;
617 node_id.val = 0xFFFFFFFF;
624 static void skl_setup_cpr_gateway_cfg(struct skl_dev *skl,
625 struct skl_module_cfg *mconfig,
626 struct skl_cpr_cfg *cpr_mconfig)
629 struct skl_module_res *res;
630 int res_idx = mconfig->res_idx;
632 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(skl, mconfig);
634 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
635 cpr_mconfig->cpr_feature_mask = 0;
639 if (skl->nr_modules) {
640 res = &mconfig->module->resources[mconfig->res_idx];
641 cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
642 goto skip_buf_size_calc;
644 res = &mconfig->module->resources[res_idx];
647 switch (mconfig->hw_conn_type) {
648 case SKL_CONN_SOURCE:
649 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
650 dma_io_buf = res->ibs;
652 dma_io_buf = res->obs;
656 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
657 dma_io_buf = res->obs;
659 dma_io_buf = res->ibs;
663 dev_warn(skl->dev, "wrong connection type: %d\n",
664 mconfig->hw_conn_type);
668 cpr_mconfig->gtw_cfg.dma_buffer_size =
669 mconfig->dma_buffer_size * dma_io_buf;
671 /* fallback to 2ms default value */
672 if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
673 if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
674 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
676 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
680 cpr_mconfig->cpr_feature_mask = 0;
681 cpr_mconfig->gtw_cfg.config_length = 0;
683 skl_copy_copier_caps(mconfig, cpr_mconfig);
686 #define DMA_CONTROL_ID 5
687 #define DMA_I2S_BLOB_SIZE 21
689 int skl_dsp_set_dma_control(struct skl_dev *skl, u32 *caps,
690 u32 caps_size, u32 node_id)
692 struct skl_dma_control *dma_ctrl;
693 struct skl_ipc_large_config_msg msg = {0};
698 * if blob size zero, then return
703 msg.large_param_id = DMA_CONTROL_ID;
704 msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
706 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
707 if (dma_ctrl == NULL)
710 dma_ctrl->node_id = node_id;
713 * NHLT blob may contain additional configs along with i2s blob.
714 * firmware expects only the i2s blob size as the config_length.
715 * So fix to i2s blob size.
718 dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
720 memcpy(dma_ctrl->config_data, caps, caps_size);
722 err = skl_ipc_set_large_config(&skl->ipc, &msg, (u32 *)dma_ctrl);
727 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control);
729 static void skl_setup_out_format(struct skl_dev *skl,
730 struct skl_module_cfg *mconfig,
731 struct skl_audio_data_format *out_fmt)
733 struct skl_module *module = mconfig->module;
734 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
735 struct skl_module_fmt *format = &fmt->outputs[0].fmt;
737 out_fmt->number_of_channels = (u8)format->channels;
738 out_fmt->s_freq = format->s_freq;
739 out_fmt->bit_depth = format->bit_depth;
740 out_fmt->valid_bit_depth = format->valid_bit_depth;
741 out_fmt->ch_cfg = format->ch_cfg;
743 out_fmt->channel_map = format->ch_map;
744 out_fmt->interleaving = format->interleaving_style;
745 out_fmt->sample_type = format->sample_type;
747 dev_dbg(skl->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
748 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
752 * DSP needs SRC module for frequency conversion, SRC takes base module
753 * configuration and the target frequency as extra parameter passed as src
756 static void skl_set_src_format(struct skl_dev *skl,
757 struct skl_module_cfg *mconfig,
758 struct skl_src_module_cfg *src_mconfig)
760 struct skl_module *module = mconfig->module;
761 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
762 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
764 skl_set_base_module_format(skl, mconfig,
765 (struct skl_base_cfg *)src_mconfig);
767 src_mconfig->src_cfg = fmt->s_freq;
771 * DSP needs updown module to do channel conversion. updown module take base
772 * module configuration and channel configuration
773 * It also take coefficients and now we have defaults applied here
775 static void skl_set_updown_mixer_format(struct skl_dev *skl,
776 struct skl_module_cfg *mconfig,
777 struct skl_up_down_mixer_cfg *mixer_mconfig)
779 struct skl_module *module = mconfig->module;
780 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
781 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
783 skl_set_base_module_format(skl, mconfig,
784 (struct skl_base_cfg *)mixer_mconfig);
785 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
786 mixer_mconfig->ch_map = fmt->ch_map;
790 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
791 * dma) or link (hda link, SSP, PDM)
792 * Here we calculate the copier module parameters, like PCM format, output
793 * format, gateway settings
794 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
796 static void skl_set_copier_format(struct skl_dev *skl,
797 struct skl_module_cfg *mconfig,
798 struct skl_cpr_cfg *cpr_mconfig)
800 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
801 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
803 skl_set_base_module_format(skl, mconfig, base_cfg);
805 skl_setup_out_format(skl, mconfig, out_fmt);
806 skl_setup_cpr_gateway_cfg(skl, mconfig, cpr_mconfig);
810 * Mic select module allows selecting one or many input channels, thus
813 * Mic select module take base module configuration and out-format
816 static void skl_set_base_outfmt_format(struct skl_dev *skl,
817 struct skl_module_cfg *mconfig,
818 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
820 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
821 struct skl_base_cfg *base_cfg =
822 (struct skl_base_cfg *)base_outfmt_mcfg;
824 skl_set_base_module_format(skl, mconfig, base_cfg);
825 skl_setup_out_format(skl, mconfig, out_fmt);
828 static u16 skl_get_module_param_size(struct skl_dev *skl,
829 struct skl_module_cfg *mconfig)
831 struct skl_module_res *res;
832 struct skl_module *module = mconfig->module;
835 switch (mconfig->m_type) {
836 case SKL_MODULE_TYPE_COPIER:
837 param_size = sizeof(struct skl_cpr_cfg);
838 param_size += mconfig->formats_config[SKL_PARAM_INIT].caps_size;
841 case SKL_MODULE_TYPE_SRCINT:
842 return sizeof(struct skl_src_module_cfg);
844 case SKL_MODULE_TYPE_UPDWMIX:
845 return sizeof(struct skl_up_down_mixer_cfg);
847 case SKL_MODULE_TYPE_BASE_OUTFMT:
848 case SKL_MODULE_TYPE_MIC_SELECT:
849 return sizeof(struct skl_base_outfmt_cfg);
851 case SKL_MODULE_TYPE_MIXER:
852 case SKL_MODULE_TYPE_KPB:
853 return sizeof(struct skl_base_cfg);
855 case SKL_MODULE_TYPE_ALGO:
857 res = &module->resources[mconfig->res_idx];
859 param_size = sizeof(struct skl_base_cfg) + sizeof(struct skl_base_cfg_ext);
860 param_size += (res->nr_input_pins + res->nr_output_pins) *
861 sizeof(struct skl_pin_format);
862 param_size += mconfig->formats_config[SKL_PARAM_INIT].caps_size;
871 * DSP firmware supports various modules like copier, SRC, updown etc.
872 * These modules required various parameters to be calculated and sent for
873 * the module initialization to DSP. By default a generic module needs only
874 * base module format configuration
877 static int skl_set_module_format(struct skl_dev *skl,
878 struct skl_module_cfg *module_config,
879 u16 *module_config_size,
884 param_size = skl_get_module_param_size(skl, module_config);
886 *param_data = kzalloc(param_size, GFP_KERNEL);
887 if (NULL == *param_data)
890 *module_config_size = param_size;
892 switch (module_config->m_type) {
893 case SKL_MODULE_TYPE_COPIER:
894 skl_set_copier_format(skl, module_config, *param_data);
897 case SKL_MODULE_TYPE_SRCINT:
898 skl_set_src_format(skl, module_config, *param_data);
901 case SKL_MODULE_TYPE_UPDWMIX:
902 skl_set_updown_mixer_format(skl, module_config, *param_data);
905 case SKL_MODULE_TYPE_BASE_OUTFMT:
906 case SKL_MODULE_TYPE_MIC_SELECT:
907 skl_set_base_outfmt_format(skl, module_config, *param_data);
910 case SKL_MODULE_TYPE_MIXER:
911 case SKL_MODULE_TYPE_KPB:
912 skl_set_base_module_format(skl, module_config, *param_data);
915 case SKL_MODULE_TYPE_ALGO:
917 skl_set_base_module_format(skl, module_config, *param_data);
918 skl_set_base_ext_module_format(skl, module_config,
920 sizeof(struct skl_base_cfg));
924 dev_dbg(skl->dev, "Module type=%d id=%d config size: %d bytes\n",
925 module_config->m_type, module_config->id.module_id,
927 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
928 *param_data, param_size, false);
932 static int skl_get_queue_index(struct skl_module_pin *mpin,
933 struct skl_module_inst_id id, int max)
937 for (i = 0; i < max; i++) {
938 if (mpin[i].id.module_id == id.module_id &&
939 mpin[i].id.instance_id == id.instance_id)
947 * Allocates queue for each module.
948 * if dynamic, the pin_index is allocated 0 to max_pin.
949 * In static, the pin_index is fixed based on module_id and instance id
951 static int skl_alloc_queue(struct skl_module_pin *mpin,
952 struct skl_module_cfg *tgt_cfg, int max)
955 struct skl_module_inst_id id = tgt_cfg->id;
957 * if pin in dynamic, find first free pin
958 * otherwise find match module and instance id pin as topology will
959 * ensure a unique pin is assigned to this so no need to
962 for (i = 0; i < max; i++) {
963 if (mpin[i].is_dynamic) {
964 if (!mpin[i].in_use &&
965 mpin[i].pin_state == SKL_PIN_UNBIND) {
967 mpin[i].in_use = true;
968 mpin[i].id.module_id = id.module_id;
969 mpin[i].id.instance_id = id.instance_id;
970 mpin[i].id.pvt_id = id.pvt_id;
971 mpin[i].tgt_mcfg = tgt_cfg;
975 if (mpin[i].id.module_id == id.module_id &&
976 mpin[i].id.instance_id == id.instance_id &&
977 mpin[i].pin_state == SKL_PIN_UNBIND) {
979 mpin[i].tgt_mcfg = tgt_cfg;
988 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
990 if (mpin[q_index].is_dynamic) {
991 mpin[q_index].in_use = false;
992 mpin[q_index].id.module_id = 0;
993 mpin[q_index].id.instance_id = 0;
994 mpin[q_index].id.pvt_id = 0;
996 mpin[q_index].pin_state = SKL_PIN_UNBIND;
997 mpin[q_index].tgt_mcfg = NULL;
1000 /* Module state will be set to unint, if all the out pin state is UNBIND */
1002 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
1003 struct skl_module_cfg *mcfg)
1008 for (i = 0; i < max; i++) {
1009 if (mpin[i].pin_state == SKL_PIN_UNBIND)
1016 mcfg->m_state = SKL_MODULE_INIT_DONE;
1021 * A module needs to be instanataited in DSP. A mdoule is present in a
1022 * collection of module referred as a PIPE.
1023 * We first calculate the module format, based on module type and then
1024 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
1026 int skl_init_module(struct skl_dev *skl,
1027 struct skl_module_cfg *mconfig)
1029 u16 module_config_size = 0;
1030 void *param_data = NULL;
1032 struct skl_ipc_init_instance_msg msg;
1034 dev_dbg(skl->dev, "%s: module_id = %d instance=%d\n", __func__,
1035 mconfig->id.module_id, mconfig->id.pvt_id);
1037 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1038 dev_err(skl->dev, "Pipe not created state= %d pipe_id= %d\n",
1039 mconfig->pipe->state, mconfig->pipe->ppl_id);
1043 ret = skl_set_module_format(skl, mconfig,
1044 &module_config_size, ¶m_data);
1046 dev_err(skl->dev, "Failed to set module format ret=%d\n", ret);
1050 msg.module_id = mconfig->id.module_id;
1051 msg.instance_id = mconfig->id.pvt_id;
1052 msg.ppl_instance_id = mconfig->pipe->ppl_id;
1053 msg.param_data_size = module_config_size;
1054 msg.core_id = mconfig->core_id;
1055 msg.domain = mconfig->domain;
1057 ret = skl_ipc_init_instance(&skl->ipc, &msg, param_data);
1059 dev_err(skl->dev, "Failed to init instance ret=%d\n", ret);
1063 mconfig->m_state = SKL_MODULE_INIT_DONE;
1068 static void skl_dump_bind_info(struct skl_dev *skl, struct skl_module_cfg
1069 *src_module, struct skl_module_cfg *dst_module)
1071 dev_dbg(skl->dev, "%s: src module_id = %d src_instance=%d\n",
1072 __func__, src_module->id.module_id, src_module->id.pvt_id);
1073 dev_dbg(skl->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1074 dst_module->id.module_id, dst_module->id.pvt_id);
1076 dev_dbg(skl->dev, "src_module state = %d dst module state = %d\n",
1077 src_module->m_state, dst_module->m_state);
1081 * On module freeup, we need to unbind the module with modules
1082 * it is already bind.
1083 * Find the pin allocated and unbind then using bind_unbind IPC
1085 int skl_unbind_modules(struct skl_dev *skl,
1086 struct skl_module_cfg *src_mcfg,
1087 struct skl_module_cfg *dst_mcfg)
1090 struct skl_ipc_bind_unbind_msg msg;
1091 struct skl_module_inst_id src_id = src_mcfg->id;
1092 struct skl_module_inst_id dst_id = dst_mcfg->id;
1093 int in_max = dst_mcfg->module->max_input_pins;
1094 int out_max = src_mcfg->module->max_output_pins;
1095 int src_index, dst_index, src_pin_state, dst_pin_state;
1097 skl_dump_bind_info(skl, src_mcfg, dst_mcfg);
1099 /* get src queue index */
1100 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1104 msg.src_queue = src_index;
1106 /* get dst queue index */
1107 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1111 msg.dst_queue = dst_index;
1113 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1114 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1116 if (src_pin_state != SKL_PIN_BIND_DONE ||
1117 dst_pin_state != SKL_PIN_BIND_DONE)
1120 msg.module_id = src_mcfg->id.module_id;
1121 msg.instance_id = src_mcfg->id.pvt_id;
1122 msg.dst_module_id = dst_mcfg->id.module_id;
1123 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1126 ret = skl_ipc_bind_unbind(&skl->ipc, &msg);
1128 /* free queue only if unbind is success */
1129 skl_free_queue(src_mcfg->m_out_pin, src_index);
1130 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1133 * check only if src module bind state, bind is
1134 * always from src -> sink
1136 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1142 #define CPR_SINK_FMT_PARAM_ID 2
1145 * Once a module is instantiated it need to be 'bind' with other modules in
1146 * the pipeline. For binding we need to find the module pins which are bind
1148 * This function finds the pins and then sends bund_unbind IPC message to
1149 * DSP using IPC helper
1151 int skl_bind_modules(struct skl_dev *skl,
1152 struct skl_module_cfg *src_mcfg,
1153 struct skl_module_cfg *dst_mcfg)
1156 struct skl_ipc_bind_unbind_msg msg;
1157 int in_max = dst_mcfg->module->max_input_pins;
1158 int out_max = src_mcfg->module->max_output_pins;
1159 int src_index, dst_index;
1160 struct skl_module_fmt *format;
1161 struct skl_cpr_pin_fmt pin_fmt;
1162 struct skl_module *module;
1163 struct skl_module_iface *fmt;
1165 skl_dump_bind_info(skl, src_mcfg, dst_mcfg);
1167 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1168 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1171 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1175 msg.src_queue = src_index;
1176 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1177 if (dst_index < 0) {
1178 skl_free_queue(src_mcfg->m_out_pin, src_index);
1183 * Copier module requires the separate large_config_set_ipc to
1184 * configure the pins other than 0
1186 if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1187 pin_fmt.sink_id = src_index;
1188 module = src_mcfg->module;
1189 fmt = &module->formats[src_mcfg->fmt_idx];
1191 /* Input fmt is same as that of src module input cfg */
1192 format = &fmt->inputs[0].fmt;
1193 fill_pin_params(&(pin_fmt.src_fmt), format);
1195 format = &fmt->outputs[src_index].fmt;
1196 fill_pin_params(&(pin_fmt.dst_fmt), format);
1197 ret = skl_set_module_params(skl, (void *)&pin_fmt,
1198 sizeof(struct skl_cpr_pin_fmt),
1199 CPR_SINK_FMT_PARAM_ID, src_mcfg);
1205 msg.dst_queue = dst_index;
1207 dev_dbg(skl->dev, "src queue = %d dst queue =%d\n",
1208 msg.src_queue, msg.dst_queue);
1210 msg.module_id = src_mcfg->id.module_id;
1211 msg.instance_id = src_mcfg->id.pvt_id;
1212 msg.dst_module_id = dst_mcfg->id.module_id;
1213 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1216 ret = skl_ipc_bind_unbind(&skl->ipc, &msg);
1219 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1220 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1221 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1225 /* error case , if IPC fails, clear the queue index */
1226 skl_free_queue(src_mcfg->m_out_pin, src_index);
1227 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1232 static int skl_set_pipe_state(struct skl_dev *skl, struct skl_pipe *pipe,
1233 enum skl_ipc_pipeline_state state)
1235 dev_dbg(skl->dev, "%s: pipe_state = %d\n", __func__, state);
1237 return skl_ipc_set_pipeline_state(&skl->ipc, pipe->ppl_id, state);
1241 * A pipeline is a collection of modules. Before a module in instantiated a
1242 * pipeline needs to be created for it.
1243 * This function creates pipeline, by sending create pipeline IPC messages
1246 int skl_create_pipeline(struct skl_dev *skl, struct skl_pipe *pipe)
1250 dev_dbg(skl->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1252 ret = skl_ipc_create_pipeline(&skl->ipc, pipe->memory_pages,
1253 pipe->pipe_priority, pipe->ppl_id,
1256 dev_err(skl->dev, "Failed to create pipeline\n");
1260 pipe->state = SKL_PIPE_CREATED;
1266 * A pipeline needs to be deleted on cleanup. If a pipeline is running,
1267 * then pause it first. Before actual deletion, pipeline should enter
1268 * reset state. Finish the procedure by sending delete pipeline IPC.
1269 * DSP will stop the DMA engines and release resources
1271 int skl_delete_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1275 dev_dbg(skl->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1277 /* If pipe was not created in FW, do not try to delete it */
1278 if (pipe->state < SKL_PIPE_CREATED)
1281 /* If pipe is started, do stop the pipe in FW. */
1282 if (pipe->state >= SKL_PIPE_STARTED) {
1283 ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1285 dev_err(skl->dev, "Failed to stop pipeline\n");
1289 pipe->state = SKL_PIPE_PAUSED;
1292 /* reset pipe state before deletion */
1293 ret = skl_set_pipe_state(skl, pipe, PPL_RESET);
1295 dev_err(skl->dev, "Failed to reset pipe ret=%d\n", ret);
1299 pipe->state = SKL_PIPE_RESET;
1301 ret = skl_ipc_delete_pipeline(&skl->ipc, pipe->ppl_id);
1303 dev_err(skl->dev, "Failed to delete pipeline\n");
1307 pipe->state = SKL_PIPE_INVALID;
1313 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1314 * For processing data the pipe need to be run by sending IPC set pipe state
1317 int skl_run_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1321 dev_dbg(skl->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1323 /* If pipe was not created in FW, do not try to pause or delete */
1324 if (pipe->state < SKL_PIPE_CREATED)
1327 /* Pipe has to be paused before it is started */
1328 ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1330 dev_err(skl->dev, "Failed to pause pipe\n");
1334 pipe->state = SKL_PIPE_PAUSED;
1336 ret = skl_set_pipe_state(skl, pipe, PPL_RUNNING);
1338 dev_err(skl->dev, "Failed to start pipe\n");
1342 pipe->state = SKL_PIPE_STARTED;
1348 * Stop the pipeline by sending set pipe state IPC
1349 * DSP doesnt implement stop so we always send pause message
1351 int skl_stop_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1355 dev_dbg(skl->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1357 /* If pipe was not created in FW, do not try to pause or delete */
1358 if (pipe->state < SKL_PIPE_PAUSED)
1361 ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1363 dev_dbg(skl->dev, "Failed to stop pipe\n");
1367 pipe->state = SKL_PIPE_PAUSED;
1373 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1376 int skl_reset_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1380 /* If pipe was not created in FW, do not try to pause or delete */
1381 if (pipe->state < SKL_PIPE_PAUSED)
1384 ret = skl_set_pipe_state(skl, pipe, PPL_RESET);
1386 dev_dbg(skl->dev, "Failed to reset pipe ret=%d\n", ret);
1390 pipe->state = SKL_PIPE_RESET;
1395 /* Algo parameter set helper function */
1396 int skl_set_module_params(struct skl_dev *skl, u32 *params, int size,
1397 u32 param_id, struct skl_module_cfg *mcfg)
1399 struct skl_ipc_large_config_msg msg;
1401 msg.module_id = mcfg->id.module_id;
1402 msg.instance_id = mcfg->id.pvt_id;
1403 msg.param_data_size = size;
1404 msg.large_param_id = param_id;
1406 return skl_ipc_set_large_config(&skl->ipc, &msg, params);
1409 int skl_get_module_params(struct skl_dev *skl, u32 *params, int size,
1410 u32 param_id, struct skl_module_cfg *mcfg)
1412 struct skl_ipc_large_config_msg msg;
1413 size_t bytes = size;
1415 msg.module_id = mcfg->id.module_id;
1416 msg.instance_id = mcfg->id.pvt_id;
1417 msg.param_data_size = size;
1418 msg.large_param_id = param_id;
1420 return skl_ipc_get_large_config(&skl->ipc, &msg, ¶ms, &bytes);