sound/soc/codecs/wm_adsp.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * wm_adsp.c  --  Wolfson ADSP support
   4  *
   5  * Copyright 2012 Wolfson Microelectronics plc
   6  *
   7  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   8  */
   9
  10 #include <linux/ctype.h>
  11 #include <linux/module.h>
  12 #include <linux/moduleparam.h>
  13 #include <linux/init.h>
  14 #include <linux/delay.h>
  15 #include <linux/firmware.h>
  16 #include <linux/list.h>
  17 #include <linux/pm.h>
  18 #include <linux/pm_runtime.h>
  19 #include <linux/regmap.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <linux/slab.h>
  22 #include <linux/vmalloc.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/debugfs.h>
  25 #include <sound/core.h>
  26 #include <sound/pcm.h>
  27 #include <sound/pcm_params.h>
  28 #include <sound/soc.h>
  29 #include <sound/jack.h>
  30 #include <sound/initval.h>
  31 #include <sound/tlv.h>
  32
  33 #include "wm_adsp.h"
  34
  35 #define adsp_crit(_dsp, fmt, ...) \
  36         dev_crit(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
  37 #define adsp_err(_dsp, fmt, ...) \
  38         dev_err(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
  39 #define adsp_warn(_dsp, fmt, ...) \
  40         dev_warn(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
  41 #define adsp_info(_dsp, fmt, ...) \
  42         dev_info(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
  43 #define adsp_dbg(_dsp, fmt, ...) \
  44         dev_dbg(_dsp->dev, "%s: " fmt, _dsp->name, ##__VA_ARGS__)
  45
  46 #define compr_err(_obj, fmt, ...) \
  47         adsp_err(_obj->dsp, "%s: " fmt, _obj->name ? _obj->name : "legacy", \
  48                  ##__VA_ARGS__)
  49 #define compr_dbg(_obj, fmt, ...) \
  50         adsp_dbg(_obj->dsp, "%s: " fmt, _obj->name ? _obj->name : "legacy", \
  51                  ##__VA_ARGS__)
  52
  53 #define ADSP1_CONTROL_1                   0x00
  54 #define ADSP1_CONTROL_2                   0x02
  55 #define ADSP1_CONTROL_3                   0x03
  56 #define ADSP1_CONTROL_4                   0x04
  57 #define ADSP1_CONTROL_5                   0x06
  58 #define ADSP1_CONTROL_6                   0x07
  59 #define ADSP1_CONTROL_7                   0x08
  60 #define ADSP1_CONTROL_8                   0x09
  61 #define ADSP1_CONTROL_9                   0x0A
  62 #define ADSP1_CONTROL_10                  0x0B
  63 #define ADSP1_CONTROL_11                  0x0C
  64 #define ADSP1_CONTROL_12                  0x0D
  65 #define ADSP1_CONTROL_13                  0x0F
  66 #define ADSP1_CONTROL_14                  0x10
  67 #define ADSP1_CONTROL_15                  0x11
  68 #define ADSP1_CONTROL_16                  0x12
  69 #define ADSP1_CONTROL_17                  0x13
  70 #define ADSP1_CONTROL_18                  0x14
  71 #define ADSP1_CONTROL_19                  0x16
  72 #define ADSP1_CONTROL_20                  0x17
  73 #define ADSP1_CONTROL_21                  0x18
  74 #define ADSP1_CONTROL_22                  0x1A
  75 #define ADSP1_CONTROL_23                  0x1B
  76 #define ADSP1_CONTROL_24                  0x1C
  77 #define ADSP1_CONTROL_25                  0x1E
  78 #define ADSP1_CONTROL_26                  0x20
  79 #define ADSP1_CONTROL_27                  0x21
  80 #define ADSP1_CONTROL_28                  0x22
  81 #define ADSP1_CONTROL_29                  0x23
  82 #define ADSP1_CONTROL_30                  0x24
  83 #define ADSP1_CONTROL_31                  0x26
  84
  85 /*
  86  * ADSP1 Control 19
  87  */
  88 #define ADSP1_WDMA_BUFFER_LENGTH_MASK     0x00FF  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
  89 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT         0  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
  90 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH         8  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
  91
  92
  93 /*
  94  * ADSP1 Control 30
  95  */
  96 #define ADSP1_DBG_CLK_ENA                 0x0008  /* DSP1_DBG_CLK_ENA */
  97 #define ADSP1_DBG_CLK_ENA_MASK            0x0008  /* DSP1_DBG_CLK_ENA */
  98 #define ADSP1_DBG_CLK_ENA_SHIFT                3  /* DSP1_DBG_CLK_ENA */
  99 #define ADSP1_DBG_CLK_ENA_WIDTH                1  /* DSP1_DBG_CLK_ENA */
 100 #define ADSP1_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
 101 #define ADSP1_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
 102 #define ADSP1_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
 103 #define ADSP1_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
 104 #define ADSP1_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
 105 #define ADSP1_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
 106 #define ADSP1_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
 107 #define ADSP1_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
 108 #define ADSP1_START                       0x0001  /* DSP1_START */
 109 #define ADSP1_START_MASK                  0x0001  /* DSP1_START */
 110 #define ADSP1_START_SHIFT                      0  /* DSP1_START */
 111 #define ADSP1_START_WIDTH                      1  /* DSP1_START */
 112
 113 /*
 114  * ADSP1 Control 31
 115  */
 116 #define ADSP1_CLK_SEL_MASK                0x0007  /* CLK_SEL_ENA */
 117 #define ADSP1_CLK_SEL_SHIFT                    0  /* CLK_SEL_ENA */
 118 #define ADSP1_CLK_SEL_WIDTH                    3  /* CLK_SEL_ENA */
 119
 120 #define ADSP2_CONTROL                     0x0
 121 #define ADSP2_CLOCKING                    0x1
 122 #define ADSP2V2_CLOCKING                  0x2
 123 #define ADSP2_STATUS1                     0x4
 124 #define ADSP2_WDMA_CONFIG_1               0x30
 125 #define ADSP2_WDMA_CONFIG_2               0x31
 126 #define ADSP2V2_WDMA_CONFIG_2             0x32
 127 #define ADSP2_RDMA_CONFIG_1               0x34
 128
 129 #define ADSP2_SCRATCH0                    0x40
 130 #define ADSP2_SCRATCH1                    0x41
 131 #define ADSP2_SCRATCH2                    0x42
 132 #define ADSP2_SCRATCH3                    0x43
 133
 134 #define ADSP2V2_SCRATCH0_1                0x40
 135 #define ADSP2V2_SCRATCH2_3                0x42
 136
 137 /*
 138  * ADSP2 Control
 139  */
 140
 141 #define ADSP2_MEM_ENA                     0x0010  /* DSP1_MEM_ENA */
 142 #define ADSP2_MEM_ENA_MASK                0x0010  /* DSP1_MEM_ENA */
 143 #define ADSP2_MEM_ENA_SHIFT                    4  /* DSP1_MEM_ENA */
 144 #define ADSP2_MEM_ENA_WIDTH                    1  /* DSP1_MEM_ENA */
 145 #define ADSP2_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
 146 #define ADSP2_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
 147 #define ADSP2_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
 148 #define ADSP2_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
 149 #define ADSP2_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
 150 #define ADSP2_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
 151 #define ADSP2_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
 152 #define ADSP2_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
 153 #define ADSP2_START                       0x0001  /* DSP1_START */
 154 #define ADSP2_START_MASK                  0x0001  /* DSP1_START */
 155 #define ADSP2_START_SHIFT                      0  /* DSP1_START */
 156 #define ADSP2_START_WIDTH                      1  /* DSP1_START */
 157
 158 /*
 159  * ADSP2 clocking
 160  */
 161 #define ADSP2_CLK_SEL_MASK                0x0007  /* CLK_SEL_ENA */
 162 #define ADSP2_CLK_SEL_SHIFT                    0  /* CLK_SEL_ENA */
 163 #define ADSP2_CLK_SEL_WIDTH                    3  /* CLK_SEL_ENA */
 164
 165 /*
 166  * ADSP2V2 clocking
 167  */
 168 #define ADSP2V2_CLK_SEL_MASK             0x70000  /* CLK_SEL_ENA */
 169 #define ADSP2V2_CLK_SEL_SHIFT                 16  /* CLK_SEL_ENA */
 170 #define ADSP2V2_CLK_SEL_WIDTH                  3  /* CLK_SEL_ENA */
 171
 172 #define ADSP2V2_RATE_MASK                 0x7800  /* DSP_RATE */
 173 #define ADSP2V2_RATE_SHIFT                    11  /* DSP_RATE */
 174 #define ADSP2V2_RATE_WIDTH                     4  /* DSP_RATE */
 175
 176 /*
 177  * ADSP2 Status 1
 178  */
 179 #define ADSP2_RAM_RDY                     0x0001
 180 #define ADSP2_RAM_RDY_MASK                0x0001
 181 #define ADSP2_RAM_RDY_SHIFT                    0
 182 #define ADSP2_RAM_RDY_WIDTH                    1
 183
 184 /*
 185  * ADSP2 Lock support
 186  */
 187 #define ADSP2_LOCK_CODE_0                    0x5555
 188 #define ADSP2_LOCK_CODE_1                    0xAAAA
 189
 190 #define ADSP2_WATCHDOG                       0x0A
 191 #define ADSP2_BUS_ERR_ADDR                   0x52
 192 #define ADSP2_REGION_LOCK_STATUS             0x64
 193 #define ADSP2_LOCK_REGION_1_LOCK_REGION_0    0x66
 194 #define ADSP2_LOCK_REGION_3_LOCK_REGION_2    0x68
 195 #define ADSP2_LOCK_REGION_5_LOCK_REGION_4    0x6A
 196 #define ADSP2_LOCK_REGION_7_LOCK_REGION_6    0x6C
 197 #define ADSP2_LOCK_REGION_9_LOCK_REGION_8    0x6E
 198 #define ADSP2_LOCK_REGION_CTRL               0x7A
 199 #define ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR    0x7C
 200
 201 #define ADSP2_REGION_LOCK_ERR_MASK           0x8000
 202 #define ADSP2_ADDR_ERR_MASK                  0x4000
 203 #define ADSP2_WDT_TIMEOUT_STS_MASK           0x2000
 204 #define ADSP2_CTRL_ERR_PAUSE_ENA             0x0002
 205 #define ADSP2_CTRL_ERR_EINT                  0x0001
 206
 207 #define ADSP2_BUS_ERR_ADDR_MASK              0x00FFFFFF
 208 #define ADSP2_XMEM_ERR_ADDR_MASK             0x0000FFFF
 209 #define ADSP2_PMEM_ERR_ADDR_MASK             0x7FFF0000
 210 #define ADSP2_PMEM_ERR_ADDR_SHIFT            16
 211 #define ADSP2_WDT_ENA_MASK                   0xFFFFFFFD
 212
 213 #define ADSP2_LOCK_REGION_SHIFT              16
 214
 215 #define ADSP_MAX_STD_CTRL_SIZE               512
 216
 217 #define WM_ADSP_ACKED_CTL_TIMEOUT_MS         100
 218 #define WM_ADSP_ACKED_CTL_N_QUICKPOLLS       10
 219 #define WM_ADSP_ACKED_CTL_MIN_VALUE          0
 220 #define WM_ADSP_ACKED_CTL_MAX_VALUE          0xFFFFFF
 221
 222 /*
 223  * Event control messages
 224  */
 225 #define WM_ADSP_FW_EVENT_SHUTDOWN            0x000001
 226
 227 /*
 228  * HALO system info
 229  */
 230 #define HALO_AHBM_WINDOW_DEBUG_0             0x02040
 231 #define HALO_AHBM_WINDOW_DEBUG_1             0x02044
 232
 233 /*
 234  * HALO core
 235  */
 236 #define HALO_SCRATCH1                        0x005c0
 237 #define HALO_SCRATCH2                        0x005c8
 238 #define HALO_SCRATCH3                        0x005d0
 239 #define HALO_SCRATCH4                        0x005d8
 240 #define HALO_CCM_CORE_CONTROL                0x41000
 241 #define HALO_CORE_SOFT_RESET                 0x00010
 242 #define HALO_WDT_CONTROL                     0x47000
 243
 244 /*
 245  * HALO MPU banks
 246  */
 247 #define HALO_MPU_XMEM_ACCESS_0               0x43000
 248 #define HALO_MPU_YMEM_ACCESS_0               0x43004
 249 #define HALO_MPU_WINDOW_ACCESS_0             0x43008
 250 #define HALO_MPU_XREG_ACCESS_0               0x4300C
 251 #define HALO_MPU_YREG_ACCESS_0               0x43014
 252 #define HALO_MPU_XMEM_ACCESS_1               0x43018
 253 #define HALO_MPU_YMEM_ACCESS_1               0x4301C
 254 #define HALO_MPU_WINDOW_ACCESS_1             0x43020
 255 #define HALO_MPU_XREG_ACCESS_1               0x43024
 256 #define HALO_MPU_YREG_ACCESS_1               0x4302C
 257 #define HALO_MPU_XMEM_ACCESS_2               0x43030
 258 #define HALO_MPU_YMEM_ACCESS_2               0x43034
 259 #define HALO_MPU_WINDOW_ACCESS_2             0x43038
 260 #define HALO_MPU_XREG_ACCESS_2               0x4303C
 261 #define HALO_MPU_YREG_ACCESS_2               0x43044
 262 #define HALO_MPU_XMEM_ACCESS_3               0x43048
 263 #define HALO_MPU_YMEM_ACCESS_3               0x4304C
 264 #define HALO_MPU_WINDOW_ACCESS_3             0x43050
 265 #define HALO_MPU_XREG_ACCESS_3               0x43054
 266 #define HALO_MPU_YREG_ACCESS_3               0x4305C
 267 #define HALO_MPU_XM_VIO_ADDR                 0x43100
 268 #define HALO_MPU_XM_VIO_STATUS               0x43104
 269 #define HALO_MPU_YM_VIO_ADDR                 0x43108
 270 #define HALO_MPU_YM_VIO_STATUS               0x4310C
 271 #define HALO_MPU_PM_VIO_ADDR                 0x43110
 272 #define HALO_MPU_PM_VIO_STATUS               0x43114
 273 #define HALO_MPU_LOCK_CONFIG                 0x43140
 274
 275 /*
 276  * HALO_AHBM_WINDOW_DEBUG_1
 277  */
 278 #define HALO_AHBM_CORE_ERR_ADDR_MASK         0x0fffff00
 279 #define HALO_AHBM_CORE_ERR_ADDR_SHIFT                 8
 280 #define HALO_AHBM_FLAGS_ERR_MASK             0x000000ff
 281
 282 /*
 283  * HALO_CCM_CORE_CONTROL
 284  */
 285 #define HALO_CORE_EN                        0x00000001
 286
 287 /*
 288  * HALO_CORE_SOFT_RESET
 289  */
 290 #define HALO_CORE_SOFT_RESET_MASK           0x00000001
 291
 292 /*
 293  * HALO_WDT_CONTROL
 294  */
 295 #define HALO_WDT_EN_MASK                    0x00000001
 296
 297 /*
 298  * HALO_MPU_?M_VIO_STATUS
 299  */
 300 #define HALO_MPU_VIO_STS_MASK               0x007e0000
 301 #define HALO_MPU_VIO_STS_SHIFT                      17
 302 #define HALO_MPU_VIO_ERR_WR_MASK            0x00008000
 303 #define HALO_MPU_VIO_ERR_SRC_MASK           0x00007fff
 304 #define HALO_MPU_VIO_ERR_SRC_SHIFT                   0
 305
 306 static struct wm_adsp_ops wm_adsp1_ops;
 307 static struct wm_adsp_ops wm_adsp2_ops[];
 308 static struct wm_adsp_ops wm_halo_ops;
 309
 310 struct wm_adsp_buf {
 311         struct list_head list;
 312         void *buf;
 313 };
 314
 315 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
 316                                              struct list_head *list)
 317 {
 318         struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
 319
 320         if (buf == NULL)
 321                 return NULL;
 322
 323         buf->buf = vmalloc(len);
 324         if (!buf->buf) {
 325                 kfree(buf);
 326                 return NULL;
 327         }
 328         memcpy(buf->buf, src, len);
 329
 330         if (list)
 331                 list_add_tail(&buf->list, list);
 332
 333         return buf;
 334 }
 335
 336 static void wm_adsp_buf_free(struct list_head *list)
 337 {
 338         while (!list_empty(list)) {
 339                 struct wm_adsp_buf *buf = list_first_entry(list,
 340                                                            struct wm_adsp_buf,
 341                                                            list);
 342                 list_del(&buf->list);
 343                 vfree(buf->buf);
 344                 kfree(buf);
 345         }
 346 }
 347
 348 #define WM_ADSP_FW_MBC_VSS  0
 349 #define WM_ADSP_FW_HIFI     1
 350 #define WM_ADSP_FW_TX       2
 351 #define WM_ADSP_FW_TX_SPK   3
 352 #define WM_ADSP_FW_RX       4
 353 #define WM_ADSP_FW_RX_ANC   5
 354 #define WM_ADSP_FW_CTRL     6
 355 #define WM_ADSP_FW_ASR      7
 356 #define WM_ADSP_FW_TRACE    8
 357 #define WM_ADSP_FW_SPK_PROT 9
 358 #define WM_ADSP_FW_SPK_CALI 10
 359 #define WM_ADSP_FW_SPK_DIAG 11
 360 #define WM_ADSP_FW_MISC     12
 361
 362 #define WM_ADSP_NUM_FW      13
 363
 364 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
 365         [WM_ADSP_FW_MBC_VSS] =  "MBC/VSS",
 366         [WM_ADSP_FW_HIFI] =     "MasterHiFi",
 367         [WM_ADSP_FW_TX] =       "Tx",
 368         [WM_ADSP_FW_TX_SPK] =   "Tx Speaker",
 369         [WM_ADSP_FW_RX] =       "Rx",
 370         [WM_ADSP_FW_RX_ANC] =   "Rx ANC",
 371         [WM_ADSP_FW_CTRL] =     "Voice Ctrl",
 372         [WM_ADSP_FW_ASR] =      "ASR Assist",
 373         [WM_ADSP_FW_TRACE] =    "Dbg Trace",
 374         [WM_ADSP_FW_SPK_PROT] = "Protection",
 375         [WM_ADSP_FW_SPK_CALI] = "Calibration",
 376         [WM_ADSP_FW_SPK_DIAG] = "Diagnostic",
 377         [WM_ADSP_FW_MISC] =     "Misc",
 378 };
 379
 380 struct wm_adsp_system_config_xm_hdr {
 381         __be32 sys_enable;
 382         __be32 fw_id;
 383         __be32 fw_rev;
 384         __be32 boot_status;
 385         __be32 watchdog;
 386         __be32 dma_buffer_size;
 387         __be32 rdma[6];
 388         __be32 wdma[8];
 389         __be32 build_job_name[3];
 390         __be32 build_job_number;
 391 };
 392
 393 struct wm_halo_system_config_xm_hdr {
 394         __be32 halo_heartbeat;
 395         __be32 build_job_name[3];
 396         __be32 build_job_number;
 397 };
 398
 399 struct wm_adsp_alg_xm_struct {
 400         __be32 magic;
 401         __be32 smoothing;
 402         __be32 threshold;
 403         __be32 host_buf_ptr;
 404         __be32 start_seq;
 405         __be32 high_water_mark;
 406         __be32 low_water_mark;
 407         __be64 smoothed_power;
 408 };
 409
 410 struct wm_adsp_host_buf_coeff_v1 {
 411         __be32 host_buf_ptr;            /* Host buffer pointer */
 412         __be32 versions;                /* Version numbers */
 413         __be32 name[4];                 /* The buffer name */
 414 };
 415
 416 struct wm_adsp_buffer {
 417         __be32 buf1_base;               /* Base addr of first buffer area */
 418         __be32 buf1_size;               /* Size of buf1 area in DSP words */
 419         __be32 buf2_base;               /* Base addr of 2nd buffer area */
 420         __be32 buf1_buf2_size;          /* Size of buf1+buf2 in DSP words */
 421         __be32 buf3_base;               /* Base addr of buf3 area */
 422         __be32 buf_total_size;          /* Size of buf1+buf2+buf3 in DSP words */
 423         __be32 high_water_mark;         /* Point at which IRQ is asserted */
 424         __be32 irq_count;               /* bits 1-31 count IRQ assertions */
 425         __be32 irq_ack;                 /* acked IRQ count, bit 0 enables IRQ */
 426         __be32 next_write_index;        /* word index of next write */
 427         __be32 next_read_index;         /* word index of next read */
 428         __be32 error;                   /* error if any */
 429         __be32 oldest_block_index;      /* word index of oldest surviving */
 430         __be32 requested_rewind;        /* how many blocks rewind was done */
 431         __be32 reserved_space;          /* internal */
 432         __be32 min_free;                /* min free space since stream start */
 433         __be32 blocks_written[2];       /* total blocks written (64 bit) */
 434         __be32 words_written[2];        /* total words written (64 bit) */
 435 };
 436
 437 struct wm_adsp_compr;
 438
 439 struct wm_adsp_compr_buf {
 440         struct list_head list;
 441         struct wm_adsp *dsp;
 442         struct wm_adsp_compr *compr;
 443
 444         struct wm_adsp_buffer_region *regions;
 445         u32 host_buf_ptr;
 446
 447         u32 error;
 448         u32 irq_count;
 449         int read_index;
 450         int avail;
 451         int host_buf_mem_type;
 452
 453         char *name;
 454 };
 455
 456 struct wm_adsp_compr {
 457         struct list_head list;
 458         struct wm_adsp *dsp;
 459         struct wm_adsp_compr_buf *buf;
 460
 461         struct snd_compr_stream *stream;
 462         struct snd_compressed_buffer size;
 463
 464         u32 *raw_buf;
 465         unsigned int copied_total;
 466
 467         unsigned int sample_rate;
 468
 469         const char *name;
 470 };
 471
 472 #define WM_ADSP_DATA_WORD_SIZE         3
 473
 474 #define WM_ADSP_MIN_FRAGMENTS          1
 475 #define WM_ADSP_MAX_FRAGMENTS          256
 476 #define WM_ADSP_MIN_FRAGMENT_SIZE      (64 * WM_ADSP_DATA_WORD_SIZE)
 477 #define WM_ADSP_MAX_FRAGMENT_SIZE      (4096 * WM_ADSP_DATA_WORD_SIZE)
 478
 479 #define WM_ADSP_ALG_XM_STRUCT_MAGIC    0x49aec7
 480
 481 #define HOST_BUFFER_FIELD(field) \
 482         (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
 483
 484 #define ALG_XM_FIELD(field) \
 485         (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
 486
 487 #define HOST_BUF_COEFF_SUPPORTED_COMPAT_VER     1
 488
 489 #define HOST_BUF_COEFF_COMPAT_VER_MASK          0xFF00
 490 #define HOST_BUF_COEFF_COMPAT_VER_SHIFT         8
 491
 492 static int wm_adsp_buffer_init(struct wm_adsp *dsp);
 493 static int wm_adsp_buffer_free(struct wm_adsp *dsp);
 494
 495 struct wm_adsp_buffer_region {
 496         unsigned int offset;
 497         unsigned int cumulative_size;
 498         unsigned int mem_type;
 499         unsigned int base_addr;
 500 };
 501
 502 struct wm_adsp_buffer_region_def {
 503         unsigned int mem_type;
 504         unsigned int base_offset;
 505         unsigned int size_offset;
 506 };
 507
 508 static const struct wm_adsp_buffer_region_def default_regions[] = {
 509         {
 510                 .mem_type = WMFW_ADSP2_XM,
 511                 .base_offset = HOST_BUFFER_FIELD(buf1_base),
 512                 .size_offset = HOST_BUFFER_FIELD(buf1_size),
 513         },
 514         {
 515                 .mem_type = WMFW_ADSP2_XM,
 516                 .base_offset = HOST_BUFFER_FIELD(buf2_base),
 517                 .size_offset = HOST_BUFFER_FIELD(buf1_buf2_size),
 518         },
 519         {
 520                 .mem_type = WMFW_ADSP2_YM,
 521                 .base_offset = HOST_BUFFER_FIELD(buf3_base),
 522                 .size_offset = HOST_BUFFER_FIELD(buf_total_size),
 523         },
 524 };
 525
 526 struct wm_adsp_fw_caps {
 527         u32 id;
 528         struct snd_codec_desc desc;
 529         int num_regions;
 530         const struct wm_adsp_buffer_region_def *region_defs;
 531 };
 532
 533 static const struct wm_adsp_fw_caps ctrl_caps[] = {
 534         {
 535                 .id = SND_AUDIOCODEC_BESPOKE,
 536                 .desc = {
 537                         .max_ch = 8,
 538                         .sample_rates = { 16000 },
 539                         .num_sample_rates = 1,
 540                         .formats = SNDRV_PCM_FMTBIT_S16_LE,
 541                 },
 542                 .num_regions = ARRAY_SIZE(default_regions),
 543                 .region_defs = default_regions,
 544         },
 545 };
 546
 547 static const struct wm_adsp_fw_caps trace_caps[] = {
 548         {
 549                 .id = SND_AUDIOCODEC_BESPOKE,
 550                 .desc = {
 551                         .max_ch = 8,
 552                         .sample_rates = {
 553                                 4000, 8000, 11025, 12000, 16000, 22050,
 554                                 24000, 32000, 44100, 48000, 64000, 88200,
 555                                 96000, 176400, 192000
 556                         },
 557                         .num_sample_rates = 15,
 558                         .formats = SNDRV_PCM_FMTBIT_S16_LE,
 559                 },
 560                 .num_regions = ARRAY_SIZE(default_regions),
 561                 .region_defs = default_regions,
 562         },
 563 };
 564
 565 static const struct {
 566         const char *file;
 567         int compr_direction;
 568         int num_caps;
 569         const struct wm_adsp_fw_caps *caps;
 570         bool voice_trigger;
 571 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
 572         [WM_ADSP_FW_MBC_VSS] =  { .file = "mbc-vss" },
 573         [WM_ADSP_FW_HIFI] =     { .file = "hifi" },
 574         [WM_ADSP_FW_TX] =       { .file = "tx" },
 575         [WM_ADSP_FW_TX_SPK] =   { .file = "tx-spk" },
 576         [WM_ADSP_FW_RX] =       { .file = "rx" },
 577         [WM_ADSP_FW_RX_ANC] =   { .file = "rx-anc" },
 578         [WM_ADSP_FW_CTRL] =     {
 579                 .file = "ctrl",
 580                 .compr_direction = SND_COMPRESS_CAPTURE,
 581                 .num_caps = ARRAY_SIZE(ctrl_caps),
 582                 .caps = ctrl_caps,
 583                 .voice_trigger = true,
 584         },
 585         [WM_ADSP_FW_ASR] =      { .file = "asr" },
 586         [WM_ADSP_FW_TRACE] =    {
 587                 .file = "trace",
 588                 .compr_direction = SND_COMPRESS_CAPTURE,
 589                 .num_caps = ARRAY_SIZE(trace_caps),
 590                 .caps = trace_caps,
 591         },
 592         [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
 593         [WM_ADSP_FW_SPK_CALI] = { .file = "spk-cali" },
 594         [WM_ADSP_FW_SPK_DIAG] = { .file = "spk-diag" },
 595         [WM_ADSP_FW_MISC] =     { .file = "misc" },
 596 };
 597
 598 struct wm_coeff_ctl_ops {
 599         int (*xget)(struct snd_kcontrol *kcontrol,
 600                     struct snd_ctl_elem_value *ucontrol);
 601         int (*xput)(struct snd_kcontrol *kcontrol,
 602                     struct snd_ctl_elem_value *ucontrol);
 603 };
 604
 605 struct wm_coeff_ctl {
 606         const char *name;
 607         const char *fw_name;
 608         /* Subname is needed to match with firmware */
 609         const char *subname;
 610         unsigned int subname_len;
 611         struct wm_adsp_alg_region alg_region;
 612         struct wm_coeff_ctl_ops ops;
 613         struct wm_adsp *dsp;
 614         unsigned int enabled:1;
 615         struct list_head list;
 616         void *cache;
 617         unsigned int offset;
 618         size_t len;
 619         unsigned int set:1;
 620         struct soc_bytes_ext bytes_ext;
 621         unsigned int flags;
 622         unsigned int type;
 623 };
 624
 625 static const char *wm_adsp_mem_region_name(unsigned int type)
 626 {
 627         switch (type) {
 628         case WMFW_ADSP1_PM:
 629                 return "PM";
 630         case WMFW_HALO_PM_PACKED:
 631                 return "PM_PACKED";
 632         case WMFW_ADSP1_DM:
 633                 return "DM";
 634         case WMFW_ADSP2_XM:
 635                 return "XM";
 636         case WMFW_HALO_XM_PACKED:
 637                 return "XM_PACKED";
 638         case WMFW_ADSP2_YM:
 639                 return "YM";
 640         case WMFW_HALO_YM_PACKED:
 641                 return "YM_PACKED";
 642         case WMFW_ADSP1_ZM:
 643                 return "ZM";
 644         default:
 645                 return NULL;
 646         }
 647 }
 648
 649 #ifdef CONFIG_DEBUG_FS
 650 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
 651 {
 652         char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
 653
 654         kfree(dsp->wmfw_file_name);
 655         dsp->wmfw_file_name = tmp;
 656 }
 657
 658 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
 659 {
 660         char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
 661
 662         kfree(dsp->bin_file_name);
 663         dsp->bin_file_name = tmp;
 664 }
 665
 666 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
 667 {
 668         kfree(dsp->wmfw_file_name);
 669         kfree(dsp->bin_file_name);
 670         dsp->wmfw_file_name = NULL;
 671         dsp->bin_file_name = NULL;
 672 }
 673
 674 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
 675                                          char __user *user_buf,
 676                                          size_t count, loff_t *ppos)
 677 {
 678         struct wm_adsp *dsp = file->private_data;
 679         ssize_t ret;
 680
 681         mutex_lock(&dsp->pwr_lock);
 682
 683         if (!dsp->wmfw_file_name || !dsp->booted)
 684                 ret = 0;
 685         else
 686                 ret = simple_read_from_buffer(user_buf, count, ppos,
 687                                               dsp->wmfw_file_name,
 688                                               strlen(dsp->wmfw_file_name));
 689
 690         mutex_unlock(&dsp->pwr_lock);
 691         return ret;
 692 }
 693
 694 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
 695                                         char __user *user_buf,
 696                                         size_t count, loff_t *ppos)
 697 {
 698         struct wm_adsp *dsp = file->private_data;
 699         ssize_t ret;
 700
 701         mutex_lock(&dsp->pwr_lock);
 702
 703         if (!dsp->bin_file_name || !dsp->booted)
 704                 ret = 0;
 705         else
 706                 ret = simple_read_from_buffer(user_buf, count, ppos,
 707                                               dsp->bin_file_name,
 708                                               strlen(dsp->bin_file_name));
 709
 710         mutex_unlock(&dsp->pwr_lock);
 711         return ret;
 712 }
 713
 714 static const struct {
 715         const char *name;
 716         const struct file_operations fops;
 717 } wm_adsp_debugfs_fops[] = {
 718         {
 719                 .name = "wmfw_file_name",
 720                 .fops = {
 721                         .open = simple_open,
 722                         .read = wm_adsp_debugfs_wmfw_read,
 723                 },
 724         },
 725         {
 726                 .name = "bin_file_name",
 727                 .fops = {
 728                         .open = simple_open,
 729                         .read = wm_adsp_debugfs_bin_read,
 730                 },
 731         },
 732 };
 733
 734 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
 735                                   struct snd_soc_component *component)
 736 {
 737         struct dentry *root = NULL;
 738         int i;
 739
 740         root = debugfs_create_dir(dsp->name, component->debugfs_root);
 741
 742         debugfs_create_bool("booted", 0444, root, &dsp->booted);
 743         debugfs_create_bool("running", 0444, root, &dsp->running);
 744         debugfs_create_x32("fw_id", 0444, root, &dsp->fw_id);
 745         debugfs_create_x32("fw_version", 0444, root, &dsp->fw_id_version);
 746
 747         for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i)
 748                 debugfs_create_file(wm_adsp_debugfs_fops[i].name, 0444, root,
 749                                     dsp, &wm_adsp_debugfs_fops[i].fops);
 750
 751         dsp->debugfs_root = root;
 752 }
 753
 754 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
 755 {
 756         wm_adsp_debugfs_clear(dsp);
 757         debugfs_remove_recursive(dsp->debugfs_root);
 758 }
 759 #else
 760 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
 761                                          struct snd_soc_component *component)
 762 {
 763 }
 764
 765 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
 766 {
 767 }
 768
 769 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
 770                                                  const char *s)
 771 {
 772 }
 773
 774 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
 775                                                 const char *s)
 776 {
 777 }
 778
 779 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
 780 {
 781 }
 782 #endif
 783
 784 int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
 785                    struct snd_ctl_elem_value *ucontrol)
 786 {
 787         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 788         struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
 789         struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
 790
 791         ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
 792
 793         return 0;
 794 }
 795 EXPORT_SYMBOL_GPL(wm_adsp_fw_get);
 796
 797 int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
 798                    struct snd_ctl_elem_value *ucontrol)
 799 {
 800         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
 801         struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
 802         struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
 803         int ret = 0;
 804
 805         if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
 806                 return 0;
 807
 808         if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
 809                 return -EINVAL;
 810
 811         mutex_lock(&dsp[e->shift_l].pwr_lock);
 812
 813         if (dsp[e->shift_l].booted || !list_empty(&dsp[e->shift_l].compr_list))
 814                 ret = -EBUSY;
 815         else
 816                 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
 817
 818         mutex_unlock(&dsp[e->shift_l].pwr_lock);
 819
 820         return ret;
 821 }
 822 EXPORT_SYMBOL_GPL(wm_adsp_fw_put);
 823
 824 const struct soc_enum wm_adsp_fw_enum[] = {
 825         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 826         SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 827         SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 828         SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 829         SOC_ENUM_SINGLE(0, 4, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 830         SOC_ENUM_SINGLE(0, 5, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 831         SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
 832 };
 833 EXPORT_SYMBOL_GPL(wm_adsp_fw_enum);
 834
 835 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
 836                                                         int type)
 837 {
 838         int i;
 839
 840         for (i = 0; i < dsp->num_mems; i++)
 841                 if (dsp->mem[i].type == type)
 842                         return &dsp->mem[i];
 843
 844         return NULL;
 845 }
 846
 847 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
 848                                           unsigned int offset)
 849 {
 850         switch (mem->type) {
 851         case WMFW_ADSP1_PM:
 852                 return mem->base + (offset * 3);
 853         case WMFW_ADSP1_DM:
 854         case WMFW_ADSP2_XM:
 855         case WMFW_ADSP2_YM:
 856         case WMFW_ADSP1_ZM:
 857                 return mem->base + (offset * 2);
 858         default:
 859                 WARN(1, "Unknown memory region type");
 860                 return offset;
 861         }
 862 }
 863
 864 static unsigned int wm_halo_region_to_reg(struct wm_adsp_region const *mem,
 865                                           unsigned int offset)
 866 {
 867         switch (mem->type) {
 868         case WMFW_ADSP2_XM:
 869         case WMFW_ADSP2_YM:
 870                 return mem->base + (offset * 4);
 871         case WMFW_HALO_XM_PACKED:
 872         case WMFW_HALO_YM_PACKED:
 873                 return (mem->base + (offset * 3)) & ~0x3;
 874         case WMFW_HALO_PM_PACKED:
 875                 return mem->base + (offset * 5);
 876         default:
 877                 WARN(1, "Unknown memory region type");
 878                 return offset;
 879         }
 880 }
 881
 882 static void wm_adsp_read_fw_status(struct wm_adsp *dsp,
 883                                    int noffs, unsigned int *offs)
 884 {
 885         unsigned int i;
 886         int ret;
 887
 888         for (i = 0; i < noffs; ++i) {
 889                 ret = regmap_read(dsp->regmap, dsp->base + offs[i], &offs[i]);
 890                 if (ret) {
 891                         adsp_err(dsp, "Failed to read SCRATCH%u: %d\n", i, ret);
 892                         return;
 893                 }
 894         }
 895 }
 896
 897 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
 898 {
 899         unsigned int offs[] = {
 900                 ADSP2_SCRATCH0, ADSP2_SCRATCH1, ADSP2_SCRATCH2, ADSP2_SCRATCH3,
 901         };
 902
 903         wm_adsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs);
 904
 905         adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
 906                  offs[0], offs[1], offs[2], offs[3]);
 907 }
 908
 909 static void wm_adsp2v2_show_fw_status(struct wm_adsp *dsp)
 910 {
 911         unsigned int offs[] = { ADSP2V2_SCRATCH0_1, ADSP2V2_SCRATCH2_3 };
 912
 913         wm_adsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs);
 914
 915         adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
 916                  offs[0] & 0xFFFF, offs[0] >> 16,
 917                  offs[1] & 0xFFFF, offs[1] >> 16);
 918 }
 919
 920 static void wm_halo_show_fw_status(struct wm_adsp *dsp)
 921 {
 922         unsigned int offs[] = {
 923                 HALO_SCRATCH1, HALO_SCRATCH2, HALO_SCRATCH3, HALO_SCRATCH4,
 924         };
 925
 926         wm_adsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs);
 927
 928         adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
 929                  offs[0], offs[1], offs[2], offs[3]);
 930 }
 931
 932 static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
 933 {
 934         return container_of(ext, struct wm_coeff_ctl, bytes_ext);
 935 }
 936
 937 static int wm_coeff_base_reg(struct wm_coeff_ctl *ctl, unsigned int *reg)
 938 {
 939         const struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
 940         struct wm_adsp *dsp = ctl->dsp;
 941         const struct wm_adsp_region *mem;
 942
 943         mem = wm_adsp_find_region(dsp, alg_region->type);
 944         if (!mem) {
 945                 adsp_err(dsp, "No base for region %x\n",
 946                          alg_region->type);
 947                 return -EINVAL;
 948         }
 949
 950         *reg = dsp->ops->region_to_reg(mem, ctl->alg_region.base + ctl->offset);
 951
 952         return 0;
 953 }
 954
 955 static int wm_coeff_info(struct snd_kcontrol *kctl,
 956                          struct snd_ctl_elem_info *uinfo)
 957 {
 958         struct soc_bytes_ext *bytes_ext =
 959                 (struct soc_bytes_ext *)kctl->private_value;
 960         struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
 961
 962         switch (ctl->type) {
 963         case WMFW_CTL_TYPE_ACKED:
 964                 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 965                 uinfo->value.integer.min = WM_ADSP_ACKED_CTL_MIN_VALUE;
 966                 uinfo->value.integer.max = WM_ADSP_ACKED_CTL_MAX_VALUE;
 967                 uinfo->value.integer.step = 1;
 968                 uinfo->count = 1;
 969                 break;
 970         default:
 971                 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 972                 uinfo->count = ctl->len;
 973                 break;
 974         }
 975
 976         return 0;
 977 }
 978
 979 static int wm_coeff_write_acked_control(struct wm_coeff_ctl *ctl,
 980                                         unsigned int event_id)
 981 {
 982         struct wm_adsp *dsp = ctl->dsp;
 983         u32 val = cpu_to_be32(event_id);
 984         unsigned int reg;
 985         int i, ret;
 986
 987         ret = wm_coeff_base_reg(ctl, &reg);
 988         if (ret)
 989                 return ret;
 990
 991         adsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n",
 992                  event_id, ctl->alg_region.alg,
 993                  wm_adsp_mem_region_name(ctl->alg_region.type), ctl->offset);
 994
 995         ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val));
 996         if (ret) {
 997                 adsp_err(dsp, "Failed to write %x: %d\n", reg, ret);
 998                 return ret;
 999         }
1000
1001         /*
1002          * Poll for ack, we initially poll at ~1ms intervals for firmwares
1003          * that respond quickly, then go to ~10ms polls. A firmware is unlikely
1004          * to ack instantly so we do the first 1ms delay before reading the
1005          * control to avoid a pointless bus transaction
1006          */
1007         for (i = 0; i < WM_ADSP_ACKED_CTL_TIMEOUT_MS;) {
1008                 switch (i) {
1009                 case 0 ... WM_ADSP_ACKED_CTL_N_QUICKPOLLS - 1:
1010                         usleep_range(1000, 2000);
1011                         i++;
1012                         break;
1013                 default:
1014                         usleep_range(10000, 20000);
1015                         i += 10;
1016                         break;
1017                 }
1018
1019                 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val));
1020                 if (ret) {
1021                         adsp_err(dsp, "Failed to read %x: %d\n", reg, ret);
1022                         return ret;
1023                 }
1024
1025                 if (val == 0) {
1026                         adsp_dbg(dsp, "Acked control ACKED at poll %u\n", i);
1027                         return 0;
1028                 }
1029         }
1030
1031         adsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n",
1032                   reg, ctl->alg_region.alg,
1033                   wm_adsp_mem_region_name(ctl->alg_region.type),
1034                   ctl->offset);
1035
1036         return -ETIMEDOUT;
1037 }
1038
1039 static int wm_coeff_write_ctrl_raw(struct wm_coeff_ctl *ctl,
1040                                    const void *buf, size_t len)
1041 {
1042         struct wm_adsp *dsp = ctl->dsp;
1043         void *scratch;
1044         int ret;
1045         unsigned int reg;
1046
1047         ret = wm_coeff_base_reg(ctl, &reg);
1048         if (ret)
1049                 return ret;
1050
1051         scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA);
1052         if (!scratch)
1053                 return -ENOMEM;
1054
1055         ret = regmap_raw_write(dsp->regmap, reg, scratch,
1056                                len);
1057         if (ret) {
1058                 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
1059                          len, reg, ret);
1060                 kfree(scratch);
1061                 return ret;
1062         }
1063         adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg);
1064
1065         kfree(scratch);
1066
1067         return 0;
1068 }
1069
1070 static int wm_coeff_write_ctrl(struct wm_coeff_ctl *ctl,
1071                                const void *buf, size_t len)
1072 {
1073         int ret = 0;
1074
1075         if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1076                 ret = -EPERM;
1077         else if (buf != ctl->cache)
1078                 memcpy(ctl->cache, buf, len);
1079
1080         ctl->set = 1;
1081         if (ctl->enabled && ctl->dsp->running)
1082                 ret = wm_coeff_write_ctrl_raw(ctl, buf, len);
1083
1084         return ret;
1085 }
1086
1087 static int wm_coeff_put(struct snd_kcontrol *kctl,
1088                         struct snd_ctl_elem_value *ucontrol)
1089 {
1090         struct soc_bytes_ext *bytes_ext =
1091                 (struct soc_bytes_ext *)kctl->private_value;
1092         struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1093         char *p = ucontrol->value.bytes.data;
1094         int ret = 0;
1095
1096         mutex_lock(&ctl->dsp->pwr_lock);
1097         ret = wm_coeff_write_ctrl(ctl, p, ctl->len);
1098         mutex_unlock(&ctl->dsp->pwr_lock);
1099
1100         return ret;
1101 }
1102
1103 static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
1104                             const unsigned int __user *bytes, unsigned int size)
1105 {
1106         struct soc_bytes_ext *bytes_ext =
1107                 (struct soc_bytes_ext *)kctl->private_value;
1108         struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1109         int ret = 0;
1110
1111         mutex_lock(&ctl->dsp->pwr_lock);
1112
1113         if (copy_from_user(ctl->cache, bytes, size))
1114                 ret = -EFAULT;
1115         else
1116                 ret = wm_coeff_write_ctrl(ctl, ctl->cache, size);
1117
1118         mutex_unlock(&ctl->dsp->pwr_lock);
1119
1120         return ret;
1121 }
1122
1123 static int wm_coeff_put_acked(struct snd_kcontrol *kctl,
1124                               struct snd_ctl_elem_value *ucontrol)
1125 {
1126         struct soc_bytes_ext *bytes_ext =
1127                 (struct soc_bytes_ext *)kctl->private_value;
1128         struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1129         unsigned int val = ucontrol->value.integer.value[0];
1130         int ret;
1131
1132         if (val == 0)
1133                 return 0;       /* 0 means no event */
1134
1135         mutex_lock(&ctl->dsp->pwr_lock);
1136
1137         if (ctl->enabled && ctl->dsp->running)
1138                 ret = wm_coeff_write_acked_control(ctl, val);
1139         else
1140                 ret = -EPERM;
1141
1142         mutex_unlock(&ctl->dsp->pwr_lock);
1143
1144         return ret;
1145 }
1146
1147 static int wm_coeff_read_ctrl_raw(struct wm_coeff_ctl *ctl,
1148                                   void *buf, size_t len)
1149 {
1150         struct wm_adsp *dsp = ctl->dsp;
1151         void *scratch;
1152         int ret;
1153         unsigned int reg;
1154
1155         ret = wm_coeff_base_reg(ctl, &reg);
1156         if (ret)
1157                 return ret;
1158
1159         scratch = kmalloc(len, GFP_KERNEL | GFP_DMA);
1160         if (!scratch)
1161                 return -ENOMEM;
1162
1163         ret = regmap_raw_read(dsp->regmap, reg, scratch, len);
1164         if (ret) {
1165                 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
1166                          len, reg, ret);
1167                 kfree(scratch);
1168                 return ret;
1169         }
1170         adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg);
1171
1172         memcpy(buf, scratch, len);
1173         kfree(scratch);
1174
1175         return 0;
1176 }
1177
1178 static int wm_coeff_read_ctrl(struct wm_coeff_ctl *ctl, void *buf, size_t len)
1179 {
1180         int ret = 0;
1181
1182         if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
1183                 if (ctl->enabled && ctl->dsp->running)
1184                         return wm_coeff_read_ctrl_raw(ctl, buf, len);
1185                 else
1186                         return -EPERM;
1187         } else {
1188                 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
1189                         ret = wm_coeff_read_ctrl_raw(ctl, ctl->cache, ctl->len);
1190
1191                 if (buf != ctl->cache)
1192                         memcpy(buf, ctl->cache, len);
1193         }
1194
1195         return ret;
1196 }
1197
1198 static int wm_coeff_get(struct snd_kcontrol *kctl,
1199                         struct snd_ctl_elem_value *ucontrol)
1200 {
1201         struct soc_bytes_ext *bytes_ext =
1202                 (struct soc_bytes_ext *)kctl->private_value;
1203         struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1204         char *p = ucontrol->value.bytes.data;
1205         int ret;
1206
1207         mutex_lock(&ctl->dsp->pwr_lock);
1208         ret = wm_coeff_read_ctrl(ctl, p, ctl->len);
1209         mutex_unlock(&ctl->dsp->pwr_lock);
1210
1211         return ret;
1212 }
1213
1214 static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
1215                             unsigned int __user *bytes, unsigned int size)
1216 {
1217         struct soc_bytes_ext *bytes_ext =
1218                 (struct soc_bytes_ext *)kctl->private_value;
1219         struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1220         int ret = 0;
1221
1222         mutex_lock(&ctl->dsp->pwr_lock);
1223
1224         ret = wm_coeff_read_ctrl_raw(ctl, ctl->cache, size);
1225
1226         if (!ret && copy_to_user(bytes, ctl->cache, size))
1227                 ret = -EFAULT;
1228
1229         mutex_unlock(&ctl->dsp->pwr_lock);
1230
1231         return ret;
1232 }
1233
1234 static int wm_coeff_get_acked(struct snd_kcontrol *kcontrol,
1235                               struct snd_ctl_elem_value *ucontrol)
1236 {
1237         /*
1238          * Although it's not useful to read an acked control, we must satisfy
1239          * user-side assumptions that all controls are readable and that a
1240          * write of the same value should be filtered out (it's valid to send
1241          * the same event number again to the firmware). We therefore return 0,
1242          * meaning "no event" so valid event numbers will always be a change
1243          */
1244         ucontrol->value.integer.value[0] = 0;
1245
1246         return 0;
1247 }
1248
1249 struct wmfw_ctl_work {
1250         struct wm_adsp *dsp;
1251         struct wm_coeff_ctl *ctl;
1252         struct work_struct work;
1253 };
1254
1255 static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
1256 {
1257         unsigned int out, rd, wr, vol;
1258
1259         if (len > ADSP_MAX_STD_CTRL_SIZE) {
1260                 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1261                 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
1262                 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
1263
1264                 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
1265         } else {
1266                 rd = SNDRV_CTL_ELEM_ACCESS_READ;
1267                 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
1268                 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
1269
1270                 out = 0;
1271         }
1272
1273         if (in) {
1274                 out |= rd;
1275                 if (in & WMFW_CTL_FLAG_WRITEABLE)
1276                         out |= wr;
1277                 if (in & WMFW_CTL_FLAG_VOLATILE)
1278                         out |= vol;
1279         } else {
1280                 out |= rd | wr | vol;
1281         }
1282
1283         return out;
1284 }
1285
1286 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
1287 {
1288         struct snd_kcontrol_new *kcontrol;
1289         int ret;
1290
1291         if (!ctl || !ctl->name)
1292                 return -EINVAL;
1293
1294         kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
1295         if (!kcontrol)
1296                 return -ENOMEM;
1297
1298         kcontrol->name = ctl->name;
1299         kcontrol->info = wm_coeff_info;
1300         kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1301         kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
1302         kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
1303         kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len);
1304
1305         switch (ctl->type) {
1306         case WMFW_CTL_TYPE_ACKED:
1307                 kcontrol->get = wm_coeff_get_acked;
1308                 kcontrol->put = wm_coeff_put_acked;
1309                 break;
1310         default:
1311                 if (kcontrol->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1312                         ctl->bytes_ext.max = ctl->len;
1313                         ctl->bytes_ext.get = wm_coeff_tlv_get;
1314                         ctl->bytes_ext.put = wm_coeff_tlv_put;
1315                 } else {
1316                         kcontrol->get = wm_coeff_get;
1317                         kcontrol->put = wm_coeff_put;
1318                 }
1319                 break;
1320         }
1321
1322         ret = snd_soc_add_component_controls(dsp->component, kcontrol, 1);
1323         if (ret < 0)
1324                 goto err_kcontrol;
1325
1326         kfree(kcontrol);
1327
1328         return 0;
1329
1330 err_kcontrol:
1331         kfree(kcontrol);
1332         return ret;
1333 }
1334
1335 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
1336 {
1337         struct wm_coeff_ctl *ctl;
1338         int ret;
1339
1340         list_for_each_entry(ctl, &dsp->ctl_list, list) {
1341                 if (!ctl->enabled || ctl->set)
1342                         continue;
1343                 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1344                         continue;
1345
1346                 /*
1347                  * For readable controls populate the cache from the DSP memory.
1348                  * For non-readable controls the cache was zero-filled when
1349                  * created so we don't need to do anything.
1350                  */
1351                 if (!ctl->flags || (ctl->flags & WMFW_CTL_FLAG_READABLE)) {
1352                         ret = wm_coeff_read_ctrl_raw(ctl, ctl->cache, ctl->len);
1353                         if (ret < 0)
1354                                 return ret;
1355                 }
1356         }
1357
1358         return 0;
1359 }
1360
1361 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
1362 {
1363         struct wm_coeff_ctl *ctl;
1364         int ret;
1365
1366         list_for_each_entry(ctl, &dsp->ctl_list, list) {
1367                 if (!ctl->enabled)
1368                         continue;
1369                 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
1370                         ret = wm_coeff_write_ctrl_raw(ctl, ctl->cache,
1371                                                       ctl->len);
1372                         if (ret < 0)
1373                                 return ret;
1374                 }
1375         }
1376
1377         return 0;
1378 }
1379
1380 static void wm_adsp_signal_event_controls(struct wm_adsp *dsp,
1381                                           unsigned int event)
1382 {
1383         struct wm_coeff_ctl *ctl;
1384         int ret;
1385
1386         list_for_each_entry(ctl, &dsp->ctl_list, list) {
1387                 if (ctl->type != WMFW_CTL_TYPE_HOSTEVENT)
1388                         continue;
1389
1390                 if (!ctl->enabled)
1391                         continue;
1392
1393                 ret = wm_coeff_write_acked_control(ctl, event);
1394                 if (ret)
1395                         adsp_warn(dsp,
1396                                   "Failed to send 0x%x event to alg 0x%x (%d)\n",
1397                                   event, ctl->alg_region.alg, ret);
1398         }
1399 }
1400
1401 static void wm_adsp_ctl_work(struct work_struct *work)
1402 {
1403         struct wmfw_ctl_work *ctl_work = container_of(work,
1404                                                       struct wmfw_ctl_work,
1405                                                       work);
1406
1407         wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
1408         kfree(ctl_work);
1409 }
1410
1411 static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl)
1412 {
1413         kfree(ctl->cache);
1414         kfree(ctl->name);
1415         kfree(ctl->subname);
1416         kfree(ctl);
1417 }
1418
1419 static int wm_adsp_create_control(struct wm_adsp *dsp,
1420                                   const struct wm_adsp_alg_region *alg_region,
1421                                   unsigned int offset, unsigned int len,
1422                                   const char *subname, unsigned int subname_len,
1423                                   unsigned int flags, unsigned int type)
1424 {
1425         struct wm_coeff_ctl *ctl;
1426         struct wmfw_ctl_work *ctl_work;
1427         char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1428         const char *region_name;
1429         int ret;
1430
1431         region_name = wm_adsp_mem_region_name(alg_region->type);
1432         if (!region_name) {
1433                 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
1434                 return -EINVAL;
1435         }
1436
1437         switch (dsp->fw_ver) {
1438         case 0:
1439         case 1:
1440                 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s %s %x",
1441                          dsp->name, region_name, alg_region->alg);
1442                 subname = NULL; /* don't append subname */
1443                 break;
1444         case 2:
1445                 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
1446                                 "%s%c %.12s %x", dsp->name, *region_name,
1447                                 wm_adsp_fw_text[dsp->fw], alg_region->alg);
1448                 break;
1449         default:
1450                 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
1451                                 "%s %.12s %x", dsp->name,
1452                                 wm_adsp_fw_text[dsp->fw], alg_region->alg);
1453                 break;
1454         }
1455
1456         if (subname) {
1457                 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
1458                 int skip = 0;
1459
1460                 if (dsp->component->name_prefix)
1461                         avail -= strlen(dsp->component->name_prefix) + 1;
1462
1463                 /* Truncate the subname from the start if it is too long */
1464                 if (subname_len > avail)
1465                         skip = subname_len - avail;
1466
1467                 snprintf(name + ret, SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret,
1468                          " %.*s", subname_len - skip, subname + skip);
1469         }
1470
1471         list_for_each_entry(ctl, &dsp->ctl_list, list) {
1472                 if (!strcmp(ctl->name, name)) {
1473                         if (!ctl->enabled)
1474                                 ctl->enabled = 1;
1475                         return 0;
1476                 }
1477         }
1478
1479         ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1480         if (!ctl)
1481                 return -ENOMEM;
1482         ctl->fw_name = wm_adsp_fw_text[dsp->fw];
1483         ctl->alg_region = *alg_region;
1484         ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1485         if (!ctl->name) {
1486                 ret = -ENOMEM;
1487                 goto err_ctl;
1488         }
1489         if (subname) {
1490                 ctl->subname_len = subname_len;
1491                 ctl->subname = kmemdup(subname,
1492                                        strlen(subname) + 1, GFP_KERNEL);
1493                 if (!ctl->subname) {
1494                         ret = -ENOMEM;
1495                         goto err_ctl_name;
1496                 }
1497         }
1498         ctl->enabled = 1;
1499         ctl->set = 0;
1500         ctl->ops.xget = wm_coeff_get;
1501         ctl->ops.xput = wm_coeff_put;
1502         ctl->dsp = dsp;
1503
1504         ctl->flags = flags;
1505         ctl->type = type;
1506         ctl->offset = offset;
1507         ctl->len = len;
1508         ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1509         if (!ctl->cache) {
1510                 ret = -ENOMEM;
1511                 goto err_ctl_subname;
1512         }
1513
1514         list_add(&ctl->list, &dsp->ctl_list);
1515
1516         if (flags & WMFW_CTL_FLAG_SYS)
1517                 return 0;
1518
1519         ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1520         if (!ctl_work) {
1521                 ret = -ENOMEM;
1522                 goto err_list_del;
1523         }
1524
1525         ctl_work->dsp = dsp;
1526         ctl_work->ctl = ctl;
1527         INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1528         schedule_work(&ctl_work->work);
1529
1530         return 0;
1531
1532 err_list_del:
1533         list_del(&ctl->list);
1534         kfree(ctl->cache);
1535 err_ctl_subname:
1536         kfree(ctl->subname);
1537 err_ctl_name:
1538         kfree(ctl->name);
1539 err_ctl:
1540         kfree(ctl);
1541
1542         return ret;
1543 }
1544
1545 struct wm_coeff_parsed_alg {
1546         int id;
1547         const u8 *name;
1548         int name_len;
1549         int ncoeff;
1550 };
1551
1552 struct wm_coeff_parsed_coeff {
1553         int offset;
1554         int mem_type;
1555         const u8 *name;
1556         int name_len;
1557         int ctl_type;
1558         int flags;
1559         int len;
1560 };
1561
1562 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1563 {
1564         int length;
1565
1566         switch (bytes) {
1567         case 1:
1568                 length = **pos;
1569                 break;
1570         case 2:
1571                 length = le16_to_cpu(*((__le16 *)*pos));
1572                 break;
1573         default:
1574                 return 0;
1575         }
1576
1577         if (str)
1578                 *str = *pos + bytes;
1579
1580         *pos += ((length + bytes) + 3) & ~0x03;
1581
1582         return length;
1583 }
1584
1585 static int wm_coeff_parse_int(int bytes, const u8 **pos)
1586 {
1587         int val = 0;
1588
1589         switch (bytes) {
1590         case 2:
1591                 val = le16_to_cpu(*((__le16 *)*pos));
1592                 break;
1593         case 4:
1594                 val = le32_to_cpu(*((__le32 *)*pos));
1595                 break;
1596         default:
1597                 break;
1598         }
1599
1600         *pos += bytes;
1601
1602         return val;
1603 }
1604
1605 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1606                                       struct wm_coeff_parsed_alg *blk)
1607 {
1608         const struct wmfw_adsp_alg_data *raw;
1609
1610         switch (dsp->fw_ver) {
1611         case 0:
1612         case 1:
1613                 raw = (const struct wmfw_adsp_alg_data *)*data;
1614                 *data = raw->data;
1615
1616                 blk->id = le32_to_cpu(raw->id);
1617                 blk->name = raw->name;
1618                 blk->name_len = strlen(raw->name);
1619                 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1620                 break;
1621         default:
1622                 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1623                 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1624                                                       &blk->name);
1625                 wm_coeff_parse_string(sizeof(u16), data, NULL);
1626                 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1627                 break;
1628         }
1629
1630         adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1631         adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1632         adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1633 }
1634
1635 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1636                                         struct wm_coeff_parsed_coeff *blk)
1637 {
1638         const struct wmfw_adsp_coeff_data *raw;
1639         const u8 *tmp;
1640         int length;
1641
1642         switch (dsp->fw_ver) {
1643         case 0:
1644         case 1:
1645                 raw = (const struct wmfw_adsp_coeff_data *)*data;
1646                 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
1647
1648                 blk->offset = le16_to_cpu(raw->hdr.offset);
1649                 blk->mem_type = le16_to_cpu(raw->hdr.type);
1650                 blk->name = raw->name;
1651                 blk->name_len = strlen(raw->name);
1652                 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1653                 blk->flags = le16_to_cpu(raw->flags);
1654                 blk->len = le32_to_cpu(raw->len);
1655                 break;
1656         default:
1657                 tmp = *data;
1658                 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1659                 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1660                 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1661                 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1662                                                       &blk->name);
1663                 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1664                 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1665                 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1666                 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1667                 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1668
1669                 *data = *data + sizeof(raw->hdr) + length;
1670                 break;
1671         }
1672
1673         adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1674         adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1675         adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1676         adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1677         adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1678         adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1679 }
1680
1681 static int wm_adsp_check_coeff_flags(struct wm_adsp *dsp,
1682                                 const struct wm_coeff_parsed_coeff *coeff_blk,
1683                                 unsigned int f_required,
1684                                 unsigned int f_illegal)
1685 {
1686         if ((coeff_blk->flags & f_illegal) ||
1687             ((coeff_blk->flags & f_required) != f_required)) {
1688                 adsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n",
1689                          coeff_blk->flags, coeff_blk->ctl_type);
1690                 return -EINVAL;
1691         }
1692
1693         return 0;
1694 }
1695
1696 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1697                                const struct wmfw_region *region)
1698 {
1699         struct wm_adsp_alg_region alg_region = {};
1700         struct wm_coeff_parsed_alg alg_blk;
1701         struct wm_coeff_parsed_coeff coeff_blk;
1702         const u8 *data = region->data;
1703         int i, ret;
1704
1705         wm_coeff_parse_alg(dsp, &data, &alg_blk);
1706         for (i = 0; i < alg_blk.ncoeff; i++) {
1707                 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1708
1709                 switch (coeff_blk.ctl_type) {
1710                 case SNDRV_CTL_ELEM_TYPE_BYTES:
1711                         break;
1712                 case WMFW_CTL_TYPE_ACKED:
1713                         if (coeff_blk.flags & WMFW_CTL_FLAG_SYS)
1714                                 continue;       /* ignore */
1715
1716                         ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk,
1717                                                 WMFW_CTL_FLAG_VOLATILE |
1718                                                 WMFW_CTL_FLAG_WRITEABLE |
1719                                                 WMFW_CTL_FLAG_READABLE,
1720                                                 0);
1721                         if (ret)
1722                                 return -EINVAL;
1723                         break;
1724                 case WMFW_CTL_TYPE_HOSTEVENT:
1725                         ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk,
1726                                                 WMFW_CTL_FLAG_SYS |
1727                                                 WMFW_CTL_FLAG_VOLATILE |
1728                                                 WMFW_CTL_FLAG_WRITEABLE |
1729                                                 WMFW_CTL_FLAG_READABLE,
1730                                                 0);
1731                         if (ret)
1732                                 return -EINVAL;
1733                         break;
1734                 case WMFW_CTL_TYPE_HOST_BUFFER:
1735                         ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk,
1736                                                 WMFW_CTL_FLAG_SYS |
1737                                                 WMFW_CTL_FLAG_VOLATILE |
1738                                                 WMFW_CTL_FLAG_READABLE,
1739                                                 0);
1740                         if (ret)
1741                                 return -EINVAL;
1742                         break;
1743                 default:
1744                         adsp_err(dsp, "Unknown control type: %d\n",
1745                                  coeff_blk.ctl_type);
1746                         return -EINVAL;
1747                 }
1748
1749                 alg_region.type = coeff_blk.mem_type;
1750                 alg_region.alg = alg_blk.id;
1751
1752                 ret = wm_adsp_create_control(dsp, &alg_region,
1753                                              coeff_blk.offset,
1754                                              coeff_blk.len,
1755                                              coeff_blk.name,
1756                                              coeff_blk.name_len,
1757                                              coeff_blk.flags,
1758                                              coeff_blk.ctl_type);
1759                 if (ret < 0)
1760                         adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1761                                  coeff_blk.name_len, coeff_blk.name, ret);
1762         }
1763
1764         return 0;
1765 }
1766
1767 static unsigned int wm_adsp1_parse_sizes(struct wm_adsp *dsp,
1768                                          const char * const file,
1769                                          unsigned int pos,
1770                                          const struct firmware *firmware)
1771 {
1772         const struct wmfw_adsp1_sizes *adsp1_sizes;
1773
1774         adsp1_sizes = (void *)&firmware->data[pos];
1775
1776         adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", file,
1777                  le32_to_cpu(adsp1_sizes->dm), le32_to_cpu(adsp1_sizes->pm),
1778                  le32_to_cpu(adsp1_sizes->zm));
1779
1780         return pos + sizeof(*adsp1_sizes);
1781 }
1782
1783 static unsigned int wm_adsp2_parse_sizes(struct wm_adsp *dsp,
1784                                          const char * const file,
1785                                          unsigned int pos,
1786                                          const struct firmware *firmware)
1787 {
1788         const struct wmfw_adsp2_sizes *adsp2_sizes;
1789
1790         adsp2_sizes = (void *)&firmware->data[pos];
1791
1792         adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", file,
1793                  le32_to_cpu(adsp2_sizes->xm), le32_to_cpu(adsp2_sizes->ym),
1794                  le32_to_cpu(adsp2_sizes->pm), le32_to_cpu(adsp2_sizes->zm));
1795
1796         return pos + sizeof(*adsp2_sizes);
1797 }
1798
1799 static bool wm_adsp_validate_version(struct wm_adsp *dsp, unsigned int version)
1800 {
1801         switch (version) {
1802         case 0:
1803                 adsp_warn(dsp, "Deprecated file format %d\n", version);
1804                 return true;
1805         case 1:
1806         case 2:
1807                 return true;
1808         default:
1809                 return false;
1810         }
1811 }
1812
1813 static bool wm_halo_validate_version(struct wm_adsp *dsp, unsigned int version)
1814 {
1815         switch (version) {
1816         case 3:
1817                 return true;
1818         default:
1819                 return false;
1820         }
1821 }
1822
1823 static int wm_adsp_load(struct wm_adsp *dsp)
1824 {
1825         LIST_HEAD(buf_list);
1826         const struct firmware *firmware;
1827         struct regmap *regmap = dsp->regmap;
1828         unsigned int pos = 0;
1829         const struct wmfw_header *header;
1830         const struct wmfw_adsp1_sizes *adsp1_sizes;
1831         const struct wmfw_footer *footer;
1832         const struct wmfw_region *region;
1833         const struct wm_adsp_region *mem;
1834         const char *region_name;
1835         char *file, *text = NULL;
1836         struct wm_adsp_buf *buf;
1837         unsigned int reg;
1838         int regions = 0;
1839         int ret, offset, type;
1840
1841         file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1842         if (file == NULL)
1843                 return -ENOMEM;
1844
1845         snprintf(file, PAGE_SIZE, "%s-%s-%s.wmfw", dsp->part, dsp->fwf_name,
1846                  wm_adsp_fw[dsp->fw].file);
1847         file[PAGE_SIZE - 1] = '\0';
1848
1849         ret = request_firmware(&firmware, file, dsp->dev);
1850         if (ret != 0) {
1851                 adsp_err(dsp, "Failed to request '%s'\n", file);
1852                 goto out;
1853         }
1854         ret = -EINVAL;
1855
1856         pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1857         if (pos >= firmware->size) {
1858                 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1859                          file, firmware->size);
1860                 goto out_fw;
1861         }
1862
1863         header = (void *)&firmware->data[0];
1864
1865         if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1866                 adsp_err(dsp, "%s: invalid magic\n", file);
1867                 goto out_fw;
1868         }
1869
1870         if (!dsp->ops->validate_version(dsp, header->ver)) {
1871                 adsp_err(dsp, "%s: unknown file format %d\n",
1872                          file, header->ver);
1873                 goto out_fw;
1874         }
1875
1876         adsp_info(dsp, "Firmware version: %d\n", header->ver);
1877         dsp->fw_ver = header->ver;
1878
1879         if (header->core != dsp->type) {
1880                 adsp_err(dsp, "%s: invalid core %d != %d\n",
1881                          file, header->core, dsp->type);
1882                 goto out_fw;
1883         }
1884
1885         pos = sizeof(*header);
1886         pos = dsp->ops->parse_sizes(dsp, file, pos, firmware);
1887
1888         footer = (void *)&firmware->data[pos];
1889         pos += sizeof(*footer);
1890
1891         if (le32_to_cpu(header->len) != pos) {
1892                 adsp_err(dsp, "%s: unexpected header length %d\n",
1893                          file, le32_to_cpu(header->len));
1894                 goto out_fw;
1895         }
1896
1897         adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1898                  le64_to_cpu(footer->timestamp));
1899
1900         while (pos < firmware->size &&
1901                sizeof(*region) < firmware->size - pos) {
1902                 region = (void *)&(firmware->data[pos]);
1903                 region_name = "Unknown";
1904                 reg = 0;
1905                 text = NULL;
1906                 offset = le32_to_cpu(region->offset) & 0xffffff;
1907                 type = be32_to_cpu(region->type) & 0xff;
1908
1909                 switch (type) {
1910                 case WMFW_NAME_TEXT:
1911                         region_name = "Firmware name";
1912                         text = kzalloc(le32_to_cpu(region->len) + 1,
1913                                        GFP_KERNEL);
1914                         break;
1915                 case WMFW_ALGORITHM_DATA:
1916                         region_name = "Algorithm";
1917                         ret = wm_adsp_parse_coeff(dsp, region);
1918                         if (ret != 0)
1919                                 goto out_fw;
1920                         break;
1921                 case WMFW_INFO_TEXT:
1922                         region_name = "Information";
1923                         text = kzalloc(le32_to_cpu(region->len) + 1,
1924                                        GFP_KERNEL);
1925                         break;
1926                 case WMFW_ABSOLUTE:
1927                         region_name = "Absolute";
1928                         reg = offset;
1929                         break;
1930                 case WMFW_ADSP1_PM:
1931                 case WMFW_ADSP1_DM:
1932                 case WMFW_ADSP2_XM:
1933                 case WMFW_ADSP2_YM:
1934                 case WMFW_ADSP1_ZM:
1935                 case WMFW_HALO_PM_PACKED:
1936                 case WMFW_HALO_XM_PACKED:
1937                 case WMFW_HALO_YM_PACKED:
1938                         mem = wm_adsp_find_region(dsp, type);
1939                         if (!mem) {
1940                                 adsp_err(dsp, "No region of type: %x\n", type);
1941                                 ret = -EINVAL;
1942                                 goto out_fw;
1943                         }
1944
1945                         region_name = wm_adsp_mem_region_name(type);
1946                         reg = dsp->ops->region_to_reg(mem, offset);
1947                         break;
1948                 default:
1949                         adsp_warn(dsp,
1950                                   "%s.%d: Unknown region type %x at %d(%x)\n",
1951                                   file, regions, type, pos, pos);
1952                         break;
1953                 }
1954
1955                 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1956                          regions, le32_to_cpu(region->len), offset,
1957                          region_name);
1958
1959                 if (le32_to_cpu(region->len) >
1960                     firmware->size - pos - sizeof(*region)) {
1961                         adsp_err(dsp,
1962                                  "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1963                                  file, regions, region_name,
1964                                  le32_to_cpu(region->len), firmware->size);
1965                         ret = -EINVAL;
1966                         goto out_fw;
1967                 }
1968
1969                 if (text) {
1970                         memcpy(text, region->data, le32_to_cpu(region->len));
1971                         adsp_info(dsp, "%s: %s\n", file, text);
1972                         kfree(text);
1973                         text = NULL;
1974                 }
1975
1976                 if (reg) {
1977                         buf = wm_adsp_buf_alloc(region->data,
1978                                                 le32_to_cpu(region->len),
1979                                                 &buf_list);
1980                         if (!buf) {
1981                                 adsp_err(dsp, "Out of memory\n");
1982                                 ret = -ENOMEM;
1983                                 goto out_fw;
1984                         }
1985
1986                         ret = regmap_raw_write_async(regmap, reg, buf->buf,
1987                                                      le32_to_cpu(region->len));
1988                         if (ret != 0) {
1989                                 adsp_err(dsp,
1990                                         "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1991                                         file, regions,
1992                                         le32_to_cpu(region->len), offset,
1993                                         region_name, ret);
1994                                 goto out_fw;
1995                         }
1996                 }
1997
1998                 pos += le32_to_cpu(region->len) + sizeof(*region);
1999                 regions++;
2000         }
2001
2002         ret = regmap_async_complete(regmap);
2003         if (ret != 0) {
2004                 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
2005                 goto out_fw;
2006         }
2007
2008         if (pos > firmware->size)
2009                 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
2010                           file, regions, pos - firmware->size);
2011
2012         wm_adsp_debugfs_save_wmfwname(dsp, file);
2013
2014 out_fw:
2015         regmap_async_complete(regmap);
2016         wm_adsp_buf_free(&buf_list);
2017         release_firmware(firmware);
2018         kfree(text);
2019 out:
2020         kfree(file);
2021
2022         return ret;
2023 }
2024
2025 /*
2026  * Find wm_coeff_ctl with input name as its subname
2027  * If not found, return NULL
2028  */
2029 static struct wm_coeff_ctl *wm_adsp_get_ctl(struct wm_adsp *dsp,
2030                                              const char *name, int type,
2031                                              unsigned int alg)
2032 {
2033         struct wm_coeff_ctl *pos, *rslt = NULL;
2034
2035         list_for_each_entry(pos, &dsp->ctl_list, list) {
2036                 if (!pos->subname)
2037                         continue;
2038                 if (strncmp(pos->subname, name, pos->subname_len) == 0 &&
2039                                 pos->alg_region.alg == alg &&
2040                                 pos->alg_region.type == type) {
2041                         rslt = pos;
2042                         break;
2043                 }
2044         }
2045
2046         return rslt;
2047 }
2048
2049 int wm_adsp_write_ctl(struct wm_adsp *dsp, const char *name, int type,
2050                       unsigned int alg, void *buf, size_t len)
2051 {
2052         struct wm_coeff_ctl *ctl;
2053         struct snd_kcontrol *kcontrol;
2054         char ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
2055         int ret;
2056
2057         ctl = wm_adsp_get_ctl(dsp, name, type, alg);
2058         if (!ctl)
2059                 return -EINVAL;
2060
2061         if (len > ctl->len)
2062                 return -EINVAL;
2063
2064         ret = wm_coeff_write_ctrl(ctl, buf, len);
2065         if (ret)
2066                 return ret;
2067
2068         if (ctl->flags & WMFW_CTL_FLAG_SYS)
2069                 return 0;
2070
2071         if (dsp->component->name_prefix)
2072                 snprintf(ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s %s",
2073                          dsp->component->name_prefix, ctl->name);
2074         else
2075                 snprintf(ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s",
2076                          ctl->name);
2077
2078         kcontrol = snd_soc_card_get_kcontrol(dsp->component->card, ctl_name);
2079         if (!kcontrol) {
2080                 adsp_err(dsp, "Can't find kcontrol %s\n", ctl_name);
2081                 return -EINVAL;
2082         }
2083
2084         snd_ctl_notify(dsp->component->card->snd_card,
2085                        SNDRV_CTL_EVENT_MASK_VALUE, &kcontrol->id);
2086
2087         return ret;
2088 }
2089 EXPORT_SYMBOL_GPL(wm_adsp_write_ctl);
2090
2091 int wm_adsp_read_ctl(struct wm_adsp *dsp, const char *name, int type,
2092                      unsigned int alg, void *buf, size_t len)
2093 {
2094         struct wm_coeff_ctl *ctl;
2095
2096         ctl = wm_adsp_get_ctl(dsp, name, type, alg);
2097         if (!ctl)
2098                 return -EINVAL;
2099
2100         if (len > ctl->len)
2101                 return -EINVAL;
2102
2103         return wm_coeff_read_ctrl(ctl, buf, len);
2104 }
2105 EXPORT_SYMBOL_GPL(wm_adsp_read_ctl);
2106
2107 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
2108                                   const struct wm_adsp_alg_region *alg_region)
2109 {
2110         struct wm_coeff_ctl *ctl;
2111
2112         list_for_each_entry(ctl, &dsp->ctl_list, list) {
2113                 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
2114                     alg_region->alg == ctl->alg_region.alg &&
2115                     alg_region->type == ctl->alg_region.type) {
2116                         ctl->alg_region.base = alg_region->base;
2117                 }
2118         }
2119 }
2120
2121 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
2122                                const struct wm_adsp_region *mem,
2123                                unsigned int pos, unsigned int len)
2124 {
2125         void *alg;
2126         unsigned int reg;
2127         int ret;
2128         __be32 val;
2129
2130         if (n_algs == 0) {
2131                 adsp_err(dsp, "No algorithms\n");
2132                 return ERR_PTR(-EINVAL);
2133         }
2134
2135         if (n_algs > 1024) {
2136                 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
2137                 return ERR_PTR(-EINVAL);
2138         }
2139
2140         /* Read the terminator first to validate the length */
2141         reg = dsp->ops->region_to_reg(mem, pos + len);
2142
2143         ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val));
2144         if (ret != 0) {
2145                 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
2146                         ret);
2147                 return ERR_PTR(ret);
2148         }
2149
2150         if (be32_to_cpu(val) != 0xbedead)
2151                 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbedead\n",
2152                           reg, be32_to_cpu(val));
2153
2154         /* Convert length from DSP words to bytes */
2155         len *= sizeof(u32);
2156
2157         alg = kzalloc(len, GFP_KERNEL | GFP_DMA);
2158         if (!alg)
2159                 return ERR_PTR(-ENOMEM);
2160
2161         reg = dsp->ops->region_to_reg(mem, pos);
2162
2163         ret = regmap_raw_read(dsp->regmap, reg, alg, len);
2164         if (ret != 0) {
2165                 adsp_err(dsp, "Failed to read algorithm list: %d\n", ret);
2166                 kfree(alg);
2167                 return ERR_PTR(ret);
2168         }
2169
2170         return alg;
2171 }
2172
2173 static struct wm_adsp_alg_region *
2174         wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
2175 {
2176         struct wm_adsp_alg_region *alg_region;
2177
2178         list_for_each_entry(alg_region, &dsp->alg_regions, list) {
2179                 if (id == alg_region->alg && type == alg_region->type)
2180                         return alg_region;
2181         }
2182
2183         return NULL;
2184 }
2185
2186 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
2187                                                         int type, __be32 id,
2188                                                         __be32 base)
2189 {
2190         struct wm_adsp_alg_region *alg_region;
2191
2192         alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
2193         if (!alg_region)
2194                 return ERR_PTR(-ENOMEM);
2195
2196         alg_region->type = type;
2197         alg_region->alg = be32_to_cpu(id);
2198         alg_region->base = be32_to_cpu(base);
2199
2200         list_add_tail(&alg_region->list, &dsp->alg_regions);
2201
2202         if (dsp->fw_ver > 0)
2203                 wm_adsp_ctl_fixup_base(dsp, alg_region);
2204
2205         return alg_region;
2206 }
2207
2208 static void wm_adsp_free_alg_regions(struct wm_adsp *dsp)
2209 {
2210         struct wm_adsp_alg_region *alg_region;
2211
2212         while (!list_empty(&dsp->alg_regions)) {
2213                 alg_region = list_first_entry(&dsp->alg_regions,
2214                                               struct wm_adsp_alg_region,
2215                                               list);
2216                 list_del(&alg_region->list);
2217                 kfree(alg_region);
2218         }
2219 }
2220
2221 static void wmfw_parse_id_header(struct wm_adsp *dsp,
2222                                  struct wmfw_id_hdr *fw, int nalgs)
2223 {
2224         dsp->fw_id = be32_to_cpu(fw->id);
2225         dsp->fw_id_version = be32_to_cpu(fw->ver);
2226
2227         adsp_info(dsp, "Firmware: %x v%d.%d.%d, %d algorithms\n",
2228                   dsp->fw_id, (dsp->fw_id_version & 0xff0000) >> 16,
2229                   (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff,
2230                   nalgs);
2231 }
2232
2233 static void wmfw_v3_parse_id_header(struct wm_adsp *dsp,
2234                                     struct wmfw_v3_id_hdr *fw, int nalgs)
2235 {
2236         dsp->fw_id = be32_to_cpu(fw->id);
2237         dsp->fw_id_version = be32_to_cpu(fw->ver);
2238         dsp->fw_vendor_id = be32_to_cpu(fw->vendor_id);
2239
2240         adsp_info(dsp, "Firmware: %x vendor: 0x%x v%d.%d.%d, %d algorithms\n",
2241                   dsp->fw_id, dsp->fw_vendor_id,
2242                   (dsp->fw_id_version & 0xff0000) >> 16,
2243                   (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff,
2244                   nalgs);
2245 }
2246
2247 static int wm_adsp_create_regions(struct wm_adsp *dsp, __be32 id, int nregions,
2248                                 int *type, __be32 *base)
2249 {
2250         struct wm_adsp_alg_region *alg_region;
2251         int i;
2252
2253         for (i = 0; i < nregions; i++) {
2254                 alg_region = wm_adsp_create_region(dsp, type[i], id, base[i]);
2255                 if (IS_ERR(alg_region))
2256                         return PTR_ERR(alg_region);
2257         }
2258
2259         return 0;
2260 }
2261
2262 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
2263 {
2264         struct wmfw_adsp1_id_hdr adsp1_id;
2265         struct wmfw_adsp1_alg_hdr *adsp1_alg;
2266         struct wm_adsp_alg_region *alg_region;
2267         const struct wm_adsp_region *mem;
2268         unsigned int pos, len;
2269         size_t n_algs;
2270         int i, ret;
2271
2272         mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
2273         if (WARN_ON(!mem))
2274                 return -EINVAL;
2275
2276         ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
2277                               sizeof(adsp1_id));
2278         if (ret != 0) {
2279                 adsp_err(dsp, "Failed to read algorithm info: %d\n",
2280                          ret);
2281                 return ret;
2282         }
2283
2284         n_algs = be32_to_cpu(adsp1_id.n_algs);
2285
2286         wmfw_parse_id_header(dsp, &adsp1_id.fw, n_algs);
2287
2288         alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
2289                                            adsp1_id.fw.id, adsp1_id.zm);
2290         if (IS_ERR(alg_region))
2291                 return PTR_ERR(alg_region);
2292
2293         alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
2294                                            adsp1_id.fw.id, adsp1_id.dm);
2295         if (IS_ERR(alg_region))
2296                 return PTR_ERR(alg_region);
2297
2298         /* Calculate offset and length in DSP words */
2299         pos = sizeof(adsp1_id) / sizeof(u32);
2300         len = (sizeof(*adsp1_alg) * n_algs) / sizeof(u32);
2301
2302         adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem, pos, len);
2303         if (IS_ERR(adsp1_alg))
2304                 return PTR_ERR(adsp1_alg);
2305
2306         for (i = 0; i < n_algs; i++) {
2307                 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
2308                           i, be32_to_cpu(adsp1_alg[i].alg.id),
2309                           (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
2310                           (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
2311                           be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
2312                           be32_to_cpu(adsp1_alg[i].dm),
2313                           be32_to_cpu(adsp1_alg[i].zm));
2314
2315                 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
2316                                                    adsp1_alg[i].alg.id,
2317                                                    adsp1_alg[i].dm);
2318                 if (IS_ERR(alg_region)) {
2319                         ret = PTR_ERR(alg_region);
2320                         goto out;
2321                 }
2322                 if (dsp->fw_ver == 0) {
2323                         if (i + 1 < n_algs) {
2324                                 len = be32_to_cpu(adsp1_alg[i + 1].dm);
2325                                 len -= be32_to_cpu(adsp1_alg[i].dm);
2326                                 len *= 4;
2327                                 wm_adsp_create_control(dsp, alg_region, 0,
2328                                                      len, NULL, 0, 0,
2329                                                      SNDRV_CTL_ELEM_TYPE_BYTES);
2330                         } else {
2331                                 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
2332                                           be32_to_cpu(adsp1_alg[i].alg.id));
2333                         }
2334                 }
2335
2336                 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
2337                                                    adsp1_alg[i].alg.id,
2338                                                    adsp1_alg[i].zm);
2339                 if (IS_ERR(alg_region)) {
2340                         ret = PTR_ERR(alg_region);
2341                         goto out;
2342                 }
2343                 if (dsp->fw_ver == 0) {
2344                         if (i + 1 < n_algs) {
2345                                 len = be32_to_cpu(adsp1_alg[i + 1].zm);
2346                                 len -= be32_to_cpu(adsp1_alg[i].zm);
2347                                 len *= 4;
2348                                 wm_adsp_create_control(dsp, alg_region, 0,
2349                                                      len, NULL, 0, 0,
2350                                                      SNDRV_CTL_ELEM_TYPE_BYTES);
2351                         } else {
2352                                 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
2353                                           be32_to_cpu(adsp1_alg[i].alg.id));
2354                         }
2355                 }
2356         }
2357
2358 out:
2359         kfree(adsp1_alg);
2360         return ret;
2361 }
2362
2363 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
2364 {
2365         struct wmfw_adsp2_id_hdr adsp2_id;
2366         struct wmfw_adsp2_alg_hdr *adsp2_alg;
2367         struct wm_adsp_alg_region *alg_region;
2368         const struct wm_adsp_region *mem;
2369         unsigned int pos, len;
2370         size_t n_algs;
2371         int i, ret;
2372
2373         mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
2374         if (WARN_ON(!mem))
2375                 return -EINVAL;
2376
2377         ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
2378                               sizeof(adsp2_id));
2379         if (ret != 0) {
2380                 adsp_err(dsp, "Failed to read algorithm info: %d\n",
2381                          ret);
2382                 return ret;
2383         }
2384
2385         n_algs = be32_to_cpu(adsp2_id.n_algs);
2386
2387         wmfw_parse_id_header(dsp, &adsp2_id.fw, n_algs);
2388
2389         alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
2390                                            adsp2_id.fw.id, adsp2_id.xm);
2391         if (IS_ERR(alg_region))
2392                 return PTR_ERR(alg_region);
2393
2394         alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
2395                                            adsp2_id.fw.id, adsp2_id.ym);
2396         if (IS_ERR(alg_region))
2397                 return PTR_ERR(alg_region);
2398
2399         alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
2400                                            adsp2_id.fw.id, adsp2_id.zm);
2401         if (IS_ERR(alg_region))
2402                 return PTR_ERR(alg_region);
2403
2404         /* Calculate offset and length in DSP words */
2405         pos = sizeof(adsp2_id) / sizeof(u32);
2406         len = (sizeof(*adsp2_alg) * n_algs) / sizeof(u32);
2407
2408         adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem, pos, len);
2409         if (IS_ERR(adsp2_alg))
2410                 return PTR_ERR(adsp2_alg);
2411
2412         for (i = 0; i < n_algs; i++) {
2413                 adsp_info(dsp,
2414                           "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
2415                           i, be32_to_cpu(adsp2_alg[i].alg.id),
2416                           (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
2417                           (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
2418                           be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
2419                           be32_to_cpu(adsp2_alg[i].xm),
2420                           be32_to_cpu(adsp2_alg[i].ym),
2421                           be32_to_cpu(adsp2_alg[i].zm));
2422
2423                 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
2424                                                    adsp2_alg[i].alg.id,
2425                                                    adsp2_alg[i].xm);
2426                 if (IS_ERR(alg_region)) {
2427                         ret = PTR_ERR(alg_region);
2428                         goto out;
2429                 }
2430                 if (dsp->fw_ver == 0) {
2431                         if (i + 1 < n_algs) {
2432                                 len = be32_to_cpu(adsp2_alg[i + 1].xm);
2433                                 len -= be32_to_cpu(adsp2_alg[i].xm);
2434                                 len *= 4;
2435                                 wm_adsp_create_control(dsp, alg_region, 0,
2436                                                      len, NULL, 0, 0,
2437                                                      SNDRV_CTL_ELEM_TYPE_BYTES);
2438                         } else {
2439                                 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
2440                                           be32_to_cpu(adsp2_alg[i].alg.id));
2441                         }
2442                 }
2443
2444                 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
2445                                                    adsp2_alg[i].alg.id,
2446                                                    adsp2_alg[i].ym);
2447                 if (IS_ERR(alg_region)) {
2448                         ret = PTR_ERR(alg_region);
2449                         goto out;
2450                 }
2451                 if (dsp->fw_ver == 0) {
2452                         if (i + 1 < n_algs) {
2453                                 len = be32_to_cpu(adsp2_alg[i + 1].ym);
2454                                 len -= be32_to_cpu(adsp2_alg[i].ym);
2455                                 len *= 4;
2456                                 wm_adsp_create_control(dsp, alg_region, 0,
2457                                                      len, NULL, 0, 0,
2458                                                      SNDRV_CTL_ELEM_TYPE_BYTES);
2459                         } else {
2460                                 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
2461                                           be32_to_cpu(adsp2_alg[i].alg.id));
2462                         }
2463                 }
2464
2465                 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
2466                                                    adsp2_alg[i].alg.id,
2467                                                    adsp2_alg[i].zm);
2468                 if (IS_ERR(alg_region)) {
2469                         ret = PTR_ERR(alg_region);
2470                         goto out;
2471                 }
2472                 if (dsp->fw_ver == 0) {
2473                         if (i + 1 < n_algs) {
2474                                 len = be32_to_cpu(adsp2_alg[i + 1].zm);
2475                                 len -= be32_to_cpu(adsp2_alg[i].zm);
2476                                 len *= 4;
2477                                 wm_adsp_create_control(dsp, alg_region, 0,
2478                                                      len, NULL, 0, 0,
2479                                                      SNDRV_CTL_ELEM_TYPE_BYTES);
2480                         } else {
2481                                 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
2482                                           be32_to_cpu(adsp2_alg[i].alg.id));
2483                         }
2484                 }
2485         }
2486
2487 out:
2488         kfree(adsp2_alg);
2489         return ret;
2490 }
2491
2492 static int wm_halo_create_regions(struct wm_adsp *dsp, __be32 id,
2493                                   __be32 xm_base, __be32 ym_base)
2494 {
2495         int types[] = {
2496                 WMFW_ADSP2_XM, WMFW_HALO_XM_PACKED,
2497                 WMFW_ADSP2_YM, WMFW_HALO_YM_PACKED
2498         };
2499         __be32 bases[] = { xm_base, xm_base, ym_base, ym_base };
2500
2501         return wm_adsp_create_regions(dsp, id, ARRAY_SIZE(types), types, bases);
2502 }
2503
2504 static int wm_halo_setup_algs(struct wm_adsp *dsp)
2505 {
2506         struct wmfw_halo_id_hdr halo_id;
2507         struct wmfw_halo_alg_hdr *halo_alg;
2508         const struct wm_adsp_region *mem;
2509         unsigned int pos, len;
2510         size_t n_algs;
2511         int i, ret;
2512
2513         mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
2514         if (WARN_ON(!mem))
2515                 return -EINVAL;
2516
2517         ret = regmap_raw_read(dsp->regmap, mem->base, &halo_id,
2518                               sizeof(halo_id));
2519         if (ret != 0) {
2520                 adsp_err(dsp, "Failed to read algorithm info: %d\n",
2521                          ret);
2522                 return ret;
2523         }
2524
2525         n_algs = be32_to_cpu(halo_id.n_algs);
2526
2527         wmfw_v3_parse_id_header(dsp, &halo_id.fw, n_algs);
2528
2529         ret = wm_halo_create_regions(dsp, halo_id.fw.id,
2530                                      halo_id.xm_base, halo_id.ym_base);
2531         if (ret)
2532                 return ret;
2533
2534         /* Calculate offset and length in DSP words */
2535         pos = sizeof(halo_id) / sizeof(u32);
2536         len = (sizeof(*halo_alg) * n_algs) / sizeof(u32);
2537
2538         halo_alg = wm_adsp_read_algs(dsp, n_algs, mem, pos, len);
2539         if (IS_ERR(halo_alg))
2540                 return PTR_ERR(halo_alg);
2541
2542         for (i = 0; i < n_algs; i++) {
2543                 adsp_info(dsp,
2544                           "%d: ID %x v%d.%d.%d XM@%x YM@%x\n",
2545                           i, be32_to_cpu(halo_alg[i].alg.id),
2546                           (be32_to_cpu(halo_alg[i].alg.ver) & 0xff0000) >> 16,
2547                           (be32_to_cpu(halo_alg[i].alg.ver) & 0xff00) >> 8,
2548                           be32_to_cpu(halo_alg[i].alg.ver) & 0xff,
2549                           be32_to_cpu(halo_alg[i].xm_base),
2550                           be32_to_cpu(halo_alg[i].ym_base));
2551
2552                 ret = wm_halo_create_regions(dsp, halo_alg[i].alg.id,
2553                                              halo_alg[i].xm_base,
2554                                              halo_alg[i].ym_base);
2555                 if (ret)
2556                         goto out;
2557         }
2558
2559 out:
2560         kfree(halo_alg);
2561         return ret;
2562 }
2563
2564 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
2565 {
2566         LIST_HEAD(buf_list);
2567         struct regmap *regmap = dsp->regmap;
2568         struct wmfw_coeff_hdr *hdr;
2569         struct wmfw_coeff_item *blk;
2570         const struct firmware *firmware;
2571         const struct wm_adsp_region *mem;
2572         struct wm_adsp_alg_region *alg_region;
2573         const char *region_name;
2574         int ret, pos, blocks, type, offset, reg;
2575         char *file;
2576         struct wm_adsp_buf *buf;
2577
2578         file = kzalloc(PAGE_SIZE, GFP_KERNEL);
2579         if (file == NULL)
2580                 return -ENOMEM;
2581
2582         snprintf(file, PAGE_SIZE, "%s-%s-%s.bin", dsp->part, dsp->fwf_name,
2583                  wm_adsp_fw[dsp->fw].file);
2584         file[PAGE_SIZE - 1] = '\0';
2585
2586         ret = request_firmware(&firmware, file, dsp->dev);
2587         if (ret != 0) {
2588                 adsp_warn(dsp, "Failed to request '%s'\n", file);
2589                 ret = 0;
2590                 goto out;
2591         }
2592         ret = -EINVAL;
2593
2594         if (sizeof(*hdr) >= firmware->size) {
2595                 adsp_err(dsp, "%s: file too short, %zu bytes\n",
2596                         file, firmware->size);
2597                 goto out_fw;
2598         }
2599
2600         hdr = (void *)&firmware->data[0];
2601         if (memcmp(hdr->magic, "WMDR", 4) != 0) {
2602                 adsp_err(dsp, "%s: invalid magic\n", file);
2603                 goto out_fw;
2604         }
2605
2606         switch (be32_to_cpu(hdr->rev) & 0xff) {
2607         case 1:
2608                 break;
2609         default:
2610                 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
2611                          file, be32_to_cpu(hdr->rev) & 0xff);
2612                 ret = -EINVAL;
2613                 goto out_fw;
2614         }
2615
2616         adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
2617                 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
2618                 (le32_to_cpu(hdr->ver) >>  8) & 0xff,
2619                 le32_to_cpu(hdr->ver) & 0xff);
2620
2621         pos = le32_to_cpu(hdr->len);
2622
2623         blocks = 0;
2624         while (pos < firmware->size &&
2625                sizeof(*blk) < firmware->size - pos) {
2626                 blk = (void *)(&firmware->data[pos]);
2627
2628                 type = le16_to_cpu(blk->type);
2629                 offset = le16_to_cpu(blk->offset);
2630
2631                 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
2632                          file, blocks, le32_to_cpu(blk->id),
2633                          (le32_to_cpu(blk->ver) >> 16) & 0xff,
2634                          (le32_to_cpu(blk->ver) >>  8) & 0xff,
2635                          le32_to_cpu(blk->ver) & 0xff);
2636                 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
2637                          file, blocks, le32_to_cpu(blk->len), offset, type);
2638
2639                 reg = 0;
2640                 region_name = "Unknown";
2641                 switch (type) {
2642                 case (WMFW_NAME_TEXT << 8):
2643                 case (WMFW_INFO_TEXT << 8):
2644                 case (WMFW_METADATA << 8):
2645                         break;
2646                 case (WMFW_ABSOLUTE << 8):
2647                         /*
2648                          * Old files may use this for global
2649                          * coefficients.
2650                          */
2651                         if (le32_to_cpu(blk->id) == dsp->fw_id &&
2652                             offset == 0) {
2653                                 region_name = "global coefficients";
2654                                 mem = wm_adsp_find_region(dsp, type);
2655                                 if (!mem) {
2656                                         adsp_err(dsp, "No ZM\n");
2657                                         break;
2658                                 }
2659                                 reg = dsp->ops->region_to_reg(mem, 0);
2660
2661                         } else {
2662                                 region_name = "register";
2663                                 reg = offset;
2664                         }
2665                         break;
2666
2667                 case WMFW_ADSP1_DM:
2668                 case WMFW_ADSP1_ZM:
2669                 case WMFW_ADSP2_XM:
2670                 case WMFW_ADSP2_YM:
2671                 case WMFW_HALO_XM_PACKED:
2672                 case WMFW_HALO_YM_PACKED:
2673                 case WMFW_HALO_PM_PACKED:
2674                         adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
2675                                  file, blocks, le32_to_cpu(blk->len),
2676                                  type, le32_to_cpu(blk->id));
2677
2678                         mem = wm_adsp_find_region(dsp, type);
2679                         if (!mem) {
2680                                 adsp_err(dsp, "No base for region %x\n", type);
2681                                 break;
2682                         }
2683
2684                         alg_region = wm_adsp_find_alg_region(dsp, type,
2685                                                 le32_to_cpu(blk->id));
2686                         if (alg_region) {
2687                                 reg = alg_region->base;
2688                                 reg = dsp->ops->region_to_reg(mem, reg);
2689                                 reg += offset;
2690                         } else {
2691                                 adsp_err(dsp, "No %x for algorithm %x\n",
2692                                          type, le32_to_cpu(blk->id));
2693                         }
2694                         break;
2695
2696                 default:
2697                         adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
2698                                  file, blocks, type, pos);
2699                         break;
2700                 }
2701
2702                 if (reg) {
2703                         if (le32_to_cpu(blk->len) >
2704                             firmware->size - pos - sizeof(*blk)) {
2705                                 adsp_err(dsp,
2706                                          "%s.%d: %s region len %d bytes exceeds file length %zu\n",
2707                                          file, blocks, region_name,
2708                                          le32_to_cpu(blk->len),
2709                                          firmware->size);
2710                                 ret = -EINVAL;
2711                                 goto out_fw;
2712                         }
2713
2714                         buf = wm_adsp_buf_alloc(blk->data,
2715                                                 le32_to_cpu(blk->len),
2716                                                 &buf_list);
2717                         if (!buf) {
2718                                 adsp_err(dsp, "Out of memory\n");
2719                                 ret = -ENOMEM;
2720                                 goto out_fw;
2721                         }
2722
2723                         adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
2724                                  file, blocks, le32_to_cpu(blk->len),
2725                                  reg);
2726                         ret = regmap_raw_write_async(regmap, reg, buf->buf,
2727                                                      le32_to_cpu(blk->len));
2728                         if (ret != 0) {
2729                                 adsp_err(dsp,
2730                                         "%s.%d: Failed to write to %x in %s: %d\n",
2731                                         file, blocks, reg, region_name, ret);
2732                         }
2733                 }
2734
2735                 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
2736                 blocks++;
2737         }
2738
2739         ret = regmap_async_complete(regmap);
2740         if (ret != 0)
2741                 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
2742
2743         if (pos > firmware->size)
2744                 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
2745                           file, blocks, pos - firmware->size);
2746
2747         wm_adsp_debugfs_save_binname(dsp, file);
2748
2749 out_fw:
2750         regmap_async_complete(regmap);
2751         release_firmware(firmware);
2752         wm_adsp_buf_free(&buf_list);
2753 out:
2754         kfree(file);
2755         return ret;
2756 }
2757
2758 static int wm_adsp_create_name(struct wm_adsp *dsp)
2759 {
2760         char *p;
2761
2762         if (!dsp->name) {
2763                 dsp->name = devm_kasprintf(dsp->dev, GFP_KERNEL, "DSP%d",
2764                                            dsp->num);
2765                 if (!dsp->name)
2766                         return -ENOMEM;
2767         }
2768
2769         if (!dsp->fwf_name) {
2770                 p = devm_kstrdup(dsp->dev, dsp->name, GFP_KERNEL);
2771                 if (!p)
2772                         return -ENOMEM;
2773
2774                 dsp->fwf_name = p;
2775                 for (; *p != 0; ++p)
2776                         *p = tolower(*p);
2777         }
2778
2779         return 0;
2780 }
2781
2782 static int wm_adsp_common_init(struct wm_adsp *dsp)
2783 {
2784         int ret;
2785
2786         ret = wm_adsp_create_name(dsp);
2787         if (ret)
2788                 return ret;
2789
2790         INIT_LIST_HEAD(&dsp->alg_regions);
2791         INIT_LIST_HEAD(&dsp->ctl_list);
2792         INIT_LIST_HEAD(&dsp->compr_list);
2793         INIT_LIST_HEAD(&dsp->buffer_list);
2794
2795         mutex_init(&dsp->pwr_lock);
2796
2797         return 0;
2798 }
2799
2800 int wm_adsp1_init(struct wm_adsp *dsp)
2801 {
2802         dsp->ops = &wm_adsp1_ops;
2803
2804         return wm_adsp_common_init(dsp);
2805 }
2806 EXPORT_SYMBOL_GPL(wm_adsp1_init);
2807
2808 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
2809                    struct snd_kcontrol *kcontrol,
2810                    int event)
2811 {
2812         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2813         struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
2814         struct wm_adsp *dsp = &dsps[w->shift];
2815         struct wm_coeff_ctl *ctl;
2816         int ret;
2817         unsigned int val;
2818
2819         dsp->component = component;
2820
2821         mutex_lock(&dsp->pwr_lock);
2822
2823         switch (event) {
2824         case SND_SOC_DAPM_POST_PMU:
2825                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2826                                    ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2827
2828                 /*
2829                  * For simplicity set the DSP clock rate to be the
2830                  * SYSCLK rate rather than making it configurable.
2831                  */
2832                 if (dsp->sysclk_reg) {
2833                         ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2834                         if (ret != 0) {
2835                                 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2836                                 ret);
2837                                 goto err_mutex;
2838                         }
2839
2840                         val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift;
2841
2842                         ret = regmap_update_bits(dsp->regmap,
2843                                                  dsp->base + ADSP1_CONTROL_31,
2844                                                  ADSP1_CLK_SEL_MASK, val);
2845                         if (ret != 0) {
2846                                 adsp_err(dsp, "Failed to set clock rate: %d\n",
2847                                          ret);
2848                                 goto err_mutex;
2849                         }
2850                 }
2851
2852                 ret = wm_adsp_load(dsp);
2853                 if (ret != 0)
2854                         goto err_ena;
2855
2856                 ret = wm_adsp1_setup_algs(dsp);
2857                 if (ret != 0)
2858                         goto err_ena;
2859
2860                 ret = wm_adsp_load_coeff(dsp);
2861                 if (ret != 0)
2862                         goto err_ena;
2863
2864                 /* Initialize caches for enabled and unset controls */
2865                 ret = wm_coeff_init_control_caches(dsp);
2866                 if (ret != 0)
2867                         goto err_ena;
2868
2869                 /* Sync set controls */
2870                 ret = wm_coeff_sync_controls(dsp);
2871                 if (ret != 0)
2872                         goto err_ena;
2873
2874                 dsp->booted = true;
2875
2876                 /* Start the core running */
2877                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2878                                    ADSP1_CORE_ENA | ADSP1_START,
2879                                    ADSP1_CORE_ENA | ADSP1_START);
2880
2881                 dsp->running = true;
2882                 break;
2883
2884         case SND_SOC_DAPM_PRE_PMD:
2885                 dsp->running = false;
2886                 dsp->booted = false;
2887
2888                 /* Halt the core */
2889                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2890                                    ADSP1_CORE_ENA | ADSP1_START, 0);
2891
2892                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2893                                    ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2894
2895                 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2896                                    ADSP1_SYS_ENA, 0);
2897
2898                 list_for_each_entry(ctl, &dsp->ctl_list, list)
2899                         ctl->enabled = 0;
2900
2901
2902                 wm_adsp_free_alg_regions(dsp);
2903                 break;
2904
2905         default:
2906                 break;
2907         }
2908
2909         mutex_unlock(&dsp->pwr_lock);
2910
2911         return 0;
2912
2913 err_ena:
2914         regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2915                            ADSP1_SYS_ENA, 0);
2916 err_mutex:
2917         mutex_unlock(&dsp->pwr_lock);
2918
2919         return ret;
2920 }
2921 EXPORT_SYMBOL_GPL(wm_adsp1_event);
2922
2923 static int wm_adsp2v2_enable_core(struct wm_adsp *dsp)
2924 {
2925         unsigned int val;
2926         int ret, count;
2927
2928         /* Wait for the RAM to start, should be near instantaneous */
2929         for (count = 0; count < 10; ++count) {
2930                 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val);
2931                 if (ret != 0)
2932                         return ret;
2933
2934                 if (val & ADSP2_RAM_RDY)
2935                         break;
2936
2937                 usleep_range(250, 500);
2938         }
2939
2940         if (!(val & ADSP2_RAM_RDY)) {
2941                 adsp_err(dsp, "Failed to start DSP RAM\n");
2942                 return -EBUSY;
2943         }
2944
2945         adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2946
2947         return 0;
2948 }
2949
2950 static int wm_adsp2_enable_core(struct wm_adsp *dsp)
2951 {
2952         int ret;
2953
2954         ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
2955                                        ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2956         if (ret != 0)
2957                 return ret;
2958
2959         return wm_adsp2v2_enable_core(dsp);
2960 }
2961
2962 static int wm_adsp2_lock(struct wm_adsp *dsp, unsigned int lock_regions)
2963 {
2964         struct regmap *regmap = dsp->regmap;
2965         unsigned int code0, code1, lock_reg;
2966
2967         if (!(lock_regions & WM_ADSP2_REGION_ALL))
2968                 return 0;
2969
2970         lock_regions &= WM_ADSP2_REGION_ALL;
2971         lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0;
2972
2973         while (lock_regions) {
2974                 code0 = code1 = 0;
2975                 if (lock_regions & BIT(0)) {
2976                         code0 = ADSP2_LOCK_CODE_0;
2977                         code1 = ADSP2_LOCK_CODE_1;
2978                 }
2979                 if (lock_regions & BIT(1)) {
2980                         code0 |= ADSP2_LOCK_CODE_0 << ADSP2_LOCK_REGION_SHIFT;
2981                         code1 |= ADSP2_LOCK_CODE_1 << ADSP2_LOCK_REGION_SHIFT;
2982                 }
2983                 regmap_write(regmap, lock_reg, code0);
2984                 regmap_write(regmap, lock_reg, code1);
2985                 lock_regions >>= 2;
2986                 lock_reg += 2;
2987         }
2988
2989         return 0;
2990 }
2991
2992 static int wm_adsp2_enable_memory(struct wm_adsp *dsp)
2993 {
2994         return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2995                                   ADSP2_MEM_ENA, ADSP2_MEM_ENA);
2996 }
2997
2998 static void wm_adsp2_disable_memory(struct wm_adsp *dsp)
2999 {
3000         regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
3001                            ADSP2_MEM_ENA, 0);
3002 }
3003
3004 static void wm_adsp2_disable_core(struct wm_adsp *dsp)
3005 {
3006         regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
3007         regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
3008         regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
3009
3010         regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
3011                            ADSP2_SYS_ENA, 0);
3012 }
3013
3014 static void wm_adsp2v2_disable_core(struct wm_adsp *dsp)
3015 {
3016         regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
3017         regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
3018         regmap_write(dsp->regmap, dsp->base + ADSP2V2_WDMA_CONFIG_2, 0);
3019 }
3020
3021 static void wm_adsp_boot_work(struct work_struct *work)
3022 {
3023         struct wm_adsp *dsp = container_of(work,
3024                                            struct wm_adsp,
3025                                            boot_work);
3026         int ret;
3027
3028         mutex_lock(&dsp->pwr_lock);
3029
3030         if (dsp->ops->enable_memory) {
3031                 ret = dsp->ops->enable_memory(dsp);
3032                 if (ret != 0)
3033                         goto err_mutex;
3034         }
3035
3036         if (dsp->ops->enable_core) {
3037                 ret = dsp->ops->enable_core(dsp);
3038                 if (ret != 0)
3039                         goto err_mem;
3040         }
3041
3042         ret = wm_adsp_load(dsp);
3043         if (ret != 0)
3044                 goto err_ena;
3045
3046         ret = dsp->ops->setup_algs(dsp);
3047         if (ret != 0)
3048                 goto err_ena;
3049
3050         ret = wm_adsp_load_coeff(dsp);
3051         if (ret != 0)
3052                 goto err_ena;
3053
3054         /* Initialize caches for enabled and unset controls */
3055         ret = wm_coeff_init_control_caches(dsp);
3056         if (ret != 0)
3057                 goto err_ena;
3058
3059         if (dsp->ops->disable_core)
3060                 dsp->ops->disable_core(dsp);
3061
3062         dsp->booted = true;
3063
3064         mutex_unlock(&dsp->pwr_lock);
3065
3066         return;
3067
3068 err_ena:
3069         if (dsp->ops->disable_core)
3070                 dsp->ops->disable_core(dsp);
3071 err_mem:
3072         if (dsp->ops->disable_memory)
3073                 dsp->ops->disable_memory(dsp);
3074 err_mutex:
3075         mutex_unlock(&dsp->pwr_lock);
3076 }
3077
3078 static int wm_halo_configure_mpu(struct wm_adsp *dsp, unsigned int lock_regions)
3079 {
3080         struct reg_sequence config[] = {
3081                 { dsp->base + HALO_MPU_LOCK_CONFIG,     0x5555 },
3082                 { dsp->base + HALO_MPU_LOCK_CONFIG,     0xAAAA },
3083                 { dsp->base + HALO_MPU_XMEM_ACCESS_0,   0xFFFFFFFF },
3084                 { dsp->base + HALO_MPU_YMEM_ACCESS_0,   0xFFFFFFFF },
3085                 { dsp->base + HALO_MPU_WINDOW_ACCESS_0, lock_regions },
3086                 { dsp->base + HALO_MPU_XREG_ACCESS_0,   lock_regions },
3087                 { dsp->base + HALO_MPU_YREG_ACCESS_0,   lock_regions },
3088                 { dsp->base + HALO_MPU_XMEM_ACCESS_1,   0xFFFFFFFF },
3089                 { dsp->base + HALO_MPU_YMEM_ACCESS_1,   0xFFFFFFFF },
3090                 { dsp->base + HALO_MPU_WINDOW_ACCESS_1, lock_regions },
3091                 { dsp->base + HALO_MPU_XREG_ACCESS_1,   lock_regions },
3092                 { dsp->base + HALO_MPU_YREG_ACCESS_1,   lock_regions },
3093                 { dsp->base + HALO_MPU_XMEM_ACCESS_2,   0xFFFFFFFF },
3094                 { dsp->base + HALO_MPU_YMEM_ACCESS_2,   0xFFFFFFFF },
3095                 { dsp->base + HALO_MPU_WINDOW_ACCESS_2, lock_regions },
3096                 { dsp->base + HALO_MPU_XREG_ACCESS_2,   lock_regions },
3097                 { dsp->base + HALO_MPU_YREG_ACCESS_2,   lock_regions },
3098                 { dsp->base + HALO_MPU_XMEM_ACCESS_3,   0xFFFFFFFF },
3099                 { dsp->base + HALO_MPU_YMEM_ACCESS_3,   0xFFFFFFFF },
3100                 { dsp->base + HALO_MPU_WINDOW_ACCESS_3, lock_regions },
3101                 { dsp->base + HALO_MPU_XREG_ACCESS_3,   lock_regions },
3102                 { dsp->base + HALO_MPU_YREG_ACCESS_3,   lock_regions },
3103                 { dsp->base + HALO_MPU_LOCK_CONFIG,     0 },
3104         };
3105
3106         return regmap_multi_reg_write(dsp->regmap, config, ARRAY_SIZE(config));
3107 }
3108
3109 int wm_adsp2_set_dspclk(struct snd_soc_dapm_widget *w, unsigned int freq)
3110 {
3111         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
3112         struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
3113         struct wm_adsp *dsp = &dsps[w->shift];
3114         int ret;
3115
3116         ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CLOCKING,
3117                                  ADSP2_CLK_SEL_MASK,
3118                                  freq << ADSP2_CLK_SEL_SHIFT);
3119         if (ret)
3120                 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
3121
3122         return ret;
3123 }
3124 EXPORT_SYMBOL_GPL(wm_adsp2_set_dspclk);
3125
3126 int wm_adsp2_preloader_get(struct snd_kcontrol *kcontrol,
3127                            struct snd_ctl_elem_value *ucontrol)
3128 {
3129         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
3130         struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
3131         struct soc_mixer_control *mc =
3132                 (struct soc_mixer_control *)kcontrol->private_value;
3133         struct wm_adsp *dsp = &dsps[mc->shift - 1];
3134
3135         ucontrol->value.integer.value[0] = dsp->preloaded;
3136
3137         return 0;
3138 }
3139 EXPORT_SYMBOL_GPL(wm_adsp2_preloader_get);
3140
3141 int wm_adsp2_preloader_put(struct snd_kcontrol *kcontrol,
3142                            struct snd_ctl_elem_value *ucontrol)
3143 {
3144         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
3145         struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
3146         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3147         struct soc_mixer_control *mc =
3148                 (struct soc_mixer_control *)kcontrol->private_value;
3149         struct wm_adsp *dsp = &dsps[mc->shift - 1];
3150         char preload[32];
3151
3152         snprintf(preload, ARRAY_SIZE(preload), "%s Preload", dsp->name);
3153
3154         dsp->preloaded = ucontrol->value.integer.value[0];
3155
3156         if (ucontrol->value.integer.value[0])
3157                 snd_soc_component_force_enable_pin(component, preload);
3158         else
3159                 snd_soc_component_disable_pin(component, preload);
3160
3161         snd_soc_dapm_sync(dapm);
3162
3163         flush_work(&dsp->boot_work);
3164
3165         return 0;
3166 }
3167 EXPORT_SYMBOL_GPL(wm_adsp2_preloader_put);
3168
3169 static void wm_adsp_stop_watchdog(struct wm_adsp *dsp)
3170 {
3171         regmap_update_bits(dsp->regmap, dsp->base + ADSP2_WATCHDOG,
3172                            ADSP2_WDT_ENA_MASK, 0);
3173 }
3174
3175 static void wm_halo_stop_watchdog(struct wm_adsp *dsp)
3176 {
3177         regmap_update_bits(dsp->regmap, dsp->base + HALO_WDT_CONTROL,
3178                            HALO_WDT_EN_MASK, 0);
3179 }
3180
3181 int wm_adsp_early_event(struct snd_soc_dapm_widget *w,
3182                         struct snd_kcontrol *kcontrol, int event)
3183 {
3184         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
3185         struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
3186         struct wm_adsp *dsp = &dsps[w->shift];
3187         struct wm_coeff_ctl *ctl;
3188
3189         switch (event) {
3190         case SND_SOC_DAPM_PRE_PMU:
3191                 queue_work(system_unbound_wq, &dsp->boot_work);
3192                 break;
3193         case SND_SOC_DAPM_PRE_PMD:
3194                 mutex_lock(&dsp->pwr_lock);
3195
3196                 wm_adsp_debugfs_clear(dsp);
3197
3198                 dsp->fw_id = 0;
3199                 dsp->fw_id_version = 0;
3200
3201                 dsp->booted = false;
3202
3203                 if (dsp->ops->disable_memory)
3204                         dsp->ops->disable_memory(dsp);
3205
3206                 list_for_each_entry(ctl, &dsp->ctl_list, list)
3207                         ctl->enabled = 0;
3208
3209                 wm_adsp_free_alg_regions(dsp);
3210
3211                 mutex_unlock(&dsp->pwr_lock);
3212
3213                 adsp_dbg(dsp, "Shutdown complete\n");
3214                 break;
3215         default:
3216                 break;
3217         }
3218
3219         return 0;
3220 }
3221 EXPORT_SYMBOL_GPL(wm_adsp_early_event);
3222
3223 static int wm_adsp2_start_core(struct wm_adsp *dsp)
3224 {
3225         return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
3226                                  ADSP2_CORE_ENA | ADSP2_START,
3227                                  ADSP2_CORE_ENA | ADSP2_START);
3228 }
3229
3230 static void wm_adsp2_stop_core(struct wm_adsp *dsp)
3231 {
3232         regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
3233                            ADSP2_CORE_ENA | ADSP2_START, 0);
3234 }
3235
3236 int wm_adsp_event(struct snd_soc_dapm_widget *w,
3237                   struct snd_kcontrol *kcontrol, int event)
3238 {
3239         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
3240         struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
3241         struct wm_adsp *dsp = &dsps[w->shift];
3242         int ret;
3243
3244         switch (event) {
3245         case SND_SOC_DAPM_POST_PMU:
3246                 flush_work(&dsp->boot_work);
3247
3248                 mutex_lock(&dsp->pwr_lock);
3249
3250                 if (!dsp->booted) {
3251                         ret = -EIO;
3252                         goto err;
3253                 }
3254
3255                 if (dsp->ops->enable_core) {
3256                         ret = dsp->ops->enable_core(dsp);
3257                         if (ret != 0)
3258                                 goto err;
3259                 }
3260
3261                 /* Sync set controls */
3262                 ret = wm_coeff_sync_controls(dsp);
3263                 if (ret != 0)
3264                         goto err;
3265
3266                 if (dsp->ops->lock_memory) {
3267                         ret = dsp->ops->lock_memory(dsp, dsp->lock_regions);
3268                         if (ret != 0) {
3269                                 adsp_err(dsp, "Error configuring MPU: %d\n",
3270                                          ret);
3271                                 goto err;
3272                         }
3273                 }
3274
3275                 if (dsp->ops->start_core) {
3276                         ret = dsp->ops->start_core(dsp);
3277                         if (ret != 0)
3278                                 goto err;
3279                 }
3280
3281                 if (wm_adsp_fw[dsp->fw].num_caps != 0) {
3282                         ret = wm_adsp_buffer_init(dsp);
3283                         if (ret < 0)
3284                                 goto err;
3285                 }
3286
3287                 dsp->running = true;
3288
3289                 mutex_unlock(&dsp->pwr_lock);
3290                 break;
3291
3292         case SND_SOC_DAPM_PRE_PMD:
3293                 /* Tell the firmware to cleanup */
3294                 wm_adsp_signal_event_controls(dsp, WM_ADSP_FW_EVENT_SHUTDOWN);
3295
3296                 if (dsp->ops->stop_watchdog)
3297                         dsp->ops->stop_watchdog(dsp);
3298
3299                 /* Log firmware state, it can be useful for analysis */
3300                 if (dsp->ops->show_fw_status)
3301                         dsp->ops->show_fw_status(dsp);
3302
3303                 mutex_lock(&dsp->pwr_lock);
3304
3305                 dsp->running = false;
3306
3307                 if (dsp->ops->stop_core)
3308                         dsp->ops->stop_core(dsp);
3309                 if (dsp->ops->disable_core)
3310                         dsp->ops->disable_core(dsp);
3311
3312                 if (wm_adsp_fw[dsp->fw].num_caps != 0)
3313                         wm_adsp_buffer_free(dsp);
3314
3315                 dsp->fatal_error = false;
3316
3317                 mutex_unlock(&dsp->pwr_lock);
3318
3319                 adsp_dbg(dsp, "Execution stopped\n");
3320                 break;
3321
3322         default:
3323                 break;
3324         }
3325
3326         return 0;
3327 err:
3328         if (dsp->ops->stop_core)
3329                 dsp->ops->stop_core(dsp);
3330         if (dsp->ops->disable_core)
3331                 dsp->ops->disable_core(dsp);
3332         mutex_unlock(&dsp->pwr_lock);
3333         return ret;
3334 }
3335 EXPORT_SYMBOL_GPL(wm_adsp_event);
3336
3337 static int wm_halo_start_core(struct wm_adsp *dsp)
3338 {
3339         return regmap_update_bits(dsp->regmap,
3340                                   dsp->base + HALO_CCM_CORE_CONTROL,
3341                                   HALO_CORE_EN, HALO_CORE_EN);
3342 }
3343
3344 static void wm_halo_stop_core(struct wm_adsp *dsp)
3345 {
3346         regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL,
3347                            HALO_CORE_EN, 0);
3348
3349         /* reset halo core with CORE_SOFT_RESET */
3350         regmap_update_bits(dsp->regmap, dsp->base + HALO_CORE_SOFT_RESET,
3351                            HALO_CORE_SOFT_RESET_MASK, 1);
3352 }
3353
3354 int wm_adsp2_component_probe(struct wm_adsp *dsp, struct snd_soc_component *component)
3355 {
3356         char preload[32];
3357
3358         snprintf(preload, ARRAY_SIZE(preload), "%s Preload", dsp->name);
3359         snd_soc_component_disable_pin(component, preload);
3360
3361         wm_adsp2_init_debugfs(dsp, component);
3362
3363         dsp->component = component;
3364
3365         return 0;
3366 }
3367 EXPORT_SYMBOL_GPL(wm_adsp2_component_probe);
3368
3369 int wm_adsp2_component_remove(struct wm_adsp *dsp, struct snd_soc_component *component)
3370 {
3371         wm_adsp2_cleanup_debugfs(dsp);
3372
3373         return 0;
3374 }
3375 EXPORT_SYMBOL_GPL(wm_adsp2_component_remove);
3376
3377 int wm_adsp2_init(struct wm_adsp *dsp)
3378 {
3379         int ret;
3380
3381         ret = wm_adsp_common_init(dsp);
3382         if (ret)
3383                 return ret;
3384
3385         switch (dsp->rev) {
3386         case 0:
3387                 /*
3388                  * Disable the DSP memory by default when in reset for a small
3389                  * power saving.
3390                  */
3391                 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
3392                                          ADSP2_MEM_ENA, 0);
3393                 if (ret) {
3394                         adsp_err(dsp,
3395                                  "Failed to clear memory retention: %d\n", ret);
3396                         return ret;
3397                 }
3398
3399                 dsp->ops = &wm_adsp2_ops[0];
3400                 break;
3401         case 1:
3402                 dsp->ops = &wm_adsp2_ops[1];
3403                 break;
3404         default:
3405                 dsp->ops = &wm_adsp2_ops[2];
3406                 break;
3407         }
3408
3409         INIT_WORK(&dsp->boot_work, wm_adsp_boot_work);
3410
3411         return 0;
3412 }
3413 EXPORT_SYMBOL_GPL(wm_adsp2_init);
3414
3415 int wm_halo_init(struct wm_adsp *dsp)
3416 {
3417         int ret;
3418
3419         ret = wm_adsp_common_init(dsp);
3420         if (ret)
3421                 return ret;
3422
3423         dsp->ops = &wm_halo_ops;
3424
3425         INIT_WORK(&dsp->boot_work, wm_adsp_boot_work);
3426
3427         return 0;
3428 }
3429 EXPORT_SYMBOL_GPL(wm_halo_init);
3430
3431 void wm_adsp2_remove(struct wm_adsp *dsp)
3432 {
3433         struct wm_coeff_ctl *ctl;
3434
3435         while (!list_empty(&dsp->ctl_list)) {
3436                 ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl,
3437                                         list);
3438                 list_del(&ctl->list);
3439                 wm_adsp_free_ctl_blk(ctl);
3440         }
3441 }
3442 EXPORT_SYMBOL_GPL(wm_adsp2_remove);
3443
3444 static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
3445 {
3446         return compr->buf != NULL;
3447 }
3448
3449 static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
3450 {
3451         struct wm_adsp_compr_buf *buf = NULL, *tmp;
3452
3453         if (compr->dsp->fatal_error)
3454                 return -EINVAL;
3455
3456         list_for_each_entry(tmp, &compr->dsp->buffer_list, list) {
3457                 if (!tmp->name || !strcmp(compr->name, tmp->name)) {
3458                         buf = tmp;
3459                         break;
3460                 }
3461         }
3462
3463         if (!buf)
3464                 return -EINVAL;
3465
3466         compr->buf = buf;
3467         buf->compr = compr;
3468
3469         return 0;
3470 }
3471
3472 static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
3473 {
3474         if (!compr)
3475                 return;
3476
3477         /* Wake the poll so it can see buffer is no longer attached */
3478         if (compr->stream)
3479                 snd_compr_fragment_elapsed(compr->stream);
3480
3481         if (wm_adsp_compr_attached(compr)) {
3482                 compr->buf->compr = NULL;
3483                 compr->buf = NULL;
3484         }
3485 }
3486
3487 int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
3488 {
3489         struct wm_adsp_compr *compr, *tmp;
3490         struct snd_soc_pcm_runtime *rtd = stream->private_data;
3491         int ret = 0;
3492
3493         mutex_lock(&dsp->pwr_lock);
3494
3495         if (wm_adsp_fw[dsp->fw].num_caps == 0) {
3496                 adsp_err(dsp, "%s: Firmware does not support compressed API\n",
3497                          asoc_rtd_to_codec(rtd, 0)->name);
3498                 ret = -ENXIO;
3499                 goto out;
3500         }
3501
3502         if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
3503                 adsp_err(dsp, "%s: Firmware does not support stream direction\n",
3504                          asoc_rtd_to_codec(rtd, 0)->name);
3505                 ret = -EINVAL;
3506                 goto out;
3507         }
3508
3509         list_for_each_entry(tmp, &dsp->compr_list, list) {
3510                 if (!strcmp(tmp->name, asoc_rtd_to_codec(rtd, 0)->name)) {
3511                         adsp_err(dsp, "%s: Only a single stream supported per dai\n",
3512                                  asoc_rtd_to_codec(rtd, 0)->name);
3513                         ret = -EBUSY;
3514                         goto out;
3515                 }
3516         }
3517
3518         compr = kzalloc(sizeof(*compr), GFP_KERNEL);
3519         if (!compr) {
3520                 ret = -ENOMEM;
3521                 goto out;
3522         }
3523
3524         compr->dsp = dsp;
3525         compr->stream = stream;
3526         compr->name = asoc_rtd_to_codec(rtd, 0)->name;
3527
3528         list_add_tail(&compr->list, &dsp->compr_list);
3529
3530         stream->runtime->private_data = compr;
3531
3532 out:
3533         mutex_unlock(&dsp->pwr_lock);
3534
3535         return ret;
3536 }
3537 EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
3538
3539 int wm_adsp_compr_free(struct snd_soc_component *component,
3540                        struct snd_compr_stream *stream)
3541 {
3542         struct wm_adsp_compr *compr = stream->runtime->private_data;
3543         struct wm_adsp *dsp = compr->dsp;
3544
3545         mutex_lock(&dsp->pwr_lock);
3546
3547         wm_adsp_compr_detach(compr);
3548         list_del(&compr->list);
3549
3550         kfree(compr->raw_buf);
3551         kfree(compr);
3552
3553         mutex_unlock(&dsp->pwr_lock);
3554
3555         return 0;
3556 }
3557 EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
3558
3559 static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
3560                                       struct snd_compr_params *params)
3561 {
3562         struct wm_adsp_compr *compr = stream->runtime->private_data;
3563         struct wm_adsp *dsp = compr->dsp;
3564         const struct wm_adsp_fw_caps *caps;
3565         const struct snd_codec_desc *desc;
3566         int i, j;
3567
3568         if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
3569             params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
3570             params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
3571             params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
3572             params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
3573                 compr_err(compr, "Invalid buffer fragsize=%d fragments=%d\n",
3574                           params->buffer.fragment_size,
3575                           params->buffer.fragments);
3576
3577                 return -EINVAL;
3578         }
3579
3580         for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
3581                 caps = &wm_adsp_fw[dsp->fw].caps[i];
3582                 desc = &caps->desc;
3583
3584                 if (caps->id != params->codec.id)
3585                         continue;
3586
3587                 if (stream->direction == SND_COMPRESS_PLAYBACK) {
3588                         if (desc->max_ch < params->codec.ch_out)
3589                                 continue;
3590                 } else {
3591                         if (desc->max_ch < params->codec.ch_in)
3592                                 continue;
3593                 }
3594
3595                 if (!(desc->formats & (1 << params->codec.format)))
3596                         continue;
3597
3598                 for (j = 0; j < desc->num_sample_rates; ++j)
3599                         if (desc->sample_rates[j] == params->codec.sample_rate)
3600                                 return 0;
3601         }
3602
3603         compr_err(compr, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
3604                   params->codec.id, params->codec.ch_in, params->codec.ch_out,
3605                   params->codec.sample_rate, params->codec.format);
3606         return -EINVAL;
3607 }
3608
3609 static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
3610 {
3611         return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
3612 }
3613
3614 int wm_adsp_compr_set_params(struct snd_soc_component *component,
3615                              struct snd_compr_stream *stream,
3616                              struct snd_compr_params *params)
3617 {
3618         struct wm_adsp_compr *compr = stream->runtime->private_data;
3619         unsigned int size;
3620         int ret;
3621
3622         ret = wm_adsp_compr_check_params(stream, params);
3623         if (ret)
3624                 return ret;
3625
3626         compr->size = params->buffer;
3627
3628         compr_dbg(compr, "fragment_size=%d fragments=%d\n",
3629                   compr->size.fragment_size, compr->size.fragments);
3630
3631         size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
3632         compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
3633         if (!compr->raw_buf)
3634                 return -ENOMEM;
3635
3636         compr->sample_rate = params->codec.sample_rate;
3637
3638         return 0;
3639 }
3640 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
3641
3642 int wm_adsp_compr_get_caps(struct snd_soc_component *component,
3643                            struct snd_compr_stream *stream,
3644                            struct snd_compr_caps *caps)
3645 {
3646         struct wm_adsp_compr *compr = stream->runtime->private_data;
3647         int fw = compr->dsp->fw;
3648         int i;
3649
3650         if (wm_adsp_fw[fw].caps) {
3651                 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
3652                         caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
3653
3654                 caps->num_codecs = i;
3655                 caps->direction = wm_adsp_fw[fw].compr_direction;
3656
3657                 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
3658                 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
3659                 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
3660                 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
3661         }
3662
3663         return 0;
3664 }
3665 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
3666
3667 static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
3668                                    unsigned int mem_addr,
3669                                    unsigned int num_words, u32 *data)
3670 {
3671         struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
3672         unsigned int i, reg;
3673         int ret;
3674
3675         if (!mem)
3676                 return -EINVAL;
3677
3678         reg = dsp->ops->region_to_reg(mem, mem_addr);
3679
3680         ret = regmap_raw_read(dsp->regmap, reg, data,
3681                               sizeof(*data) * num_words);
3682         if (ret < 0)
3683                 return ret;
3684
3685         for (i = 0; i < num_words; ++i)
3686                 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
3687
3688         return 0;
3689 }
3690
3691 static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
3692                                          unsigned int mem_addr, u32 *data)
3693 {
3694         return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
3695 }
3696
3697 static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
3698                                    unsigned int mem_addr, u32 data)
3699 {
3700         struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
3701         unsigned int reg;
3702
3703         if (!mem)
3704                 return -EINVAL;
3705
3706         reg = dsp->ops->region_to_reg(mem, mem_addr);
3707
3708         data = cpu_to_be32(data & 0x00ffffffu);
3709
3710         return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
3711 }
3712
3713 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
3714                                       unsigned int field_offset, u32 *data)
3715 {
3716         return wm_adsp_read_data_word(buf->dsp, buf->host_buf_mem_type,
3717                                       buf->host_buf_ptr + field_offset, data);
3718 }
3719
3720 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
3721                                        unsigned int field_offset, u32 data)
3722 {
3723         return wm_adsp_write_data_word(buf->dsp, buf->host_buf_mem_type,
3724                                        buf->host_buf_ptr + field_offset, data);
3725 }
3726
3727 static void wm_adsp_remove_padding(u32 *buf, int nwords, int data_word_size)
3728 {
3729         u8 *pack_in = (u8 *)buf;
3730         u8 *pack_out = (u8 *)buf;
3731         int i, j;
3732
3733         /* Remove the padding bytes from the data read from the DSP */
3734         for (i = 0; i < nwords; i++) {
3735                 for (j = 0; j < data_word_size; j++)
3736                         *pack_out++ = *pack_in++;
3737
3738                 pack_in += sizeof(*buf) - data_word_size;
3739         }
3740 }
3741
3742 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
3743 {
3744         const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
3745         struct wm_adsp_buffer_region *region;
3746         u32 offset = 0;
3747         int i, ret;
3748
3749         buf->regions = kcalloc(caps->num_regions, sizeof(*buf->regions),
3750                                GFP_KERNEL);
3751         if (!buf->regions)
3752                 return -ENOMEM;
3753
3754         for (i = 0; i < caps->num_regions; ++i) {
3755                 region = &buf->regions[i];
3756
3757                 region->offset = offset;
3758                 region->mem_type = caps->region_defs[i].mem_type;
3759
3760                 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
3761                                           &region->base_addr);
3762                 if (ret < 0)
3763                         return ret;
3764
3765                 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
3766                                           &offset);
3767                 if (ret < 0)
3768                         return ret;
3769
3770                 region->cumulative_size = offset;
3771
3772                 compr_dbg(buf,
3773                           "region=%d type=%d base=%08x off=%08x size=%08x\n",
3774                           i, region->mem_type, region->base_addr,
3775                           region->offset, region->cumulative_size);
3776         }
3777
3778         return 0;
3779 }
3780
3781 static void wm_adsp_buffer_clear(struct wm_adsp_compr_buf *buf)
3782 {
3783         buf->irq_count = 0xFFFFFFFF;
3784         buf->read_index = -1;
3785         buf->avail = 0;
3786 }
3787
3788 static struct wm_adsp_compr_buf *wm_adsp_buffer_alloc(struct wm_adsp *dsp)
3789 {
3790         struct wm_adsp_compr_buf *buf;
3791
3792         buf = kzalloc(sizeof(*buf), GFP_KERNEL);
3793         if (!buf)
3794                 return NULL;
3795
3796         buf->dsp = dsp;
3797
3798         wm_adsp_buffer_clear(buf);
3799
3800         list_add_tail(&buf->list, &dsp->buffer_list);
3801
3802         return buf;
3803 }
3804
3805 static int wm_adsp_buffer_parse_legacy(struct wm_adsp *dsp)
3806 {
3807         struct wm_adsp_alg_region *alg_region;
3808         struct wm_adsp_compr_buf *buf;
3809         u32 xmalg, addr, magic;
3810         int i, ret;
3811
3812         alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
3813         if (!alg_region) {
3814                 adsp_err(dsp, "No algorithm region found\n");
3815                 return -EINVAL;
3816         }
3817
3818         buf = wm_adsp_buffer_alloc(dsp);
3819         if (!buf)
3820                 return -ENOMEM;
3821
3822         xmalg = dsp->ops->sys_config_size / sizeof(__be32);
3823
3824         addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
3825         ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
3826         if (ret < 0)
3827                 return ret;
3828
3829         if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
3830                 return -ENODEV;
3831
3832         addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
3833         for (i = 0; i < 5; ++i) {
3834                 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
3835                                              &buf->host_buf_ptr);
3836                 if (ret < 0)
3837                         return ret;
3838
3839                 if (buf->host_buf_ptr)
3840                         break;
3841
3842                 usleep_range(1000, 2000);
3843         }
3844
3845         if (!buf->host_buf_ptr)
3846                 return -EIO;
3847
3848         buf->host_buf_mem_type = WMFW_ADSP2_XM;
3849
3850         ret = wm_adsp_buffer_populate(buf);
3851         if (ret < 0)
3852                 return ret;
3853
3854         compr_dbg(buf, "legacy host_buf_ptr=%x\n", buf->host_buf_ptr);
3855
3856         return 0;
3857 }
3858
3859 static int wm_adsp_buffer_parse_coeff(struct wm_coeff_ctl *ctl)
3860 {
3861         struct wm_adsp_host_buf_coeff_v1 coeff_v1;
3862         struct wm_adsp_compr_buf *buf;
3863         unsigned int val, reg;
3864         int ret, i;
3865
3866         ret = wm_coeff_base_reg(ctl, &reg);
3867         if (ret)
3868                 return ret;
3869
3870         for (i = 0; i < 5; ++i) {
3871                 ret = regmap_raw_read(ctl->dsp->regmap, reg, &val, sizeof(val));
3872                 if (ret < 0)
3873                         return ret;
3874
3875                 if (val)
3876                         break;
3877
3878                 usleep_range(1000, 2000);
3879         }
3880
3881         if (!val) {
3882                 adsp_err(ctl->dsp, "Failed to acquire host buffer\n");
3883                 return -EIO;
3884         }
3885
3886         buf = wm_adsp_buffer_alloc(ctl->dsp);
3887         if (!buf)
3888                 return -ENOMEM;
3889
3890         buf->host_buf_mem_type = ctl->alg_region.type;
3891         buf->host_buf_ptr = be32_to_cpu(val);
3892
3893         ret = wm_adsp_buffer_populate(buf);
3894         if (ret < 0)
3895                 return ret;
3896
3897         /*
3898          * v0 host_buffer coefficients didn't have versioning, so if the
3899          * control is one word, assume version 0.
3900          */
3901         if (ctl->len == 4) {
3902                 compr_dbg(buf, "host_buf_ptr=%x\n", buf->host_buf_ptr);
3903                 return 0;
3904         }
3905
3906         ret = regmap_raw_read(ctl->dsp->regmap, reg, &coeff_v1,
3907                               sizeof(coeff_v1));
3908         if (ret < 0)
3909                 return ret;
3910
3911         coeff_v1.versions = be32_to_cpu(coeff_v1.versions);
3912         val = coeff_v1.versions & HOST_BUF_COEFF_COMPAT_VER_MASK;
3913         val >>= HOST_BUF_COEFF_COMPAT_VER_SHIFT;
3914
3915         if (val > HOST_BUF_COEFF_SUPPORTED_COMPAT_VER) {
3916                 adsp_err(ctl->dsp,
3917                          "Host buffer coeff ver %u > supported version %u\n",
3918                          val, HOST_BUF_COEFF_SUPPORTED_COMPAT_VER);
3919                 return -EINVAL;
3920         }
3921
3922         for (i = 0; i < ARRAY_SIZE(coeff_v1.name); i++)
3923                 coeff_v1.name[i] = be32_to_cpu(coeff_v1.name[i]);
3924
3925         wm_adsp_remove_padding((u32 *)&coeff_v1.name,
3926                                ARRAY_SIZE(coeff_v1.name),
3927                                WM_ADSP_DATA_WORD_SIZE);
3928
3929         buf->name = kasprintf(GFP_KERNEL, "%s-dsp-%s", ctl->dsp->part,
3930                               (char *)&coeff_v1.name);
3931
3932         compr_dbg(buf, "host_buf_ptr=%x coeff version %u\n",
3933                   buf->host_buf_ptr, val);
3934
3935         return val;
3936 }
3937
3938 static int wm_adsp_buffer_init(struct wm_adsp *dsp)
3939 {
3940         struct wm_coeff_ctl *ctl;
3941         int ret;
3942
3943         list_for_each_entry(ctl, &dsp->ctl_list, list) {
3944                 if (ctl->type != WMFW_CTL_TYPE_HOST_BUFFER)
3945                         continue;
3946
3947                 if (!ctl->enabled)
3948                         continue;
3949
3950                 ret = wm_adsp_buffer_parse_coeff(ctl);
3951                 if (ret < 0) {
3952                         adsp_err(dsp, "Failed to parse coeff: %d\n", ret);
3953                         goto error;
3954                 } else if (ret == 0) {
3955                         /* Only one buffer supported for version 0 */
3956                         return 0;
3957                 }
3958         }
3959
3960         if (list_empty(&dsp->buffer_list)) {
3961                 /* Fall back to legacy support */
3962                 ret = wm_adsp_buffer_parse_legacy(dsp);
3963                 if (ret) {
3964                         adsp_err(dsp, "Failed to parse legacy: %d\n", ret);
3965                         goto error;
3966                 }
3967         }
3968
3969         return 0;
3970
3971 error:
3972         wm_adsp_buffer_free(dsp);
3973         return ret;
3974 }
3975
3976 static int wm_adsp_buffer_free(struct wm_adsp *dsp)
3977 {
3978         struct wm_adsp_compr_buf *buf, *tmp;
3979
3980         list_for_each_entry_safe(buf, tmp, &dsp->buffer_list, list) {
3981                 wm_adsp_compr_detach(buf->compr);
3982
3983                 kfree(buf->name);
3984                 kfree(buf->regions);
3985                 list_del(&buf->list);
3986                 kfree(buf);
3987         }
3988
3989         return 0;
3990 }
3991
3992 static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
3993 {
3994         int ret;
3995
3996         ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
3997         if (ret < 0) {
3998                 compr_err(buf, "Failed to check buffer error: %d\n", ret);
3999                 return ret;
4000         }
4001         if (buf->error != 0) {
4002                 compr_err(buf, "Buffer error occurred: %d\n", buf->error);
4003                 return -EIO;
4004         }
4005
4006         return 0;
4007 }
4008
4009 int wm_adsp_compr_trigger(struct snd_soc_component *component,
4010                           struct snd_compr_stream *stream, int cmd)
4011 {
4012         struct wm_adsp_compr *compr = stream->runtime->private_data;
4013         struct wm_adsp *dsp = compr->dsp;
4014         int ret = 0;
4015
4016         compr_dbg(compr, "Trigger: %d\n", cmd);
4017
4018         mutex_lock(&dsp->pwr_lock);
4019
4020         switch (cmd) {
4021         case SNDRV_PCM_TRIGGER_START:
4022                 if (!wm_adsp_compr_attached(compr)) {
4023                         ret = wm_adsp_compr_attach(compr);
4024                         if (ret < 0) {
4025                                 compr_err(compr, "Failed to link buffer and stream: %d\n",
4026                                           ret);
4027                                 break;
4028                         }
4029                 }
4030
4031                 ret = wm_adsp_buffer_get_error(compr->buf);
4032                 if (ret < 0)
4033                         break;
4034
4035                 /* Trigger the IRQ at one fragment of data */
4036                 ret = wm_adsp_buffer_write(compr->buf,
4037                                            HOST_BUFFER_FIELD(high_water_mark),
4038                                            wm_adsp_compr_frag_words(compr));
4039                 if (ret < 0) {
4040                         compr_err(compr, "Failed to set high water mark: %d\n",
4041                                   ret);
4042                         break;
4043                 }
4044                 break;
4045         case SNDRV_PCM_TRIGGER_STOP:
4046                 if (wm_adsp_compr_attached(compr))
4047                         wm_adsp_buffer_clear(compr->buf);
4048                 break;
4049         default:
4050                 ret = -EINVAL;
4051                 break;
4052         }
4053
4054         mutex_unlock(&dsp->pwr_lock);
4055
4056         return ret;
4057 }
4058 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
4059
4060 static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
4061 {
4062         int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
4063
4064         return buf->regions[last_region].cumulative_size;
4065 }
4066
4067 static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
4068 {
4069         u32 next_read_index, next_write_index;
4070         int write_index, read_index, avail;
4071         int ret;
4072
4073         /* Only sync read index if we haven't already read a valid index */
4074         if (buf->read_index < 0) {
4075                 ret = wm_adsp_buffer_read(buf,
4076                                 HOST_BUFFER_FIELD(next_read_index),
4077                                 &next_read_index);
4078                 if (ret < 0)
4079                         return ret;
4080
4081                 read_index = sign_extend32(next_read_index, 23);
4082
4083                 if (read_index < 0) {
4084                         compr_dbg(buf, "Avail check on unstarted stream\n");
4085                         return 0;
4086                 }
4087
4088                 buf->read_index = read_index;
4089         }
4090
4091         ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
4092                         &next_write_index);
4093         if (ret < 0)
4094                 return ret;
4095
4096         write_index = sign_extend32(next_write_index, 23);
4097
4098         avail = write_index - buf->read_index;
4099         if (avail < 0)
4100                 avail += wm_adsp_buffer_size(buf);
4101
4102         compr_dbg(buf, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
4103                   buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE);
4104
4105         buf->avail = avail;
4106
4107         return 0;
4108 }
4109
4110 int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
4111 {
4112         struct wm_adsp_compr_buf *buf;
4113         struct wm_adsp_compr *compr;
4114         int ret = 0;
4115
4116         mutex_lock(&dsp->pwr_lock);
4117
4118         if (list_empty(&dsp->buffer_list)) {
4119                 ret = -ENODEV;
4120                 goto out;
4121         }
4122
4123         adsp_dbg(dsp, "Handling buffer IRQ\n");
4124
4125         list_for_each_entry(buf, &dsp->buffer_list, list) {
4126                 compr = buf->compr;
4127
4128                 ret = wm_adsp_buffer_get_error(buf);
4129                 if (ret < 0)
4130                         goto out_notify; /* Wake poll to report error */
4131
4132                 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
4133                                           &buf->irq_count);
4134                 if (ret < 0) {
4135                         compr_err(buf, "Failed to get irq_count: %d\n", ret);
4136                         goto out;
4137                 }
4138
4139                 ret = wm_adsp_buffer_update_avail(buf);
4140                 if (ret < 0) {
4141                         compr_err(buf, "Error reading avail: %d\n", ret);
4142                         goto out;
4143                 }
4144
4145                 if (wm_adsp_fw[dsp->fw].voice_trigger && buf->irq_count == 2)
4146                         ret = WM_ADSP_COMPR_VOICE_TRIGGER;
4147
4148 out_notify:
4149                 if (compr && compr->stream)
4150                         snd_compr_fragment_elapsed(compr->stream);
4151         }
4152
4153 out:
4154         mutex_unlock(&dsp->pwr_lock);
4155
4156         return ret;
4157 }
4158 EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
4159
4160 static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
4161 {
4162         if (buf->irq_count & 0x01)
4163                 return 0;
4164
4165         compr_dbg(buf, "Enable IRQ(0x%x) for next fragment\n", buf->irq_count);
4166
4167         buf->irq_count |= 0x01;
4168
4169         return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
4170                                     buf->irq_count);
4171 }
4172
4173 int wm_adsp_compr_pointer(struct snd_soc_component *component,
4174                           struct snd_compr_stream *stream,
4175                           struct snd_compr_tstamp *tstamp)
4176 {
4177         struct wm_adsp_compr *compr = stream->runtime->private_data;
4178         struct wm_adsp *dsp = compr->dsp;
4179         struct wm_adsp_compr_buf *buf;
4180         int ret = 0;
4181
4182         compr_dbg(compr, "Pointer request\n");
4183
4184         mutex_lock(&dsp->pwr_lock);
4185
4186         buf = compr->buf;
4187
4188         if (dsp->fatal_error || !buf || buf->error) {
4189                 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
4190                 ret = -EIO;
4191                 goto out;
4192         }
4193
4194         if (buf->avail < wm_adsp_compr_frag_words(compr)) {
4195                 ret = wm_adsp_buffer_update_avail(buf);
4196                 if (ret < 0) {
4197                         compr_err(compr, "Error reading avail: %d\n", ret);
4198                         goto out;
4199                 }
4200
4201                 /*
4202                  * If we really have less than 1 fragment available tell the
4203                  * DSP to inform us once a whole fragment is available.
4204                  */
4205                 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
4206                         ret = wm_adsp_buffer_get_error(buf);
4207                         if (ret < 0) {
4208                                 if (buf->error)
4209                                         snd_compr_stop_error(stream,
4210                                                         SNDRV_PCM_STATE_XRUN);
4211                                 goto out;
4212                         }
4213
4214                         ret = wm_adsp_buffer_reenable_irq(buf);
4215                         if (ret < 0) {
4216                                 compr_err(compr, "Failed to re-enable buffer IRQ: %d\n",
4217                                           ret);
4218                                 goto out;
4219                         }
4220                 }
4221         }
4222
4223         tstamp->copied_total = compr->copied_total;
4224         tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
4225         tstamp->sampling_rate = compr->sample_rate;
4226
4227 out:
4228         mutex_unlock(&dsp->pwr_lock);
4229
4230         return ret;
4231 }
4232 EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
4233
4234 static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
4235 {
4236         struct wm_adsp_compr_buf *buf = compr->buf;
4237         unsigned int adsp_addr;
4238         int mem_type, nwords, max_read;
4239         int i, ret;
4240
4241         /* Calculate read parameters */
4242         for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
4243                 if (buf->read_index < buf->regions[i].cumulative_size)
4244                         break;
4245
4246         if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
4247                 return -EINVAL;
4248
4249         mem_type = buf->regions[i].mem_type;
4250         adsp_addr = buf->regions[i].base_addr +
4251                     (buf->read_index - buf->regions[i].offset);
4252
4253         max_read = wm_adsp_compr_frag_words(compr);
4254         nwords = buf->regions[i].cumulative_size - buf->read_index;
4255
4256         if (nwords > target)
4257                 nwords = target;
4258         if (nwords > buf->avail)
4259                 nwords = buf->avail;
4260         if (nwords > max_read)
4261                 nwords = max_read;
4262         if (!nwords)
4263                 return 0;
4264
4265         /* Read data from DSP */
4266         ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
4267                                       nwords, compr->raw_buf);
4268         if (ret < 0)
4269                 return ret;
4270
4271         wm_adsp_remove_padding(compr->raw_buf, nwords, WM_ADSP_DATA_WORD_SIZE);
4272
4273         /* update read index to account for words read */
4274         buf->read_index += nwords;
4275         if (buf->read_index == wm_adsp_buffer_size(buf))
4276                 buf->read_index = 0;
4277
4278         ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
4279                                    buf->read_index);
4280         if (ret < 0)
4281                 return ret;
4282
4283         /* update avail to account for words read */
4284         buf->avail -= nwords;
4285
4286         return nwords;
4287 }
4288
4289 static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
4290                               char __user *buf, size_t count)
4291 {
4292         struct wm_adsp *dsp = compr->dsp;
4293         int ntotal = 0;
4294         int nwords, nbytes;
4295
4296         compr_dbg(compr, "Requested read of %zu bytes\n", count);
4297
4298         if (dsp->fatal_error || !compr->buf || compr->buf->error) {
4299                 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
4300                 return -EIO;
4301         }
4302
4303         count /= WM_ADSP_DATA_WORD_SIZE;
4304
4305         do {
4306                 nwords = wm_adsp_buffer_capture_block(compr, count);
4307                 if (nwords < 0) {
4308                         compr_err(compr, "Failed to capture block: %d\n",
4309                                   nwords);
4310                         return nwords;
4311                 }
4312
4313                 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
4314
4315                 compr_dbg(compr, "Read %d bytes\n", nbytes);
4316
4317                 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
4318                         compr_err(compr, "Failed to copy data to user: %d, %d\n",
4319                                   ntotal, nbytes);
4320                         return -EFAULT;
4321                 }
4322
4323                 count -= nwords;
4324                 ntotal += nbytes;
4325         } while (nwords > 0 && count > 0);
4326
4327         compr->copied_total += ntotal;
4328
4329         return ntotal;
4330 }
4331
4332 int wm_adsp_compr_copy(struct snd_soc_component *component,
4333                        struct snd_compr_stream *stream, char __user *buf,
4334                        size_t count)
4335 {
4336         struct wm_adsp_compr *compr = stream->runtime->private_data;
4337         struct wm_adsp *dsp = compr->dsp;
4338         int ret;
4339
4340         mutex_lock(&dsp->pwr_lock);
4341
4342         if (stream->direction == SND_COMPRESS_CAPTURE)
4343                 ret = wm_adsp_compr_read(compr, buf, count);
4344         else
4345                 ret = -ENOTSUPP;
4346
4347         mutex_unlock(&dsp->pwr_lock);
4348
4349         return ret;
4350 }
4351 EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
4352
4353 static void wm_adsp_fatal_error(struct wm_adsp *dsp)
4354 {
4355         struct wm_adsp_compr *compr;
4356
4357         dsp->fatal_error = true;
4358
4359         list_for_each_entry(compr, &dsp->compr_list, list) {
4360                 if (compr->stream)
4361                         snd_compr_fragment_elapsed(compr->stream);
4362         }
4363 }
4364
4365 irqreturn_t wm_adsp2_bus_error(int irq, void *data)
4366 {
4367         struct wm_adsp *dsp = (struct wm_adsp *)data;
4368         unsigned int val;
4369         struct regmap *regmap = dsp->regmap;
4370         int ret = 0;
4371
4372         mutex_lock(&dsp->pwr_lock);
4373
4374         ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, &val);
4375         if (ret) {
4376                 adsp_err(dsp,
4377                         "Failed to read Region Lock Ctrl register: %d\n", ret);
4378                 goto error;
4379         }
4380
4381         if (val & ADSP2_WDT_TIMEOUT_STS_MASK) {
4382                 adsp_err(dsp, "watchdog timeout error\n");
4383                 dsp->ops->stop_watchdog(dsp);
4384                 wm_adsp_fatal_error(dsp);
4385         }
4386
4387         if (val & (ADSP2_ADDR_ERR_MASK | ADSP2_REGION_LOCK_ERR_MASK)) {
4388                 if (val & ADSP2_ADDR_ERR_MASK)
4389                         adsp_err(dsp, "bus error: address error\n");
4390                 else
4391                         adsp_err(dsp, "bus error: region lock error\n");
4392
4393                 ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, &val);
4394                 if (ret) {
4395                         adsp_err(dsp,
4396                                  "Failed to read Bus Err Addr register: %d\n",
4397                                  ret);
4398                         goto error;
4399                 }
4400
4401                 adsp_err(dsp, "bus error address = 0x%x\n",
4402                          val & ADSP2_BUS_ERR_ADDR_MASK);
4403
4404                 ret = regmap_read(regmap,
4405                                   dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR,
4406                                   &val);
4407                 if (ret) {
4408                         adsp_err(dsp,
4409                                  "Failed to read Pmem Xmem Err Addr register: %d\n",
4410                                  ret);
4411                         goto error;
4412                 }
4413
4414                 adsp_err(dsp, "xmem error address = 0x%x\n",
4415                          val & ADSP2_XMEM_ERR_ADDR_MASK);
4416                 adsp_err(dsp, "pmem error address = 0x%x\n",
4417                          (val & ADSP2_PMEM_ERR_ADDR_MASK) >>
4418                          ADSP2_PMEM_ERR_ADDR_SHIFT);
4419         }
4420
4421         regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL,
4422                            ADSP2_CTRL_ERR_EINT, ADSP2_CTRL_ERR_EINT);
4423
4424 error:
4425         mutex_unlock(&dsp->pwr_lock);
4426
4427         return IRQ_HANDLED;
4428 }
4429 EXPORT_SYMBOL_GPL(wm_adsp2_bus_error);
4430
4431 irqreturn_t wm_halo_bus_error(int irq, void *data)
4432 {
4433         struct wm_adsp *dsp = (struct wm_adsp *)data;
4434         struct regmap *regmap = dsp->regmap;
4435         unsigned int fault[6];
4436         struct reg_sequence clear[] = {
4437                 { dsp->base + HALO_MPU_XM_VIO_STATUS,     0x0 },
4438                 { dsp->base + HALO_MPU_YM_VIO_STATUS,     0x0 },
4439                 { dsp->base + HALO_MPU_PM_VIO_STATUS,     0x0 },
4440         };
4441         int ret;
4442
4443         mutex_lock(&dsp->pwr_lock);
4444
4445         ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_1,
4446                           fault);
4447         if (ret) {
4448                 adsp_warn(dsp, "Failed to read AHB DEBUG_1: %d\n", ret);
4449                 goto exit_unlock;
4450         }
4451
4452         adsp_warn(dsp, "AHB: STATUS: 0x%x ADDR: 0x%x\n",
4453                   *fault & HALO_AHBM_FLAGS_ERR_MASK,
4454                   (*fault & HALO_AHBM_CORE_ERR_ADDR_MASK) >>
4455                   HALO_AHBM_CORE_ERR_ADDR_SHIFT);
4456
4457         ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_0,
4458                           fault);
4459         if (ret) {
4460                 adsp_warn(dsp, "Failed to read AHB DEBUG_0: %d\n", ret);
4461                 goto exit_unlock;
4462         }
4463
4464         adsp_warn(dsp, "AHB: SYS_ADDR: 0x%x\n", *fault);
4465
4466         ret = regmap_bulk_read(regmap, dsp->base + HALO_MPU_XM_VIO_ADDR,
4467                                fault, ARRAY_SIZE(fault));
4468         if (ret) {
4469                 adsp_warn(dsp, "Failed to read MPU fault info: %d\n", ret);
4470                 goto exit_unlock;
4471         }
4472
4473         adsp_warn(dsp, "XM: STATUS:0x%x ADDR:0x%x\n", fault[1], fault[0]);
4474         adsp_warn(dsp, "YM: STATUS:0x%x ADDR:0x%x\n", fault[3], fault[2]);
4475         adsp_warn(dsp, "PM: STATUS:0x%x ADDR:0x%x\n", fault[5], fault[4]);
4476
4477         ret = regmap_multi_reg_write(dsp->regmap, clear, ARRAY_SIZE(clear));
4478         if (ret)
4479                 adsp_warn(dsp, "Failed to clear MPU status: %d\n", ret);
4480
4481 exit_unlock:
4482         mutex_unlock(&dsp->pwr_lock);
4483
4484         return IRQ_HANDLED;
4485 }
4486 EXPORT_SYMBOL_GPL(wm_halo_bus_error);
4487
4488 irqreturn_t wm_halo_wdt_expire(int irq, void *data)
4489 {
4490         struct wm_adsp *dsp = data;
4491
4492         mutex_lock(&dsp->pwr_lock);
4493
4494         adsp_warn(dsp, "WDT Expiry Fault\n");
4495         dsp->ops->stop_watchdog(dsp);
4496         wm_adsp_fatal_error(dsp);
4497
4498         mutex_unlock(&dsp->pwr_lock);
4499
4500         return IRQ_HANDLED;
4501 }
4502 EXPORT_SYMBOL_GPL(wm_halo_wdt_expire);
4503
4504 static struct wm_adsp_ops wm_adsp1_ops = {
4505         .validate_version = wm_adsp_validate_version,
4506         .parse_sizes = wm_adsp1_parse_sizes,
4507         .region_to_reg = wm_adsp_region_to_reg,
4508 };
4509
4510 static struct wm_adsp_ops wm_adsp2_ops[] = {
4511         {
4512                 .sys_config_size = sizeof(struct wm_adsp_system_config_xm_hdr),
4513                 .parse_sizes = wm_adsp2_parse_sizes,
4514                 .validate_version = wm_adsp_validate_version,
4515                 .setup_algs = wm_adsp2_setup_algs,
4516                 .region_to_reg = wm_adsp_region_to_reg,
4517
4518                 .show_fw_status = wm_adsp2_show_fw_status,
4519
4520                 .enable_memory = wm_adsp2_enable_memory,
4521                 .disable_memory = wm_adsp2_disable_memory,
4522
4523                 .enable_core = wm_adsp2_enable_core,
4524                 .disable_core = wm_adsp2_disable_core,
4525
4526                 .start_core = wm_adsp2_start_core,
4527                 .stop_core = wm_adsp2_stop_core,
4528
4529         },
4530         {
4531                 .sys_config_size = sizeof(struct wm_adsp_system_config_xm_hdr),
4532                 .parse_sizes = wm_adsp2_parse_sizes,
4533                 .validate_version = wm_adsp_validate_version,
4534                 .setup_algs = wm_adsp2_setup_algs,
4535                 .region_to_reg = wm_adsp_region_to_reg,
4536
4537                 .show_fw_status = wm_adsp2v2_show_fw_status,
4538
4539                 .enable_memory = wm_adsp2_enable_memory,
4540                 .disable_memory = wm_adsp2_disable_memory,
4541                 .lock_memory = wm_adsp2_lock,
4542
4543                 .enable_core = wm_adsp2v2_enable_core,
4544                 .disable_core = wm_adsp2v2_disable_core,
4545
4546                 .start_core = wm_adsp2_start_core,
4547                 .stop_core = wm_adsp2_stop_core,
4548         },
4549         {
4550                 .sys_config_size = sizeof(struct wm_adsp_system_config_xm_hdr),
4551                 .parse_sizes = wm_adsp2_parse_sizes,
4552                 .validate_version = wm_adsp_validate_version,
4553                 .setup_algs = wm_adsp2_setup_algs,
4554                 .region_to_reg = wm_adsp_region_to_reg,
4555
4556                 .show_fw_status = wm_adsp2v2_show_fw_status,
4557                 .stop_watchdog = wm_adsp_stop_watchdog,
4558
4559                 .enable_memory = wm_adsp2_enable_memory,
4560                 .disable_memory = wm_adsp2_disable_memory,
4561                 .lock_memory = wm_adsp2_lock,
4562
4563                 .enable_core = wm_adsp2v2_enable_core,
4564                 .disable_core = wm_adsp2v2_disable_core,
4565
4566                 .start_core = wm_adsp2_start_core,
4567                 .stop_core = wm_adsp2_stop_core,
4568         },
4569 };
4570
4571 static struct wm_adsp_ops wm_halo_ops = {
4572         .sys_config_size = sizeof(struct wm_halo_system_config_xm_hdr),
4573         .parse_sizes = wm_adsp2_parse_sizes,
4574         .validate_version = wm_halo_validate_version,
4575         .setup_algs = wm_halo_setup_algs,
4576         .region_to_reg = wm_halo_region_to_reg,
4577
4578         .show_fw_status = wm_halo_show_fw_status,
4579         .stop_watchdog = wm_halo_stop_watchdog,
4580
4581         .lock_memory = wm_halo_configure_mpu,
4582
4583         .start_core = wm_halo_start_core,
4584         .stop_core = wm_halo_stop_core,
4585 };
4586
4587 MODULE_LICENSE("GPL v2");