1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
5 * Copyright 2015 Realtek Semiconductor Corp.
6 * Author: Bard Liao <bardliao@realtek.com>
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/platform_device.h>
17 #include <linux/spi/spi.h>
18 #include <linux/acpi.h>
19 #include <linux/gpio.h>
20 #include <linux/gpio/consumer.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/jack.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/rt5659.h>
34 static const struct reg_default rt5659_reg[] = {
531 static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
535 case RT5659_EJD_CTRL_2:
536 case RT5659_SILENCE_CTRL:
537 case RT5659_DAC2_DIG_VOL:
538 case RT5659_HP_IMP_GAIN_2:
539 case RT5659_PDM_OUT_CTRL:
540 case RT5659_PDM_DATA_CTRL_1:
541 case RT5659_PDM_DATA_CTRL_4:
542 case RT5659_HAPTIC_GEN_CTRL_1:
543 case RT5659_HAPTIC_GEN_CTRL_3:
544 case RT5659_HAPTIC_LPF_CTRL_3:
546 case RT5659_MICBIAS_1:
548 case RT5659_ADC_EQ_CTRL_1:
549 case RT5659_DAC_EQ_CTRL_1:
550 case RT5659_INT_ST_1:
551 case RT5659_INT_ST_2:
552 case RT5659_GPIO_STA:
553 case RT5659_SINE_GEN_CTRL_1:
554 case RT5659_IL_CMD_1:
555 case RT5659_4BTN_IL_CMD_1:
556 case RT5659_PSV_IL_CMD_1:
557 case RT5659_AJD1_CTRL:
558 case RT5659_AJD2_AJD3_CTRL:
559 case RT5659_JD_CTRL_3:
560 case RT5659_VENDOR_ID:
561 case RT5659_VENDOR_ID_1:
562 case RT5659_DEVICE_ID:
563 case RT5659_MEMORY_TEST:
564 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
565 case RT5659_VOL_TEST:
566 case RT5659_STO_NG2_CTRL_1:
567 case RT5659_STO_NG2_CTRL_5:
568 case RT5659_STO_NG2_CTRL_6:
569 case RT5659_STO_NG2_CTRL_7:
570 case RT5659_MONO_NG2_CTRL_1:
571 case RT5659_MONO_NG2_CTRL_5:
572 case RT5659_MONO_NG2_CTRL_6:
573 case RT5659_HP_IMP_SENS_CTRL_1:
574 case RT5659_HP_IMP_SENS_CTRL_3:
575 case RT5659_HP_IMP_SENS_CTRL_4:
576 case RT5659_HP_CALIB_CTRL_1:
577 case RT5659_HP_CALIB_CTRL_9:
578 case RT5659_HP_CALIB_STA_1:
579 case RT5659_HP_CALIB_STA_2:
580 case RT5659_HP_CALIB_STA_3:
581 case RT5659_HP_CALIB_STA_4:
582 case RT5659_HP_CALIB_STA_5:
583 case RT5659_HP_CALIB_STA_6:
584 case RT5659_HP_CALIB_STA_7:
585 case RT5659_HP_CALIB_STA_8:
586 case RT5659_HP_CALIB_STA_9:
587 case RT5659_MONO_AMP_CALIB_CTRL_1:
588 case RT5659_MONO_AMP_CALIB_CTRL_3:
589 case RT5659_MONO_AMP_CALIB_STA_1:
590 case RT5659_MONO_AMP_CALIB_STA_2:
591 case RT5659_MONO_AMP_CALIB_STA_3:
592 case RT5659_MONO_AMP_CALIB_STA_4:
593 case RT5659_SPK_PWR_LMT_STA_1:
594 case RT5659_SPK_PWR_LMT_STA_2:
595 case RT5659_SPK_PWR_LMT_STA_3:
596 case RT5659_SPK_PWR_LMT_STA_4:
597 case RT5659_SPK_PWR_LMT_STA_5:
598 case RT5659_SPK_PWR_LMT_STA_6:
599 case RT5659_SPK_DC_CAILB_CTRL_1:
600 case RT5659_SPK_DC_CAILB_STA_1:
601 case RT5659_SPK_DC_CAILB_STA_2:
602 case RT5659_SPK_DC_CAILB_STA_3:
603 case RT5659_SPK_DC_CAILB_STA_4:
604 case RT5659_SPK_DC_CAILB_STA_5:
605 case RT5659_SPK_DC_CAILB_STA_6:
606 case RT5659_SPK_DC_CAILB_STA_7:
607 case RT5659_SPK_DC_CAILB_STA_8:
608 case RT5659_SPK_DC_CAILB_STA_9:
609 case RT5659_SPK_DC_CAILB_STA_10:
610 case RT5659_SPK_VDD_STA_1:
611 case RT5659_SPK_VDD_STA_2:
612 case RT5659_SPK_DC_DET_CTRL_1:
613 case RT5659_PURE_DC_DET_CTRL_1:
614 case RT5659_PURE_DC_DET_CTRL_2:
615 case RT5659_DRC1_PRIV_1:
616 case RT5659_DRC1_PRIV_4:
617 case RT5659_DRC1_PRIV_5:
618 case RT5659_DRC1_PRIV_6:
619 case RT5659_DRC1_PRIV_7:
620 case RT5659_DRC2_PRIV_1:
621 case RT5659_DRC2_PRIV_4:
622 case RT5659_DRC2_PRIV_5:
623 case RT5659_DRC2_PRIV_6:
624 case RT5659_DRC2_PRIV_7:
625 case RT5659_ALC_PGA_STA_1:
626 case RT5659_ALC_PGA_STA_2:
627 case RT5659_ALC_PGA_STA_3:
634 static bool rt5659_readable_register(struct device *dev, unsigned int reg)
641 case RT5659_MONO_OUT:
642 case RT5659_HPL_GAIN:
643 case RT5659_HPR_GAIN:
644 case RT5659_MONO_GAIN:
645 case RT5659_SPDIF_CTRL_1:
646 case RT5659_SPDIF_CTRL_2:
647 case RT5659_CAL_BST_CTRL:
650 case RT5659_INL1_INR1_VOL:
651 case RT5659_EJD_CTRL_1:
652 case RT5659_EJD_CTRL_2:
653 case RT5659_EJD_CTRL_3:
654 case RT5659_SILENCE_CTRL:
655 case RT5659_PSV_CTRL:
656 case RT5659_SIDETONE_CTRL:
657 case RT5659_DAC1_DIG_VOL:
658 case RT5659_DAC2_DIG_VOL:
659 case RT5659_DAC_CTRL:
660 case RT5659_STO1_ADC_DIG_VOL:
661 case RT5659_MONO_ADC_DIG_VOL:
662 case RT5659_STO2_ADC_DIG_VOL:
663 case RT5659_STO1_BOOST:
664 case RT5659_MONO_BOOST:
665 case RT5659_STO2_BOOST:
666 case RT5659_HP_IMP_GAIN_1:
667 case RT5659_HP_IMP_GAIN_2:
668 case RT5659_STO1_ADC_MIXER:
669 case RT5659_MONO_ADC_MIXER:
670 case RT5659_AD_DA_MIXER:
671 case RT5659_STO_DAC_MIXER:
672 case RT5659_MONO_DAC_MIXER:
673 case RT5659_DIG_MIXER:
674 case RT5659_A_DAC_MUX:
675 case RT5659_DIG_INF23_DATA:
676 case RT5659_PDM_OUT_CTRL:
677 case RT5659_PDM_DATA_CTRL_1:
678 case RT5659_PDM_DATA_CTRL_2:
679 case RT5659_PDM_DATA_CTRL_3:
680 case RT5659_PDM_DATA_CTRL_4:
681 case RT5659_SPDIF_CTRL:
682 case RT5659_REC1_GAIN:
683 case RT5659_REC1_L1_MIXER:
684 case RT5659_REC1_L2_MIXER:
685 case RT5659_REC1_R1_MIXER:
686 case RT5659_REC1_R2_MIXER:
688 case RT5659_REC2_L1_MIXER:
689 case RT5659_REC2_L2_MIXER:
690 case RT5659_REC2_R1_MIXER:
691 case RT5659_REC2_R2_MIXER:
692 case RT5659_SPK_L_MIXER:
693 case RT5659_SPK_R_MIXER:
694 case RT5659_SPO_AMP_GAIN:
695 case RT5659_ALC_BACK_GAIN:
696 case RT5659_MONOMIX_GAIN:
697 case RT5659_MONOMIX_IN_GAIN:
698 case RT5659_OUT_L_GAIN:
699 case RT5659_OUT_L_MIXER:
700 case RT5659_OUT_R_GAIN:
701 case RT5659_OUT_R_MIXER:
702 case RT5659_LOUT_MIXER:
703 case RT5659_HAPTIC_GEN_CTRL_1:
704 case RT5659_HAPTIC_GEN_CTRL_2:
705 case RT5659_HAPTIC_GEN_CTRL_3:
706 case RT5659_HAPTIC_GEN_CTRL_4:
707 case RT5659_HAPTIC_GEN_CTRL_5:
708 case RT5659_HAPTIC_GEN_CTRL_6:
709 case RT5659_HAPTIC_GEN_CTRL_7:
710 case RT5659_HAPTIC_GEN_CTRL_8:
711 case RT5659_HAPTIC_GEN_CTRL_9:
712 case RT5659_HAPTIC_GEN_CTRL_10:
713 case RT5659_HAPTIC_GEN_CTRL_11:
714 case RT5659_HAPTIC_LPF_CTRL_1:
715 case RT5659_HAPTIC_LPF_CTRL_2:
716 case RT5659_HAPTIC_LPF_CTRL_3:
717 case RT5659_PWR_DIG_1:
718 case RT5659_PWR_DIG_2:
719 case RT5659_PWR_ANLG_1:
720 case RT5659_PWR_ANLG_2:
721 case RT5659_PWR_ANLG_3:
722 case RT5659_PWR_MIXER:
724 case RT5659_PRIV_INDEX:
726 case RT5659_PRIV_DATA:
727 case RT5659_PRE_DIV_1:
728 case RT5659_PRE_DIV_2:
729 case RT5659_I2S1_SDP:
730 case RT5659_I2S2_SDP:
731 case RT5659_I2S3_SDP:
732 case RT5659_ADDA_CLK_1:
733 case RT5659_ADDA_CLK_2:
734 case RT5659_DMIC_CTRL_1:
735 case RT5659_DMIC_CTRL_2:
736 case RT5659_TDM_CTRL_1:
737 case RT5659_TDM_CTRL_2:
738 case RT5659_TDM_CTRL_3:
739 case RT5659_TDM_CTRL_4:
740 case RT5659_TDM_CTRL_5:
742 case RT5659_PLL_CTRL_1:
743 case RT5659_PLL_CTRL_2:
757 case RT5659_HP_CHARGE_PUMP_1:
758 case RT5659_HP_CHARGE_PUMP_2:
759 case RT5659_MICBIAS_1:
760 case RT5659_MICBIAS_2:
764 case RT5659_REC_M1_M2_GAIN_CTRL:
765 case RT5659_RC_CLK_CTRL:
766 case RT5659_CLASSD_CTRL_1:
767 case RT5659_CLASSD_CTRL_2:
768 case RT5659_ADC_EQ_CTRL_1:
769 case RT5659_ADC_EQ_CTRL_2:
770 case RT5659_DAC_EQ_CTRL_1:
771 case RT5659_DAC_EQ_CTRL_2:
772 case RT5659_DAC_EQ_CTRL_3:
773 case RT5659_IRQ_CTRL_1:
774 case RT5659_IRQ_CTRL_2:
775 case RT5659_IRQ_CTRL_3:
776 case RT5659_IRQ_CTRL_4:
777 case RT5659_IRQ_CTRL_5:
778 case RT5659_IRQ_CTRL_6:
779 case RT5659_INT_ST_1:
780 case RT5659_INT_ST_2:
781 case RT5659_GPIO_CTRL_1:
782 case RT5659_GPIO_CTRL_2:
783 case RT5659_GPIO_CTRL_3:
784 case RT5659_GPIO_CTRL_4:
785 case RT5659_GPIO_CTRL_5:
786 case RT5659_GPIO_STA:
787 case RT5659_SINE_GEN_CTRL_1:
788 case RT5659_SINE_GEN_CTRL_2:
789 case RT5659_SINE_GEN_CTRL_3:
790 case RT5659_HP_AMP_DET_CTRL_1:
791 case RT5659_HP_AMP_DET_CTRL_2:
792 case RT5659_SV_ZCD_1:
793 case RT5659_SV_ZCD_2:
794 case RT5659_IL_CMD_1:
795 case RT5659_IL_CMD_2:
796 case RT5659_IL_CMD_3:
797 case RT5659_IL_CMD_4:
798 case RT5659_4BTN_IL_CMD_1:
799 case RT5659_4BTN_IL_CMD_2:
800 case RT5659_4BTN_IL_CMD_3:
801 case RT5659_PSV_IL_CMD_1:
802 case RT5659_PSV_IL_CMD_2:
803 case RT5659_ADC_STO1_HP_CTRL_1:
804 case RT5659_ADC_STO1_HP_CTRL_2:
805 case RT5659_ADC_MONO_HP_CTRL_1:
806 case RT5659_ADC_MONO_HP_CTRL_2:
807 case RT5659_AJD1_CTRL:
808 case RT5659_AJD2_AJD3_CTRL:
812 case RT5659_JD_CTRL_1:
813 case RT5659_JD_CTRL_2:
814 case RT5659_JD_CTRL_3:
815 case RT5659_JD_CTRL_4:
816 case RT5659_DIG_MISC:
819 case RT5659_VENDOR_ID:
820 case RT5659_VENDOR_ID_1:
821 case RT5659_DEVICE_ID:
822 case RT5659_DAC_ADC_DIG_VOL:
823 case RT5659_BIAS_CUR_CTRL_1:
824 case RT5659_BIAS_CUR_CTRL_2:
825 case RT5659_BIAS_CUR_CTRL_3:
826 case RT5659_BIAS_CUR_CTRL_4:
827 case RT5659_BIAS_CUR_CTRL_5:
828 case RT5659_BIAS_CUR_CTRL_6:
829 case RT5659_BIAS_CUR_CTRL_7:
830 case RT5659_BIAS_CUR_CTRL_8:
831 case RT5659_BIAS_CUR_CTRL_9:
832 case RT5659_BIAS_CUR_CTRL_10:
833 case RT5659_MEMORY_TEST:
834 case RT5659_VREF_REC_OP_FB_CAP_CTRL:
835 case RT5659_CLASSD_0:
836 case RT5659_CLASSD_1:
837 case RT5659_CLASSD_2:
838 case RT5659_CLASSD_3:
839 case RT5659_CLASSD_4:
840 case RT5659_CLASSD_5:
841 case RT5659_CLASSD_6:
842 case RT5659_CLASSD_7:
843 case RT5659_CLASSD_8:
844 case RT5659_CLASSD_9:
845 case RT5659_CLASSD_10:
846 case RT5659_CHARGE_PUMP_1:
847 case RT5659_CHARGE_PUMP_2:
848 case RT5659_DIG_IN_CTRL_1:
849 case RT5659_DIG_IN_CTRL_2:
850 case RT5659_PAD_DRIVING_CTRL:
851 case RT5659_SOFT_RAMP_DEPOP:
853 case RT5659_CHOP_DAC:
854 case RT5659_CHOP_ADC:
855 case RT5659_CALIB_ADC_CTRL:
856 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
857 case RT5659_VOL_TEST:
858 case RT5659_TEST_MODE_CTRL_1:
859 case RT5659_TEST_MODE_CTRL_2:
860 case RT5659_TEST_MODE_CTRL_3:
861 case RT5659_TEST_MODE_CTRL_4:
862 case RT5659_BASSBACK_CTRL:
863 case RT5659_MP3_PLUS_CTRL_1:
864 case RT5659_MP3_PLUS_CTRL_2:
865 case RT5659_MP3_HPF_A1:
866 case RT5659_MP3_HPF_A2:
867 case RT5659_MP3_HPF_H0:
868 case RT5659_MP3_LPF_H0:
869 case RT5659_3D_SPK_CTRL:
870 case RT5659_3D_SPK_COEF_1:
871 case RT5659_3D_SPK_COEF_2:
872 case RT5659_3D_SPK_COEF_3:
873 case RT5659_3D_SPK_COEF_4:
874 case RT5659_3D_SPK_COEF_5:
875 case RT5659_3D_SPK_COEF_6:
876 case RT5659_3D_SPK_COEF_7:
877 case RT5659_STO_NG2_CTRL_1:
878 case RT5659_STO_NG2_CTRL_2:
879 case RT5659_STO_NG2_CTRL_3:
880 case RT5659_STO_NG2_CTRL_4:
881 case RT5659_STO_NG2_CTRL_5:
882 case RT5659_STO_NG2_CTRL_6:
883 case RT5659_STO_NG2_CTRL_7:
884 case RT5659_STO_NG2_CTRL_8:
885 case RT5659_MONO_NG2_CTRL_1:
886 case RT5659_MONO_NG2_CTRL_2:
887 case RT5659_MONO_NG2_CTRL_3:
888 case RT5659_MONO_NG2_CTRL_4:
889 case RT5659_MONO_NG2_CTRL_5:
890 case RT5659_MONO_NG2_CTRL_6:
891 case RT5659_MID_HP_AMP_DET:
892 case RT5659_LOW_HP_AMP_DET:
893 case RT5659_LDO_CTRL:
894 case RT5659_HP_DECROSS_CTRL_1:
895 case RT5659_HP_DECROSS_CTRL_2:
896 case RT5659_HP_DECROSS_CTRL_3:
897 case RT5659_HP_DECROSS_CTRL_4:
898 case RT5659_HP_IMP_SENS_CTRL_1:
899 case RT5659_HP_IMP_SENS_CTRL_2:
900 case RT5659_HP_IMP_SENS_CTRL_3:
901 case RT5659_HP_IMP_SENS_CTRL_4:
902 case RT5659_HP_IMP_SENS_MAP_1:
903 case RT5659_HP_IMP_SENS_MAP_2:
904 case RT5659_HP_IMP_SENS_MAP_3:
905 case RT5659_HP_IMP_SENS_MAP_4:
906 case RT5659_HP_IMP_SENS_MAP_5:
907 case RT5659_HP_IMP_SENS_MAP_6:
908 case RT5659_HP_IMP_SENS_MAP_7:
909 case RT5659_HP_IMP_SENS_MAP_8:
910 case RT5659_HP_LOGIC_CTRL_1:
911 case RT5659_HP_LOGIC_CTRL_2:
912 case RT5659_HP_CALIB_CTRL_1:
913 case RT5659_HP_CALIB_CTRL_2:
914 case RT5659_HP_CALIB_CTRL_3:
915 case RT5659_HP_CALIB_CTRL_4:
916 case RT5659_HP_CALIB_CTRL_5:
917 case RT5659_HP_CALIB_CTRL_6:
918 case RT5659_HP_CALIB_CTRL_7:
919 case RT5659_HP_CALIB_CTRL_9:
920 case RT5659_HP_CALIB_CTRL_10:
921 case RT5659_HP_CALIB_CTRL_11:
922 case RT5659_HP_CALIB_STA_1:
923 case RT5659_HP_CALIB_STA_2:
924 case RT5659_HP_CALIB_STA_3:
925 case RT5659_HP_CALIB_STA_4:
926 case RT5659_HP_CALIB_STA_5:
927 case RT5659_HP_CALIB_STA_6:
928 case RT5659_HP_CALIB_STA_7:
929 case RT5659_HP_CALIB_STA_8:
930 case RT5659_HP_CALIB_STA_9:
931 case RT5659_MONO_AMP_CALIB_CTRL_1:
932 case RT5659_MONO_AMP_CALIB_CTRL_2:
933 case RT5659_MONO_AMP_CALIB_CTRL_3:
934 case RT5659_MONO_AMP_CALIB_CTRL_4:
935 case RT5659_MONO_AMP_CALIB_CTRL_5:
936 case RT5659_MONO_AMP_CALIB_STA_1:
937 case RT5659_MONO_AMP_CALIB_STA_2:
938 case RT5659_MONO_AMP_CALIB_STA_3:
939 case RT5659_MONO_AMP_CALIB_STA_4:
940 case RT5659_SPK_PWR_LMT_CTRL_1:
941 case RT5659_SPK_PWR_LMT_CTRL_2:
942 case RT5659_SPK_PWR_LMT_CTRL_3:
943 case RT5659_SPK_PWR_LMT_STA_1:
944 case RT5659_SPK_PWR_LMT_STA_2:
945 case RT5659_SPK_PWR_LMT_STA_3:
946 case RT5659_SPK_PWR_LMT_STA_4:
947 case RT5659_SPK_PWR_LMT_STA_5:
948 case RT5659_SPK_PWR_LMT_STA_6:
949 case RT5659_FLEX_SPK_BST_CTRL_1:
950 case RT5659_FLEX_SPK_BST_CTRL_2:
951 case RT5659_FLEX_SPK_BST_CTRL_3:
952 case RT5659_FLEX_SPK_BST_CTRL_4:
953 case RT5659_SPK_EX_LMT_CTRL_1:
954 case RT5659_SPK_EX_LMT_CTRL_2:
955 case RT5659_SPK_EX_LMT_CTRL_3:
956 case RT5659_SPK_EX_LMT_CTRL_4:
957 case RT5659_SPK_EX_LMT_CTRL_5:
958 case RT5659_SPK_EX_LMT_CTRL_6:
959 case RT5659_SPK_EX_LMT_CTRL_7:
960 case RT5659_ADJ_HPF_CTRL_1:
961 case RT5659_ADJ_HPF_CTRL_2:
962 case RT5659_SPK_DC_CAILB_CTRL_1:
963 case RT5659_SPK_DC_CAILB_CTRL_2:
964 case RT5659_SPK_DC_CAILB_CTRL_3:
965 case RT5659_SPK_DC_CAILB_CTRL_4:
966 case RT5659_SPK_DC_CAILB_CTRL_5:
967 case RT5659_SPK_DC_CAILB_STA_1:
968 case RT5659_SPK_DC_CAILB_STA_2:
969 case RT5659_SPK_DC_CAILB_STA_3:
970 case RT5659_SPK_DC_CAILB_STA_4:
971 case RT5659_SPK_DC_CAILB_STA_5:
972 case RT5659_SPK_DC_CAILB_STA_6:
973 case RT5659_SPK_DC_CAILB_STA_7:
974 case RT5659_SPK_DC_CAILB_STA_8:
975 case RT5659_SPK_DC_CAILB_STA_9:
976 case RT5659_SPK_DC_CAILB_STA_10:
977 case RT5659_SPK_VDD_STA_1:
978 case RT5659_SPK_VDD_STA_2:
979 case RT5659_SPK_DC_DET_CTRL_1:
980 case RT5659_SPK_DC_DET_CTRL_2:
981 case RT5659_SPK_DC_DET_CTRL_3:
982 case RT5659_PURE_DC_DET_CTRL_1:
983 case RT5659_PURE_DC_DET_CTRL_2:
987 case RT5659_DRC1_CTRL_1:
988 case RT5659_DRC1_CTRL_2:
989 case RT5659_DRC1_CTRL_3:
990 case RT5659_DRC1_CTRL_4:
991 case RT5659_DRC1_CTRL_5:
992 case RT5659_DRC1_CTRL_6:
993 case RT5659_DRC1_HARD_LMT_CTRL_1:
994 case RT5659_DRC1_HARD_LMT_CTRL_2:
995 case RT5659_DRC2_CTRL_1:
996 case RT5659_DRC2_CTRL_2:
997 case RT5659_DRC2_CTRL_3:
998 case RT5659_DRC2_CTRL_4:
999 case RT5659_DRC2_CTRL_5:
1000 case RT5659_DRC2_CTRL_6:
1001 case RT5659_DRC2_HARD_LMT_CTRL_1:
1002 case RT5659_DRC2_HARD_LMT_CTRL_2:
1003 case RT5659_DRC1_PRIV_1:
1004 case RT5659_DRC1_PRIV_2:
1005 case RT5659_DRC1_PRIV_3:
1006 case RT5659_DRC1_PRIV_4:
1007 case RT5659_DRC1_PRIV_5:
1008 case RT5659_DRC1_PRIV_6:
1009 case RT5659_DRC1_PRIV_7:
1010 case RT5659_DRC2_PRIV_1:
1011 case RT5659_DRC2_PRIV_2:
1012 case RT5659_DRC2_PRIV_3:
1013 case RT5659_DRC2_PRIV_4:
1014 case RT5659_DRC2_PRIV_5:
1015 case RT5659_DRC2_PRIV_6:
1016 case RT5659_DRC2_PRIV_7:
1017 case RT5659_MULTI_DRC_CTRL:
1018 case RT5659_CROSS_OVER_1:
1019 case RT5659_CROSS_OVER_2:
1020 case RT5659_CROSS_OVER_3:
1021 case RT5659_CROSS_OVER_4:
1022 case RT5659_CROSS_OVER_5:
1023 case RT5659_CROSS_OVER_6:
1024 case RT5659_CROSS_OVER_7:
1025 case RT5659_CROSS_OVER_8:
1026 case RT5659_CROSS_OVER_9:
1027 case RT5659_CROSS_OVER_10:
1028 case RT5659_ALC_PGA_CTRL_1:
1029 case RT5659_ALC_PGA_CTRL_2:
1030 case RT5659_ALC_PGA_CTRL_3:
1031 case RT5659_ALC_PGA_CTRL_4:
1032 case RT5659_ALC_PGA_CTRL_5:
1033 case RT5659_ALC_PGA_CTRL_6:
1034 case RT5659_ALC_PGA_CTRL_7:
1035 case RT5659_ALC_PGA_CTRL_8:
1036 case RT5659_ALC_PGA_STA_1:
1037 case RT5659_ALC_PGA_STA_2:
1038 case RT5659_ALC_PGA_STA_3:
1039 case RT5659_DAC_L_EQ_PRE_VOL:
1040 case RT5659_DAC_R_EQ_PRE_VOL:
1041 case RT5659_DAC_L_EQ_POST_VOL:
1042 case RT5659_DAC_R_EQ_POST_VOL:
1043 case RT5659_DAC_L_EQ_LPF1_A1:
1044 case RT5659_DAC_L_EQ_LPF1_H0:
1045 case RT5659_DAC_R_EQ_LPF1_A1:
1046 case RT5659_DAC_R_EQ_LPF1_H0:
1047 case RT5659_DAC_L_EQ_BPF2_A1:
1048 case RT5659_DAC_L_EQ_BPF2_A2:
1049 case RT5659_DAC_L_EQ_BPF2_H0:
1050 case RT5659_DAC_R_EQ_BPF2_A1:
1051 case RT5659_DAC_R_EQ_BPF2_A2:
1052 case RT5659_DAC_R_EQ_BPF2_H0:
1053 case RT5659_DAC_L_EQ_BPF3_A1:
1054 case RT5659_DAC_L_EQ_BPF3_A2:
1055 case RT5659_DAC_L_EQ_BPF3_H0:
1056 case RT5659_DAC_R_EQ_BPF3_A1:
1057 case RT5659_DAC_R_EQ_BPF3_A2:
1058 case RT5659_DAC_R_EQ_BPF3_H0:
1059 case RT5659_DAC_L_EQ_BPF4_A1:
1060 case RT5659_DAC_L_EQ_BPF4_A2:
1061 case RT5659_DAC_L_EQ_BPF4_H0:
1062 case RT5659_DAC_R_EQ_BPF4_A1:
1063 case RT5659_DAC_R_EQ_BPF4_A2:
1064 case RT5659_DAC_R_EQ_BPF4_H0:
1065 case RT5659_DAC_L_EQ_HPF1_A1:
1066 case RT5659_DAC_L_EQ_HPF1_H0:
1067 case RT5659_DAC_R_EQ_HPF1_A1:
1068 case RT5659_DAC_R_EQ_HPF1_H0:
1069 case RT5659_DAC_L_EQ_HPF2_A1:
1070 case RT5659_DAC_L_EQ_HPF2_A2:
1071 case RT5659_DAC_L_EQ_HPF2_H0:
1072 case RT5659_DAC_R_EQ_HPF2_A1:
1073 case RT5659_DAC_R_EQ_HPF2_A2:
1074 case RT5659_DAC_R_EQ_HPF2_H0:
1075 case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1076 case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1077 case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1078 case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1079 case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1080 case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1081 case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1082 case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1083 case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1084 case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1085 case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1086 case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1087 case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1088 case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1089 case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1090 case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1091 case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1092 case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1093 case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1094 case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1095 case RT5659_ADC_L_EQ_LPF1_A1:
1096 case RT5659_ADC_R_EQ_LPF1_A1:
1097 case RT5659_ADC_L_EQ_LPF1_H0:
1098 case RT5659_ADC_R_EQ_LPF1_H0:
1099 case RT5659_ADC_L_EQ_BPF1_A1:
1100 case RT5659_ADC_R_EQ_BPF1_A1:
1101 case RT5659_ADC_L_EQ_BPF1_A2:
1102 case RT5659_ADC_R_EQ_BPF1_A2:
1103 case RT5659_ADC_L_EQ_BPF1_H0:
1104 case RT5659_ADC_R_EQ_BPF1_H0:
1105 case RT5659_ADC_L_EQ_BPF2_A1:
1106 case RT5659_ADC_R_EQ_BPF2_A1:
1107 case RT5659_ADC_L_EQ_BPF2_A2:
1108 case RT5659_ADC_R_EQ_BPF2_A2:
1109 case RT5659_ADC_L_EQ_BPF2_H0:
1110 case RT5659_ADC_R_EQ_BPF2_H0:
1111 case RT5659_ADC_L_EQ_BPF3_A1:
1112 case RT5659_ADC_R_EQ_BPF3_A1:
1113 case RT5659_ADC_L_EQ_BPF3_A2:
1114 case RT5659_ADC_R_EQ_BPF3_A2:
1115 case RT5659_ADC_L_EQ_BPF3_H0:
1116 case RT5659_ADC_R_EQ_BPF3_H0:
1117 case RT5659_ADC_L_EQ_BPF4_A1:
1118 case RT5659_ADC_R_EQ_BPF4_A1:
1119 case RT5659_ADC_L_EQ_BPF4_A2:
1120 case RT5659_ADC_R_EQ_BPF4_A2:
1121 case RT5659_ADC_L_EQ_BPF4_H0:
1122 case RT5659_ADC_R_EQ_BPF4_H0:
1123 case RT5659_ADC_L_EQ_HPF1_A1:
1124 case RT5659_ADC_R_EQ_HPF1_A1:
1125 case RT5659_ADC_L_EQ_HPF1_H0:
1126 case RT5659_ADC_R_EQ_HPF1_H0:
1127 case RT5659_ADC_L_EQ_PRE_VOL:
1128 case RT5659_ADC_R_EQ_PRE_VOL:
1129 case RT5659_ADC_L_EQ_POST_VOL:
1130 case RT5659_ADC_R_EQ_POST_VOL:
1137 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1138 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1139 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1140 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1141 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1142 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1143 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1145 /* Interface data select */
1146 static const char * const rt5659_data_select[] = {
1147 "L/R", "R/L", "L/L", "R/R"
1150 static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1151 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1153 static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1154 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1156 static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1157 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1159 static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1160 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1162 static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1163 RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1165 static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1166 RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1168 static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1169 RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1171 static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1172 RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1174 static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1175 SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1177 static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1178 SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1180 static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1181 SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1183 static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1184 SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1186 static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1187 SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1189 static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1190 SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1192 static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1193 SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1195 static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1196 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1198 static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1199 struct snd_ctl_elem_value *ucontrol)
1201 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1202 int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1204 if (snd_soc_component_read(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1205 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1206 RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1207 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1208 RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1214 static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
1217 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1220 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
1222 /* MICBIAS1 and Mic Det Power for button detect*/
1223 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1224 snd_soc_dapm_force_enable_pin(dapm,
1226 snd_soc_dapm_sync(dapm);
1228 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
1229 RT5659_PWR_MB1, RT5659_PWR_MB1);
1230 snd_soc_component_update_bits(component, RT5659_PWR_VOL,
1231 RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1233 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1234 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1235 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1236 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1238 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1239 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1240 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1241 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1242 /* MICBIAS1 and Mic Det Power for button detect*/
1243 snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1244 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1245 snd_soc_dapm_sync(dapm);
1250 * rt5659_headset_detect - Detect headset.
1251 * @component: SoC audio component device.
1252 * @jack_insert: Jack insert or not.
1254 * Detect whether is headset or not when jack inserted.
1256 * Returns detect status.
1259 static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
1261 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1262 int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1265 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1268 snd_soc_dapm_force_enable_pin(dapm,
1270 snd_soc_dapm_sync(dapm);
1271 reg_63 = snd_soc_component_read(component, RT5659_PWR_ANLG_1);
1273 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1274 RT5659_PWR_VREF2 | RT5659_PWR_MB,
1275 RT5659_PWR_VREF2 | RT5659_PWR_MB);
1277 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1278 RT5659_PWR_FV2, RT5659_PWR_FV2);
1280 snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
1281 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1284 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1288 msleep(sleep_time[i]);
1289 val = snd_soc_component_read(component, RT5659_EJD_CTRL_2) & 0x0003;
1291 if (val == 0x1 || val == 0x2 || val == 0x3)
1297 rt5659->jack_type = SND_JACK_HEADSET;
1298 rt5659_enable_push_button_irq(component, true);
1301 snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
1302 rt5659->jack_type = SND_JACK_HEADPHONE;
1303 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1304 snd_soc_dapm_sync(dapm);
1308 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1309 snd_soc_dapm_sync(dapm);
1310 if (rt5659->jack_type == SND_JACK_HEADSET)
1311 rt5659_enable_push_button_irq(component, false);
1312 rt5659->jack_type = 0;
1315 dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1316 return rt5659->jack_type;
1319 static int rt5659_button_detect(struct snd_soc_component *component)
1323 val = snd_soc_component_read(component, RT5659_4BTN_IL_CMD_1);
1324 btn_type = val & 0xfff0;
1325 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
1330 static irqreturn_t rt5659_irq(int irq, void *data)
1332 struct rt5659_priv *rt5659 = data;
1334 queue_delayed_work(system_power_efficient_wq,
1335 &rt5659->jack_detect_work, msecs_to_jiffies(250));
1340 int rt5659_set_jack_detect(struct snd_soc_component *component,
1341 struct snd_soc_jack *hs_jack)
1343 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1345 rt5659->hs_jack = hs_jack;
1347 rt5659_irq(0, rt5659);
1351 EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1353 static void rt5659_jack_detect_work(struct work_struct *work)
1355 struct rt5659_priv *rt5659 =
1356 container_of(work, struct rt5659_priv, jack_detect_work.work);
1357 int val, btn_type, report = 0;
1359 if (!rt5659->component)
1362 val = snd_soc_component_read(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1365 if (rt5659->jack_type == 0) {
1366 /* jack was out, report jack type */
1367 report = rt5659_headset_detect(rt5659->component, 1);
1369 /* jack is already in, report button event */
1370 report = SND_JACK_HEADSET;
1371 btn_type = rt5659_button_detect(rt5659->component);
1373 * rt5659 can report three kinds of button behavior,
1374 * one click, double click and hold. However,
1375 * currently we will report button pressed/released
1376 * event. So all the three button behaviors are
1377 * treated as button pressed.
1383 report |= SND_JACK_BTN_0;
1388 report |= SND_JACK_BTN_1;
1393 report |= SND_JACK_BTN_2;
1398 report |= SND_JACK_BTN_3;
1400 case 0x0000: /* unpressed */
1404 dev_err(rt5659->component->dev,
1405 "Unexpected button code 0x%04x\n",
1410 /* button release or spurious interrput*/
1412 report = rt5659->jack_type;
1416 report = rt5659_headset_detect(rt5659->component, 0);
1419 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1420 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1421 SND_JACK_BTN_2 | SND_JACK_BTN_3);
1424 static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
1426 struct rt5659_priv *rt5659 =
1427 container_of(work, struct rt5659_priv, jack_detect_work.work);
1429 bool hp_flag, mic_flag;
1431 if (!rt5659->hs_jack)
1434 /* headphone jack */
1435 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1436 hp_flag = (!(value & 0x8)) ? true : false;
1438 if (hp_flag != rt5659->hda_hp_plugged) {
1439 rt5659->hda_hp_plugged = hp_flag;
1442 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1444 rt5659->jack_type |= SND_JACK_HEADPHONE;
1446 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1448 rt5659->jack_type = rt5659->jack_type &
1449 (~SND_JACK_HEADPHONE);
1452 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1453 SND_JACK_HEADPHONE);
1457 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1458 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1459 mic_flag = (value & 0x2000) ? true : false;
1461 if (mic_flag != rt5659->hda_mic_plugged) {
1462 rt5659->hda_mic_plugged = mic_flag;
1464 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1466 rt5659->jack_type |= SND_JACK_MICROPHONE;
1468 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1470 rt5659->jack_type = rt5659->jack_type
1471 & (~SND_JACK_MICROPHONE);
1474 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1475 SND_JACK_MICROPHONE);
1479 static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1480 /* Speaker Output Volume */
1481 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1482 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1484 /* Headphone Output Volume */
1485 SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1486 RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1487 rt5659_hp_vol_put, hp_vol_tlv),
1489 /* Mono Output Volume */
1490 SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1491 RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1494 SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1495 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1497 /* DAC Digital Volume */
1498 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1499 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1500 SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1501 RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1503 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1504 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1505 SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1506 RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1508 /* IN1/IN2/IN3/IN4 Volume */
1509 SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1510 RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1511 SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1512 RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1513 SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1514 RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1515 SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1516 RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1518 /* INL/INR Volume Control */
1519 SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1520 RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1522 /* ADC Digital Volume Control */
1523 SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1524 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1525 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1526 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1527 SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1528 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1529 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1530 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1531 SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1532 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1533 SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1534 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1536 /* ADC Boost Volume Control */
1537 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1538 RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1541 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1542 RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1545 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1546 RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1549 SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1550 SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1551 SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1552 SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1556 * set_dmic_clk - Set parameter of dmic.
1559 * @kcontrol: The kcontrol of this widget.
1562 * Choose dmic clock between 1MHz and 3MHz.
1563 * It is better for clock to approximate 3MHz.
1565 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1566 struct snd_kcontrol *kcontrol, int event)
1568 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1569 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1572 pd = rl6231_get_pre_div(rt5659->regmap,
1573 RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1574 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1577 dev_err(component->dev, "Failed to set DMIC clock\n");
1579 snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
1580 RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1585 static int set_adc1_clk(struct snd_soc_dapm_widget *w,
1586 struct snd_kcontrol *kcontrol, int event)
1588 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1591 case SND_SOC_DAPM_POST_PMU:
1592 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1593 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
1594 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
1597 case SND_SOC_DAPM_PRE_PMD:
1598 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1599 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
1610 static int set_adc2_clk(struct snd_soc_dapm_widget *w,
1611 struct snd_kcontrol *kcontrol, int event)
1613 struct snd_soc_component *component =
1614 snd_soc_dapm_to_component(w->dapm);
1617 case SND_SOC_DAPM_POST_PMU:
1618 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1619 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
1620 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
1623 case SND_SOC_DAPM_PRE_PMD:
1624 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1625 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
1636 static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1637 struct snd_kcontrol *kcontrol, int event)
1639 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1642 case SND_SOC_DAPM_PRE_PMU:
1644 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
1646 case SND_SOC_DAPM_POST_PMD:
1647 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1656 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1657 struct snd_soc_dapm_widget *sink)
1660 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1662 val = snd_soc_component_read(component, RT5659_GLB_CLK);
1663 val &= RT5659_SCLK_SRC_MASK;
1664 if (val == RT5659_SCLK_SRC_PLL1)
1670 static int is_using_asrc(struct snd_soc_dapm_widget *w,
1671 struct snd_soc_dapm_widget *sink)
1673 unsigned int reg, shift, val;
1674 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1677 case RT5659_ADC_MONO_R_ASRC_SFT:
1678 reg = RT5659_ASRC_3;
1679 shift = RT5659_AD_MONO_R_T_SFT;
1681 case RT5659_ADC_MONO_L_ASRC_SFT:
1682 reg = RT5659_ASRC_3;
1683 shift = RT5659_AD_MONO_L_T_SFT;
1685 case RT5659_ADC_STO1_ASRC_SFT:
1686 reg = RT5659_ASRC_2;
1687 shift = RT5659_AD_STO1_T_SFT;
1689 case RT5659_DAC_MONO_R_ASRC_SFT:
1690 reg = RT5659_ASRC_2;
1691 shift = RT5659_DA_MONO_R_T_SFT;
1693 case RT5659_DAC_MONO_L_ASRC_SFT:
1694 reg = RT5659_ASRC_2;
1695 shift = RT5659_DA_MONO_L_T_SFT;
1697 case RT5659_DAC_STO_ASRC_SFT:
1698 reg = RT5659_ASRC_2;
1699 shift = RT5659_DA_STO_T_SFT;
1705 val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
1710 /* I2S_Pre_Div1 should be 1 in asrc mode */
1711 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
1712 RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1721 static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1722 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1723 RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1724 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1725 RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1728 static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1729 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1730 RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1731 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1732 RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1735 static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1736 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1737 RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1738 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1739 RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1742 static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1743 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1744 RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1745 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1746 RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1749 static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1750 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1751 RT5659_M_ADCMIX_L_SFT, 1, 1),
1752 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1753 RT5659_M_DAC1_L_SFT, 1, 1),
1756 static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1757 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1758 RT5659_M_ADCMIX_R_SFT, 1, 1),
1759 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1760 RT5659_M_DAC1_R_SFT, 1, 1),
1763 static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1764 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1765 RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1766 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1767 RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1768 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1769 RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1770 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1771 RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1774 static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1775 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1776 RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1777 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1778 RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1779 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1780 RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1781 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1782 RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1785 static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1786 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1787 RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1788 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1789 RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1790 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1791 RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1792 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1793 RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1796 static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1797 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1798 RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1799 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1800 RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1801 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1802 RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1803 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1804 RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1807 /* Analog Input Mixer */
1808 static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1809 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1810 RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1811 SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1812 RT5659_M_INL_RM1_L_SFT, 1, 1),
1813 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1814 RT5659_M_BST4_RM1_L_SFT, 1, 1),
1815 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1816 RT5659_M_BST3_RM1_L_SFT, 1, 1),
1817 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1818 RT5659_M_BST2_RM1_L_SFT, 1, 1),
1819 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1820 RT5659_M_BST1_RM1_L_SFT, 1, 1),
1823 static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1824 SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1825 RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1826 SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1827 RT5659_M_INR_RM1_R_SFT, 1, 1),
1828 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1829 RT5659_M_BST4_RM1_R_SFT, 1, 1),
1830 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1831 RT5659_M_BST3_RM1_R_SFT, 1, 1),
1832 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1833 RT5659_M_BST2_RM1_R_SFT, 1, 1),
1834 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1835 RT5659_M_BST1_RM1_R_SFT, 1, 1),
1838 static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1839 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1840 RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1841 SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1842 RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1843 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1844 RT5659_M_BST4_RM2_L_SFT, 1, 1),
1845 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1846 RT5659_M_BST3_RM2_L_SFT, 1, 1),
1847 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1848 RT5659_M_BST2_RM2_L_SFT, 1, 1),
1849 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1850 RT5659_M_BST1_RM2_L_SFT, 1, 1),
1853 static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1854 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1855 RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1856 SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1857 RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1858 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1859 RT5659_M_BST4_RM2_R_SFT, 1, 1),
1860 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1861 RT5659_M_BST3_RM2_R_SFT, 1, 1),
1862 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1863 RT5659_M_BST2_RM2_R_SFT, 1, 1),
1864 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1865 RT5659_M_BST1_RM2_R_SFT, 1, 1),
1868 static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1869 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1870 RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1871 SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1872 RT5659_M_BST1_SM_L_SFT, 1, 1),
1873 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1874 RT5659_M_IN_L_SM_L_SFT, 1, 1),
1875 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1876 RT5659_M_IN_R_SM_L_SFT, 1, 1),
1877 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1878 RT5659_M_BST3_SM_L_SFT, 1, 1),
1881 static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1882 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1883 RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1884 SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1885 RT5659_M_BST4_SM_R_SFT, 1, 1),
1886 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1887 RT5659_M_IN_L_SM_R_SFT, 1, 1),
1888 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1889 RT5659_M_IN_R_SM_R_SFT, 1, 1),
1890 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1891 RT5659_M_BST3_SM_R_SFT, 1, 1),
1894 static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1895 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1896 RT5659_M_DAC_L2_MM_SFT, 1, 1),
1897 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1898 RT5659_M_DAC_R2_MM_SFT, 1, 1),
1899 SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1900 RT5659_M_BST1_MM_SFT, 1, 1),
1901 SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1902 RT5659_M_BST2_MM_SFT, 1, 1),
1903 SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1904 RT5659_M_BST3_MM_SFT, 1, 1),
1907 static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1908 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1909 RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1910 SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1911 RT5659_M_IN_L_OM_L_SFT, 1, 1),
1912 SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1913 RT5659_M_BST1_OM_L_SFT, 1, 1),
1914 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1915 RT5659_M_BST2_OM_L_SFT, 1, 1),
1916 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1917 RT5659_M_BST3_OM_L_SFT, 1, 1),
1920 static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1921 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1922 RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1923 SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1924 RT5659_M_IN_R_OM_R_SFT, 1, 1),
1925 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1926 RT5659_M_BST2_OM_R_SFT, 1, 1),
1927 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1928 RT5659_M_BST3_OM_R_SFT, 1, 1),
1929 SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1930 RT5659_M_BST4_OM_R_SFT, 1, 1),
1933 static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1934 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1935 RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1936 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1937 RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1940 static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1941 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1942 RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1943 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1944 RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1947 static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1948 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1949 RT5659_M_DAC_L2_MA_SFT, 1, 1),
1950 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1951 RT5659_M_MONOVOL_MA_SFT, 1, 1),
1954 static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1955 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1956 RT5659_M_DAC_L2_LM_SFT, 1, 1),
1957 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1958 RT5659_M_OV_L_LM_SFT, 1, 1),
1961 static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
1962 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
1963 RT5659_M_DAC_R2_LM_SFT, 1, 1),
1964 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
1965 RT5659_M_OV_R_LM_SFT, 1, 1),
1969 /*MX-1B [6:4], MX-1B [2:0]*/
1970 static const char * const rt5659_dac2_src[] = {
1971 "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
1974 static SOC_ENUM_SINGLE_DECL(
1975 rt5659_dac_l2_enum, RT5659_DAC_CTRL,
1976 RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
1978 static const struct snd_kcontrol_new rt5659_dac_l2_mux =
1979 SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
1981 static SOC_ENUM_SINGLE_DECL(
1982 rt5659_dac_r2_enum, RT5659_DAC_CTRL,
1983 RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
1985 static const struct snd_kcontrol_new rt5659_dac_r2_mux =
1986 SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
1989 /* STO1 ADC1 Source */
1991 static const char * const rt5659_sto1_adc1_src[] = {
1995 static SOC_ENUM_SINGLE_DECL(
1996 rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
1997 RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
1999 static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
2000 SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
2002 /* STO1 ADC Source */
2004 static const char * const rt5659_sto1_adc_src[] = {
2008 static SOC_ENUM_SINGLE_DECL(
2009 rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
2010 RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
2012 static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
2013 SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
2015 /* STO1 ADC2 Source */
2017 static const char * const rt5659_sto1_adc2_src[] = {
2021 static SOC_ENUM_SINGLE_DECL(
2022 rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
2023 RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
2025 static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
2026 SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2028 /* STO1 DMIC Source */
2030 static const char * const rt5659_sto1_dmic_src[] = {
2034 static SOC_ENUM_SINGLE_DECL(
2035 rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
2036 RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
2038 static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
2039 SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
2042 /* MONO ADC L2 Source */
2044 static const char * const rt5659_mono_adc_l2_src[] = {
2045 "Mono DAC MIXL", "DMIC"
2048 static SOC_ENUM_SINGLE_DECL(
2049 rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2050 RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2052 static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2053 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2056 /* MONO ADC L1 Source */
2058 static const char * const rt5659_mono_adc_l1_src[] = {
2059 "Mono DAC MIXL", "ADC"
2062 static SOC_ENUM_SINGLE_DECL(
2063 rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2064 RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2066 static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2067 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2069 /* MONO ADC L Source, MONO ADC R Source*/
2070 /* MX-27 [10:9], MX-27 [2:1] */
2071 static const char * const rt5659_mono_adc_src[] = {
2072 "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2075 static SOC_ENUM_SINGLE_DECL(
2076 rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2077 RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2079 static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2080 SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2082 static SOC_ENUM_SINGLE_DECL(
2083 rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2084 RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2086 static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2087 SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2089 /* MONO DMIC L Source */
2091 static const char * const rt5659_mono_dmic_l_src[] = {
2092 "DMIC1 L", "DMIC2 L"
2095 static SOC_ENUM_SINGLE_DECL(
2096 rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2097 RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2099 static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2100 SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2102 /* MONO ADC R2 Source */
2104 static const char * const rt5659_mono_adc_r2_src[] = {
2105 "Mono DAC MIXR", "DMIC"
2108 static SOC_ENUM_SINGLE_DECL(
2109 rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2110 RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2112 static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2113 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2115 /* MONO ADC R1 Source */
2117 static const char * const rt5659_mono_adc_r1_src[] = {
2118 "Mono DAC MIXR", "ADC"
2121 static SOC_ENUM_SINGLE_DECL(
2122 rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2123 RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2125 static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2126 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2128 /* MONO DMIC R Source */
2130 static const char * const rt5659_mono_dmic_r_src[] = {
2131 "DMIC1 R", "DMIC2 R"
2134 static SOC_ENUM_SINGLE_DECL(
2135 rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2136 RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2138 static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2139 SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2142 /* DAC R1 Source, DAC L1 Source*/
2143 /* MX-29 [11:10], MX-29 [9:8]*/
2144 static const char * const rt5659_dac1_src[] = {
2145 "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2148 static SOC_ENUM_SINGLE_DECL(
2149 rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2150 RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2152 static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2153 SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2155 static SOC_ENUM_SINGLE_DECL(
2156 rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2157 RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2159 static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2160 SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2162 /* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2163 /* MX-2C [6], MX-2C [4]*/
2164 static const char * const rt5659_dig_dac_mix_src[] = {
2165 "Stereo DAC Mixer", "Mono DAC Mixer"
2168 static SOC_ENUM_SINGLE_DECL(
2169 rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2170 RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2172 static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2173 SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2175 static SOC_ENUM_SINGLE_DECL(
2176 rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2177 RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2179 static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2180 SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2182 /* Analog DAC L1 Source, Analog DAC R1 Source*/
2183 /* MX-2D [3], MX-2D [2]*/
2184 static const char * const rt5659_alg_dac1_src[] = {
2185 "DAC", "Stereo DAC Mixer"
2188 static SOC_ENUM_SINGLE_DECL(
2189 rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2190 RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2192 static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2193 SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2195 static SOC_ENUM_SINGLE_DECL(
2196 rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2197 RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2199 static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2200 SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2202 /* Analog DAC LR Source, Analog DAC R2 Source*/
2203 /* MX-2D [1], MX-2D [0]*/
2204 static const char * const rt5659_alg_dac2_src[] = {
2205 "Stereo DAC Mixer", "Mono DAC Mixer"
2208 static SOC_ENUM_SINGLE_DECL(
2209 rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2210 RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2212 static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2213 SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2215 static SOC_ENUM_SINGLE_DECL(
2216 rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2217 RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2219 static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2220 SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2222 /* Interface2 ADC Data Input*/
2224 static const char * const rt5659_if2_adc_in_src[] = {
2225 "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2228 static SOC_ENUM_SINGLE_DECL(
2229 rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2230 RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2232 static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2233 SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2235 /* Interface3 ADC Data Input*/
2237 static const char * const rt5659_if3_adc_in_src[] = {
2238 "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2241 static SOC_ENUM_SINGLE_DECL(
2242 rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2243 RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2245 static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2246 SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2249 /* MX-31 [15] [13] */
2250 static const char * const rt5659_pdm_src[] = {
2251 "Mono DAC", "Stereo DAC"
2254 static SOC_ENUM_SINGLE_DECL(
2255 rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2256 RT5659_PDM1_L_SFT, rt5659_pdm_src);
2258 static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2259 SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2261 static SOC_ENUM_SINGLE_DECL(
2262 rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2263 RT5659_PDM1_R_SFT, rt5659_pdm_src);
2265 static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2266 SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2268 /* SPDIF Output source*/
2270 static const char * const rt5659_spdif_src[] = {
2271 "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2274 static SOC_ENUM_SINGLE_DECL(
2275 rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2276 RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2278 static const struct snd_kcontrol_new rt5659_spdif_mux =
2279 SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2281 /* I2S1 TDM ADCDAT Source */
2283 static const char * const rt5659_rx_adc_data_src[] = {
2284 "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2285 "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2286 "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2287 "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2288 "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2289 "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2290 "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2291 "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2294 static SOC_ENUM_SINGLE_DECL(
2295 rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2296 RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2298 static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2299 SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2301 /* Out Volume Switch */
2302 static const struct snd_kcontrol_new spkvol_l_switch =
2303 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2305 static const struct snd_kcontrol_new spkvol_r_switch =
2306 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2308 static const struct snd_kcontrol_new monovol_switch =
2309 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2311 static const struct snd_kcontrol_new outvol_l_switch =
2312 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2314 static const struct snd_kcontrol_new outvol_r_switch =
2315 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2318 static const struct snd_kcontrol_new spo_switch =
2319 SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2321 static const struct snd_kcontrol_new mono_switch =
2322 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2324 static const struct snd_kcontrol_new hpo_l_switch =
2325 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2327 static const struct snd_kcontrol_new hpo_r_switch =
2328 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2330 static const struct snd_kcontrol_new lout_l_switch =
2331 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2333 static const struct snd_kcontrol_new lout_r_switch =
2334 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2336 static const struct snd_kcontrol_new pdm_l_switch =
2337 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2340 static const struct snd_kcontrol_new pdm_r_switch =
2341 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2344 static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2345 struct snd_kcontrol *kcontrol, int event)
2347 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2350 case SND_SOC_DAPM_PRE_PMU:
2351 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2352 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2353 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2354 RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2355 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
2356 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2359 case SND_SOC_DAPM_POST_PMD:
2360 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
2361 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2362 RT5659_M_RI_DIG, 0x0);
2363 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2364 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2365 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2376 static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2377 struct snd_kcontrol *kcontrol, int event)
2379 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2382 case SND_SOC_DAPM_PRE_PMU:
2383 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2386 case SND_SOC_DAPM_POST_PMD:
2387 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2398 static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2399 struct snd_kcontrol *kcontrol, int event)
2401 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2404 case SND_SOC_DAPM_POST_PMU:
2405 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2406 snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
2409 case SND_SOC_DAPM_PRE_PMD:
2410 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
2420 static int set_dmic_power(struct snd_soc_dapm_widget *w,
2421 struct snd_kcontrol *kcontrol, int event)
2424 case SND_SOC_DAPM_POST_PMU:
2425 /*Add delay to avoid pop noise*/
2436 static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2437 SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2439 SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2441 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2442 RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2443 SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2444 RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2447 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2448 RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2449 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2450 RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2451 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2452 RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2453 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2454 RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2455 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2456 RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2457 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2458 RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2459 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2460 RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2461 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2462 RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2463 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2464 RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2467 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2469 SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2471 SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2475 SND_SOC_DAPM_INPUT("DMIC L1"),
2476 SND_SOC_DAPM_INPUT("DMIC R1"),
2477 SND_SOC_DAPM_INPUT("DMIC L2"),
2478 SND_SOC_DAPM_INPUT("DMIC R2"),
2480 SND_SOC_DAPM_INPUT("IN1P"),
2481 SND_SOC_DAPM_INPUT("IN1N"),
2482 SND_SOC_DAPM_INPUT("IN2P"),
2483 SND_SOC_DAPM_INPUT("IN2N"),
2484 SND_SOC_DAPM_INPUT("IN3P"),
2485 SND_SOC_DAPM_INPUT("IN3N"),
2486 SND_SOC_DAPM_INPUT("IN4P"),
2487 SND_SOC_DAPM_INPUT("IN4N"),
2489 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2490 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2492 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2493 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2494 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2495 RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2496 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2497 RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2500 SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2501 RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2502 SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2503 RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2504 SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2505 RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2506 SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2507 RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2508 SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2509 RT5659_PWR_BST1_BIT, 0, NULL, 0),
2510 SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2511 RT5659_PWR_BST2_BIT, 0, NULL, 0),
2512 SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2513 RT5659_PWR_BST3_BIT, 0, NULL, 0),
2514 SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2515 RT5659_PWR_BST4_BIT, 0, NULL, 0),
2519 SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2521 SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2525 SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2526 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2527 SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2528 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2529 SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2530 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2531 SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2532 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2535 SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2536 SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2537 SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2538 SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2540 SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2541 RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2542 SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2543 RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2544 SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2545 RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2546 SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2547 RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2548 SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
2549 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2550 SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2551 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2554 SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2555 &rt5659_sto1_dmic_mux),
2556 SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2557 &rt5659_sto1_dmic_mux),
2558 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2559 &rt5659_sto1_adc1_mux),
2560 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2561 &rt5659_sto1_adc1_mux),
2562 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2563 &rt5659_sto1_adc2_mux),
2564 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2565 &rt5659_sto1_adc2_mux),
2566 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2567 &rt5659_sto1_adc_mux),
2568 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2569 &rt5659_sto1_adc_mux),
2570 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2571 &rt5659_mono_adc_l2_mux),
2572 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2573 &rt5659_mono_adc_r2_mux),
2574 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2575 &rt5659_mono_adc_l1_mux),
2576 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2577 &rt5659_mono_adc_r1_mux),
2578 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2579 &rt5659_mono_dmic_l_mux),
2580 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2581 &rt5659_mono_dmic_r_mux),
2582 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2583 &rt5659_mono_adc_l_mux),
2584 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2585 &rt5659_mono_adc_r_mux),
2587 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2588 RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2589 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2590 RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2591 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2592 0, 0, rt5659_sto1_adc_l_mix,
2593 ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2594 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2595 0, 0, rt5659_sto1_adc_r_mix,
2596 ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2597 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2598 RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2599 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2600 RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2601 ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2602 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2603 RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2604 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2605 RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2606 ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2609 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2610 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2611 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2612 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2613 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2614 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2615 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2616 SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2618 SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2619 RT5659_L_MUTE_SFT, 1, NULL, 0),
2620 SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2621 RT5659_R_MUTE_SFT, 1, NULL, 0),
2623 /* Digital Interface */
2624 SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2626 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2627 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2628 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2629 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2630 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2631 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2632 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2633 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2634 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2635 SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2637 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2638 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2639 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2640 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2641 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2642 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2643 SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2645 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2646 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2647 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2648 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2649 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2650 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2652 /* Digital Interface Select */
2653 SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2654 SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2655 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2656 &rt5659_rx_adc_dac_mux),
2657 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2658 &rt5659_if2_adc_in_mux),
2659 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2660 &rt5659_if3_adc_in_mux),
2661 SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2662 &rt5659_if1_01_adc_swap_mux),
2663 SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2664 &rt5659_if1_23_adc_swap_mux),
2665 SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2666 &rt5659_if1_45_adc_swap_mux),
2667 SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2668 &rt5659_if1_67_adc_swap_mux),
2669 SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2670 &rt5659_if2_dac_swap_mux),
2671 SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2672 &rt5659_if2_adc_swap_mux),
2673 SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2674 &rt5659_if3_dac_swap_mux),
2675 SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2676 &rt5659_if3_adc_swap_mux),
2678 /* Audio Interface */
2679 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2680 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2681 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2682 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2683 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2684 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2687 /* DAC mixer before sound effect */
2688 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2689 rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2690 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2691 rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2693 /* DAC channel Mux */
2694 SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2695 SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2696 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2697 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2699 SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2700 &rt5659_alg_dac_l1_mux),
2701 SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2702 &rt5659_alg_dac_r1_mux),
2703 SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2704 &rt5659_alg_dac_l2_mux),
2705 SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2706 &rt5659_alg_dac_r2_mux),
2709 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2710 RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2711 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2712 RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2713 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2714 RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2715 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2716 rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2717 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2718 rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2719 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2720 rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2721 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2722 rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2723 SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2724 &rt5659_dig_dac_mixl_mux),
2725 SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2726 &rt5659_dig_dac_mixr_mux),
2729 SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2730 RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2731 SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2732 RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2733 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2734 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2736 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2737 RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2738 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2739 RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2740 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2741 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2742 SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2745 SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2746 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2747 SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2748 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2749 SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2750 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2751 SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2752 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2753 SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2754 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2757 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2759 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2761 SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2763 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2765 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2768 /* SPO/MONO/HPO/LOUT */
2769 SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2770 ARRAY_SIZE(rt5659_spo_l_mix)),
2771 SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2772 ARRAY_SIZE(rt5659_spo_r_mix)),
2773 SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2774 ARRAY_SIZE(rt5659_mono_mix)),
2775 SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2776 ARRAY_SIZE(rt5659_lout_l_mix)),
2777 SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2778 ARRAY_SIZE(rt5659_lout_r_mix)),
2780 SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2781 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2782 SND_SOC_DAPM_PRE_PMU),
2783 SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2784 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2785 SND_SOC_DAPM_PRE_PMU),
2786 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2787 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2788 SND_SOC_DAPM_PGA_S("LOUT Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
2791 SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2792 rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2793 SND_SOC_DAPM_POST_PMD),
2795 SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2796 SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2798 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2800 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2802 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2804 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2806 SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2808 SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2812 SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2813 RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2814 SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2815 RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2816 SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2817 RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2820 SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2822 SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2823 SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2826 SND_SOC_DAPM_OUTPUT("HPOL"),
2827 SND_SOC_DAPM_OUTPUT("HPOR"),
2828 SND_SOC_DAPM_OUTPUT("SPOL"),
2829 SND_SOC_DAPM_OUTPUT("SPOR"),
2830 SND_SOC_DAPM_OUTPUT("LOUTL"),
2831 SND_SOC_DAPM_OUTPUT("LOUTR"),
2832 SND_SOC_DAPM_OUTPUT("MONOOUT"),
2833 SND_SOC_DAPM_OUTPUT("PDML"),
2834 SND_SOC_DAPM_OUTPUT("PDMR"),
2835 SND_SOC_DAPM_OUTPUT("SPDIF"),
2838 static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2840 { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2841 { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2842 { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2843 { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2844 { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2845 { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2846 { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2849 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2850 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2851 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2852 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2853 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2854 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2856 { "SYS CLK DET", NULL, "CLKDET" },
2858 { "I2S1", NULL, "I2S1 ASRC" },
2859 { "I2S2", NULL, "I2S2 ASRC" },
2860 { "I2S3", NULL, "I2S3 ASRC" },
2862 { "DMIC1", NULL, "DMIC L1" },
2863 { "DMIC1", NULL, "DMIC R1" },
2864 { "DMIC2", NULL, "DMIC L2" },
2865 { "DMIC2", NULL, "DMIC R2" },
2867 { "BST1", NULL, "IN1P" },
2868 { "BST1", NULL, "IN1N" },
2869 { "BST1", NULL, "BST1 Power" },
2870 { "BST2", NULL, "IN2P" },
2871 { "BST2", NULL, "IN2N" },
2872 { "BST2", NULL, "BST2 Power" },
2873 { "BST3", NULL, "IN3P" },
2874 { "BST3", NULL, "IN3N" },
2875 { "BST3", NULL, "BST3 Power" },
2876 { "BST4", NULL, "IN4P" },
2877 { "BST4", NULL, "IN4N" },
2878 { "BST4", NULL, "BST4 Power" },
2880 { "INL VOL", NULL, "IN2P" },
2881 { "INR VOL", NULL, "IN2N" },
2883 { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2884 { "RECMIX1L", "INL Switch", "INL VOL" },
2885 { "RECMIX1L", "BST4 Switch", "BST4" },
2886 { "RECMIX1L", "BST3 Switch", "BST3" },
2887 { "RECMIX1L", "BST2 Switch", "BST2" },
2888 { "RECMIX1L", "BST1 Switch", "BST1" },
2890 { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2891 { "RECMIX1R", "INR Switch", "INR VOL" },
2892 { "RECMIX1R", "BST4 Switch", "BST4" },
2893 { "RECMIX1R", "BST3 Switch", "BST3" },
2894 { "RECMIX1R", "BST2 Switch", "BST2" },
2895 { "RECMIX1R", "BST1 Switch", "BST1" },
2897 { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2898 { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2899 { "RECMIX2L", "BST4 Switch", "BST4" },
2900 { "RECMIX2L", "BST3 Switch", "BST3" },
2901 { "RECMIX2L", "BST2 Switch", "BST2" },
2902 { "RECMIX2L", "BST1 Switch", "BST1" },
2904 { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2905 { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2906 { "RECMIX2R", "BST4 Switch", "BST4" },
2907 { "RECMIX2R", "BST3 Switch", "BST3" },
2908 { "RECMIX2R", "BST2 Switch", "BST2" },
2909 { "RECMIX2R", "BST1 Switch", "BST1" },
2911 { "ADC1 L", NULL, "RECMIX1L" },
2912 { "ADC1 L", NULL, "ADC1 L Power" },
2913 { "ADC1 L", NULL, "ADC1 clock" },
2914 { "ADC1 R", NULL, "RECMIX1R" },
2915 { "ADC1 R", NULL, "ADC1 R Power" },
2916 { "ADC1 R", NULL, "ADC1 clock" },
2918 { "ADC2 L", NULL, "RECMIX2L" },
2919 { "ADC2 L", NULL, "ADC2 L Power" },
2920 { "ADC2 L", NULL, "ADC2 clock" },
2921 { "ADC2 R", NULL, "RECMIX2R" },
2922 { "ADC2 R", NULL, "ADC2 R Power" },
2923 { "ADC2 R", NULL, "ADC2 clock" },
2925 { "DMIC L1", NULL, "DMIC CLK" },
2926 { "DMIC L1", NULL, "DMIC1 Power" },
2927 { "DMIC R1", NULL, "DMIC CLK" },
2928 { "DMIC R1", NULL, "DMIC1 Power" },
2929 { "DMIC L2", NULL, "DMIC CLK" },
2930 { "DMIC L2", NULL, "DMIC2 Power" },
2931 { "DMIC R2", NULL, "DMIC CLK" },
2932 { "DMIC R2", NULL, "DMIC2 Power" },
2934 { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2935 { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2937 { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2938 { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2940 { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2941 { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2943 { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2944 { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2946 { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2947 { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2948 { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2949 { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2951 { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2952 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2953 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2954 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2956 { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
2957 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2958 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
2959 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2961 { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2962 { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
2963 { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
2964 { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
2966 { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
2967 { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
2968 { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
2969 { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
2971 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2972 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2973 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2974 { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
2976 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2977 { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
2978 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2979 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2981 { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2982 { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2983 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2985 { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2986 { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2987 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2989 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2990 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2991 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2993 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2994 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2995 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2997 { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
2998 { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
3000 { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
3001 { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
3002 { "IF_ADC2", NULL, "Mono ADC MIXL" },
3003 { "IF_ADC2", NULL, "Mono ADC MIXR" },
3005 { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
3006 { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
3007 { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
3008 { "TDM AD2:DAC", NULL, "IF_ADC2" },
3009 { "TDM AD2:DAC", NULL, "DAC_REF" },
3010 { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
3011 { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
3012 { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
3013 { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
3014 { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
3015 { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
3016 { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
3017 { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
3018 { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
3019 { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
3020 { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
3021 { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
3022 { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
3023 { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
3024 { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
3025 { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
3026 { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
3027 { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
3028 { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
3029 { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
3030 { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
3031 { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
3032 { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
3033 { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
3034 { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
3035 { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
3036 { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
3037 { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3038 { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3039 { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3040 { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3041 { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3042 { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3043 { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3044 { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3045 { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3046 { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3047 { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3048 { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3049 { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3050 { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3051 { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3052 { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3053 { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3054 { "IF1 ADC", NULL, "I2S1" },
3056 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3057 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3058 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3059 { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3060 { "IF2 ADC", NULL, "IF2 ADC Mux"},
3061 { "IF2 ADC", NULL, "I2S2" },
3063 { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3064 { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3065 { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3066 { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3067 { "IF3 ADC", NULL, "IF3 ADC Mux"},
3068 { "IF3 ADC", NULL, "I2S3" },
3070 { "AIF1TX", NULL, "IF1 ADC" },
3071 { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3072 { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3073 { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3074 { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3075 { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3076 { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3077 { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3078 { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3079 { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3080 { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3082 { "IF1 DAC1", NULL, "AIF1RX" },
3083 { "IF1 DAC2", NULL, "AIF1RX" },
3084 { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3085 { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3086 { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3087 { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3088 { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3089 { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3090 { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3091 { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3092 { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3093 { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3095 { "IF1 DAC1", NULL, "I2S1" },
3096 { "IF1 DAC2", NULL, "I2S1" },
3097 { "IF2 DAC", NULL, "I2S2" },
3098 { "IF3 DAC", NULL, "I2S3" },
3100 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3101 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3102 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3103 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3104 { "IF2 DAC L", NULL, "IF2 DAC" },
3105 { "IF2 DAC R", NULL, "IF2 DAC" },
3106 { "IF3 DAC L", NULL, "IF3 DAC" },
3107 { "IF3 DAC R", NULL, "IF3 DAC" },
3109 { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3110 { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3111 { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3112 { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3114 { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3115 { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3116 { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3117 { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3119 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3120 { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3121 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3122 { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3124 { "DAC_REF", NULL, "DAC1 MIXL" },
3125 { "DAC_REF", NULL, "DAC1 MIXR" },
3127 { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3128 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3129 { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3130 { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3131 { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3133 { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3134 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3135 { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3136 { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3137 { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3139 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3140 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3141 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3142 { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3144 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3145 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3146 { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3147 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3149 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3150 { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3151 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3152 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3153 { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3154 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3155 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3156 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3158 { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3159 { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3160 { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3161 { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3163 { "DAC L1 Source", NULL, "DAC L1 Power" },
3164 { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3165 { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3166 { "DAC R1 Source", NULL, "DAC R1 Power" },
3167 { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3168 { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3169 { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3170 { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3171 { "DAC L2 Source", NULL, "DAC L2 Power" },
3172 { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3173 { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3174 { "DAC R2 Source", NULL, "DAC R2 Power" },
3176 { "DAC L1", NULL, "DAC L1 Source" },
3177 { "DAC R1", NULL, "DAC R1 Source" },
3178 { "DAC L2", NULL, "DAC L2 Source" },
3179 { "DAC R2", NULL, "DAC R2 Source" },
3181 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3182 { "SPK MIXL", "BST1 Switch", "BST1" },
3183 { "SPK MIXL", "INL Switch", "INL VOL" },
3184 { "SPK MIXL", "INR Switch", "INR VOL" },
3185 { "SPK MIXL", "BST3 Switch", "BST3" },
3186 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3187 { "SPK MIXR", "BST4 Switch", "BST4" },
3188 { "SPK MIXR", "INL Switch", "INL VOL" },
3189 { "SPK MIXR", "INR Switch", "INR VOL" },
3190 { "SPK MIXR", "BST3 Switch", "BST3" },
3192 { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3193 { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3194 { "MONOVOL MIX", "BST1 Switch", "BST1" },
3195 { "MONOVOL MIX", "BST2 Switch", "BST2" },
3196 { "MONOVOL MIX", "BST3 Switch", "BST3" },
3198 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3199 { "OUT MIXL", "INL Switch", "INL VOL" },
3200 { "OUT MIXL", "BST1 Switch", "BST1" },
3201 { "OUT MIXL", "BST2 Switch", "BST2" },
3202 { "OUT MIXL", "BST3 Switch", "BST3" },
3203 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3204 { "OUT MIXR", "INR Switch", "INR VOL" },
3205 { "OUT MIXR", "BST2 Switch", "BST2" },
3206 { "OUT MIXR", "BST3 Switch", "BST3" },
3207 { "OUT MIXR", "BST4 Switch", "BST4" },
3209 { "SPKVOL L", "Switch", "SPK MIXL" },
3210 { "SPKVOL R", "Switch", "SPK MIXR" },
3211 { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3212 { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3213 { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3214 { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3215 { "SPK Amp", NULL, "SPO L MIX" },
3216 { "SPK Amp", NULL, "SPO R MIX" },
3217 { "SPK Amp", NULL, "SYS CLK DET" },
3218 { "SPO Playback", "Switch", "SPK Amp" },
3219 { "SPOL", NULL, "SPO Playback" },
3220 { "SPOR", NULL, "SPO Playback" },
3222 { "MONOVOL", "Switch", "MONOVOL MIX" },
3223 { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3224 { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3225 { "Mono Amp", NULL, "Mono MIX" },
3226 { "Mono Amp", NULL, "Mono Vref" },
3227 { "Mono Amp", NULL, "SYS CLK DET" },
3228 { "Mono Playback", "Switch", "Mono Amp" },
3229 { "MONOOUT", NULL, "Mono Playback" },
3231 { "HP Amp", NULL, "DAC L1" },
3232 { "HP Amp", NULL, "DAC R1" },
3233 { "HP Amp", NULL, "Charge Pump" },
3234 { "HP Amp", NULL, "SYS CLK DET" },
3235 { "HPO L Playback", "Switch", "HP Amp"},
3236 { "HPO R Playback", "Switch", "HP Amp"},
3237 { "HPOL", NULL, "HPO L Playback" },
3238 { "HPOR", NULL, "HPO R Playback" },
3240 { "OUTVOL L", "Switch", "OUT MIXL" },
3241 { "OUTVOL R", "Switch", "OUT MIXR" },
3242 { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3243 { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3244 { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3245 { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3246 { "LOUT Amp", NULL, "LOUT L MIX" },
3247 { "LOUT Amp", NULL, "LOUT R MIX" },
3248 { "LOUT Amp", NULL, "Charge Pump" },
3249 { "LOUT Amp", NULL, "SYS CLK DET" },
3250 { "LOUT L Playback", "Switch", "LOUT Amp" },
3251 { "LOUT R Playback", "Switch", "LOUT Amp" },
3252 { "LOUTL", NULL, "LOUT L Playback" },
3253 { "LOUTR", NULL, "LOUT R Playback" },
3255 { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3256 { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3257 { "PDM L Mux", NULL, "PDM Power" },
3258 { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3259 { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3260 { "PDM R Mux", NULL, "PDM Power" },
3261 { "PDM L Playback", "Switch", "PDM L Mux" },
3262 { "PDM R Playback", "Switch", "PDM R Mux" },
3263 { "PDML", NULL, "PDM L Playback" },
3264 { "PDMR", NULL, "PDM R Playback" },
3266 { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3267 { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3268 { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3269 { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3270 { "SPDIF", NULL, "SPDIF Mux" },
3273 static int rt5659_hw_params(struct snd_pcm_substream *substream,
3274 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3276 struct snd_soc_component *component = dai->component;
3277 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3278 unsigned int val_len = 0, val_clk, mask_clk;
3279 int pre_div, frame_size;
3281 rt5659->lrck[dai->id] = params_rate(params);
3282 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3284 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3285 rt5659->lrck[dai->id], dai->id);
3288 frame_size = snd_soc_params_to_frame_size(params);
3289 if (frame_size < 0) {
3290 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3294 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3295 rt5659->lrck[dai->id], pre_div, dai->id);
3297 switch (params_width(params)) {
3301 val_len |= RT5659_I2S_DL_20;
3304 val_len |= RT5659_I2S_DL_24;
3307 val_len |= RT5659_I2S_DL_8;
3315 mask_clk = RT5659_I2S_PD1_MASK;
3316 val_clk = pre_div << RT5659_I2S_PD1_SFT;
3317 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3318 RT5659_I2S_DL_MASK, val_len);
3321 mask_clk = RT5659_I2S_PD2_MASK;
3322 val_clk = pre_div << RT5659_I2S_PD2_SFT;
3323 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3324 RT5659_I2S_DL_MASK, val_len);
3327 mask_clk = RT5659_I2S_PD3_MASK;
3328 val_clk = pre_div << RT5659_I2S_PD3_SFT;
3329 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3330 RT5659_I2S_DL_MASK, val_len);
3333 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3337 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3339 switch (rt5659->lrck[dai->id]) {
3341 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3342 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3345 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3346 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3349 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3350 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3357 static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3359 struct snd_soc_component *component = dai->component;
3360 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3361 unsigned int reg_val = 0;
3363 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3364 case SND_SOC_DAIFMT_CBM_CFM:
3365 rt5659->master[dai->id] = 1;
3367 case SND_SOC_DAIFMT_CBS_CFS:
3368 reg_val |= RT5659_I2S_MS_S;
3369 rt5659->master[dai->id] = 0;
3375 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3376 case SND_SOC_DAIFMT_NB_NF:
3378 case SND_SOC_DAIFMT_IB_NF:
3379 reg_val |= RT5659_I2S_BP_INV;
3385 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3386 case SND_SOC_DAIFMT_I2S:
3388 case SND_SOC_DAIFMT_LEFT_J:
3389 reg_val |= RT5659_I2S_DF_LEFT;
3391 case SND_SOC_DAIFMT_DSP_A:
3392 reg_val |= RT5659_I2S_DF_PCM_A;
3394 case SND_SOC_DAIFMT_DSP_B:
3395 reg_val |= RT5659_I2S_DF_PCM_B;
3403 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3404 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3405 RT5659_I2S_DF_MASK, reg_val);
3408 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3409 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3410 RT5659_I2S_DF_MASK, reg_val);
3413 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3414 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3415 RT5659_I2S_DF_MASK, reg_val);
3418 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3424 static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
3425 int source, unsigned int freq, int dir)
3427 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3428 unsigned int reg_val = 0;
3431 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3435 case RT5659_SCLK_S_MCLK:
3436 ret = clk_set_rate(rt5659->mclk, freq);
3440 reg_val |= RT5659_SCLK_SRC_MCLK;
3442 case RT5659_SCLK_S_PLL1:
3443 reg_val |= RT5659_SCLK_SRC_PLL1;
3445 case RT5659_SCLK_S_RCCLK:
3446 reg_val |= RT5659_SCLK_SRC_RCCLK;
3449 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3452 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3453 RT5659_SCLK_SRC_MASK, reg_val);
3454 rt5659->sysclk = freq;
3455 rt5659->sysclk_src = clk_id;
3457 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3463 static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
3464 int source, unsigned int freq_in,
3465 unsigned int freq_out)
3467 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3468 struct rl6231_pll_code pll_code;
3471 if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3472 freq_out == rt5659->pll_out)
3475 if (!freq_in || !freq_out) {
3476 dev_dbg(component->dev, "PLL disabled\n");
3479 rt5659->pll_out = 0;
3480 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3481 RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3486 case RT5659_PLL1_S_MCLK:
3487 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3488 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3490 case RT5659_PLL1_S_BCLK1:
3491 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3492 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3494 case RT5659_PLL1_S_BCLK2:
3495 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3496 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3498 case RT5659_PLL1_S_BCLK3:
3499 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3500 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3503 dev_err(component->dev, "Unknown PLL source %d\n", source);
3507 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3509 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
3513 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3514 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3515 pll_code.n_code, pll_code.k_code);
3517 snd_soc_component_write(component, RT5659_PLL_CTRL_1,
3518 pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3519 snd_soc_component_write(component, RT5659_PLL_CTRL_2,
3520 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT) |
3521 (pll_code.m_bp << RT5659_PLL_M_BP_SFT));
3523 rt5659->pll_in = freq_in;
3524 rt5659->pll_out = freq_out;
3525 rt5659->pll_src = source;
3530 static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3531 unsigned int rx_mask, int slots, int slot_width)
3533 struct snd_soc_component *component = dai->component;
3534 unsigned int val = 0;
3536 if (rx_mask || tx_mask)
3558 switch (slot_width) {
3577 snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
3582 static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3584 struct snd_soc_component *component = dai->component;
3585 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3587 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3589 rt5659->bclk[dai->id] = ratio;
3594 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3595 RT5659_I2S_BCLK_MS2_MASK,
3596 RT5659_I2S_BCLK_MS2_64);
3599 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3600 RT5659_I2S_BCLK_MS3_MASK,
3601 RT5659_I2S_BCLK_MS3_64);
3609 static int rt5659_set_bias_level(struct snd_soc_component *component,
3610 enum snd_soc_bias_level level)
3612 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3613 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3617 case SND_SOC_BIAS_PREPARE:
3618 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3619 RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3620 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3621 RT5659_PWR_LDO, RT5659_PWR_LDO);
3622 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3623 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3624 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3626 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3627 RT5659_PWR_FV1 | RT5659_PWR_FV2,
3628 RT5659_PWR_FV1 | RT5659_PWR_FV2);
3631 case SND_SOC_BIAS_STANDBY:
3632 if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3633 ret = clk_prepare_enable(rt5659->mclk);
3635 dev_err(component->dev,
3636 "failed to enable MCLK: %d\n", ret);
3642 case SND_SOC_BIAS_OFF:
3643 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3645 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3646 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3647 | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3648 RT5659_PWR_MB | RT5659_PWR_VREF2);
3649 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3650 RT5659_DIG_GATE_CTRL, 0);
3651 clk_disable_unprepare(rt5659->mclk);
3661 static int rt5659_probe(struct snd_soc_component *component)
3663 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3665 rt5659->component = component;
3670 static void rt5659_remove(struct snd_soc_component *component)
3672 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3674 regmap_write(rt5659->regmap, RT5659_RESET, 0);
3678 static int rt5659_suspend(struct snd_soc_component *component)
3680 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3682 regcache_cache_only(rt5659->regmap, true);
3683 regcache_mark_dirty(rt5659->regmap);
3687 static int rt5659_resume(struct snd_soc_component *component)
3689 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3691 regcache_cache_only(rt5659->regmap, false);
3692 regcache_sync(rt5659->regmap);
3697 #define rt5659_suspend NULL
3698 #define rt5659_resume NULL
3701 #define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3702 #define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3703 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3705 static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3706 .hw_params = rt5659_hw_params,
3707 .set_fmt = rt5659_set_dai_fmt,
3708 .set_tdm_slot = rt5659_set_tdm_slot,
3709 .set_bclk_ratio = rt5659_set_bclk_ratio,
3712 static struct snd_soc_dai_driver rt5659_dai[] = {
3714 .name = "rt5659-aif1",
3717 .stream_name = "AIF1 Playback",
3720 .rates = RT5659_STEREO_RATES,
3721 .formats = RT5659_FORMATS,
3724 .stream_name = "AIF1 Capture",
3727 .rates = RT5659_STEREO_RATES,
3728 .formats = RT5659_FORMATS,
3730 .ops = &rt5659_aif_dai_ops,
3733 .name = "rt5659-aif2",
3736 .stream_name = "AIF2 Playback",
3739 .rates = RT5659_STEREO_RATES,
3740 .formats = RT5659_FORMATS,
3743 .stream_name = "AIF2 Capture",
3746 .rates = RT5659_STEREO_RATES,
3747 .formats = RT5659_FORMATS,
3749 .ops = &rt5659_aif_dai_ops,
3752 .name = "rt5659-aif3",
3755 .stream_name = "AIF3 Playback",
3758 .rates = RT5659_STEREO_RATES,
3759 .formats = RT5659_FORMATS,
3762 .stream_name = "AIF3 Capture",
3765 .rates = RT5659_STEREO_RATES,
3766 .formats = RT5659_FORMATS,
3768 .ops = &rt5659_aif_dai_ops,
3772 static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
3773 .probe = rt5659_probe,
3774 .remove = rt5659_remove,
3775 .suspend = rt5659_suspend,
3776 .resume = rt5659_resume,
3777 .set_bias_level = rt5659_set_bias_level,
3778 .controls = rt5659_snd_controls,
3779 .num_controls = ARRAY_SIZE(rt5659_snd_controls),
3780 .dapm_widgets = rt5659_dapm_widgets,
3781 .num_dapm_widgets = ARRAY_SIZE(rt5659_dapm_widgets),
3782 .dapm_routes = rt5659_dapm_routes,
3783 .num_dapm_routes = ARRAY_SIZE(rt5659_dapm_routes),
3784 .set_sysclk = rt5659_set_component_sysclk,
3785 .set_pll = rt5659_set_component_pll,
3786 .use_pmdown_time = 1,
3788 .non_legacy_dai_naming = 1,
3792 static const struct regmap_config rt5659_regmap = {
3795 .max_register = 0x0400,
3796 .volatile_reg = rt5659_volatile_register,
3797 .readable_reg = rt5659_readable_register,
3798 .cache_type = REGCACHE_RBTREE,
3799 .reg_defaults = rt5659_reg,
3800 .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3803 static const struct i2c_device_id rt5659_i2c_id[] = {
3808 MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3810 static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3812 rt5659->pdata.in1_diff = device_property_read_bool(dev,
3813 "realtek,in1-differential");
3814 rt5659->pdata.in3_diff = device_property_read_bool(dev,
3815 "realtek,in3-differential");
3816 rt5659->pdata.in4_diff = device_property_read_bool(dev,
3817 "realtek,in4-differential");
3820 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3821 &rt5659->pdata.dmic1_data_pin);
3822 device_property_read_u32(dev, "realtek,dmic2-data-pin",
3823 &rt5659->pdata.dmic2_data_pin);
3824 device_property_read_u32(dev, "realtek,jd-src",
3825 &rt5659->pdata.jd_src);
3830 static void rt5659_calibrate(struct rt5659_priv *rt5659)
3834 /* Calibrate HPO Start */
3835 /* Fine tune HP Performance */
3836 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3837 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3839 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3840 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3841 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3842 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3843 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3845 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3847 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3849 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3850 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3852 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3853 usleep_range(10000, 10005);
3854 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3856 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3858 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3861 /* Enalbe K ADC Power And Clock */
3862 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3864 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3865 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3866 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3869 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3870 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3871 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3872 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3875 /* Manual K ADC Offset */
3876 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3877 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3878 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3879 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3884 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3886 usleep_range(10000, 10005);
3891 dev_err(rt5659->component->dev,
3892 "HP Calibration 1 Failure\n");
3899 /* Manual K Internal Path Offset */
3900 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3901 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3902 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3903 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3904 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3909 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3911 usleep_range(10000, 10005);
3916 dev_err(rt5659->component->dev,
3917 "HP Calibration 2 Failure\n");
3924 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3925 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3926 /* Calibrate HPO End */
3928 /* Calibrate SPO Start */
3929 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3930 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3931 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3932 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3933 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3934 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3935 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3936 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3937 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3938 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3939 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3940 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3942 /* Enalbe K ADC Power And Clock */
3943 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3944 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3947 /* Start Calibration */
3948 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3949 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3950 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3951 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3956 regmap_read(rt5659->regmap,
3957 RT5659_SPK_DC_CAILB_CTRL_1, &value);
3959 usleep_range(10000, 10005);
3964 dev_err(rt5659->component->dev,
3965 "SPK Calibration Failure\n");
3971 /* Calibrate SPO End */
3973 /* Calibrate MONO Start */
3974 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
3975 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
3976 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
3977 /* MONO NG2 GAIN 5dB */
3978 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
3979 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
3981 /* Start Calibration */
3982 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
3983 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
3984 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
3989 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
3992 usleep_range(10000, 10005);
3997 dev_err(rt5659->component->dev,
3998 "Mono Calibration Failure\n");
4005 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4006 /* Calibrate MONO End */
4009 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4010 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4011 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4012 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4013 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4014 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4015 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4016 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4017 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4018 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4019 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4020 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4021 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4022 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4023 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4024 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4025 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4026 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4027 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4028 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4029 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4032 static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
4036 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4037 if (!(value & 0x8)) {
4038 rt5659->hda_hp_plugged = true;
4039 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4042 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4046 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4047 RT5659_PWR_VREF2 | RT5659_PWR_MB,
4048 RT5659_PWR_VREF2 | RT5659_PWR_MB);
4050 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4051 RT5659_PWR_FV2, RT5659_PWR_FV2);
4053 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4055 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4057 regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4058 RT5659_PWR_MIC_DET);
4061 regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4062 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
4063 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4064 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4065 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4067 if (value & 0x2000) {
4068 rt5659->hda_mic_plugged = true;
4069 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4072 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4076 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4077 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
4080 static int rt5659_i2c_probe(struct i2c_client *i2c,
4081 const struct i2c_device_id *id)
4083 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4084 struct rt5659_priv *rt5659;
4088 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4094 i2c_set_clientdata(i2c, rt5659);
4097 rt5659->pdata = *pdata;
4099 rt5659_parse_dt(rt5659, &i2c->dev);
4101 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4103 if (IS_ERR(rt5659->gpiod_ldo1_en))
4104 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4106 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4109 /* Sleep for 300 ms miniumum */
4112 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4113 if (IS_ERR(rt5659->regmap)) {
4114 ret = PTR_ERR(rt5659->regmap);
4115 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4120 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4121 if (val != DEVICE_ID) {
4123 "Device with ID register %x is not rt5659\n", val);
4127 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4129 /* Check if MCLK provided */
4130 rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
4131 if (IS_ERR(rt5659->mclk)) {
4132 if (PTR_ERR(rt5659->mclk) != -ENOENT)
4133 return PTR_ERR(rt5659->mclk);
4134 /* Otherwise mark the mclk pointer to NULL */
4135 rt5659->mclk = NULL;
4138 rt5659_calibrate(rt5659);
4140 /* line in diff mode*/
4141 if (rt5659->pdata.in1_diff)
4142 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4143 RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4144 if (rt5659->pdata.in3_diff)
4145 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4146 RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4147 if (rt5659->pdata.in4_diff)
4148 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4149 RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4152 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4153 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4154 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4155 RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4157 switch (rt5659->pdata.dmic1_data_pin) {
4158 case RT5659_DMIC1_DATA_IN2N:
4159 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4160 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4163 case RT5659_DMIC1_DATA_GPIO5:
4164 regmap_update_bits(rt5659->regmap,
4166 RT5659_I2S2_PIN_MASK,
4167 RT5659_I2S2_PIN_GPIO);
4168 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4169 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4170 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4171 RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4174 case RT5659_DMIC1_DATA_GPIO9:
4175 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4176 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4177 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4178 RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4181 case RT5659_DMIC1_DATA_GPIO11:
4182 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4183 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4184 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4185 RT5659_GP11_PIN_MASK,
4186 RT5659_GP11_PIN_DMIC1_SDA);
4190 dev_dbg(&i2c->dev, "no DMIC1\n");
4194 switch (rt5659->pdata.dmic2_data_pin) {
4195 case RT5659_DMIC2_DATA_IN2P:
4196 regmap_update_bits(rt5659->regmap,
4198 RT5659_DMIC_2_DP_MASK,
4199 RT5659_DMIC_2_DP_IN2P);
4202 case RT5659_DMIC2_DATA_GPIO6:
4203 regmap_update_bits(rt5659->regmap,
4205 RT5659_DMIC_2_DP_MASK,
4206 RT5659_DMIC_2_DP_GPIO6);
4207 regmap_update_bits(rt5659->regmap,
4209 RT5659_GP6_PIN_MASK,
4210 RT5659_GP6_PIN_DMIC2_SDA);
4213 case RT5659_DMIC2_DATA_GPIO10:
4214 regmap_update_bits(rt5659->regmap,
4216 RT5659_DMIC_2_DP_MASK,
4217 RT5659_DMIC_2_DP_GPIO10);
4218 regmap_update_bits(rt5659->regmap,
4220 RT5659_GP10_PIN_MASK,
4221 RT5659_GP10_PIN_DMIC2_SDA);
4224 case RT5659_DMIC2_DATA_GPIO12:
4225 regmap_update_bits(rt5659->regmap,
4227 RT5659_DMIC_2_DP_MASK,
4228 RT5659_DMIC_2_DP_GPIO12);
4229 regmap_update_bits(rt5659->regmap,
4231 RT5659_GP12_PIN_MASK,
4232 RT5659_GP12_PIN_DMIC2_SDA);
4236 dev_dbg(&i2c->dev, "no DMIC2\n");
4241 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4242 RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4243 RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4244 RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4245 RT5659_GP12_PIN_MASK,
4246 RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4247 RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4248 RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4249 RT5659_GP12_PIN_GPIO12);
4250 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4251 RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4252 RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4255 switch (rt5659->pdata.jd_src) {
4257 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4258 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4259 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4260 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4261 RT5659_PWR_MB, RT5659_PWR_MB);
4262 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4263 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4264 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4265 rt5659_jack_detect_work);
4267 case RT5659_JD_HDA_HEADER:
4268 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4269 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4270 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0);
4271 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000);
4272 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040);
4273 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4274 rt5659_jack_detect_intel_hd_header);
4275 rt5659_intel_hd_header_probe_setup(rt5659);
4282 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4283 rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4284 | IRQF_ONESHOT, "rt5659", rt5659);
4286 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4288 /* Enable IRQ output for GPIO1 pin any way */
4289 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4290 RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
4293 return devm_snd_soc_register_component(&i2c->dev,
4294 &soc_component_dev_rt5659,
4295 rt5659_dai, ARRAY_SIZE(rt5659_dai));
4298 static void rt5659_i2c_shutdown(struct i2c_client *client)
4300 struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4302 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4306 static const struct of_device_id rt5659_of_match[] = {
4307 { .compatible = "realtek,rt5658", },
4308 { .compatible = "realtek,rt5659", },
4311 MODULE_DEVICE_TABLE(of, rt5659_of_match);
4315 static const struct acpi_device_id rt5659_acpi_match[] = {
4320 MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4323 static struct i2c_driver rt5659_i2c_driver = {
4326 .of_match_table = of_match_ptr(rt5659_of_match),
4327 .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4329 .probe = rt5659_i2c_probe,
4330 .shutdown = rt5659_i2c_shutdown,
4331 .id_table = rt5659_i2c_id,
4333 module_i2c_driver(rt5659_i2c_driver);
4335 MODULE_DESCRIPTION("ASoC RT5659 driver");
4336 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4337 MODULE_LICENSE("GPL v2");
projects / linux-2.6-microblaze.git / blob