kernel/dma/direct.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018-2020 Christoph Hellwig.
   4  *
   5  * DMA operations that map physical memory directly without using an IOMMU.
   6  */
   7 #include <linux/memblock.h> /* for max_pfn */
   8 #include <linux/export.h>
   9 #include <linux/mm.h>
  10 #include <linux/dma-map-ops.h>
  11 #include <linux/scatterlist.h>
  12 #include <linux/pfn.h>
  13 #include <linux/vmalloc.h>
  14 #include <linux/set_memory.h>
  15 #include <linux/slab.h>
  16 #include "direct.h"
  17
  18 /*
  19  * Most architectures use ZONE_DMA for the first 16 Megabytes, but some use
  20  * it for entirely different regions. In that case the arch code needs to
  21  * override the variable below for dma-direct to work properly.
  22  */
  23 unsigned int zone_dma_bits __ro_after_init = 24;
  24
  25 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
  26                 phys_addr_t phys)
  27 {
  28         if (force_dma_unencrypted(dev))
  29                 return phys_to_dma_unencrypted(dev, phys);
  30         return phys_to_dma(dev, phys);
  31 }
  32
  33 static inline struct page *dma_direct_to_page(struct device *dev,
  34                 dma_addr_t dma_addr)
  35 {
  36         return pfn_to_page(PHYS_PFN(dma_to_phys(dev, dma_addr)));
  37 }
  38
  39 u64 dma_direct_get_required_mask(struct device *dev)
  40 {
  41         phys_addr_t phys = (phys_addr_t)(max_pfn - 1) << PAGE_SHIFT;
  42         u64 max_dma = phys_to_dma_direct(dev, phys);
  43
  44         return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
  45 }
  46
  47 static gfp_t dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
  48                                   u64 *phys_limit)
  49 {
  50         u64 dma_limit = min_not_zero(dma_mask, dev->bus_dma_limit);
  51
  52         /*
  53          * Optimistically try the zone that the physical address mask falls
  54          * into first.  If that returns memory that isn't actually addressable
  55          * we will fallback to the next lower zone and try again.
  56          *
  57          * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
  58          * zones.
  59          */
  60         *phys_limit = dma_to_phys(dev, dma_limit);
  61         if (*phys_limit <= DMA_BIT_MASK(zone_dma_bits))
  62                 return GFP_DMA;
  63         if (*phys_limit <= DMA_BIT_MASK(32))
  64                 return GFP_DMA32;
  65         return 0;
  66 }
  67
  68 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
  69 {
  70         dma_addr_t dma_addr = phys_to_dma_direct(dev, phys);
  71
  72         if (dma_addr == DMA_MAPPING_ERROR)
  73                 return false;
  74         return dma_addr + size - 1 <=
  75                 min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
  76 }
  77
  78 static struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
  79                 gfp_t gfp)
  80 {
  81         int node = dev_to_node(dev);
  82         struct page *page = NULL;
  83         u64 phys_limit;
  84
  85         WARN_ON_ONCE(!PAGE_ALIGNED(size));
  86
  87         gfp |= dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
  88                                            &phys_limit);
  89         page = dma_alloc_contiguous(dev, size, gfp);
  90         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
  91                 dma_free_contiguous(dev, page, size);
  92                 page = NULL;
  93         }
  94 again:
  95         if (!page)
  96                 page = alloc_pages_node(node, gfp, get_order(size));
  97         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
  98                 dma_free_contiguous(dev, page, size);
  99                 page = NULL;
 100
 101                 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
 102                     phys_limit < DMA_BIT_MASK(64) &&
 103                     !(gfp & (GFP_DMA32 | GFP_DMA))) {
 104                         gfp |= GFP_DMA32;
 105                         goto again;
 106                 }
 107
 108                 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
 109                         gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
 110                         goto again;
 111                 }
 112         }
 113
 114         return page;
 115 }
 116
 117 static void *dma_direct_alloc_from_pool(struct device *dev, size_t size,
 118                 dma_addr_t *dma_handle, gfp_t gfp)
 119 {
 120         struct page *page;
 121         u64 phys_mask;
 122         void *ret;
 123
 124         gfp |= dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
 125                                            &phys_mask);
 126         page = dma_alloc_from_pool(dev, size, &ret, gfp, dma_coherent_ok);
 127         if (!page)
 128                 return NULL;
 129         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 130         return ret;
 131 }
 132
 133 void *dma_direct_alloc(struct device *dev, size_t size,
 134                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 135 {
 136         struct page *page;
 137         void *ret;
 138         int err;
 139
 140         size = PAGE_ALIGN(size);
 141         if (attrs & DMA_ATTR_NO_WARN)
 142                 gfp |= __GFP_NOWARN;
 143
 144         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 145             !force_dma_unencrypted(dev)) {
 146                 page = __dma_direct_alloc_pages(dev, size, gfp & ~__GFP_ZERO);
 147                 if (!page)
 148                         return NULL;
 149                 /* remove any dirty cache lines on the kernel alias */
 150                 if (!PageHighMem(page))
 151                         arch_dma_prep_coherent(page, size);
 152                 *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 153                 /* return the page pointer as the opaque cookie */
 154                 return page;
 155         }
 156
 157         if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 158             !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 159             !IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 160             !dev_is_dma_coherent(dev))
 161                 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
 162
 163         if (IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 164             !dev_is_dma_coherent(dev))
 165                 return dma_alloc_from_global_coherent(dev, size, dma_handle);
 166
 167         /*
 168          * Remapping or decrypting memory may block. If either is required and
 169          * we can't block, allocate the memory from the atomic pools.
 170          */
 171         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 172             !gfpflags_allow_blocking(gfp) &&
 173             (force_dma_unencrypted(dev) ||
 174              (IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) && !dev_is_dma_coherent(dev))))
 175                 return dma_direct_alloc_from_pool(dev, size, dma_handle, gfp);
 176
 177         /* we always manually zero the memory once we are done */
 178         page = __dma_direct_alloc_pages(dev, size, gfp & ~__GFP_ZERO);
 179         if (!page)
 180                 return NULL;
 181
 182         if ((IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 183              !dev_is_dma_coherent(dev)) ||
 184             (IS_ENABLED(CONFIG_DMA_REMAP) && PageHighMem(page))) {
 185                 /* remove any dirty cache lines on the kernel alias */
 186                 arch_dma_prep_coherent(page, size);
 187
 188                 /* create a coherent mapping */
 189                 ret = dma_common_contiguous_remap(page, size,
 190                                 dma_pgprot(dev, PAGE_KERNEL, attrs),
 191                                 __builtin_return_address(0));
 192                 if (!ret)
 193                         goto out_free_pages;
 194                 if (force_dma_unencrypted(dev)) {
 195                         err = set_memory_decrypted((unsigned long)ret,
 196                                                    1 << get_order(size));
 197                         if (err)
 198                                 goto out_free_pages;
 199                 }
 200                 memset(ret, 0, size);
 201                 goto done;
 202         }
 203
 204         if (PageHighMem(page)) {
 205                 /*
 206                  * Depending on the cma= arguments and per-arch setup
 207                  * dma_alloc_contiguous could return highmem pages.
 208                  * Without remapping there is no way to return them here,
 209                  * so log an error and fail.
 210                  */
 211                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 212                 goto out_free_pages;
 213         }
 214
 215         ret = page_address(page);
 216         if (force_dma_unencrypted(dev)) {
 217                 err = set_memory_decrypted((unsigned long)ret,
 218                                            1 << get_order(size));
 219                 if (err)
 220                         goto out_free_pages;
 221         }
 222
 223         memset(ret, 0, size);
 224
 225         if (IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 226             !dev_is_dma_coherent(dev)) {
 227                 arch_dma_prep_coherent(page, size);
 228                 ret = arch_dma_set_uncached(ret, size);
 229                 if (IS_ERR(ret))
 230                         goto out_encrypt_pages;
 231         }
 232 done:
 233         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 234         return ret;
 235
 236 out_encrypt_pages:
 237         if (force_dma_unencrypted(dev)) {
 238                 err = set_memory_encrypted((unsigned long)page_address(page),
 239                                            1 << get_order(size));
 240                 /* If memory cannot be re-encrypted, it must be leaked */
 241                 if (err)
 242                         return NULL;
 243         }
 244 out_free_pages:
 245         dma_free_contiguous(dev, page, size);
 246         return NULL;
 247 }
 248
 249 void dma_direct_free(struct device *dev, size_t size,
 250                 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
 251 {
 252         unsigned int page_order = get_order(size);
 253
 254         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 255             !force_dma_unencrypted(dev)) {
 256                 /* cpu_addr is a struct page cookie, not a kernel address */
 257                 dma_free_contiguous(dev, cpu_addr, size);
 258                 return;
 259         }
 260
 261         if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 262             !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 263             !IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 264             !dev_is_dma_coherent(dev)) {
 265                 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
 266                 return;
 267         }
 268
 269         if (IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 270             !dev_is_dma_coherent(dev)) {
 271                 if (!dma_release_from_global_coherent(page_order, cpu_addr))
 272                         WARN_ON_ONCE(1);
 273                 return;
 274         }
 275
 276         /* If cpu_addr is not from an atomic pool, dma_free_from_pool() fails */
 277         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 278             dma_free_from_pool(dev, cpu_addr, PAGE_ALIGN(size)))
 279                 return;
 280
 281         if (force_dma_unencrypted(dev))
 282                 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
 283
 284         if (IS_ENABLED(CONFIG_DMA_REMAP) && is_vmalloc_addr(cpu_addr))
 285                 vunmap(cpu_addr);
 286         else if (IS_ENABLED(CONFIG_ARCH_HAS_DMA_CLEAR_UNCACHED))
 287                 arch_dma_clear_uncached(cpu_addr, size);
 288
 289         dma_free_contiguous(dev, dma_direct_to_page(dev, dma_addr), size);
 290 }
 291
 292 struct page *dma_direct_alloc_pages(struct device *dev, size_t size,
 293                 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
 294 {
 295         struct page *page;
 296         void *ret;
 297
 298         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 299             force_dma_unencrypted(dev) && !gfpflags_allow_blocking(gfp))
 300                 return dma_direct_alloc_from_pool(dev, size, dma_handle, gfp);
 301
 302         page = __dma_direct_alloc_pages(dev, size, gfp);
 303         if (!page)
 304                 return NULL;
 305         if (PageHighMem(page)) {
 306                 /*
 307                  * Depending on the cma= arguments and per-arch setup
 308                  * dma_alloc_contiguous could return highmem pages.
 309                  * Without remapping there is no way to return them here,
 310                  * so log an error and fail.
 311                  */
 312                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 313                 goto out_free_pages;
 314         }
 315
 316         ret = page_address(page);
 317         if (force_dma_unencrypted(dev)) {
 318                 if (set_memory_decrypted((unsigned long)ret,
 319                                 1 << get_order(size)))
 320                         goto out_free_pages;
 321         }
 322         memset(ret, 0, size);
 323         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 324         return page;
 325 out_free_pages:
 326         dma_free_contiguous(dev, page, size);
 327         return NULL;
 328 }
 329
 330 void dma_direct_free_pages(struct device *dev, size_t size,
 331                 struct page *page, dma_addr_t dma_addr,
 332                 enum dma_data_direction dir)
 333 {
 334         unsigned int page_order = get_order(size);
 335         void *vaddr = page_address(page);
 336
 337         /* If cpu_addr is not from an atomic pool, dma_free_from_pool() fails */
 338         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 339             dma_free_from_pool(dev, vaddr, size))
 340                 return;
 341
 342         if (force_dma_unencrypted(dev))
 343                 set_memory_encrypted((unsigned long)vaddr, 1 << page_order);
 344
 345         dma_free_contiguous(dev, page, size);
 346 }
 347
 348 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
 349     defined(CONFIG_SWIOTLB)
 350 void dma_direct_sync_sg_for_device(struct device *dev,
 351                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 352 {
 353         struct scatterlist *sg;
 354         int i;
 355
 356         for_each_sg(sgl, sg, nents, i) {
 357                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 358
 359                 if (unlikely(is_swiotlb_buffer(paddr)))
 360                         swiotlb_sync_single_for_device(dev, paddr, sg->length,
 361                                                        dir);
 362
 363                 if (!dev_is_dma_coherent(dev))
 364                         arch_sync_dma_for_device(paddr, sg->length,
 365                                         dir);
 366         }
 367 }
 368 #endif
 369
 370 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
 371     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
 372     defined(CONFIG_SWIOTLB)
 373 void dma_direct_sync_sg_for_cpu(struct device *dev,
 374                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 375 {
 376         struct scatterlist *sg;
 377         int i;
 378
 379         for_each_sg(sgl, sg, nents, i) {
 380                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 381
 382                 if (!dev_is_dma_coherent(dev))
 383                         arch_sync_dma_for_cpu(paddr, sg->length, dir);
 384
 385                 if (unlikely(is_swiotlb_buffer(paddr)))
 386                         swiotlb_sync_single_for_cpu(dev, paddr, sg->length,
 387                                                     dir);
 388
 389                 if (dir == DMA_FROM_DEVICE)
 390                         arch_dma_mark_clean(paddr, sg->length);
 391         }
 392
 393         if (!dev_is_dma_coherent(dev))
 394                 arch_sync_dma_for_cpu_all();
 395 }
 396
 397 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
 398                 int nents, enum dma_data_direction dir, unsigned long attrs)
 399 {
 400         struct scatterlist *sg;
 401         int i;
 402
 403         for_each_sg(sgl, sg, nents, i)
 404                 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
 405                              attrs);
 406 }
 407 #endif
 408
 409 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
 410                 enum dma_data_direction dir, unsigned long attrs)
 411 {
 412         int i;
 413         struct scatterlist *sg;
 414
 415         for_each_sg(sgl, sg, nents, i) {
 416                 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
 417                                 sg->offset, sg->length, dir, attrs);
 418                 if (sg->dma_address == DMA_MAPPING_ERROR)
 419                         goto out_unmap;
 420                 sg_dma_len(sg) = sg->length;
 421         }
 422
 423         return nents;
 424
 425 out_unmap:
 426         dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
 427         return -EIO;
 428 }
 429
 430 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
 431                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 432 {
 433         dma_addr_t dma_addr = paddr;
 434
 435         if (unlikely(!dma_capable(dev, dma_addr, size, false))) {
 436                 dev_err_once(dev,
 437                              "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
 438                              &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
 439                 WARN_ON_ONCE(1);
 440                 return DMA_MAPPING_ERROR;
 441         }
 442
 443         return dma_addr;
 444 }
 445
 446 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
 447                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 448                 unsigned long attrs)
 449 {
 450         struct page *page = dma_direct_to_page(dev, dma_addr);
 451         int ret;
 452
 453         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 454         if (!ret)
 455                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 456         return ret;
 457 }
 458
 459 bool dma_direct_can_mmap(struct device *dev)
 460 {
 461         return dev_is_dma_coherent(dev) ||
 462                 IS_ENABLED(CONFIG_DMA_NONCOHERENT_MMAP);
 463 }
 464
 465 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
 466                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 467                 unsigned long attrs)
 468 {
 469         unsigned long user_count = vma_pages(vma);
 470         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 471         unsigned long pfn = PHYS_PFN(dma_to_phys(dev, dma_addr));
 472         int ret = -ENXIO;
 473
 474         vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
 475
 476         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 477                 return ret;
 478         if (dma_mmap_from_global_coherent(vma, cpu_addr, size, &ret))
 479                 return ret;
 480
 481         if (vma->vm_pgoff >= count || user_count > count - vma->vm_pgoff)
 482                 return -ENXIO;
 483         return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
 484                         user_count << PAGE_SHIFT, vma->vm_page_prot);
 485 }
 486
 487 int dma_direct_supported(struct device *dev, u64 mask)
 488 {
 489         u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
 490
 491         /*
 492          * Because 32-bit DMA masks are so common we expect every architecture
 493          * to be able to satisfy them - either by not supporting more physical
 494          * memory, or by providing a ZONE_DMA32.  If neither is the case, the
 495          * architecture needs to use an IOMMU instead of the direct mapping.
 496          */
 497         if (mask >= DMA_BIT_MASK(32))
 498                 return 1;
 499
 500         /*
 501          * This check needs to be against the actual bit mask value, so use
 502          * phys_to_dma_unencrypted() here so that the SME encryption mask isn't
 503          * part of the check.
 504          */
 505         if (IS_ENABLED(CONFIG_ZONE_DMA))
 506                 min_mask = min_t(u64, min_mask, DMA_BIT_MASK(zone_dma_bits));
 507         return mask >= phys_to_dma_unencrypted(dev, min_mask);
 508 }
 509
 510 size_t dma_direct_max_mapping_size(struct device *dev)
 511 {
 512         /* If SWIOTLB is active, use its maximum mapping size */
 513         if (is_swiotlb_active() &&
 514             (dma_addressing_limited(dev) || swiotlb_force == SWIOTLB_FORCE))
 515                 return swiotlb_max_mapping_size(dev);
 516         return SIZE_MAX;
 517 }
 518
 519 bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr)
 520 {
 521         return !dev_is_dma_coherent(dev) ||
 522                 is_swiotlb_buffer(dma_to_phys(dev, dma_addr));
 523 }
 524
 525 /**
 526  * dma_direct_set_offset - Assign scalar offset for a single DMA range.
 527  * @dev:        device pointer; needed to "own" the alloced memory.
 528  * @cpu_start:  beginning of memory region covered by this offset.
 529  * @dma_start:  beginning of DMA/PCI region covered by this offset.
 530  * @size:       size of the region.
 531  *
 532  * This is for the simple case of a uniform offset which cannot
 533  * be discovered by "dma-ranges".
 534  *
 535  * It returns -ENOMEM if out of memory, -EINVAL if a map
 536  * already exists, 0 otherwise.
 537  *
 538  * Note: any call to this from a driver is a bug.  The mapping needs
 539  * to be described by the device tree or other firmware interfaces.
 540  */
 541 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
 542                          dma_addr_t dma_start, u64 size)
 543 {
 544         struct bus_dma_region *map;
 545         u64 offset = (u64)cpu_start - (u64)dma_start;
 546
 547         if (dev->dma_range_map) {
 548                 dev_err(dev, "attempt to add DMA range to existing map\n");
 549                 return -EINVAL;
 550         }
 551
 552         if (!offset)
 553                 return 0;
 554
 555         map = kcalloc(2, sizeof(*map), GFP_KERNEL);
 556         if (!map)
 557                 return -ENOMEM;
 558         map[0].cpu_start = cpu_start;
 559         map[0].dma_start = dma_start;
 560         map[0].offset = offset;
 561         map[0].size = size;
 562         dev->dma_range_map = map;
 563         return 0;
 564 }