include/uapi/linux/perf_event.h

   1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2 /*
   3  * Performance events:
   4  *
   5  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
   6  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
   7  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
   8  *
   9  * Data type definitions, declarations, prototypes.
  10  *
  11  *    Started by: Thomas Gleixner and Ingo Molnar
  12  *
  13  * For licencing details see kernel-base/COPYING
  14  */
  15 #ifndef _UAPI_LINUX_PERF_EVENT_H
  16 #define _UAPI_LINUX_PERF_EVENT_H
  17
  18 #include <linux/types.h>
  19 #include <linux/ioctl.h>
  20 #include <asm/byteorder.h>
  21
  22 /*
  23  * User-space ABI bits:
  24  */
  25
  26 /*
  27  * attr.type
  28  */
  29 enum perf_type_id {
  30         PERF_TYPE_HARDWARE                      = 0,
  31         PERF_TYPE_SOFTWARE                      = 1,
  32         PERF_TYPE_TRACEPOINT                    = 2,
  33         PERF_TYPE_HW_CACHE                      = 3,
  34         PERF_TYPE_RAW                           = 4,
  35         PERF_TYPE_BREAKPOINT                    = 5,
  36
  37         PERF_TYPE_MAX,                          /* non-ABI */
  38 };
  39
  40 /*
  41  * Generalized performance event event_id types, used by the
  42  * attr.event_id parameter of the sys_perf_event_open()
  43  * syscall:
  44  */
  45 enum perf_hw_id {
  46         /*
  47          * Common hardware events, generalized by the kernel:
  48          */
  49         PERF_COUNT_HW_CPU_CYCLES                = 0,
  50         PERF_COUNT_HW_INSTRUCTIONS              = 1,
  51         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
  52         PERF_COUNT_HW_CACHE_MISSES              = 3,
  53         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
  54         PERF_COUNT_HW_BRANCH_MISSES             = 5,
  55         PERF_COUNT_HW_BUS_CYCLES                = 6,
  56         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
  57         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
  58         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
  59
  60         PERF_COUNT_HW_MAX,                      /* non-ABI */
  61 };
  62
  63 /*
  64  * Generalized hardware cache events:
  65  *
  66  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
  67  *       { read, write, prefetch } x
  68  *       { accesses, misses }
  69  */
  70 enum perf_hw_cache_id {
  71         PERF_COUNT_HW_CACHE_L1D                 = 0,
  72         PERF_COUNT_HW_CACHE_L1I                 = 1,
  73         PERF_COUNT_HW_CACHE_LL                  = 2,
  74         PERF_COUNT_HW_CACHE_DTLB                = 3,
  75         PERF_COUNT_HW_CACHE_ITLB                = 4,
  76         PERF_COUNT_HW_CACHE_BPU                 = 5,
  77         PERF_COUNT_HW_CACHE_NODE                = 6,
  78
  79         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
  80 };
  81
  82 enum perf_hw_cache_op_id {
  83         PERF_COUNT_HW_CACHE_OP_READ             = 0,
  84         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
  85         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
  86
  87         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
  88 };
  89
  90 enum perf_hw_cache_op_result_id {
  91         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
  92         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
  93
  94         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
  95 };
  96
  97 /*
  98  * Special "software" events provided by the kernel, even if the hardware
  99  * does not support performance events. These events measure various
 100  * physical and sw events of the kernel (and allow the profiling of them as
 101  * well):
 102  */
 103 enum perf_sw_ids {
 104         PERF_COUNT_SW_CPU_CLOCK                 = 0,
 105         PERF_COUNT_SW_TASK_CLOCK                = 1,
 106         PERF_COUNT_SW_PAGE_FAULTS               = 2,
 107         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
 108         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
 109         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
 110         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
 111         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
 112         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
 113         PERF_COUNT_SW_DUMMY                     = 9,
 114         PERF_COUNT_SW_BPF_OUTPUT                = 10,
 115
 116         PERF_COUNT_SW_MAX,                      /* non-ABI */
 117 };
 118
 119 /*
 120  * Bits that can be set in attr.sample_type to request information
 121  * in the overflow packets.
 122  */
 123 enum perf_event_sample_format {
 124         PERF_SAMPLE_IP                          = 1U << 0,
 125         PERF_SAMPLE_TID                         = 1U << 1,
 126         PERF_SAMPLE_TIME                        = 1U << 2,
 127         PERF_SAMPLE_ADDR                        = 1U << 3,
 128         PERF_SAMPLE_READ                        = 1U << 4,
 129         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
 130         PERF_SAMPLE_ID                          = 1U << 6,
 131         PERF_SAMPLE_CPU                         = 1U << 7,
 132         PERF_SAMPLE_PERIOD                      = 1U << 8,
 133         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
 134         PERF_SAMPLE_RAW                         = 1U << 10,
 135         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
 136         PERF_SAMPLE_REGS_USER                   = 1U << 12,
 137         PERF_SAMPLE_STACK_USER                  = 1U << 13,
 138         PERF_SAMPLE_WEIGHT                      = 1U << 14,
 139         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
 140         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 141         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
 142         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
 143         PERF_SAMPLE_PHYS_ADDR                   = 1U << 19,
 144         PERF_SAMPLE_AUX                         = 1U << 20,
 145         PERF_SAMPLE_CGROUP                      = 1U << 21,
 146         PERF_SAMPLE_DATA_PAGE_SIZE              = 1U << 22,
 147         PERF_SAMPLE_CODE_PAGE_SIZE              = 1U << 23,
 148         PERF_SAMPLE_WEIGHT_STRUCT               = 1U << 24,
 149
 150         PERF_SAMPLE_MAX = 1U << 25,             /* non-ABI */
 151
 152         __PERF_SAMPLE_CALLCHAIN_EARLY           = 1ULL << 63, /* non-ABI; internal use */
 153 };
 154
 155 #define PERF_SAMPLE_WEIGHT_TYPE (PERF_SAMPLE_WEIGHT | PERF_SAMPLE_WEIGHT_STRUCT)
 156 /*
 157  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
 158  *
 159  * If the user does not pass priv level information via branch_sample_type,
 160  * the kernel uses the event's priv level. Branch and event priv levels do
 161  * not have to match. Branch priv level is checked for permissions.
 162  *
 163  * The branch types can be combined, however BRANCH_ANY covers all types
 164  * of branches and therefore it supersedes all the other types.
 165  */
 166 enum perf_branch_sample_type_shift {
 167         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
 168         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
 169         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
 170
 171         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
 172         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
 173         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
 174         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
 175         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
 176         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
 177         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
 178         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
 179
 180         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
 181         PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT       = 12, /* indirect jumps */
 182         PERF_SAMPLE_BRANCH_CALL_SHIFT           = 13, /* direct call */
 183
 184         PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT       = 14, /* no flags */
 185         PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT      = 15, /* no cycles */
 186
 187         PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT      = 16, /* save branch type */
 188
 189         PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT       = 17, /* save low level index of raw branch records */
 190
 191         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
 192 };
 193
 194 enum perf_branch_sample_type {
 195         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
 196         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
 197         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
 198
 199         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
 200         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
 201         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
 202         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
 203         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
 204         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
 205         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
 206         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
 207
 208         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
 209         PERF_SAMPLE_BRANCH_IND_JUMP     = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
 210         PERF_SAMPLE_BRANCH_CALL         = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
 211
 212         PERF_SAMPLE_BRANCH_NO_FLAGS     = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
 213         PERF_SAMPLE_BRANCH_NO_CYCLES    = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
 214
 215         PERF_SAMPLE_BRANCH_TYPE_SAVE    =
 216                 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
 217
 218         PERF_SAMPLE_BRANCH_HW_INDEX     = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT,
 219
 220         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
 221 };
 222
 223 /*
 224  * Common flow change classification
 225  */
 226 enum {
 227         PERF_BR_UNKNOWN         = 0,    /* unknown */
 228         PERF_BR_COND            = 1,    /* conditional */
 229         PERF_BR_UNCOND          = 2,    /* unconditional  */
 230         PERF_BR_IND             = 3,    /* indirect */
 231         PERF_BR_CALL            = 4,    /* function call */
 232         PERF_BR_IND_CALL        = 5,    /* indirect function call */
 233         PERF_BR_RET             = 6,    /* function return */
 234         PERF_BR_SYSCALL         = 7,    /* syscall */
 235         PERF_BR_SYSRET          = 8,    /* syscall return */
 236         PERF_BR_COND_CALL       = 9,    /* conditional function call */
 237         PERF_BR_COND_RET        = 10,   /* conditional function return */
 238         PERF_BR_MAX,
 239 };
 240
 241 #define PERF_SAMPLE_BRANCH_PLM_ALL \
 242         (PERF_SAMPLE_BRANCH_USER|\
 243          PERF_SAMPLE_BRANCH_KERNEL|\
 244          PERF_SAMPLE_BRANCH_HV)
 245
 246 /*
 247  * Values to determine ABI of the registers dump.
 248  */
 249 enum perf_sample_regs_abi {
 250         PERF_SAMPLE_REGS_ABI_NONE       = 0,
 251         PERF_SAMPLE_REGS_ABI_32         = 1,
 252         PERF_SAMPLE_REGS_ABI_64         = 2,
 253 };
 254
 255 /*
 256  * Values for the memory transaction event qualifier, mostly for
 257  * abort events. Multiple bits can be set.
 258  */
 259 enum {
 260         PERF_TXN_ELISION        = (1 << 0), /* From elision */
 261         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
 262         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
 263         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
 264         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
 265         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
 266         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
 267         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
 268
 269         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
 270
 271         /* bits 32..63 are reserved for the abort code */
 272
 273         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
 274         PERF_TXN_ABORT_SHIFT = 32,
 275 };
 276
 277 /*
 278  * The format of the data returned by read() on a perf event fd,
 279  * as specified by attr.read_format:
 280  *
 281  * struct read_format {
 282  *      { u64           value;
 283  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 284  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 285  *        { u64         id;           } && PERF_FORMAT_ID
 286  *      } && !PERF_FORMAT_GROUP
 287  *
 288  *      { u64           nr;
 289  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 290  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 291  *        { u64         value;
 292  *          { u64       id;           } && PERF_FORMAT_ID
 293  *        }             cntr[nr];
 294  *      } && PERF_FORMAT_GROUP
 295  * };
 296  */
 297 enum perf_event_read_format {
 298         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
 299         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
 300         PERF_FORMAT_ID                          = 1U << 2,
 301         PERF_FORMAT_GROUP                       = 1U << 3,
 302
 303         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
 304 };
 305
 306 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
 307 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
 308 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 309 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
 310                                         /* add: sample_stack_user */
 311 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
 312 #define PERF_ATTR_SIZE_VER5     112     /* add: aux_watermark */
 313 #define PERF_ATTR_SIZE_VER6     120     /* add: aux_sample_size */
 314
 315 /*
 316  * Hardware event_id to monitor via a performance monitoring event:
 317  *
 318  * @sample_max_stack: Max number of frame pointers in a callchain,
 319  *                    should be < /proc/sys/kernel/perf_event_max_stack
 320  */
 321 struct perf_event_attr {
 322
 323         /*
 324          * Major type: hardware/software/tracepoint/etc.
 325          */
 326         __u32                   type;
 327
 328         /*
 329          * Size of the attr structure, for fwd/bwd compat.
 330          */
 331         __u32                   size;
 332
 333         /*
 334          * Type specific configuration information.
 335          */
 336         __u64                   config;
 337
 338         union {
 339                 __u64           sample_period;
 340                 __u64           sample_freq;
 341         };
 342
 343         __u64                   sample_type;
 344         __u64                   read_format;
 345
 346         __u64                   disabled       :  1, /* off by default        */
 347                                 inherit        :  1, /* children inherit it   */
 348                                 pinned         :  1, /* must always be on PMU */
 349                                 exclusive      :  1, /* only group on PMU     */
 350                                 exclude_user   :  1, /* don't count user      */
 351                                 exclude_kernel :  1, /* ditto kernel          */
 352                                 exclude_hv     :  1, /* ditto hypervisor      */
 353                                 exclude_idle   :  1, /* don't count when idle */
 354                                 mmap           :  1, /* include mmap data     */
 355                                 comm           :  1, /* include comm data     */
 356                                 freq           :  1, /* use freq, not period  */
 357                                 inherit_stat   :  1, /* per task counts       */
 358                                 enable_on_exec :  1, /* next exec enables     */
 359                                 task           :  1, /* trace fork/exit       */
 360                                 watermark      :  1, /* wakeup_watermark      */
 361                                 /*
 362                                  * precise_ip:
 363                                  *
 364                                  *  0 - SAMPLE_IP can have arbitrary skid
 365                                  *  1 - SAMPLE_IP must have constant skid
 366                                  *  2 - SAMPLE_IP requested to have 0 skid
 367                                  *  3 - SAMPLE_IP must have 0 skid
 368                                  *
 369                                  *  See also PERF_RECORD_MISC_EXACT_IP
 370                                  */
 371                                 precise_ip     :  2, /* skid constraint       */
 372                                 mmap_data      :  1, /* non-exec mmap data    */
 373                                 sample_id_all  :  1, /* sample_type all events */
 374
 375                                 exclude_host   :  1, /* don't count in host   */
 376                                 exclude_guest  :  1, /* don't count in guest  */
 377
 378                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
 379                                 exclude_callchain_user   : 1, /* exclude user callchains */
 380                                 mmap2          :  1, /* include mmap with inode data     */
 381                                 comm_exec      :  1, /* flag comm events that are due to an exec */
 382                                 use_clockid    :  1, /* use @clockid for time fields */
 383                                 context_switch :  1, /* context switch data */
 384                                 write_backward :  1, /* Write ring buffer from end to beginning */
 385                                 namespaces     :  1, /* include namespaces data */
 386                                 ksymbol        :  1, /* include ksymbol events */
 387                                 bpf_event      :  1, /* include bpf events */
 388                                 aux_output     :  1, /* generate AUX records instead of events */
 389                                 cgroup         :  1, /* include cgroup events */
 390                                 text_poke      :  1, /* include text poke events */
 391                                 build_id       :  1, /* use build id in mmap2 events */
 392                                 __reserved_1   : 29;
 393
 394         union {
 395                 __u32           wakeup_events;    /* wakeup every n events */
 396                 __u32           wakeup_watermark; /* bytes before wakeup   */
 397         };
 398
 399         __u32                   bp_type;
 400         union {
 401                 __u64           bp_addr;
 402                 __u64           kprobe_func; /* for perf_kprobe */
 403                 __u64           uprobe_path; /* for perf_uprobe */
 404                 __u64           config1; /* extension of config */
 405         };
 406         union {
 407                 __u64           bp_len;
 408                 __u64           kprobe_addr; /* when kprobe_func == NULL */
 409                 __u64           probe_offset; /* for perf_[k,u]probe */
 410                 __u64           config2; /* extension of config1 */
 411         };
 412         __u64   branch_sample_type; /* enum perf_branch_sample_type */
 413
 414         /*
 415          * Defines set of user regs to dump on samples.
 416          * See asm/perf_regs.h for details.
 417          */
 418         __u64   sample_regs_user;
 419
 420         /*
 421          * Defines size of the user stack to dump on samples.
 422          */
 423         __u32   sample_stack_user;
 424
 425         __s32   clockid;
 426         /*
 427          * Defines set of regs to dump for each sample
 428          * state captured on:
 429          *  - precise = 0: PMU interrupt
 430          *  - precise > 0: sampled instruction
 431          *
 432          * See asm/perf_regs.h for details.
 433          */
 434         __u64   sample_regs_intr;
 435
 436         /*
 437          * Wakeup watermark for AUX area
 438          */
 439         __u32   aux_watermark;
 440         __u16   sample_max_stack;
 441         __u16   __reserved_2;
 442         __u32   aux_sample_size;
 443         __u32   __reserved_3;
 444 };
 445
 446 /*
 447  * Structure used by below PERF_EVENT_IOC_QUERY_BPF command
 448  * to query bpf programs attached to the same perf tracepoint
 449  * as the given perf event.
 450  */
 451 struct perf_event_query_bpf {
 452         /*
 453          * The below ids array length
 454          */
 455         __u32   ids_len;
 456         /*
 457          * Set by the kernel to indicate the number of
 458          * available programs
 459          */
 460         __u32   prog_cnt;
 461         /*
 462          * User provided buffer to store program ids
 463          */
 464         __u32   ids[0];
 465 };
 466
 467 /*
 468  * Ioctls that can be done on a perf event fd:
 469  */
 470 #define PERF_EVENT_IOC_ENABLE                   _IO ('$', 0)
 471 #define PERF_EVENT_IOC_DISABLE                  _IO ('$', 1)
 472 #define PERF_EVENT_IOC_REFRESH                  _IO ('$', 2)
 473 #define PERF_EVENT_IOC_RESET                    _IO ('$', 3)
 474 #define PERF_EVENT_IOC_PERIOD                   _IOW('$', 4, __u64)
 475 #define PERF_EVENT_IOC_SET_OUTPUT               _IO ('$', 5)
 476 #define PERF_EVENT_IOC_SET_FILTER               _IOW('$', 6, char *)
 477 #define PERF_EVENT_IOC_ID                       _IOR('$', 7, __u64 *)
 478 #define PERF_EVENT_IOC_SET_BPF                  _IOW('$', 8, __u32)
 479 #define PERF_EVENT_IOC_PAUSE_OUTPUT             _IOW('$', 9, __u32)
 480 #define PERF_EVENT_IOC_QUERY_BPF                _IOWR('$', 10, struct perf_event_query_bpf *)
 481 #define PERF_EVENT_IOC_MODIFY_ATTRIBUTES        _IOW('$', 11, struct perf_event_attr *)
 482
 483 enum perf_event_ioc_flags {
 484         PERF_IOC_FLAG_GROUP             = 1U << 0,
 485 };
 486
 487 /*
 488  * Structure of the page that can be mapped via mmap
 489  */
 490 struct perf_event_mmap_page {
 491         __u32   version;                /* version number of this structure */
 492         __u32   compat_version;         /* lowest version this is compat with */
 493
 494         /*
 495          * Bits needed to read the hw events in user-space.
 496          *
 497          *   u32 seq, time_mult, time_shift, index, width;
 498          *   u64 count, enabled, running;
 499          *   u64 cyc, time_offset;
 500          *   s64 pmc = 0;
 501          *
 502          *   do {
 503          *     seq = pc->lock;
 504          *     barrier()
 505          *
 506          *     enabled = pc->time_enabled;
 507          *     running = pc->time_running;
 508          *
 509          *     if (pc->cap_usr_time && enabled != running) {
 510          *       cyc = rdtsc();
 511          *       time_offset = pc->time_offset;
 512          *       time_mult   = pc->time_mult;
 513          *       time_shift  = pc->time_shift;
 514          *     }
 515          *
 516          *     index = pc->index;
 517          *     count = pc->offset;
 518          *     if (pc->cap_user_rdpmc && index) {
 519          *       width = pc->pmc_width;
 520          *       pmc = rdpmc(index - 1);
 521          *     }
 522          *
 523          *     barrier();
 524          *   } while (pc->lock != seq);
 525          *
 526          * NOTE: for obvious reason this only works on self-monitoring
 527          *       processes.
 528          */
 529         __u32   lock;                   /* seqlock for synchronization */
 530         __u32   index;                  /* hardware event identifier */
 531         __s64   offset;                 /* add to hardware event value */
 532         __u64   time_enabled;           /* time event active */
 533         __u64   time_running;           /* time event on cpu */
 534         union {
 535                 __u64   capabilities;
 536                 struct {
 537                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
 538                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
 539
 540                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
 541                                 cap_user_time           : 1, /* The time_{shift,mult,offset} fields are used */
 542                                 cap_user_time_zero      : 1, /* The time_zero field is used */
 543                                 cap_user_time_short     : 1, /* the time_{cycle,mask} fields are used */
 544                                 cap_____res             : 58;
 545                 };
 546         };
 547
 548         /*
 549          * If cap_user_rdpmc this field provides the bit-width of the value
 550          * read using the rdpmc() or equivalent instruction. This can be used
 551          * to sign extend the result like:
 552          *
 553          *   pmc <<= 64 - width;
 554          *   pmc >>= 64 - width; // signed shift right
 555          *   count += pmc;
 556          */
 557         __u16   pmc_width;
 558
 559         /*
 560          * If cap_usr_time the below fields can be used to compute the time
 561          * delta since time_enabled (in ns) using rdtsc or similar.
 562          *
 563          *   u64 quot, rem;
 564          *   u64 delta;
 565          *
 566          *   quot = (cyc >> time_shift);
 567          *   rem = cyc & (((u64)1 << time_shift) - 1);
 568          *   delta = time_offset + quot * time_mult +
 569          *              ((rem * time_mult) >> time_shift);
 570          *
 571          * Where time_offset,time_mult,time_shift and cyc are read in the
 572          * seqcount loop described above. This delta can then be added to
 573          * enabled and possible running (if index), improving the scaling:
 574          *
 575          *   enabled += delta;
 576          *   if (index)
 577          *     running += delta;
 578          *
 579          *   quot = count / running;
 580          *   rem  = count % running;
 581          *   count = quot * enabled + (rem * enabled) / running;
 582          */
 583         __u16   time_shift;
 584         __u32   time_mult;
 585         __u64   time_offset;
 586         /*
 587          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
 588          * from sample timestamps.
 589          *
 590          *   time = timestamp - time_zero;
 591          *   quot = time / time_mult;
 592          *   rem  = time % time_mult;
 593          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
 594          *
 595          * And vice versa:
 596          *
 597          *   quot = cyc >> time_shift;
 598          *   rem  = cyc & (((u64)1 << time_shift) - 1);
 599          *   timestamp = time_zero + quot * time_mult +
 600          *               ((rem * time_mult) >> time_shift);
 601          */
 602         __u64   time_zero;
 603
 604         __u32   size;                   /* Header size up to __reserved[] fields. */
 605         __u32   __reserved_1;
 606
 607         /*
 608          * If cap_usr_time_short, the hardware clock is less than 64bit wide
 609          * and we must compute the 'cyc' value, as used by cap_usr_time, as:
 610          *
 611          *   cyc = time_cycles + ((cyc - time_cycles) & time_mask)
 612          *
 613          * NOTE: this form is explicitly chosen such that cap_usr_time_short
 614          *       is a correction on top of cap_usr_time, and code that doesn't
 615          *       know about cap_usr_time_short still works under the assumption
 616          *       the counter doesn't wrap.
 617          */
 618         __u64   time_cycles;
 619         __u64   time_mask;
 620
 621                 /*
 622                  * Hole for extension of the self monitor capabilities
 623                  */
 624
 625         __u8    __reserved[116*8];      /* align to 1k. */
 626
 627         /*
 628          * Control data for the mmap() data buffer.
 629          *
 630          * User-space reading the @data_head value should issue an smp_rmb(),
 631          * after reading this value.
 632          *
 633          * When the mapping is PROT_WRITE the @data_tail value should be
 634          * written by userspace to reflect the last read data, after issueing
 635          * an smp_mb() to separate the data read from the ->data_tail store.
 636          * In this case the kernel will not over-write unread data.
 637          *
 638          * See perf_output_put_handle() for the data ordering.
 639          *
 640          * data_{offset,size} indicate the location and size of the perf record
 641          * buffer within the mmapped area.
 642          */
 643         __u64   data_head;              /* head in the data section */
 644         __u64   data_tail;              /* user-space written tail */
 645         __u64   data_offset;            /* where the buffer starts */
 646         __u64   data_size;              /* data buffer size */
 647
 648         /*
 649          * AUX area is defined by aux_{offset,size} fields that should be set
 650          * by the userspace, so that
 651          *
 652          *   aux_offset >= data_offset + data_size
 653          *
 654          * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
 655          *
 656          * Ring buffer pointers aux_{head,tail} have the same semantics as
 657          * data_{head,tail} and same ordering rules apply.
 658          */
 659         __u64   aux_head;
 660         __u64   aux_tail;
 661         __u64   aux_offset;
 662         __u64   aux_size;
 663 };
 664
 665 /*
 666  * The current state of perf_event_header::misc bits usage:
 667  * ('|' used bit, '-' unused bit)
 668  *
 669  *  012         CDEF
 670  *  |||---------||||
 671  *
 672  *  Where:
 673  *    0-2     CPUMODE_MASK
 674  *
 675  *    C       PROC_MAP_PARSE_TIMEOUT
 676  *    D       MMAP_DATA / COMM_EXEC / FORK_EXEC / SWITCH_OUT
 677  *    E       MMAP_BUILD_ID / EXACT_IP / SCHED_OUT_PREEMPT
 678  *    F       (reserved)
 679  */
 680
 681 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
 682 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
 683 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
 684 #define PERF_RECORD_MISC_USER                   (2 << 0)
 685 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
 686 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 687 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 688
 689 /*
 690  * Indicates that /proc/PID/maps parsing are truncated by time out.
 691  */
 692 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
 693 /*
 694  * Following PERF_RECORD_MISC_* are used on different
 695  * events, so can reuse the same bit position:
 696  *
 697  *   PERF_RECORD_MISC_MMAP_DATA  - PERF_RECORD_MMAP* events
 698  *   PERF_RECORD_MISC_COMM_EXEC  - PERF_RECORD_COMM event
 699  *   PERF_RECORD_MISC_FORK_EXEC  - PERF_RECORD_FORK event (perf internal)
 700  *   PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events
 701  */
 702 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
 703 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
 704 #define PERF_RECORD_MISC_FORK_EXEC              (1 << 13)
 705 #define PERF_RECORD_MISC_SWITCH_OUT             (1 << 13)
 706 /*
 707  * These PERF_RECORD_MISC_* flags below are safely reused
 708  * for the following events:
 709  *
 710  *   PERF_RECORD_MISC_EXACT_IP           - PERF_RECORD_SAMPLE of precise events
 711  *   PERF_RECORD_MISC_SWITCH_OUT_PREEMPT - PERF_RECORD_SWITCH* events
 712  *   PERF_RECORD_MISC_MMAP_BUILD_ID      - PERF_RECORD_MMAP2 event
 713  *
 714  *
 715  * PERF_RECORD_MISC_EXACT_IP:
 716  *   Indicates that the content of PERF_SAMPLE_IP points to
 717  *   the actual instruction that triggered the event. See also
 718  *   perf_event_attr::precise_ip.
 719  *
 720  * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT:
 721  *   Indicates that thread was preempted in TASK_RUNNING state.
 722  *
 723  * PERF_RECORD_MISC_MMAP_BUILD_ID:
 724  *   Indicates that mmap2 event carries build id data.
 725  */
 726 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 727 #define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT     (1 << 14)
 728 #define PERF_RECORD_MISC_MMAP_BUILD_ID          (1 << 14)
 729 /*
 730  * Reserve the last bit to indicate some extended misc field
 731  */
 732 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
 733
 734 struct perf_event_header {
 735         __u32   type;
 736         __u16   misc;
 737         __u16   size;
 738 };
 739
 740 struct perf_ns_link_info {
 741         __u64   dev;
 742         __u64   ino;
 743 };
 744
 745 enum {
 746         NET_NS_INDEX            = 0,
 747         UTS_NS_INDEX            = 1,
 748         IPC_NS_INDEX            = 2,
 749         PID_NS_INDEX            = 3,
 750         USER_NS_INDEX           = 4,
 751         MNT_NS_INDEX            = 5,
 752         CGROUP_NS_INDEX         = 6,
 753
 754         NR_NAMESPACES,          /* number of available namespaces */
 755 };
 756
 757 enum perf_event_type {
 758
 759         /*
 760          * If perf_event_attr.sample_id_all is set then all event types will
 761          * have the sample_type selected fields related to where/when
 762          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
 763          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
 764          * just after the perf_event_header and the fields already present for
 765          * the existing fields, i.e. at the end of the payload. That way a newer
 766          * perf.data file will be supported by older perf tools, with these new
 767          * optional fields being ignored.
 768          *
 769          * struct sample_id {
 770          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 771          *      { u64                   time;     } && PERF_SAMPLE_TIME
 772          *      { u64                   id;       } && PERF_SAMPLE_ID
 773          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 774          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 775          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 776          * } && perf_event_attr::sample_id_all
 777          *
 778          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
 779          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
 780          * relative to header.size.
 781          */
 782
 783         /*
 784          * The MMAP events record the PROT_EXEC mappings so that we can
 785          * correlate userspace IPs to code. They have the following structure:
 786          *
 787          * struct {
 788          *      struct perf_event_header        header;
 789          *
 790          *      u32                             pid, tid;
 791          *      u64                             addr;
 792          *      u64                             len;
 793          *      u64                             pgoff;
 794          *      char                            filename[];
 795          *      struct sample_id                sample_id;
 796          * };
 797          */
 798         PERF_RECORD_MMAP                        = 1,
 799
 800         /*
 801          * struct {
 802          *      struct perf_event_header        header;
 803          *      u64                             id;
 804          *      u64                             lost;
 805          *      struct sample_id                sample_id;
 806          * };
 807          */
 808         PERF_RECORD_LOST                        = 2,
 809
 810         /*
 811          * struct {
 812          *      struct perf_event_header        header;
 813          *
 814          *      u32                             pid, tid;
 815          *      char                            comm[];
 816          *      struct sample_id                sample_id;
 817          * };
 818          */
 819         PERF_RECORD_COMM                        = 3,
 820
 821         /*
 822          * struct {
 823          *      struct perf_event_header        header;
 824          *      u32                             pid, ppid;
 825          *      u32                             tid, ptid;
 826          *      u64                             time;
 827          *      struct sample_id                sample_id;
 828          * };
 829          */
 830         PERF_RECORD_EXIT                        = 4,
 831
 832         /*
 833          * struct {
 834          *      struct perf_event_header        header;
 835          *      u64                             time;
 836          *      u64                             id;
 837          *      u64                             stream_id;
 838          *      struct sample_id                sample_id;
 839          * };
 840          */
 841         PERF_RECORD_THROTTLE                    = 5,
 842         PERF_RECORD_UNTHROTTLE                  = 6,
 843
 844         /*
 845          * struct {
 846          *      struct perf_event_header        header;
 847          *      u32                             pid, ppid;
 848          *      u32                             tid, ptid;
 849          *      u64                             time;
 850          *      struct sample_id                sample_id;
 851          * };
 852          */
 853         PERF_RECORD_FORK                        = 7,
 854
 855         /*
 856          * struct {
 857          *      struct perf_event_header        header;
 858          *      u32                             pid, tid;
 859          *
 860          *      struct read_format              values;
 861          *      struct sample_id                sample_id;
 862          * };
 863          */
 864         PERF_RECORD_READ                        = 8,
 865
 866         /*
 867          * struct {
 868          *      struct perf_event_header        header;
 869          *
 870          *      #
 871          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
 872          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
 873          *      # is fixed relative to header.
 874          *      #
 875          *
 876          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 877          *      { u64                   ip;       } && PERF_SAMPLE_IP
 878          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 879          *      { u64                   time;     } && PERF_SAMPLE_TIME
 880          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
 881          *      { u64                   id;       } && PERF_SAMPLE_ID
 882          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 883          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 884          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
 885          *
 886          *      { struct read_format    values;   } && PERF_SAMPLE_READ
 887          *
 888          *      { u64                   nr,
 889          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
 890          *
 891          *      #
 892          *      # The RAW record below is opaque data wrt the ABI
 893          *      #
 894          *      # That is, the ABI doesn't make any promises wrt to
 895          *      # the stability of its content, it may vary depending
 896          *      # on event, hardware, kernel version and phase of
 897          *      # the moon.
 898          *      #
 899          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
 900          *      #
 901          *
 902          *      { u32                   size;
 903          *        char                  data[size];}&& PERF_SAMPLE_RAW
 904          *
 905          *      { u64                   nr;
 906          *        { u64 hw_idx; } && PERF_SAMPLE_BRANCH_HW_INDEX
 907          *        { u64 from, to, flags } lbr[nr];
 908          *      } && PERF_SAMPLE_BRANCH_STACK
 909          *
 910          *      { u64                   abi; # enum perf_sample_regs_abi
 911          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
 912          *
 913          *      { u64                   size;
 914          *        char                  data[size];
 915          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
 916          *
 917          *      { union perf_sample_weight
 918          *       {
 919          *              u64             full; && PERF_SAMPLE_WEIGHT
 920          *      #if defined(__LITTLE_ENDIAN_BITFIELD)
 921          *              struct {
 922          *                      u32     var1_dw;
 923          *                      u16     var2_w;
 924          *                      u16     var3_w;
 925          *              } && PERF_SAMPLE_WEIGHT_STRUCT
 926          *      #elif defined(__BIG_ENDIAN_BITFIELD)
 927          *              struct {
 928          *                      u16     var3_w;
 929          *                      u16     var2_w;
 930          *                      u32     var1_dw;
 931          *              } && PERF_SAMPLE_WEIGHT_STRUCT
 932          *      #endif
 933          *       }
 934          *      }
 935          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
 936          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
 937          *      { u64                   abi; # enum perf_sample_regs_abi
 938          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
 939          *      { u64                   phys_addr;} && PERF_SAMPLE_PHYS_ADDR
 940          *      { u64                   size;
 941          *        char                  data[size]; } && PERF_SAMPLE_AUX
 942          *      { u64                   data_page_size;} && PERF_SAMPLE_DATA_PAGE_SIZE
 943          *      { u64                   code_page_size;} && PERF_SAMPLE_CODE_PAGE_SIZE
 944          * };
 945          */
 946         PERF_RECORD_SAMPLE                      = 9,
 947
 948         /*
 949          * The MMAP2 records are an augmented version of MMAP, they add
 950          * maj, min, ino numbers to be used to uniquely identify each mapping
 951          *
 952          * struct {
 953          *      struct perf_event_header        header;
 954          *
 955          *      u32                             pid, tid;
 956          *      u64                             addr;
 957          *      u64                             len;
 958          *      u64                             pgoff;
 959          *      union {
 960          *              struct {
 961          *                      u32             maj;
 962          *                      u32             min;
 963          *                      u64             ino;
 964          *                      u64             ino_generation;
 965          *              };
 966          *              struct {
 967          *                      u8              build_id_size;
 968          *                      u8              __reserved_1;
 969          *                      u16             __reserved_2;
 970          *                      u8              build_id[20];
 971          *              };
 972          *      };
 973          *      u32                             prot, flags;
 974          *      char                            filename[];
 975          *      struct sample_id                sample_id;
 976          * };
 977          */
 978         PERF_RECORD_MMAP2                       = 10,
 979
 980         /*
 981          * Records that new data landed in the AUX buffer part.
 982          *
 983          * struct {
 984          *      struct perf_event_header        header;
 985          *
 986          *      u64                             aux_offset;
 987          *      u64                             aux_size;
 988          *      u64                             flags;
 989          *      struct sample_id                sample_id;
 990          * };
 991          */
 992         PERF_RECORD_AUX                         = 11,
 993
 994         /*
 995          * Indicates that instruction trace has started
 996          *
 997          * struct {
 998          *      struct perf_event_header        header;
 999          *      u32                             pid;
1000          *      u32                             tid;
1001          *      struct sample_id                sample_id;
1002          * };
1003          */
1004         PERF_RECORD_ITRACE_START                = 12,
1005
1006         /*
1007          * Records the dropped/lost sample number.
1008          *
1009          * struct {
1010          *      struct perf_event_header        header;
1011          *
1012          *      u64                             lost;
1013          *      struct sample_id                sample_id;
1014          * };
1015          */
1016         PERF_RECORD_LOST_SAMPLES                = 13,
1017
1018         /*
1019          * Records a context switch in or out (flagged by
1020          * PERF_RECORD_MISC_SWITCH_OUT). See also
1021          * PERF_RECORD_SWITCH_CPU_WIDE.
1022          *
1023          * struct {
1024          *      struct perf_event_header        header;
1025          *      struct sample_id                sample_id;
1026          * };
1027          */
1028         PERF_RECORD_SWITCH                      = 14,
1029
1030         /*
1031          * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and
1032          * next_prev_tid that are the next (switching out) or previous
1033          * (switching in) pid/tid.
1034          *
1035          * struct {
1036          *      struct perf_event_header        header;
1037          *      u32                             next_prev_pid;
1038          *      u32                             next_prev_tid;
1039          *      struct sample_id                sample_id;
1040          * };
1041          */
1042         PERF_RECORD_SWITCH_CPU_WIDE             = 15,
1043
1044         /*
1045          * struct {
1046          *      struct perf_event_header        header;
1047          *      u32                             pid;
1048          *      u32                             tid;
1049          *      u64                             nr_namespaces;
1050          *      { u64                           dev, inode; } [nr_namespaces];
1051          *      struct sample_id                sample_id;
1052          * };
1053          */
1054         PERF_RECORD_NAMESPACES                  = 16,
1055
1056         /*
1057          * Record ksymbol register/unregister events:
1058          *
1059          * struct {
1060          *      struct perf_event_header        header;
1061          *      u64                             addr;
1062          *      u32                             len;
1063          *      u16                             ksym_type;
1064          *      u16                             flags;
1065          *      char                            name[];
1066          *      struct sample_id                sample_id;
1067          * };
1068          */
1069         PERF_RECORD_KSYMBOL                     = 17,
1070
1071         /*
1072          * Record bpf events:
1073          *  enum perf_bpf_event_type {
1074          *      PERF_BPF_EVENT_UNKNOWN          = 0,
1075          *      PERF_BPF_EVENT_PROG_LOAD        = 1,
1076          *      PERF_BPF_EVENT_PROG_UNLOAD      = 2,
1077          *  };
1078          *
1079          * struct {
1080          *      struct perf_event_header        header;
1081          *      u16                             type;
1082          *      u16                             flags;
1083          *      u32                             id;
1084          *      u8                              tag[BPF_TAG_SIZE];
1085          *      struct sample_id                sample_id;
1086          * };
1087          */
1088         PERF_RECORD_BPF_EVENT                   = 18,
1089
1090         /*
1091          * struct {
1092          *      struct perf_event_header        header;
1093          *      u64                             id;
1094          *      char                            path[];
1095          *      struct sample_id                sample_id;
1096          * };
1097          */
1098         PERF_RECORD_CGROUP                      = 19,
1099
1100         /*
1101          * Records changes to kernel text i.e. self-modified code. 'old_len' is
1102          * the number of old bytes, 'new_len' is the number of new bytes. Either
1103          * 'old_len' or 'new_len' may be zero to indicate, for example, the
1104          * addition or removal of a trampoline. 'bytes' contains the old bytes
1105          * followed immediately by the new bytes.
1106          *
1107          * struct {
1108          *      struct perf_event_header        header;
1109          *      u64                             addr;
1110          *      u16                             old_len;
1111          *      u16                             new_len;
1112          *      u8                              bytes[];
1113          *      struct sample_id                sample_id;
1114          * };
1115          */
1116         PERF_RECORD_TEXT_POKE                   = 20,
1117
1118         PERF_RECORD_MAX,                        /* non-ABI */
1119 };
1120
1121 enum perf_record_ksymbol_type {
1122         PERF_RECORD_KSYMBOL_TYPE_UNKNOWN        = 0,
1123         PERF_RECORD_KSYMBOL_TYPE_BPF            = 1,
1124         /*
1125          * Out of line code such as kprobe-replaced instructions or optimized
1126          * kprobes or ftrace trampolines.
1127          */
1128         PERF_RECORD_KSYMBOL_TYPE_OOL            = 2,
1129         PERF_RECORD_KSYMBOL_TYPE_MAX            /* non-ABI */
1130 };
1131
1132 #define PERF_RECORD_KSYMBOL_FLAGS_UNREGISTER    (1 << 0)
1133
1134 enum perf_bpf_event_type {
1135         PERF_BPF_EVENT_UNKNOWN          = 0,
1136         PERF_BPF_EVENT_PROG_LOAD        = 1,
1137         PERF_BPF_EVENT_PROG_UNLOAD      = 2,
1138         PERF_BPF_EVENT_MAX,             /* non-ABI */
1139 };
1140
1141 #define PERF_MAX_STACK_DEPTH            127
1142 #define PERF_MAX_CONTEXTS_PER_STACK       8
1143
1144 enum perf_callchain_context {
1145         PERF_CONTEXT_HV                 = (__u64)-32,
1146         PERF_CONTEXT_KERNEL             = (__u64)-128,
1147         PERF_CONTEXT_USER               = (__u64)-512,
1148
1149         PERF_CONTEXT_GUEST              = (__u64)-2048,
1150         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
1151         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
1152
1153         PERF_CONTEXT_MAX                = (__u64)-4095,
1154 };
1155
1156 /**
1157  * PERF_RECORD_AUX::flags bits
1158  */
1159 #define PERF_AUX_FLAG_TRUNCATED         0x01    /* record was truncated to fit */
1160 #define PERF_AUX_FLAG_OVERWRITE         0x02    /* snapshot from overwrite mode */
1161 #define PERF_AUX_FLAG_PARTIAL           0x04    /* record contains gaps */
1162 #define PERF_AUX_FLAG_COLLISION         0x08    /* sample collided with another */
1163
1164 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
1165 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
1166 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
1167 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
1168
1169 #if defined(__LITTLE_ENDIAN_BITFIELD)
1170 union perf_mem_data_src {
1171         __u64 val;
1172         struct {
1173                 __u64   mem_op:5,       /* type of opcode */
1174                         mem_lvl:14,     /* memory hierarchy level */
1175                         mem_snoop:5,    /* snoop mode */
1176                         mem_lock:2,     /* lock instr */
1177                         mem_dtlb:7,     /* tlb access */
1178                         mem_lvl_num:4,  /* memory hierarchy level number */
1179                         mem_remote:1,   /* remote */
1180                         mem_snoopx:2,   /* snoop mode, ext */
1181                         mem_blk:3,      /* access blocked */
1182                         mem_rsvd:21;
1183         };
1184 };
1185 #elif defined(__BIG_ENDIAN_BITFIELD)
1186 union perf_mem_data_src {
1187         __u64 val;
1188         struct {
1189                 __u64   mem_rsvd:21,
1190                         mem_blk:3,      /* access blocked */
1191                         mem_snoopx:2,   /* snoop mode, ext */
1192                         mem_remote:1,   /* remote */
1193                         mem_lvl_num:4,  /* memory hierarchy level number */
1194                         mem_dtlb:7,     /* tlb access */
1195                         mem_lock:2,     /* lock instr */
1196                         mem_snoop:5,    /* snoop mode */
1197                         mem_lvl:14,     /* memory hierarchy level */
1198                         mem_op:5;       /* type of opcode */
1199         };
1200 };
1201 #else
1202 #error "Unknown endianness"
1203 #endif
1204
1205 /* type of opcode (load/store/prefetch,code) */
1206 #define PERF_MEM_OP_NA          0x01 /* not available */
1207 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
1208 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
1209 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
1210 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
1211 #define PERF_MEM_OP_SHIFT       0
1212
1213 /* memory hierarchy (memory level, hit or miss) */
1214 #define PERF_MEM_LVL_NA         0x01  /* not available */
1215 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
1216 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
1217 #define PERF_MEM_LVL_L1         0x08  /* L1 */
1218 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
1219 #define PERF_MEM_LVL_L2         0x20  /* L2 */
1220 #define PERF_MEM_LVL_L3         0x40  /* L3 */
1221 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
1222 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
1223 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
1224 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
1225 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
1226 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
1227 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
1228 #define PERF_MEM_LVL_SHIFT      5
1229
1230 #define PERF_MEM_REMOTE_REMOTE  0x01  /* Remote */
1231 #define PERF_MEM_REMOTE_SHIFT   37
1232
1233 #define PERF_MEM_LVLNUM_L1      0x01 /* L1 */
1234 #define PERF_MEM_LVLNUM_L2      0x02 /* L2 */
1235 #define PERF_MEM_LVLNUM_L3      0x03 /* L3 */
1236 #define PERF_MEM_LVLNUM_L4      0x04 /* L4 */
1237 /* 5-0xa available */
1238 #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
1239 #define PERF_MEM_LVLNUM_LFB     0x0c /* LFB */
1240 #define PERF_MEM_LVLNUM_RAM     0x0d /* RAM */
1241 #define PERF_MEM_LVLNUM_PMEM    0x0e /* PMEM */
1242 #define PERF_MEM_LVLNUM_NA      0x0f /* N/A */
1243
1244 #define PERF_MEM_LVLNUM_SHIFT   33
1245
1246 /* snoop mode */
1247 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
1248 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
1249 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
1250 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
1251 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
1252 #define PERF_MEM_SNOOP_SHIFT    19
1253
1254 #define PERF_MEM_SNOOPX_FWD     0x01 /* forward */
1255 /* 1 free */
1256 #define PERF_MEM_SNOOPX_SHIFT  38
1257
1258 /* locked instruction */
1259 #define PERF_MEM_LOCK_NA        0x01 /* not available */
1260 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
1261 #define PERF_MEM_LOCK_SHIFT     24
1262
1263 /* TLB access */
1264 #define PERF_MEM_TLB_NA         0x01 /* not available */
1265 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
1266 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
1267 #define PERF_MEM_TLB_L1         0x08 /* L1 */
1268 #define PERF_MEM_TLB_L2         0x10 /* L2 */
1269 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
1270 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
1271 #define PERF_MEM_TLB_SHIFT      26
1272
1273 /* Access blocked */
1274 #define PERF_MEM_BLK_NA         0x01 /* not available */
1275 #define PERF_MEM_BLK_DATA       0x02 /* data could not be forwarded */
1276 #define PERF_MEM_BLK_ADDR       0x04 /* address conflict */
1277 #define PERF_MEM_BLK_SHIFT      40
1278
1279 #define PERF_MEM_S(a, s) \
1280         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
1281
1282 /*
1283  * single taken branch record layout:
1284  *
1285  *      from: source instruction (may not always be a branch insn)
1286  *        to: branch target
1287  *   mispred: branch target was mispredicted
1288  * predicted: branch target was predicted
1289  *
1290  * support for mispred, predicted is optional. In case it
1291  * is not supported mispred = predicted = 0.
1292  *
1293  *     in_tx: running in a hardware transaction
1294  *     abort: aborting a hardware transaction
1295  *    cycles: cycles from last branch (or 0 if not supported)
1296  *      type: branch type
1297  */
1298 struct perf_branch_entry {
1299         __u64   from;
1300         __u64   to;
1301         __u64   mispred:1,  /* target mispredicted */
1302                 predicted:1,/* target predicted */
1303                 in_tx:1,    /* in transaction */
1304                 abort:1,    /* transaction abort */
1305                 cycles:16,  /* cycle count to last branch */
1306                 type:4,     /* branch type */
1307                 reserved:40;
1308 };
1309
1310 union perf_sample_weight {
1311         __u64           full;
1312 #if defined(__LITTLE_ENDIAN_BITFIELD)
1313         struct {
1314                 __u32   var1_dw;
1315                 __u16   var2_w;
1316                 __u16   var3_w;
1317         };
1318 #elif defined(__BIG_ENDIAN_BITFIELD)
1319         struct {
1320                 __u16   var3_w;
1321                 __u16   var2_w;
1322                 __u32   var1_dw;
1323         };
1324 #else
1325 #error "Unknown endianness"
1326 #endif
1327 };
1328
1329 #endif /* _UAPI_LINUX_PERF_EVENT_H */