Merge tag 'iommu-updates-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-microblaze.git] / include / linux / mfd / rn5t618.h
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * MFD core driver for Ricoh RN5T618 PMIC
4  *
5  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
6  */
7
8 #ifndef __LINUX_MFD_RN5T618_H
9 #define __LINUX_MFD_RN5T618_H
10
11 #include <linux/regmap.h>
12
13 #define RN5T618_LSIVER                  0x00
14 #define RN5T618_OTPVER                  0x01
15 #define RN5T618_IODAC                   0x02
16 #define RN5T618_VINDAC                  0x03
17 #define RN5T618_OUT32KEN                0x05
18 #define RN5T618_CPUCNT                  0x06
19 #define RN5T618_PSWR                    0x07
20 #define RN5T618_PONHIS                  0x09
21 #define RN5T618_POFFHIS                 0x0a
22 #define RN5T618_WATCHDOG                0x0b
23 #define RN5T618_WATCHDOGCNT             0x0c
24 #define RN5T618_PWRFUNC                 0x0d
25 #define RN5T618_SLPCNT                  0x0e
26 #define RN5T618_REPCNT                  0x0f
27 #define RN5T618_PWRONTIMSET             0x10
28 #define RN5T618_NOETIMSETCNT            0x11
29 #define RN5T618_PWRIREN                 0x12
30 #define RN5T618_PWRIRQ                  0x13
31 #define RN5T618_PWRMON                  0x14
32 #define RN5T618_PWRIRSEL                0x15
33 #define RN5T618_DC1_SLOT                0x16
34 #define RN5T618_DC2_SLOT                0x17
35 #define RN5T618_DC3_SLOT                0x18
36 #define RN5T618_DC4_SLOT                0x19
37 #define RN5T618_LDO1_SLOT               0x1b
38 #define RN5T618_LDO2_SLOT               0x1c
39 #define RN5T618_LDO3_SLOT               0x1d
40 #define RN5T618_LDO4_SLOT               0x1e
41 #define RN5T618_LDO5_SLOT               0x1f
42 #define RN5T618_PSO0_SLOT               0x25
43 #define RN5T618_PSO1_SLOT               0x26
44 #define RN5T618_PSO2_SLOT               0x27
45 #define RN5T618_PSO3_SLOT               0x28
46 #define RN5T618_LDORTC1_SLOT            0x2a
47 #define RN5T618_DC1CTL                  0x2c
48 #define RN5T618_DC1CTL2                 0x2d
49 #define RN5T618_DC2CTL                  0x2e
50 #define RN5T618_DC2CTL2                 0x2f
51 #define RN5T618_DC3CTL                  0x30
52 #define RN5T618_DC3CTL2                 0x31
53 #define RN5T618_DC4CTL                  0x32
54 #define RN5T618_DC4CTL2                 0x33
55 #define RN5T618_DC5CTL                  0x34
56 #define RN5T618_DC5CTL2                 0x35
57 #define RN5T618_DC1DAC                  0x36
58 #define RN5T618_DC2DAC                  0x37
59 #define RN5T618_DC3DAC                  0x38
60 #define RN5T618_DC4DAC                  0x39
61 #define RN5T618_DC5DAC                  0x3a
62 #define RN5T618_DC1DAC_SLP              0x3b
63 #define RN5T618_DC2DAC_SLP              0x3c
64 #define RN5T618_DC3DAC_SLP              0x3d
65 #define RN5T618_DC4DAC_SLP              0x3e
66 #define RN5T618_DCIREN                  0x40
67 #define RN5T618_DCIRQ                   0x41
68 #define RN5T618_DCIRMON                 0x42
69 #define RN5T618_LDOEN1                  0x44
70 #define RN5T618_LDOEN2                  0x45
71 #define RN5T618_LDODIS                  0x46
72 #define RN5T618_LDO1DAC                 0x4c
73 #define RN5T618_LDO2DAC                 0x4d
74 #define RN5T618_LDO3DAC                 0x4e
75 #define RN5T618_LDO4DAC                 0x4f
76 #define RN5T618_LDO5DAC                 0x50
77 #define RN5T618_LDO6DAC                 0x51
78 #define RN5T618_LDO7DAC                 0x52
79 #define RN5T618_LDO8DAC                 0x53
80 #define RN5T618_LDO9DAC                 0x54
81 #define RN5T618_LDO10DAC                0x55
82 #define RN5T618_LDORTCDAC               0x56
83 #define RN5T618_LDORTC2DAC              0x57
84 #define RN5T618_LDO1DAC_SLP             0x58
85 #define RN5T618_LDO2DAC_SLP             0x59
86 #define RN5T618_LDO3DAC_SLP             0x5a
87 #define RN5T618_LDO4DAC_SLP             0x5b
88 #define RN5T618_LDO5DAC_SLP             0x5c
89 #define RN5T618_ADCCNT1                 0x64
90 #define RN5T618_ADCCNT2                 0x65
91 #define RN5T618_ADCCNT3                 0x66
92 #define RN5T618_ILIMDATAH               0x68
93 #define RN5T618_ILIMDATAL               0x69
94 #define RN5T618_VBATDATAH               0x6a
95 #define RN5T618_VBATDATAL               0x6b
96 #define RN5T618_VADPDATAH               0x6c
97 #define RN5T618_VADPDATAL               0x6d
98 #define RN5T618_VUSBDATAH               0x6e
99 #define RN5T618_VUSBDATAL               0x6f
100 #define RN5T618_VSYSDATAH               0x70
101 #define RN5T618_VSYSDATAL               0x71
102 #define RN5T618_VTHMDATAH               0x72
103 #define RN5T618_VTHMDATAL               0x73
104 #define RN5T618_AIN1DATAH               0x74
105 #define RN5T618_AIN1DATAL               0x75
106 #define RN5T618_AIN0DATAH               0x76
107 #define RN5T618_AIN0DATAL               0x77
108 #define RN5T618_ILIMTHL                 0x78
109 #define RN5T618_ILIMTHH                 0x79
110 #define RN5T618_VBATTHL                 0x7a
111 #define RN5T618_VBATTHH                 0x7b
112 #define RN5T618_VADPTHL                 0x7c
113 #define RN5T618_VADPTHH                 0x7d
114 #define RN5T618_VUSBTHL                 0x7e
115 #define RN5T618_VUSBTHH                 0x7f
116 #define RN5T618_VSYSTHL                 0x80
117 #define RN5T618_VSYSTHH                 0x81
118 #define RN5T618_VTHMTHL                 0x82
119 #define RN5T618_VTHMTHH                 0x83
120 #define RN5T618_AIN1THL                 0x84
121 #define RN5T618_AIN1THH                 0x85
122 #define RN5T618_AIN0THL                 0x86
123 #define RN5T618_AIN0THH                 0x87
124 #define RN5T618_EN_ADCIR1               0x88
125 #define RN5T618_EN_ADCIR2               0x89
126 #define RN5T618_EN_ADCIR3               0x8a
127 #define RN5T618_IR_ADC1                 0x8c
128 #define RN5T618_IR_ADC2                 0x8d
129 #define RN5T618_IR_ADC3                 0x8e
130 #define RN5T618_IOSEL                   0x90
131 #define RN5T618_IOOUT                   0x91
132 #define RN5T618_GPEDGE1                 0x92
133 #define RN5T618_GPEDGE2                 0x93
134 #define RN5T618_EN_GPIR                 0x94
135 #define RN5T618_IR_GPR                  0x95
136 #define RN5T618_IR_GPF                  0x96
137 #define RN5T618_MON_IOIN                0x97
138 #define RN5T618_GPLED_FUNC              0x98
139 #define RN5T618_INTPOL                  0x9c
140 #define RN5T618_INTEN                   0x9d
141 #define RN5T618_INTMON                  0x9e
142
143 #define RN5T618_RTC_SECONDS     0xA0
144 #define RN5T618_RTC_MDAY        0xA4
145 #define RN5T618_RTC_MONTH       0xA5
146 #define RN5T618_RTC_YEAR        0xA6
147 #define RN5T618_RTC_ADJUST      0xA7
148 #define RN5T618_RTC_ALARM_Y_SEC 0xA8
149 #define RN5T618_RTC_DAL_MONTH   0xAC
150 #define RN5T618_RTC_CTRL1       0xAE
151 #define RN5T618_RTC_CTRL2       0xAF
152
153 #define RN5T618_PREVINDAC               0xb0
154 #define RN5T618_BATDAC                  0xb1
155 #define RN5T618_CHGCTL1                 0xb3
156 #define RN5T618_CHGCTL2                 0xb4
157 #define RN5T618_VSYSSET                 0xb5
158 #define RN5T618_REGISET1                0xb6
159 #define RN5T618_REGISET2                0xb7
160 #define RN5T618_CHGISET                 0xb8
161 #define RN5T618_TIMSET                  0xb9
162 #define RN5T618_BATSET1                 0xba
163 #define RN5T618_BATSET2                 0xbb
164 #define RN5T618_DIESET                  0xbc
165 #define RN5T618_CHGSTATE                0xbd
166 #define RN5T618_CHGCTRL_IRFMASK         0xbe
167 #define RN5T618_CHGSTAT_IRFMASK1        0xbf
168 #define RN5T618_CHGSTAT_IRFMASK2        0xc0
169 #define RN5T618_CHGERR_IRFMASK          0xc1
170 #define RN5T618_CHGCTRL_IRR             0xc2
171 #define RN5T618_CHGSTAT_IRR1            0xc3
172 #define RN5T618_CHGSTAT_IRR2            0xc4
173 #define RN5T618_CHGERR_IRR              0xc5
174 #define RN5T618_CHGCTRL_MONI            0xc6
175 #define RN5T618_CHGSTAT_MONI1           0xc7
176 #define RN5T618_CHGSTAT_MONI2           0xc8
177 #define RN5T618_CHGERR_MONI             0xc9
178 #define RN5T618_CHGCTRL_DETMOD1         0xca
179 #define RN5T618_CHGCTRL_DETMOD2         0xcb
180 #define RN5T618_CHGSTAT_DETMOD1         0xcc
181 #define RN5T618_CHGSTAT_DETMOD2         0xcd
182 #define RN5T618_CHGSTAT_DETMOD3         0xce
183 #define RN5T618_CHGERR_DETMOD1          0xcf
184 #define RN5T618_CHGERR_DETMOD2          0xd0
185 #define RN5T618_CHGOSCCTL               0xd4
186 #define RN5T618_CHGOSCSCORESET1         0xd5
187 #define RN5T618_CHGOSCSCORESET2         0xd6
188 #define RN5T618_CHGOSCSCORESET3         0xd7
189 #define RN5T618_CHGOSCFREQSET1          0xd8
190 #define RN5T618_CHGOSCFREQSET2          0xd9
191 #define RN5T618_GCHGDET                 0xda
192 #define RN5T618_CONTROL                 0xe0
193 #define RN5T618_SOC                     0xe1
194 #define RN5T618_RE_CAP_H                0xe2
195 #define RN5T618_RE_CAP_L                0xe3
196 #define RN5T618_FA_CAP_H                0xe4
197 #define RN5T618_FA_CAP_L                0xe5
198 #define RN5T618_AGE                     0xe6
199 #define RN5T618_TT_EMPTY_H              0xe7
200 #define RN5T618_TT_EMPTY_L              0xe8
201 #define RN5T618_TT_FULL_H               0xe9
202 #define RN5T618_TT_FULL_L               0xea
203 #define RN5T618_VOLTAGE_1               0xeb
204 #define RN5T618_VOLTAGE_0               0xec
205 #define RN5T618_TEMP_1                  0xed
206 #define RN5T618_TEMP_0                  0xee
207 #define RN5T618_CC_CTRL                 0xef
208 #define RN5T618_CC_COUNT2               0xf0
209 #define RN5T618_CC_COUNT1               0xf1
210 #define RN5T618_CC_COUNT0               0xf2
211 #define RN5T618_CC_SUMREG3              0xf3
212 #define RN5T618_CC_SUMREG2              0xf4
213 #define RN5T618_CC_SUMREG1              0xf5
214 #define RN5T618_CC_SUMREG0              0xf6
215 #define RN5T618_CC_OFFREG1              0xf7
216 #define RN5T618_CC_OFFREG0              0xf8
217 #define RN5T618_CC_GAINREG1             0xf9
218 #define RN5T618_CC_GAINREG0             0xfa
219 #define RN5T618_CC_AVEREG1              0xfb
220 #define RN5T618_CC_AVEREG0              0xfc
221 #define RN5T618_MAX_REG                 0xfc
222
223 #define RN5T618_REPCNT_REPWRON          BIT(0)
224 #define RN5T618_SLPCNT_SWPWROFF         BIT(0)
225 #define RN5T618_WATCHDOG_WDOGEN         BIT(2)
226 #define RN5T618_WATCHDOG_WDOGTIM_M      (BIT(0) | BIT(1))
227 #define RN5T618_WATCHDOG_WDOGTIM_S      0
228 #define RN5T618_PWRIRQ_IR_WDOG          BIT(6)
229
230 enum {
231         RN5T618_DCDC1,
232         RN5T618_DCDC2,
233         RN5T618_DCDC3,
234         RN5T618_DCDC4,
235         RN5T618_DCDC5,
236         RN5T618_LDO1,
237         RN5T618_LDO2,
238         RN5T618_LDO3,
239         RN5T618_LDO4,
240         RN5T618_LDO5,
241         RN5T618_LDO6,
242         RN5T618_LDO7,
243         RN5T618_LDO8,
244         RN5T618_LDO9,
245         RN5T618_LDO10,
246         RN5T618_LDORTC1,
247         RN5T618_LDORTC2,
248         RN5T618_REG_NUM,
249 };
250
251 enum {
252         RN5T567 = 0,
253         RN5T618,
254         RC5T619,
255 };
256
257 /* RN5T618 IRQ definitions */
258 enum {
259         RN5T618_IRQ_SYS = 0,
260         RN5T618_IRQ_DCDC,
261         RN5T618_IRQ_RTC,
262         RN5T618_IRQ_ADC,
263         RN5T618_IRQ_GPIO,
264         RN5T618_IRQ_CHG,
265         RN5T618_NR_IRQS,
266 };
267
268 struct rn5t618 {
269         struct regmap *regmap;
270         struct device *dev;
271         long variant;
272
273         int irq;
274         struct regmap_irq_chip_data *irq_data;
275 };
276
277 #endif /* __LINUX_MFD_RN5T618_H */