1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
4 #include <linux/bits.h>
6 #include <linux/delay.h>
7 #include <linux/interrupt.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/watchdog.h>
14 #include <linux/of_device.h>
24 #define QCOM_WDT_ENABLE BIT(0)
25 #define QCOM_WDT_ENABLE_IRQ BIT(1)
27 static const u32 reg_offset_data_apcs_tmr[] = {
31 [WDT_BARK_TIME] = 0x4C,
32 [WDT_BITE_TIME] = 0x5C,
35 static const u32 reg_offset_data_kpss[] = {
39 [WDT_BARK_TIME] = 0x10,
40 [WDT_BITE_TIME] = 0x14,
43 struct qcom_wdt_match_data {
49 struct watchdog_device wdd;
55 static void __iomem *wdt_addr(struct qcom_wdt *wdt, enum wdt_reg reg)
57 return wdt->base + wdt->layout[reg];
61 struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd)
63 return container_of(wdd, struct qcom_wdt, wdd);
66 static inline int qcom_get_enable(struct watchdog_device *wdd)
68 int enable = QCOM_WDT_ENABLE;
71 enable |= QCOM_WDT_ENABLE_IRQ;
76 static irqreturn_t qcom_wdt_isr(int irq, void *arg)
78 struct watchdog_device *wdd = arg;
80 watchdog_notify_pretimeout(wdd);
85 static int qcom_wdt_start(struct watchdog_device *wdd)
87 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
88 unsigned int bark = wdd->timeout - wdd->pretimeout;
90 writel(0, wdt_addr(wdt, WDT_EN));
91 writel(1, wdt_addr(wdt, WDT_RST));
92 writel(bark * wdt->rate, wdt_addr(wdt, WDT_BARK_TIME));
93 writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME));
94 writel(qcom_get_enable(wdd), wdt_addr(wdt, WDT_EN));
98 static int qcom_wdt_stop(struct watchdog_device *wdd)
100 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
102 writel(0, wdt_addr(wdt, WDT_EN));
106 static int qcom_wdt_ping(struct watchdog_device *wdd)
108 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
110 writel(1, wdt_addr(wdt, WDT_RST));
114 static int qcom_wdt_set_timeout(struct watchdog_device *wdd,
115 unsigned int timeout)
117 wdd->timeout = timeout;
118 return qcom_wdt_start(wdd);
121 static int qcom_wdt_set_pretimeout(struct watchdog_device *wdd,
122 unsigned int timeout)
124 wdd->pretimeout = timeout;
125 return qcom_wdt_start(wdd);
128 static int qcom_wdt_restart(struct watchdog_device *wdd, unsigned long action,
131 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
135 * Trigger watchdog bite:
136 * Setup BITE_TIME to be 128ms, and enable WDT.
138 timeout = 128 * wdt->rate / 1000;
140 writel(0, wdt_addr(wdt, WDT_EN));
141 writel(1, wdt_addr(wdt, WDT_RST));
142 writel(timeout, wdt_addr(wdt, WDT_BARK_TIME));
143 writel(timeout, wdt_addr(wdt, WDT_BITE_TIME));
144 writel(QCOM_WDT_ENABLE, wdt_addr(wdt, WDT_EN));
147 * Actually make sure the above sequence hits hardware before sleeping.
155 static int qcom_wdt_is_running(struct watchdog_device *wdd)
157 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
159 return (readl(wdt_addr(wdt, WDT_EN)) & QCOM_WDT_ENABLE);
162 static const struct watchdog_ops qcom_wdt_ops = {
163 .start = qcom_wdt_start,
164 .stop = qcom_wdt_stop,
165 .ping = qcom_wdt_ping,
166 .set_timeout = qcom_wdt_set_timeout,
167 .set_pretimeout = qcom_wdt_set_pretimeout,
168 .restart = qcom_wdt_restart,
169 .owner = THIS_MODULE,
172 static const struct watchdog_info qcom_wdt_info = {
173 .options = WDIOF_KEEPALIVEPING
177 .identity = KBUILD_MODNAME,
180 static const struct watchdog_info qcom_wdt_pt_info = {
181 .options = WDIOF_KEEPALIVEPING
186 .identity = KBUILD_MODNAME,
189 static void qcom_clk_disable_unprepare(void *data)
191 clk_disable_unprepare(data);
194 static const struct qcom_wdt_match_data match_data_apcs_tmr = {
195 .offset = reg_offset_data_apcs_tmr,
199 static const struct qcom_wdt_match_data match_data_kpss = {
200 .offset = reg_offset_data_kpss,
204 static int qcom_wdt_probe(struct platform_device *pdev)
206 struct device *dev = &pdev->dev;
207 struct qcom_wdt *wdt;
208 struct resource *res;
209 struct device_node *np = dev->of_node;
210 const struct qcom_wdt_match_data *data;
215 data = of_device_get_match_data(dev);
217 dev_err(dev, "Unsupported QCOM WDT module\n");
221 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
229 /* We use CPU0's DGT for the watchdog */
230 if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
233 res->start += percpu_offset;
234 res->end += percpu_offset;
236 wdt->base = devm_ioremap_resource(dev, res);
237 if (IS_ERR(wdt->base))
238 return PTR_ERR(wdt->base);
240 clk = devm_clk_get(dev, NULL);
242 dev_err(dev, "failed to get input clock\n");
246 ret = clk_prepare_enable(clk);
248 dev_err(dev, "failed to setup clock\n");
251 ret = devm_add_action_or_reset(dev, qcom_clk_disable_unprepare, clk);
256 * We use the clock rate to calculate the max timeout, so ensure it's
257 * not zero to avoid a divide-by-zero exception.
259 * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such
260 * that it would bite before a second elapses it's usefulness is
261 * limited. Bail if this is the case.
263 wdt->rate = clk_get_rate(clk);
264 if (wdt->rate == 0 ||
265 wdt->rate > 0x10000000U) {
266 dev_err(dev, "invalid clock rate\n");
270 /* check if there is pretimeout support */
271 irq = platform_get_irq_optional(pdev, 0);
272 if (data->pretimeout && irq > 0) {
273 ret = devm_request_irq(dev, irq, qcom_wdt_isr, 0,
274 "wdt_bark", &wdt->wdd);
278 wdt->wdd.info = &qcom_wdt_pt_info;
279 wdt->wdd.pretimeout = 1;
281 if (irq == -EPROBE_DEFER)
282 return -EPROBE_DEFER;
284 wdt->wdd.info = &qcom_wdt_info;
287 wdt->wdd.ops = &qcom_wdt_ops;
288 wdt->wdd.min_timeout = 1;
289 wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
290 wdt->wdd.parent = dev;
291 wdt->layout = data->offset;
293 if (readl(wdt_addr(wdt, WDT_STS)) & 1)
294 wdt->wdd.bootstatus = WDIOF_CARDRESET;
297 * If 'timeout-sec' unspecified in devicetree, assume a 30 second
298 * default, unless the max timeout is less than 30 seconds, then use
301 wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
302 watchdog_init_timeout(&wdt->wdd, 0, dev);
305 * If WDT is already running, call WDT start which
306 * will stop the WDT, set timeouts as bootloader
307 * might use different ones and set running bit
308 * to inform the WDT subsystem to ping the WDT
310 if (qcom_wdt_is_running(&wdt->wdd)) {
311 qcom_wdt_start(&wdt->wdd);
312 set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
315 ret = devm_watchdog_register_device(dev, &wdt->wdd);
319 platform_set_drvdata(pdev, wdt);
323 static int __maybe_unused qcom_wdt_suspend(struct device *dev)
325 struct qcom_wdt *wdt = dev_get_drvdata(dev);
327 if (watchdog_active(&wdt->wdd))
328 qcom_wdt_stop(&wdt->wdd);
333 static int __maybe_unused qcom_wdt_resume(struct device *dev)
335 struct qcom_wdt *wdt = dev_get_drvdata(dev);
337 if (watchdog_active(&wdt->wdd))
338 qcom_wdt_start(&wdt->wdd);
343 static SIMPLE_DEV_PM_OPS(qcom_wdt_pm_ops, qcom_wdt_suspend, qcom_wdt_resume);
345 static const struct of_device_id qcom_wdt_of_table[] = {
346 { .compatible = "qcom,kpss-timer", .data = &match_data_apcs_tmr },
347 { .compatible = "qcom,scss-timer", .data = &match_data_apcs_tmr },
348 { .compatible = "qcom,kpss-wdt", .data = &match_data_kpss },
351 MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
353 static struct platform_driver qcom_watchdog_driver = {
354 .probe = qcom_wdt_probe,
356 .name = KBUILD_MODNAME,
357 .of_match_table = qcom_wdt_of_table,
358 .pm = &qcom_wdt_pm_ops,
361 module_platform_driver(qcom_watchdog_driver);
363 MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver");
364 MODULE_LICENSE("GPL v2");