drivers/usb/gadget/udc/atmel_usba_udc.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Driver for the Atmel USBA high speed USB device controller
   4  *
   5  * Copyright (C) 2005-2007 Atmel Corporation
   6  */
   7 #include <linux/clk.h>
   8 #include <linux/clk/at91_pmc.h>
   9 #include <linux/module.h>
  10 #include <linux/init.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/io.h>
  13 #include <linux/slab.h>
  14 #include <linux/device.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/list.h>
  17 #include <linux/mfd/syscon.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regmap.h>
  20 #include <linux/ctype.h>
  21 #include <linux/usb.h>
  22 #include <linux/usb/ch9.h>
  23 #include <linux/usb/gadget.h>
  24 #include <linux/delay.h>
  25 #include <linux/of.h>
  26 #include <linux/irq.h>
  27 #include <linux/gpio/consumer.h>
  28
  29 #include "atmel_usba_udc.h"
  30 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
  31                            | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
  32
  33 #ifdef CONFIG_USB_GADGET_DEBUG_FS
  34 #include <linux/debugfs.h>
  35 #include <linux/uaccess.h>
  36
  37 static int queue_dbg_open(struct inode *inode, struct file *file)
  38 {
  39         struct usba_ep *ep = inode->i_private;
  40         struct usba_request *req, *req_copy;
  41         struct list_head *queue_data;
  42
  43         queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
  44         if (!queue_data)
  45                 return -ENOMEM;
  46         INIT_LIST_HEAD(queue_data);
  47
  48         spin_lock_irq(&ep->udc->lock);
  49         list_for_each_entry(req, &ep->queue, queue) {
  50                 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
  51                 if (!req_copy)
  52                         goto fail;
  53                 list_add_tail(&req_copy->queue, queue_data);
  54         }
  55         spin_unlock_irq(&ep->udc->lock);
  56
  57         file->private_data = queue_data;
  58         return 0;
  59
  60 fail:
  61         spin_unlock_irq(&ep->udc->lock);
  62         list_for_each_entry_safe(req, req_copy, queue_data, queue) {
  63                 list_del(&req->queue);
  64                 kfree(req);
  65         }
  66         kfree(queue_data);
  67         return -ENOMEM;
  68 }
  69
  70 /*
  71  * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
  72  *
  73  * b: buffer address
  74  * l: buffer length
  75  * I/i: interrupt/no interrupt
  76  * Z/z: zero/no zero
  77  * S/s: short ok/short not ok
  78  * s: status
  79  * n: nr_packets
  80  * F/f: submitted/not submitted to FIFO
  81  * D/d: using/not using DMA
  82  * L/l: last transaction/not last transaction
  83  */
  84 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
  85                 size_t nbytes, loff_t *ppos)
  86 {
  87         struct list_head *queue = file->private_data;
  88         struct usba_request *req, *tmp_req;
  89         size_t len, remaining, actual = 0;
  90         char tmpbuf[38];
  91
  92         if (!access_ok(buf, nbytes))
  93                 return -EFAULT;
  94
  95         inode_lock(file_inode(file));
  96         list_for_each_entry_safe(req, tmp_req, queue, queue) {
  97                 len = snprintf(tmpbuf, sizeof(tmpbuf),
  98                                 "%8p %08x %c%c%c %5d %c%c%c\n",
  99                                 req->req.buf, req->req.length,
 100                                 req->req.no_interrupt ? 'i' : 'I',
 101                                 req->req.zero ? 'Z' : 'z',
 102                                 req->req.short_not_ok ? 's' : 'S',
 103                                 req->req.status,
 104                                 req->submitted ? 'F' : 'f',
 105                                 req->using_dma ? 'D' : 'd',
 106                                 req->last_transaction ? 'L' : 'l');
 107                 len = min(len, sizeof(tmpbuf));
 108                 if (len > nbytes)
 109                         break;
 110
 111                 list_del(&req->queue);
 112                 kfree(req);
 113
 114                 remaining = __copy_to_user(buf, tmpbuf, len);
 115                 actual += len - remaining;
 116                 if (remaining)
 117                         break;
 118
 119                 nbytes -= len;
 120                 buf += len;
 121         }
 122         inode_unlock(file_inode(file));
 123
 124         return actual;
 125 }
 126
 127 static int queue_dbg_release(struct inode *inode, struct file *file)
 128 {
 129         struct list_head *queue_data = file->private_data;
 130         struct usba_request *req, *tmp_req;
 131
 132         list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
 133                 list_del(&req->queue);
 134                 kfree(req);
 135         }
 136         kfree(queue_data);
 137         return 0;
 138 }
 139
 140 static int regs_dbg_open(struct inode *inode, struct file *file)
 141 {
 142         struct usba_udc *udc;
 143         unsigned int i;
 144         u32 *data;
 145         int ret = -ENOMEM;
 146
 147         inode_lock(inode);
 148         udc = inode->i_private;
 149         data = kmalloc(inode->i_size, GFP_KERNEL);
 150         if (!data)
 151                 goto out;
 152
 153         spin_lock_irq(&udc->lock);
 154         for (i = 0; i < inode->i_size / 4; i++)
 155                 data[i] = readl_relaxed(udc->regs + i * 4);
 156         spin_unlock_irq(&udc->lock);
 157
 158         file->private_data = data;
 159         ret = 0;
 160
 161 out:
 162         inode_unlock(inode);
 163
 164         return ret;
 165 }
 166
 167 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
 168                 size_t nbytes, loff_t *ppos)
 169 {
 170         struct inode *inode = file_inode(file);
 171         int ret;
 172
 173         inode_lock(inode);
 174         ret = simple_read_from_buffer(buf, nbytes, ppos,
 175                         file->private_data,
 176                         file_inode(file)->i_size);
 177         inode_unlock(inode);
 178
 179         return ret;
 180 }
 181
 182 static int regs_dbg_release(struct inode *inode, struct file *file)
 183 {
 184         kfree(file->private_data);
 185         return 0;
 186 }
 187
 188 const struct file_operations queue_dbg_fops = {
 189         .owner          = THIS_MODULE,
 190         .open           = queue_dbg_open,
 191         .llseek         = no_llseek,
 192         .read           = queue_dbg_read,
 193         .release        = queue_dbg_release,
 194 };
 195
 196 const struct file_operations regs_dbg_fops = {
 197         .owner          = THIS_MODULE,
 198         .open           = regs_dbg_open,
 199         .llseek         = generic_file_llseek,
 200         .read           = regs_dbg_read,
 201         .release        = regs_dbg_release,
 202 };
 203
 204 static void usba_ep_init_debugfs(struct usba_udc *udc,
 205                 struct usba_ep *ep)
 206 {
 207         struct dentry *ep_root;
 208
 209         ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
 210         ep->debugfs_dir = ep_root;
 211
 212         debugfs_create_file("queue", 0400, ep_root, ep, &queue_dbg_fops);
 213         if (ep->can_dma)
 214                 debugfs_create_u32("dma_status", 0400, ep_root,
 215                                    &ep->last_dma_status);
 216         if (ep_is_control(ep))
 217                 debugfs_create_u32("state", 0400, ep_root, &ep->state);
 218 }
 219
 220 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 221 {
 222         debugfs_remove_recursive(ep->debugfs_dir);
 223 }
 224
 225 static void usba_init_debugfs(struct usba_udc *udc)
 226 {
 227         struct dentry *root;
 228         struct resource *regs_resource;
 229
 230         root = debugfs_create_dir(udc->gadget.name, usb_debug_root);
 231         udc->debugfs_root = root;
 232
 233         regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
 234                                 CTRL_IOMEM_ID);
 235
 236         if (regs_resource) {
 237                 debugfs_create_file_size("regs", 0400, root, udc,
 238                                          &regs_dbg_fops,
 239                                          resource_size(regs_resource));
 240         }
 241
 242         usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
 243 }
 244
 245 static void usba_cleanup_debugfs(struct usba_udc *udc)
 246 {
 247         usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
 248         debugfs_remove_recursive(udc->debugfs_root);
 249 }
 250 #else
 251 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
 252                                          struct usba_ep *ep)
 253 {
 254
 255 }
 256
 257 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 258 {
 259
 260 }
 261
 262 static inline void usba_init_debugfs(struct usba_udc *udc)
 263 {
 264
 265 }
 266
 267 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
 268 {
 269
 270 }
 271 #endif
 272
 273 static ushort fifo_mode;
 274
 275 module_param(fifo_mode, ushort, 0x0);
 276 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
 277
 278 /* mode 0 - uses autoconfig */
 279
 280 /* mode 1 - fits in 8KB, generic max fifo configuration */
 281 static struct usba_fifo_cfg mode_1_cfg[] = {
 282 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 283 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 284 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 1, },
 285 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 1, },
 286 { .hw_ep_num = 4, .fifo_size = 1024,    .nr_banks = 1, },
 287 { .hw_ep_num = 5, .fifo_size = 1024,    .nr_banks = 1, },
 288 { .hw_ep_num = 6, .fifo_size = 1024,    .nr_banks = 1, },
 289 };
 290
 291 /* mode 2 - fits in 8KB, performance max fifo configuration */
 292 static struct usba_fifo_cfg mode_2_cfg[] = {
 293 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 294 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 3, },
 295 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 2, },
 296 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 2, },
 297 };
 298
 299 /* mode 3 - fits in 8KB, mixed fifo configuration */
 300 static struct usba_fifo_cfg mode_3_cfg[] = {
 301 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 302 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 303 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 304 { .hw_ep_num = 3, .fifo_size = 512,     .nr_banks = 2, },
 305 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 306 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 307 { .hw_ep_num = 6, .fifo_size = 512,     .nr_banks = 2, },
 308 };
 309
 310 /* mode 4 - fits in 8KB, custom fifo configuration */
 311 static struct usba_fifo_cfg mode_4_cfg[] = {
 312 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 313 { .hw_ep_num = 1, .fifo_size = 512,     .nr_banks = 2, },
 314 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 315 { .hw_ep_num = 3, .fifo_size = 8,       .nr_banks = 2, },
 316 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 317 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 318 { .hw_ep_num = 6, .fifo_size = 16,      .nr_banks = 2, },
 319 { .hw_ep_num = 7, .fifo_size = 8,       .nr_banks = 2, },
 320 { .hw_ep_num = 8, .fifo_size = 8,       .nr_banks = 2, },
 321 };
 322 /* Add additional configurations here */
 323
 324 static int usba_config_fifo_table(struct usba_udc *udc)
 325 {
 326         int n;
 327
 328         switch (fifo_mode) {
 329         default:
 330                 fifo_mode = 0;
 331                 /* fall through */
 332         case 0:
 333                 udc->fifo_cfg = NULL;
 334                 n = 0;
 335                 break;
 336         case 1:
 337                 udc->fifo_cfg = mode_1_cfg;
 338                 n = ARRAY_SIZE(mode_1_cfg);
 339                 break;
 340         case 2:
 341                 udc->fifo_cfg = mode_2_cfg;
 342                 n = ARRAY_SIZE(mode_2_cfg);
 343                 break;
 344         case 3:
 345                 udc->fifo_cfg = mode_3_cfg;
 346                 n = ARRAY_SIZE(mode_3_cfg);
 347                 break;
 348         case 4:
 349                 udc->fifo_cfg = mode_4_cfg;
 350                 n = ARRAY_SIZE(mode_4_cfg);
 351                 break;
 352         }
 353         DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
 354
 355         return n;
 356 }
 357
 358 static inline u32 usba_int_enb_get(struct usba_udc *udc)
 359 {
 360         return udc->int_enb_cache;
 361 }
 362
 363 static inline void usba_int_enb_set(struct usba_udc *udc, u32 mask)
 364 {
 365         u32 val;
 366
 367         val = udc->int_enb_cache | mask;
 368         usba_writel(udc, INT_ENB, val);
 369         udc->int_enb_cache = val;
 370 }
 371
 372 static inline void usba_int_enb_clear(struct usba_udc *udc, u32 mask)
 373 {
 374         u32 val;
 375
 376         val = udc->int_enb_cache & ~mask;
 377         usba_writel(udc, INT_ENB, val);
 378         udc->int_enb_cache = val;
 379 }
 380
 381 static int vbus_is_present(struct usba_udc *udc)
 382 {
 383         if (udc->vbus_pin)
 384                 return gpiod_get_value(udc->vbus_pin);
 385
 386         /* No Vbus detection: Assume always present */
 387         return 1;
 388 }
 389
 390 static void toggle_bias(struct usba_udc *udc, int is_on)
 391 {
 392         if (udc->errata && udc->errata->toggle_bias)
 393                 udc->errata->toggle_bias(udc, is_on);
 394 }
 395
 396 static void generate_bias_pulse(struct usba_udc *udc)
 397 {
 398         if (!udc->bias_pulse_needed)
 399                 return;
 400
 401         if (udc->errata && udc->errata->pulse_bias)
 402                 udc->errata->pulse_bias(udc);
 403
 404         udc->bias_pulse_needed = false;
 405 }
 406
 407 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
 408 {
 409         unsigned int transaction_len;
 410
 411         transaction_len = req->req.length - req->req.actual;
 412         req->last_transaction = 1;
 413         if (transaction_len > ep->ep.maxpacket) {
 414                 transaction_len = ep->ep.maxpacket;
 415                 req->last_transaction = 0;
 416         } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
 417                 req->last_transaction = 0;
 418
 419         DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
 420                 ep->ep.name, req, transaction_len,
 421                 req->last_transaction ? ", done" : "");
 422
 423         memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
 424         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 425         req->req.actual += transaction_len;
 426 }
 427
 428 static void submit_request(struct usba_ep *ep, struct usba_request *req)
 429 {
 430         DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
 431                 ep->ep.name, req, req->req.length);
 432
 433         req->req.actual = 0;
 434         req->submitted = 1;
 435
 436         if (req->using_dma) {
 437                 if (req->req.length == 0) {
 438                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 439                         return;
 440                 }
 441
 442                 if (req->req.zero)
 443                         usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
 444                 else
 445                         usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
 446
 447                 usba_dma_writel(ep, ADDRESS, req->req.dma);
 448                 usba_dma_writel(ep, CONTROL, req->ctrl);
 449         } else {
 450                 next_fifo_transaction(ep, req);
 451                 if (req->last_transaction) {
 452                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
 453                         if (ep_is_control(ep))
 454                                 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 455                 } else {
 456                         if (ep_is_control(ep))
 457                                 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
 458                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 459                 }
 460         }
 461 }
 462
 463 static void submit_next_request(struct usba_ep *ep)
 464 {
 465         struct usba_request *req;
 466
 467         if (list_empty(&ep->queue)) {
 468                 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
 469                 return;
 470         }
 471
 472         req = list_entry(ep->queue.next, struct usba_request, queue);
 473         if (!req->submitted)
 474                 submit_request(ep, req);
 475 }
 476
 477 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
 478 {
 479         ep->state = STATUS_STAGE_IN;
 480         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 481         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 482 }
 483
 484 static void receive_data(struct usba_ep *ep)
 485 {
 486         struct usba_udc *udc = ep->udc;
 487         struct usba_request *req;
 488         unsigned long status;
 489         unsigned int bytecount, nr_busy;
 490         int is_complete = 0;
 491
 492         status = usba_ep_readl(ep, STA);
 493         nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 494
 495         DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
 496
 497         while (nr_busy > 0) {
 498                 if (list_empty(&ep->queue)) {
 499                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 500                         break;
 501                 }
 502                 req = list_entry(ep->queue.next,
 503                                  struct usba_request, queue);
 504
 505                 bytecount = USBA_BFEXT(BYTE_COUNT, status);
 506
 507                 if (status & (1 << 31))
 508                         is_complete = 1;
 509                 if (req->req.actual + bytecount >= req->req.length) {
 510                         is_complete = 1;
 511                         bytecount = req->req.length - req->req.actual;
 512                 }
 513
 514                 memcpy_fromio(req->req.buf + req->req.actual,
 515                                 ep->fifo, bytecount);
 516                 req->req.actual += bytecount;
 517
 518                 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
 519
 520                 if (is_complete) {
 521                         DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
 522                         req->req.status = 0;
 523                         list_del_init(&req->queue);
 524                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 525                         spin_unlock(&udc->lock);
 526                         usb_gadget_giveback_request(&ep->ep, &req->req);
 527                         spin_lock(&udc->lock);
 528                 }
 529
 530                 status = usba_ep_readl(ep, STA);
 531                 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 532
 533                 if (is_complete && ep_is_control(ep)) {
 534                         send_status(udc, ep);
 535                         break;
 536                 }
 537         }
 538 }
 539
 540 static void
 541 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
 542 {
 543         struct usba_udc *udc = ep->udc;
 544
 545         WARN_ON(!list_empty(&req->queue));
 546
 547         if (req->req.status == -EINPROGRESS)
 548                 req->req.status = status;
 549
 550         if (req->using_dma)
 551                 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
 552
 553         DBG(DBG_GADGET | DBG_REQ,
 554                 "%s: req %p complete: status %d, actual %u\n",
 555                 ep->ep.name, req, req->req.status, req->req.actual);
 556
 557         spin_unlock(&udc->lock);
 558         usb_gadget_giveback_request(&ep->ep, &req->req);
 559         spin_lock(&udc->lock);
 560 }
 561
 562 static void
 563 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
 564 {
 565         struct usba_request *req, *tmp_req;
 566
 567         list_for_each_entry_safe(req, tmp_req, list, queue) {
 568                 list_del_init(&req->queue);
 569                 request_complete(ep, req, status);
 570         }
 571 }
 572
 573 static int
 574 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
 575 {
 576         struct usba_ep *ep = to_usba_ep(_ep);
 577         struct usba_udc *udc = ep->udc;
 578         unsigned long flags, maxpacket;
 579         unsigned int nr_trans;
 580
 581         DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
 582
 583         maxpacket = usb_endpoint_maxp(desc);
 584
 585         if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
 586                         || ep->index == 0
 587                         || desc->bDescriptorType != USB_DT_ENDPOINT
 588                         || maxpacket == 0
 589                         || maxpacket > ep->fifo_size) {
 590                 DBG(DBG_ERR, "ep_enable: Invalid argument");
 591                 return -EINVAL;
 592         }
 593
 594         ep->is_isoc = 0;
 595         ep->is_in = 0;
 596
 597         DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
 598                         ep->ep.name, ep->ept_cfg, maxpacket);
 599
 600         if (usb_endpoint_dir_in(desc)) {
 601                 ep->is_in = 1;
 602                 ep->ept_cfg |= USBA_EPT_DIR_IN;
 603         }
 604
 605         switch (usb_endpoint_type(desc)) {
 606         case USB_ENDPOINT_XFER_CONTROL:
 607                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
 608                 break;
 609         case USB_ENDPOINT_XFER_ISOC:
 610                 if (!ep->can_isoc) {
 611                         DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
 612                                         ep->ep.name);
 613                         return -EINVAL;
 614                 }
 615
 616                 /*
 617                  * Bits 11:12 specify number of _additional_
 618                  * transactions per microframe.
 619                  */
 620                 nr_trans = usb_endpoint_maxp_mult(desc);
 621                 if (nr_trans > 3)
 622                         return -EINVAL;
 623
 624                 ep->is_isoc = 1;
 625                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
 626                 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
 627
 628                 break;
 629         case USB_ENDPOINT_XFER_BULK:
 630                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
 631                 break;
 632         case USB_ENDPOINT_XFER_INT:
 633                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
 634                 break;
 635         }
 636
 637         spin_lock_irqsave(&ep->udc->lock, flags);
 638
 639         ep->ep.desc = desc;
 640         ep->ep.maxpacket = maxpacket;
 641
 642         usba_ep_writel(ep, CFG, ep->ept_cfg);
 643         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
 644
 645         if (ep->can_dma) {
 646                 u32 ctrl;
 647
 648                 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1 << ep->index) |
 649                                       USBA_BF(DMA_INT, 1 << ep->index));
 650                 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
 651                 usba_ep_writel(ep, CTL_ENB, ctrl);
 652         } else {
 653                 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1 << ep->index));
 654         }
 655
 656         spin_unlock_irqrestore(&udc->lock, flags);
 657
 658         DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
 659                         (unsigned long)usba_ep_readl(ep, CFG));
 660         DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
 661                         (unsigned long)usba_int_enb_get(udc));
 662
 663         return 0;
 664 }
 665
 666 static int usba_ep_disable(struct usb_ep *_ep)
 667 {
 668         struct usba_ep *ep = to_usba_ep(_ep);
 669         struct usba_udc *udc = ep->udc;
 670         LIST_HEAD(req_list);
 671         unsigned long flags;
 672
 673         DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
 674
 675         spin_lock_irqsave(&udc->lock, flags);
 676
 677         if (!ep->ep.desc) {
 678                 spin_unlock_irqrestore(&udc->lock, flags);
 679                 /* REVISIT because this driver disables endpoints in
 680                  * reset_all_endpoints() before calling disconnect(),
 681                  * most gadget drivers would trigger this non-error ...
 682                  */
 683                 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
 684                         DBG(DBG_ERR, "ep_disable: %s not enabled\n",
 685                                         ep->ep.name);
 686                 return -EINVAL;
 687         }
 688         ep->ep.desc = NULL;
 689
 690         list_splice_init(&ep->queue, &req_list);
 691         if (ep->can_dma) {
 692                 usba_dma_writel(ep, CONTROL, 0);
 693                 usba_dma_writel(ep, ADDRESS, 0);
 694                 usba_dma_readl(ep, STATUS);
 695         }
 696         usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
 697         usba_int_enb_clear(udc, USBA_BF(EPT_INT, 1 << ep->index));
 698
 699         request_complete_list(ep, &req_list, -ESHUTDOWN);
 700
 701         spin_unlock_irqrestore(&udc->lock, flags);
 702
 703         return 0;
 704 }
 705
 706 static struct usb_request *
 707 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 708 {
 709         struct usba_request *req;
 710
 711         DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
 712
 713         req = kzalloc(sizeof(*req), gfp_flags);
 714         if (!req)
 715                 return NULL;
 716
 717         INIT_LIST_HEAD(&req->queue);
 718
 719         return &req->req;
 720 }
 721
 722 static void
 723 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 724 {
 725         struct usba_request *req = to_usba_req(_req);
 726
 727         DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
 728
 729         kfree(req);
 730 }
 731
 732 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
 733                 struct usba_request *req, gfp_t gfp_flags)
 734 {
 735         unsigned long flags;
 736         int ret;
 737
 738         DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
 739                 ep->ep.name, req->req.length, &req->req.dma,
 740                 req->req.zero ? 'Z' : 'z',
 741                 req->req.short_not_ok ? 'S' : 's',
 742                 req->req.no_interrupt ? 'I' : 'i');
 743
 744         if (req->req.length > 0x10000) {
 745                 /* Lengths from 0 to 65536 (inclusive) are supported */
 746                 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
 747                 return -EINVAL;
 748         }
 749
 750         ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
 751         if (ret)
 752                 return ret;
 753
 754         req->using_dma = 1;
 755         req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
 756                         | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
 757                         | USBA_DMA_END_BUF_EN;
 758
 759         if (!ep->is_in)
 760                 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
 761
 762         /*
 763          * Add this request to the queue and submit for DMA if
 764          * possible. Check if we're still alive first -- we may have
 765          * received a reset since last time we checked.
 766          */
 767         ret = -ESHUTDOWN;
 768         spin_lock_irqsave(&udc->lock, flags);
 769         if (ep->ep.desc) {
 770                 if (list_empty(&ep->queue))
 771                         submit_request(ep, req);
 772
 773                 list_add_tail(&req->queue, &ep->queue);
 774                 ret = 0;
 775         }
 776         spin_unlock_irqrestore(&udc->lock, flags);
 777
 778         return ret;
 779 }
 780
 781 static int
 782 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 783 {
 784         struct usba_request *req = to_usba_req(_req);
 785         struct usba_ep *ep = to_usba_ep(_ep);
 786         struct usba_udc *udc = ep->udc;
 787         unsigned long flags;
 788         int ret;
 789
 790         DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
 791                         ep->ep.name, req, _req->length);
 792
 793         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
 794             !ep->ep.desc)
 795                 return -ESHUTDOWN;
 796
 797         req->submitted = 0;
 798         req->using_dma = 0;
 799         req->last_transaction = 0;
 800
 801         _req->status = -EINPROGRESS;
 802         _req->actual = 0;
 803
 804         if (ep->can_dma)
 805                 return queue_dma(udc, ep, req, gfp_flags);
 806
 807         /* May have received a reset since last time we checked */
 808         ret = -ESHUTDOWN;
 809         spin_lock_irqsave(&udc->lock, flags);
 810         if (ep->ep.desc) {
 811                 list_add_tail(&req->queue, &ep->queue);
 812
 813                 if ((!ep_is_control(ep) && ep->is_in) ||
 814                         (ep_is_control(ep)
 815                                 && (ep->state == DATA_STAGE_IN
 816                                         || ep->state == STATUS_STAGE_IN)))
 817                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 818                 else
 819                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
 820                 ret = 0;
 821         }
 822         spin_unlock_irqrestore(&udc->lock, flags);
 823
 824         return ret;
 825 }
 826
 827 static void
 828 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
 829 {
 830         req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
 831 }
 832
 833 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
 834 {
 835         unsigned int timeout;
 836         u32 status;
 837
 838         /*
 839          * Stop the DMA controller. When writing both CH_EN
 840          * and LINK to 0, the other bits are not affected.
 841          */
 842         usba_dma_writel(ep, CONTROL, 0);
 843
 844         /* Wait for the FIFO to empty */
 845         for (timeout = 40; timeout; --timeout) {
 846                 status = usba_dma_readl(ep, STATUS);
 847                 if (!(status & USBA_DMA_CH_EN))
 848                         break;
 849                 udelay(1);
 850         }
 851
 852         if (pstatus)
 853                 *pstatus = status;
 854
 855         if (timeout == 0) {
 856                 dev_err(&ep->udc->pdev->dev,
 857                         "%s: timed out waiting for DMA FIFO to empty\n",
 858                         ep->ep.name);
 859                 return -ETIMEDOUT;
 860         }
 861
 862         return 0;
 863 }
 864
 865 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 866 {
 867         struct usba_ep *ep = to_usba_ep(_ep);
 868         struct usba_udc *udc = ep->udc;
 869         struct usba_request *req;
 870         unsigned long flags;
 871         u32 status;
 872
 873         DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
 874                         ep->ep.name, req);
 875
 876         spin_lock_irqsave(&udc->lock, flags);
 877
 878         list_for_each_entry(req, &ep->queue, queue) {
 879                 if (&req->req == _req)
 880                         break;
 881         }
 882
 883         if (&req->req != _req) {
 884                 spin_unlock_irqrestore(&udc->lock, flags);
 885                 return -EINVAL;
 886         }
 887
 888         if (req->using_dma) {
 889                 /*
 890                  * If this request is currently being transferred,
 891                  * stop the DMA controller and reset the FIFO.
 892                  */
 893                 if (ep->queue.next == &req->queue) {
 894                         status = usba_dma_readl(ep, STATUS);
 895                         if (status & USBA_DMA_CH_EN)
 896                                 stop_dma(ep, &status);
 897
 898 #ifdef CONFIG_USB_GADGET_DEBUG_FS
 899                         ep->last_dma_status = status;
 900 #endif
 901
 902                         usba_writel(udc, EPT_RST, 1 << ep->index);
 903
 904                         usba_update_req(ep, req, status);
 905                 }
 906         }
 907
 908         /*
 909          * Errors should stop the queue from advancing until the
 910          * completion function returns.
 911          */
 912         list_del_init(&req->queue);
 913
 914         request_complete(ep, req, -ECONNRESET);
 915
 916         /* Process the next request if any */
 917         submit_next_request(ep);
 918         spin_unlock_irqrestore(&udc->lock, flags);
 919
 920         return 0;
 921 }
 922
 923 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
 924 {
 925         struct usba_ep *ep = to_usba_ep(_ep);
 926         struct usba_udc *udc = ep->udc;
 927         unsigned long flags;
 928         int ret = 0;
 929
 930         DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
 931                         value ? "set" : "clear");
 932
 933         if (!ep->ep.desc) {
 934                 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
 935                                 ep->ep.name);
 936                 return -ENODEV;
 937         }
 938         if (ep->is_isoc) {
 939                 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
 940                                 ep->ep.name);
 941                 return -ENOTTY;
 942         }
 943
 944         spin_lock_irqsave(&udc->lock, flags);
 945
 946         /*
 947          * We can't halt IN endpoints while there are still data to be
 948          * transferred
 949          */
 950         if (!list_empty(&ep->queue)
 951                         || ((value && ep->is_in && (usba_ep_readl(ep, STA)
 952                                         & USBA_BF(BUSY_BANKS, -1L))))) {
 953                 ret = -EAGAIN;
 954         } else {
 955                 if (value)
 956                         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
 957                 else
 958                         usba_ep_writel(ep, CLR_STA,
 959                                         USBA_FORCE_STALL | USBA_TOGGLE_CLR);
 960                 usba_ep_readl(ep, STA);
 961         }
 962
 963         spin_unlock_irqrestore(&udc->lock, flags);
 964
 965         return ret;
 966 }
 967
 968 static int usba_ep_fifo_status(struct usb_ep *_ep)
 969 {
 970         struct usba_ep *ep = to_usba_ep(_ep);
 971
 972         return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
 973 }
 974
 975 static void usba_ep_fifo_flush(struct usb_ep *_ep)
 976 {
 977         struct usba_ep *ep = to_usba_ep(_ep);
 978         struct usba_udc *udc = ep->udc;
 979
 980         usba_writel(udc, EPT_RST, 1 << ep->index);
 981 }
 982
 983 static const struct usb_ep_ops usba_ep_ops = {
 984         .enable         = usba_ep_enable,
 985         .disable        = usba_ep_disable,
 986         .alloc_request  = usba_ep_alloc_request,
 987         .free_request   = usba_ep_free_request,
 988         .queue          = usba_ep_queue,
 989         .dequeue        = usba_ep_dequeue,
 990         .set_halt       = usba_ep_set_halt,
 991         .fifo_status    = usba_ep_fifo_status,
 992         .fifo_flush     = usba_ep_fifo_flush,
 993 };
 994
 995 static int usba_udc_get_frame(struct usb_gadget *gadget)
 996 {
 997         struct usba_udc *udc = to_usba_udc(gadget);
 998
 999         return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
1000 }
1001
1002 static int usba_udc_wakeup(struct usb_gadget *gadget)
1003 {
1004         struct usba_udc *udc = to_usba_udc(gadget);
1005         unsigned long flags;
1006         u32 ctrl;
1007         int ret = -EINVAL;
1008
1009         spin_lock_irqsave(&udc->lock, flags);
1010         if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1011                 ctrl = usba_readl(udc, CTRL);
1012                 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1013                 ret = 0;
1014         }
1015         spin_unlock_irqrestore(&udc->lock, flags);
1016
1017         return ret;
1018 }
1019
1020 static int
1021 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1022 {
1023         struct usba_udc *udc = to_usba_udc(gadget);
1024         unsigned long flags;
1025
1026         gadget->is_selfpowered = (is_selfpowered != 0);
1027         spin_lock_irqsave(&udc->lock, flags);
1028         if (is_selfpowered)
1029                 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1030         else
1031                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1032         spin_unlock_irqrestore(&udc->lock, flags);
1033
1034         return 0;
1035 }
1036
1037 static int atmel_usba_start(struct usb_gadget *gadget,
1038                 struct usb_gadget_driver *driver);
1039 static int atmel_usba_stop(struct usb_gadget *gadget);
1040
1041 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1042                                 struct usb_endpoint_descriptor  *desc,
1043                                 struct usb_ss_ep_comp_descriptor *ep_comp)
1044 {
1045         struct usb_ep   *_ep;
1046         struct usba_ep *ep;
1047
1048         /* Look at endpoints until an unclaimed one looks usable */
1049         list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1050                 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1051                         goto found_ep;
1052         }
1053         /* Fail */
1054         return NULL;
1055
1056 found_ep:
1057
1058         if (fifo_mode == 0) {
1059                 /* Optimize hw fifo size based on ep type and other info */
1060                 ep = to_usba_ep(_ep);
1061
1062                 switch (usb_endpoint_type(desc)) {
1063                 case USB_ENDPOINT_XFER_CONTROL:
1064                         break;
1065
1066                 case USB_ENDPOINT_XFER_ISOC:
1067                         ep->fifo_size = 1024;
1068                         ep->nr_banks = 2;
1069                         break;
1070
1071                 case USB_ENDPOINT_XFER_BULK:
1072                         ep->fifo_size = 512;
1073                         ep->nr_banks = 1;
1074                         break;
1075
1076                 case USB_ENDPOINT_XFER_INT:
1077                         if (desc->wMaxPacketSize == 0)
1078                                 ep->fifo_size =
1079                                     roundup_pow_of_two(_ep->maxpacket_limit);
1080                         else
1081                                 ep->fifo_size =
1082                                     roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1083                         ep->nr_banks = 1;
1084                         break;
1085                 }
1086
1087                 /* It might be a little bit late to set this */
1088                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1089
1090                 /* Generate ept_cfg basd on FIFO size and number of banks */
1091                 if (ep->fifo_size  <= 8)
1092                         ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1093                 else
1094                         /* LSB is bit 1, not 0 */
1095                         ep->ept_cfg =
1096                                 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1097
1098                 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1099
1100                 ep->udc->configured_ep++;
1101         }
1102
1103         return _ep;
1104 }
1105
1106 static const struct usb_gadget_ops usba_udc_ops = {
1107         .get_frame              = usba_udc_get_frame,
1108         .wakeup                 = usba_udc_wakeup,
1109         .set_selfpowered        = usba_udc_set_selfpowered,
1110         .udc_start              = atmel_usba_start,
1111         .udc_stop               = atmel_usba_stop,
1112         .match_ep               = atmel_usba_match_ep,
1113 };
1114
1115 static struct usb_endpoint_descriptor usba_ep0_desc = {
1116         .bLength = USB_DT_ENDPOINT_SIZE,
1117         .bDescriptorType = USB_DT_ENDPOINT,
1118         .bEndpointAddress = 0,
1119         .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1120         .wMaxPacketSize = cpu_to_le16(64),
1121         /* FIXME: I have no idea what to put here */
1122         .bInterval = 1,
1123 };
1124
1125 static const struct usb_gadget usba_gadget_template = {
1126         .ops            = &usba_udc_ops,
1127         .max_speed      = USB_SPEED_HIGH,
1128         .name           = "atmel_usba_udc",
1129 };
1130
1131 /*
1132  * Called with interrupts disabled and udc->lock held.
1133  */
1134 static void reset_all_endpoints(struct usba_udc *udc)
1135 {
1136         struct usba_ep *ep;
1137         struct usba_request *req, *tmp_req;
1138
1139         usba_writel(udc, EPT_RST, ~0UL);
1140
1141         ep = to_usba_ep(udc->gadget.ep0);
1142         list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1143                 list_del_init(&req->queue);
1144                 request_complete(ep, req, -ECONNRESET);
1145         }
1146 }
1147
1148 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1149 {
1150         struct usba_ep *ep;
1151
1152         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1153                 return to_usba_ep(udc->gadget.ep0);
1154
1155         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1156                 u8 bEndpointAddress;
1157
1158                 if (!ep->ep.desc)
1159                         continue;
1160                 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1161                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1162                         continue;
1163                 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1164                                 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1165                         return ep;
1166         }
1167
1168         return NULL;
1169 }
1170
1171 /* Called with interrupts disabled and udc->lock held */
1172 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1173 {
1174         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1175         ep->state = WAIT_FOR_SETUP;
1176 }
1177
1178 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1179 {
1180         if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1181                 return 1;
1182         return 0;
1183 }
1184
1185 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1186 {
1187         u32 regval;
1188
1189         DBG(DBG_BUS, "setting address %u...\n", addr);
1190         regval = usba_readl(udc, CTRL);
1191         regval = USBA_BFINS(DEV_ADDR, addr, regval);
1192         usba_writel(udc, CTRL, regval);
1193 }
1194
1195 static int do_test_mode(struct usba_udc *udc)
1196 {
1197         static const char test_packet_buffer[] = {
1198                 /* JKJKJKJK * 9 */
1199                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1200                 /* JJKKJJKK * 8 */
1201                 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1202                 /* JJKKJJKK * 8 */
1203                 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1204                 /* JJJJJJJKKKKKKK * 8 */
1205                 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1206                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1207                 /* JJJJJJJK * 8 */
1208                 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1209                 /* {JKKKKKKK * 10}, JK */
1210                 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1211         };
1212         struct usba_ep *ep;
1213         struct device *dev = &udc->pdev->dev;
1214         int test_mode;
1215
1216         test_mode = udc->test_mode;
1217
1218         /* Start from a clean slate */
1219         reset_all_endpoints(udc);
1220
1221         switch (test_mode) {
1222         case 0x0100:
1223                 /* Test_J */
1224                 usba_writel(udc, TST, USBA_TST_J_MODE);
1225                 dev_info(dev, "Entering Test_J mode...\n");
1226                 break;
1227         case 0x0200:
1228                 /* Test_K */
1229                 usba_writel(udc, TST, USBA_TST_K_MODE);
1230                 dev_info(dev, "Entering Test_K mode...\n");
1231                 break;
1232         case 0x0300:
1233                 /*
1234                  * Test_SE0_NAK: Force high-speed mode and set up ep0
1235                  * for Bulk IN transfers
1236                  */
1237                 ep = &udc->usba_ep[0];
1238                 usba_writel(udc, TST,
1239                                 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1240                 usba_ep_writel(ep, CFG,
1241                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1242                                 | USBA_EPT_DIR_IN
1243                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1244                                 | USBA_BF(BK_NUMBER, 1));
1245                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1246                         set_protocol_stall(udc, ep);
1247                         dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1248                 } else {
1249                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1250                         dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1251                 }
1252                 break;
1253         case 0x0400:
1254                 /* Test_Packet */
1255                 ep = &udc->usba_ep[0];
1256                 usba_ep_writel(ep, CFG,
1257                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1258                                 | USBA_EPT_DIR_IN
1259                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1260                                 | USBA_BF(BK_NUMBER, 1));
1261                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1262                         set_protocol_stall(udc, ep);
1263                         dev_err(dev, "Test_Packet: ep0 not mapped\n");
1264                 } else {
1265                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1266                         usba_writel(udc, TST, USBA_TST_PKT_MODE);
1267                         memcpy_toio(ep->fifo, test_packet_buffer,
1268                                         sizeof(test_packet_buffer));
1269                         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1270                         dev_info(dev, "Entering Test_Packet mode...\n");
1271                 }
1272                 break;
1273         default:
1274                 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1275                 return -EINVAL;
1276         }
1277
1278         return 0;
1279 }
1280
1281 /* Avoid overly long expressions */
1282 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1283 {
1284         if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1285                 return true;
1286         return false;
1287 }
1288
1289 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1290 {
1291         if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1292                 return true;
1293         return false;
1294 }
1295
1296 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1297 {
1298         if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1299                 return true;
1300         return false;
1301 }
1302
1303 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1304                 struct usb_ctrlrequest *crq)
1305 {
1306         int retval = 0;
1307
1308         switch (crq->bRequest) {
1309         case USB_REQ_GET_STATUS: {
1310                 u16 status;
1311
1312                 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1313                         status = cpu_to_le16(udc->devstatus);
1314                 } else if (crq->bRequestType
1315                                 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1316                         status = cpu_to_le16(0);
1317                 } else if (crq->bRequestType
1318                                 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1319                         struct usba_ep *target;
1320
1321                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1322                         if (!target)
1323                                 goto stall;
1324
1325                         status = 0;
1326                         if (is_stalled(udc, target))
1327                                 status |= cpu_to_le16(1);
1328                 } else
1329                         goto delegate;
1330
1331                 /* Write directly to the FIFO. No queueing is done. */
1332                 if (crq->wLength != cpu_to_le16(sizeof(status)))
1333                         goto stall;
1334                 ep->state = DATA_STAGE_IN;
1335                 writew_relaxed(status, ep->fifo);
1336                 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1337                 break;
1338         }
1339
1340         case USB_REQ_CLEAR_FEATURE: {
1341                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1342                         if (feature_is_dev_remote_wakeup(crq))
1343                                 udc->devstatus
1344                                         &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1345                         else
1346                                 /* Can't CLEAR_FEATURE TEST_MODE */
1347                                 goto stall;
1348                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1349                         struct usba_ep *target;
1350
1351                         if (crq->wLength != cpu_to_le16(0)
1352                                         || !feature_is_ep_halt(crq))
1353                                 goto stall;
1354                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1355                         if (!target)
1356                                 goto stall;
1357
1358                         usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1359                         if (target->index != 0)
1360                                 usba_ep_writel(target, CLR_STA,
1361                                                 USBA_TOGGLE_CLR);
1362                 } else {
1363                         goto delegate;
1364                 }
1365
1366                 send_status(udc, ep);
1367                 break;
1368         }
1369
1370         case USB_REQ_SET_FEATURE: {
1371                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1372                         if (feature_is_dev_test_mode(crq)) {
1373                                 send_status(udc, ep);
1374                                 ep->state = STATUS_STAGE_TEST;
1375                                 udc->test_mode = le16_to_cpu(crq->wIndex);
1376                                 return 0;
1377                         } else if (feature_is_dev_remote_wakeup(crq)) {
1378                                 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1379                         } else {
1380                                 goto stall;
1381                         }
1382                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1383                         struct usba_ep *target;
1384
1385                         if (crq->wLength != cpu_to_le16(0)
1386                                         || !feature_is_ep_halt(crq))
1387                                 goto stall;
1388
1389                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1390                         if (!target)
1391                                 goto stall;
1392
1393                         usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1394                 } else
1395                         goto delegate;
1396
1397                 send_status(udc, ep);
1398                 break;
1399         }
1400
1401         case USB_REQ_SET_ADDRESS:
1402                 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1403                         goto delegate;
1404
1405                 set_address(udc, le16_to_cpu(crq->wValue));
1406                 send_status(udc, ep);
1407                 ep->state = STATUS_STAGE_ADDR;
1408                 break;
1409
1410         default:
1411 delegate:
1412                 spin_unlock(&udc->lock);
1413                 retval = udc->driver->setup(&udc->gadget, crq);
1414                 spin_lock(&udc->lock);
1415         }
1416
1417         return retval;
1418
1419 stall:
1420         pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1421                 "halting endpoint...\n",
1422                 ep->ep.name, crq->bRequestType, crq->bRequest,
1423                 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1424                 le16_to_cpu(crq->wLength));
1425         set_protocol_stall(udc, ep);
1426         return -1;
1427 }
1428
1429 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1430 {
1431         struct usba_request *req;
1432         u32 epstatus;
1433         u32 epctrl;
1434
1435 restart:
1436         epstatus = usba_ep_readl(ep, STA);
1437         epctrl = usba_ep_readl(ep, CTL);
1438
1439         DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1440                         ep->ep.name, ep->state, epstatus, epctrl);
1441
1442         req = NULL;
1443         if (!list_empty(&ep->queue))
1444                 req = list_entry(ep->queue.next,
1445                                  struct usba_request, queue);
1446
1447         if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1448                 if (req->submitted)
1449                         next_fifo_transaction(ep, req);
1450                 else
1451                         submit_request(ep, req);
1452
1453                 if (req->last_transaction) {
1454                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1455                         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1456                 }
1457                 goto restart;
1458         }
1459         if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1460                 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1461
1462                 switch (ep->state) {
1463                 case DATA_STAGE_IN:
1464                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1465                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1466                         ep->state = STATUS_STAGE_OUT;
1467                         break;
1468                 case STATUS_STAGE_ADDR:
1469                         /* Activate our new address */
1470                         usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1471                                                 | USBA_FADDR_EN));
1472                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1473                         ep->state = WAIT_FOR_SETUP;
1474                         break;
1475                 case STATUS_STAGE_IN:
1476                         if (req) {
1477                                 list_del_init(&req->queue);
1478                                 request_complete(ep, req, 0);
1479                                 submit_next_request(ep);
1480                         }
1481                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1482                         ep->state = WAIT_FOR_SETUP;
1483                         break;
1484                 case STATUS_STAGE_TEST:
1485                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1486                         ep->state = WAIT_FOR_SETUP;
1487                         if (do_test_mode(udc))
1488                                 set_protocol_stall(udc, ep);
1489                         break;
1490                 default:
1491                         pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1492                                 "halting endpoint...\n",
1493                                 ep->ep.name, ep->state);
1494                         set_protocol_stall(udc, ep);
1495                         break;
1496                 }
1497
1498                 goto restart;
1499         }
1500         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1501                 switch (ep->state) {
1502                 case STATUS_STAGE_OUT:
1503                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1504                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1505
1506                         if (req) {
1507                                 list_del_init(&req->queue);
1508                                 request_complete(ep, req, 0);
1509                         }
1510                         ep->state = WAIT_FOR_SETUP;
1511                         break;
1512
1513                 case DATA_STAGE_OUT:
1514                         receive_data(ep);
1515                         break;
1516
1517                 default:
1518                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1519                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1520                         pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1521                                 "halting endpoint...\n",
1522                                 ep->ep.name, ep->state);
1523                         set_protocol_stall(udc, ep);
1524                         break;
1525                 }
1526
1527                 goto restart;
1528         }
1529         if (epstatus & USBA_RX_SETUP) {
1530                 union {
1531                         struct usb_ctrlrequest crq;
1532                         unsigned long data[2];
1533                 } crq;
1534                 unsigned int pkt_len;
1535                 int ret;
1536
1537                 if (ep->state != WAIT_FOR_SETUP) {
1538                         /*
1539                          * Didn't expect a SETUP packet at this
1540                          * point. Clean up any pending requests (which
1541                          * may be successful).
1542                          */
1543                         int status = -EPROTO;
1544
1545                         /*
1546                          * RXRDY and TXCOMP are dropped when SETUP
1547                          * packets arrive.  Just pretend we received
1548                          * the status packet.
1549                          */
1550                         if (ep->state == STATUS_STAGE_OUT
1551                                         || ep->state == STATUS_STAGE_IN) {
1552                                 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1553                                 status = 0;
1554                         }
1555
1556                         if (req) {
1557                                 list_del_init(&req->queue);
1558                                 request_complete(ep, req, status);
1559                         }
1560                 }
1561
1562                 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1563                 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1564                 if (pkt_len != sizeof(crq)) {
1565                         pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1566                                 pkt_len, sizeof(crq));
1567                         set_protocol_stall(udc, ep);
1568                         return;
1569                 }
1570
1571                 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1572                 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1573
1574                 /* Free up one bank in the FIFO so that we can
1575                  * generate or receive a reply right away. */
1576                 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1577
1578                 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1579                         ep->state, crq.crq.bRequestType,
1580                         crq.crq.bRequest); */
1581
1582                 if (crq.crq.bRequestType & USB_DIR_IN) {
1583                         /*
1584                          * The USB 2.0 spec states that "if wLength is
1585                          * zero, there is no data transfer phase."
1586                          * However, testusb #14 seems to actually
1587                          * expect a data phase even if wLength = 0...
1588                          */
1589                         ep->state = DATA_STAGE_IN;
1590                 } else {
1591                         if (crq.crq.wLength != cpu_to_le16(0))
1592                                 ep->state = DATA_STAGE_OUT;
1593                         else
1594                                 ep->state = STATUS_STAGE_IN;
1595                 }
1596
1597                 ret = -1;
1598                 if (ep->index == 0)
1599                         ret = handle_ep0_setup(udc, ep, &crq.crq);
1600                 else {
1601                         spin_unlock(&udc->lock);
1602                         ret = udc->driver->setup(&udc->gadget, &crq.crq);
1603                         spin_lock(&udc->lock);
1604                 }
1605
1606                 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1607                         crq.crq.bRequestType, crq.crq.bRequest,
1608                         le16_to_cpu(crq.crq.wLength), ep->state, ret);
1609
1610                 if (ret < 0) {
1611                         /* Let the host know that we failed */
1612                         set_protocol_stall(udc, ep);
1613                 }
1614         }
1615 }
1616
1617 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1618 {
1619         struct usba_request *req;
1620         u32 epstatus;
1621         u32 epctrl;
1622
1623         epstatus = usba_ep_readl(ep, STA);
1624         epctrl = usba_ep_readl(ep, CTL);
1625
1626         DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1627
1628         while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1629                 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1630
1631                 if (list_empty(&ep->queue)) {
1632                         dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1633                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1634                         return;
1635                 }
1636
1637                 req = list_entry(ep->queue.next, struct usba_request, queue);
1638
1639                 if (req->using_dma) {
1640                         /* Send a zero-length packet */
1641                         usba_ep_writel(ep, SET_STA,
1642                                         USBA_TX_PK_RDY);
1643                         usba_ep_writel(ep, CTL_DIS,
1644                                         USBA_TX_PK_RDY);
1645                         list_del_init(&req->queue);
1646                         submit_next_request(ep);
1647                         request_complete(ep, req, 0);
1648                 } else {
1649                         if (req->submitted)
1650                                 next_fifo_transaction(ep, req);
1651                         else
1652                                 submit_request(ep, req);
1653
1654                         if (req->last_transaction) {
1655                                 list_del_init(&req->queue);
1656                                 submit_next_request(ep);
1657                                 request_complete(ep, req, 0);
1658                         }
1659                 }
1660
1661                 epstatus = usba_ep_readl(ep, STA);
1662                 epctrl = usba_ep_readl(ep, CTL);
1663         }
1664         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1665                 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1666                 receive_data(ep);
1667         }
1668 }
1669
1670 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1671 {
1672         struct usba_request *req;
1673         u32 status, control, pending;
1674
1675         status = usba_dma_readl(ep, STATUS);
1676         control = usba_dma_readl(ep, CONTROL);
1677 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1678         ep->last_dma_status = status;
1679 #endif
1680         pending = status & control;
1681         DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1682
1683         if (status & USBA_DMA_CH_EN) {
1684                 dev_err(&udc->pdev->dev,
1685                         "DMA_CH_EN is set after transfer is finished!\n");
1686                 dev_err(&udc->pdev->dev,
1687                         "status=%#08x, pending=%#08x, control=%#08x\n",
1688                         status, pending, control);
1689
1690                 /*
1691                  * try to pretend nothing happened. We might have to
1692                  * do something here...
1693                  */
1694         }
1695
1696         if (list_empty(&ep->queue))
1697                 /* Might happen if a reset comes along at the right moment */
1698                 return;
1699
1700         if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1701                 req = list_entry(ep->queue.next, struct usba_request, queue);
1702                 usba_update_req(ep, req, status);
1703
1704                 list_del_init(&req->queue);
1705                 submit_next_request(ep);
1706                 request_complete(ep, req, 0);
1707         }
1708 }
1709
1710 static int start_clock(struct usba_udc *udc);
1711 static void stop_clock(struct usba_udc *udc);
1712
1713 static irqreturn_t usba_udc_irq(int irq, void *devid)
1714 {
1715         struct usba_udc *udc = devid;
1716         u32 status, int_enb;
1717         u32 dma_status;
1718         u32 ep_status;
1719
1720         spin_lock(&udc->lock);
1721
1722         int_enb = usba_int_enb_get(udc);
1723         status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1724         DBG(DBG_INT, "irq, status=%#08x\n", status);
1725
1726         if (status & USBA_DET_SUSPEND) {
1727                 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND|USBA_WAKE_UP);
1728                 usba_int_enb_set(udc, USBA_WAKE_UP);
1729                 usba_int_enb_clear(udc, USBA_DET_SUSPEND);
1730                 udc->suspended = true;
1731                 toggle_bias(udc, 0);
1732                 udc->bias_pulse_needed = true;
1733                 stop_clock(udc);
1734                 DBG(DBG_BUS, "Suspend detected\n");
1735                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1736                                 && udc->driver && udc->driver->suspend) {
1737                         spin_unlock(&udc->lock);
1738                         udc->driver->suspend(&udc->gadget);
1739                         spin_lock(&udc->lock);
1740                 }
1741         }
1742
1743         if (status & USBA_WAKE_UP) {
1744                 start_clock(udc);
1745                 toggle_bias(udc, 1);
1746                 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1747                 DBG(DBG_BUS, "Wake Up CPU detected\n");
1748         }
1749
1750         if (status & USBA_END_OF_RESUME) {
1751                 udc->suspended = false;
1752                 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1753                 usba_int_enb_clear(udc, USBA_WAKE_UP);
1754                 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1755                 generate_bias_pulse(udc);
1756                 DBG(DBG_BUS, "Resume detected\n");
1757                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1758                                 && udc->driver && udc->driver->resume) {
1759                         spin_unlock(&udc->lock);
1760                         udc->driver->resume(&udc->gadget);
1761                         spin_lock(&udc->lock);
1762                 }
1763         }
1764
1765         dma_status = USBA_BFEXT(DMA_INT, status);
1766         if (dma_status) {
1767                 int i;
1768
1769                 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1770
1771                 for (i = 1; i <= USBA_NR_DMAS; i++)
1772                         if (dma_status & (1 << i))
1773                                 usba_dma_irq(udc, &udc->usba_ep[i]);
1774         }
1775
1776         ep_status = USBA_BFEXT(EPT_INT, status);
1777         if (ep_status) {
1778                 int i;
1779
1780                 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1781
1782                 for (i = 0; i < udc->num_ep; i++)
1783                         if (ep_status & (1 << i)) {
1784                                 if (ep_is_control(&udc->usba_ep[i]))
1785                                         usba_control_irq(udc, &udc->usba_ep[i]);
1786                                 else
1787                                         usba_ep_irq(udc, &udc->usba_ep[i]);
1788                         }
1789         }
1790
1791         if (status & USBA_END_OF_RESET) {
1792                 struct usba_ep *ep0, *ep;
1793                 int i, n;
1794
1795                 usba_writel(udc, INT_CLR,
1796                         USBA_END_OF_RESET|USBA_END_OF_RESUME
1797                         |USBA_DET_SUSPEND|USBA_WAKE_UP);
1798                 generate_bias_pulse(udc);
1799                 reset_all_endpoints(udc);
1800
1801                 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1802                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1803                         spin_unlock(&udc->lock);
1804                         usb_gadget_udc_reset(&udc->gadget, udc->driver);
1805                         spin_lock(&udc->lock);
1806                 }
1807
1808                 if (status & USBA_HIGH_SPEED)
1809                         udc->gadget.speed = USB_SPEED_HIGH;
1810                 else
1811                         udc->gadget.speed = USB_SPEED_FULL;
1812                 DBG(DBG_BUS, "%s bus reset detected\n",
1813                     usb_speed_string(udc->gadget.speed));
1814
1815                 ep0 = &udc->usba_ep[0];
1816                 ep0->ep.desc = &usba_ep0_desc;
1817                 ep0->state = WAIT_FOR_SETUP;
1818                 usba_ep_writel(ep0, CFG,
1819                                 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1820                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1821                                 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1822                 usba_ep_writel(ep0, CTL_ENB,
1823                                 USBA_EPT_ENABLE | USBA_RX_SETUP);
1824
1825                 /* If we get reset while suspended... */
1826                 udc->suspended = false;
1827                 usba_int_enb_clear(udc, USBA_WAKE_UP);
1828
1829                 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1) |
1830                                       USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1831
1832                 /*
1833                  * Unclear why we hit this irregularly, e.g. in usbtest,
1834                  * but it's clearly harmless...
1835                  */
1836                 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1837                         dev_err(&udc->pdev->dev,
1838                                 "ODD: EP0 configuration is invalid!\n");
1839
1840                 /* Preallocate other endpoints */
1841                 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1842                 for (i = 1; i < n; i++) {
1843                         ep = &udc->usba_ep[i];
1844                         usba_ep_writel(ep, CFG, ep->ept_cfg);
1845                         if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1846                                 dev_err(&udc->pdev->dev,
1847                                         "ODD: EP%d configuration is invalid!\n", i);
1848                 }
1849         }
1850
1851         spin_unlock(&udc->lock);
1852
1853         return IRQ_HANDLED;
1854 }
1855
1856 static int start_clock(struct usba_udc *udc)
1857 {
1858         int ret;
1859
1860         if (udc->clocked)
1861                 return 0;
1862
1863         pm_stay_awake(&udc->pdev->dev);
1864
1865         ret = clk_prepare_enable(udc->pclk);
1866         if (ret)
1867                 return ret;
1868         ret = clk_prepare_enable(udc->hclk);
1869         if (ret) {
1870                 clk_disable_unprepare(udc->pclk);
1871                 return ret;
1872         }
1873
1874         udc->clocked = true;
1875         return 0;
1876 }
1877
1878 static void stop_clock(struct usba_udc *udc)
1879 {
1880         if (!udc->clocked)
1881                 return;
1882
1883         clk_disable_unprepare(udc->hclk);
1884         clk_disable_unprepare(udc->pclk);
1885
1886         udc->clocked = false;
1887
1888         pm_relax(&udc->pdev->dev);
1889 }
1890
1891 static int usba_start(struct usba_udc *udc)
1892 {
1893         unsigned long flags;
1894         int ret;
1895
1896         ret = start_clock(udc);
1897         if (ret)
1898                 return ret;
1899
1900         if (udc->suspended)
1901                 return 0;
1902
1903         spin_lock_irqsave(&udc->lock, flags);
1904         toggle_bias(udc, 1);
1905         usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1906         /* Clear all requested and pending interrupts... */
1907         usba_writel(udc, INT_ENB, 0);
1908         udc->int_enb_cache = 0;
1909         usba_writel(udc, INT_CLR,
1910                 USBA_END_OF_RESET|USBA_END_OF_RESUME
1911                 |USBA_DET_SUSPEND|USBA_WAKE_UP);
1912         /* ...and enable just 'reset' IRQ to get us started */
1913         usba_int_enb_set(udc, USBA_END_OF_RESET);
1914         spin_unlock_irqrestore(&udc->lock, flags);
1915
1916         return 0;
1917 }
1918
1919 static void usba_stop(struct usba_udc *udc)
1920 {
1921         unsigned long flags;
1922
1923         if (udc->suspended)
1924                 return;
1925
1926         spin_lock_irqsave(&udc->lock, flags);
1927         udc->gadget.speed = USB_SPEED_UNKNOWN;
1928         reset_all_endpoints(udc);
1929
1930         /* This will also disable the DP pullup */
1931         toggle_bias(udc, 0);
1932         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1933         spin_unlock_irqrestore(&udc->lock, flags);
1934
1935         stop_clock(udc);
1936 }
1937
1938 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1939 {
1940         struct usba_udc *udc = devid;
1941         int vbus;
1942
1943         /* debounce */
1944         udelay(10);
1945
1946         mutex_lock(&udc->vbus_mutex);
1947
1948         vbus = vbus_is_present(udc);
1949         if (vbus != udc->vbus_prev) {
1950                 if (vbus) {
1951                         usba_start(udc);
1952                 } else {
1953                         udc->suspended = false;
1954                         usba_stop(udc);
1955
1956                         if (udc->driver->disconnect)
1957                                 udc->driver->disconnect(&udc->gadget);
1958                 }
1959                 udc->vbus_prev = vbus;
1960         }
1961
1962         mutex_unlock(&udc->vbus_mutex);
1963         return IRQ_HANDLED;
1964 }
1965
1966 static int atmel_usba_start(struct usb_gadget *gadget,
1967                 struct usb_gadget_driver *driver)
1968 {
1969         int ret;
1970         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1971         unsigned long flags;
1972
1973         spin_lock_irqsave(&udc->lock, flags);
1974         udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1975         udc->driver = driver;
1976         spin_unlock_irqrestore(&udc->lock, flags);
1977
1978         mutex_lock(&udc->vbus_mutex);
1979
1980         if (udc->vbus_pin)
1981                 enable_irq(gpiod_to_irq(udc->vbus_pin));
1982
1983         /* If Vbus is present, enable the controller and wait for reset */
1984         udc->vbus_prev = vbus_is_present(udc);
1985         if (udc->vbus_prev) {
1986                 ret = usba_start(udc);
1987                 if (ret)
1988                         goto err;
1989         }
1990
1991         mutex_unlock(&udc->vbus_mutex);
1992         return 0;
1993
1994 err:
1995         if (udc->vbus_pin)
1996                 disable_irq(gpiod_to_irq(udc->vbus_pin));
1997
1998         mutex_unlock(&udc->vbus_mutex);
1999
2000         spin_lock_irqsave(&udc->lock, flags);
2001         udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
2002         udc->driver = NULL;
2003         spin_unlock_irqrestore(&udc->lock, flags);
2004         return ret;
2005 }
2006
2007 static int atmel_usba_stop(struct usb_gadget *gadget)
2008 {
2009         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
2010
2011         if (udc->vbus_pin)
2012                 disable_irq(gpiod_to_irq(udc->vbus_pin));
2013
2014         if (fifo_mode == 0)
2015                 udc->configured_ep = 1;
2016
2017         udc->suspended = false;
2018         usba_stop(udc);
2019
2020         udc->driver = NULL;
2021
2022         return 0;
2023 }
2024
2025 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
2026 {
2027         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2028                            is_on ? AT91_PMC_BIASEN : 0);
2029 }
2030
2031 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
2032 {
2033         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
2034         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2035                            AT91_PMC_BIASEN);
2036 }
2037
2038 static const struct usba_udc_errata at91sam9rl_errata = {
2039         .toggle_bias = at91sam9rl_toggle_bias,
2040 };
2041
2042 static const struct usba_udc_errata at91sam9g45_errata = {
2043         .pulse_bias = at91sam9g45_pulse_bias,
2044 };
2045
2046 static const struct of_device_id atmel_udc_dt_ids[] = {
2047         { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
2048         { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
2049         { .compatible = "atmel,sama5d3-udc" },
2050         { /* sentinel */ }
2051 };
2052
2053 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2054
2055 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2056                                                     struct usba_udc *udc)
2057 {
2058         u32 val;
2059         struct device_node *np = pdev->dev.of_node;
2060         const struct of_device_id *match;
2061         struct device_node *pp;
2062         int i, ret;
2063         struct usba_ep *eps, *ep;
2064
2065         match = of_match_node(atmel_udc_dt_ids, np);
2066         if (!match)
2067                 return ERR_PTR(-EINVAL);
2068
2069         udc->errata = match->data;
2070         udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2071         if (IS_ERR(udc->pmc))
2072                 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9rl-pmc");
2073         if (IS_ERR(udc->pmc))
2074                 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2075         if (udc->errata && IS_ERR(udc->pmc))
2076                 return ERR_CAST(udc->pmc);
2077
2078         udc->num_ep = 0;
2079
2080         udc->vbus_pin = devm_gpiod_get_optional(&pdev->dev, "atmel,vbus",
2081                                                 GPIOD_IN);
2082
2083         if (fifo_mode == 0) {
2084                 pp = NULL;
2085                 while ((pp = of_get_next_child(np, pp)))
2086                         udc->num_ep++;
2087                 udc->configured_ep = 1;
2088         } else {
2089                 udc->num_ep = usba_config_fifo_table(udc);
2090         }
2091
2092         eps = devm_kcalloc(&pdev->dev, udc->num_ep, sizeof(struct usba_ep),
2093                            GFP_KERNEL);
2094         if (!eps)
2095                 return ERR_PTR(-ENOMEM);
2096
2097         udc->gadget.ep0 = &eps[0].ep;
2098
2099         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2100
2101         pp = NULL;
2102         i = 0;
2103         while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2104                 ep = &eps[i];
2105
2106                 ret = of_property_read_u32(pp, "reg", &val);
2107                 if (ret) {
2108                         dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2109                         goto err;
2110                 }
2111                 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2112
2113                 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2114                 if (ret) {
2115                         dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2116                         goto err;
2117                 }
2118                 if (fifo_mode) {
2119                         if (val < udc->fifo_cfg[i].fifo_size) {
2120                                 dev_warn(&pdev->dev,
2121                                          "Using max fifo-size value from DT\n");
2122                                 ep->fifo_size = val;
2123                         } else {
2124                                 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2125                         }
2126                 } else {
2127                         ep->fifo_size = val;
2128                 }
2129
2130                 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2131                 if (ret) {
2132                         dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2133                         goto err;
2134                 }
2135                 if (fifo_mode) {
2136                         if (val < udc->fifo_cfg[i].nr_banks) {
2137                                 dev_warn(&pdev->dev,
2138                                          "Using max nb-banks value from DT\n");
2139                                 ep->nr_banks = val;
2140                         } else {
2141                                 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2142                         }
2143                 } else {
2144                         ep->nr_banks = val;
2145                 }
2146
2147                 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2148                 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2149
2150                 sprintf(ep->name, "ep%d", ep->index);
2151                 ep->ep.name = ep->name;
2152
2153                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2154                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2155                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2156                 ep->ep.ops = &usba_ep_ops;
2157                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2158                 ep->udc = udc;
2159                 INIT_LIST_HEAD(&ep->queue);
2160
2161                 if (ep->index == 0) {
2162                         ep->ep.caps.type_control = true;
2163                 } else {
2164                         ep->ep.caps.type_iso = ep->can_isoc;
2165                         ep->ep.caps.type_bulk = true;
2166                         ep->ep.caps.type_int = true;
2167                 }
2168
2169                 ep->ep.caps.dir_in = true;
2170                 ep->ep.caps.dir_out = true;
2171
2172                 if (fifo_mode != 0) {
2173                         /*
2174                          * Generate ept_cfg based on FIFO size and
2175                          * banks number
2176                          */
2177                         if (ep->fifo_size  <= 8)
2178                                 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2179                         else
2180                                 /* LSB is bit 1, not 0 */
2181                                 ep->ept_cfg =
2182                                   USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2183
2184                         ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2185                 }
2186
2187                 if (i)
2188                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2189
2190                 i++;
2191         }
2192
2193         if (i == 0) {
2194                 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2195                 ret = -EINVAL;
2196                 goto err;
2197         }
2198
2199         return eps;
2200 err:
2201         return ERR_PTR(ret);
2202 }
2203
2204 static int usba_udc_probe(struct platform_device *pdev)
2205 {
2206         struct resource *res;
2207         struct clk *pclk, *hclk;
2208         struct usba_udc *udc;
2209         int irq, ret, i;
2210
2211         udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2212         if (!udc)
2213                 return -ENOMEM;
2214
2215         udc->gadget = usba_gadget_template;
2216         INIT_LIST_HEAD(&udc->gadget.ep_list);
2217
2218         res = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2219         udc->regs = devm_ioremap_resource(&pdev->dev, res);
2220         if (IS_ERR(udc->regs))
2221                 return PTR_ERR(udc->regs);
2222         dev_info(&pdev->dev, "MMIO registers at %pR mapped at %p\n",
2223                  res, udc->regs);
2224
2225         res = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2226         udc->fifo = devm_ioremap_resource(&pdev->dev, res);
2227         if (IS_ERR(udc->fifo))
2228                 return PTR_ERR(udc->fifo);
2229         dev_info(&pdev->dev, "FIFO at %pR mapped at %p\n", res, udc->fifo);
2230
2231         irq = platform_get_irq(pdev, 0);
2232         if (irq < 0)
2233                 return irq;
2234
2235         pclk = devm_clk_get(&pdev->dev, "pclk");
2236         if (IS_ERR(pclk))
2237                 return PTR_ERR(pclk);
2238         hclk = devm_clk_get(&pdev->dev, "hclk");
2239         if (IS_ERR(hclk))
2240                 return PTR_ERR(hclk);
2241
2242         spin_lock_init(&udc->lock);
2243         mutex_init(&udc->vbus_mutex);
2244         udc->pdev = pdev;
2245         udc->pclk = pclk;
2246         udc->hclk = hclk;
2247
2248         platform_set_drvdata(pdev, udc);
2249
2250         /* Make sure we start from a clean slate */
2251         ret = clk_prepare_enable(pclk);
2252         if (ret) {
2253                 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2254                 return ret;
2255         }
2256
2257         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2258         clk_disable_unprepare(pclk);
2259
2260         udc->usba_ep = atmel_udc_of_init(pdev, udc);
2261
2262         toggle_bias(udc, 0);
2263
2264         if (IS_ERR(udc->usba_ep))
2265                 return PTR_ERR(udc->usba_ep);
2266
2267         ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2268                                 "atmel_usba_udc", udc);
2269         if (ret) {
2270                 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2271                         irq, ret);
2272                 return ret;
2273         }
2274         udc->irq = irq;
2275
2276         if (udc->vbus_pin) {
2277                 irq_set_status_flags(gpiod_to_irq(udc->vbus_pin), IRQ_NOAUTOEN);
2278                 ret = devm_request_threaded_irq(&pdev->dev,
2279                                 gpiod_to_irq(udc->vbus_pin), NULL,
2280                                 usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2281                                 "atmel_usba_udc", udc);
2282                 if (ret) {
2283                         udc->vbus_pin = NULL;
2284                         dev_warn(&udc->pdev->dev,
2285                                  "failed to request vbus irq; "
2286                                  "assuming always on\n");
2287                 }
2288         }
2289
2290         ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2291         if (ret)
2292                 return ret;
2293         device_init_wakeup(&pdev->dev, 1);
2294
2295         usba_init_debugfs(udc);
2296         for (i = 1; i < udc->num_ep; i++)
2297                 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2298
2299         return 0;
2300 }
2301
2302 static int usba_udc_remove(struct platform_device *pdev)
2303 {
2304         struct usba_udc *udc;
2305         int i;
2306
2307         udc = platform_get_drvdata(pdev);
2308
2309         device_init_wakeup(&pdev->dev, 0);
2310         usb_del_gadget_udc(&udc->gadget);
2311
2312         for (i = 1; i < udc->num_ep; i++)
2313                 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2314         usba_cleanup_debugfs(udc);
2315
2316         return 0;
2317 }
2318
2319 #ifdef CONFIG_PM_SLEEP
2320 static int usba_udc_suspend(struct device *dev)
2321 {
2322         struct usba_udc *udc = dev_get_drvdata(dev);
2323
2324         /* Not started */
2325         if (!udc->driver)
2326                 return 0;
2327
2328         mutex_lock(&udc->vbus_mutex);
2329
2330         if (!device_may_wakeup(dev)) {
2331                 udc->suspended = false;
2332                 usba_stop(udc);
2333                 goto out;
2334         }
2335
2336         /*
2337          * Device may wake up. We stay clocked if we failed
2338          * to request vbus irq, assuming always on.
2339          */
2340         if (udc->vbus_pin) {
2341                 /* FIXME: right to stop here...??? */
2342                 usba_stop(udc);
2343                 enable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2344         }
2345
2346         enable_irq_wake(udc->irq);
2347
2348 out:
2349         mutex_unlock(&udc->vbus_mutex);
2350         return 0;
2351 }
2352
2353 static int usba_udc_resume(struct device *dev)
2354 {
2355         struct usba_udc *udc = dev_get_drvdata(dev);
2356
2357         /* Not started */
2358         if (!udc->driver)
2359                 return 0;
2360
2361         if (device_may_wakeup(dev)) {
2362                 if (udc->vbus_pin)
2363                         disable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2364
2365                 disable_irq_wake(udc->irq);
2366         }
2367
2368         /* If Vbus is present, enable the controller and wait for reset */
2369         mutex_lock(&udc->vbus_mutex);
2370         udc->vbus_prev = vbus_is_present(udc);
2371         if (udc->vbus_prev)
2372                 usba_start(udc);
2373         mutex_unlock(&udc->vbus_mutex);
2374
2375         return 0;
2376 }
2377 #endif
2378
2379 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2380
2381 static struct platform_driver udc_driver = {
2382         .remove         = usba_udc_remove,
2383         .driver         = {
2384                 .name           = "atmel_usba_udc",
2385                 .pm             = &usba_udc_pm_ops,
2386                 .of_match_table = atmel_udc_dt_ids,
2387         },
2388 };
2389
2390 module_platform_driver_probe(udc_driver, usba_udc_probe);
2391
2392 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2393 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2394 MODULE_LICENSE("GPL");
2395 MODULE_ALIAS("platform:atmel_usba_udc");