drivers/usb/dwc3/dwc3-pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /**
   3  * dwc3-pci.c - PCI Specific glue layer
   4  *
   5  * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
   6  *
   7  * Authors: Felipe Balbi <balbi@ti.com>,
   8  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/slab.h>
  14 #include <linux/pci.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/gpio/consumer.h>
  19 #include <linux/gpio/machine.h>
  20 #include <linux/acpi.h>
  21 #include <linux/delay.h>
  22
  23 #define PCI_DEVICE_ID_INTEL_BYT                 0x0f37
  24 #define PCI_DEVICE_ID_INTEL_MRFLD               0x119e
  25 #define PCI_DEVICE_ID_INTEL_BSW                 0x22b7
  26 #define PCI_DEVICE_ID_INTEL_SPTLP               0x9d30
  27 #define PCI_DEVICE_ID_INTEL_SPTH                0xa130
  28 #define PCI_DEVICE_ID_INTEL_BXT                 0x0aaa
  29 #define PCI_DEVICE_ID_INTEL_BXT_M               0x1aaa
  30 #define PCI_DEVICE_ID_INTEL_APL                 0x5aaa
  31 #define PCI_DEVICE_ID_INTEL_KBP                 0xa2b0
  32 #define PCI_DEVICE_ID_INTEL_CMLLP               0x02ee
  33 #define PCI_DEVICE_ID_INTEL_CMLH                0x06ee
  34 #define PCI_DEVICE_ID_INTEL_GLK                 0x31aa
  35 #define PCI_DEVICE_ID_INTEL_CNPLP               0x9dee
  36 #define PCI_DEVICE_ID_INTEL_CNPH                0xa36e
  37 #define PCI_DEVICE_ID_INTEL_CNPV                0xa3b0
  38 #define PCI_DEVICE_ID_INTEL_ICLLP               0x34ee
  39 #define PCI_DEVICE_ID_INTEL_EHLLP               0x4b7e
  40 #define PCI_DEVICE_ID_INTEL_TGPLP               0xa0ee
  41 #define PCI_DEVICE_ID_INTEL_TGPH                0x43ee
  42 #define PCI_DEVICE_ID_INTEL_JSP                 0x4dee
  43 #define PCI_DEVICE_ID_INTEL_ADLP                0x51ee
  44 #define PCI_DEVICE_ID_INTEL_ADLS                0x7ae1
  45 #define PCI_DEVICE_ID_INTEL_TGL                 0x9a15
  46
  47 #define PCI_INTEL_BXT_DSM_GUID          "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
  48 #define PCI_INTEL_BXT_FUNC_PMU_PWR      4
  49 #define PCI_INTEL_BXT_STATE_D0          0
  50 #define PCI_INTEL_BXT_STATE_D3          3
  51
  52 #define GP_RWBAR                        1
  53 #define GP_RWREG1                       0xa0
  54 #define GP_RWREG1_ULPI_REFCLK_DISABLE   (1 << 17)
  55
  56 /**
  57  * struct dwc3_pci - Driver private structure
  58  * @dwc3: child dwc3 platform_device
  59  * @pci: our link to PCI bus
  60  * @guid: _DSM GUID
  61  * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
  62  * @wakeup_work: work for asynchronous resume
  63  */
  64 struct dwc3_pci {
  65         struct platform_device *dwc3;
  66         struct pci_dev *pci;
  67
  68         guid_t guid;
  69
  70         unsigned int has_dsm_for_pm:1;
  71         struct work_struct wakeup_work;
  72 };
  73
  74 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  75 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  76
  77 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  78         { "reset-gpios", &reset_gpios, 1 },
  79         { "cs-gpios", &cs_gpios, 1 },
  80         { },
  81 };
  82
  83 static struct gpiod_lookup_table platform_bytcr_gpios = {
  84         .dev_id         = "0000:00:16.0",
  85         .table          = {
  86                 GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH),
  87                 GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH),
  88                 {}
  89         },
  90 };
  91
  92 static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci)
  93 {
  94         void __iomem    *reg;
  95         u32             value;
  96
  97         reg = pcim_iomap(pci, GP_RWBAR, 0);
  98         if (!reg)
  99                 return -ENOMEM;
 100
 101         value = readl(reg + GP_RWREG1);
 102         if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
 103                 goto unmap; /* ULPI refclk already enabled */
 104
 105         value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
 106         writel(value, reg + GP_RWREG1);
 107         /* This comes from the Intel Android x86 tree w/o any explanation */
 108         msleep(100);
 109 unmap:
 110         pcim_iounmap(pci, reg);
 111         return 0;
 112 }
 113
 114 static const struct property_entry dwc3_pci_intel_properties[] = {
 115         PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
 116         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 117         {}
 118 };
 119
 120 static const struct property_entry dwc3_pci_mrfld_properties[] = {
 121         PROPERTY_ENTRY_STRING("dr_mode", "otg"),
 122         PROPERTY_ENTRY_STRING("linux,extcon-name", "mrfld_bcove_pwrsrc"),
 123         PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
 124         PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
 125         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 126         {}
 127 };
 128
 129 static const struct property_entry dwc3_pci_amd_properties[] = {
 130         PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
 131         PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
 132         PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
 133         PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
 134         PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
 135         PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
 136         PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
 137         PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
 138         PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
 139         PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
 140         PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
 141         /* FIXME these quirks should be removed when AMD NL tapes out */
 142         PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
 143         PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
 144         PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
 145         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 146         {}
 147 };
 148
 149 static const struct software_node dwc3_pci_intel_swnode = {
 150         .properties = dwc3_pci_intel_properties,
 151 };
 152
 153 static const struct software_node dwc3_pci_intel_mrfld_swnode = {
 154         .properties = dwc3_pci_mrfld_properties,
 155 };
 156
 157 static const struct software_node dwc3_pci_amd_swnode = {
 158         .properties = dwc3_pci_amd_properties,
 159 };
 160
 161 static int dwc3_pci_quirks(struct dwc3_pci *dwc)
 162 {
 163         struct pci_dev                  *pdev = dwc->pci;
 164
 165         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
 166                 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
 167                     pdev->device == PCI_DEVICE_ID_INTEL_BXT_M ||
 168                     pdev->device == PCI_DEVICE_ID_INTEL_EHLLP) {
 169                         guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
 170                         dwc->has_dsm_for_pm = true;
 171                 }
 172
 173                 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
 174                         struct gpio_desc *gpio;
 175                         int ret;
 176
 177                         /* On BYT the FW does not always enable the refclock */
 178                         ret = dwc3_byt_enable_ulpi_refclock(pdev);
 179                         if (ret)
 180                                 return ret;
 181
 182                         ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
 183                                         acpi_dwc3_byt_gpios);
 184                         if (ret)
 185                                 dev_dbg(&pdev->dev, "failed to add mapping table\n");
 186
 187                         /*
 188                          * A lot of BYT devices lack ACPI resource entries for
 189                          * the GPIOs, add a fallback mapping to the reference
 190                          * design GPIOs which all boards seem to use.
 191                          */
 192                         gpiod_add_lookup_table(&platform_bytcr_gpios);
 193
 194                         /*
 195                          * These GPIOs will turn on the USB2 PHY. Note that we have to
 196                          * put the gpio descriptors again here because the phy driver
 197                          * might want to grab them, too.
 198                          */
 199                         gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
 200                         if (IS_ERR(gpio))
 201                                 return PTR_ERR(gpio);
 202
 203                         gpiod_set_value_cansleep(gpio, 1);
 204                         gpiod_put(gpio);
 205
 206                         gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
 207                         if (IS_ERR(gpio))
 208                                 return PTR_ERR(gpio);
 209
 210                         if (gpio) {
 211                                 gpiod_set_value_cansleep(gpio, 1);
 212                                 gpiod_put(gpio);
 213                                 usleep_range(10000, 11000);
 214                         }
 215                 }
 216         }
 217
 218         return 0;
 219 }
 220
 221 #ifdef CONFIG_PM
 222 static void dwc3_pci_resume_work(struct work_struct *work)
 223 {
 224         struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
 225         struct platform_device *dwc3 = dwc->dwc3;
 226         int ret;
 227
 228         ret = pm_runtime_get_sync(&dwc3->dev);
 229         if (ret) {
 230                 pm_runtime_put_sync_autosuspend(&dwc3->dev);
 231                 return;
 232         }
 233
 234         pm_runtime_mark_last_busy(&dwc3->dev);
 235         pm_runtime_put_sync_autosuspend(&dwc3->dev);
 236 }
 237 #endif
 238
 239 static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
 240 {
 241         struct dwc3_pci         *dwc;
 242         struct resource         res[2];
 243         int                     ret;
 244         struct device           *dev = &pci->dev;
 245
 246         ret = pcim_enable_device(pci);
 247         if (ret) {
 248                 dev_err(dev, "failed to enable pci device\n");
 249                 return -ENODEV;
 250         }
 251
 252         pci_set_master(pci);
 253
 254         dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
 255         if (!dwc)
 256                 return -ENOMEM;
 257
 258         dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
 259         if (!dwc->dwc3)
 260                 return -ENOMEM;
 261
 262         memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
 263
 264         res[0].start    = pci_resource_start(pci, 0);
 265         res[0].end      = pci_resource_end(pci, 0);
 266         res[0].name     = "dwc_usb3";
 267         res[0].flags    = IORESOURCE_MEM;
 268
 269         res[1].start    = pci->irq;
 270         res[1].name     = "dwc_usb3";
 271         res[1].flags    = IORESOURCE_IRQ;
 272
 273         ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
 274         if (ret) {
 275                 dev_err(dev, "couldn't add resources to dwc3 device\n");
 276                 goto err;
 277         }
 278
 279         dwc->pci = pci;
 280         dwc->dwc3->dev.parent = dev;
 281         ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
 282
 283         ret = device_add_software_node(&dwc->dwc3->dev, (void *)id->driver_data);
 284         if (ret < 0)
 285                 goto err;
 286
 287         ret = dwc3_pci_quirks(dwc);
 288         if (ret)
 289                 goto err;
 290
 291         ret = platform_device_add(dwc->dwc3);
 292         if (ret) {
 293                 dev_err(dev, "failed to register dwc3 device\n");
 294                 goto err;
 295         }
 296
 297         device_init_wakeup(dev, true);
 298         pci_set_drvdata(pci, dwc);
 299         pm_runtime_put(dev);
 300 #ifdef CONFIG_PM
 301         INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
 302 #endif
 303
 304         return 0;
 305 err:
 306         device_remove_software_node(&dwc->dwc3->dev);
 307         platform_device_put(dwc->dwc3);
 308         return ret;
 309 }
 310
 311 static void dwc3_pci_remove(struct pci_dev *pci)
 312 {
 313         struct dwc3_pci         *dwc = pci_get_drvdata(pci);
 314         struct pci_dev          *pdev = dwc->pci;
 315
 316         if (pdev->device == PCI_DEVICE_ID_INTEL_BYT)
 317                 gpiod_remove_lookup_table(&platform_bytcr_gpios);
 318 #ifdef CONFIG_PM
 319         cancel_work_sync(&dwc->wakeup_work);
 320 #endif
 321         device_init_wakeup(&pci->dev, false);
 322         pm_runtime_get(&pci->dev);
 323         device_remove_software_node(&dwc->dwc3->dev);
 324         platform_device_unregister(dwc->dwc3);
 325 }
 326
 327 static const struct pci_device_id dwc3_pci_id_table[] = {
 328         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BSW),
 329           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 330
 331         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BYT),
 332           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 333
 334         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD),
 335           (kernel_ulong_t) &dwc3_pci_intel_mrfld_swnode, },
 336
 337         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLLP),
 338           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 339
 340         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLH),
 341           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 342
 343         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP),
 344           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 345
 346         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTH),
 347           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 348
 349         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT),
 350           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 351
 352         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT_M),
 353           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 354
 355         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_APL),
 356           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 357
 358         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_KBP),
 359           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 360
 361         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_GLK),
 362           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 363
 364         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPLP),
 365           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 366
 367         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPH),
 368           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 369
 370         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPV),
 371           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 372
 373         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICLLP),
 374           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 375
 376         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_EHLLP),
 377           (kernel_ulong_t) &dwc3_pci_intel_swnode },
 378
 379         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGPLP),
 380           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 381
 382         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGPH),
 383           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 384
 385         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_JSP),
 386           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 387
 388         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLP),
 389           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 390
 391         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLS),
 392           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 393
 394         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL),
 395           (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 396
 397         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB),
 398           (kernel_ulong_t) &dwc3_pci_amd_swnode, },
 399         {  }    /* Terminating Entry */
 400 };
 401 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
 402
 403 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
 404 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
 405 {
 406         union acpi_object *obj;
 407         union acpi_object tmp;
 408         union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
 409
 410         if (!dwc->has_dsm_for_pm)
 411                 return 0;
 412
 413         tmp.type = ACPI_TYPE_INTEGER;
 414         tmp.integer.value = param;
 415
 416         obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
 417                         1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
 418         if (!obj) {
 419                 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
 420                 return -EIO;
 421         }
 422
 423         ACPI_FREE(obj);
 424
 425         return 0;
 426 }
 427 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
 428
 429 #ifdef CONFIG_PM
 430 static int dwc3_pci_runtime_suspend(struct device *dev)
 431 {
 432         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 433
 434         if (device_can_wakeup(dev))
 435                 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
 436
 437         return -EBUSY;
 438 }
 439
 440 static int dwc3_pci_runtime_resume(struct device *dev)
 441 {
 442         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 443         int                     ret;
 444
 445         ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
 446         if (ret)
 447                 return ret;
 448
 449         queue_work(pm_wq, &dwc->wakeup_work);
 450
 451         return 0;
 452 }
 453 #endif /* CONFIG_PM */
 454
 455 #ifdef CONFIG_PM_SLEEP
 456 static int dwc3_pci_suspend(struct device *dev)
 457 {
 458         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 459
 460         return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
 461 }
 462
 463 static int dwc3_pci_resume(struct device *dev)
 464 {
 465         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 466
 467         return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
 468 }
 469 #endif /* CONFIG_PM_SLEEP */
 470
 471 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
 472         SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
 473         SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
 474                 NULL)
 475 };
 476
 477 static struct pci_driver dwc3_pci_driver = {
 478         .name           = "dwc3-pci",
 479         .id_table       = dwc3_pci_id_table,
 480         .probe          = dwc3_pci_probe,
 481         .remove         = dwc3_pci_remove,
 482         .driver         = {
 483                 .pm     = &dwc3_pci_dev_pm_ops,
 484         }
 485 };
 486
 487 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 488 MODULE_LICENSE("GPL v2");
 489 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
 490
 491 module_pci_driver(dwc3_pci_driver);