drivers/usb/dwc3/dwc3-pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /**
   3  * dwc3-pci.c - PCI Specific glue layer
   4  *
   5  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   6  *
   7  * Authors: Felipe Balbi <balbi@ti.com>,
   8  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/slab.h>
  14 #include <linux/pci.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/gpio/consumer.h>
  19 #include <linux/acpi.h>
  20 #include <linux/delay.h>
  21
  22 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3         0xabcd
  23 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI     0xabce
  24 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31        0xabcf
  25 #define PCI_DEVICE_ID_INTEL_BYT                 0x0f37
  26 #define PCI_DEVICE_ID_INTEL_MRFLD               0x119e
  27 #define PCI_DEVICE_ID_INTEL_BSW                 0x22b7
  28 #define PCI_DEVICE_ID_INTEL_SPTLP               0x9d30
  29 #define PCI_DEVICE_ID_INTEL_SPTH                0xa130
  30 #define PCI_DEVICE_ID_INTEL_BXT                 0x0aaa
  31 #define PCI_DEVICE_ID_INTEL_BXT_M               0x1aaa
  32 #define PCI_DEVICE_ID_INTEL_APL                 0x5aaa
  33 #define PCI_DEVICE_ID_INTEL_KBP                 0xa2b0
  34 #define PCI_DEVICE_ID_INTEL_GLK                 0x31aa
  35 #define PCI_DEVICE_ID_INTEL_CNPLP               0x9dee
  36 #define PCI_DEVICE_ID_INTEL_CNPH                0xa36e
  37 #define PCI_DEVICE_ID_INTEL_ICLLP               0x34ee
  38
  39 #define PCI_INTEL_BXT_DSM_GUID          "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
  40 #define PCI_INTEL_BXT_FUNC_PMU_PWR      4
  41 #define PCI_INTEL_BXT_STATE_D0          0
  42 #define PCI_INTEL_BXT_STATE_D3          3
  43
  44 /**
  45  * struct dwc3_pci - Driver private structure
  46  * @dwc3: child dwc3 platform_device
  47  * @pci: our link to PCI bus
  48  * @guid: _DSM GUID
  49  * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
  50  */
  51 struct dwc3_pci {
  52         struct platform_device *dwc3;
  53         struct pci_dev *pci;
  54
  55         guid_t guid;
  56
  57         unsigned int has_dsm_for_pm:1;
  58         struct work_struct wakeup_work;
  59 };
  60
  61 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  62 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  63
  64 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  65         { "reset-gpios", &reset_gpios, 1 },
  66         { "cs-gpios", &cs_gpios, 1 },
  67         { },
  68 };
  69
  70 static int dwc3_pci_quirks(struct dwc3_pci *dwc)
  71 {
  72         struct platform_device          *dwc3 = dwc->dwc3;
  73         struct pci_dev                  *pdev = dwc->pci;
  74
  75         if (pdev->vendor == PCI_VENDOR_ID_AMD &&
  76             pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
  77                 struct property_entry properties[] = {
  78                         PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
  79                         PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
  80                         PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
  81                         PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
  82                         PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
  83                         PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
  84                         PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
  85                         PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
  86                         PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
  87                         PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
  88                         PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
  89                         /*
  90                          * FIXME these quirks should be removed when AMD NL
  91                          * tapes out
  92                          */
  93                         PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
  94                         PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
  95                         PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
  96                         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
  97                         { },
  98                 };
  99
 100                 return platform_device_add_properties(dwc3, properties);
 101         }
 102
 103         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
 104                 int ret;
 105
 106                 struct property_entry properties[] = {
 107                         PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
 108                         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 109                         { }
 110                 };
 111
 112                 ret = platform_device_add_properties(dwc3, properties);
 113                 if (ret < 0)
 114                         return ret;
 115
 116                 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
 117                                 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
 118                         guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
 119                         dwc->has_dsm_for_pm = true;
 120                 }
 121
 122                 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
 123                         struct gpio_desc *gpio;
 124
 125                         ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
 126                                         acpi_dwc3_byt_gpios);
 127                         if (ret)
 128                                 dev_dbg(&pdev->dev, "failed to add mapping table\n");
 129
 130                         /*
 131                          * These GPIOs will turn on the USB2 PHY. Note that we have to
 132                          * put the gpio descriptors again here because the phy driver
 133                          * might want to grab them, too.
 134                          */
 135                         gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
 136                         if (IS_ERR(gpio))
 137                                 return PTR_ERR(gpio);
 138
 139                         gpiod_set_value_cansleep(gpio, 1);
 140                         gpiod_put(gpio);
 141
 142                         gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
 143                         if (IS_ERR(gpio))
 144                                 return PTR_ERR(gpio);
 145
 146                         if (gpio) {
 147                                 gpiod_set_value_cansleep(gpio, 1);
 148                                 gpiod_put(gpio);
 149                                 usleep_range(10000, 11000);
 150                         }
 151                 }
 152         }
 153
 154         if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
 155             (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
 156              pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
 157              pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
 158                 struct property_entry properties[] = {
 159                         PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
 160                         PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
 161                         PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
 162                         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 163                         { },
 164                 };
 165
 166                 return platform_device_add_properties(dwc3, properties);
 167         }
 168
 169         return 0;
 170 }
 171
 172 #ifdef CONFIG_PM
 173 static void dwc3_pci_resume_work(struct work_struct *work)
 174 {
 175         struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
 176         struct platform_device *dwc3 = dwc->dwc3;
 177         int ret;
 178
 179         ret = pm_runtime_get_sync(&dwc3->dev);
 180         if (ret)
 181                 return;
 182
 183         pm_runtime_mark_last_busy(&dwc3->dev);
 184         pm_runtime_put_sync_autosuspend(&dwc3->dev);
 185 }
 186 #endif
 187
 188 static int dwc3_pci_probe(struct pci_dev *pci,
 189                 const struct pci_device_id *id)
 190 {
 191         struct dwc3_pci         *dwc;
 192         struct resource         res[2];
 193         int                     ret;
 194         struct device           *dev = &pci->dev;
 195
 196         ret = pcim_enable_device(pci);
 197         if (ret) {
 198                 dev_err(dev, "failed to enable pci device\n");
 199                 return -ENODEV;
 200         }
 201
 202         pci_set_master(pci);
 203
 204         dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
 205         if (!dwc)
 206                 return -ENOMEM;
 207
 208         dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
 209         if (!dwc->dwc3)
 210                 return -ENOMEM;
 211
 212         memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
 213
 214         res[0].start    = pci_resource_start(pci, 0);
 215         res[0].end      = pci_resource_end(pci, 0);
 216         res[0].name     = "dwc_usb3";
 217         res[0].flags    = IORESOURCE_MEM;
 218
 219         res[1].start    = pci->irq;
 220         res[1].name     = "dwc_usb3";
 221         res[1].flags    = IORESOURCE_IRQ;
 222
 223         ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
 224         if (ret) {
 225                 dev_err(dev, "couldn't add resources to dwc3 device\n");
 226                 goto err;
 227         }
 228
 229         dwc->pci = pci;
 230         dwc->dwc3->dev.parent = dev;
 231         ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
 232
 233         ret = dwc3_pci_quirks(dwc);
 234         if (ret)
 235                 goto err;
 236
 237         ret = platform_device_add(dwc->dwc3);
 238         if (ret) {
 239                 dev_err(dev, "failed to register dwc3 device\n");
 240                 goto err;
 241         }
 242
 243         device_init_wakeup(dev, true);
 244         pci_set_drvdata(pci, dwc);
 245         pm_runtime_put(dev);
 246 #ifdef CONFIG_PM
 247         INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
 248 #endif
 249
 250         return 0;
 251 err:
 252         platform_device_put(dwc->dwc3);
 253         return ret;
 254 }
 255
 256 static void dwc3_pci_remove(struct pci_dev *pci)
 257 {
 258         struct dwc3_pci         *dwc = pci_get_drvdata(pci);
 259
 260 #ifdef CONFIG_PM
 261         cancel_work_sync(&dwc->wakeup_work);
 262 #endif
 263         device_init_wakeup(&pci->dev, false);
 264         pm_runtime_get(&pci->dev);
 265         platform_device_unregister(dwc->dwc3);
 266 }
 267
 268 static const struct pci_device_id dwc3_pci_id_table[] = {
 269         {
 270                 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
 271                                 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
 272         },
 273         {
 274                 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
 275                                 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
 276         },
 277         {
 278                 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
 279                                 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
 280         },
 281         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
 282         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
 283         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
 284         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
 285         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
 286         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
 287         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
 288         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
 289         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
 290         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), },
 291         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPLP), },
 292         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPH), },
 293         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICLLP), },
 294         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
 295         {  }    /* Terminating Entry */
 296 };
 297 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
 298
 299 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
 300 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
 301 {
 302         union acpi_object *obj;
 303         union acpi_object tmp;
 304         union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
 305
 306         if (!dwc->has_dsm_for_pm)
 307                 return 0;
 308
 309         tmp.type = ACPI_TYPE_INTEGER;
 310         tmp.integer.value = param;
 311
 312         obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
 313                         1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
 314         if (!obj) {
 315                 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
 316                 return -EIO;
 317         }
 318
 319         ACPI_FREE(obj);
 320
 321         return 0;
 322 }
 323 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
 324
 325 #ifdef CONFIG_PM
 326 static int dwc3_pci_runtime_suspend(struct device *dev)
 327 {
 328         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 329
 330         if (device_can_wakeup(dev))
 331                 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
 332
 333         return -EBUSY;
 334 }
 335
 336 static int dwc3_pci_runtime_resume(struct device *dev)
 337 {
 338         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 339         int                     ret;
 340
 341         ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
 342         if (ret)
 343                 return ret;
 344
 345         queue_work(pm_wq, &dwc->wakeup_work);
 346
 347         return 0;
 348 }
 349 #endif /* CONFIG_PM */
 350
 351 #ifdef CONFIG_PM_SLEEP
 352 static int dwc3_pci_suspend(struct device *dev)
 353 {
 354         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 355
 356         return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
 357 }
 358
 359 static int dwc3_pci_resume(struct device *dev)
 360 {
 361         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 362
 363         return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
 364 }
 365 #endif /* CONFIG_PM_SLEEP */
 366
 367 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
 368         SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
 369         SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
 370                 NULL)
 371 };
 372
 373 static struct pci_driver dwc3_pci_driver = {
 374         .name           = "dwc3-pci",
 375         .id_table       = dwc3_pci_id_table,
 376         .probe          = dwc3_pci_probe,
 377         .remove         = dwc3_pci_remove,
 378         .driver         = {
 379                 .pm     = &dwc3_pci_dev_pm_ops,
 380         }
 381 };
 382
 383 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 384 MODULE_LICENSE("GPL v2");
 385 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
 386
 387 module_pci_driver(dwc3_pci_driver);