1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_RETRIES 3
19 USB4_SB_TARGET_ROUTER,
20 USB4_SB_TARGET_PARTNER,
21 USB4_SB_TARGET_RETIMER,
24 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
25 #define USB4_NVM_READ_OFFSET_SHIFT 2
26 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
27 #define USB4_NVM_READ_LENGTH_SHIFT 24
29 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
30 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
32 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
33 #define USB4_DROM_ADDRESS_SHIFT 2
34 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
35 #define USB4_DROM_SIZE_SHIFT 15
37 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
39 static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
40 u32 value, int timeout_msec)
42 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
48 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
52 if ((val & bit) == value)
55 usleep_range(50, 100);
56 } while (ktime_before(ktime_get(), timeout));
61 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
62 u32 *metadata, u8 *status,
63 const void *tx_data, size_t tx_dwords,
64 void *rx_data, size_t rx_dwords)
70 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
75 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
81 val = opcode | ROUTER_CS_26_OV;
82 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
86 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
90 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
94 if (val & ROUTER_CS_26_ONS)
98 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
99 ROUTER_CS_26_STATUS_SHIFT;
102 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
107 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
116 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
117 u8 *status, const void *tx_data, size_t tx_dwords,
118 void *rx_data, size_t rx_dwords)
120 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
122 if (tx_dwords > NVM_DATA_DWORDS || rx_dwords > NVM_DATA_DWORDS)
126 * If the connection manager implementation provides USB4 router
127 * operation proxy callback, call it here instead of running the
128 * operation natively.
130 if (cm_ops->usb4_switch_op) {
133 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
134 tx_data, tx_dwords, rx_data,
136 if (ret != -EOPNOTSUPP)
140 * If the proxy was not supported then run the native
141 * router operation instead.
145 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
146 tx_dwords, rx_data, rx_dwords);
149 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
150 u32 *metadata, u8 *status)
152 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
155 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
156 u32 *metadata, u8 *status,
157 const void *tx_data, size_t tx_dwords,
158 void *rx_data, size_t rx_dwords)
160 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
161 tx_dwords, rx_data, rx_dwords);
164 static void usb4_switch_check_wakes(struct tb_switch *sw)
166 struct tb_port *port;
170 if (!device_may_wakeup(&sw->dev))
174 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
177 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
178 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
179 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
181 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
184 /* Check for any connected downstream ports for USB4 wake */
185 tb_switch_for_each_port(sw, port) {
186 if (!tb_port_has_remote(port))
189 if (tb_port_read(port, &val, TB_CFG_PORT,
190 port->cap_usb4 + PORT_CS_18, 1))
193 tb_port_dbg(port, "USB4 wake: %s\n",
194 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
196 if (val & PORT_CS_18_WOU4S)
201 pm_wakeup_event(&sw->dev, 0);
204 static bool link_is_usb4(struct tb_port *port)
211 if (tb_port_read(port, &val, TB_CFG_PORT,
212 port->cap_usb4 + PORT_CS_18, 1))
215 return !(val & PORT_CS_18_TCM);
219 * usb4_switch_setup() - Additional setup for USB4 device
220 * @sw: USB4 router to setup
222 * USB4 routers need additional settings in order to enable all the
223 * tunneling. This function enables USB and PCIe tunneling if it can be
224 * enabled (e.g the parent switch also supports them). If USB tunneling
225 * is not available for some reason (like that there is Thunderbolt 3
226 * switch upstream) then the internal xHCI controller is enabled
229 int usb4_switch_setup(struct tb_switch *sw)
231 struct tb_port *downstream_port;
232 struct tb_switch *parent;
237 usb4_switch_check_wakes(sw);
242 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
246 parent = tb_switch_parent(sw);
247 downstream_port = tb_port_at(tb_route(sw), parent);
248 sw->link_usb4 = link_is_usb4(downstream_port);
249 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3");
251 xhci = val & ROUTER_CS_6_HCI;
252 tbt3 = !(val & ROUTER_CS_6_TNS);
254 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
255 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
257 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
261 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
262 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
263 val |= ROUTER_CS_5_UTO;
268 * Only enable PCIe tunneling if the parent router supports it
269 * and it is not disabled.
271 if (tb_acpi_may_tunnel_pcie() &&
272 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
273 val |= ROUTER_CS_5_PTO;
275 * xHCI can be enabled if PCIe tunneling is supported
276 * and the parent does not have any USB3 dowstream
277 * adapters (so we cannot do USB 3.x tunneling).
280 val |= ROUTER_CS_5_HCO;
283 /* TBT3 supported by the CM */
284 val |= ROUTER_CS_5_C3S;
285 /* Tunneling configuration is ready now */
286 val |= ROUTER_CS_5_CV;
288 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
292 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
297 * usb4_switch_read_uid() - Read UID from USB4 router
299 * @uid: UID is stored here
301 * Reads 64-bit UID from USB4 router config space.
303 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
305 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
308 static int usb4_switch_drom_read_block(void *data,
309 unsigned int dwaddress, void *buf,
312 struct tb_switch *sw = data;
317 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
318 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
319 USB4_DROM_ADDRESS_MASK;
321 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
322 &status, NULL, 0, buf, dwords);
326 return status ? -EIO : 0;
330 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
332 * @address: Byte address inside DROM to start reading
333 * @buf: Buffer where the DROM content is stored
334 * @size: Number of bytes to read from DROM
336 * Uses USB4 router operations to read router DROM. For devices this
337 * should always work but for hosts it may return %-EOPNOTSUPP in which
338 * case the host router does not have DROM.
340 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
343 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
344 usb4_switch_drom_read_block, sw);
348 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
351 * Checks whether conditions are met so that lane bonding can be
352 * established with the upstream router. Call only for device routers.
354 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
360 up = tb_upstream_port(sw);
361 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
365 return !!(val & PORT_CS_18_BE);
369 * usb4_switch_set_wake() - Enabled/disable wake
371 * @flags: Wakeup flags (%0 to disable)
373 * Enables/disables router to wake up from sleep.
375 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
377 struct tb_port *port;
378 u64 route = tb_route(sw);
383 * Enable wakes coming from all USB4 downstream ports (from
384 * child routers). For device routers do this also for the
385 * upstream USB4 port.
387 tb_switch_for_each_port(sw, port) {
388 if (!tb_port_is_null(port))
390 if (!route && tb_is_upstream_port(port))
395 ret = tb_port_read(port, &val, TB_CFG_PORT,
396 port->cap_usb4 + PORT_CS_19, 1);
400 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
402 if (flags & TB_WAKE_ON_CONNECT)
403 val |= PORT_CS_19_WOC;
404 if (flags & TB_WAKE_ON_DISCONNECT)
405 val |= PORT_CS_19_WOD;
406 if (flags & TB_WAKE_ON_USB4)
407 val |= PORT_CS_19_WOU4;
409 ret = tb_port_write(port, &val, TB_CFG_PORT,
410 port->cap_usb4 + PORT_CS_19, 1);
416 * Enable wakes from PCIe, USB 3.x and DP on this router. Only
417 * needed for device routers.
420 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
424 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU | ROUTER_CS_5_WOD);
425 if (flags & TB_WAKE_ON_USB3)
426 val |= ROUTER_CS_5_WOU;
427 if (flags & TB_WAKE_ON_PCIE)
428 val |= ROUTER_CS_5_WOP;
429 if (flags & TB_WAKE_ON_DP)
430 val |= ROUTER_CS_5_WOD;
432 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
441 * usb4_switch_set_sleep() - Prepare the router to enter sleep
444 * Sets sleep bit for the router. Returns when the router sleep ready
445 * bit has been asserted.
447 int usb4_switch_set_sleep(struct tb_switch *sw)
452 /* Set sleep bit and wait for sleep ready to be asserted */
453 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
457 val |= ROUTER_CS_5_SLP;
459 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
463 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
464 ROUTER_CS_6_SLPR, 500);
468 * usb4_switch_nvm_sector_size() - Return router NVM sector size
471 * If the router supports NVM operations this function returns the NVM
472 * sector size in bytes. If NVM operations are not supported returns
475 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
481 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
487 return status == 0x2 ? -EOPNOTSUPP : -EIO;
489 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
492 static int usb4_switch_nvm_read_block(void *data,
493 unsigned int dwaddress, void *buf, size_t dwords)
495 struct tb_switch *sw = data;
500 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
501 USB4_NVM_READ_LENGTH_MASK;
502 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
503 USB4_NVM_READ_OFFSET_MASK;
505 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
506 &status, NULL, 0, buf, dwords);
510 return status ? -EIO : 0;
514 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
516 * @address: Starting address in bytes
517 * @buf: Read data is placed here
518 * @size: How many bytes to read
520 * Reads NVM contents of the router. If NVM is not supported returns
523 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
526 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
527 usb4_switch_nvm_read_block, sw);
530 static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
531 unsigned int address)
533 u32 metadata, dwaddress;
537 dwaddress = address / 4;
538 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
539 USB4_NVM_SET_OFFSET_MASK;
541 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
546 return status ? -EIO : 0;
549 static int usb4_switch_nvm_write_next_block(void *data, unsigned int dwaddress,
550 const void *buf, size_t dwords)
552 struct tb_switch *sw = data;
556 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
557 buf, dwords, NULL, 0);
561 return status ? -EIO : 0;
565 * usb4_switch_nvm_write() - Write to the router NVM
567 * @address: Start address where to write in bytes
568 * @buf: Pointer to the data to write
569 * @size: Size of @buf in bytes
571 * Writes @buf to the router NVM using USB4 router operations. If NVM
572 * write is not supported returns %-EOPNOTSUPP.
574 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
575 const void *buf, size_t size)
579 ret = usb4_switch_nvm_set_offset(sw, address);
583 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
584 usb4_switch_nvm_write_next_block, sw);
588 * usb4_switch_nvm_authenticate() - Authenticate new NVM
591 * After the new NVM has been written via usb4_switch_nvm_write(), this
592 * function triggers NVM authentication process. The router gets power
593 * cycled and if the authentication is successful the new NVM starts
594 * running. In case of failure returns negative errno.
596 * The caller should call usb4_switch_nvm_authenticate_status() to read
597 * the status of the authentication after power cycle. It should be the
598 * first router operation to avoid the status being lost.
600 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
604 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
607 * The router is power cycled once NVM_AUTH is started so it is
608 * expected to get any of the following errors back.
621 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
623 * @status: Status code of the operation
625 * The function checks if there is status available from the last NVM
626 * authenticate router operation. If there is status then %0 is returned
627 * and the status code is placed in @status. Returns negative errno in case
630 * Must be called before any other router operation.
632 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
634 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
639 if (cm_ops->usb4_switch_nvm_authenticate_status) {
640 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
641 if (ret != -EOPNOTSUPP)
645 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
649 /* Check that the opcode is correct */
650 opcode = val & ROUTER_CS_26_OPCODE_MASK;
651 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
652 if (val & ROUTER_CS_26_OV)
654 if (val & ROUTER_CS_26_ONS)
657 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
658 ROUTER_CS_26_STATUS_SHIFT;
667 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
671 * For DP tunneling this function can be used to query availability of
672 * DP IN resource. Returns true if the resource is available for DP
673 * tunneling, false otherwise.
675 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
677 u32 metadata = in->port;
681 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
684 * If DP resource allocation is not supported assume it is
687 if (ret == -EOPNOTSUPP)
696 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
700 * Allocates DP IN resource for DP tunneling using USB4 router
701 * operations. If the resource was allocated returns %0. Otherwise
702 * returns negative errno, in particular %-EBUSY if the resource is
705 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
707 u32 metadata = in->port;
711 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
713 if (ret == -EOPNOTSUPP)
718 return status ? -EBUSY : 0;
722 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
726 * Releases the previously allocated DP IN resource.
728 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
730 u32 metadata = in->port;
734 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
736 if (ret == -EOPNOTSUPP)
741 return status ? -EIO : 0;
744 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
749 /* Assume port is primary */
750 tb_switch_for_each_port(sw, p) {
751 if (!tb_port_is_null(p))
753 if (tb_is_upstream_port(p))
766 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
770 * USB4 routers have direct mapping between USB4 ports and PCIe
771 * downstream adapters where the PCIe topology is extended. This
772 * function returns the corresponding downstream PCIe adapter or %NULL
773 * if no such mapping was possible.
775 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
776 const struct tb_port *port)
778 int usb4_idx = usb4_port_idx(sw, port);
782 /* Find PCIe down port matching usb4_port */
783 tb_switch_for_each_port(sw, p) {
784 if (!tb_port_is_pcie_down(p))
787 if (pcie_idx == usb4_idx)
797 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
801 * USB4 routers have direct mapping between USB4 ports and USB 3.x
802 * downstream adapters where the USB 3.x topology is extended. This
803 * function returns the corresponding downstream USB 3.x adapter or
804 * %NULL if no such mapping was possible.
806 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
807 const struct tb_port *port)
809 int usb4_idx = usb4_port_idx(sw, port);
813 /* Find USB3 down port matching usb4_port */
814 tb_switch_for_each_port(sw, p) {
815 if (!tb_port_is_usb3_down(p))
818 if (usb_idx == usb4_idx)
828 * usb4_port_unlock() - Unlock USB4 downstream port
829 * @port: USB4 port to unlock
831 * Unlocks USB4 downstream port so that the connection manager can
832 * access the router below this port.
834 int usb4_port_unlock(struct tb_port *port)
839 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
843 val &= ~ADP_CS_4_LCK;
844 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
847 static int usb4_port_set_configured(struct tb_port *port, bool configured)
855 ret = tb_port_read(port, &val, TB_CFG_PORT,
856 port->cap_usb4 + PORT_CS_19, 1);
861 val |= PORT_CS_19_PC;
863 val &= ~PORT_CS_19_PC;
865 return tb_port_write(port, &val, TB_CFG_PORT,
866 port->cap_usb4 + PORT_CS_19, 1);
870 * usb4_port_configure() - Set USB4 port configured
873 * Sets the USB4 link to be configured for power management purposes.
875 int usb4_port_configure(struct tb_port *port)
877 return usb4_port_set_configured(port, true);
881 * usb4_port_unconfigure() - Set USB4 port unconfigured
884 * Sets the USB4 link to be unconfigured for power management purposes.
886 void usb4_port_unconfigure(struct tb_port *port)
888 usb4_port_set_configured(port, false);
891 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
899 ret = tb_port_read(port, &val, TB_CFG_PORT,
900 port->cap_usb4 + PORT_CS_19, 1);
905 val |= PORT_CS_19_PID;
907 val &= ~PORT_CS_19_PID;
909 return tb_port_write(port, &val, TB_CFG_PORT,
910 port->cap_usb4 + PORT_CS_19, 1);
914 * usb4_port_configure_xdomain() - Configure port for XDomain
915 * @port: USB4 port connected to another host
917 * Marks the USB4 port as being connected to another host. Returns %0 in
918 * success and negative errno in failure.
920 int usb4_port_configure_xdomain(struct tb_port *port)
922 return usb4_set_xdomain_configured(port, true);
926 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
927 * @port: USB4 port that was connected to another host
929 * Clears USB4 port from being marked as XDomain.
931 void usb4_port_unconfigure_xdomain(struct tb_port *port)
933 usb4_set_xdomain_configured(port, false);
936 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
937 u32 value, int timeout_msec)
939 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
945 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
949 if ((val & bit) == value)
952 usleep_range(50, 100);
953 } while (ktime_before(ktime_get(), timeout));
958 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
960 if (dwords > NVM_DATA_DWORDS)
963 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
967 static int usb4_port_write_data(struct tb_port *port, const void *data,
970 if (dwords > NVM_DATA_DWORDS)
973 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
977 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
978 u8 index, u8 reg, void *buf, u8 size)
980 size_t dwords = DIV_ROUND_UP(size, 4);
988 val |= size << PORT_CS_1_LENGTH_SHIFT;
989 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
990 if (target == USB4_SB_TARGET_RETIMER)
991 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
992 val |= PORT_CS_1_PND;
994 ret = tb_port_write(port, &val, TB_CFG_PORT,
995 port->cap_usb4 + PORT_CS_1, 1);
999 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1000 PORT_CS_1_PND, 0, 500);
1004 ret = tb_port_read(port, &val, TB_CFG_PORT,
1005 port->cap_usb4 + PORT_CS_1, 1);
1009 if (val & PORT_CS_1_NR)
1011 if (val & PORT_CS_1_RC)
1014 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1017 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1018 u8 index, u8 reg, const void *buf, u8 size)
1020 size_t dwords = DIV_ROUND_UP(size, 4);
1024 if (!port->cap_usb4)
1028 ret = usb4_port_write_data(port, buf, dwords);
1034 val |= size << PORT_CS_1_LENGTH_SHIFT;
1035 val |= PORT_CS_1_WNR_WRITE;
1036 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1037 if (target == USB4_SB_TARGET_RETIMER)
1038 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1039 val |= PORT_CS_1_PND;
1041 ret = tb_port_write(port, &val, TB_CFG_PORT,
1042 port->cap_usb4 + PORT_CS_1, 1);
1046 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1047 PORT_CS_1_PND, 0, 500);
1051 ret = tb_port_read(port, &val, TB_CFG_PORT,
1052 port->cap_usb4 + PORT_CS_1, 1);
1056 if (val & PORT_CS_1_NR)
1058 if (val & PORT_CS_1_RC)
1064 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1065 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1072 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1077 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1081 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1090 case USB4_SB_OPCODE_ERR:
1093 case USB4_SB_OPCODE_ONS:
1101 } while (ktime_before(ktime_get(), timeout));
1107 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1110 * This forces the USB4 port to send broadcast RT transaction which
1111 * makes the retimers on the link to assign index to themselves. Returns
1112 * %0 in case of success and negative errno if there was an error.
1114 int usb4_port_enumerate_retimers(struct tb_port *port)
1118 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1119 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1120 USB4_SB_OPCODE, &val, sizeof(val));
1123 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1124 enum usb4_sb_opcode opcode,
1127 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1132 * usb4_port_retimer_read() - Read from retimer sideband registers
1134 * @index: Retimer index
1135 * @reg: Sideband register to read
1136 * @buf: Data from @reg is stored here
1137 * @size: Number of bytes to read
1139 * Function reads retimer sideband registers starting from @reg. The
1140 * retimer is connected to @port at @index. Returns %0 in case of
1141 * success, and read data is copied to @buf. If there is no retimer
1142 * present at given @index returns %-ENODEV. In any other failure
1143 * returns negative errno.
1145 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1148 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1153 * usb4_port_retimer_write() - Write to retimer sideband registers
1155 * @index: Retimer index
1156 * @reg: Sideband register to write
1157 * @buf: Data that is written starting from @reg
1158 * @size: Number of bytes to write
1160 * Writes retimer sideband registers starting from @reg. The retimer is
1161 * connected to @port at @index. Returns %0 in case of success. If there
1162 * is no retimer present at given @index returns %-ENODEV. In any other
1163 * failure returns negative errno.
1165 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1166 const void *buf, u8 size)
1168 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1173 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1175 * @index: Retimer index
1177 * If the retimer at @index is last one (connected directly to the
1178 * Type-C port) this function returns %1. If it is not returns %0. If
1179 * the retimer is not present returns %-ENODEV. Otherwise returns
1182 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1187 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1192 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1194 return ret ? ret : metadata & 1;
1198 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1200 * @index: Retimer index
1202 * Reads NVM sector size (in bytes) of a retimer at @index. This
1203 * operation can be used to determine whether the retimer supports NVM
1204 * upgrade for example. Returns sector size in bytes or negative errno
1205 * in case of error. Specifically returns %-ENODEV if there is no
1206 * retimer at @index.
1208 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1213 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1218 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1220 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1223 static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1224 unsigned int address)
1226 u32 metadata, dwaddress;
1229 dwaddress = address / 4;
1230 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1231 USB4_NVM_SET_OFFSET_MASK;
1233 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1238 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1242 struct retimer_info {
1243 struct tb_port *port;
1247 static int usb4_port_retimer_nvm_write_next_block(void *data,
1248 unsigned int dwaddress, const void *buf, size_t dwords)
1251 const struct retimer_info *info = data;
1252 struct tb_port *port = info->port;
1253 u8 index = info->index;
1256 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1261 return usb4_port_retimer_op(port, index,
1262 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1266 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1268 * @index: Retimer index
1269 * @address: Byte address where to start the write
1270 * @buf: Data to write
1271 * @size: Size in bytes how much to write
1273 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1274 * upgrade. Returns %0 if the data was written successfully and negative
1275 * errno in case of failure. Specifically returns %-ENODEV if there is
1276 * no retimer at @index.
1278 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1279 const void *buf, size_t size)
1281 struct retimer_info info = { .port = port, .index = index };
1284 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1288 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
1289 usb4_port_retimer_nvm_write_next_block, &info);
1293 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1295 * @index: Retimer index
1297 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1298 * this function can be used to trigger the NVM upgrade process. If
1299 * successful the retimer restarts with the new NVM and may not have the
1300 * index set so one needs to call usb4_port_enumerate_retimers() to
1301 * force index to be assigned.
1303 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1308 * We need to use the raw operation here because once the
1309 * authentication completes the retimer index is not set anymore
1310 * so we do not get back the status now.
1312 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1313 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1314 USB4_SB_OPCODE, &val, sizeof(val));
1318 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1320 * @index: Retimer index
1321 * @status: Raw status code read from metadata
1323 * This can be called after usb4_port_retimer_nvm_authenticate() and
1324 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1326 * Returns %0 if the authentication status was successfully read. The
1327 * completion metadata (the result) is then stored into @status. If
1328 * reading the status fails, returns negative errno.
1330 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1336 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1346 case USB4_SB_OPCODE_ERR:
1347 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1348 &metadata, sizeof(metadata));
1352 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1355 case USB4_SB_OPCODE_ONS:
1363 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1364 void *buf, size_t dwords)
1366 const struct retimer_info *info = data;
1367 struct tb_port *port = info->port;
1368 u8 index = info->index;
1372 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1373 if (dwords < NVM_DATA_DWORDS)
1374 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1376 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1381 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1385 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1390 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1392 * @index: Retimer index
1393 * @address: NVM address (in bytes) to start reading
1394 * @buf: Data read from NVM is stored here
1395 * @size: Number of bytes to read
1397 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1398 * read was successful and negative errno in case of failure.
1399 * Specifically returns %-ENODEV if there is no retimer at @index.
1401 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1402 unsigned int address, void *buf, size_t size)
1404 struct retimer_info info = { .port = port, .index = index };
1406 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
1407 usb4_port_retimer_nvm_read_block, &info);
1411 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1412 * @port: USB3 adapter port
1414 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1415 * Negative errno in case of error.
1417 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1422 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1425 ret = tb_port_read(port, &val, TB_CFG_PORT,
1426 port->cap_adap + ADP_USB3_CS_4, 1);
1430 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1431 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1435 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1436 * @port: USB3 adapter port
1438 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1439 * link is not up returns %0 and negative errno in case of failure.
1441 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1446 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1449 ret = tb_port_read(port, &val, TB_CFG_PORT,
1450 port->cap_adap + ADP_USB3_CS_4, 1);
1454 if (!(val & ADP_USB3_CS_4_ULV))
1457 lr = val & ADP_USB3_CS_4_ALR_MASK;
1458 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1461 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1466 if (!tb_port_is_usb3_down(port))
1468 if (tb_route(port->sw))
1471 ret = tb_port_read(port, &val, TB_CFG_PORT,
1472 port->cap_adap + ADP_USB3_CS_2, 1);
1477 val |= ADP_USB3_CS_2_CMR;
1479 val &= ~ADP_USB3_CS_2_CMR;
1481 ret = tb_port_write(port, &val, TB_CFG_PORT,
1482 port->cap_adap + ADP_USB3_CS_2, 1);
1487 * We can use val here directly as the CMR bit is in the same place
1488 * as HCA. Just mask out others.
1490 val &= ADP_USB3_CS_2_CMR;
1491 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1492 ADP_USB3_CS_1_HCA, val, 1500);
1495 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1497 return usb4_usb3_port_cm_request(port, true);
1500 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1502 return usb4_usb3_port_cm_request(port, false);
1505 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1507 unsigned long uframes;
1509 uframes = bw * 512UL << scale;
1510 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1513 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1515 unsigned long uframes;
1517 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1518 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1519 return DIV_ROUND_UP(uframes, 512UL << scale);
1522 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1529 ret = tb_port_read(port, &val, TB_CFG_PORT,
1530 port->cap_adap + ADP_USB3_CS_2, 1);
1534 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1535 port->cap_adap + ADP_USB3_CS_3, 1);
1539 scale &= ADP_USB3_CS_3_SCALE_MASK;
1541 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1542 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1544 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1545 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1551 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1552 * @port: USB3 adapter port
1553 * @upstream_bw: Allocated upstream bandwidth is stored here
1554 * @downstream_bw: Allocated downstream bandwidth is stored here
1556 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1557 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1560 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1565 ret = usb4_usb3_port_set_cm_request(port);
1569 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1571 usb4_usb3_port_clear_cm_request(port);
1576 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1583 ret = tb_port_read(port, &val, TB_CFG_PORT,
1584 port->cap_adap + ADP_USB3_CS_1, 1);
1588 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1589 port->cap_adap + ADP_USB3_CS_3, 1);
1593 scale &= ADP_USB3_CS_3_SCALE_MASK;
1595 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1596 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1598 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1599 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1604 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1608 u32 val, ubw, dbw, scale;
1611 /* Read the used scale, hardware default is 0 */
1612 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1613 port->cap_adap + ADP_USB3_CS_3, 1);
1617 scale &= ADP_USB3_CS_3_SCALE_MASK;
1618 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1619 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1621 ret = tb_port_read(port, &val, TB_CFG_PORT,
1622 port->cap_adap + ADP_USB3_CS_2, 1);
1626 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1627 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1630 return tb_port_write(port, &val, TB_CFG_PORT,
1631 port->cap_adap + ADP_USB3_CS_2, 1);
1635 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1636 * @port: USB3 adapter port
1637 * @upstream_bw: New upstream bandwidth
1638 * @downstream_bw: New downstream bandwidth
1640 * This can be used to set how much bandwidth is allocated for the USB3
1641 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1642 * new values programmed to the USB3 adapter allocation registers. If
1643 * the values are lower than what is currently consumed the allocation
1644 * is set to what is currently consumed instead (consumed bandwidth
1645 * cannot be taken away by CM). The actual new values are returned in
1646 * @upstream_bw and @downstream_bw.
1648 * Returns %0 in case of success and negative errno if there was a
1651 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1654 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1656 ret = usb4_usb3_port_set_cm_request(port);
1660 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1665 /* Don't allow it go lower than what is consumed */
1666 allocate_up = max(*upstream_bw, consumed_up);
1667 allocate_down = max(*downstream_bw, consumed_down);
1669 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1674 *upstream_bw = allocate_up;
1675 *downstream_bw = allocate_down;
1678 usb4_usb3_port_clear_cm_request(port);
1683 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
1684 * @port: USB3 adapter port
1685 * @upstream_bw: New allocated upstream bandwidth
1686 * @downstream_bw: New allocated downstream bandwidth
1688 * Releases USB3 allocated bandwidth down to what is actually consumed.
1689 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
1691 * Returns 0% in success and negative errno in case of failure.
1693 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1696 int ret, consumed_up, consumed_down;
1698 ret = usb4_usb3_port_set_cm_request(port);
1702 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1708 * Always keep 1000 Mb/s to make sure xHCI has at least some
1709 * bandwidth available for isochronous traffic.
1711 if (consumed_up < 1000)
1713 if (consumed_down < 1000)
1714 consumed_down = 1000;
1716 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
1721 *upstream_bw = consumed_up;
1722 *downstream_bw = consumed_down;
1725 usb4_usb3_port_clear_cm_request(port);