d1086699f952c04967e4823bc62120ecc1be0ccc
[linux-2.6-microblaze.git] / drivers / staging / rtl8188eu / hal / rtl8188e_hal_init.c
1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5  *
6  ******************************************************************************/
7 #define _HAL_INIT_C_
8
9 #include <linux/firmware.h>
10 #include <linux/vmalloc.h>
11 #include <drv_types.h>
12 #include <rtw_efuse.h>
13 #include <phy.h>
14 #include <rtl8188e_hal.h>
15
16 #include <rtw_iol.h>
17
18 void iol_mode_enable(struct adapter *padapter, u8 enable)
19 {
20         u8 reg_0xf0 = 0;
21
22         if (enable) {
23                 /* Enable initial offload */
24                 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
25                 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN);
26
27                 if (!padapter->bFWReady)
28                         _8051Reset88E(padapter);
29         } else {
30                 /* disable initial offload */
31                 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
32                 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
33         }
34 }
35
36 s32 iol_execute(struct adapter *padapter, u8 control)
37 {
38         s32 status = _FAIL;
39         u8 reg_0x88 = 0;
40         unsigned long start = 0;
41
42         control = control & 0x0f;
43         reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
44         usb_write8(padapter, REG_HMEBOX_E0,  reg_0x88 | control);
45
46         start = jiffies;
47         while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
48                jiffies_to_msecs(jiffies - start) < 1000) {
49                 udelay(5);
50         }
51
52         reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
53         status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
54         if (reg_0x88 & control << 4)
55                 status = _FAIL;
56         return status;
57 }
58
59 static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
60 {
61         s32 rst = _SUCCESS;
62
63         iol_mode_enable(padapter, 1);
64         usb_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
65         rst = iol_execute(padapter, CMD_INIT_LLT);
66         iol_mode_enable(padapter, 0);
67         return rst;
68 }
69
70 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
71 {
72         s32     result = _SUCCESS;
73
74         if (rtw_iol_applied(padapter)) {
75                 iol_mode_enable(padapter, 1);
76                 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
77                 if (result == _SUCCESS)
78                         result = iol_execute(padapter, CMD_EFUSE_PATCH);
79
80                 iol_mode_enable(padapter, 0);
81         }
82         return result;
83 }
84
85 #define MAX_REG_BOLCK_SIZE      196
86
87 void _8051Reset88E(struct adapter *padapter)
88 {
89         u8 u1bTmp;
90
91         u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN + 1);
92         usb_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT(2)));
93         usb_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp | (BIT(2)));
94 }
95
96 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
97 {
98         /*  Init Fw LPS related. */
99         padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
100
101         /*  Init H2C counter. by tynli. 2009.12.09. */
102         padapter->HalData->LastHMEBoxNum = 0;
103 }
104
105 void rtw_hal_free_data(struct adapter *padapter)
106 {
107         kfree(padapter->HalData);
108         padapter->HalData = NULL;
109 }
110
111 void rtw_hal_read_chip_version(struct adapter *padapter)
112 {
113         u32                             value32;
114         struct HAL_VERSION              ChipVersion;
115         struct hal_data_8188e *pHalData = padapter->HalData;
116
117         value32 = usb_read32(padapter, REG_SYS_CFG);
118         ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
119         ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
120         ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /*  IC version (CUT) */
121
122         dump_chip_info(ChipVersion);
123
124         pHalData->VersionID = ChipVersion;
125 }
126
127 void rtw_hal_set_odm_var(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
128 {
129         struct odm_dm_struct *podmpriv = &Adapter->HalData->odmpriv;
130
131         switch (eVariable) {
132         case HAL_ODM_STA_INFO:
133                 {
134                         struct sta_info *psta = pValue1;
135
136                         if (bSet) {
137                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
138                                 ODM_RAInfo_Init(podmpriv, psta->mac_id);
139                         } else {
140                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
141                         }
142                 }
143                 break;
144         case HAL_ODM_P2P_STATE:
145                 podmpriv->bWIFI_Direct = bSet;
146                 break;
147         case HAL_ODM_WIFI_DISPLAY_STATE:
148                 podmpriv->bWIFI_Display = bSet;
149                 break;
150         default:
151                 break;
152         }
153 }
154
155 void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
156 {
157         if (enable)
158                 usb_write8(adapter, rOFDM0_RxDSP + 1, usb_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
159         else
160                 usb_write8(adapter, rOFDM0_RxDSP + 1, usb_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
161 }
162
163 /*  */
164 /*  */
165 /*  LLT R/W/Init function */
166 /*  */
167 /*  */
168 static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
169 {
170         s32     status = _SUCCESS;
171         s32     count = 0;
172         u32     value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
173         u16     LLTReg = REG_LLT_INIT;
174
175         usb_write32(padapter, LLTReg, value);
176
177         /* polling */
178         do {
179                 value = usb_read32(padapter, LLTReg);
180                 if (_LLT_OP_VALUE(value) == _LLT_NO_ACTIVE)
181                         break;
182
183                 if (count > POLLING_LLT_THRESHOLD) {
184                         status = _FAIL;
185                         break;
186                 }
187                 udelay(5);
188         } while (count++);
189
190         return status;
191 }
192
193 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
194 {
195         s32     status = _FAIL;
196         u32     i;
197         u32     Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/*  176, 22k */
198
199         if (rtw_iol_applied(padapter)) {
200                 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
201         } else {
202                 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
203                         status = _LLTWrite(padapter, i, i + 1);
204                         if (status != _SUCCESS)
205                                 return status;
206                 }
207
208                 /*  end of list */
209                 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
210                 if (status != _SUCCESS)
211                         return status;
212
213                 /*  Make the other pages as ring buffer */
214                 /*  This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
215                 /*  Otherwise used as local loopback buffer. */
216                 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
217                         status = _LLTWrite(padapter, i, (i + 1));
218                         if (status != _SUCCESS)
219                                 return status;
220                 }
221
222                 /*  Let last entry point to the start entry of ring buffer */
223                 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
224                 if (status != _SUCCESS)
225                         return status;
226         }
227
228         return status;
229 }
230
231 void Hal_InitPGData88E(struct adapter *padapter)
232 {
233         if (!is_boot_from_eeprom(padapter))
234                 EFUSE_ShadowMapUpdate(padapter);
235 }
236
237 void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo)
238 {
239         struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
240         u16                     EEPROMId;
241
242         /*  Checl 0x8129 again for making sure autoload status!! */
243         EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
244         if (EEPROMId != RTL_EEPROM_ID)
245                 pEEPROM->bautoload_fail_flag = true;
246         else
247                 pEEPROM->bautoload_fail_flag = false;
248 }
249
250 static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
251 {
252         u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
253
254         memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
255
256         if (AutoLoadFail) {
257                 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
258                         /* 2.4G default value */
259                         for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
260                                 pwrInfo24G->IndexCCK_Base[rfPath][group] =      EEPROM_DEFAULT_24G_INDEX;
261                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
262                         }
263                         for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
264                                 if (TxCount == 0) {
265                                         pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
266                                         pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
267                                 } else {
268                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
269                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
270                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
271                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
272                                 }
273                         }
274                 }
275                 return;
276         }
277
278         for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
279                 /* 2.4G default value */
280                 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
281                         pwrInfo24G->IndexCCK_Base[rfPath][group] =      PROMContent[eeAddr++];
282                         if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
283                                 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
284                 }
285                 for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) {
286                         pwrInfo24G->IndexBW40_Base[rfPath][group] =     PROMContent[eeAddr++];
287                         if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
288                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
289                 }
290                 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
291                         if (TxCount == 0) {
292                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
293                                 if (PROMContent[eeAddr] == 0xFF) {
294                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
295                                 } else {
296                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4;
297                                         if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
298                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
299                                 }
300
301                                 if (PROMContent[eeAddr] == 0xFF) {
302                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_OFDM_DIFF;
303                                 } else {
304                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr] & 0x0f);
305                                         if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
306                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
307                                 }
308                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
309                                 eeAddr++;
310                         } else {
311                                 if (PROMContent[eeAddr] == 0xFF) {
312                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
313                                 } else {
314                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        (PROMContent[eeAddr] & 0xf0) >> 4;
315                                         if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
316                                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
317                                 }
318
319                                 if (PROMContent[eeAddr] == 0xFF) {
320                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
321                                 } else {
322                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr] & 0x0f);
323                                         if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
324                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
325                                 }
326                                 eeAddr++;
327
328                                 if (PROMContent[eeAddr] == 0xFF) {
329                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
330                                 } else {
331                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr] & 0xf0) >> 4;
332                                         if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
333                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
334                                 }
335
336                                 if (PROMContent[eeAddr] == 0xFF) {
337                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
338                                 } else {
339                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f);
340                                         if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3))             /* 4bit sign number to 8 bit sign number */
341                                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
342                                 }
343                                 eeAddr++;
344                         }
345                 }
346         }
347 }
348
349 void Hal_GetChnlGroup88E(u8 chnl, u8 *group)
350 {
351         if (chnl < 3)                   /*  Channel 1-2 */
352                 *group = 0;
353         else if (chnl < 6)              /*  Channel 3-5 */
354                 *group = 1;
355         else if (chnl < 9)              /*  Channel 6-8 */
356                 *group = 2;
357         else if (chnl < 12)             /*  Channel 9-11 */
358                 *group = 3;
359         else if (chnl < 14)             /*  Channel 12-13 */
360                 *group = 4;
361         else if (chnl == 14)            /*  Channel 14 */
362                 *group = 5;
363 }
364
365 void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
366 {
367         if (AutoLoadFail) {
368                 padapter->pwrctrlpriv.bHWPowerdown = false;
369                 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
370         } else {
371                 /* hw power down mode selection , 0:rf-off / 1:power down */
372
373                 if (padapter->registrypriv.hwpdn_mode == 2)
374                         padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
375                 else
376                         padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
377
378                 /*  decide hw if support remote wakeup function */
379                 /*  if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
380                 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
381         }
382 }
383
384 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
385 {
386         struct hal_data_8188e *pHalData = padapter->HalData;
387         struct txpowerinfo24g pwrInfo24G;
388         u8 ch, group;
389         u8 TxCount;
390
391         Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
392
393         if (!AutoLoadFail)
394                 pHalData->bTXPowerDataReadFromEEPORM = true;
395
396         for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
397                 Hal_GetChnlGroup88E(ch, &group);
398                 pHalData->Index24G_CCK_Base[0][ch] = pwrInfo24G.IndexCCK_Base[0][group];
399                 if (ch == 14)
400                         pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][4];
401                 else
402                         pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][group];
403         }
404         for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
405                 pHalData->CCK_24G_Diff[0][TxCount] = pwrInfo24G.CCK_Diff[0][TxCount];
406                 pHalData->OFDM_24G_Diff[0][TxCount] = pwrInfo24G.OFDM_Diff[0][TxCount];
407                 pHalData->BW20_24G_Diff[0][TxCount] = pwrInfo24G.BW20_Diff[0][TxCount];
408                 pHalData->BW40_24G_Diff[0][TxCount] = pwrInfo24G.BW40_Diff[0][TxCount];
409         }
410
411         /*  2010/10/19 MH Add Regulator recognize for CU. */
412         if (!AutoLoadFail) {
413                 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x7);   /* bit0~2 */
414                 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
415                         pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7);       /* bit0~2 */
416         } else {
417                 pHalData->EEPROMRegulatory = 0;
418         }
419 }
420
421 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
422 {
423         struct hal_data_8188e *pHalData = pAdapter->HalData;
424
425         if (!AutoLoadFail) {
426                 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
427                 if (pHalData->CrystalCap == 0xFF)
428                         pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
429         } else {
430                 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
431         }
432 }
433
434 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
435 {
436         struct hal_data_8188e *pHalData = pAdapter->HalData;
437
438         if (!AutoLoadFail)
439                 pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
440                                         & 0xE0) >> 5;
441         else
442                 pHalData->BoardType = 0;
443 }
444
445 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
446 {
447         struct hal_data_8188e *pHalData = padapter->HalData;
448
449         if (!AutoLoadFail) {
450                 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
451                 if (pHalData->EEPROMVersion == 0xFF)
452                         pHalData->EEPROMVersion = EEPROM_Default_Version;
453         } else {
454                 pHalData->EEPROMVersion = 1;
455         }
456 }
457
458 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
459 {
460         padapter->mlmepriv.ChannelPlan =
461                  hal_com_get_channel_plan(hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
462                                           padapter->registrypriv.channel_plan,
463                                           RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
464
465 }
466
467 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
468 {
469         struct hal_data_8188e   *pHalData = padapter->HalData;
470
471         if (!AutoLoadFail) {
472                 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
473         } else {
474                 pHalData->EEPROMCustomerID = 0;
475                 pHalData->EEPROMSubCustomerID = 0;
476         }
477 }
478
479 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
480 {
481         struct hal_data_8188e *pHalData = pAdapter->HalData;
482         struct registry_priv    *registry_par = &pAdapter->registrypriv;
483
484         if (!AutoLoadFail) {
485                 /*  Antenna Diversity setting. */
486                 if (registry_par->antdiv_cfg == 2) { /*  2:By EFUSE */
487                         pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x18) >> 3;
488                         if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
489                                 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION & 0x18) >> 3;
490                 } else {
491                         pHalData->AntDivCfg = registry_par->antdiv_cfg;  /*  0:OFF , 1:ON, 2:By EFUSE */
492                 }
493
494                 if (registry_par->antdiv_type == 0) {
495                         /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
496                         pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
497                         if (pHalData->TRxAntDivType == 0xFF)
498                                 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /*  For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
499                 } else {
500                         pHalData->TRxAntDivType = registry_par->antdiv_type;
501                 }
502
503                 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
504                         pHalData->AntDivCfg = 1; /*  0xC1[3] is ignored. */
505         } else {
506                 pHalData->AntDivCfg = 0;
507         }
508 }
509
510 void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
511 {
512         struct hal_data_8188e *pHalData = Adapter->HalData;
513
514         /*  ThermalMeter from EEPROM */
515         if (!AutoloadFail)
516                 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
517         else
518                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
519
520         if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
521                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
522         }
523 }