1 // SPDX-License-Identifier: GPL-2.0
3 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
5 * Copyright (c) 2010-2010 Analog Devices Inc.
7 #include <linux/types.h>
8 #include <linux/mutex.h>
9 #include <linux/device.h>
10 #include <linux/spi/spi.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/module.h>
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
20 #define DRV_NAME "ad2s1210"
22 #define AD2S1210_DEF_CONTROL 0x7E
24 #define AD2S1210_MSB_IS_HIGH 0x80
25 #define AD2S1210_MSB_IS_LOW 0x7F
26 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
27 #define AD2S1210_ENABLE_HYSTERESIS 0x10
28 #define AD2S1210_SET_ENRES1 0x08
29 #define AD2S1210_SET_ENRES0 0x04
30 #define AD2S1210_SET_RES1 0x02
31 #define AD2S1210_SET_RES0 0x01
33 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
35 #define AD2S1210_REG_POSITION 0x80
36 #define AD2S1210_REG_VELOCITY 0x82
37 #define AD2S1210_REG_LOS_THRD 0x88
38 #define AD2S1210_REG_DOS_OVR_THRD 0x89
39 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
40 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
41 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
42 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
43 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
44 #define AD2S1210_REG_EXCIT_FREQ 0x91
45 #define AD2S1210_REG_CONTROL 0x92
46 #define AD2S1210_REG_SOFT_RESET 0xF0
47 #define AD2S1210_REG_FAULT 0xFF
49 #define AD2S1210_MIN_CLKIN 6144000
50 #define AD2S1210_MAX_CLKIN 10240000
51 #define AD2S1210_MIN_EXCIT 2000
52 #define AD2S1210_MAX_EXCIT 20000
53 #define AD2S1210_MIN_FCW 0x4
54 #define AD2S1210_MAX_FCW 0x50
56 #define AD2S1210_DEF_EXCIT 10000
73 struct ad2s1210_gpio {
78 static const struct ad2s1210_gpio gpios[] = {
79 [AD2S1210_SAMPLE] = { .name = "adi,sample", .flags = GPIOD_OUT_LOW },
80 [AD2S1210_A0] = { .name = "adi,a0", .flags = GPIOD_OUT_LOW },
81 [AD2S1210_A1] = { .name = "adi,a1", .flags = GPIOD_OUT_LOW },
82 [AD2S1210_RES0] = { .name = "adi,res0", .flags = GPIOD_OUT_LOW },
83 [AD2S1210_RES1] = { .name = "adi,res1", .flags = GPIOD_OUT_LOW },
86 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
88 struct ad2s1210_state {
90 struct spi_device *sdev;
91 struct gpio_desc *gpios[5];
96 enum ad2s1210_mode mode;
97 u8 rx[2] ____cacheline_aligned;
98 u8 tx[2] ____cacheline_aligned;
101 static const int ad2s1210_mode_vals[4][2] = {
102 [MOD_POS] = { 0, 0 },
103 [MOD_VEL] = { 0, 1 },
104 [MOD_CONFIG] = { 1, 0 },
107 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
108 struct ad2s1210_state *st)
110 gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]);
111 gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]);
115 /* write 1 bytes (address or data) to the chip */
116 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
120 ad2s1210_set_mode(MOD_CONFIG, st);
122 ret = spi_write(st->sdev, st->tx, 1);
129 /* read value from one of the registers */
130 static int ad2s1210_config_read(struct ad2s1210_state *st,
131 unsigned char address)
133 struct spi_transfer xfers[] = {
136 .rx_buf = &st->rx[0],
137 .tx_buf = &st->tx[0],
141 .rx_buf = &st->rx[1],
142 .tx_buf = &st->tx[1],
147 ad2s1210_set_mode(MOD_CONFIG, st);
148 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
149 st->tx[1] = AD2S1210_REG_FAULT;
150 ret = spi_sync_transfer(st->sdev, xfers, 2);
158 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
163 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
164 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
165 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
169 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
173 return ad2s1210_config_write(st, fcw);
176 static const int ad2s1210_res_pins[4][2] = {
177 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
180 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
182 gpiod_set_value(st->gpios[AD2S1210_RES0],
183 ad2s1210_res_pins[(st->resolution - 10) / 2][0]);
184 gpiod_set_value(st->gpios[AD2S1210_RES1],
185 ad2s1210_res_pins[(st->resolution - 10) / 2][1]);
188 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
192 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
196 return ad2s1210_config_write(st, 0x0);
199 static ssize_t ad2s1210_show_fclkin(struct device *dev,
200 struct device_attribute *attr,
203 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
205 return sprintf(buf, "%u\n", st->fclkin);
208 static ssize_t ad2s1210_store_fclkin(struct device *dev,
209 struct device_attribute *attr,
213 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
217 ret = kstrtouint(buf, 10, &fclkin);
220 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
221 dev_err(dev, "ad2s1210: fclkin out of range\n");
225 mutex_lock(&st->lock);
228 ret = ad2s1210_update_frequency_control_word(st);
231 ret = ad2s1210_soft_reset(st);
233 mutex_unlock(&st->lock);
235 return ret < 0 ? ret : len;
238 static ssize_t ad2s1210_show_fexcit(struct device *dev,
239 struct device_attribute *attr,
242 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
244 return sprintf(buf, "%u\n", st->fexcit);
247 static ssize_t ad2s1210_store_fexcit(struct device *dev,
248 struct device_attribute *attr,
249 const char *buf, size_t len)
251 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
255 ret = kstrtouint(buf, 10, &fexcit);
258 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
260 "ad2s1210: excitation frequency out of range\n");
263 mutex_lock(&st->lock);
265 ret = ad2s1210_update_frequency_control_word(st);
268 ret = ad2s1210_soft_reset(st);
270 mutex_unlock(&st->lock);
272 return ret < 0 ? ret : len;
275 static ssize_t ad2s1210_show_control(struct device *dev,
276 struct device_attribute *attr,
279 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
282 mutex_lock(&st->lock);
283 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
284 mutex_unlock(&st->lock);
285 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
288 static ssize_t ad2s1210_store_control(struct device *dev,
289 struct device_attribute *attr,
290 const char *buf, size_t len)
292 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
297 ret = kstrtou8(buf, 16, &udata);
301 mutex_lock(&st->lock);
302 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
305 data = udata & AD2S1210_MSB_IS_LOW;
306 ret = ad2s1210_config_write(st, data);
310 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
313 if (ret & AD2S1210_MSB_IS_HIGH) {
316 "ad2s1210: write control register fail\n");
320 ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
321 ad2s1210_set_resolution_pin(st);
323 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
326 mutex_unlock(&st->lock);
330 static ssize_t ad2s1210_show_resolution(struct device *dev,
331 struct device_attribute *attr,
334 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
336 return sprintf(buf, "%d\n", st->resolution);
339 static ssize_t ad2s1210_store_resolution(struct device *dev,
340 struct device_attribute *attr,
341 const char *buf, size_t len)
343 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
348 ret = kstrtou8(buf, 10, &udata);
349 if (ret || udata < 10 || udata > 16) {
350 dev_err(dev, "ad2s1210: resolution out of range\n");
353 mutex_lock(&st->lock);
354 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
358 data &= ~AD2S1210_SET_RESOLUTION;
359 data |= (udata - 10) >> 1;
360 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
363 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
366 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
370 if (data & AD2S1210_MSB_IS_HIGH) {
372 dev_err(dev, "ad2s1210: setting resolution fail\n");
376 ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
377 ad2s1210_set_resolution_pin(st);
380 mutex_unlock(&st->lock);
384 /* read the fault register since last sample */
385 static ssize_t ad2s1210_show_fault(struct device *dev,
386 struct device_attribute *attr, char *buf)
388 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
391 mutex_lock(&st->lock);
392 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
393 mutex_unlock(&st->lock);
395 return ret ? ret : sprintf(buf, "0x%x\n", ret);
398 static ssize_t ad2s1210_clear_fault(struct device *dev,
399 struct device_attribute *attr,
403 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
406 mutex_lock(&st->lock);
407 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
408 /* delay (2 * tck + 20) nano seconds */
410 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
411 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
414 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
415 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
417 mutex_unlock(&st->lock);
419 return ret < 0 ? ret : len;
422 static ssize_t ad2s1210_show_reg(struct device *dev,
423 struct device_attribute *attr,
426 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
427 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
430 mutex_lock(&st->lock);
431 ret = ad2s1210_config_read(st, iattr->address);
432 mutex_unlock(&st->lock);
434 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
437 static ssize_t ad2s1210_store_reg(struct device *dev,
438 struct device_attribute *attr,
439 const char *buf, size_t len)
441 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
444 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
446 ret = kstrtou8(buf, 10, &data);
449 mutex_lock(&st->lock);
450 ret = ad2s1210_config_write(st, iattr->address);
453 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
455 mutex_unlock(&st->lock);
456 return ret < 0 ? ret : len;
459 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
460 struct iio_chan_spec const *chan,
465 struct ad2s1210_state *st = iio_priv(indio_dev);
471 mutex_lock(&st->lock);
472 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
473 /* delay (6 * tck + 20) nano seconds */
476 switch (chan->type) {
478 ad2s1210_set_mode(MOD_POS, st);
481 ad2s1210_set_mode(MOD_VEL, st);
489 ret = spi_read(st->sdev, st->rx, 2);
493 switch (chan->type) {
495 pos = be16_to_cpup((__be16 *)st->rx);
497 pos >>= 16 - st->resolution;
502 negative = st->rx[0] & 0x80;
503 vel = be16_to_cpup((__be16 *)st->rx);
504 vel >>= 16 - st->resolution;
506 negative = (0xffff >> st->resolution) << st->resolution;
513 mutex_unlock(&st->lock);
518 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
519 /* delay (2 * tck + 20) nano seconds */
521 mutex_unlock(&st->lock);
525 static IIO_DEVICE_ATTR(fclkin, 0644,
526 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
527 static IIO_DEVICE_ATTR(fexcit, 0644,
528 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
529 static IIO_DEVICE_ATTR(control, 0644,
530 ad2s1210_show_control, ad2s1210_store_control, 0);
531 static IIO_DEVICE_ATTR(bits, 0644,
532 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
533 static IIO_DEVICE_ATTR(fault, 0644,
534 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
536 static IIO_DEVICE_ATTR(los_thrd, 0644,
537 ad2s1210_show_reg, ad2s1210_store_reg,
538 AD2S1210_REG_LOS_THRD);
539 static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644,
540 ad2s1210_show_reg, ad2s1210_store_reg,
541 AD2S1210_REG_DOS_OVR_THRD);
542 static IIO_DEVICE_ATTR(dos_mis_thrd, 0644,
543 ad2s1210_show_reg, ad2s1210_store_reg,
544 AD2S1210_REG_DOS_MIS_THRD);
545 static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644,
546 ad2s1210_show_reg, ad2s1210_store_reg,
547 AD2S1210_REG_DOS_RST_MAX_THRD);
548 static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644,
549 ad2s1210_show_reg, ad2s1210_store_reg,
550 AD2S1210_REG_DOS_RST_MIN_THRD);
551 static IIO_DEVICE_ATTR(lot_high_thrd, 0644,
552 ad2s1210_show_reg, ad2s1210_store_reg,
553 AD2S1210_REG_LOT_HIGH_THRD);
554 static IIO_DEVICE_ATTR(lot_low_thrd, 0644,
555 ad2s1210_show_reg, ad2s1210_store_reg,
556 AD2S1210_REG_LOT_LOW_THRD);
558 static const struct iio_chan_spec ad2s1210_channels[] = {
563 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
565 .type = IIO_ANGL_VEL,
568 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
572 static struct attribute *ad2s1210_attributes[] = {
573 &iio_dev_attr_fclkin.dev_attr.attr,
574 &iio_dev_attr_fexcit.dev_attr.attr,
575 &iio_dev_attr_control.dev_attr.attr,
576 &iio_dev_attr_bits.dev_attr.attr,
577 &iio_dev_attr_fault.dev_attr.attr,
578 &iio_dev_attr_los_thrd.dev_attr.attr,
579 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
580 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
581 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
582 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
583 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
584 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
588 static const struct attribute_group ad2s1210_attribute_group = {
589 .attrs = ad2s1210_attributes,
592 static int ad2s1210_initial(struct ad2s1210_state *st)
597 mutex_lock(&st->lock);
598 ad2s1210_set_resolution_pin(st);
600 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
603 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
604 data |= (st->resolution - 10) >> 1;
605 ret = ad2s1210_config_write(st, data);
608 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
612 if (ret & AD2S1210_MSB_IS_HIGH) {
617 ret = ad2s1210_update_frequency_control_word(st);
620 ret = ad2s1210_soft_reset(st);
622 mutex_unlock(&st->lock);
626 static const struct iio_info ad2s1210_info = {
627 .read_raw = ad2s1210_read_raw,
628 .attrs = &ad2s1210_attribute_group,
631 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
633 struct spi_device *spi = st->sdev;
636 for (i = 0; i < ARRAY_SIZE(gpios); i++) {
637 st->gpios[i] = devm_gpiod_get(&spi->dev, gpios[i].name,
639 if (IS_ERR(st->gpios[i])) {
640 ret = PTR_ERR(st->gpios[i]);
642 "ad2s1210: failed to request %s GPIO: %d\n",
651 static int ad2s1210_probe(struct spi_device *spi)
653 struct iio_dev *indio_dev;
654 struct ad2s1210_state *st;
657 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
660 st = iio_priv(indio_dev);
661 ret = ad2s1210_setup_gpios(st);
665 spi_set_drvdata(spi, indio_dev);
667 mutex_init(&st->lock);
669 st->hysteresis = true;
670 st->mode = MOD_CONFIG;
672 st->fexcit = AD2S1210_DEF_EXCIT;
674 indio_dev->info = &ad2s1210_info;
675 indio_dev->modes = INDIO_DIRECT_MODE;
676 indio_dev->channels = ad2s1210_channels;
677 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
678 indio_dev->name = spi_get_device_id(spi)->name;
680 ret = devm_iio_device_register(&spi->dev, indio_dev);
684 st->fclkin = spi->max_speed_hz;
685 spi->mode = SPI_MODE_3;
687 ad2s1210_initial(st);
692 static const struct of_device_id ad2s1210_of_match[] = {
693 { .compatible = "adi,ad2s1210", },
696 MODULE_DEVICE_TABLE(of, ad2s1210_of_match);
698 static const struct spi_device_id ad2s1210_id[] = {
702 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
704 static struct spi_driver ad2s1210_driver = {
707 .of_match_table = of_match_ptr(ad2s1210_of_match),
709 .probe = ad2s1210_probe,
710 .id_table = ad2s1210_id,
712 module_spi_driver(ad2s1210_driver);
714 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
715 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
716 MODULE_LICENSE("GPL v2");