drivers/soc/imx/gpcv2.c

   1 /*
   2  * Copyright 2017 Impinj, Inc
   3  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
   4  *
   5  * Based on the code of analogus driver:
   6  *
   7  * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
   8  *
   9  * The code contained herein is licensed under the GNU General Public
  10  * License. You may obtain a copy of the GNU General Public License
  11  * Version 2 or later at the following locations:
  12  *
  13  * http://www.opensource.org/licenses/gpl-license.html
  14  * http://www.gnu.org/copyleft/gpl.html
  15  */
  16
  17 #include <linux/platform_device.h>
  18 #include <linux/pm_domain.h>
  19 #include <linux/regmap.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <dt-bindings/power/imx7-power.h>
  22
  23 #define GPC_LPCR_A7_BSC                 0x000
  24
  25 #define GPC_PGC_CPU_MAPPING             0x0ec
  26 #define USB_HSIC_PHY_A7_DOMAIN          BIT(6)
  27 #define USB_OTG2_PHY_A7_DOMAIN          BIT(5)
  28 #define USB_OTG1_PHY_A7_DOMAIN          BIT(4)
  29 #define PCIE_PHY_A7_DOMAIN              BIT(3)
  30 #define MIPI_PHY_A7_DOMAIN              BIT(2)
  31
  32 #define GPC_PU_PGC_SW_PUP_REQ           0x0f8
  33 #define GPC_PU_PGC_SW_PDN_REQ           0x104
  34 #define USB_HSIC_PHY_SW_Pxx_REQ         BIT(4)
  35 #define USB_OTG2_PHY_SW_Pxx_REQ         BIT(3)
  36 #define USB_OTG1_PHY_SW_Pxx_REQ         BIT(2)
  37 #define PCIE_PHY_SW_Pxx_REQ             BIT(1)
  38 #define MIPI_PHY_SW_Pxx_REQ             BIT(0)
  39
  40 #define GPC_M4_PU_PDN_FLG               0x1bc
  41
  42 /*
  43  * The PGC offset values in Reference Manual
  44  * (Rev. 1, 01/2018 and the older ones) GPC chapter's
  45  * GPC_PGC memory map are incorrect, below offset
  46  * values are from design RTL.
  47  */
  48 #define PGC_MIPI                        16
  49 #define PGC_PCIE                        17
  50 #define PGC_USB_HSIC                    20
  51 #define GPC_PGC_CTRL(n)                 (0x800 + (n) * 0x40)
  52 #define GPC_PGC_SR(n)                   (GPC_PGC_CTRL(n) + 0xc)
  53
  54 #define GPC_PGC_CTRL_PCR                BIT(0)
  55
  56 struct imx7_pgc_domain {
  57         struct generic_pm_domain genpd;
  58         struct regmap *regmap;
  59         struct regulator *regulator;
  60
  61         unsigned int pgc;
  62
  63         const struct {
  64                 u32 pxx;
  65                 u32 map;
  66         } bits;
  67
  68         const int voltage;
  69         struct device *dev;
  70 };
  71
  72 static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
  73                                       bool on)
  74 {
  75         struct imx7_pgc_domain *domain = container_of(genpd,
  76                                                       struct imx7_pgc_domain,
  77                                                       genpd);
  78         unsigned int offset = on ?
  79                 GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ;
  80         const bool enable_power_control = !on;
  81         const bool has_regulator = !IS_ERR(domain->regulator);
  82         unsigned long deadline;
  83         int ret = 0;
  84
  85         regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
  86                            domain->bits.map, domain->bits.map);
  87
  88         if (has_regulator && on) {
  89                 ret = regulator_enable(domain->regulator);
  90                 if (ret) {
  91                         dev_err(domain->dev, "failed to enable regulator\n");
  92                         goto unmap;
  93                 }
  94         }
  95
  96         if (enable_power_control)
  97                 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
  98                                    GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
  99
 100         regmap_update_bits(domain->regmap, offset,
 101                            domain->bits.pxx, domain->bits.pxx);
 102
 103         /*
 104          * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
 105          * for PUP_REQ/PDN_REQ bit to be cleared
 106          */
 107         deadline = jiffies + msecs_to_jiffies(1);
 108         while (true) {
 109                 u32 pxx_req;
 110
 111                 regmap_read(domain->regmap, offset, &pxx_req);
 112
 113                 if (!(pxx_req & domain->bits.pxx))
 114                         break;
 115
 116                 if (time_after(jiffies, deadline)) {
 117                         dev_err(domain->dev, "falied to command PGC\n");
 118                         ret = -ETIMEDOUT;
 119                         /*
 120                          * If we were in a process of enabling a
 121                          * domain and failed we might as well disable
 122                          * the regulator we just enabled. And if it
 123                          * was the opposite situation and we failed to
 124                          * power down -- keep the regulator on
 125                          */
 126                         on = !on;
 127                         break;
 128                 }
 129
 130                 cpu_relax();
 131         }
 132
 133         if (enable_power_control)
 134                 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
 135                                    GPC_PGC_CTRL_PCR, 0);
 136
 137         if (has_regulator && !on) {
 138                 int err;
 139
 140                 err = regulator_disable(domain->regulator);
 141                 if (err)
 142                         dev_err(domain->dev,
 143                                 "failed to disable regulator: %d\n", ret);
 144                 /* Preserve earlier error code */
 145                 ret = ret ?: err;
 146         }
 147 unmap:
 148         regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
 149                            domain->bits.map, 0);
 150         return ret;
 151 }
 152
 153 static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
 154 {
 155         return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true);
 156 }
 157
 158 static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
 159 {
 160         return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false);
 161 }
 162
 163 static const struct imx7_pgc_domain imx7_pgc_domains[] = {
 164         [IMX7_POWER_DOMAIN_MIPI_PHY] = {
 165                 .genpd = {
 166                         .name      = "mipi-phy",
 167                 },
 168                 .bits  = {
 169                         .pxx = MIPI_PHY_SW_Pxx_REQ,
 170                         .map = MIPI_PHY_A7_DOMAIN,
 171                 },
 172                 .voltage   = 1000000,
 173                 .pgc       = PGC_MIPI,
 174         },
 175
 176         [IMX7_POWER_DOMAIN_PCIE_PHY] = {
 177                 .genpd = {
 178                         .name      = "pcie-phy",
 179                 },
 180                 .bits  = {
 181                         .pxx = PCIE_PHY_SW_Pxx_REQ,
 182                         .map = PCIE_PHY_A7_DOMAIN,
 183                 },
 184                 .voltage   = 1000000,
 185                 .pgc       = PGC_PCIE,
 186         },
 187
 188         [IMX7_POWER_DOMAIN_USB_HSIC_PHY] = {
 189                 .genpd = {
 190                         .name      = "usb-hsic-phy",
 191                 },
 192                 .bits  = {
 193                         .pxx = USB_HSIC_PHY_SW_Pxx_REQ,
 194                         .map = USB_HSIC_PHY_A7_DOMAIN,
 195                 },
 196                 .voltage   = 1200000,
 197                 .pgc       = PGC_USB_HSIC,
 198         },
 199 };
 200
 201 static int imx7_pgc_domain_probe(struct platform_device *pdev)
 202 {
 203         struct imx7_pgc_domain *domain = pdev->dev.platform_data;
 204         int ret;
 205
 206         domain->dev = &pdev->dev;
 207
 208         domain->regulator = devm_regulator_get_optional(domain->dev, "power");
 209         if (IS_ERR(domain->regulator)) {
 210                 if (PTR_ERR(domain->regulator) != -ENODEV) {
 211                         if (PTR_ERR(domain->regulator) != -EPROBE_DEFER)
 212                                 dev_err(domain->dev, "Failed to get domain's regulator\n");
 213                         return PTR_ERR(domain->regulator);
 214                 }
 215         } else {
 216                 regulator_set_voltage(domain->regulator,
 217                                       domain->voltage, domain->voltage);
 218         }
 219
 220         ret = pm_genpd_init(&domain->genpd, NULL, true);
 221         if (ret) {
 222                 dev_err(domain->dev, "Failed to init power domain\n");
 223                 return ret;
 224         }
 225
 226         ret = of_genpd_add_provider_simple(domain->dev->of_node,
 227                                            &domain->genpd);
 228         if (ret) {
 229                 dev_err(domain->dev, "Failed to add genpd provider\n");
 230                 pm_genpd_remove(&domain->genpd);
 231         }
 232
 233         return ret;
 234 }
 235
 236 static int imx7_pgc_domain_remove(struct platform_device *pdev)
 237 {
 238         struct imx7_pgc_domain *domain = pdev->dev.platform_data;
 239
 240         of_genpd_del_provider(domain->dev->of_node);
 241         pm_genpd_remove(&domain->genpd);
 242
 243         return 0;
 244 }
 245
 246 static const struct platform_device_id imx7_pgc_domain_id[] = {
 247         { "imx7-pgc-domain", },
 248         { },
 249 };
 250
 251 static struct platform_driver imx7_pgc_domain_driver = {
 252         .driver = {
 253                 .name = "imx7-pgc",
 254         },
 255         .probe    = imx7_pgc_domain_probe,
 256         .remove   = imx7_pgc_domain_remove,
 257         .id_table = imx7_pgc_domain_id,
 258 };
 259 builtin_platform_driver(imx7_pgc_domain_driver)
 260
 261 static int imx_gpcv2_probe(struct platform_device *pdev)
 262 {
 263         static const struct regmap_range yes_ranges[] = {
 264                 regmap_reg_range(GPC_LPCR_A7_BSC,
 265                                  GPC_M4_PU_PDN_FLG),
 266                 regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
 267                                  GPC_PGC_SR(PGC_MIPI)),
 268                 regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE),
 269                                  GPC_PGC_SR(PGC_PCIE)),
 270                 regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC),
 271                                  GPC_PGC_SR(PGC_USB_HSIC)),
 272         };
 273         static const struct regmap_access_table access_table = {
 274                 .yes_ranges     = yes_ranges,
 275                 .n_yes_ranges   = ARRAY_SIZE(yes_ranges),
 276         };
 277         static const struct regmap_config regmap_config = {
 278                 .reg_bits       = 32,
 279                 .val_bits       = 32,
 280                 .reg_stride     = 4,
 281                 .rd_table       = &access_table,
 282                 .wr_table       = &access_table,
 283                 .max_register   = SZ_4K,
 284         };
 285         struct device *dev = &pdev->dev;
 286         struct device_node *pgc_np, *np;
 287         struct regmap *regmap;
 288         struct resource *res;
 289         void __iomem *base;
 290         int ret;
 291
 292         pgc_np = of_get_child_by_name(dev->of_node, "pgc");
 293         if (!pgc_np) {
 294                 dev_err(dev, "No power domains specified in DT\n");
 295                 return -EINVAL;
 296         }
 297
 298         res  = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 299         base = devm_ioremap_resource(dev, res);
 300         if (IS_ERR(base))
 301                 return PTR_ERR(base);
 302
 303         regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
 304         if (IS_ERR(regmap)) {
 305                 ret = PTR_ERR(regmap);
 306                 dev_err(dev, "failed to init regmap (%d)\n", ret);
 307                 return ret;
 308         }
 309
 310         for_each_child_of_node(pgc_np, np) {
 311                 struct platform_device *pd_pdev;
 312                 struct imx7_pgc_domain *domain;
 313                 u32 domain_index;
 314
 315                 ret = of_property_read_u32(np, "reg", &domain_index);
 316                 if (ret) {
 317                         dev_err(dev, "Failed to read 'reg' property\n");
 318                         of_node_put(np);
 319                         return ret;
 320                 }
 321
 322                 if (domain_index >= ARRAY_SIZE(imx7_pgc_domains)) {
 323                         dev_warn(dev,
 324                                  "Domain index %d is out of bounds\n",
 325                                  domain_index);
 326                         continue;
 327                 }
 328
 329                 pd_pdev = platform_device_alloc("imx7-pgc-domain",
 330                                                 domain_index);
 331                 if (!pd_pdev) {
 332                         dev_err(dev, "Failed to allocate platform device\n");
 333                         of_node_put(np);
 334                         return -ENOMEM;
 335                 }
 336
 337                 ret = platform_device_add_data(pd_pdev,
 338                                                &imx7_pgc_domains[domain_index],
 339                                                sizeof(imx7_pgc_domains[domain_index]));
 340                 if (ret) {
 341                         platform_device_put(pd_pdev);
 342                         of_node_put(np);
 343                         return ret;
 344                 }
 345
 346                 domain = pd_pdev->dev.platform_data;
 347                 domain->regmap = regmap;
 348                 domain->genpd.power_on  = imx7_gpc_pu_pgc_sw_pup_req;
 349                 domain->genpd.power_off = imx7_gpc_pu_pgc_sw_pdn_req;
 350
 351                 pd_pdev->dev.parent = dev;
 352                 pd_pdev->dev.of_node = np;
 353
 354                 ret = platform_device_add(pd_pdev);
 355                 if (ret) {
 356                         platform_device_put(pd_pdev);
 357                         of_node_put(np);
 358                         return ret;
 359                 }
 360         }
 361
 362         return 0;
 363 }
 364
 365 static const struct of_device_id imx_gpcv2_dt_ids[] = {
 366         { .compatible = "fsl,imx7d-gpc" },
 367         { }
 368 };
 369
 370 static struct platform_driver imx_gpc_driver = {
 371         .driver = {
 372                 .name = "imx-gpcv2",
 373                 .of_match_table = imx_gpcv2_dt_ids,
 374         },
 375         .probe = imx_gpcv2_probe,
 376 };
 377 builtin_platform_driver(imx_gpc_driver)