drivers/scsi/ufs/ufshcd.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Universal Flash Storage Host controller driver Core
   4  * Copyright (C) 2011-2013 Samsung India Software Operations
   5  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   6  *
   7  * Authors:
   8  *      Santosh Yaraganavi <santosh.sy@samsung.com>
   9  *      Vinayak Holikatti <h.vinayak@samsung.com>
  10  */
  11
  12 #include <linux/async.h>
  13 #include <linux/devfreq.h>
  14 #include <linux/nls.h>
  15 #include <linux/of.h>
  16 #include <linux/bitfield.h>
  17 #include <linux/blk-pm.h>
  18 #include <linux/blkdev.h>
  19 #include <scsi/scsi_driver.h>
  20 #include "ufshcd.h"
  21 #include "ufs_quirks.h"
  22 #include "unipro.h"
  23 #include "ufs-sysfs.h"
  24 #include "ufs-debugfs.h"
  25 #include "ufs_bsg.h"
  26 #include "ufshcd-crypto.h"
  27 #include "ufshpb.h"
  28 #include <asm/unaligned.h>
  29
  30 #define CREATE_TRACE_POINTS
  31 #include <trace/events/ufs.h>
  32
  33 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  34                                  UTP_TASK_REQ_COMPL |\
  35                                  UFSHCD_ERROR_MASK)
  36 /* UIC command timeout, unit: ms */
  37 #define UIC_CMD_TIMEOUT 500
  38
  39 /* NOP OUT retries waiting for NOP IN response */
  40 #define NOP_OUT_RETRIES    10
  41 /* Timeout after 50 msecs if NOP OUT hangs without response */
  42 #define NOP_OUT_TIMEOUT    50 /* msecs */
  43
  44 /* Query request retries */
  45 #define QUERY_REQ_RETRIES 3
  46 /* Query request timeout */
  47 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
  48
  49 /* Task management command timeout */
  50 #define TM_CMD_TIMEOUT  100 /* msecs */
  51
  52 /* maximum number of retries for a general UIC command  */
  53 #define UFS_UIC_COMMAND_RETRIES 3
  54
  55 /* maximum number of link-startup retries */
  56 #define DME_LINKSTARTUP_RETRIES 3
  57
  58 /* Maximum retries for Hibern8 enter */
  59 #define UIC_HIBERN8_ENTER_RETRIES 3
  60
  61 /* maximum number of reset retries before giving up */
  62 #define MAX_HOST_RESET_RETRIES 5
  63
  64 /* Expose the flag value from utp_upiu_query.value */
  65 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  66
  67 /* Interrupt aggregation default timeout, unit: 40us */
  68 #define INT_AGGR_DEF_TO 0x02
  69
  70 /* default delay of autosuspend: 2000 ms */
  71 #define RPM_AUTOSUSPEND_DELAY_MS 2000
  72
  73 /* Default delay of RPM device flush delayed work */
  74 #define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
  75
  76 /* Default value of wait time before gating device ref clock */
  77 #define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
  78
  79 /* Polling time to wait for fDeviceInit */
  80 #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
  81
  82 #define wlun_dev_to_hba(dv) shost_priv(to_scsi_device(dv)->host)
  83
  84 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  85         ({                                                              \
  86                 int _ret;                                               \
  87                 if (_on)                                                \
  88                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  89                 else                                                    \
  90                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
  91                 _ret;                                                   \
  92         })
  93
  94 #define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
  95         size_t __len = (len);                                            \
  96         print_hex_dump(KERN_ERR, prefix_str,                             \
  97                        __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
  98                        16, 4, buf, __len, false);                        \
  99 } while (0)
 100
 101 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
 102                      const char *prefix)
 103 {
 104         u32 *regs;
 105         size_t pos;
 106
 107         if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
 108                 return -EINVAL;
 109
 110         regs = kzalloc(len, GFP_ATOMIC);
 111         if (!regs)
 112                 return -ENOMEM;
 113
 114         for (pos = 0; pos < len; pos += 4)
 115                 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
 116
 117         ufshcd_hex_dump(prefix, regs, len);
 118         kfree(regs);
 119
 120         return 0;
 121 }
 122 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
 123
 124 enum {
 125         UFSHCD_MAX_CHANNEL      = 0,
 126         UFSHCD_MAX_ID           = 1,
 127         UFSHCD_CMD_PER_LUN      = 32,
 128         UFSHCD_CAN_QUEUE        = 32,
 129 };
 130
 131 /* UFSHCD states */
 132 enum {
 133         UFSHCD_STATE_RESET,
 134         UFSHCD_STATE_ERROR,
 135         UFSHCD_STATE_OPERATIONAL,
 136         UFSHCD_STATE_EH_SCHEDULED_FATAL,
 137         UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
 138 };
 139
 140 /* UFSHCD error handling flags */
 141 enum {
 142         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 143 };
 144
 145 /* UFSHCD UIC layer error flags */
 146 enum {
 147         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 148         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 149         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 150         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 151         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 152         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 153         UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
 154 };
 155
 156 #define ufshcd_set_eh_in_progress(h) \
 157         ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 158 #define ufshcd_eh_in_progress(h) \
 159         ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
 160 #define ufshcd_clear_eh_in_progress(h) \
 161         ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 162
 163 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 164         [UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 165         [UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 166         [UFS_PM_LVL_2] = {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 167         [UFS_PM_LVL_3] = {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 168         [UFS_PM_LVL_4] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 169         [UFS_PM_LVL_5] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 170         /*
 171          * For DeepSleep, the link is first put in hibern8 and then off.
 172          * Leaving the link in hibern8 is not supported.
 173          */
 174         [UFS_PM_LVL_6] = {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
 175 };
 176
 177 static inline enum ufs_dev_pwr_mode
 178 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 179 {
 180         return ufs_pm_lvl_states[lvl].dev_state;
 181 }
 182
 183 static inline enum uic_link_state
 184 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 185 {
 186         return ufs_pm_lvl_states[lvl].link_state;
 187 }
 188
 189 static inline enum ufs_pm_level
 190 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
 191                                         enum uic_link_state link_state)
 192 {
 193         enum ufs_pm_level lvl;
 194
 195         for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
 196                 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
 197                         (ufs_pm_lvl_states[lvl].link_state == link_state))
 198                         return lvl;
 199         }
 200
 201         /* if no match found, return the level 0 */
 202         return UFS_PM_LVL_0;
 203 }
 204
 205 static struct ufs_dev_fix ufs_fixups[] = {
 206         /* UFS cards deviations table */
 207         UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
 208                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 209         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 210                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
 211                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
 212                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 213         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 214                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 215         UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
 216                 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
 217         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 218                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 219         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 220                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 221         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 222                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 223         END_FIX
 224 };
 225
 226 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
 227 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 228 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 229 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
 230 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 231 static void ufshcd_hba_exit(struct ufs_hba *hba);
 232 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba);
 233 static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
 234 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 235 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 236 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 237 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 238 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 239 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 240 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 241 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
 242 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 243 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 244                              struct ufs_pa_layer_attr *pwr_mode);
 245 static void ufshcd_schedule_eh_work(struct ufs_hba *hba);
 246 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
 247 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
 248 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
 249                                          struct ufs_vreg *vreg);
 250 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
 251 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
 252 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
 253 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
 254 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
 255
 256 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
 257 {
 258         return tag >= 0 && tag < hba->nutrs;
 259 }
 260
 261 static inline void ufshcd_enable_irq(struct ufs_hba *hba)
 262 {
 263         if (!hba->is_irq_enabled) {
 264                 enable_irq(hba->irq);
 265                 hba->is_irq_enabled = true;
 266         }
 267 }
 268
 269 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 270 {
 271         if (hba->is_irq_enabled) {
 272                 disable_irq(hba->irq);
 273                 hba->is_irq_enabled = false;
 274         }
 275 }
 276
 277 static inline void ufshcd_wb_config(struct ufs_hba *hba)
 278 {
 279         if (!ufshcd_is_wb_allowed(hba))
 280                 return;
 281
 282         ufshcd_wb_toggle(hba, true);
 283
 284         ufshcd_wb_toggle_flush_during_h8(hba, true);
 285         if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
 286                 ufshcd_wb_toggle_flush(hba, true);
 287 }
 288
 289 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
 290 {
 291         if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
 292                 scsi_unblock_requests(hba->host);
 293 }
 294
 295 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
 296 {
 297         if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
 298                 scsi_block_requests(hba->host);
 299 }
 300
 301 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 302                                       enum ufs_trace_str_t str_t)
 303 {
 304         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 305         struct utp_upiu_header *header;
 306
 307         if (!trace_ufshcd_upiu_enabled())
 308                 return;
 309
 310         if (str_t == UFS_CMD_SEND)
 311                 header = &rq->header;
 312         else
 313                 header = &hba->lrb[tag].ucd_rsp_ptr->header;
 314
 315         trace_ufshcd_upiu(dev_name(hba->dev), str_t, header, &rq->sc.cdb,
 316                           UFS_TSF_CDB);
 317 }
 318
 319 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
 320                                         enum ufs_trace_str_t str_t,
 321                                         struct utp_upiu_req *rq_rsp)
 322 {
 323         if (!trace_ufshcd_upiu_enabled())
 324                 return;
 325
 326         trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
 327                           &rq_rsp->qr, UFS_TSF_OSF);
 328 }
 329
 330 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 331                                      enum ufs_trace_str_t str_t)
 332 {
 333         int off = (int)tag - hba->nutrs;
 334         struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
 335
 336         if (!trace_ufshcd_upiu_enabled())
 337                 return;
 338
 339         if (str_t == UFS_TM_SEND)
 340                 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
 341                                   &descp->upiu_req.req_header,
 342                                   &descp->upiu_req.input_param1,
 343                                   UFS_TSF_TM_INPUT);
 344         else
 345                 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
 346                                   &descp->upiu_rsp.rsp_header,
 347                                   &descp->upiu_rsp.output_param1,
 348                                   UFS_TSF_TM_OUTPUT);
 349 }
 350
 351 static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
 352                                          struct uic_command *ucmd,
 353                                          enum ufs_trace_str_t str_t)
 354 {
 355         u32 cmd;
 356
 357         if (!trace_ufshcd_uic_command_enabled())
 358                 return;
 359
 360         if (str_t == UFS_CMD_SEND)
 361                 cmd = ucmd->command;
 362         else
 363                 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
 364
 365         trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
 366                                  ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
 367                                  ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
 368                                  ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
 369 }
 370
 371 static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
 372                                      enum ufs_trace_str_t str_t)
 373 {
 374         u64 lba = -1;
 375         u8 opcode = 0, group_id = 0;
 376         u32 intr, doorbell;
 377         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
 378         struct scsi_cmnd *cmd = lrbp->cmd;
 379         int transfer_len = -1;
 380
 381         if (!cmd)
 382                 return;
 383
 384         if (!trace_ufshcd_command_enabled()) {
 385                 /* trace UPIU W/O tracing command */
 386                 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
 387                 return;
 388         }
 389
 390         /* trace UPIU also */
 391         ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
 392         opcode = cmd->cmnd[0];
 393         lba = scsi_get_lba(cmd);
 394
 395         if (opcode == READ_10 || opcode == WRITE_10) {
 396                 /*
 397                  * Currently we only fully trace read(10) and write(10) commands
 398                  */
 399                 transfer_len =
 400                        be32_to_cpu(lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
 401                 if (opcode == WRITE_10)
 402                         group_id = lrbp->cmd->cmnd[6];
 403         } else if (opcode == UNMAP) {
 404                 /*
 405                  * The number of Bytes to be unmapped beginning with the lba.
 406                  */
 407                 transfer_len = blk_rq_bytes(cmd->request);
 408         }
 409
 410         intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
 411         doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 412         trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
 413                         doorbell, transfer_len, intr, lba, opcode, group_id);
 414 }
 415
 416 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
 417 {
 418         struct ufs_clk_info *clki;
 419         struct list_head *head = &hba->clk_list_head;
 420
 421         if (list_empty(head))
 422                 return;
 423
 424         list_for_each_entry(clki, head, list) {
 425                 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
 426                                 clki->max_freq)
 427                         dev_err(hba->dev, "clk: %s, rate: %u\n",
 428                                         clki->name, clki->curr_freq);
 429         }
 430 }
 431
 432 static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
 433                              char *err_name)
 434 {
 435         int i;
 436         bool found = false;
 437         struct ufs_event_hist *e;
 438
 439         if (id >= UFS_EVT_CNT)
 440                 return;
 441
 442         e = &hba->ufs_stats.event[id];
 443
 444         for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
 445                 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
 446
 447                 if (e->tstamp[p] == 0)
 448                         continue;
 449                 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
 450                         e->val[p], ktime_to_us(e->tstamp[p]));
 451                 found = true;
 452         }
 453
 454         if (!found)
 455                 dev_err(hba->dev, "No record of %s\n", err_name);
 456         else
 457                 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
 458 }
 459
 460 static void ufshcd_print_evt_hist(struct ufs_hba *hba)
 461 {
 462         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
 463
 464         ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
 465         ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
 466         ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
 467         ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
 468         ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
 469         ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
 470                          "auto_hibern8_err");
 471         ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
 472         ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
 473                          "link_startup_fail");
 474         ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
 475         ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
 476                          "suspend_fail");
 477         ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
 478         ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
 479         ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
 480
 481         ufshcd_vops_dbg_register_dump(hba);
 482 }
 483
 484 static
 485 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
 486 {
 487         struct ufshcd_lrb *lrbp;
 488         int prdt_length;
 489         int tag;
 490
 491         for_each_set_bit(tag, &bitmap, hba->nutrs) {
 492                 lrbp = &hba->lrb[tag];
 493
 494                 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
 495                                 tag, ktime_to_us(lrbp->issue_time_stamp));
 496                 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
 497                                 tag, ktime_to_us(lrbp->compl_time_stamp));
 498                 dev_err(hba->dev,
 499                         "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
 500                         tag, (u64)lrbp->utrd_dma_addr);
 501
 502                 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
 503                                 sizeof(struct utp_transfer_req_desc));
 504                 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
 505                         (u64)lrbp->ucd_req_dma_addr);
 506                 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
 507                                 sizeof(struct utp_upiu_req));
 508                 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
 509                         (u64)lrbp->ucd_rsp_dma_addr);
 510                 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
 511                                 sizeof(struct utp_upiu_rsp));
 512
 513                 prdt_length = le16_to_cpu(
 514                         lrbp->utr_descriptor_ptr->prd_table_length);
 515                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
 516                         prdt_length /= sizeof(struct ufshcd_sg_entry);
 517
 518                 dev_err(hba->dev,
 519                         "UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
 520                         tag, prdt_length,
 521                         (u64)lrbp->ucd_prdt_dma_addr);
 522
 523                 if (pr_prdt)
 524                         ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
 525                                 sizeof(struct ufshcd_sg_entry) * prdt_length);
 526         }
 527 }
 528
 529 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
 530 {
 531         int tag;
 532
 533         for_each_set_bit(tag, &bitmap, hba->nutmrs) {
 534                 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
 535
 536                 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
 537                 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
 538         }
 539 }
 540
 541 static void ufshcd_print_host_state(struct ufs_hba *hba)
 542 {
 543         struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
 544
 545         dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
 546         dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
 547                 hba->outstanding_reqs, hba->outstanding_tasks);
 548         dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
 549                 hba->saved_err, hba->saved_uic_err);
 550         dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
 551                 hba->curr_dev_pwr_mode, hba->uic_link_state);
 552         dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
 553                 hba->pm_op_in_progress, hba->is_sys_suspended);
 554         dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
 555                 hba->auto_bkops_enabled, hba->host->host_self_blocked);
 556         dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
 557         dev_err(hba->dev,
 558                 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
 559                 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
 560                 hba->ufs_stats.hibern8_exit_cnt);
 561         dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
 562                 ktime_to_us(hba->ufs_stats.last_intr_ts),
 563                 hba->ufs_stats.last_intr_status);
 564         dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
 565                 hba->eh_flags, hba->req_abort_count);
 566         dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
 567                 hba->ufs_version, hba->capabilities, hba->caps);
 568         dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
 569                 hba->dev_quirks);
 570         if (sdev_ufs)
 571                 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
 572                         sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
 573
 574         ufshcd_print_clk_freqs(hba);
 575 }
 576
 577 /**
 578  * ufshcd_print_pwr_info - print power params as saved in hba
 579  * power info
 580  * @hba: per-adapter instance
 581  */
 582 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
 583 {
 584         static const char * const names[] = {
 585                 "INVALID MODE",
 586                 "FAST MODE",
 587                 "SLOW_MODE",
 588                 "INVALID MODE",
 589                 "FASTAUTO_MODE",
 590                 "SLOWAUTO_MODE",
 591                 "INVALID MODE",
 592         };
 593
 594         dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
 595                  __func__,
 596                  hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
 597                  hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
 598                  names[hba->pwr_info.pwr_rx],
 599                  names[hba->pwr_info.pwr_tx],
 600                  hba->pwr_info.hs_rate);
 601 }
 602
 603 static void ufshcd_device_reset(struct ufs_hba *hba)
 604 {
 605         int err;
 606
 607         err = ufshcd_vops_device_reset(hba);
 608
 609         if (!err) {
 610                 ufshcd_set_ufs_dev_active(hba);
 611                 if (ufshcd_is_wb_allowed(hba)) {
 612                         hba->dev_info.wb_enabled = false;
 613                         hba->dev_info.wb_buf_flush_enabled = false;
 614                 }
 615         }
 616         if (err != -EOPNOTSUPP)
 617                 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
 618 }
 619
 620 void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
 621 {
 622         if (!us)
 623                 return;
 624
 625         if (us < 10)
 626                 udelay(us);
 627         else
 628                 usleep_range(us, us + tolerance);
 629 }
 630 EXPORT_SYMBOL_GPL(ufshcd_delay_us);
 631
 632 /**
 633  * ufshcd_wait_for_register - wait for register value to change
 634  * @hba: per-adapter interface
 635  * @reg: mmio register offset
 636  * @mask: mask to apply to the read register value
 637  * @val: value to wait for
 638  * @interval_us: polling interval in microseconds
 639  * @timeout_ms: timeout in milliseconds
 640  *
 641  * Return:
 642  * -ETIMEDOUT on error, zero on success.
 643  */
 644 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 645                                 u32 val, unsigned long interval_us,
 646                                 unsigned long timeout_ms)
 647 {
 648         int err = 0;
 649         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 650
 651         /* ignore bits that we don't intend to wait on */
 652         val = val & mask;
 653
 654         while ((ufshcd_readl(hba, reg) & mask) != val) {
 655                 usleep_range(interval_us, interval_us + 50);
 656                 if (time_after(jiffies, timeout)) {
 657                         if ((ufshcd_readl(hba, reg) & mask) != val)
 658                                 err = -ETIMEDOUT;
 659                         break;
 660                 }
 661         }
 662
 663         return err;
 664 }
 665
 666 /**
 667  * ufshcd_get_intr_mask - Get the interrupt bit mask
 668  * @hba: Pointer to adapter instance
 669  *
 670  * Returns interrupt bit mask per version
 671  */
 672 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 673 {
 674         if (hba->ufs_version == ufshci_version(1, 0))
 675                 return INTERRUPT_MASK_ALL_VER_10;
 676         if (hba->ufs_version <= ufshci_version(2, 0))
 677                 return INTERRUPT_MASK_ALL_VER_11;
 678
 679         return INTERRUPT_MASK_ALL_VER_21;
 680 }
 681
 682 /**
 683  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 684  * @hba: Pointer to adapter instance
 685  *
 686  * Returns UFSHCI version supported by the controller
 687  */
 688 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 689 {
 690         u32 ufshci_ver;
 691
 692         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 693                 ufshci_ver = ufshcd_vops_get_ufs_hci_version(hba);
 694         else
 695                 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION);
 696
 697         /*
 698          * UFSHCI v1.x uses a different version scheme, in order
 699          * to allow the use of comparisons with the ufshci_version
 700          * function, we convert it to the same scheme as ufs 2.0+.
 701          */
 702         if (ufshci_ver & 0x00010000)
 703                 return ufshci_version(1, ufshci_ver & 0x00000100);
 704
 705         return ufshci_ver;
 706 }
 707
 708 /**
 709  * ufshcd_is_device_present - Check if any device connected to
 710  *                            the host controller
 711  * @hba: pointer to adapter instance
 712  *
 713  * Returns true if device present, false if no device detected
 714  */
 715 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
 716 {
 717         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 718                                                 DEVICE_PRESENT) ? true : false;
 719 }
 720
 721 /**
 722  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 723  * @lrbp: pointer to local command reference block
 724  *
 725  * This function is used to get the OCS field from UTRD
 726  * Returns the OCS field in the UTRD
 727  */
 728 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 729 {
 730         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 731 }
 732
 733 /**
 734  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 735  * @hba: per adapter instance
 736  * @pos: position of the bit to be cleared
 737  */
 738 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 739 {
 740         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 741                 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 742         else
 743                 ufshcd_writel(hba, ~(1 << pos),
 744                                 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 745 }
 746
 747 /**
 748  * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 749  * @hba: per adapter instance
 750  * @pos: position of the bit to be cleared
 751  */
 752 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
 753 {
 754         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 755                 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 756         else
 757                 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 758 }
 759
 760 /**
 761  * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 762  * @hba: per adapter instance
 763  * @tag: position of the bit to be cleared
 764  */
 765 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
 766 {
 767         clear_bit(tag, &hba->outstanding_reqs);
 768 }
 769
 770 /**
 771  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 772  * @reg: Register value of host controller status
 773  *
 774  * Returns integer, 0 on Success and positive value if failed
 775  */
 776 static inline int ufshcd_get_lists_status(u32 reg)
 777 {
 778         return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
 779 }
 780
 781 /**
 782  * ufshcd_get_uic_cmd_result - Get the UIC command result
 783  * @hba: Pointer to adapter instance
 784  *
 785  * This function gets the result of UIC command completion
 786  * Returns 0 on success, non zero value on error
 787  */
 788 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 789 {
 790         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 791                MASK_UIC_COMMAND_RESULT;
 792 }
 793
 794 /**
 795  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 796  * @hba: Pointer to adapter instance
 797  *
 798  * This function gets UIC command argument3
 799  * Returns 0 on success, non zero value on error
 800  */
 801 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 802 {
 803         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 804 }
 805
 806 /**
 807  * ufshcd_get_req_rsp - returns the TR response transaction type
 808  * @ucd_rsp_ptr: pointer to response UPIU
 809  */
 810 static inline int
 811 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 812 {
 813         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 814 }
 815
 816 /**
 817  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 818  * @ucd_rsp_ptr: pointer to response UPIU
 819  *
 820  * This function gets the response status and scsi_status from response UPIU
 821  * Returns the response result code.
 822  */
 823 static inline int
 824 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 825 {
 826         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 827 }
 828
 829 /*
 830  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 831  *                              from response UPIU
 832  * @ucd_rsp_ptr: pointer to response UPIU
 833  *
 834  * Return the data segment length.
 835  */
 836 static inline unsigned int
 837 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 838 {
 839         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 840                 MASK_RSP_UPIU_DATA_SEG_LEN;
 841 }
 842
 843 /**
 844  * ufshcd_is_exception_event - Check if the device raised an exception event
 845  * @ucd_rsp_ptr: pointer to response UPIU
 846  *
 847  * The function checks if the device raised an exception event indicated in
 848  * the Device Information field of response UPIU.
 849  *
 850  * Returns true if exception is raised, false otherwise.
 851  */
 852 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 853 {
 854         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 855                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 856 }
 857
 858 /**
 859  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 860  * @hba: per adapter instance
 861  */
 862 static inline void
 863 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 864 {
 865         ufshcd_writel(hba, INT_AGGR_ENABLE |
 866                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 867                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 868 }
 869
 870 /**
 871  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 872  * @hba: per adapter instance
 873  * @cnt: Interrupt aggregation counter threshold
 874  * @tmout: Interrupt aggregation timeout value
 875  */
 876 static inline void
 877 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 878 {
 879         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 880                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 881                       INT_AGGR_TIMEOUT_VAL(tmout),
 882                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 883 }
 884
 885 /**
 886  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 887  * @hba: per adapter instance
 888  */
 889 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 890 {
 891         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 892 }
 893
 894 /**
 895  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 896  *                      When run-stop registers are set to 1, it indicates the
 897  *                      host controller that it can process the requests
 898  * @hba: per adapter instance
 899  */
 900 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 901 {
 902         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 903                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 904         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 905                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 906 }
 907
 908 /**
 909  * ufshcd_hba_start - Start controller initialization sequence
 910  * @hba: per adapter instance
 911  */
 912 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 913 {
 914         u32 val = CONTROLLER_ENABLE;
 915
 916         if (ufshcd_crypto_enable(hba))
 917                 val |= CRYPTO_GENERAL_ENABLE;
 918
 919         ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
 920 }
 921
 922 /**
 923  * ufshcd_is_hba_active - Get controller state
 924  * @hba: per adapter instance
 925  *
 926  * Returns false if controller is active, true otherwise
 927  */
 928 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
 929 {
 930         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
 931                 ? false : true;
 932 }
 933
 934 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 935 {
 936         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 937         if (hba->ufs_version <= ufshci_version(1, 1))
 938                 return UFS_UNIPRO_VER_1_41;
 939         else
 940                 return UFS_UNIPRO_VER_1_6;
 941 }
 942 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 943
 944 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 945 {
 946         /*
 947          * If both host and device support UniPro ver1.6 or later, PA layer
 948          * parameters tuning happens during link startup itself.
 949          *
 950          * We can manually tune PA layer parameters if either host or device
 951          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 952          * logic simple, we will only do manual tuning if local unipro version
 953          * doesn't support ver1.6 or later.
 954          */
 955         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 956                 return true;
 957         else
 958                 return false;
 959 }
 960
 961 /**
 962  * ufshcd_set_clk_freq - set UFS controller clock frequencies
 963  * @hba: per adapter instance
 964  * @scale_up: If True, set max possible frequency othewise set low frequency
 965  *
 966  * Returns 0 if successful
 967  * Returns < 0 for any other errors
 968  */
 969 static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
 970 {
 971         int ret = 0;
 972         struct ufs_clk_info *clki;
 973         struct list_head *head = &hba->clk_list_head;
 974
 975         if (list_empty(head))
 976                 goto out;
 977
 978         list_for_each_entry(clki, head, list) {
 979                 if (!IS_ERR_OR_NULL(clki->clk)) {
 980                         if (scale_up && clki->max_freq) {
 981                                 if (clki->curr_freq == clki->max_freq)
 982                                         continue;
 983
 984                                 ret = clk_set_rate(clki->clk, clki->max_freq);
 985                                 if (ret) {
 986                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 987                                                 __func__, clki->name,
 988                                                 clki->max_freq, ret);
 989                                         break;
 990                                 }
 991                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 992                                                 "scaled up", clki->name,
 993                                                 clki->curr_freq,
 994                                                 clki->max_freq);
 995
 996                                 clki->curr_freq = clki->max_freq;
 997
 998                         } else if (!scale_up && clki->min_freq) {
 999                                 if (clki->curr_freq == clki->min_freq)
1000                                         continue;
1001
1002                                 ret = clk_set_rate(clki->clk, clki->min_freq);
1003                                 if (ret) {
1004                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1005                                                 __func__, clki->name,
1006                                                 clki->min_freq, ret);
1007                                         break;
1008                                 }
1009                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1010                                                 "scaled down", clki->name,
1011                                                 clki->curr_freq,
1012                                                 clki->min_freq);
1013                                 clki->curr_freq = clki->min_freq;
1014                         }
1015                 }
1016                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
1017                                 clki->name, clk_get_rate(clki->clk));
1018         }
1019
1020 out:
1021         return ret;
1022 }
1023
1024 /**
1025  * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1026  * @hba: per adapter instance
1027  * @scale_up: True if scaling up and false if scaling down
1028  *
1029  * Returns 0 if successful
1030  * Returns < 0 for any other errors
1031  */
1032 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1033 {
1034         int ret = 0;
1035         ktime_t start = ktime_get();
1036
1037         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1038         if (ret)
1039                 goto out;
1040
1041         ret = ufshcd_set_clk_freq(hba, scale_up);
1042         if (ret)
1043                 goto out;
1044
1045         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1046         if (ret)
1047                 ufshcd_set_clk_freq(hba, !scale_up);
1048
1049 out:
1050         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1051                         (scale_up ? "up" : "down"),
1052                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1053         return ret;
1054 }
1055
1056 /**
1057  * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1058  * @hba: per adapter instance
1059  * @scale_up: True if scaling up and false if scaling down
1060  *
1061  * Returns true if scaling is required, false otherwise.
1062  */
1063 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1064                                                bool scale_up)
1065 {
1066         struct ufs_clk_info *clki;
1067         struct list_head *head = &hba->clk_list_head;
1068
1069         if (list_empty(head))
1070                 return false;
1071
1072         list_for_each_entry(clki, head, list) {
1073                 if (!IS_ERR_OR_NULL(clki->clk)) {
1074                         if (scale_up && clki->max_freq) {
1075                                 if (clki->curr_freq == clki->max_freq)
1076                                         continue;
1077                                 return true;
1078                         } else if (!scale_up && clki->min_freq) {
1079                                 if (clki->curr_freq == clki->min_freq)
1080                                         continue;
1081                                 return true;
1082                         }
1083                 }
1084         }
1085
1086         return false;
1087 }
1088
1089 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1090                                         u64 wait_timeout_us)
1091 {
1092         unsigned long flags;
1093         int ret = 0;
1094         u32 tm_doorbell;
1095         u32 tr_doorbell;
1096         bool timeout = false, do_last_check = false;
1097         ktime_t start;
1098
1099         ufshcd_hold(hba, false);
1100         spin_lock_irqsave(hba->host->host_lock, flags);
1101         /*
1102          * Wait for all the outstanding tasks/transfer requests.
1103          * Verify by checking the doorbell registers are clear.
1104          */
1105         start = ktime_get();
1106         do {
1107                 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1108                         ret = -EBUSY;
1109                         goto out;
1110                 }
1111
1112                 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1113                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1114                 if (!tm_doorbell && !tr_doorbell) {
1115                         timeout = false;
1116                         break;
1117                 } else if (do_last_check) {
1118                         break;
1119                 }
1120
1121                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1122                 schedule();
1123                 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1124                     wait_timeout_us) {
1125                         timeout = true;
1126                         /*
1127                          * We might have scheduled out for long time so make
1128                          * sure to check if doorbells are cleared by this time
1129                          * or not.
1130                          */
1131                         do_last_check = true;
1132                 }
1133                 spin_lock_irqsave(hba->host->host_lock, flags);
1134         } while (tm_doorbell || tr_doorbell);
1135
1136         if (timeout) {
1137                 dev_err(hba->dev,
1138                         "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1139                         __func__, tm_doorbell, tr_doorbell);
1140                 ret = -EBUSY;
1141         }
1142 out:
1143         spin_unlock_irqrestore(hba->host->host_lock, flags);
1144         ufshcd_release(hba);
1145         return ret;
1146 }
1147
1148 /**
1149  * ufshcd_scale_gear - scale up/down UFS gear
1150  * @hba: per adapter instance
1151  * @scale_up: True for scaling up gear and false for scaling down
1152  *
1153  * Returns 0 for success,
1154  * Returns -EBUSY if scaling can't happen at this time
1155  * Returns non-zero for any other errors
1156  */
1157 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1158 {
1159         int ret = 0;
1160         struct ufs_pa_layer_attr new_pwr_info;
1161
1162         if (scale_up) {
1163                 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1164                        sizeof(struct ufs_pa_layer_attr));
1165         } else {
1166                 memcpy(&new_pwr_info, &hba->pwr_info,
1167                        sizeof(struct ufs_pa_layer_attr));
1168
1169                 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1170                     hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
1171                         /* save the current power mode */
1172                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
1173                                 &hba->pwr_info,
1174                                 sizeof(struct ufs_pa_layer_attr));
1175
1176                         /* scale down gear */
1177                         new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1178                         new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
1179                 }
1180         }
1181
1182         /* check if the power mode needs to be changed or not? */
1183         ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
1184         if (ret)
1185                 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1186                         __func__, ret,
1187                         hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1188                         new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1189
1190         return ret;
1191 }
1192
1193 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1194 {
1195         #define DOORBELL_CLR_TOUT_US            (1000 * 1000) /* 1 sec */
1196         int ret = 0;
1197         /*
1198          * make sure that there are no outstanding requests when
1199          * clock scaling is in progress
1200          */
1201         ufshcd_scsi_block_requests(hba);
1202         down_write(&hba->clk_scaling_lock);
1203
1204         if (!hba->clk_scaling.is_allowed ||
1205             ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1206                 ret = -EBUSY;
1207                 up_write(&hba->clk_scaling_lock);
1208                 ufshcd_scsi_unblock_requests(hba);
1209                 goto out;
1210         }
1211
1212         /* let's not get into low power until clock scaling is completed */
1213         ufshcd_hold(hba, false);
1214
1215 out:
1216         return ret;
1217 }
1218
1219 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
1220 {
1221         if (writelock)
1222                 up_write(&hba->clk_scaling_lock);
1223         else
1224                 up_read(&hba->clk_scaling_lock);
1225         ufshcd_scsi_unblock_requests(hba);
1226         ufshcd_release(hba);
1227 }
1228
1229 /**
1230  * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1231  * @hba: per adapter instance
1232  * @scale_up: True for scaling up and false for scalin down
1233  *
1234  * Returns 0 for success,
1235  * Returns -EBUSY if scaling can't happen at this time
1236  * Returns non-zero for any other errors
1237  */
1238 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1239 {
1240         int ret = 0;
1241         bool is_writelock = true;
1242
1243         ret = ufshcd_clock_scaling_prepare(hba);
1244         if (ret)
1245                 return ret;
1246
1247         /* scale down the gear before scaling down clocks */
1248         if (!scale_up) {
1249                 ret = ufshcd_scale_gear(hba, false);
1250                 if (ret)
1251                         goto out_unprepare;
1252         }
1253
1254         ret = ufshcd_scale_clks(hba, scale_up);
1255         if (ret) {
1256                 if (!scale_up)
1257                         ufshcd_scale_gear(hba, true);
1258                 goto out_unprepare;
1259         }
1260
1261         /* scale up the gear after scaling up clocks */
1262         if (scale_up) {
1263                 ret = ufshcd_scale_gear(hba, true);
1264                 if (ret) {
1265                         ufshcd_scale_clks(hba, false);
1266                         goto out_unprepare;
1267                 }
1268         }
1269
1270         /* Enable Write Booster if we have scaled up else disable it */
1271         downgrade_write(&hba->clk_scaling_lock);
1272         is_writelock = false;
1273         ufshcd_wb_toggle(hba, scale_up);
1274
1275 out_unprepare:
1276         ufshcd_clock_scaling_unprepare(hba, is_writelock);
1277         return ret;
1278 }
1279
1280 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1281 {
1282         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1283                                            clk_scaling.suspend_work);
1284         unsigned long irq_flags;
1285
1286         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1287         if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1288                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1289                 return;
1290         }
1291         hba->clk_scaling.is_suspended = true;
1292         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1293
1294         __ufshcd_suspend_clkscaling(hba);
1295 }
1296
1297 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1298 {
1299         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1300                                            clk_scaling.resume_work);
1301         unsigned long irq_flags;
1302
1303         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1304         if (!hba->clk_scaling.is_suspended) {
1305                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1306                 return;
1307         }
1308         hba->clk_scaling.is_suspended = false;
1309         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1310
1311         devfreq_resume_device(hba->devfreq);
1312 }
1313
1314 static int ufshcd_devfreq_target(struct device *dev,
1315                                 unsigned long *freq, u32 flags)
1316 {
1317         int ret = 0;
1318         struct ufs_hba *hba = dev_get_drvdata(dev);
1319         ktime_t start;
1320         bool scale_up, sched_clk_scaling_suspend_work = false;
1321         struct list_head *clk_list = &hba->clk_list_head;
1322         struct ufs_clk_info *clki;
1323         unsigned long irq_flags;
1324
1325         if (!ufshcd_is_clkscaling_supported(hba))
1326                 return -EINVAL;
1327
1328         clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1329         /* Override with the closest supported frequency */
1330         *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
1331         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1332         if (ufshcd_eh_in_progress(hba)) {
1333                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1334                 return 0;
1335         }
1336
1337         if (!hba->clk_scaling.active_reqs)
1338                 sched_clk_scaling_suspend_work = true;
1339
1340         if (list_empty(clk_list)) {
1341                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1342                 goto out;
1343         }
1344
1345         /* Decide based on the rounded-off frequency and update */
1346         scale_up = (*freq == clki->max_freq) ? true : false;
1347         if (!scale_up)
1348                 *freq = clki->min_freq;
1349         /* Update the frequency */
1350         if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1351                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1352                 ret = 0;
1353                 goto out; /* no state change required */
1354         }
1355         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1356
1357         start = ktime_get();
1358         ret = ufshcd_devfreq_scale(hba, scale_up);
1359
1360         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1361                 (scale_up ? "up" : "down"),
1362                 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1363
1364 out:
1365         if (sched_clk_scaling_suspend_work)
1366                 queue_work(hba->clk_scaling.workq,
1367                            &hba->clk_scaling.suspend_work);
1368
1369         return ret;
1370 }
1371
1372 static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1373 {
1374         int *busy = priv;
1375
1376         WARN_ON_ONCE(reserved);
1377         (*busy)++;
1378         return false;
1379 }
1380
1381 /* Whether or not any tag is in use by a request that is in progress. */
1382 static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1383 {
1384         struct request_queue *q = hba->cmd_queue;
1385         int busy = 0;
1386
1387         blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1388         return busy;
1389 }
1390
1391 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1392                 struct devfreq_dev_status *stat)
1393 {
1394         struct ufs_hba *hba = dev_get_drvdata(dev);
1395         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1396         unsigned long flags;
1397         struct list_head *clk_list = &hba->clk_list_head;
1398         struct ufs_clk_info *clki;
1399         ktime_t curr_t;
1400
1401         if (!ufshcd_is_clkscaling_supported(hba))
1402                 return -EINVAL;
1403
1404         memset(stat, 0, sizeof(*stat));
1405
1406         spin_lock_irqsave(hba->host->host_lock, flags);
1407         curr_t = ktime_get();
1408         if (!scaling->window_start_t)
1409                 goto start_window;
1410
1411         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1412         /*
1413          * If current frequency is 0, then the ondemand governor considers
1414          * there's no initial frequency set. And it always requests to set
1415          * to max. frequency.
1416          */
1417         stat->current_frequency = clki->curr_freq;
1418         if (scaling->is_busy_started)
1419                 scaling->tot_busy_t += ktime_us_delta(curr_t,
1420                                 scaling->busy_start_t);
1421
1422         stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
1423         stat->busy_time = scaling->tot_busy_t;
1424 start_window:
1425         scaling->window_start_t = curr_t;
1426         scaling->tot_busy_t = 0;
1427
1428         if (hba->outstanding_reqs) {
1429                 scaling->busy_start_t = curr_t;
1430                 scaling->is_busy_started = true;
1431         } else {
1432                 scaling->busy_start_t = 0;
1433                 scaling->is_busy_started = false;
1434         }
1435         spin_unlock_irqrestore(hba->host->host_lock, flags);
1436         return 0;
1437 }
1438
1439 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1440 {
1441         struct list_head *clk_list = &hba->clk_list_head;
1442         struct ufs_clk_info *clki;
1443         struct devfreq *devfreq;
1444         int ret;
1445
1446         /* Skip devfreq if we don't have any clocks in the list */
1447         if (list_empty(clk_list))
1448                 return 0;
1449
1450         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1451         dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1452         dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1453
1454         ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1455                                          &hba->vps->ondemand_data);
1456         devfreq = devfreq_add_device(hba->dev,
1457                         &hba->vps->devfreq_profile,
1458                         DEVFREQ_GOV_SIMPLE_ONDEMAND,
1459                         &hba->vps->ondemand_data);
1460         if (IS_ERR(devfreq)) {
1461                 ret = PTR_ERR(devfreq);
1462                 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1463
1464                 dev_pm_opp_remove(hba->dev, clki->min_freq);
1465                 dev_pm_opp_remove(hba->dev, clki->max_freq);
1466                 return ret;
1467         }
1468
1469         hba->devfreq = devfreq;
1470
1471         return 0;
1472 }
1473
1474 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1475 {
1476         struct list_head *clk_list = &hba->clk_list_head;
1477         struct ufs_clk_info *clki;
1478
1479         if (!hba->devfreq)
1480                 return;
1481
1482         devfreq_remove_device(hba->devfreq);
1483         hba->devfreq = NULL;
1484
1485         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1486         dev_pm_opp_remove(hba->dev, clki->min_freq);
1487         dev_pm_opp_remove(hba->dev, clki->max_freq);
1488 }
1489
1490 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1491 {
1492         unsigned long flags;
1493
1494         devfreq_suspend_device(hba->devfreq);
1495         spin_lock_irqsave(hba->host->host_lock, flags);
1496         hba->clk_scaling.window_start_t = 0;
1497         spin_unlock_irqrestore(hba->host->host_lock, flags);
1498 }
1499
1500 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1501 {
1502         unsigned long flags;
1503         bool suspend = false;
1504
1505         cancel_work_sync(&hba->clk_scaling.suspend_work);
1506         cancel_work_sync(&hba->clk_scaling.resume_work);
1507
1508         spin_lock_irqsave(hba->host->host_lock, flags);
1509         if (!hba->clk_scaling.is_suspended) {
1510                 suspend = true;
1511                 hba->clk_scaling.is_suspended = true;
1512         }
1513         spin_unlock_irqrestore(hba->host->host_lock, flags);
1514
1515         if (suspend)
1516                 __ufshcd_suspend_clkscaling(hba);
1517 }
1518
1519 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1520 {
1521         unsigned long flags;
1522         bool resume = false;
1523
1524         spin_lock_irqsave(hba->host->host_lock, flags);
1525         if (hba->clk_scaling.is_suspended) {
1526                 resume = true;
1527                 hba->clk_scaling.is_suspended = false;
1528         }
1529         spin_unlock_irqrestore(hba->host->host_lock, flags);
1530
1531         if (resume)
1532                 devfreq_resume_device(hba->devfreq);
1533 }
1534
1535 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1536                 struct device_attribute *attr, char *buf)
1537 {
1538         struct ufs_hba *hba = dev_get_drvdata(dev);
1539
1540         return sysfs_emit(buf, "%d\n", hba->clk_scaling.is_enabled);
1541 }
1542
1543 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1544                 struct device_attribute *attr, const char *buf, size_t count)
1545 {
1546         struct ufs_hba *hba = dev_get_drvdata(dev);
1547         u32 value;
1548         int err = 0;
1549
1550         if (kstrtou32(buf, 0, &value))
1551                 return -EINVAL;
1552
1553         down(&hba->host_sem);
1554         if (!ufshcd_is_user_access_allowed(hba)) {
1555                 err = -EBUSY;
1556                 goto out;
1557         }
1558
1559         value = !!value;
1560         if (value == hba->clk_scaling.is_enabled)
1561                 goto out;
1562
1563         ufshcd_rpm_get_sync(hba);
1564         ufshcd_hold(hba, false);
1565
1566         hba->clk_scaling.is_enabled = value;
1567
1568         if (value) {
1569                 ufshcd_resume_clkscaling(hba);
1570         } else {
1571                 ufshcd_suspend_clkscaling(hba);
1572                 err = ufshcd_devfreq_scale(hba, true);
1573                 if (err)
1574                         dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1575                                         __func__, err);
1576         }
1577
1578         ufshcd_release(hba);
1579         ufshcd_rpm_put_sync(hba);
1580 out:
1581         up(&hba->host_sem);
1582         return err ? err : count;
1583 }
1584
1585 static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
1586 {
1587         hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1588         hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1589         sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1590         hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1591         hba->clk_scaling.enable_attr.attr.mode = 0644;
1592         if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1593                 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1594 }
1595
1596 static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1597 {
1598         if (hba->clk_scaling.enable_attr.attr.name)
1599                 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1600 }
1601
1602 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1603 {
1604         char wq_name[sizeof("ufs_clkscaling_00")];
1605
1606         if (!ufshcd_is_clkscaling_supported(hba))
1607                 return;
1608
1609         if (!hba->clk_scaling.min_gear)
1610                 hba->clk_scaling.min_gear = UFS_HS_G1;
1611
1612         INIT_WORK(&hba->clk_scaling.suspend_work,
1613                   ufshcd_clk_scaling_suspend_work);
1614         INIT_WORK(&hba->clk_scaling.resume_work,
1615                   ufshcd_clk_scaling_resume_work);
1616
1617         snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1618                  hba->host->host_no);
1619         hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1620
1621         hba->clk_scaling.is_initialized = true;
1622 }
1623
1624 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1625 {
1626         if (!hba->clk_scaling.is_initialized)
1627                 return;
1628
1629         ufshcd_remove_clk_scaling_sysfs(hba);
1630         destroy_workqueue(hba->clk_scaling.workq);
1631         ufshcd_devfreq_remove(hba);
1632         hba->clk_scaling.is_initialized = false;
1633 }
1634
1635 static void ufshcd_ungate_work(struct work_struct *work)
1636 {
1637         int ret;
1638         unsigned long flags;
1639         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1640                         clk_gating.ungate_work);
1641
1642         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1643
1644         spin_lock_irqsave(hba->host->host_lock, flags);
1645         if (hba->clk_gating.state == CLKS_ON) {
1646                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1647                 goto unblock_reqs;
1648         }
1649
1650         spin_unlock_irqrestore(hba->host->host_lock, flags);
1651         ufshcd_hba_vreg_set_hpm(hba);
1652         ufshcd_setup_clocks(hba, true);
1653
1654         ufshcd_enable_irq(hba);
1655
1656         /* Exit from hibern8 */
1657         if (ufshcd_can_hibern8_during_gating(hba)) {
1658                 /* Prevent gating in this path */
1659                 hba->clk_gating.is_suspended = true;
1660                 if (ufshcd_is_link_hibern8(hba)) {
1661                         ret = ufshcd_uic_hibern8_exit(hba);
1662                         if (ret)
1663                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1664                                         __func__, ret);
1665                         else
1666                                 ufshcd_set_link_active(hba);
1667                 }
1668                 hba->clk_gating.is_suspended = false;
1669         }
1670 unblock_reqs:
1671         ufshcd_scsi_unblock_requests(hba);
1672 }
1673
1674 /**
1675  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1676  * Also, exit from hibern8 mode and set the link as active.
1677  * @hba: per adapter instance
1678  * @async: This indicates whether caller should ungate clocks asynchronously.
1679  */
1680 int ufshcd_hold(struct ufs_hba *hba, bool async)
1681 {
1682         int rc = 0;
1683         bool flush_result;
1684         unsigned long flags;
1685
1686         if (!ufshcd_is_clkgating_allowed(hba))
1687                 goto out;
1688         spin_lock_irqsave(hba->host->host_lock, flags);
1689         hba->clk_gating.active_reqs++;
1690
1691 start:
1692         switch (hba->clk_gating.state) {
1693         case CLKS_ON:
1694                 /*
1695                  * Wait for the ungate work to complete if in progress.
1696                  * Though the clocks may be in ON state, the link could
1697                  * still be in hibner8 state if hibern8 is allowed
1698                  * during clock gating.
1699                  * Make sure we exit hibern8 state also in addition to
1700                  * clocks being ON.
1701                  */
1702                 if (ufshcd_can_hibern8_during_gating(hba) &&
1703                     ufshcd_is_link_hibern8(hba)) {
1704                         if (async) {
1705                                 rc = -EAGAIN;
1706                                 hba->clk_gating.active_reqs--;
1707                                 break;
1708                         }
1709                         spin_unlock_irqrestore(hba->host->host_lock, flags);
1710                         flush_result = flush_work(&hba->clk_gating.ungate_work);
1711                         if (hba->clk_gating.is_suspended && !flush_result)
1712                                 goto out;
1713                         spin_lock_irqsave(hba->host->host_lock, flags);
1714                         goto start;
1715                 }
1716                 break;
1717         case REQ_CLKS_OFF:
1718                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1719                         hba->clk_gating.state = CLKS_ON;
1720                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1721                                                 hba->clk_gating.state);
1722                         break;
1723                 }
1724                 /*
1725                  * If we are here, it means gating work is either done or
1726                  * currently running. Hence, fall through to cancel gating
1727                  * work and to enable clocks.
1728                  */
1729                 fallthrough;
1730         case CLKS_OFF:
1731                 hba->clk_gating.state = REQ_CLKS_ON;
1732                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1733                                         hba->clk_gating.state);
1734                 if (queue_work(hba->clk_gating.clk_gating_workq,
1735                                &hba->clk_gating.ungate_work))
1736                         ufshcd_scsi_block_requests(hba);
1737                 /*
1738                  * fall through to check if we should wait for this
1739                  * work to be done or not.
1740                  */
1741                 fallthrough;
1742         case REQ_CLKS_ON:
1743                 if (async) {
1744                         rc = -EAGAIN;
1745                         hba->clk_gating.active_reqs--;
1746                         break;
1747                 }
1748
1749                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1750                 flush_work(&hba->clk_gating.ungate_work);
1751                 /* Make sure state is CLKS_ON before returning */
1752                 spin_lock_irqsave(hba->host->host_lock, flags);
1753                 goto start;
1754         default:
1755                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1756                                 __func__, hba->clk_gating.state);
1757                 break;
1758         }
1759         spin_unlock_irqrestore(hba->host->host_lock, flags);
1760 out:
1761         return rc;
1762 }
1763 EXPORT_SYMBOL_GPL(ufshcd_hold);
1764
1765 static void ufshcd_gate_work(struct work_struct *work)
1766 {
1767         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1768                         clk_gating.gate_work.work);
1769         unsigned long flags;
1770         int ret;
1771
1772         spin_lock_irqsave(hba->host->host_lock, flags);
1773         /*
1774          * In case you are here to cancel this work the gating state
1775          * would be marked as REQ_CLKS_ON. In this case save time by
1776          * skipping the gating work and exit after changing the clock
1777          * state to CLKS_ON.
1778          */
1779         if (hba->clk_gating.is_suspended ||
1780                 (hba->clk_gating.state != REQ_CLKS_OFF)) {
1781                 hba->clk_gating.state = CLKS_ON;
1782                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1783                                         hba->clk_gating.state);
1784                 goto rel_lock;
1785         }
1786
1787         if (hba->clk_gating.active_reqs
1788                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1789                 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1790                 || hba->active_uic_cmd || hba->uic_async_done)
1791                 goto rel_lock;
1792
1793         spin_unlock_irqrestore(hba->host->host_lock, flags);
1794
1795         /* put the link into hibern8 mode before turning off clocks */
1796         if (ufshcd_can_hibern8_during_gating(hba)) {
1797                 ret = ufshcd_uic_hibern8_enter(hba);
1798                 if (ret) {
1799                         hba->clk_gating.state = CLKS_ON;
1800                         dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1801                                         __func__, ret);
1802                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1803                                                 hba->clk_gating.state);
1804                         goto out;
1805                 }
1806                 ufshcd_set_link_hibern8(hba);
1807         }
1808
1809         ufshcd_disable_irq(hba);
1810
1811         ufshcd_setup_clocks(hba, false);
1812
1813         /* Put the host controller in low power mode if possible */
1814         ufshcd_hba_vreg_set_lpm(hba);
1815         /*
1816          * In case you are here to cancel this work the gating state
1817          * would be marked as REQ_CLKS_ON. In this case keep the state
1818          * as REQ_CLKS_ON which would anyway imply that clocks are off
1819          * and a request to turn them on is pending. By doing this way,
1820          * we keep the state machine in tact and this would ultimately
1821          * prevent from doing cancel work multiple times when there are
1822          * new requests arriving before the current cancel work is done.
1823          */
1824         spin_lock_irqsave(hba->host->host_lock, flags);
1825         if (hba->clk_gating.state == REQ_CLKS_OFF) {
1826                 hba->clk_gating.state = CLKS_OFF;
1827                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1828                                         hba->clk_gating.state);
1829         }
1830 rel_lock:
1831         spin_unlock_irqrestore(hba->host->host_lock, flags);
1832 out:
1833         return;
1834 }
1835
1836 /* host lock must be held before calling this variant */
1837 static void __ufshcd_release(struct ufs_hba *hba)
1838 {
1839         if (!ufshcd_is_clkgating_allowed(hba))
1840                 return;
1841
1842         hba->clk_gating.active_reqs--;
1843
1844         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1845             hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
1846             hba->outstanding_tasks ||
1847             hba->active_uic_cmd || hba->uic_async_done ||
1848             hba->clk_gating.state == CLKS_OFF)
1849                 return;
1850
1851         hba->clk_gating.state = REQ_CLKS_OFF;
1852         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1853         queue_delayed_work(hba->clk_gating.clk_gating_workq,
1854                            &hba->clk_gating.gate_work,
1855                            msecs_to_jiffies(hba->clk_gating.delay_ms));
1856 }
1857
1858 void ufshcd_release(struct ufs_hba *hba)
1859 {
1860         unsigned long flags;
1861
1862         spin_lock_irqsave(hba->host->host_lock, flags);
1863         __ufshcd_release(hba);
1864         spin_unlock_irqrestore(hba->host->host_lock, flags);
1865 }
1866 EXPORT_SYMBOL_GPL(ufshcd_release);
1867
1868 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1869                 struct device_attribute *attr, char *buf)
1870 {
1871         struct ufs_hba *hba = dev_get_drvdata(dev);
1872
1873         return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
1874 }
1875
1876 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1877                 struct device_attribute *attr, const char *buf, size_t count)
1878 {
1879         struct ufs_hba *hba = dev_get_drvdata(dev);
1880         unsigned long flags, value;
1881
1882         if (kstrtoul(buf, 0, &value))
1883                 return -EINVAL;
1884
1885         spin_lock_irqsave(hba->host->host_lock, flags);
1886         hba->clk_gating.delay_ms = value;
1887         spin_unlock_irqrestore(hba->host->host_lock, flags);
1888         return count;
1889 }
1890
1891 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1892                 struct device_attribute *attr, char *buf)
1893 {
1894         struct ufs_hba *hba = dev_get_drvdata(dev);
1895
1896         return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
1897 }
1898
1899 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1900                 struct device_attribute *attr, const char *buf, size_t count)
1901 {
1902         struct ufs_hba *hba = dev_get_drvdata(dev);
1903         unsigned long flags;
1904         u32 value;
1905
1906         if (kstrtou32(buf, 0, &value))
1907                 return -EINVAL;
1908
1909         value = !!value;
1910
1911         spin_lock_irqsave(hba->host->host_lock, flags);
1912         if (value == hba->clk_gating.is_enabled)
1913                 goto out;
1914
1915         if (value)
1916                 __ufshcd_release(hba);
1917         else
1918                 hba->clk_gating.active_reqs++;
1919
1920         hba->clk_gating.is_enabled = value;
1921 out:
1922         spin_unlock_irqrestore(hba->host->host_lock, flags);
1923         return count;
1924 }
1925
1926 static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
1927 {
1928         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1929         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1930         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1931         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1932         hba->clk_gating.delay_attr.attr.mode = 0644;
1933         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1934                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1935
1936         hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1937         hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1938         sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1939         hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1940         hba->clk_gating.enable_attr.attr.mode = 0644;
1941         if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1942                 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1943 }
1944
1945 static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
1946 {
1947         if (hba->clk_gating.delay_attr.attr.name)
1948                 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1949         if (hba->clk_gating.enable_attr.attr.name)
1950                 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1951 }
1952
1953 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1954 {
1955         char wq_name[sizeof("ufs_clk_gating_00")];
1956
1957         if (!ufshcd_is_clkgating_allowed(hba))
1958                 return;
1959
1960         hba->clk_gating.state = CLKS_ON;
1961
1962         hba->clk_gating.delay_ms = 150;
1963         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1964         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1965
1966         snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1967                  hba->host->host_no);
1968         hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1969                                         WQ_MEM_RECLAIM | WQ_HIGHPRI);
1970
1971         ufshcd_init_clk_gating_sysfs(hba);
1972
1973         hba->clk_gating.is_enabled = true;
1974         hba->clk_gating.is_initialized = true;
1975 }
1976
1977 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1978 {
1979         if (!hba->clk_gating.is_initialized)
1980                 return;
1981         ufshcd_remove_clk_gating_sysfs(hba);
1982         cancel_work_sync(&hba->clk_gating.ungate_work);
1983         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1984         destroy_workqueue(hba->clk_gating.clk_gating_workq);
1985         hba->clk_gating.is_initialized = false;
1986 }
1987
1988 /* Must be called with host lock acquired */
1989 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1990 {
1991         bool queue_resume_work = false;
1992         ktime_t curr_t = ktime_get();
1993         unsigned long flags;
1994
1995         if (!ufshcd_is_clkscaling_supported(hba))
1996                 return;
1997
1998         spin_lock_irqsave(hba->host->host_lock, flags);
1999         if (!hba->clk_scaling.active_reqs++)
2000                 queue_resume_work = true;
2001
2002         if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress) {
2003                 spin_unlock_irqrestore(hba->host->host_lock, flags);
2004                 return;
2005         }
2006
2007         if (queue_resume_work)
2008                 queue_work(hba->clk_scaling.workq,
2009                            &hba->clk_scaling.resume_work);
2010
2011         if (!hba->clk_scaling.window_start_t) {
2012                 hba->clk_scaling.window_start_t = curr_t;
2013                 hba->clk_scaling.tot_busy_t = 0;
2014                 hba->clk_scaling.is_busy_started = false;
2015         }
2016
2017         if (!hba->clk_scaling.is_busy_started) {
2018                 hba->clk_scaling.busy_start_t = curr_t;
2019                 hba->clk_scaling.is_busy_started = true;
2020         }
2021         spin_unlock_irqrestore(hba->host->host_lock, flags);
2022 }
2023
2024 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2025 {
2026         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
2027         unsigned long flags;
2028
2029         if (!ufshcd_is_clkscaling_supported(hba))
2030                 return;
2031
2032         spin_lock_irqsave(hba->host->host_lock, flags);
2033         hba->clk_scaling.active_reqs--;
2034         if (!hba->outstanding_reqs && scaling->is_busy_started) {
2035                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2036                                         scaling->busy_start_t));
2037                 scaling->busy_start_t = 0;
2038                 scaling->is_busy_started = false;
2039         }
2040         spin_unlock_irqrestore(hba->host->host_lock, flags);
2041 }
2042
2043 static inline int ufshcd_monitor_opcode2dir(u8 opcode)
2044 {
2045         if (opcode == READ_6 || opcode == READ_10 || opcode == READ_16)
2046                 return READ;
2047         else if (opcode == WRITE_6 || opcode == WRITE_10 || opcode == WRITE_16)
2048                 return WRITE;
2049         else
2050                 return -EINVAL;
2051 }
2052
2053 static inline bool ufshcd_should_inform_monitor(struct ufs_hba *hba,
2054                                                 struct ufshcd_lrb *lrbp)
2055 {
2056         struct ufs_hba_monitor *m = &hba->monitor;
2057
2058         return (m->enabled && lrbp && lrbp->cmd &&
2059                 (!m->chunk_size || m->chunk_size == lrbp->cmd->sdb.length) &&
2060                 ktime_before(hba->monitor.enabled_ts, lrbp->issue_time_stamp));
2061 }
2062
2063 static void ufshcd_start_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2064 {
2065         int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2066         unsigned long flags;
2067
2068         spin_lock_irqsave(hba->host->host_lock, flags);
2069         if (dir >= 0 && hba->monitor.nr_queued[dir]++ == 0)
2070                 hba->monitor.busy_start_ts[dir] = ktime_get();
2071         spin_unlock_irqrestore(hba->host->host_lock, flags);
2072 }
2073
2074 static void ufshcd_update_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2075 {
2076         int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2077         unsigned long flags;
2078
2079         spin_lock_irqsave(hba->host->host_lock, flags);
2080         if (dir >= 0 && hba->monitor.nr_queued[dir] > 0) {
2081                 struct request *req = lrbp->cmd->request;
2082                 struct ufs_hba_monitor *m = &hba->monitor;
2083                 ktime_t now, inc, lat;
2084
2085                 now = lrbp->compl_time_stamp;
2086                 inc = ktime_sub(now, m->busy_start_ts[dir]);
2087                 m->total_busy[dir] = ktime_add(m->total_busy[dir], inc);
2088                 m->nr_sec_rw[dir] += blk_rq_sectors(req);
2089
2090                 /* Update latencies */
2091                 m->nr_req[dir]++;
2092                 lat = ktime_sub(now, lrbp->issue_time_stamp);
2093                 m->lat_sum[dir] += lat;
2094                 if (m->lat_max[dir] < lat || !m->lat_max[dir])
2095                         m->lat_max[dir] = lat;
2096                 if (m->lat_min[dir] > lat || !m->lat_min[dir])
2097                         m->lat_min[dir] = lat;
2098
2099                 m->nr_queued[dir]--;
2100                 /* Push forward the busy start of monitor */
2101                 m->busy_start_ts[dir] = now;
2102         }
2103         spin_unlock_irqrestore(hba->host->host_lock, flags);
2104 }
2105
2106 /**
2107  * ufshcd_send_command - Send SCSI or device management commands
2108  * @hba: per adapter instance
2109  * @task_tag: Task tag of the command
2110  */
2111 static inline
2112 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2113 {
2114         struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
2115
2116         lrbp->issue_time_stamp = ktime_get();
2117         lrbp->compl_time_stamp = ktime_set(0, 0);
2118         ufshcd_vops_setup_xfer_req(hba, task_tag, (lrbp->cmd ? true : false));
2119         ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
2120         ufshcd_clk_scaling_start_busy(hba);
2121         if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
2122                 ufshcd_start_monitor(hba, lrbp);
2123         if (ufshcd_has_utrlcnr(hba)) {
2124                 set_bit(task_tag, &hba->outstanding_reqs);
2125                 ufshcd_writel(hba, 1 << task_tag,
2126                               REG_UTP_TRANSFER_REQ_DOOR_BELL);
2127         } else {
2128                 unsigned long flags;
2129
2130                 spin_lock_irqsave(hba->host->host_lock, flags);
2131                 set_bit(task_tag, &hba->outstanding_reqs);
2132                 ufshcd_writel(hba, 1 << task_tag,
2133                               REG_UTP_TRANSFER_REQ_DOOR_BELL);
2134                 spin_unlock_irqrestore(hba->host->host_lock, flags);
2135         }
2136         /* Make sure that doorbell is committed immediately */
2137         wmb();
2138 }
2139
2140 /**
2141  * ufshcd_copy_sense_data - Copy sense data in case of check condition
2142  * @lrbp: pointer to local reference block
2143  */
2144 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2145 {
2146         int len;
2147         if (lrbp->sense_buffer &&
2148             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
2149                 int len_to_copy;
2150
2151                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
2152                 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
2153
2154                 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2155                        len_to_copy);
2156         }
2157 }
2158
2159 /**
2160  * ufshcd_copy_query_response() - Copy the Query Response and the data
2161  * descriptor
2162  * @hba: per adapter instance
2163  * @lrbp: pointer to local reference block
2164  */
2165 static
2166 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2167 {
2168         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2169
2170         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
2171
2172         /* Get the descriptor */
2173         if (hba->dev_cmd.query.descriptor &&
2174             lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
2175                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
2176                                 GENERAL_UPIU_REQUEST_SIZE;
2177                 u16 resp_len;
2178                 u16 buf_len;
2179
2180                 /* data segment length */
2181                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
2182                                                 MASK_QUERY_DATA_SEG_LEN;
2183                 buf_len = be16_to_cpu(
2184                                 hba->dev_cmd.query.request.upiu_req.length);
2185                 if (likely(buf_len >= resp_len)) {
2186                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2187                 } else {
2188                         dev_warn(hba->dev,
2189                                  "%s: rsp size %d is bigger than buffer size %d",
2190                                  __func__, resp_len, buf_len);
2191                         return -EINVAL;
2192                 }
2193         }
2194
2195         return 0;
2196 }
2197
2198 /**
2199  * ufshcd_hba_capabilities - Read controller capabilities
2200  * @hba: per adapter instance
2201  *
2202  * Return: 0 on success, negative on error.
2203  */
2204 static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
2205 {
2206         int err;
2207
2208         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
2209
2210         /* nutrs and nutmrs are 0 based values */
2211         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2212         hba->nutmrs =
2213         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2214
2215         /* Read crypto capabilities */
2216         err = ufshcd_hba_init_crypto_capabilities(hba);
2217         if (err)
2218                 dev_err(hba->dev, "crypto setup failed\n");
2219
2220         return err;
2221 }
2222
2223 /**
2224  * ufshcd_ready_for_uic_cmd - Check if controller is ready
2225  *                            to accept UIC commands
2226  * @hba: per adapter instance
2227  * Return true on success, else false
2228  */
2229 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2230 {
2231         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2232                 return true;
2233         else
2234                 return false;
2235 }
2236
2237 /**
2238  * ufshcd_get_upmcrs - Get the power mode change request status
2239  * @hba: Pointer to adapter instance
2240  *
2241  * This function gets the UPMCRS field of HCS register
2242  * Returns value of UPMCRS field
2243  */
2244 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2245 {
2246         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2247 }
2248
2249 /**
2250  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2251  * @hba: per adapter instance
2252  * @uic_cmd: UIC command
2253  *
2254  * Mutex must be held.
2255  */
2256 static inline void
2257 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2258 {
2259         WARN_ON(hba->active_uic_cmd);
2260
2261         hba->active_uic_cmd = uic_cmd;
2262
2263         /* Write Args */
2264         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2265         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2266         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2267
2268         ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
2269
2270         /* Write UIC Cmd */
2271         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2272                       REG_UIC_COMMAND);
2273 }
2274
2275 /**
2276  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2277  * @hba: per adapter instance
2278  * @uic_cmd: UIC command
2279  *
2280  * Must be called with mutex held.
2281  * Returns 0 only if success.
2282  */
2283 static int
2284 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2285 {
2286         int ret;
2287         unsigned long flags;
2288
2289         if (wait_for_completion_timeout(&uic_cmd->done,
2290                                         msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2291                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2292         } else {
2293                 ret = -ETIMEDOUT;
2294                 dev_err(hba->dev,
2295                         "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2296                         uic_cmd->command, uic_cmd->argument3);
2297
2298                 if (!uic_cmd->cmd_active) {
2299                         dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2300                                 __func__);
2301                         ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2302                 }
2303         }
2304
2305         spin_lock_irqsave(hba->host->host_lock, flags);
2306         hba->active_uic_cmd = NULL;
2307         spin_unlock_irqrestore(hba->host->host_lock, flags);
2308
2309         return ret;
2310 }
2311
2312 /**
2313  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2314  * @hba: per adapter instance
2315  * @uic_cmd: UIC command
2316  * @completion: initialize the completion only if this is set to true
2317  *
2318  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2319  * with mutex held and host_lock locked.
2320  * Returns 0 only if success.
2321  */
2322 static int
2323 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2324                       bool completion)
2325 {
2326         if (!ufshcd_ready_for_uic_cmd(hba)) {
2327                 dev_err(hba->dev,
2328                         "Controller not ready to accept UIC commands\n");
2329                 return -EIO;
2330         }
2331
2332         if (completion)
2333                 init_completion(&uic_cmd->done);
2334
2335         uic_cmd->cmd_active = 1;
2336         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2337
2338         return 0;
2339 }
2340
2341 /**
2342  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2343  * @hba: per adapter instance
2344  * @uic_cmd: UIC command
2345  *
2346  * Returns 0 only if success.
2347  */
2348 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2349 {
2350         int ret;
2351         unsigned long flags;
2352
2353         ufshcd_hold(hba, false);
2354         mutex_lock(&hba->uic_cmd_mutex);
2355         ufshcd_add_delay_before_dme_cmd(hba);
2356
2357         spin_lock_irqsave(hba->host->host_lock, flags);
2358         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2359         spin_unlock_irqrestore(hba->host->host_lock, flags);
2360         if (!ret)
2361                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2362
2363         mutex_unlock(&hba->uic_cmd_mutex);
2364
2365         ufshcd_release(hba);
2366         return ret;
2367 }
2368
2369 /**
2370  * ufshcd_map_sg - Map scatter-gather list to prdt
2371  * @hba: per adapter instance
2372  * @lrbp: pointer to local reference block
2373  *
2374  * Returns 0 in case of success, non-zero value in case of failure
2375  */
2376 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2377 {
2378         struct ufshcd_sg_entry *prd_table;
2379         struct scatterlist *sg;
2380         struct scsi_cmnd *cmd;
2381         int sg_segments;
2382         int i;
2383
2384         cmd = lrbp->cmd;
2385         sg_segments = scsi_dma_map(cmd);
2386         if (sg_segments < 0)
2387                 return sg_segments;
2388
2389         if (sg_segments) {
2390
2391                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2392                         lrbp->utr_descriptor_ptr->prd_table_length =
2393                                 cpu_to_le16((sg_segments *
2394                                         sizeof(struct ufshcd_sg_entry)));
2395                 else
2396                         lrbp->utr_descriptor_ptr->prd_table_length =
2397                                 cpu_to_le16((u16) (sg_segments));
2398
2399                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2400
2401                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2402                         prd_table[i].size  =
2403                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2404                         prd_table[i].base_addr =
2405                                 cpu_to_le32(lower_32_bits(sg->dma_address));
2406                         prd_table[i].upper_addr =
2407                                 cpu_to_le32(upper_32_bits(sg->dma_address));
2408                         prd_table[i].reserved = 0;
2409                 }
2410         } else {
2411                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2412         }
2413
2414         return 0;
2415 }
2416
2417 /**
2418  * ufshcd_enable_intr - enable interrupts
2419  * @hba: per adapter instance
2420  * @intrs: interrupt bits
2421  */
2422 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2423 {
2424         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2425
2426         if (hba->ufs_version == ufshci_version(1, 0)) {
2427                 u32 rw;
2428                 rw = set & INTERRUPT_MASK_RW_VER_10;
2429                 set = rw | ((set ^ intrs) & intrs);
2430         } else {
2431                 set |= intrs;
2432         }
2433
2434         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2435 }
2436
2437 /**
2438  * ufshcd_disable_intr - disable interrupts
2439  * @hba: per adapter instance
2440  * @intrs: interrupt bits
2441  */
2442 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2443 {
2444         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2445
2446         if (hba->ufs_version == ufshci_version(1, 0)) {
2447                 u32 rw;
2448                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2449                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
2450                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2451
2452         } else {
2453                 set &= ~intrs;
2454         }
2455
2456         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2457 }
2458
2459 /**
2460  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2461  * descriptor according to request
2462  * @lrbp: pointer to local reference block
2463  * @upiu_flags: flags required in the header
2464  * @cmd_dir: requests data direction
2465  */
2466 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2467                         u8 *upiu_flags, enum dma_data_direction cmd_dir)
2468 {
2469         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2470         u32 data_direction;
2471         u32 dword_0;
2472         u32 dword_1 = 0;
2473         u32 dword_3 = 0;
2474
2475         if (cmd_dir == DMA_FROM_DEVICE) {
2476                 data_direction = UTP_DEVICE_TO_HOST;
2477                 *upiu_flags = UPIU_CMD_FLAGS_READ;
2478         } else if (cmd_dir == DMA_TO_DEVICE) {
2479                 data_direction = UTP_HOST_TO_DEVICE;
2480                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2481         } else {
2482                 data_direction = UTP_NO_DATA_TRANSFER;
2483                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2484         }
2485
2486         dword_0 = data_direction | (lrbp->command_type
2487                                 << UPIU_COMMAND_TYPE_OFFSET);
2488         if (lrbp->intr_cmd)
2489                 dword_0 |= UTP_REQ_DESC_INT_CMD;
2490
2491         /* Prepare crypto related dwords */
2492         ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2493
2494         /* Transfer request descriptor header fields */
2495         req_desc->header.dword_0 = cpu_to_le32(dword_0);
2496         req_desc->header.dword_1 = cpu_to_le32(dword_1);
2497         /*
2498          * assigning invalid value for command status. Controller
2499          * updates OCS on command completion, with the command
2500          * status
2501          */
2502         req_desc->header.dword_2 =
2503                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2504         req_desc->header.dword_3 = cpu_to_le32(dword_3);
2505
2506         req_desc->prd_table_length = 0;
2507 }
2508
2509 /**
2510  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2511  * for scsi commands
2512  * @lrbp: local reference block pointer
2513  * @upiu_flags: flags
2514  */
2515 static
2516 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
2517 {
2518         struct scsi_cmnd *cmd = lrbp->cmd;
2519         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2520         unsigned short cdb_len;
2521
2522         /* command descriptor fields */
2523         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2524                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
2525                                 lrbp->lun, lrbp->task_tag);
2526         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2527                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2528
2529         /* Total EHS length and Data segment length will be zero */
2530         ucd_req_ptr->header.dword_2 = 0;
2531
2532         ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
2533
2534         cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
2535         memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2536         memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
2537
2538         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2539 }
2540
2541 /**
2542  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2543  * for query requsts
2544  * @hba: UFS hba
2545  * @lrbp: local reference block pointer
2546  * @upiu_flags: flags
2547  */
2548 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2549                                 struct ufshcd_lrb *lrbp, u8 upiu_flags)
2550 {
2551         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2552         struct ufs_query *query = &hba->dev_cmd.query;
2553         u16 len = be16_to_cpu(query->request.upiu_req.length);
2554
2555         /* Query request header */
2556         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2557                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2558                         lrbp->lun, lrbp->task_tag);
2559         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2560                         0, query->request.query_func, 0, 0);
2561
2562         /* Data segment length only need for WRITE_DESC */
2563         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2564                 ucd_req_ptr->header.dword_2 =
2565                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2566         else
2567                 ucd_req_ptr->header.dword_2 = 0;
2568
2569         /* Copy the Query Request buffer as is */
2570         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2571                         QUERY_OSF_SIZE);
2572
2573         /* Copy the Descriptor */
2574         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2575                 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2576
2577         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2578 }
2579
2580 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2581 {
2582         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2583
2584         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2585
2586         /* command descriptor fields */
2587         ucd_req_ptr->header.dword_0 =
2588                 UPIU_HEADER_DWORD(
2589                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2590         /* clear rest of the fields of basic header */
2591         ucd_req_ptr->header.dword_1 = 0;
2592         ucd_req_ptr->header.dword_2 = 0;
2593
2594         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2595 }
2596
2597 /**
2598  * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
2599  *                           for Device Management Purposes
2600  * @hba: per adapter instance
2601  * @lrbp: pointer to local reference block
2602  */
2603 static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2604                                       struct ufshcd_lrb *lrbp)
2605 {
2606         u8 upiu_flags;
2607         int ret = 0;
2608
2609         if (hba->ufs_version <= ufshci_version(1, 1))
2610                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2611         else
2612                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2613
2614         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2615         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2616                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2617         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2618                 ufshcd_prepare_utp_nop_upiu(lrbp);
2619         else
2620                 ret = -EINVAL;
2621
2622         return ret;
2623 }
2624
2625 /**
2626  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2627  *                         for SCSI Purposes
2628  * @hba: per adapter instance
2629  * @lrbp: pointer to local reference block
2630  */
2631 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2632 {
2633         u8 upiu_flags;
2634         int ret = 0;
2635
2636         if (hba->ufs_version <= ufshci_version(1, 1))
2637                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2638         else
2639                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2640
2641         if (likely(lrbp->cmd)) {
2642                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2643                                                 lrbp->cmd->sc_data_direction);
2644                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2645         } else {
2646                 ret = -EINVAL;
2647         }
2648
2649         return ret;
2650 }
2651
2652 /**
2653  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2654  * @upiu_wlun_id: UPIU W-LUN id
2655  *
2656  * Returns SCSI W-LUN id
2657  */
2658 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2659 {
2660         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2661 }
2662
2663 static inline bool is_rpmb_wlun(struct scsi_device *sdev)
2664 {
2665         return sdev->lun == ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN);
2666 }
2667
2668 static inline bool is_device_wlun(struct scsi_device *sdev)
2669 {
2670         return sdev->lun ==
2671                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN);
2672 }
2673
2674 static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2675 {
2676         struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2677         struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2678         dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2679                 i * sizeof(struct utp_transfer_cmd_desc);
2680         u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2681                                        response_upiu);
2682         u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2683
2684         lrb->utr_descriptor_ptr = utrdlp + i;
2685         lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2686                 i * sizeof(struct utp_transfer_req_desc);
2687         lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2688         lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2689         lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2690         lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2691         lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2692         lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2693 }
2694
2695 /**
2696  * ufshcd_queuecommand - main entry point for SCSI requests
2697  * @host: SCSI host pointer
2698  * @cmd: command from SCSI Midlayer
2699  *
2700  * Returns 0 for success, non-zero in case of failure
2701  */
2702 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2703 {
2704         struct ufshcd_lrb *lrbp;
2705         struct ufs_hba *hba;
2706         int tag;
2707         int err = 0;
2708
2709         hba = shost_priv(host);
2710
2711         tag = cmd->request->tag;
2712         if (!ufshcd_valid_tag(hba, tag)) {
2713                 dev_err(hba->dev,
2714                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2715                         __func__, tag, cmd, cmd->request);
2716                 BUG();
2717         }
2718
2719         if (!down_read_trylock(&hba->clk_scaling_lock))
2720                 return SCSI_MLQUEUE_HOST_BUSY;
2721
2722         switch (hba->ufshcd_state) {
2723         case UFSHCD_STATE_OPERATIONAL:
2724         case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2725                 break;
2726         case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2727                 /*
2728                  * pm_runtime_get_sync() is used at error handling preparation
2729                  * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2730                  * PM ops, it can never be finished if we let SCSI layer keep
2731                  * retrying it, which gets err handler stuck forever. Neither
2732                  * can we let the scsi cmd pass through, because UFS is in bad
2733                  * state, the scsi cmd may eventually time out, which will get
2734                  * err handler blocked for too long. So, just fail the scsi cmd
2735                  * sent from PM ops, err handler can recover PM error anyways.
2736                  */
2737                 if (hba->pm_op_in_progress) {
2738                         hba->force_reset = true;
2739                         set_host_byte(cmd, DID_BAD_TARGET);
2740                         cmd->scsi_done(cmd);
2741                         goto out;
2742                 }
2743                 fallthrough;
2744         case UFSHCD_STATE_RESET:
2745                 err = SCSI_MLQUEUE_HOST_BUSY;
2746                 goto out;
2747         case UFSHCD_STATE_ERROR:
2748                 set_host_byte(cmd, DID_ERROR);
2749                 cmd->scsi_done(cmd);
2750                 goto out;
2751         default:
2752                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2753                                 __func__, hba->ufshcd_state);
2754                 set_host_byte(cmd, DID_BAD_TARGET);
2755                 cmd->scsi_done(cmd);
2756                 goto out;
2757         }
2758
2759         hba->req_abort_count = 0;
2760
2761         err = ufshcd_hold(hba, true);
2762         if (err) {
2763                 err = SCSI_MLQUEUE_HOST_BUSY;
2764                 goto out;
2765         }
2766         WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2767                 (hba->clk_gating.state != CLKS_ON));
2768
2769         if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
2770                 if (hba->pm_op_in_progress)
2771                         set_host_byte(cmd, DID_BAD_TARGET);
2772                 else
2773                         err = SCSI_MLQUEUE_HOST_BUSY;
2774                 ufshcd_release(hba);
2775                 goto out;
2776         }
2777
2778         lrbp = &hba->lrb[tag];
2779         WARN_ON(lrbp->cmd);
2780         lrbp->cmd = cmd;
2781         lrbp->sense_bufflen = UFS_SENSE_SIZE;
2782         lrbp->sense_buffer = cmd->sense_buffer;
2783         lrbp->task_tag = tag;
2784         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2785         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2786
2787         ufshcd_prepare_lrbp_crypto(cmd->request, lrbp);
2788
2789         lrbp->req_abort_skip = false;
2790
2791         err = ufshpb_prep(hba, lrbp);
2792         if (err == -EAGAIN) {
2793                 lrbp->cmd = NULL;
2794                 ufshcd_release(hba);
2795                 goto out;
2796         }
2797
2798         ufshcd_comp_scsi_upiu(hba, lrbp);
2799
2800         err = ufshcd_map_sg(hba, lrbp);
2801         if (err) {
2802                 lrbp->cmd = NULL;
2803                 ufshcd_release(hba);
2804                 goto out;
2805         }
2806         /* Make sure descriptors are ready before ringing the doorbell */
2807         wmb();
2808
2809         ufshcd_send_command(hba, tag);
2810 out:
2811         up_read(&hba->clk_scaling_lock);
2812         return err;
2813 }
2814
2815 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2816                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2817 {
2818         lrbp->cmd = NULL;
2819         lrbp->sense_bufflen = 0;
2820         lrbp->sense_buffer = NULL;
2821         lrbp->task_tag = tag;
2822         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2823         lrbp->intr_cmd = true; /* No interrupt aggregation */
2824         ufshcd_prepare_lrbp_crypto(NULL, lrbp);
2825         hba->dev_cmd.type = cmd_type;
2826
2827         return ufshcd_compose_devman_upiu(hba, lrbp);
2828 }
2829
2830 static int
2831 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2832 {
2833         int err = 0;
2834         unsigned long flags;
2835         u32 mask = 1 << tag;
2836
2837         /* clear outstanding transaction before retry */
2838         spin_lock_irqsave(hba->host->host_lock, flags);
2839         ufshcd_utrl_clear(hba, tag);
2840         spin_unlock_irqrestore(hba->host->host_lock, flags);
2841
2842         /*
2843          * wait for h/w to clear corresponding bit in door-bell.
2844          * max. wait is 1 sec.
2845          */
2846         err = ufshcd_wait_for_register(hba,
2847                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
2848                         mask, ~mask, 1000, 1000);
2849
2850         return err;
2851 }
2852
2853 static int
2854 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2855 {
2856         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2857
2858         /* Get the UPIU response */
2859         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2860                                 UPIU_RSP_CODE_OFFSET;
2861         return query_res->response;
2862 }
2863
2864 /**
2865  * ufshcd_dev_cmd_completion() - handles device management command responses
2866  * @hba: per adapter instance
2867  * @lrbp: pointer to local reference block
2868  */
2869 static int
2870 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2871 {
2872         int resp;
2873         int err = 0;
2874
2875         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2876         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2877
2878         switch (resp) {
2879         case UPIU_TRANSACTION_NOP_IN:
2880                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2881                         err = -EINVAL;
2882                         dev_err(hba->dev, "%s: unexpected response %x\n",
2883                                         __func__, resp);
2884                 }
2885                 break;
2886         case UPIU_TRANSACTION_QUERY_RSP:
2887                 err = ufshcd_check_query_response(hba, lrbp);
2888                 if (!err)
2889                         err = ufshcd_copy_query_response(hba, lrbp);
2890                 break;
2891         case UPIU_TRANSACTION_REJECT_UPIU:
2892                 /* TODO: handle Reject UPIU Response */
2893                 err = -EPERM;
2894                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2895                                 __func__);
2896                 break;
2897         default:
2898                 err = -EINVAL;
2899                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2900                                 __func__, resp);
2901                 break;
2902         }
2903
2904         return err;
2905 }
2906
2907 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2908                 struct ufshcd_lrb *lrbp, int max_timeout)
2909 {
2910         int err = 0;
2911         unsigned long time_left;
2912         unsigned long flags;
2913
2914         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2915                         msecs_to_jiffies(max_timeout));
2916
2917         /* Make sure descriptors are ready before ringing the doorbell */
2918         wmb();
2919         spin_lock_irqsave(hba->host->host_lock, flags);
2920         hba->dev_cmd.complete = NULL;
2921         if (likely(time_left)) {
2922                 err = ufshcd_get_tr_ocs(lrbp);
2923                 if (!err)
2924                         err = ufshcd_dev_cmd_completion(hba, lrbp);
2925         }
2926         spin_unlock_irqrestore(hba->host->host_lock, flags);
2927
2928         if (!time_left) {
2929                 err = -ETIMEDOUT;
2930                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2931                         __func__, lrbp->task_tag);
2932                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2933                         /* successfully cleared the command, retry if needed */
2934                         err = -EAGAIN;
2935                 /*
2936                  * in case of an error, after clearing the doorbell,
2937                  * we also need to clear the outstanding_request
2938                  * field in hba
2939                  */
2940                 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2941         }
2942
2943         return err;
2944 }
2945
2946 /**
2947  * ufshcd_exec_dev_cmd - API for sending device management requests
2948  * @hba: UFS hba
2949  * @cmd_type: specifies the type (NOP, Query...)
2950  * @timeout: timeout in milliseconds
2951  *
2952  * NOTE: Since there is only one available tag for device management commands,
2953  * it is expected you hold the hba->dev_cmd.lock mutex.
2954  */
2955 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2956                 enum dev_cmd_type cmd_type, int timeout)
2957 {
2958         struct request_queue *q = hba->cmd_queue;
2959         struct request *req;
2960         struct ufshcd_lrb *lrbp;
2961         int err;
2962         int tag;
2963         struct completion wait;
2964
2965         down_read(&hba->clk_scaling_lock);
2966
2967         /*
2968          * Get free slot, sleep if slots are unavailable.
2969          * Even though we use wait_event() which sleeps indefinitely,
2970          * the maximum wait time is bounded by SCSI request timeout.
2971          */
2972         req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2973         if (IS_ERR(req)) {
2974                 err = PTR_ERR(req);
2975                 goto out_unlock;
2976         }
2977         tag = req->tag;
2978         WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
2979         /* Set the timeout such that the SCSI error handler is not activated. */
2980         req->timeout = msecs_to_jiffies(2 * timeout);
2981         blk_mq_start_request(req);
2982
2983         if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
2984                 err = -EBUSY;
2985                 goto out;
2986         }
2987
2988         init_completion(&wait);
2989         lrbp = &hba->lrb[tag];
2990         WARN_ON(lrbp->cmd);
2991         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2992         if (unlikely(err))
2993                 goto out;
2994
2995         hba->dev_cmd.complete = &wait;
2996
2997         ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
2998         /* Make sure descriptors are ready before ringing the doorbell */
2999         wmb();
3000
3001         ufshcd_send_command(hba, tag);
3002         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
3003         ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
3004                                     (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
3005
3006 out:
3007         blk_put_request(req);
3008 out_unlock:
3009         up_read(&hba->clk_scaling_lock);
3010         return err;
3011 }
3012
3013 /**
3014  * ufshcd_init_query() - init the query response and request parameters
3015  * @hba: per-adapter instance
3016  * @request: address of the request pointer to be initialized
3017  * @response: address of the response pointer to be initialized
3018  * @opcode: operation to perform
3019  * @idn: flag idn to access
3020  * @index: LU number to access
3021  * @selector: query/flag/descriptor further identification
3022  */
3023 static inline void ufshcd_init_query(struct ufs_hba *hba,
3024                 struct ufs_query_req **request, struct ufs_query_res **response,
3025                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
3026 {
3027         *request = &hba->dev_cmd.query.request;
3028         *response = &hba->dev_cmd.query.response;
3029         memset(*request, 0, sizeof(struct ufs_query_req));
3030         memset(*response, 0, sizeof(struct ufs_query_res));
3031         (*request)->upiu_req.opcode = opcode;
3032         (*request)->upiu_req.idn = idn;
3033         (*request)->upiu_req.index = index;
3034         (*request)->upiu_req.selector = selector;
3035 }
3036
3037 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
3038         enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
3039 {
3040         int ret;
3041         int retries;
3042
3043         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
3044                 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
3045                 if (ret)
3046                         dev_dbg(hba->dev,
3047                                 "%s: failed with error %d, retries %d\n",
3048                                 __func__, ret, retries);
3049                 else
3050                         break;
3051         }
3052
3053         if (ret)
3054                 dev_err(hba->dev,
3055                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3056                         __func__, opcode, idn, ret, retries);
3057         return ret;
3058 }
3059
3060 /**
3061  * ufshcd_query_flag() - API function for sending flag query requests
3062  * @hba: per-adapter instance
3063  * @opcode: flag query to perform
3064  * @idn: flag idn to access
3065  * @index: flag index to access
3066  * @flag_res: the flag value after the query request completes
3067  *
3068  * Returns 0 for success, non-zero in case of failure
3069  */
3070 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
3071                         enum flag_idn idn, u8 index, bool *flag_res)
3072 {
3073         struct ufs_query_req *request = NULL;
3074         struct ufs_query_res *response = NULL;
3075         int err, selector = 0;
3076         int timeout = QUERY_REQ_TIMEOUT;
3077
3078         BUG_ON(!hba);
3079
3080         ufshcd_hold(hba, false);
3081         mutex_lock(&hba->dev_cmd.lock);
3082         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3083                         selector);
3084
3085         switch (opcode) {
3086         case UPIU_QUERY_OPCODE_SET_FLAG:
3087         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3088         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3089                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3090                 break;
3091         case UPIU_QUERY_OPCODE_READ_FLAG:
3092                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3093                 if (!flag_res) {
3094                         /* No dummy reads */
3095                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
3096                                         __func__);
3097                         err = -EINVAL;
3098                         goto out_unlock;
3099                 }
3100                 break;
3101         default:
3102                 dev_err(hba->dev,
3103                         "%s: Expected query flag opcode but got = %d\n",
3104                         __func__, opcode);
3105                 err = -EINVAL;
3106                 goto out_unlock;
3107         }
3108
3109         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
3110
3111         if (err) {
3112                 dev_err(hba->dev,
3113                         "%s: Sending flag query for idn %d failed, err = %d\n",
3114                         __func__, idn, err);
3115                 goto out_unlock;
3116         }
3117
3118         if (flag_res)
3119                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
3120                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3121
3122 out_unlock:
3123         mutex_unlock(&hba->dev_cmd.lock);
3124         ufshcd_release(hba);
3125         return err;
3126 }
3127
3128 /**
3129  * ufshcd_query_attr - API function for sending attribute requests
3130  * @hba: per-adapter instance
3131  * @opcode: attribute opcode
3132  * @idn: attribute idn to access
3133  * @index: index field
3134  * @selector: selector field
3135  * @attr_val: the attribute value after the query request completes
3136  *
3137  * Returns 0 for success, non-zero in case of failure
3138 */
3139 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3140                       enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3141 {
3142         struct ufs_query_req *request = NULL;
3143         struct ufs_query_res *response = NULL;
3144         int err;
3145
3146         BUG_ON(!hba);
3147
3148         if (!attr_val) {
3149                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3150                                 __func__, opcode);
3151                 return -EINVAL;
3152         }
3153
3154         ufshcd_hold(hba, false);
3155
3156         mutex_lock(&hba->dev_cmd.lock);
3157         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3158                         selector);
3159
3160         switch (opcode) {
3161         case UPIU_QUERY_OPCODE_WRITE_ATTR:
3162                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3163                 request->upiu_req.value = cpu_to_be32(*attr_val);
3164                 break;
3165         case UPIU_QUERY_OPCODE_READ_ATTR:
3166                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3167                 break;
3168         default:
3169                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3170                                 __func__, opcode);
3171                 err = -EINVAL;
3172                 goto out_unlock;
3173         }
3174
3175         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3176
3177         if (err) {
3178                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3179                                 __func__, opcode, idn, index, err);
3180                 goto out_unlock;
3181         }
3182
3183         *attr_val = be32_to_cpu(response->upiu_res.value);
3184
3185 out_unlock:
3186         mutex_unlock(&hba->dev_cmd.lock);
3187         ufshcd_release(hba);
3188         return err;
3189 }
3190
3191 /**
3192  * ufshcd_query_attr_retry() - API function for sending query
3193  * attribute with retries
3194  * @hba: per-adapter instance
3195  * @opcode: attribute opcode
3196  * @idn: attribute idn to access
3197  * @index: index field
3198  * @selector: selector field
3199  * @attr_val: the attribute value after the query request
3200  * completes
3201  *
3202  * Returns 0 for success, non-zero in case of failure
3203 */
3204 int ufshcd_query_attr_retry(struct ufs_hba *hba,
3205         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3206         u32 *attr_val)
3207 {
3208         int ret = 0;
3209         u32 retries;
3210
3211         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3212                 ret = ufshcd_query_attr(hba, opcode, idn, index,
3213                                                 selector, attr_val);
3214                 if (ret)
3215                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3216                                 __func__, ret, retries);
3217                 else
3218                         break;
3219         }
3220
3221         if (ret)
3222                 dev_err(hba->dev,
3223                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3224                         __func__, idn, ret, QUERY_REQ_RETRIES);
3225         return ret;
3226 }
3227
3228 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
3229                         enum query_opcode opcode, enum desc_idn idn, u8 index,
3230                         u8 selector, u8 *desc_buf, int *buf_len)
3231 {
3232         struct ufs_query_req *request = NULL;
3233         struct ufs_query_res *response = NULL;
3234         int err;
3235
3236         BUG_ON(!hba);
3237
3238         if (!desc_buf) {
3239                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3240                                 __func__, opcode);
3241                 return -EINVAL;
3242         }
3243
3244         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
3245                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3246                                 __func__, *buf_len);
3247                 return -EINVAL;
3248         }
3249
3250         ufshcd_hold(hba, false);
3251
3252         mutex_lock(&hba->dev_cmd.lock);
3253         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3254                         selector);
3255         hba->dev_cmd.query.descriptor = desc_buf;
3256         request->upiu_req.length = cpu_to_be16(*buf_len);
3257
3258         switch (opcode) {
3259         case UPIU_QUERY_OPCODE_WRITE_DESC:
3260                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3261                 break;
3262         case UPIU_QUERY_OPCODE_READ_DESC:
3263                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3264                 break;
3265         default:
3266                 dev_err(hba->dev,
3267                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3268                                 __func__, opcode);
3269                 err = -EINVAL;
3270                 goto out_unlock;
3271         }
3272
3273         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3274
3275         if (err) {
3276                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3277                                 __func__, opcode, idn, index, err);
3278                 goto out_unlock;
3279         }
3280
3281         *buf_len = be16_to_cpu(response->upiu_res.length);
3282
3283 out_unlock:
3284         hba->dev_cmd.query.descriptor = NULL;
3285         mutex_unlock(&hba->dev_cmd.lock);
3286         ufshcd_release(hba);
3287         return err;
3288 }
3289
3290 /**
3291  * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3292  * @hba: per-adapter instance
3293  * @opcode: attribute opcode
3294  * @idn: attribute idn to access
3295  * @index: index field
3296  * @selector: selector field
3297  * @desc_buf: the buffer that contains the descriptor
3298  * @buf_len: length parameter passed to the device
3299  *
3300  * Returns 0 for success, non-zero in case of failure.
3301  * The buf_len parameter will contain, on return, the length parameter
3302  * received on the response.
3303  */
3304 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3305                                   enum query_opcode opcode,
3306                                   enum desc_idn idn, u8 index,
3307                                   u8 selector,
3308                                   u8 *desc_buf, int *buf_len)
3309 {
3310         int err;
3311         int retries;
3312
3313         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3314                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3315                                                 selector, desc_buf, buf_len);
3316                 if (!err || err == -EINVAL)
3317                         break;
3318         }
3319
3320         return err;
3321 }
3322
3323 /**
3324  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3325  * @hba: Pointer to adapter instance
3326  * @desc_id: descriptor idn value
3327  * @desc_len: mapped desc length (out)
3328  */
3329 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3330                                   int *desc_len)
3331 {
3332         if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3333             desc_id == QUERY_DESC_IDN_RFU_1)
3334                 *desc_len = 0;
3335         else
3336                 *desc_len = hba->desc_size[desc_id];
3337 }
3338 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3339
3340 static void ufshcd_update_desc_length(struct ufs_hba *hba,
3341                                       enum desc_idn desc_id, int desc_index,
3342                                       unsigned char desc_len)
3343 {
3344         if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
3345             desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3346                 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3347                  * than the RPMB unit, however, both descriptors share the same
3348                  * desc_idn, to cover both unit descriptors with one length, we
3349                  * choose the normal unit descriptor length by desc_index.
3350                  */
3351                 hba->desc_size[desc_id] = desc_len;
3352 }
3353
3354 /**
3355  * ufshcd_read_desc_param - read the specified descriptor parameter
3356  * @hba: Pointer to adapter instance
3357  * @desc_id: descriptor idn value
3358  * @desc_index: descriptor index
3359  * @param_offset: offset of the parameter to read
3360  * @param_read_buf: pointer to buffer where parameter would be read
3361  * @param_size: sizeof(param_read_buf)
3362  *
3363  * Return 0 in case of success, non-zero otherwise
3364  */
3365 int ufshcd_read_desc_param(struct ufs_hba *hba,
3366                            enum desc_idn desc_id,
3367                            int desc_index,
3368                            u8 param_offset,
3369                            u8 *param_read_buf,
3370                            u8 param_size)
3371 {
3372         int ret;
3373         u8 *desc_buf;
3374         int buff_len;
3375         bool is_kmalloc = true;
3376
3377         /* Safety check */
3378         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3379                 return -EINVAL;
3380
3381         /* Get the length of descriptor */
3382         ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3383         if (!buff_len) {
3384                 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3385                 return -EINVAL;
3386         }
3387
3388         if (param_offset >= buff_len) {
3389                 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3390                         __func__, param_offset, desc_id, buff_len);
3391                 return -EINVAL;
3392         }
3393
3394         /* Check whether we need temp memory */
3395         if (param_offset != 0 || param_size < buff_len) {
3396                 desc_buf = kzalloc(buff_len, GFP_KERNEL);
3397                 if (!desc_buf)
3398                         return -ENOMEM;
3399         } else {
3400                 desc_buf = param_read_buf;
3401                 is_kmalloc = false;
3402         }
3403
3404         /* Request for full descriptor */
3405         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3406                                         desc_id, desc_index, 0,
3407                                         desc_buf, &buff_len);
3408
3409         if (ret) {
3410                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
3411                         __func__, desc_id, desc_index, param_offset, ret);
3412                 goto out;
3413         }
3414
3415         /* Sanity check */
3416         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3417                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
3418                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3419                 ret = -EINVAL;
3420                 goto out;
3421         }
3422
3423         /* Update descriptor length */
3424         buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
3425         ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
3426
3427         if (is_kmalloc) {
3428                 /* Make sure we don't copy more data than available */
3429                 if (param_offset + param_size > buff_len)
3430                         param_size = buff_len - param_offset;
3431                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3432         }
3433 out:
3434         if (is_kmalloc)
3435                 kfree(desc_buf);
3436         return ret;
3437 }
3438
3439 /**
3440  * struct uc_string_id - unicode string
3441  *
3442  * @len: size of this descriptor inclusive
3443  * @type: descriptor type
3444  * @uc: unicode string character
3445  */
3446 struct uc_string_id {
3447         u8 len;
3448         u8 type;
3449         wchar_t uc[];
3450 } __packed;
3451
3452 /* replace non-printable or non-ASCII characters with spaces */
3453 static inline char ufshcd_remove_non_printable(u8 ch)
3454 {
3455         return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3456 }
3457
3458 /**
3459  * ufshcd_read_string_desc - read string descriptor
3460  * @hba: pointer to adapter instance
3461  * @desc_index: descriptor index
3462  * @buf: pointer to buffer where descriptor would be read,
3463  *       the caller should free the memory.
3464  * @ascii: if true convert from unicode to ascii characters
3465  *         null terminated string.
3466  *
3467  * Return:
3468  * *      string size on success.
3469  * *      -ENOMEM: on allocation failure
3470  * *      -EINVAL: on a wrong parameter
3471  */
3472 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3473                             u8 **buf, bool ascii)
3474 {
3475         struct uc_string_id *uc_str;
3476         u8 *str;
3477         int ret;
3478
3479         if (!buf)
3480                 return -EINVAL;
3481
3482         uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3483         if (!uc_str)
3484                 return -ENOMEM;
3485
3486         ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3487                                      (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
3488         if (ret < 0) {
3489                 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3490                         QUERY_REQ_RETRIES, ret);
3491                 str = NULL;
3492                 goto out;
3493         }
3494
3495         if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3496                 dev_dbg(hba->dev, "String Desc is of zero length\n");
3497                 str = NULL;
3498                 ret = 0;
3499                 goto out;
3500         }
3501
3502         if (ascii) {
3503                 ssize_t ascii_len;
3504                 int i;
3505                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3506                 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3507                 str = kzalloc(ascii_len, GFP_KERNEL);
3508                 if (!str) {
3509                         ret = -ENOMEM;
3510                         goto out;
3511                 }
3512
3513                 /*
3514                  * the descriptor contains string in UTF16 format
3515                  * we need to convert to utf-8 so it can be displayed
3516                  */
3517                 ret = utf16s_to_utf8s(uc_str->uc,
3518                                       uc_str->len - QUERY_DESC_HDR_SIZE,
3519                                       UTF16_BIG_ENDIAN, str, ascii_len);
3520
3521                 /* replace non-printable or non-ASCII characters with spaces */
3522                 for (i = 0; i < ret; i++)
3523                         str[i] = ufshcd_remove_non_printable(str[i]);
3524
3525                 str[ret++] = '\0';
3526
3527         } else {
3528                 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3529                 if (!str) {
3530                         ret = -ENOMEM;
3531                         goto out;
3532                 }
3533                 ret = uc_str->len;
3534         }
3535 out:
3536         *buf = str;
3537         kfree(uc_str);
3538         return ret;
3539 }
3540
3541 /**
3542  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3543  * @hba: Pointer to adapter instance
3544  * @lun: lun id
3545  * @param_offset: offset of the parameter to read
3546  * @param_read_buf: pointer to buffer where parameter would be read
3547  * @param_size: sizeof(param_read_buf)
3548  *
3549  * Return 0 in case of success, non-zero otherwise
3550  */
3551 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3552                                               int lun,
3553                                               enum unit_desc_param param_offset,
3554                                               u8 *param_read_buf,
3555                                               u32 param_size)
3556 {
3557         /*
3558          * Unit descriptors are only available for general purpose LUs (LUN id
3559          * from 0 to 7) and RPMB Well known LU.
3560          */
3561         if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
3562                 return -EOPNOTSUPP;
3563
3564         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3565                                       param_offset, param_read_buf, param_size);
3566 }
3567
3568 static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3569 {
3570         int err = 0;
3571         u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3572
3573         if (hba->dev_info.wspecversion >= 0x300) {
3574                 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3575                                 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3576                                 &gating_wait);
3577                 if (err)
3578                         dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3579                                          err, gating_wait);
3580
3581                 if (gating_wait == 0) {
3582                         gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3583                         dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3584                                          gating_wait);
3585                 }
3586
3587                 hba->dev_info.clk_gating_wait_us = gating_wait;
3588         }
3589
3590         return err;
3591 }
3592
3593 /**
3594  * ufshcd_memory_alloc - allocate memory for host memory space data structures
3595  * @hba: per adapter instance
3596  *
3597  * 1. Allocate DMA memory for Command Descriptor array
3598  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3599  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3600  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3601  *      (UTMRDL)
3602  * 4. Allocate memory for local reference block(lrb).
3603  *
3604  * Returns 0 for success, non-zero in case of failure
3605  */
3606 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3607 {
3608         size_t utmrdl_size, utrdl_size, ucdl_size;
3609
3610         /* Allocate memory for UTP command descriptors */
3611         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3612         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3613                                                   ucdl_size,
3614                                                   &hba->ucdl_dma_addr,
3615                                                   GFP_KERNEL);
3616
3617         /*
3618          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3619          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3620          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3621          * be aligned to 128 bytes as well
3622          */
3623         if (!hba->ucdl_base_addr ||
3624             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3625                 dev_err(hba->dev,
3626                         "Command Descriptor Memory allocation failed\n");
3627                 goto out;
3628         }
3629
3630         /*
3631          * Allocate memory for UTP Transfer descriptors
3632          * UFSHCI requires 1024 byte alignment of UTRD
3633          */
3634         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3635         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3636                                                    utrdl_size,
3637                                                    &hba->utrdl_dma_addr,
3638                                                    GFP_KERNEL);
3639         if (!hba->utrdl_base_addr ||
3640             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3641                 dev_err(hba->dev,
3642                         "Transfer Descriptor Memory allocation failed\n");
3643                 goto out;
3644         }
3645
3646         /*
3647          * Allocate memory for UTP Task Management descriptors
3648          * UFSHCI requires 1024 byte alignment of UTMRD
3649          */
3650         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3651         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3652                                                     utmrdl_size,
3653                                                     &hba->utmrdl_dma_addr,
3654                                                     GFP_KERNEL);
3655         if (!hba->utmrdl_base_addr ||
3656             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3657                 dev_err(hba->dev,
3658                 "Task Management Descriptor Memory allocation failed\n");
3659                 goto out;
3660         }
3661
3662         /* Allocate memory for local reference block */
3663         hba->lrb = devm_kcalloc(hba->dev,
3664                                 hba->nutrs, sizeof(struct ufshcd_lrb),
3665                                 GFP_KERNEL);
3666         if (!hba->lrb) {
3667                 dev_err(hba->dev, "LRB Memory allocation failed\n");
3668                 goto out;
3669         }
3670         return 0;
3671 out:
3672         return -ENOMEM;
3673 }
3674
3675 /**
3676  * ufshcd_host_memory_configure - configure local reference block with
3677  *                              memory offsets
3678  * @hba: per adapter instance
3679  *
3680  * Configure Host memory space
3681  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3682  * address.
3683  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3684  * and PRDT offset.
3685  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3686  * into local reference block.
3687  */
3688 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3689 {
3690         struct utp_transfer_req_desc *utrdlp;
3691         dma_addr_t cmd_desc_dma_addr;
3692         dma_addr_t cmd_desc_element_addr;
3693         u16 response_offset;
3694         u16 prdt_offset;
3695         int cmd_desc_size;
3696         int i;
3697
3698         utrdlp = hba->utrdl_base_addr;
3699
3700         response_offset =
3701                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3702         prdt_offset =
3703                 offsetof(struct utp_transfer_cmd_desc, prd_table);
3704
3705         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3706         cmd_desc_dma_addr = hba->ucdl_dma_addr;
3707
3708         for (i = 0; i < hba->nutrs; i++) {
3709                 /* Configure UTRD with command descriptor base address */
3710                 cmd_desc_element_addr =
3711                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
3712                 utrdlp[i].command_desc_base_addr_lo =
3713                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3714                 utrdlp[i].command_desc_base_addr_hi =
3715                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3716
3717                 /* Response upiu and prdt offset should be in double words */
3718                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3719                         utrdlp[i].response_upiu_offset =
3720                                 cpu_to_le16(response_offset);
3721                         utrdlp[i].prd_table_offset =
3722                                 cpu_to_le16(prdt_offset);
3723                         utrdlp[i].response_upiu_length =
3724                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
3725                 } else {
3726                         utrdlp[i].response_upiu_offset =
3727                                 cpu_to_le16(response_offset >> 2);
3728                         utrdlp[i].prd_table_offset =
3729                                 cpu_to_le16(prdt_offset >> 2);
3730                         utrdlp[i].response_upiu_length =
3731                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3732                 }
3733
3734                 ufshcd_init_lrb(hba, &hba->lrb[i], i);
3735         }
3736 }
3737
3738 /**
3739  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3740  * @hba: per adapter instance
3741  *
3742  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3743  * in order to initialize the Unipro link startup procedure.
3744  * Once the Unipro links are up, the device connected to the controller
3745  * is detected.
3746  *
3747  * Returns 0 on success, non-zero value on failure
3748  */
3749 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3750 {
3751         struct uic_command uic_cmd = {0};
3752         int ret;
3753
3754         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3755
3756         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3757         if (ret)
3758                 dev_dbg(hba->dev,
3759                         "dme-link-startup: error code %d\n", ret);
3760         return ret;
3761 }
3762 /**
3763  * ufshcd_dme_reset - UIC command for DME_RESET
3764  * @hba: per adapter instance
3765  *
3766  * DME_RESET command is issued in order to reset UniPro stack.
3767  * This function now deals with cold reset.
3768  *
3769  * Returns 0 on success, non-zero value on failure
3770  */
3771 static int ufshcd_dme_reset(struct ufs_hba *hba)
3772 {
3773         struct uic_command uic_cmd = {0};
3774         int ret;
3775
3776         uic_cmd.command = UIC_CMD_DME_RESET;
3777
3778         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3779         if (ret)
3780                 dev_err(hba->dev,
3781                         "dme-reset: error code %d\n", ret);
3782
3783         return ret;
3784 }
3785
3786 int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3787                                int agreed_gear,
3788                                int adapt_val)
3789 {
3790         int ret;
3791
3792         if (agreed_gear != UFS_HS_G4)
3793                 adapt_val = PA_NO_ADAPT;
3794
3795         ret = ufshcd_dme_set(hba,
3796                              UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3797                              adapt_val);
3798         return ret;
3799 }
3800 EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3801
3802 /**
3803  * ufshcd_dme_enable - UIC command for DME_ENABLE
3804  * @hba: per adapter instance
3805  *
3806  * DME_ENABLE command is issued in order to enable UniPro stack.
3807  *
3808  * Returns 0 on success, non-zero value on failure
3809  */
3810 static int ufshcd_dme_enable(struct ufs_hba *hba)
3811 {
3812         struct uic_command uic_cmd = {0};
3813         int ret;
3814
3815         uic_cmd.command = UIC_CMD_DME_ENABLE;
3816
3817         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3818         if (ret)
3819                 dev_err(hba->dev,
3820                         "dme-enable: error code %d\n", ret);
3821
3822         return ret;
3823 }
3824
3825 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3826 {
3827         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
3828         unsigned long min_sleep_time_us;
3829
3830         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3831                 return;
3832
3833         /*
3834          * last_dme_cmd_tstamp will be 0 only for 1st call to
3835          * this function
3836          */
3837         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3838                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3839         } else {
3840                 unsigned long delta =
3841                         (unsigned long) ktime_to_us(
3842                                 ktime_sub(ktime_get(),
3843                                 hba->last_dme_cmd_tstamp));
3844
3845                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3846                         min_sleep_time_us =
3847                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3848                 else
3849                         return; /* no more delay required */
3850         }
3851
3852         /* allow sleep for extra 50us if needed */
3853         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3854 }
3855
3856 /**
3857  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3858  * @hba: per adapter instance
3859  * @attr_sel: uic command argument1
3860  * @attr_set: attribute set type as uic command argument2
3861  * @mib_val: setting value as uic command argument3
3862  * @peer: indicate whether peer or local
3863  *
3864  * Returns 0 on success, non-zero value on failure
3865  */
3866 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3867                         u8 attr_set, u32 mib_val, u8 peer)
3868 {
3869         struct uic_command uic_cmd = {0};
3870         static const char *const action[] = {
3871                 "dme-set",
3872                 "dme-peer-set"
3873         };
3874         const char *set = action[!!peer];
3875         int ret;
3876         int retries = UFS_UIC_COMMAND_RETRIES;
3877
3878         uic_cmd.command = peer ?
3879                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3880         uic_cmd.argument1 = attr_sel;
3881         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3882         uic_cmd.argument3 = mib_val;
3883
3884         do {
3885                 /* for peer attributes we retry upon failure */
3886                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3887                 if (ret)
3888                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3889                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3890         } while (ret && peer && --retries);
3891
3892         if (ret)
3893                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3894                         set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3895                         UFS_UIC_COMMAND_RETRIES - retries);
3896
3897         return ret;
3898 }
3899 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3900
3901 /**
3902  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3903  * @hba: per adapter instance
3904  * @attr_sel: uic command argument1
3905  * @mib_val: the value of the attribute as returned by the UIC command
3906  * @peer: indicate whether peer or local
3907  *
3908  * Returns 0 on success, non-zero value on failure
3909  */
3910 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3911                         u32 *mib_val, u8 peer)
3912 {
3913         struct uic_command uic_cmd = {0};
3914         static const char *const action[] = {
3915                 "dme-get",
3916                 "dme-peer-get"
3917         };
3918         const char *get = action[!!peer];
3919         int ret;
3920         int retries = UFS_UIC_COMMAND_RETRIES;
3921         struct ufs_pa_layer_attr orig_pwr_info;
3922         struct ufs_pa_layer_attr temp_pwr_info;
3923         bool pwr_mode_change = false;
3924
3925         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3926                 orig_pwr_info = hba->pwr_info;
3927                 temp_pwr_info = orig_pwr_info;
3928
3929                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3930                     orig_pwr_info.pwr_rx == FAST_MODE) {
3931                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3932                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3933                         pwr_mode_change = true;
3934                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3935                     orig_pwr_info.pwr_rx == SLOW_MODE) {
3936                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3937                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3938                         pwr_mode_change = true;
3939                 }
3940                 if (pwr_mode_change) {
3941                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3942                         if (ret)
3943                                 goto out;
3944                 }
3945         }
3946
3947         uic_cmd.command = peer ?
3948                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3949         uic_cmd.argument1 = attr_sel;
3950
3951         do {
3952                 /* for peer attributes we retry upon failure */
3953                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3954                 if (ret)
3955                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3956                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
3957         } while (ret && peer && --retries);
3958
3959         if (ret)
3960                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3961                         get, UIC_GET_ATTR_ID(attr_sel),
3962                         UFS_UIC_COMMAND_RETRIES - retries);
3963
3964         if (mib_val && !ret)
3965                 *mib_val = uic_cmd.argument3;
3966
3967         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3968             && pwr_mode_change)
3969                 ufshcd_change_power_mode(hba, &orig_pwr_info);
3970 out:
3971         return ret;
3972 }
3973 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3974
3975 /**
3976  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3977  * state) and waits for it to take effect.
3978  *
3979  * @hba: per adapter instance
3980  * @cmd: UIC command to execute
3981  *
3982  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3983  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3984  * and device UniPro link and hence it's final completion would be indicated by
3985  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3986  * addition to normal UIC command completion Status (UCCS). This function only
3987  * returns after the relevant status bits indicate the completion.
3988  *
3989  * Returns 0 on success, non-zero value on failure
3990  */
3991 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3992 {
3993         struct completion uic_async_done;
3994         unsigned long flags;
3995         u8 status;
3996         int ret;
3997         bool reenable_intr = false;
3998
3999         mutex_lock(&hba->uic_cmd_mutex);
4000         init_completion(&uic_async_done);
4001         ufshcd_add_delay_before_dme_cmd(hba);
4002
4003         spin_lock_irqsave(hba->host->host_lock, flags);
4004         if (ufshcd_is_link_broken(hba)) {
4005                 ret = -ENOLINK;
4006                 goto out_unlock;
4007         }
4008         hba->uic_async_done = &uic_async_done;
4009         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
4010                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
4011                 /*
4012                  * Make sure UIC command completion interrupt is disabled before
4013                  * issuing UIC command.
4014                  */
4015                 wmb();
4016                 reenable_intr = true;
4017         }
4018         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
4019         spin_unlock_irqrestore(hba->host->host_lock, flags);
4020         if (ret) {
4021                 dev_err(hba->dev,
4022                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
4023                         cmd->command, cmd->argument3, ret);
4024                 goto out;
4025         }
4026
4027         if (!wait_for_completion_timeout(hba->uic_async_done,
4028                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
4029                 dev_err(hba->dev,
4030                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
4031                         cmd->command, cmd->argument3);
4032
4033                 if (!cmd->cmd_active) {
4034                         dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
4035                                 __func__);
4036                         goto check_upmcrs;
4037                 }
4038
4039                 ret = -ETIMEDOUT;
4040                 goto out;
4041         }
4042
4043 check_upmcrs:
4044         status = ufshcd_get_upmcrs(hba);
4045         if (status != PWR_LOCAL) {
4046                 dev_err(hba->dev,
4047                         "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
4048                         cmd->command, status);
4049                 ret = (status != PWR_OK) ? status : -1;
4050         }
4051 out:
4052         if (ret) {
4053                 ufshcd_print_host_state(hba);
4054                 ufshcd_print_pwr_info(hba);
4055                 ufshcd_print_evt_hist(hba);
4056         }
4057
4058         spin_lock_irqsave(hba->host->host_lock, flags);
4059         hba->active_uic_cmd = NULL;
4060         hba->uic_async_done = NULL;
4061         if (reenable_intr)
4062                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
4063         if (ret) {
4064                 ufshcd_set_link_broken(hba);
4065                 ufshcd_schedule_eh_work(hba);
4066         }
4067 out_unlock:
4068         spin_unlock_irqrestore(hba->host->host_lock, flags);
4069         mutex_unlock(&hba->uic_cmd_mutex);
4070
4071         return ret;
4072 }
4073
4074 /**
4075  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4076  *                              using DME_SET primitives.
4077  * @hba: per adapter instance
4078  * @mode: powr mode value
4079  *
4080  * Returns 0 on success, non-zero value on failure
4081  */
4082 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
4083 {
4084         struct uic_command uic_cmd = {0};
4085         int ret;
4086
4087         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4088                 ret = ufshcd_dme_set(hba,
4089                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4090                 if (ret) {
4091                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4092                                                 __func__, ret);
4093                         goto out;
4094                 }
4095         }
4096
4097         uic_cmd.command = UIC_CMD_DME_SET;
4098         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4099         uic_cmd.argument3 = mode;
4100         ufshcd_hold(hba, false);
4101         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4102         ufshcd_release(hba);
4103
4104 out:
4105         return ret;
4106 }
4107
4108 int ufshcd_link_recovery(struct ufs_hba *hba)
4109 {
4110         int ret;
4111         unsigned long flags;
4112
4113         spin_lock_irqsave(hba->host->host_lock, flags);
4114         hba->ufshcd_state = UFSHCD_STATE_RESET;
4115         ufshcd_set_eh_in_progress(hba);
4116         spin_unlock_irqrestore(hba->host->host_lock, flags);
4117
4118         /* Reset the attached device */
4119         ufshcd_device_reset(hba);
4120
4121         ret = ufshcd_host_reset_and_restore(hba);
4122
4123         spin_lock_irqsave(hba->host->host_lock, flags);
4124         if (ret)
4125                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4126         ufshcd_clear_eh_in_progress(hba);
4127         spin_unlock_irqrestore(hba->host->host_lock, flags);
4128
4129         if (ret)
4130                 dev_err(hba->dev, "%s: link recovery failed, err %d",
4131                         __func__, ret);
4132         else
4133                 ufshcd_clear_ua_wluns(hba);
4134
4135         return ret;
4136 }
4137 EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
4138
4139 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
4140 {
4141         int ret;
4142         struct uic_command uic_cmd = {0};
4143         ktime_t start = ktime_get();
4144
4145         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4146
4147         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
4148         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4149         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4150                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4151
4152         if (ret)
4153                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4154                         __func__, ret);
4155         else
4156                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4157                                                                 POST_CHANGE);
4158
4159         return ret;
4160 }
4161
4162 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
4163 {
4164         struct uic_command uic_cmd = {0};
4165         int ret;
4166         ktime_t start = ktime_get();
4167
4168         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4169
4170         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4171         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4172         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4173                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4174
4175         if (ret) {
4176                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4177                         __func__, ret);
4178         } else {
4179                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4180                                                                 POST_CHANGE);
4181                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4182                 hba->ufs_stats.hibern8_exit_cnt++;
4183         }
4184
4185         return ret;
4186 }
4187 EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
4188
4189 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4190 {
4191         unsigned long flags;
4192         bool update = false;
4193
4194         if (!ufshcd_is_auto_hibern8_supported(hba))
4195                 return;
4196
4197         spin_lock_irqsave(hba->host->host_lock, flags);
4198         if (hba->ahit != ahit) {
4199                 hba->ahit = ahit;
4200                 update = true;
4201         }
4202         spin_unlock_irqrestore(hba->host->host_lock, flags);
4203
4204         if (update &&
4205             !pm_runtime_suspended(&hba->sdev_ufs_device->sdev_gendev)) {
4206                 ufshcd_rpm_get_sync(hba);
4207                 ufshcd_hold(hba, false);
4208                 ufshcd_auto_hibern8_enable(hba);
4209                 ufshcd_release(hba);
4210                 ufshcd_rpm_put_sync(hba);
4211         }
4212 }
4213 EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4214
4215 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
4216 {
4217         unsigned long flags;
4218
4219         if (!ufshcd_is_auto_hibern8_supported(hba))
4220                 return;
4221
4222         spin_lock_irqsave(hba->host->host_lock, flags);
4223         ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4224         spin_unlock_irqrestore(hba->host->host_lock, flags);
4225 }
4226
4227  /**
4228  * ufshcd_init_pwr_info - setting the POR (power on reset)
4229  * values in hba power info
4230  * @hba: per-adapter instance
4231  */
4232 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4233 {
4234         hba->pwr_info.gear_rx = UFS_PWM_G1;
4235         hba->pwr_info.gear_tx = UFS_PWM_G1;
4236         hba->pwr_info.lane_rx = 1;
4237         hba->pwr_info.lane_tx = 1;
4238         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4239         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4240         hba->pwr_info.hs_rate = 0;
4241 }
4242
4243 /**
4244  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4245  * @hba: per-adapter instance
4246  */
4247 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
4248 {
4249         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4250
4251         if (hba->max_pwr_info.is_valid)
4252                 return 0;
4253
4254         pwr_info->pwr_tx = FAST_MODE;
4255         pwr_info->pwr_rx = FAST_MODE;
4256         pwr_info->hs_rate = PA_HS_MODE_B;
4257
4258         /* Get the connected lane count */
4259         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4260                         &pwr_info->lane_rx);
4261         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4262                         &pwr_info->lane_tx);
4263
4264         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4265                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4266                                 __func__,
4267                                 pwr_info->lane_rx,
4268                                 pwr_info->lane_tx);
4269                 return -EINVAL;
4270         }
4271
4272         /*
4273          * First, get the maximum gears of HS speed.
4274          * If a zero value, it means there is no HSGEAR capability.
4275          * Then, get the maximum gears of PWM speed.
4276          */
4277         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4278         if (!pwr_info->gear_rx) {
4279                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4280                                 &pwr_info->gear_rx);
4281                 if (!pwr_info->gear_rx) {
4282                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4283                                 __func__, pwr_info->gear_rx);
4284                         return -EINVAL;
4285                 }
4286                 pwr_info->pwr_rx = SLOW_MODE;
4287         }
4288
4289         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4290                         &pwr_info->gear_tx);
4291         if (!pwr_info->gear_tx) {
4292                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4293                                 &pwr_info->gear_tx);
4294                 if (!pwr_info->gear_tx) {
4295                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4296                                 __func__, pwr_info->gear_tx);
4297                         return -EINVAL;
4298                 }
4299                 pwr_info->pwr_tx = SLOW_MODE;
4300         }
4301
4302         hba->max_pwr_info.is_valid = true;
4303         return 0;
4304 }
4305
4306 static int ufshcd_change_power_mode(struct ufs_hba *hba,
4307                              struct ufs_pa_layer_attr *pwr_mode)
4308 {
4309         int ret;
4310
4311         /* if already configured to the requested pwr_mode */
4312         if (!hba->force_pmc &&
4313             pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4314             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4315             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4316             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4317             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4318             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4319             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4320                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4321                 return 0;
4322         }
4323
4324         /*
4325          * Configure attributes for power mode change with below.
4326          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4327          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4328          * - PA_HSSERIES
4329          */
4330         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4331         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4332                         pwr_mode->lane_rx);
4333         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4334                         pwr_mode->pwr_rx == FAST_MODE)
4335                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4336         else
4337                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4338
4339         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4340         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4341                         pwr_mode->lane_tx);
4342         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4343                         pwr_mode->pwr_tx == FAST_MODE)
4344                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4345         else
4346                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4347
4348         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4349             pwr_mode->pwr_tx == FASTAUTO_MODE ||
4350             pwr_mode->pwr_rx == FAST_MODE ||
4351             pwr_mode->pwr_tx == FAST_MODE)
4352                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4353                                                 pwr_mode->hs_rate);
4354
4355         if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4356                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4357                                 DL_FC0ProtectionTimeOutVal_Default);
4358                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4359                                 DL_TC0ReplayTimeOutVal_Default);
4360                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4361                                 DL_AFC0ReqTimeOutVal_Default);
4362                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4363                                 DL_FC1ProtectionTimeOutVal_Default);
4364                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4365                                 DL_TC1ReplayTimeOutVal_Default);
4366                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4367                                 DL_AFC1ReqTimeOutVal_Default);
4368
4369                 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4370                                 DL_FC0ProtectionTimeOutVal_Default);
4371                 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4372                                 DL_TC0ReplayTimeOutVal_Default);
4373                 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4374                                 DL_AFC0ReqTimeOutVal_Default);
4375         }
4376
4377         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4378                         | pwr_mode->pwr_tx);
4379
4380         if (ret) {
4381                 dev_err(hba->dev,
4382                         "%s: power mode change failed %d\n", __func__, ret);
4383         } else {
4384                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4385                                                                 pwr_mode);
4386
4387                 memcpy(&hba->pwr_info, pwr_mode,
4388                         sizeof(struct ufs_pa_layer_attr));
4389         }
4390
4391         return ret;
4392 }
4393
4394 /**
4395  * ufshcd_config_pwr_mode - configure a new power mode
4396  * @hba: per-adapter instance
4397  * @desired_pwr_mode: desired power configuration
4398  */
4399 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4400                 struct ufs_pa_layer_attr *desired_pwr_mode)
4401 {
4402         struct ufs_pa_layer_attr final_params = { 0 };
4403         int ret;
4404
4405         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4406                                         desired_pwr_mode, &final_params);
4407
4408         if (ret)
4409                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4410
4411         ret = ufshcd_change_power_mode(hba, &final_params);
4412
4413         return ret;
4414 }
4415 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4416
4417 /**
4418  * ufshcd_complete_dev_init() - checks device readiness
4419  * @hba: per-adapter instance
4420  *
4421  * Set fDeviceInit flag and poll until device toggles it.
4422  */
4423 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4424 {
4425         int err;
4426         bool flag_res = true;
4427         ktime_t timeout;
4428
4429         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4430                 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
4431         if (err) {
4432                 dev_err(hba->dev,
4433                         "%s setting fDeviceInit flag failed with error %d\n",
4434                         __func__, err);
4435                 goto out;
4436         }
4437
4438         /* Poll fDeviceInit flag to be cleared */
4439         timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4440         do {
4441                 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4442                                         QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4443                 if (!flag_res)
4444                         break;
4445                 usleep_range(5000, 10000);
4446         } while (ktime_before(ktime_get(), timeout));
4447
4448         if (err) {
4449                 dev_err(hba->dev,
4450                                 "%s reading fDeviceInit flag failed with error %d\n",
4451                                 __func__, err);
4452         } else if (flag_res) {
4453                 dev_err(hba->dev,
4454                                 "%s fDeviceInit was not cleared by the device\n",
4455                                 __func__);
4456                 err = -EBUSY;
4457         }
4458 out:
4459         return err;
4460 }
4461
4462 /**
4463  * ufshcd_make_hba_operational - Make UFS controller operational
4464  * @hba: per adapter instance
4465  *
4466  * To bring UFS host controller to operational state,
4467  * 1. Enable required interrupts
4468  * 2. Configure interrupt aggregation
4469  * 3. Program UTRL and UTMRL base address
4470  * 4. Configure run-stop-registers
4471  *
4472  * Returns 0 on success, non-zero value on failure
4473  */
4474 int ufshcd_make_hba_operational(struct ufs_hba *hba)
4475 {
4476         int err = 0;
4477         u32 reg;
4478
4479         /* Enable required interrupts */
4480         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4481
4482         /* Configure interrupt aggregation */
4483         if (ufshcd_is_intr_aggr_allowed(hba))
4484                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4485         else
4486                 ufshcd_disable_intr_aggr(hba);
4487
4488         /* Configure UTRL and UTMRL base address registers */
4489         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4490                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4491         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4492                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4493         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4494                         REG_UTP_TASK_REQ_LIST_BASE_L);
4495         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4496                         REG_UTP_TASK_REQ_LIST_BASE_H);
4497
4498         /*
4499          * Make sure base address and interrupt setup are updated before
4500          * enabling the run/stop registers below.
4501          */
4502         wmb();
4503
4504         /*
4505          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4506          */
4507         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4508         if (!(ufshcd_get_lists_status(reg))) {
4509                 ufshcd_enable_run_stop_reg(hba);
4510         } else {
4511                 dev_err(hba->dev,
4512                         "Host controller not ready to process requests");
4513                 err = -EIO;
4514         }
4515
4516         return err;
4517 }
4518 EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
4519
4520 /**
4521  * ufshcd_hba_stop - Send controller to reset state
4522  * @hba: per adapter instance
4523  */
4524 void ufshcd_hba_stop(struct ufs_hba *hba)
4525 {
4526         unsigned long flags;
4527         int err;
4528
4529         /*
4530          * Obtain the host lock to prevent that the controller is disabled
4531          * while the UFS interrupt handler is active on another CPU.
4532          */
4533         spin_lock_irqsave(hba->host->host_lock, flags);
4534         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4535         spin_unlock_irqrestore(hba->host->host_lock, flags);
4536
4537         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4538                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4539                                         10, 1);
4540         if (err)
4541                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4542 }
4543 EXPORT_SYMBOL_GPL(ufshcd_hba_stop);
4544
4545 /**
4546  * ufshcd_hba_execute_hce - initialize the controller
4547  * @hba: per adapter instance
4548  *
4549  * The controller resets itself and controller firmware initialization
4550  * sequence kicks off. When controller is ready it will set
4551  * the Host Controller Enable bit to 1.
4552  *
4553  * Returns 0 on success, non-zero value on failure
4554  */
4555 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4556 {
4557         int retry_outer = 3;
4558         int retry_inner;
4559
4560 start:
4561         if (!ufshcd_is_hba_active(hba))
4562                 /* change controller state to "reset state" */
4563                 ufshcd_hba_stop(hba);
4564
4565         /* UniPro link is disabled at this point */
4566         ufshcd_set_link_off(hba);
4567
4568         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4569
4570         /* start controller initialization sequence */
4571         ufshcd_hba_start(hba);
4572
4573         /*
4574          * To initialize a UFS host controller HCE bit must be set to 1.
4575          * During initialization the HCE bit value changes from 1->0->1.
4576          * When the host controller completes initialization sequence
4577          * it sets the value of HCE bit to 1. The same HCE bit is read back
4578          * to check if the controller has completed initialization sequence.
4579          * So without this delay the value HCE = 1, set in the previous
4580          * instruction might be read back.
4581          * This delay can be changed based on the controller.
4582          */
4583         ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
4584
4585         /* wait for the host controller to complete initialization */
4586         retry_inner = 50;
4587         while (ufshcd_is_hba_active(hba)) {
4588                 if (retry_inner) {
4589                         retry_inner--;
4590                 } else {
4591                         dev_err(hba->dev,
4592                                 "Controller enable failed\n");
4593                         if (retry_outer) {
4594                                 retry_outer--;
4595                                 goto start;
4596                         }
4597                         return -EIO;
4598                 }
4599                 usleep_range(1000, 1100);
4600         }
4601
4602         /* enable UIC related interrupts */
4603         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4604
4605         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4606
4607         return 0;
4608 }
4609
4610 int ufshcd_hba_enable(struct ufs_hba *hba)
4611 {
4612         int ret;
4613
4614         if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4615                 ufshcd_set_link_off(hba);
4616                 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4617
4618                 /* enable UIC related interrupts */
4619                 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4620                 ret = ufshcd_dme_reset(hba);
4621                 if (!ret) {
4622                         ret = ufshcd_dme_enable(hba);
4623                         if (!ret)
4624                                 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4625                         if (ret)
4626                                 dev_err(hba->dev,
4627                                         "Host controller enable failed with non-hce\n");
4628                 }
4629         } else {
4630                 ret = ufshcd_hba_execute_hce(hba);
4631         }
4632
4633         return ret;
4634 }
4635 EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4636
4637 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4638 {
4639         int tx_lanes = 0, i, err = 0;
4640
4641         if (!peer)
4642                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4643                                &tx_lanes);
4644         else
4645                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4646                                     &tx_lanes);
4647         for (i = 0; i < tx_lanes; i++) {
4648                 if (!peer)
4649                         err = ufshcd_dme_set(hba,
4650                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4651                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4652                                         0);
4653                 else
4654                         err = ufshcd_dme_peer_set(hba,
4655                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4656                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4657                                         0);
4658                 if (err) {
4659                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4660                                 __func__, peer, i, err);
4661                         break;
4662                 }
4663         }
4664
4665         return err;
4666 }
4667
4668 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4669 {
4670         return ufshcd_disable_tx_lcc(hba, true);
4671 }
4672
4673 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
4674 {
4675         struct ufs_event_hist *e;
4676
4677         if (id >= UFS_EVT_CNT)
4678                 return;
4679
4680         e = &hba->ufs_stats.event[id];
4681         e->val[e->pos] = val;
4682         e->tstamp[e->pos] = ktime_get();
4683         e->cnt += 1;
4684         e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
4685
4686         ufshcd_vops_event_notify(hba, id, &val);
4687 }
4688 EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
4689
4690 /**
4691  * ufshcd_link_startup - Initialize unipro link startup
4692  * @hba: per adapter instance
4693  *
4694  * Returns 0 for success, non-zero in case of failure
4695  */
4696 static int ufshcd_link_startup(struct ufs_hba *hba)
4697 {
4698         int ret;
4699         int retries = DME_LINKSTARTUP_RETRIES;
4700         bool link_startup_again = false;
4701
4702         /*
4703          * If UFS device isn't active then we will have to issue link startup
4704          * 2 times to make sure the device state move to active.
4705          */
4706         if (!ufshcd_is_ufs_dev_active(hba))
4707                 link_startup_again = true;
4708
4709 link_startup:
4710         do {
4711                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4712
4713                 ret = ufshcd_dme_link_startup(hba);
4714
4715                 /* check if device is detected by inter-connect layer */
4716                 if (!ret && !ufshcd_is_device_present(hba)) {
4717                         ufshcd_update_evt_hist(hba,
4718                                                UFS_EVT_LINK_STARTUP_FAIL,
4719                                                0);
4720                         dev_err(hba->dev, "%s: Device not present\n", __func__);
4721                         ret = -ENXIO;
4722                         goto out;
4723                 }
4724
4725                 /*
4726                  * DME link lost indication is only received when link is up,
4727                  * but we can't be sure if the link is up until link startup
4728                  * succeeds. So reset the local Uni-Pro and try again.
4729                  */
4730                 if (ret && ufshcd_hba_enable(hba)) {
4731                         ufshcd_update_evt_hist(hba,
4732                                                UFS_EVT_LINK_STARTUP_FAIL,
4733                                                (u32)ret);
4734                         goto out;
4735                 }
4736         } while (ret && retries--);
4737
4738         if (ret) {
4739                 /* failed to get the link up... retire */
4740                 ufshcd_update_evt_hist(hba,
4741                                        UFS_EVT_LINK_STARTUP_FAIL,
4742                                        (u32)ret);
4743                 goto out;
4744         }
4745
4746         if (link_startup_again) {
4747                 link_startup_again = false;
4748                 retries = DME_LINKSTARTUP_RETRIES;
4749                 goto link_startup;
4750         }
4751
4752         /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4753         ufshcd_init_pwr_info(hba);
4754         ufshcd_print_pwr_info(hba);
4755
4756         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4757                 ret = ufshcd_disable_device_tx_lcc(hba);
4758                 if (ret)
4759                         goto out;
4760         }
4761
4762         /* Include any host controller configuration via UIC commands */
4763         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4764         if (ret)
4765                 goto out;
4766
4767         /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4768         ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
4769         ret = ufshcd_make_hba_operational(hba);
4770 out:
4771         if (ret) {
4772                 dev_err(hba->dev, "link startup failed %d\n", ret);
4773                 ufshcd_print_host_state(hba);
4774                 ufshcd_print_pwr_info(hba);
4775                 ufshcd_print_evt_hist(hba);
4776         }
4777         return ret;
4778 }
4779
4780 /**
4781  * ufshcd_verify_dev_init() - Verify device initialization
4782  * @hba: per-adapter instance
4783  *
4784  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4785  * device Transport Protocol (UTP) layer is ready after a reset.
4786  * If the UTP layer at the device side is not initialized, it may
4787  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4788  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4789  */
4790 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4791 {
4792         int err = 0;
4793         int retries;
4794
4795         ufshcd_hold(hba, false);
4796         mutex_lock(&hba->dev_cmd.lock);
4797         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4798                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4799                                                NOP_OUT_TIMEOUT);
4800
4801                 if (!err || err == -ETIMEDOUT)
4802                         break;
4803
4804                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4805         }
4806         mutex_unlock(&hba->dev_cmd.lock);
4807         ufshcd_release(hba);
4808
4809         if (err)
4810                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4811         return err;
4812 }
4813
4814 /**
4815  * ufshcd_set_queue_depth - set lun queue depth
4816  * @sdev: pointer to SCSI device
4817  *
4818  * Read bLUQueueDepth value and activate scsi tagged command
4819  * queueing. For WLUN, queue depth is set to 1. For best-effort
4820  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4821  * value that host can queue.
4822  */
4823 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4824 {
4825         int ret = 0;
4826         u8 lun_qdepth;
4827         struct ufs_hba *hba;
4828
4829         hba = shost_priv(sdev->host);
4830
4831         lun_qdepth = hba->nutrs;
4832         ret = ufshcd_read_unit_desc_param(hba,
4833                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
4834                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
4835                                           &lun_qdepth,
4836                                           sizeof(lun_qdepth));
4837
4838         /* Some WLUN doesn't support unit descriptor */
4839         if (ret == -EOPNOTSUPP)
4840                 lun_qdepth = 1;
4841         else if (!lun_qdepth)
4842                 /* eventually, we can figure out the real queue depth */
4843                 lun_qdepth = hba->nutrs;
4844         else
4845                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4846
4847         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4848                         __func__, lun_qdepth);
4849         scsi_change_queue_depth(sdev, lun_qdepth);
4850 }
4851
4852 /*
4853  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4854  * @hba: per-adapter instance
4855  * @lun: UFS device lun id
4856  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4857  *
4858  * Returns 0 in case of success and b_lu_write_protect status would be returned
4859  * @b_lu_write_protect parameter.
4860  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4861  * Returns -EINVAL in case of invalid parameters passed to this function.
4862  */
4863 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4864                             u8 lun,
4865                             u8 *b_lu_write_protect)
4866 {
4867         int ret;
4868
4869         if (!b_lu_write_protect)
4870                 ret = -EINVAL;
4871         /*
4872          * According to UFS device spec, RPMB LU can't be write
4873          * protected so skip reading bLUWriteProtect parameter for
4874          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4875          */
4876         else if (lun >= hba->dev_info.max_lu_supported)
4877                 ret = -ENOTSUPP;
4878         else
4879                 ret = ufshcd_read_unit_desc_param(hba,
4880                                           lun,
4881                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
4882                                           b_lu_write_protect,
4883                                           sizeof(*b_lu_write_protect));
4884         return ret;
4885 }
4886
4887 /**
4888  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4889  * status
4890  * @hba: per-adapter instance
4891  * @sdev: pointer to SCSI device
4892  *
4893  */
4894 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4895                                                     struct scsi_device *sdev)
4896 {
4897         if (hba->dev_info.f_power_on_wp_en &&
4898             !hba->dev_info.is_lu_power_on_wp) {
4899                 u8 b_lu_write_protect;
4900
4901                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4902                                       &b_lu_write_protect) &&
4903                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4904                         hba->dev_info.is_lu_power_on_wp = true;
4905         }
4906 }
4907
4908 /**
4909  * ufshcd_setup_links - associate link b/w device wlun and other luns
4910  * @sdev: pointer to SCSI device
4911  * @hba: pointer to ufs hba
4912  */
4913 static void ufshcd_setup_links(struct ufs_hba *hba, struct scsi_device *sdev)
4914 {
4915         struct device_link *link;
4916
4917         /*
4918          * Device wlun is the supplier & rest of the luns are consumers.
4919          * This ensures that device wlun suspends after all other luns.
4920          */
4921         if (hba->sdev_ufs_device) {
4922                 link = device_link_add(&sdev->sdev_gendev,
4923                                        &hba->sdev_ufs_device->sdev_gendev,
4924                                        DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
4925                 if (!link) {
4926                         dev_err(&sdev->sdev_gendev, "Failed establishing link - %s\n",
4927                                 dev_name(&hba->sdev_ufs_device->sdev_gendev));
4928                         return;
4929                 }
4930                 hba->luns_avail--;
4931                 /* Ignore REPORT_LUN wlun probing */
4932                 if (hba->luns_avail == 1) {
4933                         ufshcd_rpm_put(hba);
4934                         return;
4935                 }
4936         } else {
4937                 /*
4938                  * Device wlun is probed. The assumption is that WLUNs are
4939                  * scanned before other LUNs.
4940                  */
4941                 hba->luns_avail--;
4942         }
4943 }
4944
4945 /**
4946  * ufshcd_slave_alloc - handle initial SCSI device configurations
4947  * @sdev: pointer to SCSI device
4948  *
4949  * Returns success
4950  */
4951 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4952 {
4953         struct ufs_hba *hba;
4954
4955         hba = shost_priv(sdev->host);
4956
4957         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4958         sdev->use_10_for_ms = 1;
4959
4960         /* DBD field should be set to 1 in mode sense(10) */
4961         sdev->set_dbd_for_ms = 1;
4962
4963         /* allow SCSI layer to restart the device in case of errors */
4964         sdev->allow_restart = 1;
4965
4966         /* REPORT SUPPORTED OPERATION CODES is not supported */
4967         sdev->no_report_opcodes = 1;
4968
4969         /* WRITE_SAME command is not supported */
4970         sdev->no_write_same = 1;
4971
4972         ufshcd_set_queue_depth(sdev);
4973
4974         ufshcd_get_lu_power_on_wp_status(hba, sdev);
4975
4976         ufshcd_setup_links(hba, sdev);
4977
4978         return 0;
4979 }
4980
4981 /**
4982  * ufshcd_change_queue_depth - change queue depth
4983  * @sdev: pointer to SCSI device
4984  * @depth: required depth to set
4985  *
4986  * Change queue depth and make sure the max. limits are not crossed.
4987  */
4988 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4989 {
4990         struct ufs_hba *hba = shost_priv(sdev->host);
4991
4992         if (depth > hba->nutrs)
4993                 depth = hba->nutrs;
4994         return scsi_change_queue_depth(sdev, depth);
4995 }
4996
4997 static void ufshcd_hpb_destroy(struct ufs_hba *hba, struct scsi_device *sdev)
4998 {
4999         /* skip well-known LU */
5000         if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
5001             !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
5002                 return;
5003
5004         ufshpb_destroy_lu(hba, sdev);
5005 }
5006
5007 static void ufshcd_hpb_configure(struct ufs_hba *hba, struct scsi_device *sdev)
5008 {
5009         /* skip well-known LU */
5010         if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
5011             !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
5012                 return;
5013
5014         ufshpb_init_hpb_lu(hba, sdev);
5015 }
5016
5017 /**
5018  * ufshcd_slave_configure - adjust SCSI device configurations
5019  * @sdev: pointer to SCSI device
5020  */
5021 static int ufshcd_slave_configure(struct scsi_device *sdev)
5022 {
5023         struct ufs_hba *hba = shost_priv(sdev->host);
5024         struct request_queue *q = sdev->request_queue;
5025
5026         ufshcd_hpb_configure(hba, sdev);
5027
5028         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
5029         if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
5030                 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
5031         /*
5032          * Block runtime-pm until all consumers are added.
5033          * Refer ufshcd_setup_links().
5034          */
5035         if (is_device_wlun(sdev))
5036                 pm_runtime_get_noresume(&sdev->sdev_gendev);
5037         else if (ufshcd_is_rpm_autosuspend_allowed(hba))
5038                 sdev->rpm_autosuspend = 1;
5039
5040         ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
5041
5042         return 0;
5043 }
5044
5045 /**
5046  * ufshcd_slave_destroy - remove SCSI device configurations
5047  * @sdev: pointer to SCSI device
5048  */
5049 static void ufshcd_slave_destroy(struct scsi_device *sdev)
5050 {
5051         struct ufs_hba *hba;
5052
5053         hba = shost_priv(sdev->host);
5054
5055         ufshcd_hpb_destroy(hba, sdev);
5056
5057         /* Drop the reference as it won't be needed anymore */
5058         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
5059                 unsigned long flags;
5060
5061                 spin_lock_irqsave(hba->host->host_lock, flags);
5062                 hba->sdev_ufs_device = NULL;
5063                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5064         }
5065 }
5066
5067 /**
5068  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
5069  * @lrbp: pointer to local reference block of completed command
5070  * @scsi_status: SCSI command status
5071  *
5072  * Returns value base on SCSI command status
5073  */
5074 static inline int
5075 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5076 {
5077         int result = 0;
5078
5079         switch (scsi_status) {
5080         case SAM_STAT_CHECK_CONDITION:
5081                 ufshcd_copy_sense_data(lrbp);
5082                 fallthrough;
5083         case SAM_STAT_GOOD:
5084                 result |= DID_OK << 16 | scsi_status;
5085                 break;
5086         case SAM_STAT_TASK_SET_FULL:
5087         case SAM_STAT_BUSY:
5088         case SAM_STAT_TASK_ABORTED:
5089                 ufshcd_copy_sense_data(lrbp);
5090                 result |= scsi_status;
5091                 break;
5092         default:
5093                 result |= DID_ERROR << 16;
5094                 break;
5095         } /* end of switch */
5096
5097         return result;
5098 }
5099
5100 /**
5101  * ufshcd_transfer_rsp_status - Get overall status of the response
5102  * @hba: per adapter instance
5103  * @lrbp: pointer to local reference block of completed command
5104  *
5105  * Returns result of the command to notify SCSI midlayer
5106  */
5107 static inline int
5108 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5109 {
5110         int result = 0;
5111         int scsi_status;
5112         int ocs;
5113
5114         /* overall command status of utrd */
5115         ocs = ufshcd_get_tr_ocs(lrbp);
5116
5117         if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
5118                 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
5119                                         MASK_RSP_UPIU_RESULT)
5120                         ocs = OCS_SUCCESS;
5121         }
5122
5123         switch (ocs) {
5124         case OCS_SUCCESS:
5125                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
5126                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
5127                 switch (result) {
5128                 case UPIU_TRANSACTION_RESPONSE:
5129                         /*
5130                          * get the response UPIU result to extract
5131                          * the SCSI command status
5132                          */
5133                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5134
5135                         /*
5136                          * get the result based on SCSI status response
5137                          * to notify the SCSI midlayer of the command status
5138                          */
5139                         scsi_status = result & MASK_SCSI_STATUS;
5140                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
5141
5142                         /*
5143                          * Currently we are only supporting BKOPs exception
5144                          * events hence we can ignore BKOPs exception event
5145                          * during power management callbacks. BKOPs exception
5146                          * event is not expected to be raised in runtime suspend
5147                          * callback as it allows the urgent bkops.
5148                          * During system suspend, we are anyway forcefully
5149                          * disabling the bkops and if urgent bkops is needed
5150                          * it will be enabled on system resume. Long term
5151                          * solution could be to abort the system suspend if
5152                          * UFS device needs urgent BKOPs.
5153                          */
5154                         if (!hba->pm_op_in_progress &&
5155                             !ufshcd_eh_in_progress(hba) &&
5156                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
5157                                 /* Flushed in suspend */
5158                                 schedule_work(&hba->eeh_work);
5159
5160                         if (scsi_status == SAM_STAT_GOOD)
5161                                 ufshpb_rsp_upiu(hba, lrbp);
5162                         break;
5163                 case UPIU_TRANSACTION_REJECT_UPIU:
5164                         /* TODO: handle Reject UPIU Response */
5165                         result = DID_ERROR << 16;
5166                         dev_err(hba->dev,
5167                                 "Reject UPIU not fully implemented\n");
5168                         break;
5169                 default:
5170                         dev_err(hba->dev,
5171                                 "Unexpected request response code = %x\n",
5172                                 result);
5173                         result = DID_ERROR << 16;
5174                         break;
5175                 }
5176                 break;
5177         case OCS_ABORTED:
5178                 result |= DID_ABORT << 16;
5179                 break;
5180         case OCS_INVALID_COMMAND_STATUS:
5181                 result |= DID_REQUEUE << 16;
5182                 break;
5183         case OCS_INVALID_CMD_TABLE_ATTR:
5184         case OCS_INVALID_PRDT_ATTR:
5185         case OCS_MISMATCH_DATA_BUF_SIZE:
5186         case OCS_MISMATCH_RESP_UPIU_SIZE:
5187         case OCS_PEER_COMM_FAILURE:
5188         case OCS_FATAL_ERROR:
5189         case OCS_DEVICE_FATAL_ERROR:
5190         case OCS_INVALID_CRYPTO_CONFIG:
5191         case OCS_GENERAL_CRYPTO_ERROR:
5192         default:
5193                 result |= DID_ERROR << 16;
5194                 dev_err(hba->dev,
5195                                 "OCS error from controller = %x for tag %d\n",
5196                                 ocs, lrbp->task_tag);
5197                 ufshcd_print_evt_hist(hba);
5198                 ufshcd_print_host_state(hba);
5199                 break;
5200         } /* end of switch */
5201
5202         if ((host_byte(result) != DID_OK) &&
5203             (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
5204                 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
5205         return result;
5206 }
5207
5208 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5209                                          u32 intr_mask)
5210 {
5211         if (!ufshcd_is_auto_hibern8_supported(hba) ||
5212             !ufshcd_is_auto_hibern8_enabled(hba))
5213                 return false;
5214
5215         if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5216                 return false;
5217
5218         if (hba->active_uic_cmd &&
5219             (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5220             hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5221                 return false;
5222
5223         return true;
5224 }
5225
5226 /**
5227  * ufshcd_uic_cmd_compl - handle completion of uic command
5228  * @hba: per adapter instance
5229  * @intr_status: interrupt status generated by the controller
5230  *
5231  * Returns
5232  *  IRQ_HANDLED - If interrupt is valid
5233  *  IRQ_NONE    - If invalid interrupt
5234  */
5235 static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
5236 {
5237         irqreturn_t retval = IRQ_NONE;
5238
5239         spin_lock(hba->host->host_lock);
5240         if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5241                 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5242
5243         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
5244                 hba->active_uic_cmd->argument2 |=
5245                         ufshcd_get_uic_cmd_result(hba);
5246                 hba->active_uic_cmd->argument3 =
5247                         ufshcd_get_dme_attr_val(hba);
5248                 if (!hba->uic_async_done)
5249                         hba->active_uic_cmd->cmd_active = 0;
5250                 complete(&hba->active_uic_cmd->done);
5251                 retval = IRQ_HANDLED;
5252         }
5253
5254         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
5255                 hba->active_uic_cmd->cmd_active = 0;
5256                 complete(hba->uic_async_done);
5257                 retval = IRQ_HANDLED;
5258         }
5259
5260         if (retval == IRQ_HANDLED)
5261                 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
5262                                              UFS_CMD_COMP);
5263         spin_unlock(hba->host->host_lock);
5264         return retval;
5265 }
5266
5267 /**
5268  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
5269  * @hba: per adapter instance
5270  * @completed_reqs: requests to complete
5271  */
5272 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5273                                         unsigned long completed_reqs)
5274 {
5275         struct ufshcd_lrb *lrbp;
5276         struct scsi_cmnd *cmd;
5277         int result;
5278         int index;
5279         bool update_scaling = false;
5280
5281         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5282                 if (!test_and_clear_bit(index, &hba->outstanding_reqs))
5283                         continue;
5284                 lrbp = &hba->lrb[index];
5285                 lrbp->compl_time_stamp = ktime_get();
5286                 cmd = lrbp->cmd;
5287                 if (cmd) {
5288                         if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
5289                                 ufshcd_update_monitor(hba, lrbp);
5290                         ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
5291                         result = ufshcd_transfer_rsp_status(hba, lrbp);
5292                         scsi_dma_unmap(cmd);
5293                         cmd->result = result;
5294                         /* Mark completed command as NULL in LRB */
5295                         lrbp->cmd = NULL;
5296                         /* Do not touch lrbp after scsi done */
5297                         cmd->scsi_done(cmd);
5298                         ufshcd_release(hba);
5299                         update_scaling = true;
5300                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5301                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
5302                         if (hba->dev_cmd.complete) {
5303                                 ufshcd_add_command_trace(hba, index,
5304                                                          UFS_DEV_COMP);
5305                                 complete(hba->dev_cmd.complete);
5306                                 update_scaling = true;
5307                         }
5308                 }
5309                 if (update_scaling)
5310                         ufshcd_clk_scaling_update_busy(hba);
5311         }
5312 }
5313
5314 /**
5315  * ufshcd_trc_handler - handle transfer requests completion
5316  * @hba: per adapter instance
5317  * @use_utrlcnr: get completed requests from UTRLCNR
5318  *
5319  * Returns
5320  *  IRQ_HANDLED - If interrupt is valid
5321  *  IRQ_NONE    - If invalid interrupt
5322  */
5323 static irqreturn_t ufshcd_trc_handler(struct ufs_hba *hba, bool use_utrlcnr)
5324 {
5325         unsigned long completed_reqs = 0;
5326
5327         /* Resetting interrupt aggregation counters first and reading the
5328          * DOOR_BELL afterward allows us to handle all the completed requests.
5329          * In order to prevent other interrupts starvation the DB is read once
5330          * after reset. The down side of this solution is the possibility of
5331          * false interrupt if device completes another request after resetting
5332          * aggregation and before reading the DB.
5333          */
5334         if (ufshcd_is_intr_aggr_allowed(hba) &&
5335             !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
5336                 ufshcd_reset_intr_aggr(hba);
5337
5338         if (use_utrlcnr) {
5339                 u32 utrlcnr;
5340
5341                 utrlcnr = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_LIST_COMPL);
5342                 if (utrlcnr) {
5343                         ufshcd_writel(hba, utrlcnr,
5344                                       REG_UTP_TRANSFER_REQ_LIST_COMPL);
5345                         completed_reqs = utrlcnr;
5346                 }
5347         } else {
5348                 unsigned long flags;
5349                 u32 tr_doorbell;
5350
5351                 spin_lock_irqsave(hba->host->host_lock, flags);
5352                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5353                 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
5354                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5355         }
5356
5357         if (completed_reqs) {
5358                 __ufshcd_transfer_req_compl(hba, completed_reqs);
5359                 return IRQ_HANDLED;
5360         } else {
5361                 return IRQ_NONE;
5362         }
5363 }
5364
5365 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask)
5366 {
5367         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5368                                        QUERY_ATTR_IDN_EE_CONTROL, 0, 0,
5369                                        &ee_ctrl_mask);
5370 }
5371
5372 int ufshcd_write_ee_control(struct ufs_hba *hba)
5373 {
5374         int err;
5375
5376         mutex_lock(&hba->ee_ctrl_mutex);
5377         err = __ufshcd_write_ee_control(hba, hba->ee_ctrl_mask);
5378         mutex_unlock(&hba->ee_ctrl_mutex);
5379         if (err)
5380                 dev_err(hba->dev, "%s: failed to write ee control %d\n",
5381                         __func__, err);
5382         return err;
5383 }
5384
5385 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
5386                              u16 set, u16 clr)
5387 {
5388         u16 new_mask, ee_ctrl_mask;
5389         int err = 0;
5390
5391         mutex_lock(&hba->ee_ctrl_mutex);
5392         new_mask = (*mask & ~clr) | set;
5393         ee_ctrl_mask = new_mask | *other_mask;
5394         if (ee_ctrl_mask != hba->ee_ctrl_mask)
5395                 err = __ufshcd_write_ee_control(hba, ee_ctrl_mask);
5396         /* Still need to update 'mask' even if 'ee_ctrl_mask' was unchanged */
5397         if (!err) {
5398                 hba->ee_ctrl_mask = ee_ctrl_mask;
5399                 *mask = new_mask;
5400         }
5401         mutex_unlock(&hba->ee_ctrl_mutex);
5402         return err;
5403 }
5404
5405 /**
5406  * ufshcd_disable_ee - disable exception event
5407  * @hba: per-adapter instance
5408  * @mask: exception event to disable
5409  *
5410  * Disables exception event in the device so that the EVENT_ALERT
5411  * bit is not set.
5412  *
5413  * Returns zero on success, non-zero error value on failure.
5414  */
5415 static inline int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5416 {
5417         return ufshcd_update_ee_drv_mask(hba, 0, mask);
5418 }
5419
5420 /**
5421  * ufshcd_enable_ee - enable exception event
5422  * @hba: per-adapter instance
5423  * @mask: exception event to enable
5424  *
5425  * Enable corresponding exception event in the device to allow
5426  * device to alert host in critical scenarios.
5427  *
5428  * Returns zero on success, non-zero error value on failure.
5429  */
5430 static inline int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5431 {
5432         return ufshcd_update_ee_drv_mask(hba, mask, 0);
5433 }
5434
5435 /**
5436  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5437  * @hba: per-adapter instance
5438  *
5439  * Allow device to manage background operations on its own. Enabling
5440  * this might lead to inconsistent latencies during normal data transfers
5441  * as the device is allowed to manage its own way of handling background
5442  * operations.
5443  *
5444  * Returns zero on success, non-zero on failure.
5445  */
5446 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5447 {
5448         int err = 0;
5449
5450         if (hba->auto_bkops_enabled)
5451                 goto out;
5452
5453         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5454                         QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5455         if (err) {
5456                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5457                                 __func__, err);
5458                 goto out;
5459         }
5460
5461         hba->auto_bkops_enabled = true;
5462         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5463
5464         /* No need of URGENT_BKOPS exception from the device */
5465         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5466         if (err)
5467                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5468                                 __func__, err);
5469 out:
5470         return err;
5471 }
5472
5473 /**
5474  * ufshcd_disable_auto_bkops - block device in doing background operations
5475  * @hba: per-adapter instance
5476  *
5477  * Disabling background operations improves command response latency but
5478  * has drawback of device moving into critical state where the device is
5479  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5480  * host is idle so that BKOPS are managed effectively without any negative
5481  * impacts.
5482  *
5483  * Returns zero on success, non-zero on failure.
5484  */
5485 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5486 {
5487         int err = 0;
5488
5489         if (!hba->auto_bkops_enabled)
5490                 goto out;
5491
5492         /*
5493          * If host assisted BKOPs is to be enabled, make sure
5494          * urgent bkops exception is allowed.
5495          */
5496         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5497         if (err) {
5498                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5499                                 __func__, err);
5500                 goto out;
5501         }
5502
5503         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5504                         QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5505         if (err) {
5506                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5507                                 __func__, err);
5508                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5509                 goto out;
5510         }
5511
5512         hba->auto_bkops_enabled = false;
5513         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5514         hba->is_urgent_bkops_lvl_checked = false;
5515 out:
5516         return err;
5517 }
5518
5519 /**
5520  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5521  * @hba: per adapter instance
5522  *
5523  * After a device reset the device may toggle the BKOPS_EN flag
5524  * to default value. The s/w tracking variables should be updated
5525  * as well. This function would change the auto-bkops state based on
5526  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5527  */
5528 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5529 {
5530         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5531                 hba->auto_bkops_enabled = false;
5532                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5533                 ufshcd_enable_auto_bkops(hba);
5534         } else {
5535                 hba->auto_bkops_enabled = true;
5536                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5537                 ufshcd_disable_auto_bkops(hba);
5538         }
5539         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
5540         hba->is_urgent_bkops_lvl_checked = false;
5541 }
5542
5543 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5544 {
5545         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5546                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5547 }
5548
5549 /**
5550  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5551  * @hba: per-adapter instance
5552  * @status: bkops_status value
5553  *
5554  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5555  * flag in the device to permit background operations if the device
5556  * bkops_status is greater than or equal to "status" argument passed to
5557  * this function, disable otherwise.
5558  *
5559  * Returns 0 for success, non-zero in case of failure.
5560  *
5561  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5562  * to know whether auto bkops is enabled or disabled after this function
5563  * returns control to it.
5564  */
5565 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5566                              enum bkops_status status)
5567 {
5568         int err;
5569         u32 curr_status = 0;
5570
5571         err = ufshcd_get_bkops_status(hba, &curr_status);
5572         if (err) {
5573                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5574                                 __func__, err);
5575                 goto out;
5576         } else if (curr_status > BKOPS_STATUS_MAX) {
5577                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5578                                 __func__, curr_status);
5579                 err = -EINVAL;
5580                 goto out;
5581         }
5582
5583         if (curr_status >= status)
5584                 err = ufshcd_enable_auto_bkops(hba);
5585         else
5586                 err = ufshcd_disable_auto_bkops(hba);
5587 out:
5588         return err;
5589 }
5590
5591 /**
5592  * ufshcd_urgent_bkops - handle urgent bkops exception event
5593  * @hba: per-adapter instance
5594  *
5595  * Enable fBackgroundOpsEn flag in the device to permit background
5596  * operations.
5597  *
5598  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5599  * and negative error value for any other failure.
5600  */
5601 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5602 {
5603         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5604 }
5605
5606 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5607 {
5608         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5609                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5610 }
5611
5612 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5613 {
5614         int err;
5615         u32 curr_status = 0;
5616
5617         if (hba->is_urgent_bkops_lvl_checked)
5618                 goto enable_auto_bkops;
5619
5620         err = ufshcd_get_bkops_status(hba, &curr_status);
5621         if (err) {
5622                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5623                                 __func__, err);
5624                 goto out;
5625         }
5626
5627         /*
5628          * We are seeing that some devices are raising the urgent bkops
5629          * exception events even when BKOPS status doesn't indicate performace
5630          * impacted or critical. Handle these device by determining their urgent
5631          * bkops status at runtime.
5632          */
5633         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5634                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5635                                 __func__, curr_status);
5636                 /* update the current status as the urgent bkops level */
5637                 hba->urgent_bkops_lvl = curr_status;
5638                 hba->is_urgent_bkops_lvl_checked = true;
5639         }
5640
5641 enable_auto_bkops:
5642         err = ufshcd_enable_auto_bkops(hba);
5643 out:
5644         if (err < 0)
5645                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5646                                 __func__, err);
5647 }
5648
5649 static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
5650 {
5651         u8 index;
5652         enum query_opcode opcode = set ? UPIU_QUERY_OPCODE_SET_FLAG :
5653                                    UPIU_QUERY_OPCODE_CLEAR_FLAG;
5654
5655         index = ufshcd_wb_get_query_index(hba);
5656         return ufshcd_query_flag_retry(hba, opcode, idn, index, NULL);
5657 }
5658
5659 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable)
5660 {
5661         int ret;
5662
5663         if (!ufshcd_is_wb_allowed(hba))
5664                 return 0;
5665
5666         if (!(enable ^ hba->dev_info.wb_enabled))
5667                 return 0;
5668
5669         ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_EN);
5670         if (ret) {
5671                 dev_err(hba->dev, "%s Write Booster %s failed %d\n",
5672                         __func__, enable ? "enable" : "disable", ret);
5673                 return ret;
5674         }
5675
5676         hba->dev_info.wb_enabled = enable;
5677         dev_info(hba->dev, "%s Write Booster %s\n",
5678                         __func__, enable ? "enabled" : "disabled");
5679
5680         return ret;
5681 }
5682
5683 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5684 {
5685         int ret;
5686
5687         ret = __ufshcd_wb_toggle(hba, set,
5688                         QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8);
5689         if (ret) {
5690                 dev_err(hba->dev, "%s: WB-Buf Flush during H8 %s failed: %d\n",
5691                         __func__, set ? "enable" : "disable", ret);
5692                 return;
5693         }
5694         dev_dbg(hba->dev, "%s WB-Buf Flush during H8 %s\n",
5695                         __func__, set ? "enabled" : "disabled");
5696 }
5697
5698 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5699 {
5700         int ret;
5701
5702         if (!ufshcd_is_wb_allowed(hba) ||
5703             hba->dev_info.wb_buf_flush_enabled == enable)
5704                 return;
5705
5706         ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN);
5707         if (ret) {
5708                 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5709                         enable ? "enable" : "disable", ret);
5710                 return;
5711         }
5712
5713         hba->dev_info.wb_buf_flush_enabled = enable;
5714
5715         dev_dbg(hba->dev, "%s WB-Buf Flush %s\n",
5716                         __func__, enable ? "enabled" : "disabled");
5717 }
5718
5719 static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5720                                                 u32 avail_buf)
5721 {
5722         u32 cur_buf;
5723         int ret;
5724         u8 index;
5725
5726         index = ufshcd_wb_get_query_index(hba);
5727         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5728                                               QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5729                                               index, 0, &cur_buf);
5730         if (ret) {
5731                 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5732                         __func__, ret);
5733                 return false;
5734         }
5735
5736         if (!cur_buf) {
5737                 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5738                          cur_buf);
5739                 return false;
5740         }
5741         /* Let it continue to flush when available buffer exceeds threshold */
5742         if (avail_buf < hba->vps->wb_flush_threshold)
5743                 return true;
5744
5745         return false;
5746 }
5747
5748 static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
5749 {
5750         int ret;
5751         u32 avail_buf;
5752         u8 index;
5753
5754         if (!ufshcd_is_wb_allowed(hba))
5755                 return false;
5756         /*
5757          * The ufs device needs the vcc to be ON to flush.
5758          * With user-space reduction enabled, it's enough to enable flush
5759          * by checking only the available buffer. The threshold
5760          * defined here is > 90% full.
5761          * With user-space preserved enabled, the current-buffer
5762          * should be checked too because the wb buffer size can reduce
5763          * when disk tends to be full. This info is provided by current
5764          * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5765          * keeping vcc on when current buffer is empty.
5766          */
5767         index = ufshcd_wb_get_query_index(hba);
5768         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5769                                       QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5770                                       index, 0, &avail_buf);
5771         if (ret) {
5772                 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5773                          __func__, ret);
5774                 return false;
5775         }
5776
5777         if (!hba->dev_info.b_presrv_uspc_en) {
5778                 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
5779                         return true;
5780                 return false;
5781         }
5782
5783         return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5784 }
5785
5786 static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5787 {
5788         struct ufs_hba *hba = container_of(to_delayed_work(work),
5789                                            struct ufs_hba,
5790                                            rpm_dev_flush_recheck_work);
5791         /*
5792          * To prevent unnecessary VCC power drain after device finishes
5793          * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5794          * after a certain delay to recheck the threshold by next runtime
5795          * suspend.
5796          */
5797         ufshcd_rpm_get_sync(hba);
5798         ufshcd_rpm_put_sync(hba);
5799 }
5800
5801 /**
5802  * ufshcd_exception_event_handler - handle exceptions raised by device
5803  * @work: pointer to work data
5804  *
5805  * Read bExceptionEventStatus attribute from the device and handle the
5806  * exception event accordingly.
5807  */
5808 static void ufshcd_exception_event_handler(struct work_struct *work)
5809 {
5810         struct ufs_hba *hba;
5811         int err;
5812         u32 status = 0;
5813         hba = container_of(work, struct ufs_hba, eeh_work);
5814
5815         ufshcd_scsi_block_requests(hba);
5816         err = ufshcd_get_ee_status(hba, &status);
5817         if (err) {
5818                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5819                                 __func__, err);
5820                 goto out;
5821         }
5822
5823         trace_ufshcd_exception_event(dev_name(hba->dev), status);
5824
5825         if (status & hba->ee_drv_mask & MASK_EE_URGENT_BKOPS)
5826                 ufshcd_bkops_exception_event_handler(hba);
5827
5828         ufs_debugfs_exception_event(hba, status);
5829 out:
5830         ufshcd_scsi_unblock_requests(hba);
5831         return;
5832 }
5833
5834 /* Complete requests that have door-bell cleared */
5835 static void ufshcd_complete_requests(struct ufs_hba *hba)
5836 {
5837         ufshcd_trc_handler(hba, false);
5838         ufshcd_tmc_handler(hba);
5839 }
5840
5841 /**
5842  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5843  *                              to recover from the DL NAC errors or not.
5844  * @hba: per-adapter instance
5845  *
5846  * Returns true if error handling is required, false otherwise
5847  */
5848 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5849 {
5850         unsigned long flags;
5851         bool err_handling = true;
5852
5853         spin_lock_irqsave(hba->host->host_lock, flags);
5854         /*
5855          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5856          * device fatal error and/or DL NAC & REPLAY timeout errors.
5857          */
5858         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5859                 goto out;
5860
5861         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5862             ((hba->saved_err & UIC_ERROR) &&
5863              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5864                 goto out;
5865
5866         if ((hba->saved_err & UIC_ERROR) &&
5867             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5868                 int err;
5869                 /*
5870                  * wait for 50ms to see if we can get any other errors or not.
5871                  */
5872                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5873                 msleep(50);
5874                 spin_lock_irqsave(hba->host->host_lock, flags);
5875
5876                 /*
5877                  * now check if we have got any other severe errors other than
5878                  * DL NAC error?
5879                  */
5880                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5881                     ((hba->saved_err & UIC_ERROR) &&
5882                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5883                         goto out;
5884
5885                 /*
5886                  * As DL NAC is the only error received so far, send out NOP
5887                  * command to confirm if link is still active or not.
5888                  *   - If we don't get any response then do error recovery.
5889                  *   - If we get response then clear the DL NAC error bit.
5890                  */
5891
5892                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5893                 err = ufshcd_verify_dev_init(hba);
5894                 spin_lock_irqsave(hba->host->host_lock, flags);
5895
5896                 if (err)
5897                         goto out;
5898
5899                 /* Link seems to be alive hence ignore the DL NAC errors */
5900                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5901                         hba->saved_err &= ~UIC_ERROR;
5902                 /* clear NAC error */
5903                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5904                 if (!hba->saved_uic_err)
5905                         err_handling = false;
5906         }
5907 out:
5908         spin_unlock_irqrestore(hba->host->host_lock, flags);
5909         return err_handling;
5910 }
5911
5912 /* host lock must be held before calling this func */
5913 static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
5914 {
5915         return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
5916                (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
5917 }
5918
5919 /* host lock must be held before calling this func */
5920 static inline void ufshcd_schedule_eh_work(struct ufs_hba *hba)
5921 {
5922         /* handle fatal errors only when link is not in error state */
5923         if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
5924                 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
5925                     ufshcd_is_saved_err_fatal(hba))
5926                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
5927                 else
5928                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
5929                 queue_work(hba->eh_wq, &hba->eh_work);
5930         }
5931 }
5932
5933 static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5934 {
5935         down_write(&hba->clk_scaling_lock);
5936         hba->clk_scaling.is_allowed = allow;
5937         up_write(&hba->clk_scaling_lock);
5938 }
5939
5940 static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5941 {
5942         if (suspend) {
5943                 if (hba->clk_scaling.is_enabled)
5944                         ufshcd_suspend_clkscaling(hba);
5945                 ufshcd_clk_scaling_allow(hba, false);
5946         } else {
5947                 ufshcd_clk_scaling_allow(hba, true);
5948                 if (hba->clk_scaling.is_enabled)
5949                         ufshcd_resume_clkscaling(hba);
5950         }
5951 }
5952
5953 static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5954 {
5955         ufshcd_rpm_get_sync(hba);
5956         if (pm_runtime_status_suspended(&hba->sdev_ufs_device->sdev_gendev) ||
5957             hba->is_sys_suspended) {
5958                 enum ufs_pm_op pm_op;
5959
5960                 /*
5961                  * Don't assume anything of resume, if
5962                  * resume fails, irq and clocks can be OFF, and powers
5963                  * can be OFF or in LPM.
5964                  */
5965                 ufshcd_setup_hba_vreg(hba, true);
5966                 ufshcd_enable_irq(hba);
5967                 ufshcd_setup_vreg(hba, true);
5968                 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5969                 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5970                 ufshcd_hold(hba, false);
5971                 if (!ufshcd_is_clkgating_allowed(hba))
5972                         ufshcd_setup_clocks(hba, true);
5973                 ufshcd_release(hba);
5974                 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5975                 ufshcd_vops_resume(hba, pm_op);
5976         } else {
5977                 ufshcd_hold(hba, false);
5978                 if (ufshcd_is_clkscaling_supported(hba) &&
5979                     hba->clk_scaling.is_enabled)
5980                         ufshcd_suspend_clkscaling(hba);
5981                 ufshcd_clk_scaling_allow(hba, false);
5982         }
5983         ufshcd_scsi_block_requests(hba);
5984         /* Drain ufshcd_queuecommand() */
5985         down_write(&hba->clk_scaling_lock);
5986         up_write(&hba->clk_scaling_lock);
5987         cancel_work_sync(&hba->eeh_work);
5988 }
5989
5990 static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5991 {
5992         ufshcd_scsi_unblock_requests(hba);
5993         ufshcd_release(hba);
5994         if (ufshcd_is_clkscaling_supported(hba))
5995                 ufshcd_clk_scaling_suspend(hba, false);
5996         ufshcd_clear_ua_wluns(hba);
5997         ufshcd_rpm_put(hba);
5998 }
5999
6000 static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
6001 {
6002         return (!hba->is_powered || hba->shutting_down ||
6003                 !hba->sdev_ufs_device ||
6004                 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
6005                 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
6006                    ufshcd_is_link_broken(hba))));
6007 }
6008
6009 #ifdef CONFIG_PM
6010 static void ufshcd_recover_pm_error(struct ufs_hba *hba)
6011 {
6012         struct Scsi_Host *shost = hba->host;
6013         struct scsi_device *sdev;
6014         struct request_queue *q;
6015         int ret;
6016
6017         hba->is_sys_suspended = false;
6018         /*
6019          * Set RPM status of wlun device to RPM_ACTIVE,
6020          * this also clears its runtime error.
6021          */
6022         ret = pm_runtime_set_active(&hba->sdev_ufs_device->sdev_gendev);
6023
6024         /* hba device might have a runtime error otherwise */
6025         if (ret)
6026                 ret = pm_runtime_set_active(hba->dev);
6027         /*
6028          * If wlun device had runtime error, we also need to resume those
6029          * consumer scsi devices in case any of them has failed to be
6030          * resumed due to supplier runtime resume failure. This is to unblock
6031          * blk_queue_enter in case there are bios waiting inside it.
6032          */
6033         if (!ret) {
6034                 shost_for_each_device(sdev, shost) {
6035                         q = sdev->request_queue;
6036                         if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
6037                                        q->rpm_status == RPM_SUSPENDING))
6038                                 pm_request_resume(q->dev);
6039                 }
6040         }
6041 }
6042 #else
6043 static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
6044 {
6045 }
6046 #endif
6047
6048 static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
6049 {
6050         struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
6051         u32 mode;
6052
6053         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6054
6055         if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
6056                 return true;
6057
6058         if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
6059                 return true;
6060
6061         return false;
6062 }
6063
6064 /**
6065  * ufshcd_err_handler - handle UFS errors that require s/w attention
6066  * @work: pointer to work structure
6067  */
6068 static void ufshcd_err_handler(struct work_struct *work)
6069 {
6070         struct ufs_hba *hba;
6071         unsigned long flags;
6072         bool err_xfer = false;
6073         bool err_tm = false;
6074         int err = 0, pmc_err;
6075         int tag;
6076         bool needs_reset = false, needs_restore = false;
6077
6078         hba = container_of(work, struct ufs_hba, eh_work);
6079
6080         down(&hba->host_sem);
6081         spin_lock_irqsave(hba->host->host_lock, flags);
6082         if (ufshcd_err_handling_should_stop(hba)) {
6083                 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6084                         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6085                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6086                 up(&hba->host_sem);
6087                 return;
6088         }
6089         ufshcd_set_eh_in_progress(hba);
6090         spin_unlock_irqrestore(hba->host->host_lock, flags);
6091         ufshcd_err_handling_prepare(hba);
6092         /* Complete requests that have door-bell cleared by h/w */
6093         ufshcd_complete_requests(hba);
6094         spin_lock_irqsave(hba->host->host_lock, flags);
6095         if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6096                 hba->ufshcd_state = UFSHCD_STATE_RESET;
6097         /*
6098          * A full reset and restore might have happened after preparation
6099          * is finished, double check whether we should stop.
6100          */
6101         if (ufshcd_err_handling_should_stop(hba))
6102                 goto skip_err_handling;
6103
6104         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6105                 bool ret;
6106
6107                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6108                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6109                 ret = ufshcd_quirk_dl_nac_errors(hba);
6110                 spin_lock_irqsave(hba->host->host_lock, flags);
6111                 if (!ret && ufshcd_err_handling_should_stop(hba))
6112                         goto skip_err_handling;
6113         }
6114
6115         if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6116             (hba->saved_uic_err &&
6117              (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6118                 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
6119
6120                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6121                 ufshcd_print_host_state(hba);
6122                 ufshcd_print_pwr_info(hba);
6123                 ufshcd_print_evt_hist(hba);
6124                 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
6125                 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
6126                 spin_lock_irqsave(hba->host->host_lock, flags);
6127         }
6128
6129         /*
6130          * if host reset is required then skip clearing the pending
6131          * transfers forcefully because they will get cleared during
6132          * host reset and restore
6133          */
6134         if (hba->force_reset || ufshcd_is_link_broken(hba) ||
6135             ufshcd_is_saved_err_fatal(hba) ||
6136             ((hba->saved_err & UIC_ERROR) &&
6137              (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6138                                     UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
6139                 needs_reset = true;
6140                 goto do_reset;
6141         }
6142
6143         /*
6144          * If LINERESET was caught, UFS might have been put to PWM mode,
6145          * check if power mode restore is needed.
6146          */
6147         if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
6148                 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6149                 if (!hba->saved_uic_err)
6150                         hba->saved_err &= ~UIC_ERROR;
6151                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6152                 if (ufshcd_is_pwr_mode_restore_needed(hba))
6153                         needs_restore = true;
6154                 spin_lock_irqsave(hba->host->host_lock, flags);
6155                 if (!hba->saved_err && !needs_restore)
6156                         goto skip_err_handling;
6157         }
6158
6159         hba->silence_err_logs = true;
6160         /* release lock as clear command might sleep */
6161         spin_unlock_irqrestore(hba->host->host_lock, flags);
6162         /* Clear pending transfer requests */
6163         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
6164                 if (ufshcd_try_to_abort_task(hba, tag)) {
6165                         err_xfer = true;
6166                         goto lock_skip_pending_xfer_clear;
6167                 }
6168         }
6169
6170         /* Clear pending task management requests */
6171         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6172                 if (ufshcd_clear_tm_cmd(hba, tag)) {
6173                         err_tm = true;
6174                         goto lock_skip_pending_xfer_clear;
6175                 }
6176         }
6177
6178 lock_skip_pending_xfer_clear:
6179         /* Complete the requests that are cleared by s/w */
6180         ufshcd_complete_requests(hba);
6181
6182         spin_lock_irqsave(hba->host->host_lock, flags);
6183         hba->silence_err_logs = false;
6184         if (err_xfer || err_tm) {
6185                 needs_reset = true;
6186                 goto do_reset;
6187         }
6188
6189         /*
6190          * After all reqs and tasks are cleared from doorbell,
6191          * now it is safe to retore power mode.
6192          */
6193         if (needs_restore) {
6194                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6195                 /*
6196                  * Hold the scaling lock just in case dev cmds
6197                  * are sent via bsg and/or sysfs.
6198                  */
6199                 down_write(&hba->clk_scaling_lock);
6200                 hba->force_pmc = true;
6201                 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6202                 if (pmc_err) {
6203                         needs_reset = true;
6204                         dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6205                                         __func__, pmc_err);
6206                 }
6207                 hba->force_pmc = false;
6208                 ufshcd_print_pwr_info(hba);
6209                 up_write(&hba->clk_scaling_lock);
6210                 spin_lock_irqsave(hba->host->host_lock, flags);
6211         }
6212
6213 do_reset:
6214         /* Fatal errors need reset */
6215         if (needs_reset) {
6216                 hba->force_reset = false;
6217                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6218                 err = ufshcd_reset_and_restore(hba);
6219                 if (err)
6220                         dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6221                                         __func__, err);
6222                 else
6223                         ufshcd_recover_pm_error(hba);
6224                 spin_lock_irqsave(hba->host->host_lock, flags);
6225         }
6226
6227 skip_err_handling:
6228         if (!needs_reset) {
6229                 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6230                         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6231                 if (hba->saved_err || hba->saved_uic_err)
6232                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6233                             __func__, hba->saved_err, hba->saved_uic_err);
6234         }
6235         ufshcd_clear_eh_in_progress(hba);
6236         spin_unlock_irqrestore(hba->host->host_lock, flags);
6237         ufshcd_err_handling_unprepare(hba);
6238         up(&hba->host_sem);
6239 }
6240
6241 /**
6242  * ufshcd_update_uic_error - check and set fatal UIC error flags.
6243  * @hba: per-adapter instance
6244  *
6245  * Returns
6246  *  IRQ_HANDLED - If interrupt is valid
6247  *  IRQ_NONE    - If invalid interrupt
6248  */
6249 static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
6250 {
6251         u32 reg;
6252         irqreturn_t retval = IRQ_NONE;
6253
6254         /* PHY layer error */
6255         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
6256         if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
6257             (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
6258                 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
6259                 /*
6260                  * To know whether this error is fatal or not, DB timeout
6261                  * must be checked but this error is handled separately.
6262                  */
6263                 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6264                         dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6265                                         __func__);
6266
6267                 /* Got a LINERESET indication. */
6268                 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6269                         struct uic_command *cmd = NULL;
6270
6271                         hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6272                         if (hba->uic_async_done && hba->active_uic_cmd)
6273                                 cmd = hba->active_uic_cmd;
6274                         /*
6275                          * Ignore the LINERESET during power mode change
6276                          * operation via DME_SET command.
6277                          */
6278                         if (cmd && (cmd->command == UIC_CMD_DME_SET))
6279                                 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6280                 }
6281                 retval |= IRQ_HANDLED;
6282         }
6283
6284         /* PA_INIT_ERROR is fatal and needs UIC reset */
6285         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
6286         if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6287             (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
6288                 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
6289
6290                 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6291                         hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6292                 else if (hba->dev_quirks &
6293                                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6294                         if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6295                                 hba->uic_error |=
6296                                         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6297                         else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6298                                 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6299                 }
6300                 retval |= IRQ_HANDLED;
6301         }
6302
6303         /* UIC NL/TL/DME errors needs software retry */
6304         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
6305         if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6306             (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
6307                 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
6308                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
6309                 retval |= IRQ_HANDLED;
6310         }
6311
6312         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
6313         if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6314             (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
6315                 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
6316                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
6317                 retval |= IRQ_HANDLED;
6318         }
6319
6320         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
6321         if ((reg & UIC_DME_ERROR) &&
6322             (reg & UIC_DME_ERROR_CODE_MASK)) {
6323                 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
6324                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
6325                 retval |= IRQ_HANDLED;
6326         }
6327
6328         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6329                         __func__, hba->uic_error);
6330         return retval;
6331 }
6332
6333 /**
6334  * ufshcd_check_errors - Check for errors that need s/w attention
6335  * @hba: per-adapter instance
6336  * @intr_status: interrupt status generated by the controller
6337  *
6338  * Returns
6339  *  IRQ_HANDLED - If interrupt is valid
6340  *  IRQ_NONE    - If invalid interrupt
6341  */
6342 static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba, u32 intr_status)
6343 {
6344         bool queue_eh_work = false;
6345         irqreturn_t retval = IRQ_NONE;
6346
6347         spin_lock(hba->host->host_lock);
6348         hba->errors |= UFSHCD_ERROR_MASK & intr_status;
6349
6350         if (hba->errors & INT_FATAL_ERRORS) {
6351                 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6352                                        hba->errors);
6353                 queue_eh_work = true;
6354         }
6355
6356         if (hba->errors & UIC_ERROR) {
6357                 hba->uic_error = 0;
6358                 retval = ufshcd_update_uic_error(hba);
6359                 if (hba->uic_error)
6360                         queue_eh_work = true;
6361         }
6362
6363         if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6364                 dev_err(hba->dev,
6365                         "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6366                         __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6367                         "Enter" : "Exit",
6368                         hba->errors, ufshcd_get_upmcrs(hba));
6369                 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
6370                                        hba->errors);
6371                 ufshcd_set_link_broken(hba);
6372                 queue_eh_work = true;
6373         }
6374
6375         if (queue_eh_work) {
6376                 /*
6377                  * update the transfer error masks to sticky bits, let's do this
6378                  * irrespective of current ufshcd_state.
6379                  */
6380                 hba->saved_err |= hba->errors;
6381                 hba->saved_uic_err |= hba->uic_error;
6382
6383                 /* dump controller state before resetting */
6384                 if ((hba->saved_err &
6385                      (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6386                     (hba->saved_uic_err &&
6387                      (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6388                         dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
6389                                         __func__, hba->saved_err,
6390                                         hba->saved_uic_err);
6391                         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6392                                          "host_regs: ");
6393                         ufshcd_print_pwr_info(hba);
6394                 }
6395                 ufshcd_schedule_eh_work(hba);
6396                 retval |= IRQ_HANDLED;
6397         }
6398         /*
6399          * if (!queue_eh_work) -
6400          * Other errors are either non-fatal where host recovers
6401          * itself without s/w intervention or errors that will be
6402          * handled by the SCSI core layer.
6403          */
6404         hba->errors = 0;
6405         hba->uic_error = 0;
6406         spin_unlock(hba->host->host_lock);
6407         return retval;
6408 }
6409
6410 struct ctm_info {
6411         struct ufs_hba  *hba;
6412         unsigned long   pending;
6413         unsigned int    ncpl;
6414 };
6415
6416 static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
6417 {
6418         struct ctm_info *const ci = priv;
6419         struct completion *c;
6420
6421         WARN_ON_ONCE(reserved);
6422         if (test_bit(req->tag, &ci->pending))
6423                 return true;
6424         ci->ncpl++;
6425         c = req->end_io_data;
6426         if (c)
6427                 complete(c);
6428         return true;
6429 }
6430
6431 /**
6432  * ufshcd_tmc_handler - handle task management function completion
6433  * @hba: per adapter instance
6434  *
6435  * Returns
6436  *  IRQ_HANDLED - If interrupt is valid
6437  *  IRQ_NONE    - If invalid interrupt
6438  */
6439 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
6440 {
6441         unsigned long flags;
6442         struct request_queue *q = hba->tmf_queue;
6443         struct ctm_info ci = {
6444                 .hba     = hba,
6445         };
6446
6447         spin_lock_irqsave(hba->host->host_lock, flags);
6448         ci.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
6449         blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
6450         spin_unlock_irqrestore(hba->host->host_lock, flags);
6451
6452         return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
6453 }
6454
6455 /**
6456  * ufshcd_sl_intr - Interrupt service routine
6457  * @hba: per adapter instance
6458  * @intr_status: contains interrupts generated by the controller
6459  *
6460  * Returns
6461  *  IRQ_HANDLED - If interrupt is valid
6462  *  IRQ_NONE    - If invalid interrupt
6463  */
6464 static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
6465 {
6466         irqreturn_t retval = IRQ_NONE;
6467
6468         if (intr_status & UFSHCD_UIC_MASK)
6469                 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
6470
6471         if (intr_status & UFSHCD_ERROR_MASK || hba->errors)
6472                 retval |= ufshcd_check_errors(hba, intr_status);
6473
6474         if (intr_status & UTP_TASK_REQ_COMPL)
6475                 retval |= ufshcd_tmc_handler(hba);
6476
6477         if (intr_status & UTP_TRANSFER_REQ_COMPL)
6478                 retval |= ufshcd_trc_handler(hba, ufshcd_has_utrlcnr(hba));
6479
6480         return retval;
6481 }
6482
6483 /**
6484  * ufshcd_intr - Main interrupt service routine
6485  * @irq: irq number
6486  * @__hba: pointer to adapter instance
6487  *
6488  * Returns
6489  *  IRQ_HANDLED - If interrupt is valid
6490  *  IRQ_NONE    - If invalid interrupt
6491  */
6492 static irqreturn_t ufshcd_intr(int irq, void *__hba)
6493 {
6494         u32 intr_status, enabled_intr_status = 0;
6495         irqreturn_t retval = IRQ_NONE;
6496         struct ufs_hba *hba = __hba;
6497         int retries = hba->nutrs;
6498
6499         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6500         hba->ufs_stats.last_intr_status = intr_status;
6501         hba->ufs_stats.last_intr_ts = ktime_get();
6502
6503         /*
6504          * There could be max of hba->nutrs reqs in flight and in worst case
6505          * if the reqs get finished 1 by 1 after the interrupt status is
6506          * read, make sure we handle them by checking the interrupt status
6507          * again in a loop until we process all of the reqs before returning.
6508          */
6509         while (intr_status && retries--) {
6510                 enabled_intr_status =
6511                         intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
6512                 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
6513                 if (enabled_intr_status)
6514                         retval |= ufshcd_sl_intr(hba, enabled_intr_status);
6515
6516                 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6517         }
6518
6519         if (enabled_intr_status && retval == IRQ_NONE &&
6520             (!(enabled_intr_status & UTP_TRANSFER_REQ_COMPL) ||
6521              hba->outstanding_reqs) && !ufshcd_eh_in_progress(hba)) {
6522                 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6523                                         __func__,
6524                                         intr_status,
6525                                         hba->ufs_stats.last_intr_status,
6526                                         enabled_intr_status);
6527                 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6528         }
6529
6530         return retval;
6531 }
6532
6533 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6534 {
6535         int err = 0;
6536         u32 mask = 1 << tag;
6537         unsigned long flags;
6538
6539         if (!test_bit(tag, &hba->outstanding_tasks))
6540                 goto out;
6541
6542         spin_lock_irqsave(hba->host->host_lock, flags);
6543         ufshcd_utmrl_clear(hba, tag);
6544         spin_unlock_irqrestore(hba->host->host_lock, flags);
6545
6546         /* poll for max. 1 sec to clear door bell register by h/w */
6547         err = ufshcd_wait_for_register(hba,
6548                         REG_UTP_TASK_REQ_DOOR_BELL,
6549                         mask, 0, 1000, 1000);
6550 out:
6551         return err;
6552 }
6553
6554 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6555                 struct utp_task_req_desc *treq, u8 tm_function)
6556 {
6557         struct request_queue *q = hba->tmf_queue;
6558         struct Scsi_Host *host = hba->host;
6559         DECLARE_COMPLETION_ONSTACK(wait);
6560         struct request *req;
6561         unsigned long flags;
6562         int task_tag, err;
6563
6564         /*
6565          * blk_get_request() is used here only to get a free tag.
6566          */
6567         req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6568         if (IS_ERR(req))
6569                 return PTR_ERR(req);
6570
6571         req->end_io_data = &wait;
6572         ufshcd_hold(hba, false);
6573
6574         spin_lock_irqsave(host->host_lock, flags);
6575         blk_mq_start_request(req);
6576
6577         task_tag = req->tag;
6578         treq->upiu_req.req_header.dword_0 |= cpu_to_be32(task_tag);
6579
6580         memcpy(hba->utmrdl_base_addr + task_tag, treq, sizeof(*treq));
6581         ufshcd_vops_setup_task_mgmt(hba, task_tag, tm_function);
6582
6583         /* send command to the controller */
6584         __set_bit(task_tag, &hba->outstanding_tasks);
6585
6586         /* Make sure descriptors are ready before ringing the task doorbell */
6587         wmb();
6588
6589         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TASK_REQ_DOOR_BELL);
6590         /* Make sure that doorbell is committed immediately */
6591         wmb();
6592
6593         spin_unlock_irqrestore(host->host_lock, flags);
6594
6595         ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
6596
6597         /* wait until the task management command is completed */
6598         err = wait_for_completion_io_timeout(&wait,
6599                         msecs_to_jiffies(TM_CMD_TIMEOUT));
6600         if (!err) {
6601                 /*
6602                  * Make sure that ufshcd_compl_tm() does not trigger a
6603                  * use-after-free.
6604                  */
6605                 req->end_io_data = NULL;
6606                 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
6607                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6608                                 __func__, tm_function);
6609                 if (ufshcd_clear_tm_cmd(hba, task_tag))
6610                         dev_WARN(hba->dev, "%s: unable to clear tm cmd (slot %d) after timeout\n",
6611                                         __func__, task_tag);
6612                 err = -ETIMEDOUT;
6613         } else {
6614                 err = 0;
6615                 memcpy(treq, hba->utmrdl_base_addr + task_tag, sizeof(*treq));
6616
6617                 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
6618         }
6619
6620         spin_lock_irqsave(hba->host->host_lock, flags);
6621         __clear_bit(task_tag, &hba->outstanding_tasks);
6622         spin_unlock_irqrestore(hba->host->host_lock, flags);
6623
6624         ufshcd_release(hba);
6625         blk_put_request(req);
6626
6627         return err;
6628 }
6629
6630 /**
6631  * ufshcd_issue_tm_cmd - issues task management commands to controller
6632  * @hba: per adapter instance
6633  * @lun_id: LUN ID to which TM command is sent
6634  * @task_id: task ID to which the TM command is applicable
6635  * @tm_function: task management function opcode
6636  * @tm_response: task management service response return value
6637  *
6638  * Returns non-zero value on error, zero on success.
6639  */
6640 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6641                 u8 tm_function, u8 *tm_response)
6642 {
6643         struct utp_task_req_desc treq = { { 0 }, };
6644         int ocs_value, err;
6645
6646         /* Configure task request descriptor */
6647         treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6648         treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6649
6650         /* Configure task request UPIU */
6651         treq.upiu_req.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6652                                   cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6653         treq.upiu_req.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6654
6655         /*
6656          * The host shall provide the same value for LUN field in the basic
6657          * header and for Input Parameter.
6658          */
6659         treq.upiu_req.input_param1 = cpu_to_be32(lun_id);
6660         treq.upiu_req.input_param2 = cpu_to_be32(task_id);
6661
6662         err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6663         if (err == -ETIMEDOUT)
6664                 return err;
6665
6666         ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6667         if (ocs_value != OCS_SUCCESS)
6668                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6669                                 __func__, ocs_value);
6670         else if (tm_response)
6671                 *tm_response = be32_to_cpu(treq.upiu_rsp.output_param1) &
6672                                 MASK_TM_SERVICE_RESP;
6673         return err;
6674 }
6675
6676 /**
6677  * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6678  * @hba:        per-adapter instance
6679  * @req_upiu:   upiu request
6680  * @rsp_upiu:   upiu reply
6681  * @desc_buff:  pointer to descriptor buffer, NULL if NA
6682  * @buff_len:   descriptor size, 0 if NA
6683  * @cmd_type:   specifies the type (NOP, Query...)
6684  * @desc_op:    descriptor operation
6685  *
6686  * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6687  * Therefore, it "rides" the device management infrastructure: uses its tag and
6688  * tasks work queues.
6689  *
6690  * Since there is only one available tag for device management commands,
6691  * the caller is expected to hold the hba->dev_cmd.lock mutex.
6692  */
6693 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6694                                         struct utp_upiu_req *req_upiu,
6695                                         struct utp_upiu_req *rsp_upiu,
6696                                         u8 *desc_buff, int *buff_len,
6697                                         enum dev_cmd_type cmd_type,
6698                                         enum query_opcode desc_op)
6699 {
6700         struct request_queue *q = hba->cmd_queue;
6701         struct request *req;
6702         struct ufshcd_lrb *lrbp;
6703         int err = 0;
6704         int tag;
6705         struct completion wait;
6706         u8 upiu_flags;
6707
6708         down_read(&hba->clk_scaling_lock);
6709
6710         req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6711         if (IS_ERR(req)) {
6712                 err = PTR_ERR(req);
6713                 goto out_unlock;
6714         }
6715         tag = req->tag;
6716         WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
6717
6718         if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
6719                 err = -EBUSY;
6720                 goto out;
6721         }
6722
6723         init_completion(&wait);
6724         lrbp = &hba->lrb[tag];
6725         WARN_ON(lrbp->cmd);
6726         lrbp->cmd = NULL;
6727         lrbp->sense_bufflen = 0;
6728         lrbp->sense_buffer = NULL;
6729         lrbp->task_tag = tag;
6730         lrbp->lun = 0;
6731         lrbp->intr_cmd = true;
6732         ufshcd_prepare_lrbp_crypto(NULL, lrbp);
6733         hba->dev_cmd.type = cmd_type;
6734
6735         if (hba->ufs_version <= ufshci_version(1, 1))
6736                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6737         else
6738                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6739
6740         /* update the task tag in the request upiu */
6741         req_upiu->header.dword_0 |= cpu_to_be32(tag);
6742
6743         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6744
6745         /* just copy the upiu request as it is */
6746         memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6747         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6748                 /* The Data Segment Area is optional depending upon the query
6749                  * function value. for WRITE DESCRIPTOR, the data segment
6750                  * follows right after the tsf.
6751                  */
6752                 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6753                 *buff_len = 0;
6754         }
6755
6756         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6757
6758         hba->dev_cmd.complete = &wait;
6759
6760         ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
6761         /* Make sure descriptors are ready before ringing the doorbell */
6762         wmb();
6763
6764         ufshcd_send_command(hba, tag);
6765         /*
6766          * ignore the returning value here - ufshcd_check_query_response is
6767          * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6768          * read the response directly ignoring all errors.
6769          */
6770         ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6771
6772         /* just copy the upiu response as it is */
6773         memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
6774         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6775                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6776                 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6777                                MASK_QUERY_DATA_SEG_LEN;
6778
6779                 if (*buff_len >= resp_len) {
6780                         memcpy(desc_buff, descp, resp_len);
6781                         *buff_len = resp_len;
6782                 } else {
6783                         dev_warn(hba->dev,
6784                                  "%s: rsp size %d is bigger than buffer size %d",
6785                                  __func__, resp_len, *buff_len);
6786                         *buff_len = 0;
6787                         err = -EINVAL;
6788                 }
6789         }
6790         ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
6791                                     (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
6792
6793 out:
6794         blk_put_request(req);
6795 out_unlock:
6796         up_read(&hba->clk_scaling_lock);
6797         return err;
6798 }
6799
6800 /**
6801  * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6802  * @hba:        per-adapter instance
6803  * @req_upiu:   upiu request
6804  * @rsp_upiu:   upiu reply - only 8 DW as we do not support scsi commands
6805  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
6806  * @desc_buff:  pointer to descriptor buffer, NULL if NA
6807  * @buff_len:   descriptor size, 0 if NA
6808  * @desc_op:    descriptor operation
6809  *
6810  * Supports UTP Transfer requests (nop and query), and UTP Task
6811  * Management requests.
6812  * It is up to the caller to fill the upiu conent properly, as it will
6813  * be copied without any further input validations.
6814  */
6815 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6816                              struct utp_upiu_req *req_upiu,
6817                              struct utp_upiu_req *rsp_upiu,
6818                              int msgcode,
6819                              u8 *desc_buff, int *buff_len,
6820                              enum query_opcode desc_op)
6821 {
6822         int err;
6823         enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
6824         struct utp_task_req_desc treq = { { 0 }, };
6825         int ocs_value;
6826         u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6827
6828         switch (msgcode) {
6829         case UPIU_TRANSACTION_NOP_OUT:
6830                 cmd_type = DEV_CMD_TYPE_NOP;
6831                 fallthrough;
6832         case UPIU_TRANSACTION_QUERY_REQ:
6833                 ufshcd_hold(hba, false);
6834                 mutex_lock(&hba->dev_cmd.lock);
6835                 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6836                                                    desc_buff, buff_len,
6837                                                    cmd_type, desc_op);
6838                 mutex_unlock(&hba->dev_cmd.lock);
6839                 ufshcd_release(hba);
6840
6841                 break;
6842         case UPIU_TRANSACTION_TASK_REQ:
6843                 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6844                 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6845
6846                 memcpy(&treq.upiu_req, req_upiu, sizeof(*req_upiu));
6847
6848                 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6849                 if (err == -ETIMEDOUT)
6850                         break;
6851
6852                 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6853                 if (ocs_value != OCS_SUCCESS) {
6854                         dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6855                                 ocs_value);
6856                         break;
6857                 }
6858
6859                 memcpy(rsp_upiu, &treq.upiu_rsp, sizeof(*rsp_upiu));
6860
6861                 break;
6862         default:
6863                 err = -EINVAL;
6864
6865                 break;
6866         }
6867
6868         return err;
6869 }
6870
6871 /**
6872  * ufshcd_eh_device_reset_handler - device reset handler registered to
6873  *                                    scsi layer.
6874  * @cmd: SCSI command pointer
6875  *
6876  * Returns SUCCESS/FAILED
6877  */
6878 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6879 {
6880         struct Scsi_Host *host;
6881         struct ufs_hba *hba;
6882         u32 pos;
6883         int err;
6884         u8 resp = 0xF, lun;
6885
6886         host = cmd->device->host;
6887         hba = shost_priv(host);
6888
6889         lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6890         err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
6891         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6892                 if (!err)
6893                         err = resp;
6894                 goto out;
6895         }
6896
6897         /* clear the commands that were pending for corresponding LUN */
6898         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6899                 if (hba->lrb[pos].lun == lun) {
6900                         err = ufshcd_clear_cmd(hba, pos);
6901                         if (err)
6902                                 break;
6903                         __ufshcd_transfer_req_compl(hba, pos);
6904                 }
6905         }
6906
6907 out:
6908         hba->req_abort_count = 0;
6909         ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
6910         if (!err) {
6911                 err = SUCCESS;
6912         } else {
6913                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6914                 err = FAILED;
6915         }
6916         return err;
6917 }
6918
6919 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6920 {
6921         struct ufshcd_lrb *lrbp;
6922         int tag;
6923
6924         for_each_set_bit(tag, &bitmap, hba->nutrs) {
6925                 lrbp = &hba->lrb[tag];
6926                 lrbp->req_abort_skip = true;
6927         }
6928 }
6929
6930 /**
6931  * ufshcd_try_to_abort_task - abort a specific task
6932  * @hba: Pointer to adapter instance
6933  * @tag: Task tag/index to be aborted
6934  *
6935  * Abort the pending command in device by sending UFS_ABORT_TASK task management
6936  * command, and in host controller by clearing the door-bell register. There can
6937  * be race between controller sending the command to the device while abort is
6938  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6939  * really issued and then try to abort it.
6940  *
6941  * Returns zero on success, non-zero on failure
6942  */
6943 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6944 {
6945         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6946         int err = 0;
6947         int poll_cnt;
6948         u8 resp = 0xF;
6949         u32 reg;
6950
6951         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6952                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6953                                 UFS_QUERY_TASK, &resp);
6954                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6955                         /* cmd pending in the device */
6956                         dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6957                                 __func__, tag);
6958                         break;
6959                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6960                         /*
6961                          * cmd not pending in the device, check if it is
6962                          * in transition.
6963                          */
6964                         dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6965                                 __func__, tag);
6966                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6967                         if (reg & (1 << tag)) {
6968                                 /* sleep for max. 200us to stabilize */
6969                                 usleep_range(100, 200);
6970                                 continue;
6971                         }
6972                         /* command completed already */
6973                         dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6974                                 __func__, tag);
6975                         goto out;
6976                 } else {
6977                         dev_err(hba->dev,
6978                                 "%s: no response from device. tag = %d, err %d\n",
6979                                 __func__, tag, err);
6980                         if (!err)
6981                                 err = resp; /* service response error */
6982                         goto out;
6983                 }
6984         }
6985
6986         if (!poll_cnt) {
6987                 err = -EBUSY;
6988                 goto out;
6989         }
6990
6991         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6992                         UFS_ABORT_TASK, &resp);
6993         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6994                 if (!err) {
6995                         err = resp; /* service response error */
6996                         dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6997                                 __func__, tag, err);
6998                 }
6999                 goto out;
7000         }
7001
7002         err = ufshcd_clear_cmd(hba, tag);
7003         if (err)
7004                 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
7005                         __func__, tag, err);
7006
7007 out:
7008         return err;
7009 }
7010
7011 /**
7012  * ufshcd_abort - scsi host template eh_abort_handler callback
7013  * @cmd: SCSI command pointer
7014  *
7015  * Returns SUCCESS/FAILED
7016  */
7017 static int ufshcd_abort(struct scsi_cmnd *cmd)
7018 {
7019         struct Scsi_Host *host;
7020         struct ufs_hba *hba;
7021         unsigned long flags;
7022         unsigned int tag;
7023         int err = 0;
7024         struct ufshcd_lrb *lrbp;
7025         u32 reg;
7026
7027         host = cmd->device->host;
7028         hba = shost_priv(host);
7029         tag = cmd->request->tag;
7030         lrbp = &hba->lrb[tag];
7031         if (!ufshcd_valid_tag(hba, tag)) {
7032                 dev_err(hba->dev,
7033                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
7034                         __func__, tag, cmd, cmd->request);
7035                 BUG();
7036         }
7037
7038         ufshcd_hold(hba, false);
7039         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
7040         /* If command is already aborted/completed, return SUCCESS */
7041         if (!(test_bit(tag, &hba->outstanding_reqs))) {
7042                 dev_err(hba->dev,
7043                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
7044                         __func__, tag, hba->outstanding_reqs, reg);
7045                 goto out;
7046         }
7047
7048         /* Print Transfer Request of aborted task */
7049         dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
7050
7051         /*
7052          * Print detailed info about aborted request.
7053          * As more than one request might get aborted at the same time,
7054          * print full information only for the first aborted request in order
7055          * to reduce repeated printouts. For other aborted requests only print
7056          * basic details.
7057          */
7058         scsi_print_command(cmd);
7059         if (!hba->req_abort_count) {
7060                 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
7061                 ufshcd_print_evt_hist(hba);
7062                 ufshcd_print_host_state(hba);
7063                 ufshcd_print_pwr_info(hba);
7064                 ufshcd_print_trs(hba, 1 << tag, true);
7065         } else {
7066                 ufshcd_print_trs(hba, 1 << tag, false);
7067         }
7068         hba->req_abort_count++;
7069
7070         if (!(reg & (1 << tag))) {
7071                 dev_err(hba->dev,
7072                 "%s: cmd was completed, but without a notifying intr, tag = %d",
7073                 __func__, tag);
7074                 goto cleanup;
7075         }
7076
7077         /*
7078          * Task abort to the device W-LUN is illegal. When this command
7079          * will fail, due to spec violation, scsi err handling next step
7080          * will be to send LU reset which, again, is a spec violation.
7081          * To avoid these unnecessary/illegal steps, first we clean up
7082          * the lrb taken by this cmd and re-set it in outstanding_reqs,
7083          * then queue the eh_work and bail.
7084          */
7085         if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
7086                 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
7087                 __ufshcd_transfer_req_compl(hba, (1UL << tag));
7088                 set_bit(tag, &hba->outstanding_reqs);
7089                 spin_lock_irqsave(host->host_lock, flags);
7090                 hba->force_reset = true;
7091                 ufshcd_schedule_eh_work(hba);
7092                 spin_unlock_irqrestore(host->host_lock, flags);
7093                 goto out;
7094         }
7095
7096         /* Skip task abort in case previous aborts failed and report failure */
7097         if (lrbp->req_abort_skip)
7098                 err = -EIO;
7099         else
7100                 err = ufshcd_try_to_abort_task(hba, tag);
7101
7102         if (!err) {
7103 cleanup:
7104                 __ufshcd_transfer_req_compl(hba, (1UL << tag));
7105 out:
7106                 err = SUCCESS;
7107         } else {
7108                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
7109                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7110                 err = FAILED;
7111         }
7112
7113         /*
7114          * This ufshcd_release() corresponds to the original scsi cmd that got
7115          * aborted here (as we won't get any IRQ for it).
7116          */
7117         ufshcd_release(hba);
7118         return err;
7119 }
7120
7121 /**
7122  * ufshcd_host_reset_and_restore - reset and restore host controller
7123  * @hba: per-adapter instance
7124  *
7125  * Note that host controller reset may issue DME_RESET to
7126  * local and remote (device) Uni-Pro stack and the attributes
7127  * are reset to default state.
7128  *
7129  * Returns zero on success, non-zero on failure
7130  */
7131 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7132 {
7133         int err;
7134
7135         /*
7136          * Stop the host controller and complete the requests
7137          * cleared by h/w
7138          */
7139         ufshpb_reset_host(hba);
7140         ufshcd_hba_stop(hba);
7141         hba->silence_err_logs = true;
7142         ufshcd_complete_requests(hba);
7143         hba->silence_err_logs = false;
7144
7145         /* scale up clocks to max frequency before full reinitialization */
7146         ufshcd_set_clk_freq(hba, true);
7147
7148         err = ufshcd_hba_enable(hba);
7149
7150         /* Establish the link again and restore the device */
7151         if (!err)
7152                 err = ufshcd_probe_hba(hba, false);
7153
7154         if (err)
7155                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
7156         ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
7157         return err;
7158 }
7159
7160 /**
7161  * ufshcd_reset_and_restore - reset and re-initialize host/device
7162  * @hba: per-adapter instance
7163  *
7164  * Reset and recover device, host and re-establish link. This
7165  * is helpful to recover the communication in fatal error conditions.
7166  *
7167  * Returns zero on success, non-zero on failure
7168  */
7169 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7170 {
7171         u32 saved_err;
7172         u32 saved_uic_err;
7173         int err = 0;
7174         unsigned long flags;
7175         int retries = MAX_HOST_RESET_RETRIES;
7176
7177         /*
7178          * This is a fresh start, cache and clear saved error first,
7179          * in case new error generated during reset and restore.
7180          */
7181         spin_lock_irqsave(hba->host->host_lock, flags);
7182         saved_err = hba->saved_err;
7183         saved_uic_err = hba->saved_uic_err;
7184         hba->saved_err = 0;
7185         hba->saved_uic_err = 0;
7186         spin_unlock_irqrestore(hba->host->host_lock, flags);
7187
7188         do {
7189                 /* Reset the attached device */
7190                 ufshcd_device_reset(hba);
7191
7192                 err = ufshcd_host_reset_and_restore(hba);
7193         } while (err && --retries);
7194
7195         spin_lock_irqsave(hba->host->host_lock, flags);
7196         /*
7197          * Inform scsi mid-layer that we did reset and allow to handle
7198          * Unit Attention properly.
7199          */
7200         scsi_report_bus_reset(hba->host, 0);
7201         if (err) {
7202                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7203                 hba->saved_err |= saved_err;
7204                 hba->saved_uic_err |= saved_uic_err;
7205         }
7206         spin_unlock_irqrestore(hba->host->host_lock, flags);
7207
7208         return err;
7209 }
7210
7211 /**
7212  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
7213  * @cmd: SCSI command pointer
7214  *
7215  * Returns SUCCESS/FAILED
7216  */
7217 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7218 {
7219         int err = SUCCESS;
7220         unsigned long flags;
7221         struct ufs_hba *hba;
7222
7223         hba = shost_priv(cmd->device->host);
7224
7225         spin_lock_irqsave(hba->host->host_lock, flags);
7226         hba->force_reset = true;
7227         ufshcd_schedule_eh_work(hba);
7228         dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
7229         spin_unlock_irqrestore(hba->host->host_lock, flags);
7230
7231         flush_work(&hba->eh_work);
7232
7233         spin_lock_irqsave(hba->host->host_lock, flags);
7234         if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
7235                 err = FAILED;
7236         spin_unlock_irqrestore(hba->host->host_lock, flags);
7237
7238         return err;
7239 }
7240
7241 /**
7242  * ufshcd_get_max_icc_level - calculate the ICC level
7243  * @sup_curr_uA: max. current supported by the regulator
7244  * @start_scan: row at the desc table to start scan from
7245  * @buff: power descriptor buffer
7246  *
7247  * Returns calculated max ICC level for specific regulator
7248  */
7249 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7250 {
7251         int i;
7252         int curr_uA;
7253         u16 data;
7254         u16 unit;
7255
7256         for (i = start_scan; i >= 0; i--) {
7257                 data = be16_to_cpup((__be16 *)&buff[2 * i]);
7258                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7259                                                 ATTR_ICC_LVL_UNIT_OFFSET;
7260                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7261                 switch (unit) {
7262                 case UFSHCD_NANO_AMP:
7263                         curr_uA = curr_uA / 1000;
7264                         break;
7265                 case UFSHCD_MILI_AMP:
7266                         curr_uA = curr_uA * 1000;
7267                         break;
7268                 case UFSHCD_AMP:
7269                         curr_uA = curr_uA * 1000 * 1000;
7270                         break;
7271                 case UFSHCD_MICRO_AMP:
7272                 default:
7273                         break;
7274                 }
7275                 if (sup_curr_uA >= curr_uA)
7276                         break;
7277         }
7278         if (i < 0) {
7279                 i = 0;
7280                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7281         }
7282
7283         return (u32)i;
7284 }
7285
7286 /**
7287  * ufshcd_find_max_sup_active_icc_level - calculate the max ICC level
7288  * In case regulators are not initialized we'll return 0
7289  * @hba: per-adapter instance
7290  * @desc_buf: power descriptor buffer to extract ICC levels from.
7291  * @len: length of desc_buff
7292  *
7293  * Returns calculated ICC level
7294  */
7295 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7296                                                         u8 *desc_buf, int len)
7297 {
7298         u32 icc_level = 0;
7299
7300         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7301                                                 !hba->vreg_info.vccq2) {
7302                 dev_err(hba->dev,
7303                         "%s: Regulator capability was not set, actvIccLevel=%d",
7304                                                         __func__, icc_level);
7305                 goto out;
7306         }
7307
7308         if (hba->vreg_info.vcc->max_uA)
7309                 icc_level = ufshcd_get_max_icc_level(
7310                                 hba->vreg_info.vcc->max_uA,
7311                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7312                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7313
7314         if (hba->vreg_info.vccq->max_uA)
7315                 icc_level = ufshcd_get_max_icc_level(
7316                                 hba->vreg_info.vccq->max_uA,
7317                                 icc_level,
7318                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7319
7320         if (hba->vreg_info.vccq2->max_uA)
7321                 icc_level = ufshcd_get_max_icc_level(
7322                                 hba->vreg_info.vccq2->max_uA,
7323                                 icc_level,
7324                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7325 out:
7326         return icc_level;
7327 }
7328
7329 static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
7330 {
7331         int ret;
7332         int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
7333         u8 *desc_buf;
7334         u32 icc_level;
7335
7336         desc_buf = kmalloc(buff_len, GFP_KERNEL);
7337         if (!desc_buf)
7338                 return;
7339
7340         ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7341                                      desc_buf, buff_len);
7342         if (ret) {
7343                 dev_err(hba->dev,
7344                         "%s: Failed reading power descriptor.len = %d ret = %d",
7345                         __func__, buff_len, ret);
7346                 goto out;
7347         }
7348
7349         icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7350                                                          buff_len);
7351         dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
7352
7353         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7354                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
7355
7356         if (ret)
7357                 dev_err(hba->dev,
7358                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
7359                         __func__, icc_level, ret);
7360
7361 out:
7362         kfree(desc_buf);
7363 }
7364
7365 static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7366 {
7367         scsi_autopm_get_device(sdev);
7368         blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7369         if (sdev->rpm_autosuspend)
7370                 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7371                                                  RPM_AUTOSUSPEND_DELAY_MS);
7372         scsi_autopm_put_device(sdev);
7373 }
7374
7375 /**
7376  * ufshcd_scsi_add_wlus - Adds required W-LUs
7377  * @hba: per-adapter instance
7378  *
7379  * UFS device specification requires the UFS devices to support 4 well known
7380  * logical units:
7381  *      "REPORT_LUNS" (address: 01h)
7382  *      "UFS Device" (address: 50h)
7383  *      "RPMB" (address: 44h)
7384  *      "BOOT" (address: 30h)
7385  * UFS device's power management needs to be controlled by "POWER CONDITION"
7386  * field of SSU (START STOP UNIT) command. But this "power condition" field
7387  * will take effect only when its sent to "UFS device" well known logical unit
7388  * hence we require the scsi_device instance to represent this logical unit in
7389  * order for the UFS host driver to send the SSU command for power management.
7390  *
7391  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7392  * Block) LU so user space process can control this LU. User space may also
7393  * want to have access to BOOT LU.
7394  *
7395  * This function adds scsi device instances for each of all well known LUs
7396  * (except "REPORT LUNS" LU).
7397  *
7398  * Returns zero on success (all required W-LUs are added successfully),
7399  * non-zero error value on failure (if failed to add any of the required W-LU).
7400  */
7401 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7402 {
7403         int ret = 0;
7404         struct scsi_device *sdev_boot;
7405
7406         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7407                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7408         if (IS_ERR(hba->sdev_ufs_device)) {
7409                 ret = PTR_ERR(hba->sdev_ufs_device);
7410                 hba->sdev_ufs_device = NULL;
7411                 goto out;
7412         }
7413         scsi_device_put(hba->sdev_ufs_device);
7414
7415         hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
7416                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
7417         if (IS_ERR(hba->sdev_rpmb)) {
7418                 ret = PTR_ERR(hba->sdev_rpmb);
7419                 goto remove_sdev_ufs_device;
7420         }
7421         ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7422         scsi_device_put(hba->sdev_rpmb);
7423
7424         sdev_boot = __scsi_add_device(hba->host, 0, 0,
7425                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
7426         if (IS_ERR(sdev_boot)) {
7427                 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
7428         } else {
7429                 ufshcd_blk_pm_runtime_init(sdev_boot);
7430                 scsi_device_put(sdev_boot);
7431         }
7432         goto out;
7433
7434 remove_sdev_ufs_device:
7435         scsi_remove_device(hba->sdev_ufs_device);
7436 out:
7437         return ret;
7438 }
7439
7440 static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7441 {
7442         struct ufs_dev_info *dev_info = &hba->dev_info;
7443         u8 lun;
7444         u32 d_lu_wb_buf_alloc;
7445         u32 ext_ufs_feature;
7446
7447         if (!ufshcd_is_wb_allowed(hba))
7448                 return;
7449         /*
7450          * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7451          * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7452          * enabled
7453          */
7454         if (!(dev_info->wspecversion >= 0x310 ||
7455               dev_info->wspecversion == 0x220 ||
7456              (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7457                 goto wb_disabled;
7458
7459         if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7460             DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
7461                 goto wb_disabled;
7462
7463         ext_ufs_feature = get_unaligned_be32(desc_buf +
7464                                         DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
7465
7466         if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
7467                 goto wb_disabled;
7468
7469         /*
7470          * WB may be supported but not configured while provisioning. The spec
7471          * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7472          * buffer configured.
7473          */
7474         dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
7475
7476         dev_info->b_presrv_uspc_en =
7477                 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7478
7479         if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
7480                 if (!get_unaligned_be32(desc_buf +
7481                                    DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
7482                         goto wb_disabled;
7483         } else {
7484                 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7485                         d_lu_wb_buf_alloc = 0;
7486                         ufshcd_read_unit_desc_param(hba,
7487                                         lun,
7488                                         UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7489                                         (u8 *)&d_lu_wb_buf_alloc,
7490                                         sizeof(d_lu_wb_buf_alloc));
7491                         if (d_lu_wb_buf_alloc) {
7492                                 dev_info->wb_dedicated_lu = lun;
7493                                 break;
7494                         }
7495                 }
7496
7497                 if (!d_lu_wb_buf_alloc)
7498                         goto wb_disabled;
7499         }
7500         return;
7501
7502 wb_disabled:
7503         hba->caps &= ~UFSHCD_CAP_WB_EN;
7504 }
7505
7506 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
7507 {
7508         struct ufs_dev_fix *f;
7509         struct ufs_dev_info *dev_info = &hba->dev_info;
7510
7511         if (!fixups)
7512                 return;
7513
7514         for (f = fixups; f->quirk; f++) {
7515                 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7516                      f->wmanufacturerid == UFS_ANY_VENDOR) &&
7517                      ((dev_info->model &&
7518                        STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7519                       !strcmp(f->model, UFS_ANY_MODEL)))
7520                         hba->dev_quirks |= f->quirk;
7521         }
7522 }
7523 EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
7524
7525 static void ufs_fixup_device_setup(struct ufs_hba *hba)
7526 {
7527         /* fix by general quirk table */
7528         ufshcd_fixup_dev_quirks(hba, ufs_fixups);
7529
7530         /* allow vendors to fix quirks */
7531         ufshcd_vops_fixup_dev_quirks(hba);
7532 }
7533
7534 static int ufs_get_device_desc(struct ufs_hba *hba)
7535 {
7536         int err;
7537         u8 model_index;
7538         u8 b_ufs_feature_sup;
7539         u8 *desc_buf;
7540         struct ufs_dev_info *dev_info = &hba->dev_info;
7541
7542         desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
7543         if (!desc_buf) {
7544                 err = -ENOMEM;
7545                 goto out;
7546         }
7547
7548         err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
7549                                      hba->desc_size[QUERY_DESC_IDN_DEVICE]);
7550         if (err) {
7551                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7552                         __func__, err);
7553                 goto out;
7554         }
7555
7556         /*
7557          * getting vendor (manufacturerID) and Bank Index in big endian
7558          * format
7559          */
7560         dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
7561                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7562
7563         /* getting Specification Version in big endian format */
7564         dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7565                                       desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
7566         b_ufs_feature_sup = desc_buf[DEVICE_DESC_PARAM_UFS_FEAT];
7567
7568         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
7569
7570         if (dev_info->wspecversion >= UFS_DEV_HPB_SUPPORT_VERSION &&
7571             (b_ufs_feature_sup & UFS_DEV_HPB_SUPPORT)) {
7572                 bool hpb_en = false;
7573
7574                 ufshpb_get_dev_info(hba, desc_buf);
7575
7576                 if (!ufshpb_is_legacy(hba))
7577                         err = ufshcd_query_flag_retry(hba,
7578                                                       UPIU_QUERY_OPCODE_READ_FLAG,
7579                                                       QUERY_FLAG_IDN_HPB_EN, 0,
7580                                                       &hpb_en);
7581
7582                 if (ufshpb_is_legacy(hba) || (!err && hpb_en))
7583                         dev_info->hpb_enabled = true;
7584         }
7585
7586         err = ufshcd_read_string_desc(hba, model_index,
7587                                       &dev_info->model, SD_ASCII_STD);
7588         if (err < 0) {
7589                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7590                         __func__, err);
7591                 goto out;
7592         }
7593
7594         hba->luns_avail = desc_buf[DEVICE_DESC_PARAM_NUM_LU] +
7595                 desc_buf[DEVICE_DESC_PARAM_NUM_WLU];
7596
7597         ufs_fixup_device_setup(hba);
7598
7599         ufshcd_wb_probe(hba, desc_buf);
7600
7601         /*
7602          * ufshcd_read_string_desc returns size of the string
7603          * reset the error value
7604          */
7605         err = 0;
7606
7607 out:
7608         kfree(desc_buf);
7609         return err;
7610 }
7611
7612 static void ufs_put_device_desc(struct ufs_hba *hba)
7613 {
7614         struct ufs_dev_info *dev_info = &hba->dev_info;
7615
7616         kfree(dev_info->model);
7617         dev_info->model = NULL;
7618 }
7619
7620 /**
7621  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7622  * @hba: per-adapter instance
7623  *
7624  * PA_TActivate parameter can be tuned manually if UniPro version is less than
7625  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7626  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7627  * the hibern8 exit latency.
7628  *
7629  * Returns zero on success, non-zero error value on failure.
7630  */
7631 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7632 {
7633         int ret = 0;
7634         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7635
7636         ret = ufshcd_dme_peer_get(hba,
7637                                   UIC_ARG_MIB_SEL(
7638                                         RX_MIN_ACTIVATETIME_CAPABILITY,
7639                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7640                                   &peer_rx_min_activatetime);
7641         if (ret)
7642                 goto out;
7643
7644         /* make sure proper unit conversion is applied */
7645         tuned_pa_tactivate =
7646                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7647                  / PA_TACTIVATE_TIME_UNIT_US);
7648         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7649                              tuned_pa_tactivate);
7650
7651 out:
7652         return ret;
7653 }
7654
7655 /**
7656  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7657  * @hba: per-adapter instance
7658  *
7659  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7660  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7661  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7662  * This optimal value can help reduce the hibern8 exit latency.
7663  *
7664  * Returns zero on success, non-zero error value on failure.
7665  */
7666 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7667 {
7668         int ret = 0;
7669         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7670         u32 max_hibern8_time, tuned_pa_hibern8time;
7671
7672         ret = ufshcd_dme_get(hba,
7673                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7674                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7675                                   &local_tx_hibern8_time_cap);
7676         if (ret)
7677                 goto out;
7678
7679         ret = ufshcd_dme_peer_get(hba,
7680                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7681                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7682                                   &peer_rx_hibern8_time_cap);
7683         if (ret)
7684                 goto out;
7685
7686         max_hibern8_time = max(local_tx_hibern8_time_cap,
7687                                peer_rx_hibern8_time_cap);
7688         /* make sure proper unit conversion is applied */
7689         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7690                                 / PA_HIBERN8_TIME_UNIT_US);
7691         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7692                              tuned_pa_hibern8time);
7693 out:
7694         return ret;
7695 }
7696
7697 /**
7698  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7699  * less than device PA_TACTIVATE time.
7700  * @hba: per-adapter instance
7701  *
7702  * Some UFS devices require host PA_TACTIVATE to be lower than device
7703  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7704  * for such devices.
7705  *
7706  * Returns zero on success, non-zero error value on failure.
7707  */
7708 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7709 {
7710         int ret = 0;
7711         u32 granularity, peer_granularity;
7712         u32 pa_tactivate, peer_pa_tactivate;
7713         u32 pa_tactivate_us, peer_pa_tactivate_us;
7714         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7715
7716         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7717                                   &granularity);
7718         if (ret)
7719                 goto out;
7720
7721         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7722                                   &peer_granularity);
7723         if (ret)
7724                 goto out;
7725
7726         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7727             (granularity > PA_GRANULARITY_MAX_VAL)) {
7728                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7729                         __func__, granularity);
7730                 return -EINVAL;
7731         }
7732
7733         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7734             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7735                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7736                         __func__, peer_granularity);
7737                 return -EINVAL;
7738         }
7739
7740         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7741         if (ret)
7742                 goto out;
7743
7744         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7745                                   &peer_pa_tactivate);
7746         if (ret)
7747                 goto out;
7748
7749         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7750         peer_pa_tactivate_us = peer_pa_tactivate *
7751                              gran_to_us_table[peer_granularity - 1];
7752
7753         if (pa_tactivate_us > peer_pa_tactivate_us) {
7754                 u32 new_peer_pa_tactivate;
7755
7756                 new_peer_pa_tactivate = pa_tactivate_us /
7757                                       gran_to_us_table[peer_granularity - 1];
7758                 new_peer_pa_tactivate++;
7759                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7760                                           new_peer_pa_tactivate);
7761         }
7762
7763 out:
7764         return ret;
7765 }
7766
7767 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7768 {
7769         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7770                 ufshcd_tune_pa_tactivate(hba);
7771                 ufshcd_tune_pa_hibern8time(hba);
7772         }
7773
7774         ufshcd_vops_apply_dev_quirks(hba);
7775
7776         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7777                 /* set 1ms timeout for PA_TACTIVATE */
7778                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
7779
7780         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7781                 ufshcd_quirk_tune_host_pa_tactivate(hba);
7782 }
7783
7784 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7785 {
7786         hba->ufs_stats.hibern8_exit_cnt = 0;
7787         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
7788         hba->req_abort_count = 0;
7789 }
7790
7791 static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7792 {
7793         int err;
7794         size_t buff_len;
7795         u8 *desc_buf;
7796
7797         buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
7798         desc_buf = kmalloc(buff_len, GFP_KERNEL);
7799         if (!desc_buf) {
7800                 err = -ENOMEM;
7801                 goto out;
7802         }
7803
7804         err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7805                                      desc_buf, buff_len);
7806         if (err) {
7807                 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7808                                 __func__, err);
7809                 goto out;
7810         }
7811
7812         if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7813                 hba->dev_info.max_lu_supported = 32;
7814         else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7815                 hba->dev_info.max_lu_supported = 8;
7816
7817         if (hba->desc_size[QUERY_DESC_IDN_GEOMETRY] >=
7818                 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS)
7819                 ufshpb_get_geo_info(hba, desc_buf);
7820
7821 out:
7822         kfree(desc_buf);
7823         return err;
7824 }
7825
7826 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7827         {19200000, REF_CLK_FREQ_19_2_MHZ},
7828         {26000000, REF_CLK_FREQ_26_MHZ},
7829         {38400000, REF_CLK_FREQ_38_4_MHZ},
7830         {52000000, REF_CLK_FREQ_52_MHZ},
7831         {0, REF_CLK_FREQ_INVAL},
7832 };
7833
7834 static enum ufs_ref_clk_freq
7835 ufs_get_bref_clk_from_hz(unsigned long freq)
7836 {
7837         int i;
7838
7839         for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7840                 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7841                         return ufs_ref_clk_freqs[i].val;
7842
7843         return REF_CLK_FREQ_INVAL;
7844 }
7845
7846 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7847 {
7848         unsigned long freq;
7849
7850         freq = clk_get_rate(refclk);
7851
7852         hba->dev_ref_clk_freq =
7853                 ufs_get_bref_clk_from_hz(freq);
7854
7855         if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7856                 dev_err(hba->dev,
7857                 "invalid ref_clk setting = %ld\n", freq);
7858 }
7859
7860 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7861 {
7862         int err;
7863         u32 ref_clk;
7864         u32 freq = hba->dev_ref_clk_freq;
7865
7866         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7867                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7868
7869         if (err) {
7870                 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7871                         err);
7872                 goto out;
7873         }
7874
7875         if (ref_clk == freq)
7876                 goto out; /* nothing to update */
7877
7878         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7879                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7880
7881         if (err) {
7882                 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7883                         ufs_ref_clk_freqs[freq].freq_hz);
7884                 goto out;
7885         }
7886
7887         dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7888                         ufs_ref_clk_freqs[freq].freq_hz);
7889
7890 out:
7891         return err;
7892 }
7893
7894 static int ufshcd_device_params_init(struct ufs_hba *hba)
7895 {
7896         bool flag;
7897         int ret, i;
7898
7899          /* Init device descriptor sizes */
7900         for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7901                 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
7902
7903         /* Init UFS geometry descriptor related parameters */
7904         ret = ufshcd_device_geo_params_init(hba);
7905         if (ret)
7906                 goto out;
7907
7908         /* Check and apply UFS device quirks */
7909         ret = ufs_get_device_desc(hba);
7910         if (ret) {
7911                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7912                         __func__, ret);
7913                 goto out;
7914         }
7915
7916         ufshcd_get_ref_clk_gating_wait(hba);
7917
7918         if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7919                         QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
7920                 hba->dev_info.f_power_on_wp_en = flag;
7921
7922         /* Probe maximum power mode co-supported by both UFS host and device */
7923         if (ufshcd_get_max_pwr_mode(hba))
7924                 dev_err(hba->dev,
7925                         "%s: Failed getting max supported power mode\n",
7926                         __func__);
7927 out:
7928         return ret;
7929 }
7930
7931 /**
7932  * ufshcd_add_lus - probe and add UFS logical units
7933  * @hba: per-adapter instance
7934  */
7935 static int ufshcd_add_lus(struct ufs_hba *hba)
7936 {
7937         int ret;
7938
7939         /* Add required well known logical units to scsi mid layer */
7940         ret = ufshcd_scsi_add_wlus(hba);
7941         if (ret)
7942                 goto out;
7943
7944         ufshcd_clear_ua_wluns(hba);
7945
7946         /* Initialize devfreq after UFS device is detected */
7947         if (ufshcd_is_clkscaling_supported(hba)) {
7948                 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7949                         &hba->pwr_info,
7950                         sizeof(struct ufs_pa_layer_attr));
7951                 hba->clk_scaling.saved_pwr_info.is_valid = true;
7952                 hba->clk_scaling.is_allowed = true;
7953
7954                 ret = ufshcd_devfreq_init(hba);
7955                 if (ret)
7956                         goto out;
7957
7958                 hba->clk_scaling.is_enabled = true;
7959                 ufshcd_init_clk_scaling_sysfs(hba);
7960         }
7961
7962         ufs_bsg_probe(hba);
7963         ufshpb_init(hba);
7964         scsi_scan_host(hba->host);
7965         pm_runtime_put_sync(hba->dev);
7966
7967 out:
7968         return ret;
7969 }
7970
7971 static int
7972 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp);
7973
7974 static int ufshcd_clear_ua_wlun(struct ufs_hba *hba, u8 wlun)
7975 {
7976         struct scsi_device *sdp;
7977         unsigned long flags;
7978         int ret = 0;
7979
7980         spin_lock_irqsave(hba->host->host_lock, flags);
7981         if (wlun == UFS_UPIU_UFS_DEVICE_WLUN)
7982                 sdp = hba->sdev_ufs_device;
7983         else if (wlun == UFS_UPIU_RPMB_WLUN)
7984                 sdp = hba->sdev_rpmb;
7985         else
7986                 BUG();
7987         if (sdp) {
7988                 ret = scsi_device_get(sdp);
7989                 if (!ret && !scsi_device_online(sdp)) {
7990                         ret = -ENODEV;
7991                         scsi_device_put(sdp);
7992                 }
7993         } else {
7994                 ret = -ENODEV;
7995         }
7996         spin_unlock_irqrestore(hba->host->host_lock, flags);
7997         if (ret)
7998                 goto out_err;
7999
8000         ret = ufshcd_send_request_sense(hba, sdp);
8001         scsi_device_put(sdp);
8002 out_err:
8003         if (ret)
8004                 dev_err(hba->dev, "%s: UAC clear LU=%x ret = %d\n",
8005                                 __func__, wlun, ret);
8006         return ret;
8007 }
8008
8009 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba)
8010 {
8011         int ret = 0;
8012
8013         if (!hba->wlun_dev_clr_ua)
8014                 goto out;
8015
8016         ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8017         if (!ret)
8018                 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
8019         if (!ret)
8020                 hba->wlun_dev_clr_ua = false;
8021 out:
8022         if (ret)
8023                 dev_err(hba->dev, "%s: Failed to clear UAC WLUNS ret = %d\n",
8024                                 __func__, ret);
8025         return ret;
8026 }
8027
8028 /**
8029  * ufshcd_probe_hba - probe hba to detect device and initialize
8030  * @hba: per-adapter instance
8031  * @async: asynchronous execution or not
8032  *
8033  * Execute link-startup and verify device initialization
8034  */
8035 static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
8036 {
8037         int ret;
8038         unsigned long flags;
8039         ktime_t start = ktime_get();
8040
8041         hba->ufshcd_state = UFSHCD_STATE_RESET;
8042
8043         ret = ufshcd_link_startup(hba);
8044         if (ret)
8045                 goto out;
8046
8047         /* Debug counters initialization */
8048         ufshcd_clear_dbg_ufs_stats(hba);
8049
8050         /* UniPro link is active now */
8051         ufshcd_set_link_active(hba);
8052
8053         /* Verify device initialization by sending NOP OUT UPIU */
8054         ret = ufshcd_verify_dev_init(hba);
8055         if (ret)
8056                 goto out;
8057
8058         /* Initiate UFS initialization, and waiting until completion */
8059         ret = ufshcd_complete_dev_init(hba);
8060         if (ret)
8061                 goto out;
8062
8063         /*
8064          * Initialize UFS device parameters used by driver, these
8065          * parameters are associated with UFS descriptors.
8066          */
8067         if (async) {
8068                 ret = ufshcd_device_params_init(hba);
8069                 if (ret)
8070                         goto out;
8071         }
8072
8073         ufshcd_tune_unipro_params(hba);
8074
8075         /* UFS device is also active now */
8076         ufshcd_set_ufs_dev_active(hba);
8077         ufshcd_force_reset_auto_bkops(hba);
8078         hba->wlun_dev_clr_ua = true;
8079         hba->wlun_rpmb_clr_ua = true;
8080
8081         /* Gear up to HS gear if supported */
8082         if (hba->max_pwr_info.is_valid) {
8083                 /*
8084                  * Set the right value to bRefClkFreq before attempting to
8085                  * switch to HS gears.
8086                  */
8087                 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
8088                         ufshcd_set_dev_ref_clk(hba);
8089                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
8090                 if (ret) {
8091                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
8092                                         __func__, ret);
8093                         goto out;
8094                 }
8095                 ufshcd_print_pwr_info(hba);
8096         }
8097
8098         /*
8099          * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
8100          * and for removable UFS card as well, hence always set the parameter.
8101          * Note: Error handler may issue the device reset hence resetting
8102          * bActiveICCLevel as well so it is always safe to set this here.
8103          */
8104         ufshcd_set_active_icc_lvl(hba);
8105
8106         ufshcd_wb_config(hba);
8107         if (hba->ee_usr_mask)
8108                 ufshcd_write_ee_control(hba);
8109         /* Enable Auto-Hibernate if configured */
8110         ufshcd_auto_hibern8_enable(hba);
8111
8112         ufshpb_reset(hba);
8113 out:
8114         spin_lock_irqsave(hba->host->host_lock, flags);
8115         if (ret)
8116                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
8117         else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
8118                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
8119         spin_unlock_irqrestore(hba->host->host_lock, flags);
8120
8121         trace_ufshcd_init(dev_name(hba->dev), ret,
8122                 ktime_to_us(ktime_sub(ktime_get(), start)),
8123                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8124         return ret;
8125 }
8126
8127 /**
8128  * ufshcd_async_scan - asynchronous execution for probing hba
8129  * @data: data pointer to pass to this function
8130  * @cookie: cookie data
8131  */
8132 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8133 {
8134         struct ufs_hba *hba = (struct ufs_hba *)data;
8135         int ret;
8136
8137         down(&hba->host_sem);
8138         /* Initialize hba, detect and initialize UFS device */
8139         ret = ufshcd_probe_hba(hba, true);
8140         up(&hba->host_sem);
8141         if (ret)
8142                 goto out;
8143
8144         /* Probe and add UFS logical units  */
8145         ret = ufshcd_add_lus(hba);
8146 out:
8147         /*
8148          * If we failed to initialize the device or the device is not
8149          * present, turn off the power/clocks etc.
8150          */
8151         if (ret) {
8152                 pm_runtime_put_sync(hba->dev);
8153                 ufshcd_hba_exit(hba);
8154         }
8155 }
8156
8157 static const struct attribute_group *ufshcd_driver_groups[] = {
8158         &ufs_sysfs_unit_descriptor_group,
8159         &ufs_sysfs_lun_attributes_group,
8160 #ifdef CONFIG_SCSI_UFS_HPB
8161         &ufs_sysfs_hpb_stat_group,
8162         &ufs_sysfs_hpb_param_group,
8163 #endif
8164         NULL,
8165 };
8166
8167 static struct ufs_hba_variant_params ufs_hba_vps = {
8168         .hba_enable_delay_us            = 1000,
8169         .wb_flush_threshold             = UFS_WB_BUF_REMAIN_PERCENT(40),
8170         .devfreq_profile.polling_ms     = 100,
8171         .devfreq_profile.target         = ufshcd_devfreq_target,
8172         .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
8173         .ondemand_data.upthreshold      = 70,
8174         .ondemand_data.downdifferential = 5,
8175 };
8176
8177 static struct scsi_host_template ufshcd_driver_template = {
8178         .module                 = THIS_MODULE,
8179         .name                   = UFSHCD,
8180         .proc_name              = UFSHCD,
8181         .queuecommand           = ufshcd_queuecommand,
8182         .slave_alloc            = ufshcd_slave_alloc,
8183         .slave_configure        = ufshcd_slave_configure,
8184         .slave_destroy          = ufshcd_slave_destroy,
8185         .change_queue_depth     = ufshcd_change_queue_depth,
8186         .eh_abort_handler       = ufshcd_abort,
8187         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8188         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
8189         .this_id                = -1,
8190         .sg_tablesize           = SG_ALL,
8191         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
8192         .can_queue              = UFSHCD_CAN_QUEUE,
8193         .max_segment_size       = PRDT_DATA_BYTE_COUNT_MAX,
8194         .max_host_blocked       = 1,
8195         .track_queue_depth      = 1,
8196         .sdev_groups            = ufshcd_driver_groups,
8197         .dma_boundary           = PAGE_SIZE - 1,
8198         .rpm_autosuspend_delay  = RPM_AUTOSUSPEND_DELAY_MS,
8199 };
8200
8201 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8202                                    int ua)
8203 {
8204         int ret;
8205
8206         if (!vreg)
8207                 return 0;
8208
8209         /*
8210          * "set_load" operation shall be required on those regulators
8211          * which specifically configured current limitation. Otherwise
8212          * zero max_uA may cause unexpected behavior when regulator is
8213          * enabled or set as high power mode.
8214          */
8215         if (!vreg->max_uA)
8216                 return 0;
8217
8218         ret = regulator_set_load(vreg->reg, ua);
8219         if (ret < 0) {
8220                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8221                                 __func__, vreg->name, ua, ret);
8222         }
8223
8224         return ret;
8225 }
8226
8227 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8228                                          struct ufs_vreg *vreg)
8229 {
8230         return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
8231 }
8232
8233 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8234                                          struct ufs_vreg *vreg)
8235 {
8236         if (!vreg)
8237                 return 0;
8238
8239         return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
8240 }
8241
8242 static int ufshcd_config_vreg(struct device *dev,
8243                 struct ufs_vreg *vreg, bool on)
8244 {
8245         int ret = 0;
8246         struct regulator *reg;
8247         const char *name;
8248         int min_uV, uA_load;
8249
8250         BUG_ON(!vreg);
8251
8252         reg = vreg->reg;
8253         name = vreg->name;
8254
8255         if (regulator_count_voltages(reg) > 0) {
8256                 uA_load = on ? vreg->max_uA : 0;
8257                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8258                 if (ret)
8259                         goto out;
8260
8261                 if (vreg->min_uV && vreg->max_uV) {
8262                         min_uV = on ? vreg->min_uV : 0;
8263                         ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
8264                         if (ret)
8265                                 dev_err(dev,
8266                                         "%s: %s set voltage failed, err=%d\n",
8267                                         __func__, name, ret);
8268                 }
8269         }
8270 out:
8271         return ret;
8272 }
8273
8274 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8275 {
8276         int ret = 0;
8277
8278         if (!vreg || vreg->enabled)
8279                 goto out;
8280
8281         ret = ufshcd_config_vreg(dev, vreg, true);
8282         if (!ret)
8283                 ret = regulator_enable(vreg->reg);
8284
8285         if (!ret)
8286                 vreg->enabled = true;
8287         else
8288                 dev_err(dev, "%s: %s enable failed, err=%d\n",
8289                                 __func__, vreg->name, ret);
8290 out:
8291         return ret;
8292 }
8293
8294 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8295 {
8296         int ret = 0;
8297
8298         if (!vreg || !vreg->enabled || vreg->always_on)
8299                 goto out;
8300
8301         ret = regulator_disable(vreg->reg);
8302
8303         if (!ret) {
8304                 /* ignore errors on applying disable config */
8305                 ufshcd_config_vreg(dev, vreg, false);
8306                 vreg->enabled = false;
8307         } else {
8308                 dev_err(dev, "%s: %s disable failed, err=%d\n",
8309                                 __func__, vreg->name, ret);
8310         }
8311 out:
8312         return ret;
8313 }
8314
8315 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8316 {
8317         int ret = 0;
8318         struct device *dev = hba->dev;
8319         struct ufs_vreg_info *info = &hba->vreg_info;
8320
8321         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8322         if (ret)
8323                 goto out;
8324
8325         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8326         if (ret)
8327                 goto out;
8328
8329         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
8330
8331 out:
8332         if (ret) {
8333                 ufshcd_toggle_vreg(dev, info->vccq2, false);
8334                 ufshcd_toggle_vreg(dev, info->vccq, false);
8335                 ufshcd_toggle_vreg(dev, info->vcc, false);
8336         }
8337         return ret;
8338 }
8339
8340 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8341 {
8342         struct ufs_vreg_info *info = &hba->vreg_info;
8343
8344         return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
8345 }
8346
8347 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8348 {
8349         int ret = 0;
8350
8351         if (!vreg)
8352                 goto out;
8353
8354         vreg->reg = devm_regulator_get(dev, vreg->name);
8355         if (IS_ERR(vreg->reg)) {
8356                 ret = PTR_ERR(vreg->reg);
8357                 dev_err(dev, "%s: %s get failed, err=%d\n",
8358                                 __func__, vreg->name, ret);
8359         }
8360 out:
8361         return ret;
8362 }
8363
8364 static int ufshcd_init_vreg(struct ufs_hba *hba)
8365 {
8366         int ret = 0;
8367         struct device *dev = hba->dev;
8368         struct ufs_vreg_info *info = &hba->vreg_info;
8369
8370         ret = ufshcd_get_vreg(dev, info->vcc);
8371         if (ret)
8372                 goto out;
8373
8374         ret = ufshcd_get_vreg(dev, info->vccq);
8375         if (!ret)
8376                 ret = ufshcd_get_vreg(dev, info->vccq2);
8377 out:
8378         return ret;
8379 }
8380
8381 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8382 {
8383         struct ufs_vreg_info *info = &hba->vreg_info;
8384
8385         if (info)
8386                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8387
8388         return 0;
8389 }
8390
8391 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
8392 {
8393         int ret = 0;
8394         struct ufs_clk_info *clki;
8395         struct list_head *head = &hba->clk_list_head;
8396         unsigned long flags;
8397         ktime_t start = ktime_get();
8398         bool clk_state_changed = false;
8399
8400         if (list_empty(head))
8401                 goto out;
8402
8403         ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8404         if (ret)
8405                 return ret;
8406
8407         list_for_each_entry(clki, head, list) {
8408                 if (!IS_ERR_OR_NULL(clki->clk)) {
8409                         /*
8410                          * Don't disable clocks which are needed
8411                          * to keep the link active.
8412                          */
8413                         if (ufshcd_is_link_active(hba) &&
8414                             clki->keep_link_active)
8415                                 continue;
8416
8417                         clk_state_changed = on ^ clki->enabled;
8418                         if (on && !clki->enabled) {
8419                                 ret = clk_prepare_enable(clki->clk);
8420                                 if (ret) {
8421                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8422                                                 __func__, clki->name, ret);
8423                                         goto out;
8424                                 }
8425                         } else if (!on && clki->enabled) {
8426                                 clk_disable_unprepare(clki->clk);
8427                         }
8428                         clki->enabled = on;
8429                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8430                                         clki->name, on ? "en" : "dis");
8431                 }
8432         }
8433
8434         ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8435         if (ret)
8436                 return ret;
8437
8438 out:
8439         if (ret) {
8440                 list_for_each_entry(clki, head, list) {
8441                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8442                                 clk_disable_unprepare(clki->clk);
8443                 }
8444         } else if (!ret && on) {
8445                 spin_lock_irqsave(hba->host->host_lock, flags);
8446                 hba->clk_gating.state = CLKS_ON;
8447                 trace_ufshcd_clk_gating(dev_name(hba->dev),
8448                                         hba->clk_gating.state);
8449                 spin_unlock_irqrestore(hba->host->host_lock, flags);
8450         }
8451
8452         if (clk_state_changed)
8453                 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8454                         (on ? "on" : "off"),
8455                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
8456         return ret;
8457 }
8458
8459 static int ufshcd_init_clocks(struct ufs_hba *hba)
8460 {
8461         int ret = 0;
8462         struct ufs_clk_info *clki;
8463         struct device *dev = hba->dev;
8464         struct list_head *head = &hba->clk_list_head;
8465
8466         if (list_empty(head))
8467                 goto out;
8468
8469         list_for_each_entry(clki, head, list) {
8470                 if (!clki->name)
8471                         continue;
8472
8473                 clki->clk = devm_clk_get(dev, clki->name);
8474                 if (IS_ERR(clki->clk)) {
8475                         ret = PTR_ERR(clki->clk);
8476                         dev_err(dev, "%s: %s clk get failed, %d\n",
8477                                         __func__, clki->name, ret);
8478                         goto out;
8479                 }
8480
8481                 /*
8482                  * Parse device ref clk freq as per device tree "ref_clk".
8483                  * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8484                  * in ufshcd_alloc_host().
8485                  */
8486                 if (!strcmp(clki->name, "ref_clk"))
8487                         ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8488
8489                 if (clki->max_freq) {
8490                         ret = clk_set_rate(clki->clk, clki->max_freq);
8491                         if (ret) {
8492                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8493                                         __func__, clki->name,
8494                                         clki->max_freq, ret);
8495                                 goto out;
8496                         }
8497                         clki->curr_freq = clki->max_freq;
8498                 }
8499                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8500                                 clki->name, clk_get_rate(clki->clk));
8501         }
8502 out:
8503         return ret;
8504 }
8505
8506 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8507 {
8508         int err = 0;
8509
8510         if (!hba->vops)
8511                 goto out;
8512
8513         err = ufshcd_vops_init(hba);
8514         if (err)
8515                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
8516                         __func__, ufshcd_get_var_name(hba), err);
8517 out:
8518         return err;
8519 }
8520
8521 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8522 {
8523         if (!hba->vops)
8524                 return;
8525
8526         ufshcd_vops_exit(hba);
8527 }
8528
8529 static int ufshcd_hba_init(struct ufs_hba *hba)
8530 {
8531         int err;
8532
8533         /*
8534          * Handle host controller power separately from the UFS device power
8535          * rails as it will help controlling the UFS host controller power
8536          * collapse easily which is different than UFS device power collapse.
8537          * Also, enable the host controller power before we go ahead with rest
8538          * of the initialization here.
8539          */
8540         err = ufshcd_init_hba_vreg(hba);
8541         if (err)
8542                 goto out;
8543
8544         err = ufshcd_setup_hba_vreg(hba, true);
8545         if (err)
8546                 goto out;
8547
8548         err = ufshcd_init_clocks(hba);
8549         if (err)
8550                 goto out_disable_hba_vreg;
8551
8552         err = ufshcd_setup_clocks(hba, true);
8553         if (err)
8554                 goto out_disable_hba_vreg;
8555
8556         err = ufshcd_init_vreg(hba);
8557         if (err)
8558                 goto out_disable_clks;
8559
8560         err = ufshcd_setup_vreg(hba, true);
8561         if (err)
8562                 goto out_disable_clks;
8563
8564         err = ufshcd_variant_hba_init(hba);
8565         if (err)
8566                 goto out_disable_vreg;
8567
8568         ufs_debugfs_hba_init(hba);
8569
8570         hba->is_powered = true;
8571         goto out;
8572
8573 out_disable_vreg:
8574         ufshcd_setup_vreg(hba, false);
8575 out_disable_clks:
8576         ufshcd_setup_clocks(hba, false);
8577 out_disable_hba_vreg:
8578         ufshcd_setup_hba_vreg(hba, false);
8579 out:
8580         return err;
8581 }
8582
8583 static void ufshcd_hba_exit(struct ufs_hba *hba)
8584 {
8585         if (hba->is_powered) {
8586                 ufshcd_exit_clk_scaling(hba);
8587                 ufshcd_exit_clk_gating(hba);
8588                 if (hba->eh_wq)
8589                         destroy_workqueue(hba->eh_wq);
8590                 ufs_debugfs_hba_exit(hba);
8591                 ufshcd_variant_hba_exit(hba);
8592                 ufshcd_setup_vreg(hba, false);
8593                 ufshcd_setup_clocks(hba, false);
8594                 ufshcd_setup_hba_vreg(hba, false);
8595                 hba->is_powered = false;
8596                 ufs_put_device_desc(hba);
8597         }
8598 }
8599
8600 static int
8601 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
8602 {
8603         unsigned char cmd[6] = {REQUEST_SENSE,
8604                                 0,
8605                                 0,
8606                                 0,
8607                                 UFS_SENSE_SIZE,
8608                                 0};
8609         char *buffer;
8610         int ret;
8611
8612         buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
8613         if (!buffer) {
8614                 ret = -ENOMEM;
8615                 goto out;
8616         }
8617
8618         ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
8619                         UFS_SENSE_SIZE, NULL, NULL,
8620                         msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
8621         if (ret)
8622                 pr_err("%s: failed with err %d\n", __func__, ret);
8623
8624         kfree(buffer);
8625 out:
8626         return ret;
8627 }
8628
8629 /**
8630  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8631  *                           power mode
8632  * @hba: per adapter instance
8633  * @pwr_mode: device power mode to set
8634  *
8635  * Returns 0 if requested power mode is set successfully
8636  * Returns non-zero if failed to set the requested power mode
8637  */
8638 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8639                                      enum ufs_dev_pwr_mode pwr_mode)
8640 {
8641         unsigned char cmd[6] = { START_STOP };
8642         struct scsi_sense_hdr sshdr;
8643         struct scsi_device *sdp;
8644         unsigned long flags;
8645         int ret;
8646
8647         spin_lock_irqsave(hba->host->host_lock, flags);
8648         sdp = hba->sdev_ufs_device;
8649         if (sdp) {
8650                 ret = scsi_device_get(sdp);
8651                 if (!ret && !scsi_device_online(sdp)) {
8652                         ret = -ENODEV;
8653                         scsi_device_put(sdp);
8654                 }
8655         } else {
8656                 ret = -ENODEV;
8657         }
8658         spin_unlock_irqrestore(hba->host->host_lock, flags);
8659
8660         if (ret)
8661                 return ret;
8662
8663         /*
8664          * If scsi commands fail, the scsi mid-layer schedules scsi error-
8665          * handling, which would wait for host to be resumed. Since we know
8666          * we are functional while we are here, skip host resume in error
8667          * handling context.
8668          */
8669         hba->host->eh_noresume = 1;
8670         if (hba->wlun_dev_clr_ua)
8671                 ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8672
8673         cmd[4] = pwr_mode << 4;
8674
8675         /*
8676          * Current function would be generally called from the power management
8677          * callbacks hence set the RQF_PM flag so that it doesn't resume the
8678          * already suspended childs.
8679          */
8680         ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8681                         START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8682         if (ret) {
8683                 sdev_printk(KERN_WARNING, sdp,
8684                             "START_STOP failed for power mode: %d, result %x\n",
8685                             pwr_mode, ret);
8686                 if (ret > 0 && scsi_sense_valid(&sshdr))
8687                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
8688         }
8689
8690         if (!ret)
8691                 hba->curr_dev_pwr_mode = pwr_mode;
8692
8693         scsi_device_put(sdp);
8694         hba->host->eh_noresume = 0;
8695         return ret;
8696 }
8697
8698 static int ufshcd_link_state_transition(struct ufs_hba *hba,
8699                                         enum uic_link_state req_link_state,
8700                                         int check_for_bkops)
8701 {
8702         int ret = 0;
8703
8704         if (req_link_state == hba->uic_link_state)
8705                 return 0;
8706
8707         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8708                 ret = ufshcd_uic_hibern8_enter(hba);
8709                 if (!ret) {
8710                         ufshcd_set_link_hibern8(hba);
8711                 } else {
8712                         dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8713                                         __func__, ret);
8714                         goto out;
8715                 }
8716         }
8717         /*
8718          * If autobkops is enabled, link can't be turned off because
8719          * turning off the link would also turn off the device, except in the
8720          * case of DeepSleep where the device is expected to remain powered.
8721          */
8722         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
8723                  (!check_for_bkops || !hba->auto_bkops_enabled)) {
8724                 /*
8725                  * Let's make sure that link is in low power mode, we are doing
8726                  * this currently by putting the link in Hibern8. Otherway to
8727                  * put the link in low power mode is to send the DME end point
8728                  * to device and then send the DME reset command to local
8729                  * unipro. But putting the link in hibern8 is much faster.
8730                  *
8731                  * Note also that putting the link in Hibern8 is a requirement
8732                  * for entering DeepSleep.
8733                  */
8734                 ret = ufshcd_uic_hibern8_enter(hba);
8735                 if (ret) {
8736                         dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8737                                         __func__, ret);
8738                         goto out;
8739                 }
8740                 /*
8741                  * Change controller state to "reset state" which
8742                  * should also put the link in off/reset state
8743                  */
8744                 ufshcd_hba_stop(hba);
8745                 /*
8746                  * TODO: Check if we need any delay to make sure that
8747                  * controller is reset
8748                  */
8749                 ufshcd_set_link_off(hba);
8750         }
8751
8752 out:
8753         return ret;
8754 }
8755
8756 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8757 {
8758         bool vcc_off = false;
8759
8760         /*
8761          * It seems some UFS devices may keep drawing more than sleep current
8762          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8763          * To avoid this situation, add 2ms delay before putting these UFS
8764          * rails in LPM mode.
8765          */
8766         if (!ufshcd_is_link_active(hba) &&
8767             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8768                 usleep_range(2000, 2100);
8769
8770         /*
8771          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8772          * power.
8773          *
8774          * If UFS device and link is in OFF state, all power supplies (VCC,
8775          * VCCQ, VCCQ2) can be turned off if power on write protect is not
8776          * required. If UFS link is inactive (Hibern8 or OFF state) and device
8777          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8778          *
8779          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8780          * in low power state which would save some power.
8781          *
8782          * If Write Booster is enabled and the device needs to flush the WB
8783          * buffer OR if bkops status is urgent for WB, keep Vcc on.
8784          */
8785         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8786             !hba->dev_info.is_lu_power_on_wp) {
8787                 ufshcd_setup_vreg(hba, false);
8788                 vcc_off = true;
8789         } else if (!ufshcd_is_ufs_dev_active(hba)) {
8790                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8791                 vcc_off = true;
8792                 if (ufshcd_is_link_hibern8(hba) || ufshcd_is_link_off(hba)) {
8793                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8794                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8795                 }
8796         }
8797
8798         /*
8799          * Some UFS devices require delay after VCC power rail is turned-off.
8800          */
8801         if (vcc_off && hba->vreg_info.vcc &&
8802                 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8803                 usleep_range(5000, 5100);
8804 }
8805
8806 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8807 {
8808         int ret = 0;
8809
8810         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8811             !hba->dev_info.is_lu_power_on_wp) {
8812                 ret = ufshcd_setup_vreg(hba, true);
8813         } else if (!ufshcd_is_ufs_dev_active(hba)) {
8814                 if (!ufshcd_is_link_active(hba)) {
8815                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8816                         if (ret)
8817                                 goto vcc_disable;
8818                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8819                         if (ret)
8820                                 goto vccq_lpm;
8821                 }
8822                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
8823         }
8824         goto out;
8825
8826 vccq_lpm:
8827         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8828 vcc_disable:
8829         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8830 out:
8831         return ret;
8832 }
8833
8834 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8835 {
8836         if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8837                 ufshcd_setup_hba_vreg(hba, false);
8838 }
8839
8840 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8841 {
8842         if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8843                 ufshcd_setup_hba_vreg(hba, true);
8844 }
8845
8846 static int __ufshcd_wl_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8847 {
8848         int ret = 0;
8849         int check_for_bkops;
8850         enum ufs_pm_level pm_lvl;
8851         enum ufs_dev_pwr_mode req_dev_pwr_mode;
8852         enum uic_link_state req_link_state;
8853
8854         hba->pm_op_in_progress = true;
8855         if (pm_op != UFS_SHUTDOWN_PM) {
8856                 pm_lvl = pm_op == UFS_RUNTIME_PM ?
8857                          hba->rpm_lvl : hba->spm_lvl;
8858                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8859                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8860         } else {
8861                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8862                 req_link_state = UIC_LINK_OFF_STATE;
8863         }
8864
8865         ufshpb_suspend(hba);
8866
8867         /*
8868          * If we can't transition into any of the low power modes
8869          * just gate the clocks.
8870          */
8871         ufshcd_hold(hba, false);
8872         hba->clk_gating.is_suspended = true;
8873
8874         if (ufshcd_is_clkscaling_supported(hba))
8875                 ufshcd_clk_scaling_suspend(hba, true);
8876
8877         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8878                         req_link_state == UIC_LINK_ACTIVE_STATE) {
8879                 goto vops_suspend;
8880         }
8881
8882         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8883             (req_link_state == hba->uic_link_state))
8884                 goto enable_scaling;
8885
8886         /* UFS device & link must be active before we enter in this function */
8887         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8888                 ret = -EINVAL;
8889                 goto enable_scaling;
8890         }
8891
8892         if (pm_op == UFS_RUNTIME_PM) {
8893                 if (ufshcd_can_autobkops_during_suspend(hba)) {
8894                         /*
8895                          * The device is idle with no requests in the queue,
8896                          * allow background operations if bkops status shows
8897                          * that performance might be impacted.
8898                          */
8899                         ret = ufshcd_urgent_bkops(hba);
8900                         if (ret)
8901                                 goto enable_scaling;
8902                 } else {
8903                         /* make sure that auto bkops is disabled */
8904                         ufshcd_disable_auto_bkops(hba);
8905                 }
8906                 /*
8907                  * If device needs to do BKOP or WB buffer flush during
8908                  * Hibern8, keep device power mode as "active power mode"
8909                  * and VCC supply.
8910                  */
8911                 hba->dev_info.b_rpm_dev_flush_capable =
8912                         hba->auto_bkops_enabled ||
8913                         (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8914                         ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8915                         ufshcd_is_auto_hibern8_enabled(hba))) &&
8916                         ufshcd_wb_need_flush(hba));
8917         }
8918
8919         flush_work(&hba->eeh_work);
8920
8921         if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
8922                 if (pm_op != UFS_RUNTIME_PM)
8923                         /* ensure that bkops is disabled */
8924                         ufshcd_disable_auto_bkops(hba);
8925
8926                 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8927                         ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8928                         if (ret)
8929                                 goto enable_scaling;
8930                 }
8931         }
8932
8933         /*
8934          * In the case of DeepSleep, the device is expected to remain powered
8935          * with the link off, so do not check for bkops.
8936          */
8937         check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8938         ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
8939         if (ret)
8940                 goto set_dev_active;
8941
8942 vops_suspend:
8943         /*
8944          * Call vendor specific suspend callback. As these callbacks may access
8945          * vendor specific host controller register space call them before the
8946          * host clocks are ON.
8947          */
8948         ret = ufshcd_vops_suspend(hba, pm_op);
8949         if (ret)
8950                 goto set_link_active;
8951         goto out;
8952
8953 set_link_active:
8954         /*
8955          * Device hardware reset is required to exit DeepSleep. Also, for
8956          * DeepSleep, the link is off so host reset and restore will be done
8957          * further below.
8958          */
8959         if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8960                 ufshcd_device_reset(hba);
8961                 WARN_ON(!ufshcd_is_link_off(hba));
8962         }
8963         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8964                 ufshcd_set_link_active(hba);
8965         else if (ufshcd_is_link_off(hba))
8966                 ufshcd_host_reset_and_restore(hba);
8967 set_dev_active:
8968         /* Can also get here needing to exit DeepSleep */
8969         if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8970                 ufshcd_device_reset(hba);
8971                 ufshcd_host_reset_and_restore(hba);
8972         }
8973         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8974                 ufshcd_disable_auto_bkops(hba);
8975 enable_scaling:
8976         if (ufshcd_is_clkscaling_supported(hba))
8977                 ufshcd_clk_scaling_suspend(hba, false);
8978
8979         hba->dev_info.b_rpm_dev_flush_capable = false;
8980 out:
8981         if (hba->dev_info.b_rpm_dev_flush_capable) {
8982                 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
8983                         msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
8984         }
8985
8986         if (ret) {
8987                 ufshcd_update_evt_hist(hba, UFS_EVT_WL_SUSP_ERR, (u32)ret);
8988                 hba->clk_gating.is_suspended = false;
8989                 ufshcd_release(hba);
8990                 ufshpb_resume(hba);
8991         }
8992         hba->pm_op_in_progress = false;
8993         return ret;
8994 }
8995
8996 #ifdef CONFIG_PM
8997 static int __ufshcd_wl_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8998 {
8999         int ret;
9000         enum uic_link_state old_link_state = hba->uic_link_state;
9001
9002         hba->pm_op_in_progress = true;
9003
9004         /*
9005          * Call vendor specific resume callback. As these callbacks may access
9006          * vendor specific host controller register space call them when the
9007          * host clocks are ON.
9008          */
9009         ret = ufshcd_vops_resume(hba, pm_op);
9010         if (ret)
9011                 goto out;
9012
9013         /* For DeepSleep, the only supported option is to have the link off */
9014         WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
9015
9016         if (ufshcd_is_link_hibern8(hba)) {
9017                 ret = ufshcd_uic_hibern8_exit(hba);
9018                 if (!ret) {
9019                         ufshcd_set_link_active(hba);
9020                 } else {
9021                         dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
9022                                         __func__, ret);
9023                         goto vendor_suspend;
9024                 }
9025         } else if (ufshcd_is_link_off(hba)) {
9026                 /*
9027                  * A full initialization of the host and the device is
9028                  * required since the link was put to off during suspend.
9029                  * Note, in the case of DeepSleep, the device will exit
9030                  * DeepSleep due to device reset.
9031                  */
9032                 ret = ufshcd_reset_and_restore(hba);
9033                 /*
9034                  * ufshcd_reset_and_restore() should have already
9035                  * set the link state as active
9036                  */
9037                 if (ret || !ufshcd_is_link_active(hba))
9038                         goto vendor_suspend;
9039         }
9040
9041         if (!ufshcd_is_ufs_dev_active(hba)) {
9042                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
9043                 if (ret)
9044                         goto set_old_link_state;
9045         }
9046
9047         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
9048                 ufshcd_enable_auto_bkops(hba);
9049         else
9050                 /*
9051                  * If BKOPs operations are urgently needed at this moment then
9052                  * keep auto-bkops enabled or else disable it.
9053                  */
9054                 ufshcd_urgent_bkops(hba);
9055
9056         if (hba->ee_usr_mask)
9057                 ufshcd_write_ee_control(hba);
9058
9059         if (ufshcd_is_clkscaling_supported(hba))
9060                 ufshcd_clk_scaling_suspend(hba, false);
9061
9062         if (hba->dev_info.b_rpm_dev_flush_capable) {
9063                 hba->dev_info.b_rpm_dev_flush_capable = false;
9064                 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
9065         }
9066
9067         /* Enable Auto-Hibernate if configured */
9068         ufshcd_auto_hibern8_enable(hba);
9069
9070         ufshpb_resume(hba);
9071         goto out;
9072
9073 set_old_link_state:
9074         ufshcd_link_state_transition(hba, old_link_state, 0);
9075 vendor_suspend:
9076         ufshcd_vops_suspend(hba, pm_op);
9077 out:
9078         if (ret)
9079                 ufshcd_update_evt_hist(hba, UFS_EVT_WL_RES_ERR, (u32)ret);
9080         hba->clk_gating.is_suspended = false;
9081         ufshcd_release(hba);
9082         hba->pm_op_in_progress = false;
9083         return ret;
9084 }
9085
9086 static int ufshcd_wl_runtime_suspend(struct device *dev)
9087 {
9088         struct scsi_device *sdev = to_scsi_device(dev);
9089         struct ufs_hba *hba;
9090         int ret;
9091         ktime_t start = ktime_get();
9092
9093         hba = shost_priv(sdev->host);
9094
9095         ret = __ufshcd_wl_suspend(hba, UFS_RUNTIME_PM);
9096         if (ret)
9097                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9098
9099         trace_ufshcd_wl_runtime_suspend(dev_name(dev), ret,
9100                 ktime_to_us(ktime_sub(ktime_get(), start)),
9101                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9102
9103         return ret;
9104 }
9105
9106 static int ufshcd_wl_runtime_resume(struct device *dev)
9107 {
9108         struct scsi_device *sdev = to_scsi_device(dev);
9109         struct ufs_hba *hba;
9110         int ret = 0;
9111         ktime_t start = ktime_get();
9112
9113         hba = shost_priv(sdev->host);
9114
9115         ret = __ufshcd_wl_resume(hba, UFS_RUNTIME_PM);
9116         if (ret)
9117                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9118
9119         trace_ufshcd_wl_runtime_resume(dev_name(dev), ret,
9120                 ktime_to_us(ktime_sub(ktime_get(), start)),
9121                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9122
9123         return ret;
9124 }
9125 #endif
9126
9127 #ifdef CONFIG_PM_SLEEP
9128 static int ufshcd_wl_suspend(struct device *dev)
9129 {
9130         struct scsi_device *sdev = to_scsi_device(dev);
9131         struct ufs_hba *hba;
9132         int ret = 0;
9133         ktime_t start = ktime_get();
9134
9135         hba = shost_priv(sdev->host);
9136         down(&hba->host_sem);
9137
9138         if (pm_runtime_suspended(dev))
9139                 goto out;
9140
9141         ret = __ufshcd_wl_suspend(hba, UFS_SYSTEM_PM);
9142         if (ret) {
9143                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__,  ret);
9144                 up(&hba->host_sem);
9145         }
9146
9147 out:
9148         if (!ret)
9149                 hba->is_sys_suspended = true;
9150         trace_ufshcd_wl_suspend(dev_name(dev), ret,
9151                 ktime_to_us(ktime_sub(ktime_get(), start)),
9152                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9153
9154         return ret;
9155 }
9156
9157 static int ufshcd_wl_resume(struct device *dev)
9158 {
9159         struct scsi_device *sdev = to_scsi_device(dev);
9160         struct ufs_hba *hba;
9161         int ret = 0;
9162         ktime_t start = ktime_get();
9163
9164         hba = shost_priv(sdev->host);
9165
9166         if (pm_runtime_suspended(dev))
9167                 goto out;
9168
9169         ret = __ufshcd_wl_resume(hba, UFS_SYSTEM_PM);
9170         if (ret)
9171                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9172 out:
9173         trace_ufshcd_wl_resume(dev_name(dev), ret,
9174                 ktime_to_us(ktime_sub(ktime_get(), start)),
9175                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9176         if (!ret)
9177                 hba->is_sys_suspended = false;
9178         up(&hba->host_sem);
9179         return ret;
9180 }
9181 #endif
9182
9183 static void ufshcd_wl_shutdown(struct device *dev)
9184 {
9185         struct scsi_device *sdev = to_scsi_device(dev);
9186         struct ufs_hba *hba;
9187
9188         hba = shost_priv(sdev->host);
9189
9190         down(&hba->host_sem);
9191         hba->shutting_down = true;
9192         up(&hba->host_sem);
9193
9194         /* Turn on everything while shutting down */
9195         ufshcd_rpm_get_sync(hba);
9196         scsi_device_quiesce(sdev);
9197         shost_for_each_device(sdev, hba->host) {
9198                 if (sdev == hba->sdev_ufs_device)
9199                         continue;
9200                 scsi_device_quiesce(sdev);
9201         }
9202         __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9203 }
9204
9205 /**
9206  * ufshcd_suspend - helper function for suspend operations
9207  * @hba: per adapter instance
9208  *
9209  * This function will put disable irqs, turn off clocks
9210  * and set vreg and hba-vreg in lpm mode.
9211  */
9212 static int ufshcd_suspend(struct ufs_hba *hba)
9213 {
9214         int ret;
9215
9216         if (!hba->is_powered)
9217                 return 0;
9218         /*
9219          * Disable the host irq as host controller as there won't be any
9220          * host controller transaction expected till resume.
9221          */
9222         ufshcd_disable_irq(hba);
9223         ret = ufshcd_setup_clocks(hba, false);
9224         if (ret) {
9225                 ufshcd_enable_irq(hba);
9226                 return ret;
9227         }
9228         if (ufshcd_is_clkgating_allowed(hba)) {
9229                 hba->clk_gating.state = CLKS_OFF;
9230                 trace_ufshcd_clk_gating(dev_name(hba->dev),
9231                                         hba->clk_gating.state);
9232         }
9233
9234         ufshcd_vreg_set_lpm(hba);
9235         /* Put the host controller in low power mode if possible */
9236         ufshcd_hba_vreg_set_lpm(hba);
9237         return ret;
9238 }
9239
9240 /**
9241  * ufshcd_resume - helper function for resume operations
9242  * @hba: per adapter instance
9243  *
9244  * This function basically turns on the regulators, clocks and
9245  * irqs of the hba.
9246  *
9247  * Returns 0 for success and non-zero for failure
9248  */
9249 static int ufshcd_resume(struct ufs_hba *hba)
9250 {
9251         int ret;
9252
9253         if (!hba->is_powered)
9254                 return 0;
9255
9256         ufshcd_hba_vreg_set_hpm(hba);
9257         ret = ufshcd_vreg_set_hpm(hba);
9258         if (ret)
9259                 goto out;
9260
9261         /* Make sure clocks are enabled before accessing controller */
9262         ret = ufshcd_setup_clocks(hba, true);
9263         if (ret)
9264                 goto disable_vreg;
9265
9266         /* enable the host irq as host controller would be active soon */
9267         ufshcd_enable_irq(hba);
9268         goto out;
9269
9270 disable_vreg:
9271         ufshcd_vreg_set_lpm(hba);
9272 out:
9273         if (ret)
9274                 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
9275         return ret;
9276 }
9277
9278 /**
9279  * ufshcd_system_suspend - system suspend routine
9280  * @hba: per adapter instance
9281  *
9282  * Check the description of ufshcd_suspend() function for more details.
9283  *
9284  * Returns 0 for success and non-zero for failure
9285  */
9286 int ufshcd_system_suspend(struct ufs_hba *hba)
9287 {
9288         int ret = 0;
9289         ktime_t start = ktime_get();
9290
9291         if (pm_runtime_suspended(hba->dev))
9292                 goto out;
9293
9294         ret = ufshcd_suspend(hba);
9295 out:
9296         trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9297                 ktime_to_us(ktime_sub(ktime_get(), start)),
9298                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9299         return ret;
9300 }
9301 EXPORT_SYMBOL(ufshcd_system_suspend);
9302
9303 /**
9304  * ufshcd_system_resume - system resume routine
9305  * @hba: per adapter instance
9306  *
9307  * Returns 0 for success and non-zero for failure
9308  */
9309
9310 int ufshcd_system_resume(struct ufs_hba *hba)
9311 {
9312         int ret = 0;
9313         ktime_t start = ktime_get();
9314
9315         if (pm_runtime_suspended(hba->dev))
9316                 goto out;
9317
9318         ret = ufshcd_resume(hba);
9319
9320 out:
9321         trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9322                 ktime_to_us(ktime_sub(ktime_get(), start)),
9323                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9324
9325         return ret;
9326 }
9327 EXPORT_SYMBOL(ufshcd_system_resume);
9328
9329 /**
9330  * ufshcd_runtime_suspend - runtime suspend routine
9331  * @hba: per adapter instance
9332  *
9333  * Check the description of ufshcd_suspend() function for more details.
9334  *
9335  * Returns 0 for success and non-zero for failure
9336  */
9337 int ufshcd_runtime_suspend(struct ufs_hba *hba)
9338 {
9339         int ret;
9340         ktime_t start = ktime_get();
9341
9342         ret = ufshcd_suspend(hba);
9343
9344         trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9345                 ktime_to_us(ktime_sub(ktime_get(), start)),
9346                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9347         return ret;
9348 }
9349 EXPORT_SYMBOL(ufshcd_runtime_suspend);
9350
9351 /**
9352  * ufshcd_runtime_resume - runtime resume routine
9353  * @hba: per adapter instance
9354  *
9355  * This function basically brings controller
9356  * to active state. Following operations are done in this function:
9357  *
9358  * 1. Turn on all the controller related clocks
9359  * 2. Turn ON VCC rail
9360  */
9361 int ufshcd_runtime_resume(struct ufs_hba *hba)
9362 {
9363         int ret;
9364         ktime_t start = ktime_get();
9365
9366         ret = ufshcd_resume(hba);
9367
9368         trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9369                 ktime_to_us(ktime_sub(ktime_get(), start)),
9370                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9371         return ret;
9372 }
9373 EXPORT_SYMBOL(ufshcd_runtime_resume);
9374
9375 int ufshcd_runtime_idle(struct ufs_hba *hba)
9376 {
9377         return 0;
9378 }
9379 EXPORT_SYMBOL(ufshcd_runtime_idle);
9380
9381 /**
9382  * ufshcd_shutdown - shutdown routine
9383  * @hba: per adapter instance
9384  *
9385  * This function would turn off both UFS device and UFS hba
9386  * regulators. It would also disable clocks.
9387  *
9388  * Returns 0 always to allow force shutdown even in case of errors.
9389  */
9390 int ufshcd_shutdown(struct ufs_hba *hba)
9391 {
9392         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9393                 goto out;
9394
9395         pm_runtime_get_sync(hba->dev);
9396
9397         ufshcd_suspend(hba);
9398 out:
9399         hba->is_powered = false;
9400         /* allow force shutdown even in case of errors */
9401         return 0;
9402 }
9403 EXPORT_SYMBOL(ufshcd_shutdown);
9404
9405 /**
9406  * ufshcd_remove - de-allocate SCSI host and host memory space
9407  *              data structure memory
9408  * @hba: per adapter instance
9409  */
9410 void ufshcd_remove(struct ufs_hba *hba)
9411 {
9412         if (hba->sdev_ufs_device)
9413                 ufshcd_rpm_get_sync(hba);
9414         ufs_bsg_remove(hba);
9415         ufshpb_remove(hba);
9416         ufs_sysfs_remove_nodes(hba->dev);
9417         blk_cleanup_queue(hba->tmf_queue);
9418         blk_mq_free_tag_set(&hba->tmf_tag_set);
9419         blk_cleanup_queue(hba->cmd_queue);
9420         scsi_remove_host(hba->host);
9421         /* disable interrupts */
9422         ufshcd_disable_intr(hba, hba->intr_mask);
9423         ufshcd_hba_stop(hba);
9424         ufshcd_hba_exit(hba);
9425 }
9426 EXPORT_SYMBOL_GPL(ufshcd_remove);
9427
9428 /**
9429  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9430  * @hba: pointer to Host Bus Adapter (HBA)
9431  */
9432 void ufshcd_dealloc_host(struct ufs_hba *hba)
9433 {
9434         scsi_host_put(hba->host);
9435 }
9436 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9437
9438 /**
9439  * ufshcd_set_dma_mask - Set dma mask based on the controller
9440  *                       addressing capability
9441  * @hba: per adapter instance
9442  *
9443  * Returns 0 for success, non-zero for failure
9444  */
9445 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9446 {
9447         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9448                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9449                         return 0;
9450         }
9451         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9452 }
9453
9454 /**
9455  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
9456  * @dev: pointer to device handle
9457  * @hba_handle: driver private handle
9458  * Returns 0 on success, non-zero value on failure
9459  */
9460 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
9461 {
9462         struct Scsi_Host *host;
9463         struct ufs_hba *hba;
9464         int err = 0;
9465
9466         if (!dev) {
9467                 dev_err(dev,
9468                 "Invalid memory reference for dev is NULL\n");
9469                 err = -ENODEV;
9470                 goto out_error;
9471         }
9472
9473         host = scsi_host_alloc(&ufshcd_driver_template,
9474                                 sizeof(struct ufs_hba));
9475         if (!host) {
9476                 dev_err(dev, "scsi_host_alloc failed\n");
9477                 err = -ENOMEM;
9478                 goto out_error;
9479         }
9480         hba = shost_priv(host);
9481         hba->host = host;
9482         hba->dev = dev;
9483         *hba_handle = hba;
9484         hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
9485
9486         INIT_LIST_HEAD(&hba->clk_list_head);
9487
9488 out_error:
9489         return err;
9490 }
9491 EXPORT_SYMBOL(ufshcd_alloc_host);
9492
9493 /* This function exists because blk_mq_alloc_tag_set() requires this. */
9494 static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9495                                      const struct blk_mq_queue_data *qd)
9496 {
9497         WARN_ON_ONCE(true);
9498         return BLK_STS_NOTSUPP;
9499 }
9500
9501 static const struct blk_mq_ops ufshcd_tmf_ops = {
9502         .queue_rq = ufshcd_queue_tmf,
9503 };
9504
9505 /**
9506  * ufshcd_init - Driver initialization routine
9507  * @hba: per-adapter instance
9508  * @mmio_base: base register address
9509  * @irq: Interrupt line of device
9510  * Returns 0 on success, non-zero value on failure
9511  */
9512 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9513 {
9514         int err;
9515         struct Scsi_Host *host = hba->host;
9516         struct device *dev = hba->dev;
9517         char eh_wq_name[sizeof("ufs_eh_wq_00")];
9518
9519         if (!mmio_base) {
9520                 dev_err(hba->dev,
9521                 "Invalid memory reference for mmio_base is NULL\n");
9522                 err = -ENODEV;
9523                 goto out_error;
9524         }
9525
9526         hba->mmio_base = mmio_base;
9527         hba->irq = irq;
9528         hba->vps = &ufs_hba_vps;
9529
9530         err = ufshcd_hba_init(hba);
9531         if (err)
9532                 goto out_error;
9533
9534         /* Read capabilities registers */
9535         err = ufshcd_hba_capabilities(hba);
9536         if (err)
9537                 goto out_disable;
9538
9539         /* Get UFS version supported by the controller */
9540         hba->ufs_version = ufshcd_get_ufs_version(hba);
9541
9542         /* Get Interrupt bit mask per version */
9543         hba->intr_mask = ufshcd_get_intr_mask(hba);
9544
9545         err = ufshcd_set_dma_mask(hba);
9546         if (err) {
9547                 dev_err(hba->dev, "set dma mask failed\n");
9548                 goto out_disable;
9549         }
9550
9551         /* Allocate memory for host memory space */
9552         err = ufshcd_memory_alloc(hba);
9553         if (err) {
9554                 dev_err(hba->dev, "Memory allocation failed\n");
9555                 goto out_disable;
9556         }
9557
9558         /* Configure LRB */
9559         ufshcd_host_memory_configure(hba);
9560
9561         host->can_queue = hba->nutrs;
9562         host->cmd_per_lun = hba->nutrs;
9563         host->max_id = UFSHCD_MAX_ID;
9564         host->max_lun = UFS_MAX_LUNS;
9565         host->max_channel = UFSHCD_MAX_CHANNEL;
9566         host->unique_id = host->host_no;
9567         host->max_cmd_len = UFS_CDB_SIZE;
9568
9569         hba->max_pwr_info.is_valid = false;
9570
9571         /* Initialize work queues */
9572         snprintf(eh_wq_name, sizeof(eh_wq_name), "ufs_eh_wq_%d",
9573                  hba->host->host_no);
9574         hba->eh_wq = create_singlethread_workqueue(eh_wq_name);
9575         if (!hba->eh_wq) {
9576                 dev_err(hba->dev, "%s: failed to create eh workqueue\n",
9577                                 __func__);
9578                 err = -ENOMEM;
9579                 goto out_disable;
9580         }
9581         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
9582         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
9583
9584         sema_init(&hba->host_sem, 1);
9585
9586         /* Initialize UIC command mutex */
9587         mutex_init(&hba->uic_cmd_mutex);
9588
9589         /* Initialize mutex for device management commands */
9590         mutex_init(&hba->dev_cmd.lock);
9591
9592         /* Initialize mutex for exception event control */
9593         mutex_init(&hba->ee_ctrl_mutex);
9594
9595         init_rwsem(&hba->clk_scaling_lock);
9596
9597         ufshcd_init_clk_gating(hba);
9598
9599         ufshcd_init_clk_scaling(hba);
9600
9601         /*
9602          * In order to avoid any spurious interrupt immediately after
9603          * registering UFS controller interrupt handler, clear any pending UFS
9604          * interrupt status and disable all the UFS interrupts.
9605          */
9606         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9607                       REG_INTERRUPT_STATUS);
9608         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9609         /*
9610          * Make sure that UFS interrupts are disabled and any pending interrupt
9611          * status is cleared before registering UFS interrupt handler.
9612          */
9613         mb();
9614
9615         /* IRQ registration */
9616         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
9617         if (err) {
9618                 dev_err(hba->dev, "request irq failed\n");
9619                 goto out_disable;
9620         } else {
9621                 hba->is_irq_enabled = true;
9622         }
9623
9624         err = scsi_add_host(host, hba->dev);
9625         if (err) {
9626                 dev_err(hba->dev, "scsi_add_host failed\n");
9627                 goto out_disable;
9628         }
9629
9630         hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9631         if (IS_ERR(hba->cmd_queue)) {
9632                 err = PTR_ERR(hba->cmd_queue);
9633                 goto out_remove_scsi_host;
9634         }
9635
9636         hba->tmf_tag_set = (struct blk_mq_tag_set) {
9637                 .nr_hw_queues   = 1,
9638                 .queue_depth    = hba->nutmrs,
9639                 .ops            = &ufshcd_tmf_ops,
9640                 .flags          = BLK_MQ_F_NO_SCHED,
9641         };
9642         err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9643         if (err < 0)
9644                 goto free_cmd_queue;
9645         hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9646         if (IS_ERR(hba->tmf_queue)) {
9647                 err = PTR_ERR(hba->tmf_queue);
9648                 goto free_tmf_tag_set;
9649         }
9650
9651         /* Reset the attached device */
9652         ufshcd_device_reset(hba);
9653
9654         ufshcd_init_crypto(hba);
9655
9656         /* Host controller enable */
9657         err = ufshcd_hba_enable(hba);
9658         if (err) {
9659                 dev_err(hba->dev, "Host controller enable failed\n");
9660                 ufshcd_print_evt_hist(hba);
9661                 ufshcd_print_host_state(hba);
9662                 goto free_tmf_queue;
9663         }
9664
9665         /*
9666          * Set the default power management level for runtime and system PM.
9667          * Default power saving mode is to keep UFS link in Hibern8 state
9668          * and UFS device in sleep state.
9669          */
9670         hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9671                                                 UFS_SLEEP_PWR_MODE,
9672                                                 UIC_LINK_HIBERN8_STATE);
9673         hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9674                                                 UFS_SLEEP_PWR_MODE,
9675                                                 UIC_LINK_HIBERN8_STATE);
9676
9677         INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9678                           ufshcd_rpm_dev_flush_recheck_work);
9679
9680         /* Set the default auto-hiberate idle timer value to 150 ms */
9681         if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
9682                 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9683                             FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9684         }
9685
9686         /* Hold auto suspend until async scan completes */
9687         pm_runtime_get_sync(dev);
9688         atomic_set(&hba->scsi_block_reqs_cnt, 0);
9689         /*
9690          * We are assuming that device wasn't put in sleep/power-down
9691          * state exclusively during the boot stage before kernel.
9692          * This assumption helps avoid doing link startup twice during
9693          * ufshcd_probe_hba().
9694          */
9695         ufshcd_set_ufs_dev_active(hba);
9696
9697         async_schedule(ufshcd_async_scan, hba);
9698         ufs_sysfs_add_nodes(hba->dev);
9699
9700         device_enable_async_suspend(dev);
9701         return 0;
9702
9703 free_tmf_queue:
9704         blk_cleanup_queue(hba->tmf_queue);
9705 free_tmf_tag_set:
9706         blk_mq_free_tag_set(&hba->tmf_tag_set);
9707 free_cmd_queue:
9708         blk_cleanup_queue(hba->cmd_queue);
9709 out_remove_scsi_host:
9710         scsi_remove_host(hba->host);
9711 out_disable:
9712         hba->is_irq_enabled = false;
9713         ufshcd_hba_exit(hba);
9714 out_error:
9715         return err;
9716 }
9717 EXPORT_SYMBOL_GPL(ufshcd_init);
9718
9719 void ufshcd_resume_complete(struct device *dev)
9720 {
9721         struct ufs_hba *hba = dev_get_drvdata(dev);
9722
9723         if (hba->complete_put) {
9724                 ufshcd_rpm_put(hba);
9725                 hba->complete_put = false;
9726         }
9727         if (hba->rpmb_complete_put) {
9728                 ufshcd_rpmb_rpm_put(hba);
9729                 hba->rpmb_complete_put = false;
9730         }
9731 }
9732 EXPORT_SYMBOL_GPL(ufshcd_resume_complete);
9733
9734 int ufshcd_suspend_prepare(struct device *dev)
9735 {
9736         struct ufs_hba *hba = dev_get_drvdata(dev);
9737         int ret;
9738
9739         /*
9740          * SCSI assumes that runtime-pm and system-pm for scsi drivers
9741          * are same. And it doesn't wake up the device for system-suspend
9742          * if it's runtime suspended. But ufs doesn't follow that.
9743          * Refer ufshcd_resume_complete()
9744          */
9745         if (hba->sdev_ufs_device) {
9746                 ret = ufshcd_rpm_get_sync(hba);
9747                 if (ret < 0 && ret != -EACCES) {
9748                         ufshcd_rpm_put(hba);
9749                         return ret;
9750                 }
9751                 hba->complete_put = true;
9752         }
9753         if (hba->sdev_rpmb) {
9754                 ufshcd_rpmb_rpm_get_sync(hba);
9755                 hba->rpmb_complete_put = true;
9756         }
9757         return 0;
9758 }
9759 EXPORT_SYMBOL_GPL(ufshcd_suspend_prepare);
9760
9761 #ifdef CONFIG_PM_SLEEP
9762 static int ufshcd_wl_poweroff(struct device *dev)
9763 {
9764         struct scsi_device *sdev = to_scsi_device(dev);
9765         struct ufs_hba *hba = shost_priv(sdev->host);
9766
9767         __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9768         return 0;
9769 }
9770 #endif
9771
9772 static int ufshcd_wl_probe(struct device *dev)
9773 {
9774         struct scsi_device *sdev = to_scsi_device(dev);
9775
9776         if (!is_device_wlun(sdev))
9777                 return -ENODEV;
9778
9779         blk_pm_runtime_init(sdev->request_queue, dev);
9780         pm_runtime_set_autosuspend_delay(dev, 0);
9781         pm_runtime_allow(dev);
9782
9783         return  0;
9784 }
9785
9786 static int ufshcd_wl_remove(struct device *dev)
9787 {
9788         pm_runtime_forbid(dev);
9789         return 0;
9790 }
9791
9792 static const struct dev_pm_ops ufshcd_wl_pm_ops = {
9793 #ifdef CONFIG_PM_SLEEP
9794         .suspend = ufshcd_wl_suspend,
9795         .resume = ufshcd_wl_resume,
9796         .freeze = ufshcd_wl_suspend,
9797         .thaw = ufshcd_wl_resume,
9798         .poweroff = ufshcd_wl_poweroff,
9799         .restore = ufshcd_wl_resume,
9800 #endif
9801         SET_RUNTIME_PM_OPS(ufshcd_wl_runtime_suspend, ufshcd_wl_runtime_resume, NULL)
9802 };
9803
9804 /*
9805  * ufs_dev_wlun_template - describes ufs device wlun
9806  * ufs-device wlun - used to send pm commands
9807  * All luns are consumers of ufs-device wlun.
9808  *
9809  * Currently, no sd driver is present for wluns.
9810  * Hence the no specific pm operations are performed.
9811  * With ufs design, SSU should be sent to ufs-device wlun.
9812  * Hence register a scsi driver for ufs wluns only.
9813  */
9814 static struct scsi_driver ufs_dev_wlun_template = {
9815         .gendrv = {
9816                 .name = "ufs_device_wlun",
9817                 .owner = THIS_MODULE,
9818                 .probe = ufshcd_wl_probe,
9819                 .remove = ufshcd_wl_remove,
9820                 .pm = &ufshcd_wl_pm_ops,
9821                 .shutdown = ufshcd_wl_shutdown,
9822         },
9823 };
9824
9825 static int ufshcd_rpmb_probe(struct device *dev)
9826 {
9827         return is_rpmb_wlun(to_scsi_device(dev)) ? 0 : -ENODEV;
9828 }
9829
9830 static inline int ufshcd_clear_rpmb_uac(struct ufs_hba *hba)
9831 {
9832         int ret = 0;
9833
9834         if (!hba->wlun_rpmb_clr_ua)
9835                 return 0;
9836         ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
9837         if (!ret)
9838                 hba->wlun_rpmb_clr_ua = 0;
9839         return ret;
9840 }
9841
9842 #ifdef CONFIG_PM
9843 static int ufshcd_rpmb_resume(struct device *dev)
9844 {
9845         struct ufs_hba *hba = wlun_dev_to_hba(dev);
9846
9847         if (hba->sdev_rpmb)
9848                 ufshcd_clear_rpmb_uac(hba);
9849         return 0;
9850 }
9851 #endif
9852
9853 static const struct dev_pm_ops ufs_rpmb_pm_ops = {
9854         SET_RUNTIME_PM_OPS(NULL, ufshcd_rpmb_resume, NULL)
9855         SET_SYSTEM_SLEEP_PM_OPS(NULL, ufshcd_rpmb_resume)
9856 };
9857
9858 /* ufs_rpmb_wlun_template - Describes UFS RPMB WLUN. Used only to send UAC. */
9859 static struct scsi_driver ufs_rpmb_wlun_template = {
9860         .gendrv = {
9861                 .name = "ufs_rpmb_wlun",
9862                 .owner = THIS_MODULE,
9863                 .probe = ufshcd_rpmb_probe,
9864                 .pm = &ufs_rpmb_pm_ops,
9865         },
9866 };
9867
9868 static int __init ufshcd_core_init(void)
9869 {
9870         int ret;
9871
9872         ufs_debugfs_init();
9873
9874         ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
9875         if (ret)
9876                 goto debugfs_exit;
9877
9878         ret = scsi_register_driver(&ufs_rpmb_wlun_template.gendrv);
9879         if (ret)
9880                 goto unregister;
9881
9882         return ret;
9883 unregister:
9884         scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9885 debugfs_exit:
9886         ufs_debugfs_exit();
9887         return ret;
9888 }
9889
9890 static void __exit ufshcd_core_exit(void)
9891 {
9892         ufs_debugfs_exit();
9893         scsi_unregister_driver(&ufs_rpmb_wlun_template.gendrv);
9894         scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9895 }
9896
9897 module_init(ufshcd_core_init);
9898 module_exit(ufshcd_core_exit);
9899
9900 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9901 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
9902 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
9903 MODULE_LICENSE("GPL");
9904 MODULE_VERSION(UFSHCD_DRIVER_VERSION);