2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
5 * See LICENSE.qla4xxx for copyright and licensing details.
8 #include <linux/ctype.h>
12 #include "ql4_inline.h"
13 #include "ql4_version.h"
15 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd,
20 /* Load all mailbox registers, except mailbox 0. */
21 for (i = 1; i < in_count; i++)
22 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
25 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
26 readl(&ha->reg->mailbox[0]);
27 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
28 readl(&ha->reg->ctrl_status);
31 void qla4xxx_process_mbox_intr(struct scsi_qla_host *ha, int out_count)
35 intr_status = readl(&ha->reg->ctrl_status);
36 if (intr_status & INTR_PENDING) {
38 * Service the interrupt.
39 * The ISR will save the mailbox status registers
40 * to a temporary storage location in the adapter structure.
42 ha->mbox_status_count = out_count;
43 ha->isp_ops->interrupt_service_routine(ha, intr_status);
48 * qla4xxx_is_intr_poll_mode – Are we allowed to poll for interrupts?
49 * @ha: Pointer to host adapter structure.
50 * returns: 1=polling mode, 0=non-polling mode
52 static int qla4xxx_is_intr_poll_mode(struct scsi_qla_host *ha)
56 if (is_qla8032(ha) || is_qla8042(ha)) {
57 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
58 test_bit(AF_83XX_MBOX_INTR_ON, &ha->flags))
61 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
62 test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
63 test_bit(AF_ONLINE, &ha->flags) &&
64 !test_bit(AF_HA_REMOVAL, &ha->flags))
72 * qla4xxx_mailbox_command - issues mailbox commands
73 * @ha: Pointer to host adapter structure.
74 * @inCount: number of mailbox registers to load.
75 * @outCount: number of mailbox registers to return.
76 * @mbx_cmd: data pointer for mailbox in registers.
77 * @mbx_sts: data pointer for mailbox out registers.
79 * This routine issue mailbox commands and waits for completion.
80 * If outCount is 0, this routine completes successfully WITHOUT waiting
81 * for the mailbox command to complete.
83 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
84 uint8_t outCount, uint32_t *mbx_cmd,
87 int status = QLA_ERROR;
90 unsigned long flags = 0;
93 /* Make sure that pointers are valid */
94 if (!mbx_cmd || !mbx_sts) {
95 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
96 "pointer\n", ha->host_no, __func__));
100 if (is_qla40XX(ha)) {
101 if (test_bit(AF_HA_REMOVAL, &ha->flags)) {
102 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
103 "prematurely completing mbx cmd as "
104 "adapter removal detected\n",
105 ha->host_no, __func__));
110 if ((is_aer_supported(ha)) &&
111 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
112 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
113 "timeout MBX Exiting.\n", ha->host_no, __func__));
117 /* Mailbox code active */
118 wait_count = MBOX_TOV * 100;
120 while (wait_count--) {
121 mutex_lock(&ha->mbox_sem);
122 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
123 set_bit(AF_MBOX_COMMAND, &ha->flags);
124 mutex_unlock(&ha->mbox_sem);
127 mutex_unlock(&ha->mbox_sem);
129 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
130 ha->host_no, __func__));
136 if (is_qla80XX(ha)) {
137 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
138 DEBUG2(ql4_printk(KERN_WARNING, ha,
139 "scsi%ld: %s: prematurely completing mbx cmd as firmware recovery detected\n",
140 ha->host_no, __func__));
143 /* Do not send any mbx cmd if h/w is in failed state*/
144 ha->isp_ops->idc_lock(ha);
145 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE);
146 ha->isp_ops->idc_unlock(ha);
147 if (dev_state == QLA8XXX_DEV_FAILED) {
148 ql4_printk(KERN_WARNING, ha,
149 "scsi%ld: %s: H/W is in failed state, do not send any mailbox commands\n",
150 ha->host_no, __func__);
155 spin_lock_irqsave(&ha->hardware_lock, flags);
157 ha->mbox_status_count = outCount;
158 for (i = 0; i < outCount; i++)
159 ha->mbox_status[i] = 0;
161 /* Queue the mailbox command to the firmware */
162 ha->isp_ops->queue_mailbox_command(ha, mbx_cmd, inCount);
164 spin_unlock_irqrestore(&ha->hardware_lock, flags);
166 /* Wait for completion */
169 * If we don't want status, don't wait for the mailbox command to
170 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
171 * you must poll the inbound Interrupt Mask for completion.
174 status = QLA_SUCCESS;
179 * Wait for completion: Poll or completion queue
181 if (qla4xxx_is_intr_poll_mode(ha)) {
182 /* Poll for command to complete */
183 wait_count = jiffies + MBOX_TOV * HZ;
184 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
185 if (time_after_eq(jiffies, wait_count))
188 * Service the interrupt.
189 * The ISR will save the mailbox status registers
190 * to a temporary storage location in the adapter
193 spin_lock_irqsave(&ha->hardware_lock, flags);
194 ha->isp_ops->process_mailbox_interrupt(ha, outCount);
195 spin_unlock_irqrestore(&ha->hardware_lock, flags);
199 /* Do not poll for completion. Use completion queue */
200 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
201 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
202 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
205 /* Check for mailbox timeout. */
206 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
207 if (is_qla80XX(ha) &&
208 test_bit(AF_FW_RECOVERY, &ha->flags)) {
209 DEBUG2(ql4_printk(KERN_INFO, ha,
210 "scsi%ld: %s: prematurely completing mbx cmd as "
211 "firmware recovery detected\n",
212 ha->host_no, __func__));
215 ql4_printk(KERN_WARNING, ha, "scsi%ld: Mailbox Cmd 0x%08X timed out, Scheduling Adapter Reset\n",
216 ha->host_no, mbx_cmd[0]);
217 ha->mailbox_timeout_count++;
219 set_bit(DPC_RESET_HA, &ha->dpc_flags);
220 if (is_qla8022(ha)) {
221 ql4_printk(KERN_INFO, ha,
222 "disabling pause transmit on port 0 & 1.\n");
223 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98,
224 CRB_NIU_XG_PAUSE_CTL_P0 |
225 CRB_NIU_XG_PAUSE_CTL_P1);
226 } else if (is_qla8032(ha) || is_qla8042(ha)) {
227 ql4_printk(KERN_INFO, ha, " %s: disabling pause transmit on port 0 & 1.\n",
229 qla4_83xx_disable_pause(ha);
235 * Copy the mailbox out registers to the caller's mailbox in/out
238 spin_lock_irqsave(&ha->hardware_lock, flags);
239 for (i = 0; i < outCount; i++)
240 mbx_sts[i] = ha->mbox_status[i];
242 /* Set return status and error flags (if applicable). */
243 switch (ha->mbox_status[0]) {
244 case MBOX_STS_COMMAND_COMPLETE:
245 status = QLA_SUCCESS;
248 case MBOX_STS_INTERMEDIATE_COMPLETION:
249 status = QLA_SUCCESS;
253 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
254 ha->host_no, __func__, mbx_cmd[0]);
255 ha->mailbox_timeout_count++;
259 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: FAILED, MBOX CMD = %08X, MBOX STS = %08X %08X %08X %08X %08X %08X %08X %08X\n",
260 ha->host_no, __func__, mbx_cmd[0], mbx_sts[0],
261 mbx_sts[1], mbx_sts[2], mbx_sts[3], mbx_sts[4],
262 mbx_sts[5], mbx_sts[6], mbx_sts[7]);
265 spin_unlock_irqrestore(&ha->hardware_lock, flags);
268 mutex_lock(&ha->mbox_sem);
269 clear_bit(AF_MBOX_COMMAND, &ha->flags);
270 mutex_unlock(&ha->mbox_sem);
271 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
277 * qla4xxx_get_minidump_template - Get the firmware template
278 * @ha: Pointer to host adapter structure.
279 * @phys_addr: dma address for template
281 * Obtain the minidump template from firmware during initialization
282 * as it may not be available when minidump is desired.
284 int qla4xxx_get_minidump_template(struct scsi_qla_host *ha,
285 dma_addr_t phys_addr)
287 uint32_t mbox_cmd[MBOX_REG_COUNT];
288 uint32_t mbox_sts[MBOX_REG_COUNT];
291 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
292 memset(&mbox_sts, 0, sizeof(mbox_sts));
294 mbox_cmd[0] = MBOX_CMD_MINIDUMP;
295 mbox_cmd[1] = MINIDUMP_GET_TMPLT_SUBCOMMAND;
296 mbox_cmd[2] = LSDW(phys_addr);
297 mbox_cmd[3] = MSDW(phys_addr);
298 mbox_cmd[4] = ha->fw_dump_tmplt_size;
301 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
303 if (status != QLA_SUCCESS) {
304 DEBUG2(ql4_printk(KERN_INFO, ha,
305 "scsi%ld: %s: Cmd = %08X, mbx[0] = 0x%04x, mbx[1] = 0x%04x\n",
306 ha->host_no, __func__, mbox_cmd[0],
307 mbox_sts[0], mbox_sts[1]));
313 * qla4xxx_req_template_size - Get minidump template size from firmware.
314 * @ha: Pointer to host adapter structure.
316 int qla4xxx_req_template_size(struct scsi_qla_host *ha)
318 uint32_t mbox_cmd[MBOX_REG_COUNT];
319 uint32_t mbox_sts[MBOX_REG_COUNT];
322 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
323 memset(&mbox_sts, 0, sizeof(mbox_sts));
325 mbox_cmd[0] = MBOX_CMD_MINIDUMP;
326 mbox_cmd[1] = MINIDUMP_GET_SIZE_SUBCOMMAND;
328 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0],
330 if (status == QLA_SUCCESS) {
331 ha->fw_dump_tmplt_size = mbox_sts[1];
332 DEBUG2(ql4_printk(KERN_INFO, ha,
333 "%s: sts[0]=0x%04x, template size=0x%04x, size_cm_02=0x%04x, size_cm_04=0x%04x, size_cm_08=0x%04x, size_cm_10=0x%04x, size_cm_FF=0x%04x, version=0x%04x\n",
334 __func__, mbox_sts[0], mbox_sts[1],
335 mbox_sts[2], mbox_sts[3], mbox_sts[4],
336 mbox_sts[5], mbox_sts[6], mbox_sts[7]));
337 if (ha->fw_dump_tmplt_size == 0)
340 ql4_printk(KERN_WARNING, ha,
341 "%s: Error sts[0]=0x%04x, mbx[1]=0x%04x\n",
342 __func__, mbox_sts[0], mbox_sts[1]);
349 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
351 set_bit(AF_FW_RECOVERY, &ha->flags);
352 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
353 ha->host_no, __func__);
355 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
356 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
357 complete(&ha->mbx_intr_comp);
358 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
359 "recovery, doing premature completion of "
360 "mbx cmd\n", ha->host_no, __func__);
363 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
364 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
365 "recovery, doing premature completion of "
366 "polling mbx cmd\n", ha->host_no, __func__);
372 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
373 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
375 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
376 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
379 qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, 0);
381 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
383 mbox_cmd[2] = LSDW(init_fw_cb_dma);
384 mbox_cmd[3] = MSDW(init_fw_cb_dma);
385 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
387 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
389 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
390 "MBOX_CMD_INITIALIZE_FIRMWARE"
391 " failed w/ status %04X\n",
392 ha->host_no, __func__, mbox_sts[0]));
399 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
400 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
402 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
403 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
404 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
405 mbox_cmd[2] = LSDW(init_fw_cb_dma);
406 mbox_cmd[3] = MSDW(init_fw_cb_dma);
407 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
409 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
411 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
412 "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
413 " failed w/ status %04X\n",
414 ha->host_no, __func__, mbox_sts[0]));
420 uint8_t qla4xxx_set_ipaddr_state(uint8_t fw_ipaddr_state)
422 uint8_t ipaddr_state;
424 switch (fw_ipaddr_state) {
425 case IP_ADDRSTATE_UNCONFIGURED:
426 ipaddr_state = ISCSI_IPDDRESS_STATE_UNCONFIGURED;
428 case IP_ADDRSTATE_INVALID:
429 ipaddr_state = ISCSI_IPDDRESS_STATE_INVALID;
431 case IP_ADDRSTATE_ACQUIRING:
432 ipaddr_state = ISCSI_IPDDRESS_STATE_ACQUIRING;
434 case IP_ADDRSTATE_TENTATIVE:
435 ipaddr_state = ISCSI_IPDDRESS_STATE_TENTATIVE;
437 case IP_ADDRSTATE_DEPRICATED:
438 ipaddr_state = ISCSI_IPDDRESS_STATE_DEPRECATED;
440 case IP_ADDRSTATE_PREFERRED:
441 ipaddr_state = ISCSI_IPDDRESS_STATE_VALID;
443 case IP_ADDRSTATE_DISABLING:
444 ipaddr_state = ISCSI_IPDDRESS_STATE_DISABLING;
447 ipaddr_state = ISCSI_IPDDRESS_STATE_UNCONFIGURED;
453 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
454 struct addr_ctrl_blk *init_fw_cb)
456 ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
457 ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
458 ha->ip_config.ipv4_addr_state =
459 qla4xxx_set_ipaddr_state(init_fw_cb->ipv4_addr_state);
460 ha->ip_config.eth_mtu_size =
461 le16_to_cpu(init_fw_cb->eth_mtu_size);
462 ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port);
464 if (ha->acb_version == ACB_SUPPORTED) {
465 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts);
466 ha->ip_config.ipv6_addl_options =
467 le16_to_cpu(init_fw_cb->ipv6_addtl_opts);
468 ha->ip_config.ipv6_tcp_options =
469 le16_to_cpu(init_fw_cb->ipv6_tcp_opts);
472 /* Save IPv4 Address Info */
473 memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr,
474 min(sizeof(ha->ip_config.ip_address),
475 sizeof(init_fw_cb->ipv4_addr)));
476 memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet,
477 min(sizeof(ha->ip_config.subnet_mask),
478 sizeof(init_fw_cb->ipv4_subnet)));
479 memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr,
480 min(sizeof(ha->ip_config.gateway),
481 sizeof(init_fw_cb->ipv4_gw_addr)));
483 ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag);
484 ha->ip_config.control = init_fw_cb->control;
485 ha->ip_config.tcp_wsf = init_fw_cb->ipv4_tcp_wsf;
486 ha->ip_config.ipv4_tos = init_fw_cb->ipv4_tos;
487 ha->ip_config.ipv4_cache_id = init_fw_cb->ipv4_cacheid;
488 ha->ip_config.ipv4_alt_cid_len = init_fw_cb->ipv4_dhcp_alt_cid_len;
489 memcpy(ha->ip_config.ipv4_alt_cid, init_fw_cb->ipv4_dhcp_alt_cid,
490 min(sizeof(ha->ip_config.ipv4_alt_cid),
491 sizeof(init_fw_cb->ipv4_dhcp_alt_cid)));
492 ha->ip_config.ipv4_vid_len = init_fw_cb->ipv4_dhcp_vid_len;
493 memcpy(ha->ip_config.ipv4_vid, init_fw_cb->ipv4_dhcp_vid,
494 min(sizeof(ha->ip_config.ipv4_vid),
495 sizeof(init_fw_cb->ipv4_dhcp_vid)));
496 ha->ip_config.ipv4_ttl = init_fw_cb->ipv4_ttl;
497 ha->ip_config.def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
498 ha->ip_config.abort_timer = init_fw_cb->abort_timer;
499 ha->ip_config.iscsi_options = le16_to_cpu(init_fw_cb->iscsi_opts);
500 ha->ip_config.iscsi_max_pdu_size =
501 le16_to_cpu(init_fw_cb->iscsi_max_pdu_size);
502 ha->ip_config.iscsi_first_burst_len =
503 le16_to_cpu(init_fw_cb->iscsi_fburst_len);
504 ha->ip_config.iscsi_max_outstnd_r2t =
505 le16_to_cpu(init_fw_cb->iscsi_max_outstnd_r2t);
506 ha->ip_config.iscsi_max_burst_len =
507 le16_to_cpu(init_fw_cb->iscsi_max_burst_len);
508 memcpy(ha->ip_config.iscsi_name, init_fw_cb->iscsi_name,
509 min(sizeof(ha->ip_config.iscsi_name),
510 sizeof(init_fw_cb->iscsi_name)));
512 if (is_ipv6_enabled(ha)) {
513 /* Save IPv6 Address */
514 ha->ip_config.ipv6_link_local_state =
515 qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_lnk_lcl_addr_state);
516 ha->ip_config.ipv6_addr0_state =
517 qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_addr0_state);
518 ha->ip_config.ipv6_addr1_state =
519 qla4xxx_set_ipaddr_state(init_fw_cb->ipv6_addr1_state);
521 switch (le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state)) {
522 case IPV6_RTRSTATE_UNKNOWN:
523 ha->ip_config.ipv6_default_router_state =
524 ISCSI_ROUTER_STATE_UNKNOWN;
526 case IPV6_RTRSTATE_MANUAL:
527 ha->ip_config.ipv6_default_router_state =
528 ISCSI_ROUTER_STATE_MANUAL;
530 case IPV6_RTRSTATE_ADVERTISED:
531 ha->ip_config.ipv6_default_router_state =
532 ISCSI_ROUTER_STATE_ADVERTISED;
534 case IPV6_RTRSTATE_STALE:
535 ha->ip_config.ipv6_default_router_state =
536 ISCSI_ROUTER_STATE_STALE;
539 ha->ip_config.ipv6_default_router_state =
540 ISCSI_ROUTER_STATE_UNKNOWN;
543 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
544 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
546 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8],
547 init_fw_cb->ipv6_if_id,
548 min(sizeof(ha->ip_config.ipv6_link_local_addr)/2,
549 sizeof(init_fw_cb->ipv6_if_id)));
550 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0,
551 min(sizeof(ha->ip_config.ipv6_addr0),
552 sizeof(init_fw_cb->ipv6_addr0)));
553 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1,
554 min(sizeof(ha->ip_config.ipv6_addr1),
555 sizeof(init_fw_cb->ipv6_addr1)));
556 memcpy(&ha->ip_config.ipv6_default_router_addr,
557 init_fw_cb->ipv6_dflt_rtr_addr,
558 min(sizeof(ha->ip_config.ipv6_default_router_addr),
559 sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
560 ha->ip_config.ipv6_vlan_tag =
561 be16_to_cpu(init_fw_cb->ipv6_vlan_tag);
562 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port);
563 ha->ip_config.ipv6_cache_id = init_fw_cb->ipv6_cache_id;
564 ha->ip_config.ipv6_flow_lbl =
565 le16_to_cpu(init_fw_cb->ipv6_flow_lbl);
566 ha->ip_config.ipv6_traffic_class =
567 init_fw_cb->ipv6_traffic_class;
568 ha->ip_config.ipv6_hop_limit = init_fw_cb->ipv6_hop_limit;
569 ha->ip_config.ipv6_nd_reach_time =
570 le32_to_cpu(init_fw_cb->ipv6_nd_reach_time);
571 ha->ip_config.ipv6_nd_rexmit_timer =
572 le32_to_cpu(init_fw_cb->ipv6_nd_rexmit_timer);
573 ha->ip_config.ipv6_nd_stale_timeout =
574 le32_to_cpu(init_fw_cb->ipv6_nd_stale_timeout);
575 ha->ip_config.ipv6_dup_addr_detect_count =
576 init_fw_cb->ipv6_dup_addr_detect_count;
577 ha->ip_config.ipv6_gw_advrt_mtu =
578 le32_to_cpu(init_fw_cb->ipv6_gw_advrt_mtu);
579 ha->ip_config.ipv6_tcp_wsf = init_fw_cb->ipv6_tcp_wsf;
584 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
587 struct addr_ctrl_blk *init_fw_cb,
588 dma_addr_t init_fw_cb_dma)
590 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
592 DEBUG2(printk(KERN_WARNING
593 "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
594 ha->host_no, __func__));
598 DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
600 /* Save some info in adapter structure. */
601 ha->acb_version = init_fw_cb->acb_version;
602 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
603 ha->heartbeat_interval = init_fw_cb->hb_interval;
604 memcpy(ha->name_string, init_fw_cb->iscsi_name,
605 min(sizeof(ha->name_string),
606 sizeof(init_fw_cb->iscsi_name)));
607 ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
608 /*memcpy(ha->alias, init_fw_cb->Alias,
609 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
611 qla4xxx_update_local_ip(ha, init_fw_cb);
617 * qla4xxx_initialize_fw_cb - initializes firmware control block.
618 * @ha: Pointer to host adapter structure.
620 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
622 struct addr_ctrl_blk *init_fw_cb;
623 dma_addr_t init_fw_cb_dma;
624 uint32_t mbox_cmd[MBOX_REG_COUNT];
625 uint32_t mbox_sts[MBOX_REG_COUNT];
626 int status = QLA_ERROR;
628 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
629 sizeof(struct addr_ctrl_blk),
630 &init_fw_cb_dma, GFP_KERNEL);
631 if (init_fw_cb == NULL) {
632 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
633 ha->host_no, __func__));
634 goto exit_init_fw_cb_no_free;
637 /* Get Initialize Firmware Control Block. */
638 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
639 memset(&mbox_sts, 0, sizeof(mbox_sts));
641 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
643 goto exit_init_fw_cb;
646 /* Fill in the request and response queue information. */
647 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
648 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
649 init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
650 init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
651 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
652 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
653 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
654 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
655 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
656 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
658 /* Set up required options. */
659 init_fw_cb->fw_options |=
660 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
661 FWOPT_INITIATOR_MODE);
664 init_fw_cb->fw_options |=
665 __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
667 init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
669 init_fw_cb->add_fw_options = 0;
670 init_fw_cb->add_fw_options |=
671 __constant_cpu_to_le16(ADFWOPT_SERIALIZE_TASK_MGMT);
672 init_fw_cb->add_fw_options |=
673 __constant_cpu_to_le16(ADFWOPT_AUTOCONN_DISABLE);
675 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
677 DEBUG2(printk(KERN_WARNING
678 "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
679 ha->host_no, __func__));
680 goto exit_init_fw_cb;
683 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
684 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
685 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
686 ha->host_no, __func__));
687 goto exit_init_fw_cb;
689 status = QLA_SUCCESS;
692 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
693 init_fw_cb, init_fw_cb_dma);
694 exit_init_fw_cb_no_free:
699 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
700 * @ha: Pointer to host adapter structure.
702 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
704 struct addr_ctrl_blk *init_fw_cb;
705 dma_addr_t init_fw_cb_dma;
706 uint32_t mbox_cmd[MBOX_REG_COUNT];
707 uint32_t mbox_sts[MBOX_REG_COUNT];
709 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
710 sizeof(struct addr_ctrl_blk),
711 &init_fw_cb_dma, GFP_KERNEL);
712 if (init_fw_cb == NULL) {
713 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
718 /* Get Initialize Firmware Control Block. */
719 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
721 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
722 ha->host_no, __func__));
723 dma_free_coherent(&ha->pdev->dev,
724 sizeof(struct addr_ctrl_blk),
725 init_fw_cb, init_fw_cb_dma);
729 /* Save IP Address. */
730 qla4xxx_update_local_ip(ha, init_fw_cb);
731 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
732 init_fw_cb, init_fw_cb_dma);
738 * qla4xxx_get_firmware_state - gets firmware state of HBA
739 * @ha: Pointer to host adapter structure.
741 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
743 uint32_t mbox_cmd[MBOX_REG_COUNT];
744 uint32_t mbox_sts[MBOX_REG_COUNT];
746 /* Get firmware version */
747 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
748 memset(&mbox_sts, 0, sizeof(mbox_sts));
750 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
752 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
754 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
755 "status %04X\n", ha->host_no, __func__,
759 ha->firmware_state = mbox_sts[1];
760 ha->board_id = mbox_sts[2];
761 ha->addl_fw_state = mbox_sts[3];
762 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
763 ha->host_no, __func__, ha->firmware_state);)
769 * qla4xxx_get_firmware_status - retrieves firmware status
770 * @ha: Pointer to host adapter structure.
772 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
774 uint32_t mbox_cmd[MBOX_REG_COUNT];
775 uint32_t mbox_sts[MBOX_REG_COUNT];
777 /* Get firmware version */
778 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
779 memset(&mbox_sts, 0, sizeof(mbox_sts));
781 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
783 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
785 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
786 "status %04X\n", ha->host_no, __func__,
791 /* High-water mark of IOCBs */
792 ha->iocb_hiwat = mbox_sts[2];
793 DEBUG2(ql4_printk(KERN_INFO, ha,
794 "%s: firmware IOCBs available = %d\n", __func__,
797 if (ha->iocb_hiwat > IOCB_HIWAT_CUSHION)
798 ha->iocb_hiwat -= IOCB_HIWAT_CUSHION;
800 /* Ideally, we should not enter this code, as the # of firmware
801 * IOCBs is hard-coded in the firmware. We set a default
802 * iocb_hiwat here just in case */
803 if (ha->iocb_hiwat == 0) {
804 ha->iocb_hiwat = REQUEST_QUEUE_DEPTH / 4;
805 DEBUG2(ql4_printk(KERN_WARNING, ha,
806 "%s: Setting IOCB's to = %d\n", __func__,
814 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
815 * @ha: Pointer to host adapter structure.
816 * @fw_ddb_index: Firmware's device database index
817 * @fw_ddb_entry: Pointer to firmware's device database entry structure
818 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
819 * @next_ddb_index: Pointer to next valid device database index
820 * @fw_ddb_device_state: Pointer to device state
822 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
823 uint16_t fw_ddb_index,
824 struct dev_db_entry *fw_ddb_entry,
825 dma_addr_t fw_ddb_entry_dma,
826 uint32_t *num_valid_ddb_entries,
827 uint32_t *next_ddb_index,
828 uint32_t *fw_ddb_device_state,
829 uint32_t *conn_err_detail,
830 uint16_t *tcp_source_port_num,
831 uint16_t *connection_id)
833 int status = QLA_ERROR;
835 uint32_t mbox_cmd[MBOX_REG_COUNT];
836 uint32_t mbox_sts[MBOX_REG_COUNT];
838 /* Make sure the device index is valid */
839 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
840 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
841 ha->host_no, __func__, fw_ddb_index));
844 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
845 memset(&mbox_sts, 0, sizeof(mbox_sts));
847 memset(fw_ddb_entry, 0, sizeof(struct dev_db_entry));
849 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
850 mbox_cmd[1] = (uint32_t) fw_ddb_index;
851 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
852 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
853 mbox_cmd[4] = sizeof(struct dev_db_entry);
855 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
857 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
858 " with status 0x%04X\n", ha->host_no, __func__,
862 if (fw_ddb_index != mbox_sts[1]) {
863 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
864 ha->host_no, __func__, fw_ddb_index,
869 options = le16_to_cpu(fw_ddb_entry->options);
870 if (options & DDB_OPT_IPV6_DEVICE) {
871 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
872 "Next %d State %04x ConnErr %08x %pI6 "
873 ":%04d \"%s\"\n", __func__, fw_ddb_index,
874 mbox_sts[0], mbox_sts[2], mbox_sts[3],
875 mbox_sts[4], mbox_sts[5],
876 fw_ddb_entry->ip_addr,
877 le16_to_cpu(fw_ddb_entry->port),
878 fw_ddb_entry->iscsi_name);
880 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
881 "Next %d State %04x ConnErr %08x %pI4 "
882 ":%04d \"%s\"\n", __func__, fw_ddb_index,
883 mbox_sts[0], mbox_sts[2], mbox_sts[3],
884 mbox_sts[4], mbox_sts[5],
885 fw_ddb_entry->ip_addr,
886 le16_to_cpu(fw_ddb_entry->port),
887 fw_ddb_entry->iscsi_name);
890 if (num_valid_ddb_entries)
891 *num_valid_ddb_entries = mbox_sts[2];
893 *next_ddb_index = mbox_sts[3];
894 if (fw_ddb_device_state)
895 *fw_ddb_device_state = mbox_sts[4];
898 * RA: This mailbox has been changed to pass connection error and
899 * details. Its true for ISP4010 as per Version E - Not sure when it
900 * was changed. Get the time2wait from the fw_dd_entry field :
901 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
905 *conn_err_detail = mbox_sts[5];
906 if (tcp_source_port_num)
907 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
909 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
910 status = QLA_SUCCESS;
916 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index)
918 uint32_t mbox_cmd[MBOX_REG_COUNT];
919 uint32_t mbox_sts[MBOX_REG_COUNT];
922 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
923 memset(&mbox_sts, 0, sizeof(mbox_sts));
925 mbox_cmd[0] = MBOX_CMD_CONN_OPEN;
926 mbox_cmd[1] = fw_ddb_index;
928 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
930 DEBUG2(ql4_printk(KERN_INFO, ha,
931 "%s: status = %d mbx0 = 0x%x mbx1 = 0x%x\n",
932 __func__, status, mbox_sts[0], mbox_sts[1]));
937 * qla4xxx_set_fwddb_entry - sets a ddb entry.
938 * @ha: Pointer to host adapter structure.
939 * @fw_ddb_index: Firmware's device database index
940 * @fw_ddb_entry_dma: dma address of ddb entry
941 * @mbx_sts: mailbox 0 to be returned or NULL
943 * This routine initializes or updates the adapter's device database
944 * entry for the specified device.
946 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
947 dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts)
949 uint32_t mbox_cmd[MBOX_REG_COUNT];
950 uint32_t mbox_sts[MBOX_REG_COUNT];
953 /* Do not wait for completion. The firmware will send us an
954 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
956 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
957 memset(&mbox_sts, 0, sizeof(mbox_sts));
959 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
960 mbox_cmd[1] = (uint32_t) fw_ddb_index;
961 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
962 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
963 mbox_cmd[4] = sizeof(struct dev_db_entry);
965 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
968 *mbx_sts = mbox_sts[0];
969 DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
970 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
975 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha,
976 struct ddb_entry *ddb_entry, int options)
979 uint32_t mbox_cmd[MBOX_REG_COUNT];
980 uint32_t mbox_sts[MBOX_REG_COUNT];
982 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
983 memset(&mbox_sts, 0, sizeof(mbox_sts));
985 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
986 mbox_cmd[1] = ddb_entry->fw_ddb_index;
987 mbox_cmd[3] = options;
989 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
991 if (status != QLA_SUCCESS) {
992 DEBUG2(ql4_printk(KERN_INFO, ha,
993 "%s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
994 "failed sts %04X %04X", __func__,
995 mbox_sts[0], mbox_sts[1]));
996 if ((mbox_sts[0] == MBOX_STS_COMMAND_ERROR) &&
997 (mbox_sts[1] == DDB_NOT_LOGGED_IN)) {
998 set_bit(DDB_CONN_CLOSE_FAILURE, &ddb_entry->flags);
1006 * qla4xxx_get_crash_record - retrieves crash record.
1007 * @ha: Pointer to host adapter structure.
1009 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
1011 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
1013 uint32_t mbox_cmd[MBOX_REG_COUNT];
1014 uint32_t mbox_sts[MBOX_REG_COUNT];
1015 struct crash_record *crash_record = NULL;
1016 dma_addr_t crash_record_dma = 0;
1017 uint32_t crash_record_size = 0;
1019 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1020 memset(&mbox_sts, 0, sizeof(mbox_cmd));
1022 /* Get size of crash record. */
1023 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
1025 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1027 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
1028 ha->host_no, __func__));
1029 goto exit_get_crash_record;
1031 crash_record_size = mbox_sts[4];
1032 if (crash_record_size == 0) {
1033 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
1034 ha->host_no, __func__));
1035 goto exit_get_crash_record;
1038 /* Alloc Memory for Crash Record. */
1039 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
1040 &crash_record_dma, GFP_KERNEL);
1041 if (crash_record == NULL)
1042 goto exit_get_crash_record;
1044 /* Get Crash Record. */
1045 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1046 memset(&mbox_sts, 0, sizeof(mbox_cmd));
1048 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
1049 mbox_cmd[2] = LSDW(crash_record_dma);
1050 mbox_cmd[3] = MSDW(crash_record_dma);
1051 mbox_cmd[4] = crash_record_size;
1053 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1055 goto exit_get_crash_record;
1057 /* Dump Crash Record. */
1059 exit_get_crash_record:
1061 dma_free_coherent(&ha->pdev->dev, crash_record_size,
1062 crash_record, crash_record_dma);
1066 * qla4xxx_get_conn_event_log - retrieves connection event log
1067 * @ha: Pointer to host adapter structure.
1069 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
1071 uint32_t mbox_cmd[MBOX_REG_COUNT];
1072 uint32_t mbox_sts[MBOX_REG_COUNT];
1073 struct conn_event_log_entry *event_log = NULL;
1074 dma_addr_t event_log_dma = 0;
1075 uint32_t event_log_size = 0;
1076 uint32_t num_valid_entries;
1077 uint32_t oldest_entry = 0;
1078 uint32_t max_event_log_entries;
1081 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1082 memset(&mbox_sts, 0, sizeof(mbox_cmd));
1084 /* Get size of crash record. */
1085 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
1087 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1089 goto exit_get_event_log;
1091 event_log_size = mbox_sts[4];
1092 if (event_log_size == 0)
1093 goto exit_get_event_log;
1095 /* Alloc Memory for Crash Record. */
1096 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
1097 &event_log_dma, GFP_KERNEL);
1098 if (event_log == NULL)
1099 goto exit_get_event_log;
1101 /* Get Crash Record. */
1102 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1103 memset(&mbox_sts, 0, sizeof(mbox_cmd));
1105 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
1106 mbox_cmd[2] = LSDW(event_log_dma);
1107 mbox_cmd[3] = MSDW(event_log_dma);
1109 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
1111 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
1112 "log!\n", ha->host_no, __func__));
1113 goto exit_get_event_log;
1116 /* Dump Event Log. */
1117 num_valid_entries = mbox_sts[1];
1119 max_event_log_entries = event_log_size /
1120 sizeof(struct conn_event_log_entry);
1122 if (num_valid_entries > max_event_log_entries)
1123 oldest_entry = num_valid_entries % max_event_log_entries;
1125 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
1126 ha->host_no, num_valid_entries));
1128 if (ql4xextended_error_logging == 3) {
1129 if (oldest_entry == 0) {
1130 /* Circular Buffer has not wrapped around */
1131 for (i=0; i < num_valid_entries; i++) {
1132 qla4xxx_dump_buffer((uint8_t *)event_log+
1133 (i*sizeof(*event_log)),
1134 sizeof(*event_log));
1138 /* Circular Buffer has wrapped around -
1139 * display accordingly*/
1140 for (i=oldest_entry; i < max_event_log_entries; i++) {
1141 qla4xxx_dump_buffer((uint8_t *)event_log+
1142 (i*sizeof(*event_log)),
1143 sizeof(*event_log));
1145 for (i=0; i < oldest_entry; i++) {
1146 qla4xxx_dump_buffer((uint8_t *)event_log+
1147 (i*sizeof(*event_log)),
1148 sizeof(*event_log));
1155 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
1160 * qla4xxx_abort_task - issues Abort Task
1161 * @ha: Pointer to host adapter structure.
1162 * @srb: Pointer to srb entry
1164 * This routine performs a LUN RESET on the specified target/lun.
1165 * The caller must ensure that the ddb_entry and lun_entry pointers
1166 * are valid before calling this routine.
1168 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
1170 uint32_t mbox_cmd[MBOX_REG_COUNT];
1171 uint32_t mbox_sts[MBOX_REG_COUNT];
1172 struct scsi_cmnd *cmd = srb->cmd;
1173 int status = QLA_SUCCESS;
1174 unsigned long flags = 0;
1178 * Send abort task command to ISP, so that the ISP will return
1179 * request with ABORT status
1181 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1182 memset(&mbox_sts, 0, sizeof(mbox_sts));
1184 spin_lock_irqsave(&ha->hardware_lock, flags);
1185 index = (unsigned long)(unsigned char *)cmd->host_scribble;
1186 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1188 /* Firmware already posted completion on response queue */
1189 if (index == MAX_SRBS)
1192 mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
1193 mbox_cmd[1] = srb->ddb->fw_ddb_index;
1194 mbox_cmd[2] = index;
1195 /* Immediate Command Enable */
1198 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
1200 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
1203 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%llu: abort task FAILED: "
1204 "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
1205 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
1206 mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
1213 * qla4xxx_reset_lun - issues LUN Reset
1214 * @ha: Pointer to host adapter structure.
1215 * @ddb_entry: Pointer to device database entry
1218 * This routine performs a LUN RESET on the specified target/lun.
1219 * The caller must ensure that the ddb_entry and lun_entry pointers
1220 * are valid before calling this routine.
1222 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
1225 uint32_t mbox_cmd[MBOX_REG_COUNT];
1226 uint32_t mbox_sts[MBOX_REG_COUNT];
1227 uint32_t scsi_lun[2];
1228 int status = QLA_SUCCESS;
1230 DEBUG2(printk("scsi%ld:%d:%llu: lun reset issued\n", ha->host_no,
1231 ddb_entry->fw_ddb_index, lun));
1234 * Send lun reset command to ISP, so that the ISP will return all
1235 * outstanding requests with RESET status
1237 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1238 memset(&mbox_sts, 0, sizeof(mbox_sts));
1239 int_to_scsilun(lun, (struct scsi_lun *) scsi_lun);
1241 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
1242 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1243 /* FW expects LUN bytes 0-3 in Incoming Mailbox 2
1244 * (LUN byte 0 is LSByte, byte 3 is MSByte) */
1245 mbox_cmd[2] = cpu_to_le32(scsi_lun[0]);
1246 /* FW expects LUN bytes 4-7 in Incoming Mailbox 3
1247 * (LUN byte 4 is LSByte, byte 7 is MSByte) */
1248 mbox_cmd[3] = cpu_to_le32(scsi_lun[1]);
1249 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1251 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
1252 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1253 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1260 * qla4xxx_reset_target - issues target Reset
1261 * @ha: Pointer to host adapter structure.
1262 * @ddb_entry: Pointer to device database entry
1264 * This routine performs a TARGET RESET on the specified target.
1265 * The caller must ensure that the ddb_entry pointers
1266 * are valid before calling this routine.
1268 int qla4xxx_reset_target(struct scsi_qla_host *ha,
1269 struct ddb_entry *ddb_entry)
1271 uint32_t mbox_cmd[MBOX_REG_COUNT];
1272 uint32_t mbox_sts[MBOX_REG_COUNT];
1273 int status = QLA_SUCCESS;
1275 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
1276 ddb_entry->fw_ddb_index));
1279 * Send target reset command to ISP, so that the ISP will return all
1280 * outstanding requests with RESET status
1282 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1283 memset(&mbox_sts, 0, sizeof(mbox_sts));
1285 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1286 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1287 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1289 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1291 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1292 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1298 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1299 uint32_t offset, uint32_t len)
1301 uint32_t mbox_cmd[MBOX_REG_COUNT];
1302 uint32_t mbox_sts[MBOX_REG_COUNT];
1304 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1305 memset(&mbox_sts, 0, sizeof(mbox_sts));
1307 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1308 mbox_cmd[1] = LSDW(dma_addr);
1309 mbox_cmd[2] = MSDW(dma_addr);
1310 mbox_cmd[3] = offset;
1313 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1315 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1316 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1317 __func__, mbox_sts[0], mbox_sts[1], offset, len));
1324 * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1325 * @ha: Pointer to host adapter structure.
1327 * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1328 * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1329 * those mailboxes, if unused.
1331 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1333 struct about_fw_info *about_fw = NULL;
1334 dma_addr_t about_fw_dma;
1335 uint32_t mbox_cmd[MBOX_REG_COUNT];
1336 uint32_t mbox_sts[MBOX_REG_COUNT];
1337 int status = QLA_ERROR;
1339 about_fw = dma_alloc_coherent(&ha->pdev->dev,
1340 sizeof(struct about_fw_info),
1341 &about_fw_dma, GFP_KERNEL);
1343 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1344 "for about_fw\n", __func__));
1348 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1349 memset(&mbox_sts, 0, sizeof(mbox_sts));
1351 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1352 mbox_cmd[2] = LSDW(about_fw_dma);
1353 mbox_cmd[3] = MSDW(about_fw_dma);
1354 mbox_cmd[4] = sizeof(struct about_fw_info);
1356 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1357 &mbox_cmd[0], &mbox_sts[0]);
1358 if (status != QLA_SUCCESS) {
1359 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1360 "failed w/ status %04X\n", __func__,
1365 /* Save version information. */
1366 ha->fw_info.fw_major = le16_to_cpu(about_fw->fw_major);
1367 ha->fw_info.fw_minor = le16_to_cpu(about_fw->fw_minor);
1368 ha->fw_info.fw_patch = le16_to_cpu(about_fw->fw_patch);
1369 ha->fw_info.fw_build = le16_to_cpu(about_fw->fw_build);
1370 memcpy(ha->fw_info.fw_build_date, about_fw->fw_build_date,
1371 sizeof(about_fw->fw_build_date));
1372 memcpy(ha->fw_info.fw_build_time, about_fw->fw_build_time,
1373 sizeof(about_fw->fw_build_time));
1374 strcpy((char *)ha->fw_info.fw_build_user,
1375 skip_spaces((char *)about_fw->fw_build_user));
1376 ha->fw_info.fw_load_source = le16_to_cpu(about_fw->fw_load_source);
1377 ha->fw_info.iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1378 ha->fw_info.iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1379 ha->fw_info.bootload_major = le16_to_cpu(about_fw->bootload_major);
1380 ha->fw_info.bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1381 ha->fw_info.bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1382 ha->fw_info.bootload_build = le16_to_cpu(about_fw->bootload_build);
1383 strcpy((char *)ha->fw_info.extended_timestamp,
1384 skip_spaces((char *)about_fw->extended_timestamp));
1386 ha->fw_uptime_secs = le32_to_cpu(mbox_sts[5]);
1387 ha->fw_uptime_msecs = le32_to_cpu(mbox_sts[6]);
1388 status = QLA_SUCCESS;
1391 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1392 about_fw, about_fw_dma);
1396 int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options,
1397 dma_addr_t dma_addr)
1399 uint32_t mbox_cmd[MBOX_REG_COUNT];
1400 uint32_t mbox_sts[MBOX_REG_COUNT];
1402 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1403 memset(&mbox_sts, 0, sizeof(mbox_sts));
1405 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1406 mbox_cmd[1] = options;
1407 mbox_cmd[2] = LSDW(dma_addr);
1408 mbox_cmd[3] = MSDW(dma_addr);
1410 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1412 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1413 ha->host_no, __func__, mbox_sts[0]));
1419 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index,
1423 uint32_t mbox_cmd[MBOX_REG_COUNT];
1424 uint32_t mbox_sts[MBOX_REG_COUNT];
1426 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1427 memset(&mbox_sts, 0, sizeof(mbox_sts));
1429 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1430 mbox_cmd[1] = ddb_index;
1432 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1434 if (status != QLA_SUCCESS) {
1435 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1436 __func__, mbox_sts[0]));
1439 *mbx_sts = mbox_sts[0];
1443 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index)
1446 uint32_t mbox_cmd[MBOX_REG_COUNT];
1447 uint32_t mbox_sts[MBOX_REG_COUNT];
1449 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1450 memset(&mbox_sts, 0, sizeof(mbox_sts));
1452 mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
1453 mbox_cmd[1] = ddb_index;
1455 status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0],
1457 if (status != QLA_SUCCESS) {
1458 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1459 __func__, mbox_sts[0]));
1465 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr,
1466 uint32_t offset, uint32_t length, uint32_t options)
1468 uint32_t mbox_cmd[MBOX_REG_COUNT];
1469 uint32_t mbox_sts[MBOX_REG_COUNT];
1470 int status = QLA_SUCCESS;
1472 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1473 memset(&mbox_sts, 0, sizeof(mbox_sts));
1475 mbox_cmd[0] = MBOX_CMD_WRITE_FLASH;
1476 mbox_cmd[1] = LSDW(dma_addr);
1477 mbox_cmd[2] = MSDW(dma_addr);
1478 mbox_cmd[3] = offset;
1479 mbox_cmd[4] = length;
1480 mbox_cmd[5] = options;
1482 status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]);
1483 if (status != QLA_SUCCESS) {
1484 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH "
1485 "failed w/ status %04X, mbx1 %04X\n",
1486 __func__, mbox_sts[0], mbox_sts[1]));
1491 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
1492 struct dev_db_entry *fw_ddb_entry,
1493 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1495 uint32_t dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1496 uint32_t dev_db_end_offset;
1497 int status = QLA_ERROR;
1499 memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1501 dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1502 dev_db_end_offset = FLASH_OFFSET_DB_END;
1504 if (dev_db_start_offset > dev_db_end_offset) {
1505 DEBUG2(ql4_printk(KERN_ERR, ha,
1506 "%s:Invalid DDB index %d", __func__,
1508 goto exit_bootdb_failed;
1511 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1512 sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1513 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash"
1514 "failed\n", ha->host_no, __func__);
1515 goto exit_bootdb_failed;
1518 if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1519 status = QLA_SUCCESS;
1525 int qla4xxx_flashdb_by_index(struct scsi_qla_host *ha,
1526 struct dev_db_entry *fw_ddb_entry,
1527 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1529 uint32_t dev_db_start_offset;
1530 uint32_t dev_db_end_offset;
1531 int status = QLA_ERROR;
1533 memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1535 if (is_qla40XX(ha)) {
1536 dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1537 dev_db_end_offset = FLASH_OFFSET_DB_END;
1539 dev_db_start_offset = FLASH_RAW_ACCESS_ADDR +
1540 (ha->hw.flt_region_ddb << 2);
1541 /* flt_ddb_size is DDB table size for both ports
1542 * so divide it by 2 to calculate the offset for second port
1544 if (ha->port_num == 1)
1545 dev_db_start_offset += (ha->hw.flt_ddb_size / 2);
1547 dev_db_end_offset = dev_db_start_offset +
1548 (ha->hw.flt_ddb_size / 2);
1551 dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1553 if (dev_db_start_offset > dev_db_end_offset) {
1554 DEBUG2(ql4_printk(KERN_ERR, ha,
1555 "%s:Invalid DDB index %d", __func__,
1557 goto exit_fdb_failed;
1560 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1561 sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1562 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash failed\n",
1563 ha->host_no, __func__);
1564 goto exit_fdb_failed;
1567 if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1568 status = QLA_SUCCESS;
1574 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password,
1578 int rval = QLA_ERROR;
1579 uint32_t offset = 0, chap_size;
1580 struct ql4_chap_table *chap_table;
1581 dma_addr_t chap_dma;
1583 chap_table = dma_pool_zalloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1584 if (chap_table == NULL)
1587 chap_size = sizeof(struct ql4_chap_table);
1590 offset = FLASH_CHAP_OFFSET | (idx * chap_size);
1592 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1593 /* flt_chap_size is CHAP table size for both ports
1594 * so divide it by 2 to calculate the offset for second port
1596 if (ha->port_num == 1)
1597 offset += (ha->hw.flt_chap_size / 2);
1598 offset += (idx * chap_size);
1601 rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size);
1602 if (rval != QLA_SUCCESS) {
1607 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n",
1608 __le16_to_cpu(chap_table->cookie)));
1610 if (__le16_to_cpu(chap_table->cookie) != CHAP_VALID_COOKIE) {
1611 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n");
1615 strlcpy(password, chap_table->secret, QL4_CHAP_MAX_SECRET_LEN);
1616 strlcpy(username, chap_table->name, QL4_CHAP_MAX_NAME_LEN);
1617 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1620 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1625 * qla4xxx_set_chap - Make a chap entry at the given index
1626 * @ha: pointer to adapter structure
1627 * @username: CHAP username to set
1628 * @password: CHAP password to set
1629 * @idx: CHAP index at which to make the entry
1630 * @bidi: type of chap entry (chap_in or chap_out)
1632 * Create chap entry at the given index with the information provided.
1634 * Note: Caller should acquire the chap lock before getting here.
1636 int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username, char *password,
1637 uint16_t idx, int bidi)
1640 int rval = QLA_ERROR;
1641 uint32_t offset = 0;
1642 struct ql4_chap_table *chap_table;
1643 uint32_t chap_size = 0;
1644 dma_addr_t chap_dma;
1646 chap_table = dma_pool_zalloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1647 if (chap_table == NULL) {
1653 chap_table->flags |= BIT_6; /* peer */
1655 chap_table->flags |= BIT_7; /* local */
1656 chap_table->secret_len = strlen(password);
1657 strncpy(chap_table->secret, password, MAX_CHAP_SECRET_LEN - 1);
1658 strncpy(chap_table->name, username, MAX_CHAP_NAME_LEN - 1);
1659 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1661 if (is_qla40XX(ha)) {
1662 chap_size = MAX_CHAP_ENTRIES_40XX * sizeof(*chap_table);
1663 offset = FLASH_CHAP_OFFSET;
1664 } else { /* Single region contains CHAP info for both ports which is
1665 * divided into half for each port.
1667 chap_size = ha->hw.flt_chap_size / 2;
1668 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1669 if (ha->port_num == 1)
1670 offset += chap_size;
1673 offset += (idx * sizeof(struct ql4_chap_table));
1674 rval = qla4xxx_set_flash(ha, chap_dma, offset,
1675 sizeof(struct ql4_chap_table),
1676 FLASH_OPT_RMW_COMMIT);
1678 if (rval == QLA_SUCCESS && ha->chap_list) {
1679 /* Update ha chap_list cache */
1680 memcpy((struct ql4_chap_table *)ha->chap_list + idx,
1681 chap_table, sizeof(struct ql4_chap_table));
1683 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1684 if (rval != QLA_SUCCESS)
1692 int qla4xxx_get_uni_chap_at_index(struct scsi_qla_host *ha, char *username,
1693 char *password, uint16_t chap_index)
1695 int rval = QLA_ERROR;
1696 struct ql4_chap_table *chap_table = NULL;
1697 int max_chap_entries;
1699 if (!ha->chap_list) {
1700 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1705 if (!username || !password) {
1706 ql4_printk(KERN_ERR, ha, "No memory for username & secret\n");
1712 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1713 sizeof(struct ql4_chap_table);
1715 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1717 if (chap_index > max_chap_entries) {
1718 ql4_printk(KERN_ERR, ha, "Invalid Chap index\n");
1723 mutex_lock(&ha->chap_sem);
1724 chap_table = (struct ql4_chap_table *)ha->chap_list + chap_index;
1725 if (chap_table->cookie != __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1727 goto exit_unlock_uni_chap;
1730 if (!(chap_table->flags & BIT_7)) {
1731 ql4_printk(KERN_ERR, ha, "Unidirectional entry not set\n");
1733 goto exit_unlock_uni_chap;
1736 strlcpy(password, chap_table->secret, MAX_CHAP_SECRET_LEN);
1737 strlcpy(username, chap_table->name, MAX_CHAP_NAME_LEN);
1741 exit_unlock_uni_chap:
1742 mutex_unlock(&ha->chap_sem);
1748 * qla4xxx_get_chap_index - Get chap index given username and secret
1749 * @ha: pointer to adapter structure
1750 * @username: CHAP username to be searched
1751 * @password: CHAP password to be searched
1752 * @bidi: Is this a BIDI CHAP
1753 * @chap_index: CHAP index to be returned
1755 * Match the username and password in the chap_list, return the index if a
1756 * match is found. If a match is not found then add the entry in FLASH and
1757 * return the index at which entry is written in the FLASH.
1759 int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username,
1760 char *password, int bidi, uint16_t *chap_index)
1763 int free_index = -1;
1764 int found_index = 0;
1765 int max_chap_entries = 0;
1766 struct ql4_chap_table *chap_table;
1769 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1770 sizeof(struct ql4_chap_table);
1772 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1774 if (!ha->chap_list) {
1775 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1779 if (!username || !password) {
1780 ql4_printk(KERN_ERR, ha, "Do not have username and psw\n");
1784 mutex_lock(&ha->chap_sem);
1785 for (i = 0; i < max_chap_entries; i++) {
1786 chap_table = (struct ql4_chap_table *)ha->chap_list + i;
1787 if (chap_table->cookie !=
1788 __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1789 if (i > MAX_RESRV_CHAP_IDX && free_index == -1)
1794 if (chap_table->flags & BIT_7)
1797 if (chap_table->flags & BIT_6)
1800 if (!strncmp(chap_table->secret, password,
1801 MAX_CHAP_SECRET_LEN) &&
1802 !strncmp(chap_table->name, username,
1803 MAX_CHAP_NAME_LEN)) {
1810 /* If chap entry is not present and a free index is available then
1811 * write the entry in flash
1813 if (!found_index && free_index != -1) {
1814 rval = qla4xxx_set_chap(ha, username, password,
1817 *chap_index = free_index;
1822 mutex_unlock(&ha->chap_sem);
1829 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha,
1830 uint16_t fw_ddb_index,
1831 uint16_t connection_id,
1834 uint32_t mbox_cmd[MBOX_REG_COUNT];
1835 uint32_t mbox_sts[MBOX_REG_COUNT];
1836 int status = QLA_SUCCESS;
1838 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1839 memset(&mbox_sts, 0, sizeof(mbox_sts));
1841 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
1842 mbox_cmd[1] = fw_ddb_index;
1843 mbox_cmd[2] = connection_id;
1844 mbox_cmd[3] = option;
1846 status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]);
1847 if (status != QLA_SUCCESS) {
1848 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE "
1849 "option %04x failed w/ status %04X %04X\n",
1850 __func__, option, mbox_sts[0], mbox_sts[1]));
1856 * qla4_84xx_extend_idc_tmo - Extend IDC Timeout.
1857 * @ha: Pointer to host adapter structure.
1858 * @ext_tmo: idc timeout value
1860 * Requests firmware to extend the idc timeout value.
1862 static int qla4_84xx_extend_idc_tmo(struct scsi_qla_host *ha, uint32_t ext_tmo)
1864 uint32_t mbox_cmd[MBOX_REG_COUNT];
1865 uint32_t mbox_sts[MBOX_REG_COUNT];
1868 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1869 memset(&mbox_sts, 0, sizeof(mbox_sts));
1872 mbox_cmd[0] = MBOX_CMD_IDC_TIME_EXTEND;
1873 mbox_cmd[1] = ((ha->idc_info.request_desc & 0xfffff0ff) |
1874 (ext_tmo << 8)); /* new timeout */
1875 mbox_cmd[2] = ha->idc_info.info1;
1876 mbox_cmd[3] = ha->idc_info.info2;
1877 mbox_cmd[4] = ha->idc_info.info3;
1879 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1880 mbox_cmd, mbox_sts);
1881 if (status != QLA_SUCCESS) {
1882 DEBUG2(ql4_printk(KERN_INFO, ha,
1883 "scsi%ld: %s: failed status %04X\n",
1884 ha->host_no, __func__, mbox_sts[0]));
1887 ql4_printk(KERN_INFO, ha, "%s: IDC timeout extended by %d secs\n",
1894 int qla4xxx_disable_acb(struct scsi_qla_host *ha)
1896 uint32_t mbox_cmd[MBOX_REG_COUNT];
1897 uint32_t mbox_sts[MBOX_REG_COUNT];
1898 int status = QLA_SUCCESS;
1900 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1901 memset(&mbox_sts, 0, sizeof(mbox_sts));
1903 mbox_cmd[0] = MBOX_CMD_DISABLE_ACB;
1905 status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]);
1906 if (status != QLA_SUCCESS) {
1907 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB "
1908 "failed w/ status %04X %04X %04X", __func__,
1909 mbox_sts[0], mbox_sts[1], mbox_sts[2]));
1911 if (is_qla8042(ha) &&
1912 test_bit(DPC_POST_IDC_ACK, &ha->dpc_flags) &&
1913 (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE)) {
1915 * Disable ACB mailbox command takes time to complete
1916 * based on the total number of targets connected.
1917 * For 512 targets, it took approximately 5 secs to
1918 * complete. Setting the timeout value to 8, with the 3
1921 qla4_84xx_extend_idc_tmo(ha, IDC_EXTEND_TOV);
1922 if (!wait_for_completion_timeout(&ha->disable_acb_comp,
1923 IDC_EXTEND_TOV * HZ)) {
1924 ql4_printk(KERN_WARNING, ha, "%s: Disable ACB Completion not received\n",
1932 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma,
1933 uint32_t acb_type, uint32_t len)
1935 uint32_t mbox_cmd[MBOX_REG_COUNT];
1936 uint32_t mbox_sts[MBOX_REG_COUNT];
1937 int status = QLA_SUCCESS;
1939 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1940 memset(&mbox_sts, 0, sizeof(mbox_sts));
1942 mbox_cmd[0] = MBOX_CMD_GET_ACB;
1943 mbox_cmd[1] = acb_type;
1944 mbox_cmd[2] = LSDW(acb_dma);
1945 mbox_cmd[3] = MSDW(acb_dma);
1948 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1949 if (status != QLA_SUCCESS) {
1950 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB "
1951 "failed w/ status %04X\n", __func__,
1957 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1958 uint32_t *mbox_sts, dma_addr_t acb_dma)
1960 int status = QLA_SUCCESS;
1962 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1963 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1964 mbox_cmd[0] = MBOX_CMD_SET_ACB;
1965 mbox_cmd[1] = 0; /* Primary ACB */
1966 mbox_cmd[2] = LSDW(acb_dma);
1967 mbox_cmd[3] = MSDW(acb_dma);
1968 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1970 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1971 if (status != QLA_SUCCESS) {
1972 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_SET_ACB "
1973 "failed w/ status %04X\n", __func__,
1979 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha,
1980 struct ddb_entry *ddb_entry,
1981 struct iscsi_cls_conn *cls_conn,
1984 struct dev_db_entry *fw_ddb_entry;
1985 struct iscsi_conn *conn;
1986 struct iscsi_session *sess;
1987 struct qla_conn *qla_conn;
1988 struct sockaddr *dst_addr;
1989 dma_addr_t fw_ddb_entry_dma;
1990 int status = QLA_SUCCESS;
1992 struct sockaddr_in *addr;
1993 struct sockaddr_in6 *addr6;
1995 uint16_t iscsi_opts = 0;
1996 uint32_t options = 0;
1997 uint16_t idx, *ptid;
1999 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
2000 &fw_ddb_entry_dma, GFP_KERNEL);
2001 if (!fw_ddb_entry) {
2002 DEBUG2(ql4_printk(KERN_ERR, ha,
2003 "%s: Unable to allocate dma buffer.\n",
2006 goto exit_set_param_no_free;
2009 conn = cls_conn->dd_data;
2010 qla_conn = conn->dd_data;
2011 sess = conn->session;
2012 dst_addr = (struct sockaddr *)&qla_conn->qla_ep->dst_addr;
2014 if (dst_addr->sa_family == AF_INET6)
2015 options |= IPV6_DEFAULT_DDB_ENTRY;
2017 status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma);
2018 if (status == QLA_ERROR) {
2020 goto exit_set_param;
2023 ptid = (uint16_t *)&fw_ddb_entry->isid[1];
2024 *ptid = cpu_to_le16((uint16_t)ddb_entry->sess->target_id);
2026 DEBUG2(ql4_printk(KERN_INFO, ha, "ISID [%pmR]\n", fw_ddb_entry->isid));
2028 iscsi_opts = le16_to_cpu(fw_ddb_entry->iscsi_options);
2029 memset(fw_ddb_entry->iscsi_alias, 0, sizeof(fw_ddb_entry->iscsi_alias));
2031 memset(fw_ddb_entry->iscsi_name, 0, sizeof(fw_ddb_entry->iscsi_name));
2033 if (sess->targetname != NULL) {
2034 memcpy(fw_ddb_entry->iscsi_name, sess->targetname,
2035 min(strlen(sess->targetname),
2036 sizeof(fw_ddb_entry->iscsi_name)));
2039 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
2040 memset(fw_ddb_entry->tgt_addr, 0, sizeof(fw_ddb_entry->tgt_addr));
2042 fw_ddb_entry->options = DDB_OPT_TARGET | DDB_OPT_AUTO_SENDTGTS_DISABLE;
2044 if (dst_addr->sa_family == AF_INET) {
2045 addr = (struct sockaddr_in *)dst_addr;
2046 ip = (char *)&addr->sin_addr;
2047 memcpy(fw_ddb_entry->ip_addr, ip, IP_ADDR_LEN);
2048 fw_ddb_entry->port = cpu_to_le16(ntohs(addr->sin_port));
2049 DEBUG2(ql4_printk(KERN_INFO, ha,
2050 "%s: Destination Address [%pI4]: index [%d]\n",
2051 __func__, fw_ddb_entry->ip_addr,
2052 ddb_entry->fw_ddb_index));
2053 } else if (dst_addr->sa_family == AF_INET6) {
2054 addr6 = (struct sockaddr_in6 *)dst_addr;
2055 ip = (char *)&addr6->sin6_addr;
2056 memcpy(fw_ddb_entry->ip_addr, ip, IPv6_ADDR_LEN);
2057 fw_ddb_entry->port = cpu_to_le16(ntohs(addr6->sin6_port));
2058 fw_ddb_entry->options |= DDB_OPT_IPV6_DEVICE;
2059 DEBUG2(ql4_printk(KERN_INFO, ha,
2060 "%s: Destination Address [%pI6]: index [%d]\n",
2061 __func__, fw_ddb_entry->ip_addr,
2062 ddb_entry->fw_ddb_index));
2064 ql4_printk(KERN_ERR, ha,
2065 "%s: Failed to get IP Address\n",
2068 goto exit_set_param;
2072 if (sess->username != NULL && sess->password != NULL) {
2073 if (strlen(sess->username) && strlen(sess->password)) {
2074 iscsi_opts |= BIT_7;
2076 rval = qla4xxx_get_chap_index(ha, sess->username,
2080 goto exit_set_param;
2082 fw_ddb_entry->chap_tbl_idx = cpu_to_le16(idx);
2086 if (sess->username_in != NULL && sess->password_in != NULL) {
2087 /* Check if BIDI CHAP */
2088 if (strlen(sess->username_in) && strlen(sess->password_in)) {
2089 iscsi_opts |= BIT_4;
2091 rval = qla4xxx_get_chap_index(ha, sess->username_in,
2095 goto exit_set_param;
2099 if (sess->initial_r2t_en)
2100 iscsi_opts |= BIT_10;
2102 if (sess->imm_data_en)
2103 iscsi_opts |= BIT_11;
2105 fw_ddb_entry->iscsi_options = cpu_to_le16(iscsi_opts);
2107 if (conn->max_recv_dlength)
2108 fw_ddb_entry->iscsi_max_rcv_data_seg_len =
2109 __constant_cpu_to_le16((conn->max_recv_dlength / BYTE_UNITS));
2112 fw_ddb_entry->iscsi_max_outsnd_r2t = cpu_to_le16(sess->max_r2t);
2114 if (sess->first_burst)
2115 fw_ddb_entry->iscsi_first_burst_len =
2116 __constant_cpu_to_le16((sess->first_burst / BYTE_UNITS));
2118 if (sess->max_burst)
2119 fw_ddb_entry->iscsi_max_burst_len =
2120 __constant_cpu_to_le16((sess->max_burst / BYTE_UNITS));
2122 if (sess->time2wait)
2123 fw_ddb_entry->iscsi_def_time2wait =
2124 cpu_to_le16(sess->time2wait);
2126 if (sess->time2retain)
2127 fw_ddb_entry->iscsi_def_time2retain =
2128 cpu_to_le16(sess->time2retain);
2130 status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
2131 fw_ddb_entry_dma, mbx_sts);
2133 if (status != QLA_SUCCESS)
2136 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
2137 fw_ddb_entry, fw_ddb_entry_dma);
2138 exit_set_param_no_free:
2142 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
2143 uint16_t stats_size, dma_addr_t stats_dma)
2145 int status = QLA_SUCCESS;
2146 uint32_t mbox_cmd[MBOX_REG_COUNT];
2147 uint32_t mbox_sts[MBOX_REG_COUNT];
2149 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
2150 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
2151 mbox_cmd[0] = MBOX_CMD_GET_MANAGEMENT_DATA;
2152 mbox_cmd[1] = fw_ddb_index;
2153 mbox_cmd[2] = LSDW(stats_dma);
2154 mbox_cmd[3] = MSDW(stats_dma);
2155 mbox_cmd[4] = stats_size;
2157 status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]);
2158 if (status != QLA_SUCCESS) {
2159 DEBUG2(ql4_printk(KERN_WARNING, ha,
2160 "%s: MBOX_CMD_GET_MANAGEMENT_DATA "
2161 "failed w/ status %04X\n", __func__,
2167 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
2168 uint32_t ip_idx, uint32_t *sts)
2170 uint32_t mbox_cmd[MBOX_REG_COUNT];
2171 uint32_t mbox_sts[MBOX_REG_COUNT];
2172 int status = QLA_SUCCESS;
2174 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2175 memset(&mbox_sts, 0, sizeof(mbox_sts));
2176 mbox_cmd[0] = MBOX_CMD_GET_IP_ADDR_STATE;
2177 mbox_cmd[1] = acb_idx;
2178 mbox_cmd[2] = ip_idx;
2180 status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]);
2181 if (status != QLA_SUCCESS) {
2182 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: "
2183 "MBOX_CMD_GET_IP_ADDR_STATE failed w/ "
2184 "status %04X\n", __func__, mbox_sts[0]));
2186 memcpy(sts, mbox_sts, sizeof(mbox_sts));
2190 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
2191 uint32_t offset, uint32_t size)
2193 int status = QLA_SUCCESS;
2194 uint32_t mbox_cmd[MBOX_REG_COUNT];
2195 uint32_t mbox_sts[MBOX_REG_COUNT];
2197 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2198 memset(&mbox_sts, 0, sizeof(mbox_sts));
2200 mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
2201 mbox_cmd[1] = LSDW(nvram_dma);
2202 mbox_cmd[2] = MSDW(nvram_dma);
2203 mbox_cmd[3] = offset;
2206 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
2208 if (status != QLA_SUCCESS) {
2209 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
2210 "status %04X\n", ha->host_no, __func__,
2216 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
2217 uint32_t offset, uint32_t size)
2219 int status = QLA_SUCCESS;
2220 uint32_t mbox_cmd[MBOX_REG_COUNT];
2221 uint32_t mbox_sts[MBOX_REG_COUNT];
2223 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2224 memset(&mbox_sts, 0, sizeof(mbox_sts));
2226 mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
2227 mbox_cmd[1] = LSDW(nvram_dma);
2228 mbox_cmd[2] = MSDW(nvram_dma);
2229 mbox_cmd[3] = offset;
2232 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
2234 if (status != QLA_SUCCESS) {
2235 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
2236 "status %04X\n", ha->host_no, __func__,
2242 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha,
2243 uint32_t region, uint32_t field0,
2246 int status = QLA_SUCCESS;
2247 uint32_t mbox_cmd[MBOX_REG_COUNT];
2248 uint32_t mbox_sts[MBOX_REG_COUNT];
2250 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2251 memset(&mbox_sts, 0, sizeof(mbox_sts));
2253 mbox_cmd[0] = MBOX_CMD_RESTORE_FACTORY_DEFAULTS;
2254 mbox_cmd[3] = region;
2255 mbox_cmd[4] = field0;
2256 mbox_cmd[5] = field1;
2258 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0],
2260 if (status != QLA_SUCCESS) {
2261 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
2262 "status %04X\n", ha->host_no, __func__,
2269 * qla4_8xxx_set_param - set driver version in firmware.
2270 * @ha: Pointer to host adapter structure.
2271 * @param: Parameter to set i.e driver version
2273 int qla4_8xxx_set_param(struct scsi_qla_host *ha, int param)
2275 uint32_t mbox_cmd[MBOX_REG_COUNT];
2276 uint32_t mbox_sts[MBOX_REG_COUNT];
2279 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2280 memset(&mbox_sts, 0, sizeof(mbox_sts));
2282 mbox_cmd[0] = MBOX_CMD_SET_PARAM;
2283 if (param == SET_DRVR_VERSION) {
2284 mbox_cmd[1] = SET_DRVR_VERSION;
2285 strncpy((char *)&mbox_cmd[2], QLA4XXX_DRIVER_VERSION,
2286 MAX_DRVR_VER_LEN - 1);
2288 ql4_printk(KERN_ERR, ha, "%s: invalid parameter 0x%x\n",
2291 goto exit_set_param;
2294 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, mbox_cmd,
2296 if (status == QLA_ERROR)
2297 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
2298 __func__, mbox_sts[0]);
2305 * qla4_83xx_post_idc_ack - post IDC ACK
2306 * @ha: Pointer to host adapter structure.
2308 * Posts IDC ACK for IDC Request Notification AEN.
2310 int qla4_83xx_post_idc_ack(struct scsi_qla_host *ha)
2312 uint32_t mbox_cmd[MBOX_REG_COUNT];
2313 uint32_t mbox_sts[MBOX_REG_COUNT];
2316 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2317 memset(&mbox_sts, 0, sizeof(mbox_sts));
2319 mbox_cmd[0] = MBOX_CMD_IDC_ACK;
2320 mbox_cmd[1] = ha->idc_info.request_desc;
2321 mbox_cmd[2] = ha->idc_info.info1;
2322 mbox_cmd[3] = ha->idc_info.info2;
2323 mbox_cmd[4] = ha->idc_info.info3;
2325 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
2326 mbox_cmd, mbox_sts);
2327 if (status == QLA_ERROR)
2328 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,
2331 ql4_printk(KERN_INFO, ha, "%s: IDC ACK posted\n", __func__);
2336 int qla4_84xx_config_acb(struct scsi_qla_host *ha, int acb_config)
2338 uint32_t mbox_cmd[MBOX_REG_COUNT];
2339 uint32_t mbox_sts[MBOX_REG_COUNT];
2340 struct addr_ctrl_blk *acb = NULL;
2341 uint32_t acb_len = sizeof(struct addr_ctrl_blk);
2342 int rval = QLA_SUCCESS;
2345 acb = dma_alloc_coherent(&ha->pdev->dev,
2346 sizeof(struct addr_ctrl_blk),
2347 &acb_dma, GFP_KERNEL);
2349 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n", __func__);
2351 goto exit_config_acb;
2353 memset(acb, 0, acb_len);
2355 switch (acb_config) {
2356 case ACB_CONFIG_DISABLE:
2357 rval = qla4xxx_get_acb(ha, acb_dma, 0, acb_len);
2358 if (rval != QLA_SUCCESS)
2361 rval = qla4xxx_disable_acb(ha);
2362 if (rval != QLA_SUCCESS)
2366 ha->saved_acb = kzalloc(acb_len, GFP_KERNEL);
2368 if (!ha->saved_acb) {
2369 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n",
2374 memcpy(ha->saved_acb, acb, acb_len);
2376 case ACB_CONFIG_SET:
2378 if (!ha->saved_acb) {
2379 ql4_printk(KERN_ERR, ha, "%s: Can't set ACB, Saved ACB not available\n",
2385 memcpy(acb, ha->saved_acb, acb_len);
2387 rval = qla4xxx_set_acb(ha, &mbox_cmd[0], &mbox_sts[0], acb_dma);
2388 if (rval != QLA_SUCCESS)
2393 ql4_printk(KERN_ERR, ha, "%s: Invalid ACB Configuration\n",
2398 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk), acb,
2401 if ((acb_config == ACB_CONFIG_SET) && ha->saved_acb) {
2402 kfree(ha->saved_acb);
2403 ha->saved_acb = NULL;
2405 DEBUG2(ql4_printk(KERN_INFO, ha,
2406 "%s %s\n", __func__,
2407 rval == QLA_SUCCESS ? "SUCCEEDED" : "FAILED"));
2411 int qla4_83xx_get_port_config(struct scsi_qla_host *ha, uint32_t *config)
2413 uint32_t mbox_cmd[MBOX_REG_COUNT];
2414 uint32_t mbox_sts[MBOX_REG_COUNT];
2417 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2418 memset(&mbox_sts, 0, sizeof(mbox_sts));
2420 mbox_cmd[0] = MBOX_CMD_GET_PORT_CONFIG;
2422 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
2423 mbox_cmd, mbox_sts);
2424 if (status == QLA_SUCCESS)
2425 *config = mbox_sts[1];
2427 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,
2433 int qla4_83xx_set_port_config(struct scsi_qla_host *ha, uint32_t *config)
2435 uint32_t mbox_cmd[MBOX_REG_COUNT];
2436 uint32_t mbox_sts[MBOX_REG_COUNT];
2439 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
2440 memset(&mbox_sts, 0, sizeof(mbox_sts));
2442 mbox_cmd[0] = MBOX_CMD_SET_PORT_CONFIG;
2443 mbox_cmd[1] = *config;
2445 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
2446 mbox_cmd, mbox_sts);
2447 if (status != QLA_SUCCESS)
2448 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__,