drivers/scsi/atp870u.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  Copyright (C) 1997  Wu Ching Chen
   4  *  2.1.x update (C) 1998  Krzysztof G. Baranowski
   5  *  2.5.x update (C) 2002  Red Hat
   6  *  2.6.x update (C) 2004  Red Hat
   7  *
   8  * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
   9  *
  10  * Wu Ching Chen : NULL pointer fixes  2000/06/02
  11  *                 support atp876 chip
  12  *                 enable 32 bit fifo transfer
  13  *                 support cdrom & remove device run ultra speed
  14  *                 fix disconnect bug  2000/12/21
  15  *                 support atp880 chip lvd u160 2001/05/15
  16  *                 fix prd table bug 2001/09/12 (7.1)
  17  *
  18  * atp885 support add by ACARD Hao Ping Lian 2005/01/05
  19  */
  20 #include <linux/module.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/kernel.h>
  24 #include <linux/types.h>
  25 #include <linux/string.h>
  26 #include <linux/ioport.h>
  27 #include <linux/delay.h>
  28 #include <linux/proc_fs.h>
  29 #include <linux/spinlock.h>
  30 #include <linux/pci.h>
  31 #include <linux/blkdev.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/slab.h>
  34 #include <asm/io.h>
  35
  36 #include <scsi/scsi.h>
  37 #include <scsi/scsi_cmnd.h>
  38 #include <scsi/scsi_device.h>
  39 #include <scsi/scsi_host.h>
  40
  41 #include "atp870u.h"
  42
  43 static struct scsi_host_template atp870u_template;
  44 static void send_s870(struct atp_unit *dev,unsigned char c);
  45 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
  46                    unsigned char lvdmode);
  47
  48 static inline void atp_writeb_base(struct atp_unit *atp, u8 reg, u8 val)
  49 {
  50         outb(val, atp->baseport + reg);
  51 }
  52
  53 static inline void atp_writew_base(struct atp_unit *atp, u8 reg, u16 val)
  54 {
  55         outw(val, atp->baseport + reg);
  56 }
  57
  58 static inline void atp_writeb_io(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
  59 {
  60         outb(val, atp->ioport[channel] + reg);
  61 }
  62
  63 static inline void atp_writew_io(struct atp_unit *atp, u8 channel, u8 reg, u16 val)
  64 {
  65         outw(val, atp->ioport[channel] + reg);
  66 }
  67
  68 static inline void atp_writeb_pci(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
  69 {
  70         outb(val, atp->pciport[channel] + reg);
  71 }
  72
  73 static inline void atp_writel_pci(struct atp_unit *atp, u8 channel, u8 reg, u32 val)
  74 {
  75         outl(val, atp->pciport[channel] + reg);
  76 }
  77
  78 static inline u8 atp_readb_base(struct atp_unit *atp, u8 reg)
  79 {
  80         return inb(atp->baseport + reg);
  81 }
  82
  83 static inline u16 atp_readw_base(struct atp_unit *atp, u8 reg)
  84 {
  85         return inw(atp->baseport + reg);
  86 }
  87
  88 static inline u32 atp_readl_base(struct atp_unit *atp, u8 reg)
  89 {
  90         return inl(atp->baseport + reg);
  91 }
  92
  93 static inline u8 atp_readb_io(struct atp_unit *atp, u8 channel, u8 reg)
  94 {
  95         return inb(atp->ioport[channel] + reg);
  96 }
  97
  98 static inline u16 atp_readw_io(struct atp_unit *atp, u8 channel, u8 reg)
  99 {
 100         return inw(atp->ioport[channel] + reg);
 101 }
 102
 103 static inline u8 atp_readb_pci(struct atp_unit *atp, u8 channel, u8 reg)
 104 {
 105         return inb(atp->pciport[channel] + reg);
 106 }
 107
 108 static inline bool is880(struct atp_unit *atp)
 109 {
 110         return atp->pdev->device == ATP880_DEVID1 ||
 111                atp->pdev->device == ATP880_DEVID2;
 112 }
 113
 114 static inline bool is885(struct atp_unit *atp)
 115 {
 116         return atp->pdev->device == ATP885_DEVID;
 117 }
 118
 119 static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
 120 {
 121         unsigned long flags;
 122         unsigned short int id;
 123         unsigned char i, j, c, target_id, lun,cmdp;
 124         unsigned char *prd;
 125         struct scsi_cmnd *workreq;
 126         unsigned long adrcnt, k;
 127 #ifdef ED_DBGP
 128         unsigned long l;
 129 #endif
 130         struct Scsi_Host *host = dev_id;
 131         struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
 132
 133         for (c = 0; c < 2; c++) {
 134                 j = atp_readb_io(dev, c, 0x1f);
 135                 if ((j & 0x80) != 0)
 136                         break;
 137                 dev->in_int[c] = 0;
 138         }
 139         if ((j & 0x80) == 0)
 140                 return IRQ_NONE;
 141 #ifdef ED_DBGP
 142         printk("atp870u_intr_handle enter\n");
 143 #endif
 144         dev->in_int[c] = 1;
 145         cmdp = atp_readb_io(dev, c, 0x10);
 146         if (dev->working[c] != 0) {
 147                 if (is885(dev)) {
 148                         if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0)
 149                                 atp_writeb_io(dev, c, 0x16,
 150                                               (atp_readb_io(dev, c, 0x16) | 0x80));
 151                 }
 152                 if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0)
 153                 {
 154                         for (k=0; k < 1000; k++) {
 155                                 if ((atp_readb_pci(dev, c, 2) & 0x08) == 0)
 156                                         break;
 157                                 if ((atp_readb_pci(dev, c, 2) & 0x01) == 0)
 158                                         break;
 159                         }
 160                 }
 161                 atp_writeb_pci(dev, c, 0, 0x00);
 162
 163                 i = atp_readb_io(dev, c, 0x17);
 164
 165                 if (is885(dev))
 166                         atp_writeb_pci(dev, c, 2, 0x06);
 167
 168                 target_id = atp_readb_io(dev, c, 0x15);
 169
 170                 /*
 171                  *      Remap wide devices onto id numbers
 172                  */
 173
 174                 if ((target_id & 0x40) != 0) {
 175                         target_id = (target_id & 0x07) | 0x08;
 176                 } else {
 177                         target_id &= 0x07;
 178                 }
 179
 180                 if ((j & 0x40) != 0) {
 181                      if (dev->last_cmd[c] == 0xff) {
 182                         dev->last_cmd[c] = target_id;
 183                      }
 184                      dev->last_cmd[c] |= 0x40;
 185                 }
 186                 if (is885(dev))
 187                         dev->r1f[c][target_id] |= j;
 188 #ifdef ED_DBGP
 189                 printk("atp870u_intr_handle status = %x\n",i);
 190 #endif
 191                 if (i == 0x85) {
 192                         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 193                            dev->last_cmd[c] = 0xff;
 194                         }
 195                         if (is885(dev)) {
 196                                 adrcnt = 0;
 197                                 ((unsigned char *) &adrcnt)[2] =
 198                                         atp_readb_io(dev, c, 0x12);
 199                                 ((unsigned char *) &adrcnt)[1] =
 200                                         atp_readb_io(dev, c, 0x13);
 201                                 ((unsigned char *) &adrcnt)[0] =
 202                                         atp_readb_io(dev, c, 0x14);
 203                                 if (dev->id[c][target_id].last_len != adrcnt) {
 204                                         k = dev->id[c][target_id].last_len;
 205                                         k -= adrcnt;
 206                                         dev->id[c][target_id].tran_len = k;
 207                                         dev->id[c][target_id].last_len = adrcnt;
 208                                 }
 209 #ifdef ED_DBGP
 210                                 printk("dev->id[c][target_id].last_len = %d "
 211                                        "dev->id[c][target_id].tran_len = %d\n",
 212                                        dev->id[c][target_id].last_len,
 213                                        dev->id[c][target_id].tran_len);
 214 #endif
 215                         }
 216
 217                         /*
 218                          *      Flip wide
 219                          */
 220                         if (dev->wide_id[c] != 0) {
 221                                 atp_writeb_io(dev, c, 0x1b, 0x01);
 222                                 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
 223                                         atp_writeb_io(dev, c, 0x1b, 0x01);
 224                         }
 225                         /*
 226                          *      Issue more commands
 227                          */
 228                         spin_lock_irqsave(dev->host->host_lock, flags);
 229                         if (((dev->quhd[c] != dev->quend[c]) ||
 230                              (dev->last_cmd[c] != 0xff)) &&
 231                             (dev->in_snd[c] == 0)) {
 232 #ifdef ED_DBGP
 233                                 printk("Call sent_s870\n");
 234 #endif
 235                                 send_s870(dev,c);
 236                         }
 237                         spin_unlock_irqrestore(dev->host->host_lock, flags);
 238                         /*
 239                          *      Done
 240                          */
 241                         dev->in_int[c] = 0;
 242 #ifdef ED_DBGP
 243                                 printk("Status 0x85 return\n");
 244 #endif
 245                         return IRQ_HANDLED;
 246                 }
 247
 248                 if (i == 0x40) {
 249                      dev->last_cmd[c] |= 0x40;
 250                      dev->in_int[c] = 0;
 251                      return IRQ_HANDLED;
 252                 }
 253
 254                 if (i == 0x21) {
 255                         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 256                            dev->last_cmd[c] = 0xff;
 257                         }
 258                         adrcnt = 0;
 259                         ((unsigned char *) &adrcnt)[2] =
 260                                 atp_readb_io(dev, c, 0x12);
 261                         ((unsigned char *) &adrcnt)[1] =
 262                                 atp_readb_io(dev, c, 0x13);
 263                         ((unsigned char *) &adrcnt)[0] =
 264                                 atp_readb_io(dev, c, 0x14);
 265                         k = dev->id[c][target_id].last_len;
 266                         k -= adrcnt;
 267                         dev->id[c][target_id].tran_len = k;
 268                         dev->id[c][target_id].last_len = adrcnt;
 269                         atp_writeb_io(dev, c, 0x10, 0x41);
 270                         atp_writeb_io(dev, c, 0x18, 0x08);
 271                         dev->in_int[c] = 0;
 272                         return IRQ_HANDLED;
 273                 }
 274
 275                 if (is885(dev)) {
 276                         if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
 277                                 if ((i == 0x4c) || (i == 0x8c))
 278                                         i=0x48;
 279                                 else
 280                                         i=0x49;
 281                         }
 282                 }
 283                 if ((i == 0x80) || (i == 0x8f)) {
 284 #ifdef ED_DBGP
 285                         printk(KERN_DEBUG "Device reselect\n");
 286 #endif
 287                         lun = 0;
 288                         if (cmdp == 0x44 || i == 0x80)
 289                                 lun = atp_readb_io(dev, c, 0x1d) & 0x07;
 290                         else {
 291                                 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 292                                    dev->last_cmd[c] = 0xff;
 293                                 }
 294                                 if (cmdp == 0x41) {
 295 #ifdef ED_DBGP
 296                                         printk("cmdp = 0x41\n");
 297 #endif
 298                                         adrcnt = 0;
 299                                         ((unsigned char *) &adrcnt)[2] =
 300                                                 atp_readb_io(dev, c, 0x12);
 301                                         ((unsigned char *) &adrcnt)[1] =
 302                                                 atp_readb_io(dev, c, 0x13);
 303                                         ((unsigned char *) &adrcnt)[0] =
 304                                                 atp_readb_io(dev, c, 0x14);
 305                                         k = dev->id[c][target_id].last_len;
 306                                         k -= adrcnt;
 307                                         dev->id[c][target_id].tran_len = k;
 308                                         dev->id[c][target_id].last_len = adrcnt;
 309                                         atp_writeb_io(dev, c, 0x18, 0x08);
 310                                         dev->in_int[c] = 0;
 311                                         return IRQ_HANDLED;
 312                                 } else {
 313 #ifdef ED_DBGP
 314                                         printk("cmdp != 0x41\n");
 315 #endif
 316                                         atp_writeb_io(dev, c, 0x10, 0x46);
 317                                         dev->id[c][target_id].dirct = 0x00;
 318                                         atp_writeb_io(dev, c, 0x12, 0x00);
 319                                         atp_writeb_io(dev, c, 0x13, 0x00);
 320                                         atp_writeb_io(dev, c, 0x14, 0x00);
 321                                         atp_writeb_io(dev, c, 0x18, 0x08);
 322                                         dev->in_int[c] = 0;
 323                                         return IRQ_HANDLED;
 324                                 }
 325                         }
 326                         if (dev->last_cmd[c] != 0xff) {
 327                            dev->last_cmd[c] |= 0x40;
 328                         }
 329                         if (is885(dev)) {
 330                                 j = atp_readb_base(dev, 0x29) & 0xfe;
 331                                 atp_writeb_base(dev, 0x29, j);
 332                         } else
 333                                 atp_writeb_io(dev, c, 0x10, 0x45);
 334
 335                         target_id = atp_readb_io(dev, c, 0x16);
 336                         /*
 337                          *      Remap wide identifiers
 338                          */
 339                         if ((target_id & 0x10) != 0) {
 340                                 target_id = (target_id & 0x07) | 0x08;
 341                         } else {
 342                                 target_id &= 0x07;
 343                         }
 344                         if (is885(dev))
 345                                 atp_writeb_io(dev, c, 0x10, 0x45);
 346                         workreq = dev->id[c][target_id].curr_req;
 347 #ifdef ED_DBGP
 348                         scmd_printk(KERN_DEBUG, workreq, "CDB");
 349                         for (l = 0; l < workreq->cmd_len; l++)
 350                                 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
 351                         printk("\n");
 352 #endif
 353
 354                         atp_writeb_io(dev, c, 0x0f, lun);
 355                         atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
 356                         adrcnt = dev->id[c][target_id].tran_len;
 357                         k = dev->id[c][target_id].last_len;
 358
 359                         atp_writeb_io(dev, c, 0x12, ((unsigned char *) &k)[2]);
 360                         atp_writeb_io(dev, c, 0x13, ((unsigned char *) &k)[1]);
 361                         atp_writeb_io(dev, c, 0x14, ((unsigned char *) &k)[0]);
 362 #ifdef ED_DBGP
 363                         printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k,
 364                                atp_readb_io(dev, c, 0x14),
 365                                atp_readb_io(dev, c, 0x13),
 366                                atp_readb_io(dev, c, 0x12));
 367 #endif
 368                         /* Remap wide */
 369                         j = target_id;
 370                         if (target_id > 7) {
 371                                 j = (j & 0x07) | 0x40;
 372                         }
 373                         /* Add direction */
 374                         j |= dev->id[c][target_id].dirct;
 375                         atp_writeb_io(dev, c, 0x15, j);
 376                         atp_writeb_io(dev, c, 0x16, 0x80);
 377
 378                         /* enable 32 bit fifo transfer */
 379                         if (is885(dev)) {
 380                                 i = atp_readb_pci(dev, c, 1) & 0xf3;
 381                                 //j=workreq->cmnd[0];
 382                                 if ((workreq->cmnd[0] == READ_6) ||
 383                                     (workreq->cmnd[0] == READ_10) ||
 384                                     (workreq->cmnd[0] == WRITE_6) ||
 385                                     (workreq->cmnd[0] == WRITE_10)) {
 386                                    i |= 0x0c;
 387                                 }
 388                                 atp_writeb_pci(dev, c, 1, i);
 389                         } else if (is880(dev)) {
 390                                 if ((workreq->cmnd[0] == READ_6) ||
 391                                     (workreq->cmnd[0] == READ_10) ||
 392                                     (workreq->cmnd[0] == WRITE_6) ||
 393                                     (workreq->cmnd[0] == WRITE_10))
 394                                         atp_writeb_base(dev, 0x3b,
 395                                                         (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
 396                                 else
 397                                         atp_writeb_base(dev, 0x3b,
 398                                                         atp_readb_base(dev, 0x3b) & 0x3f);
 399                         } else {
 400                                 if ((workreq->cmnd[0] == READ_6) ||
 401                                     (workreq->cmnd[0] == READ_10) ||
 402                                     (workreq->cmnd[0] == WRITE_6) ||
 403                                     (workreq->cmnd[0] == WRITE_10))
 404                                         atp_writeb_base(dev, 0x3a,
 405                                                         (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
 406                                 else
 407                                         atp_writeb_base(dev, 0x3a,
 408                                                         atp_readb_base(dev, 0x3a) & 0xf3);
 409                         }
 410                         j = 0;
 411                         id = 1;
 412                         id = id << target_id;
 413                         /*
 414                          *      Is this a wide device
 415                          */
 416                         if ((id & dev->wide_id[c]) != 0) {
 417                                 j |= 0x01;
 418                         }
 419                         atp_writeb_io(dev, c, 0x1b, j);
 420                         while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j)
 421                                 atp_writeb_io(dev, c, 0x1b, j);
 422                         if (dev->id[c][target_id].last_len == 0) {
 423                                 atp_writeb_io(dev, c, 0x18, 0x08);
 424                                 dev->in_int[c] = 0;
 425 #ifdef ED_DBGP
 426                                 printk("dev->id[c][target_id].last_len = 0\n");
 427 #endif
 428                                 return IRQ_HANDLED;
 429                         }
 430 #ifdef ED_DBGP
 431                         printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
 432 #endif
 433                         prd = dev->id[c][target_id].prd_pos;
 434                         while (adrcnt != 0) {
 435                                 id = ((unsigned short int *)prd)[2];
 436                                 if (id == 0) {
 437                                         k = 0x10000;
 438                                 } else {
 439                                         k = id;
 440                                 }
 441                                 if (k > adrcnt) {
 442                                         ((unsigned short int *)prd)[2] =
 443                                                 (unsigned short int)(k - adrcnt);
 444                                         ((unsigned long *)prd)[0] += adrcnt;
 445                                         adrcnt = 0;
 446                                         dev->id[c][target_id].prd_pos = prd;
 447                                 } else {
 448                                         adrcnt -= k;
 449                                         dev->id[c][target_id].prdaddr += 0x08;
 450                                         prd += 0x08;
 451                                         if (adrcnt == 0) {
 452                                                 dev->id[c][target_id].prd_pos = prd;
 453                                         }
 454                                 }
 455                         }
 456                         atp_writel_pci(dev, c, 0x04, dev->id[c][target_id].prdaddr);
 457 #ifdef ED_DBGP
 458                         printk("dev->id[%d][%d].prdaddr 0x%8x\n",
 459                                c, target_id, dev->id[c][target_id].prdaddr);
 460 #endif
 461                         if (!is885(dev)) {
 462                                 atp_writeb_pci(dev, c, 2, 0x06);
 463                                 atp_writeb_pci(dev, c, 2, 0x00);
 464                         }
 465                         /*
 466                          *      Check transfer direction
 467                          */
 468                         if (dev->id[c][target_id].dirct != 0) {
 469                                 atp_writeb_io(dev, c, 0x18, 0x08);
 470                                 atp_writeb_pci(dev, c, 0, 0x01);
 471                                 dev->in_int[c] = 0;
 472 #ifdef ED_DBGP
 473                                 printk("status 0x80 return dirct != 0\n");
 474 #endif
 475                                 return IRQ_HANDLED;
 476                         }
 477                         atp_writeb_io(dev, c, 0x18, 0x08);
 478                         atp_writeb_pci(dev, c, 0, 0x09);
 479                         dev->in_int[c] = 0;
 480 #ifdef ED_DBGP
 481                         printk("status 0x80 return dirct = 0\n");
 482 #endif
 483                         return IRQ_HANDLED;
 484                 }
 485
 486                 /*
 487                  *      Current scsi request on this target
 488                  */
 489
 490                 workreq = dev->id[c][target_id].curr_req;
 491
 492                 if (i == 0x42 || i == 0x16) {
 493                         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 494                            dev->last_cmd[c] = 0xff;
 495                         }
 496                         if (i == 0x16) {
 497                                 workreq->result = atp_readb_io(dev, c, 0x0f);
 498                                 if (((dev->r1f[c][target_id] & 0x10) != 0) && is885(dev)) {
 499                                         printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
 500                                         workreq->result = SAM_STAT_CHECK_CONDITION;
 501                                 }
 502                         } else
 503                                 workreq->result = SAM_STAT_CHECK_CONDITION;
 504
 505                         if (is885(dev)) {
 506                                 j = atp_readb_base(dev, 0x29) | 0x01;
 507                                 atp_writeb_base(dev, 0x29, j);
 508                         }
 509                         /*
 510                          *      Complete the command
 511                          */
 512                         scsi_dma_unmap(workreq);
 513
 514                         spin_lock_irqsave(dev->host->host_lock, flags);
 515                         (*workreq->scsi_done) (workreq);
 516 #ifdef ED_DBGP
 517                            printk("workreq->scsi_done\n");
 518 #endif
 519                         /*
 520                          *      Clear it off the queue
 521                          */
 522                         dev->id[c][target_id].curr_req = NULL;
 523                         dev->working[c]--;
 524                         spin_unlock_irqrestore(dev->host->host_lock, flags);
 525                         /*
 526                          *      Take it back wide
 527                          */
 528                         if (dev->wide_id[c] != 0) {
 529                                 atp_writeb_io(dev, c, 0x1b, 0x01);
 530                                 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
 531                                         atp_writeb_io(dev, c, 0x1b, 0x01);
 532                         }
 533                         /*
 534                          *      If there is stuff to send and nothing going then send it
 535                          */
 536                         spin_lock_irqsave(dev->host->host_lock, flags);
 537                         if (((dev->last_cmd[c] != 0xff) ||
 538                              (dev->quhd[c] != dev->quend[c])) &&
 539                             (dev->in_snd[c] == 0)) {
 540 #ifdef ED_DBGP
 541                            printk("Call sent_s870(scsi_done)\n");
 542 #endif
 543                            send_s870(dev,c);
 544                         }
 545                         spin_unlock_irqrestore(dev->host->host_lock, flags);
 546                         dev->in_int[c] = 0;
 547                         return IRQ_HANDLED;
 548                 }
 549                 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 550                    dev->last_cmd[c] = 0xff;
 551                 }
 552                 if (i == 0x4f) {
 553                         i = 0x89;
 554                 }
 555                 i &= 0x0f;
 556                 if (i == 0x09) {
 557                         atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
 558                         atp_writeb_pci(dev, c, 2, 0x06);
 559                         atp_writeb_pci(dev, c, 2, 0x00);
 560                         atp_writeb_io(dev, c, 0x10, 0x41);
 561                         if (is885(dev)) {
 562                                 k = dev->id[c][target_id].last_len;
 563                                 atp_writeb_io(dev, c, 0x12,
 564                                               ((unsigned char *) (&k))[2]);
 565                                 atp_writeb_io(dev, c, 0x13,
 566                                               ((unsigned char *) (&k))[1]);
 567                                 atp_writeb_io(dev, c, 0x14,
 568                                               ((unsigned char *) (&k))[0]);
 569                                 dev->id[c][target_id].dirct = 0x00;
 570                         } else {
 571                                 dev->id[c][target_id].dirct = 0x00;
 572                         }
 573                         atp_writeb_io(dev, c, 0x18, 0x08);
 574                         atp_writeb_pci(dev, c, 0, 0x09);
 575                         dev->in_int[c] = 0;
 576                         return IRQ_HANDLED;
 577                 }
 578                 if (i == 0x08) {
 579                         atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
 580                         atp_writeb_pci(dev, c, 2, 0x06);
 581                         atp_writeb_pci(dev, c, 2, 0x00);
 582                         atp_writeb_io(dev, c, 0x10, 0x41);
 583                         if (is885(dev)) {
 584                                 k = dev->id[c][target_id].last_len;
 585                                 atp_writeb_io(dev, c, 0x12,
 586                                               ((unsigned char *) (&k))[2]);
 587                                 atp_writeb_io(dev, c, 0x13,
 588                                               ((unsigned char *) (&k))[1]);
 589                                 atp_writeb_io(dev, c, 0x14,
 590                                               ((unsigned char *) (&k))[0]);
 591                         }
 592                         atp_writeb_io(dev, c, 0x15,
 593                                       atp_readb_io(dev, c, 0x15) | 0x20);
 594                         dev->id[c][target_id].dirct = 0x20;
 595                         atp_writeb_io(dev, c, 0x18, 0x08);
 596                         atp_writeb_pci(dev, c, 0, 0x01);
 597                         dev->in_int[c] = 0;
 598                         return IRQ_HANDLED;
 599                 }
 600                 if (i == 0x0a)
 601                         atp_writeb_io(dev, c, 0x10, 0x30);
 602                 else
 603                         atp_writeb_io(dev, c, 0x10, 0x46);
 604                 dev->id[c][target_id].dirct = 0x00;
 605                 atp_writeb_io(dev, c, 0x12, 0x00);
 606                 atp_writeb_io(dev, c, 0x13, 0x00);
 607                 atp_writeb_io(dev, c, 0x14, 0x00);
 608                 atp_writeb_io(dev, c, 0x18, 0x08);
 609         }
 610         dev->in_int[c] = 0;
 611
 612         return IRQ_HANDLED;
 613 }
 614 /**
 615  *      atp870u_queuecommand_lck -      Queue SCSI command
 616  *      @req_p: request block
 617  *      @done: completion function
 618  *
 619  *      Queue a command to the ATP queue. Called with the host lock held.
 620  */
 621 static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
 622                          void (*done) (struct scsi_cmnd *))
 623 {
 624         unsigned char c;
 625         unsigned int m;
 626         struct atp_unit *dev;
 627         struct Scsi_Host *host;
 628
 629         c = scmd_channel(req_p);
 630         req_p->sense_buffer[0]=0;
 631         scsi_set_resid(req_p, 0);
 632         if (scmd_channel(req_p) > 1) {
 633                 req_p->result = DID_BAD_TARGET << 16;
 634                 done(req_p);
 635 #ifdef ED_DBGP
 636                 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
 637 #endif
 638                 return 0;
 639         }
 640
 641         host = req_p->device->host;
 642         dev = (struct atp_unit *)&host->hostdata;
 643
 644         m = 1;
 645         m = m << scmd_id(req_p);
 646
 647         /*
 648          *      Fake a timeout for missing targets
 649          */
 650
 651         if ((m & dev->active_id[c]) == 0) {
 652                 req_p->result = DID_BAD_TARGET << 16;
 653                 done(req_p);
 654                 return 0;
 655         }
 656
 657         if (done) {
 658                 req_p->scsi_done = done;
 659         } else {
 660 #ifdef ED_DBGP
 661                 printk( "atp870u_queuecommand: done can't be NULL\n");
 662 #endif
 663                 req_p->result = 0;
 664                 done(req_p);
 665                 return 0;
 666         }
 667
 668         /*
 669          *      Count new command
 670          */
 671         dev->quend[c]++;
 672         if (dev->quend[c] >= qcnt) {
 673                 dev->quend[c] = 0;
 674         }
 675
 676         /*
 677          *      Check queue state
 678          */
 679         if (dev->quhd[c] == dev->quend[c]) {
 680                 if (dev->quend[c] == 0) {
 681                         dev->quend[c] = qcnt;
 682                 }
 683 #ifdef ED_DBGP
 684                 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
 685 #endif
 686                 dev->quend[c]--;
 687                 req_p->result = DID_BUS_BUSY << 16;
 688                 done(req_p);
 689                 return 0;
 690         }
 691         dev->quereq[c][dev->quend[c]] = req_p;
 692 #ifdef ED_DBGP
 693         printk("dev->ioport[c] = %x atp_readb_io(dev, c, 0x1c) = %x "
 694                "dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",
 695                dev->ioport[c], atp_readb_io(dev, c, 0x1c), c,
 696                dev->in_int[c],c,dev->in_snd[c]);
 697 #endif
 698         if ((atp_readb_io(dev, c, 0x1c) == 0) &&
 699             (dev->in_int[c] == 0) &&
 700             (dev->in_snd[c] == 0)) {
 701 #ifdef ED_DBGP
 702                 printk("Call sent_s870(atp870u_queuecommand)\n");
 703 #endif
 704                 send_s870(dev,c);
 705         }
 706 #ifdef ED_DBGP
 707         printk("atp870u_queuecommand : exit\n");
 708 #endif
 709         return 0;
 710 }
 711
 712 static DEF_SCSI_QCMD(atp870u_queuecommand)
 713
 714 /*
 715  *      send_s870       -       send a command to the controller
 716  *
 717  *      On entry there is work queued to be done. We move some of that work to the
 718  *      controller itself.
 719  *
 720  *      Caller holds the host lock.
 721  */
 722 static void send_s870(struct atp_unit *dev, unsigned char c)
 723 {
 724         struct scsi_cmnd *workreq = NULL;
 725         unsigned int i;//,k;
 726         unsigned char  j, target_id;
 727         unsigned char *prd;
 728         unsigned short int w;
 729         unsigned long l, bttl = 0;
 730         unsigned long  sg_count;
 731
 732         if (dev->in_snd[c] != 0) {
 733 #ifdef ED_DBGP
 734                 printk("cmnd in_snd\n");
 735 #endif
 736                 return;
 737         }
 738 #ifdef ED_DBGP
 739         printk("Sent_s870 enter\n");
 740 #endif
 741         dev->in_snd[c] = 1;
 742         if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
 743                 dev->last_cmd[c] &= 0x0f;
 744                 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
 745                 if (!workreq) {
 746                         dev->last_cmd[c] = 0xff;
 747                         if (dev->quhd[c] == dev->quend[c]) {
 748                                 dev->in_snd[c] = 0;
 749                                 return;
 750                         }
 751                 }
 752         }
 753         if (!workreq) {
 754                 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
 755                         dev->in_snd[c] = 0;
 756                         return;
 757                 }
 758                 dev->working[c]++;
 759                 j = dev->quhd[c];
 760                 dev->quhd[c]++;
 761                 if (dev->quhd[c] >= qcnt)
 762                         dev->quhd[c] = 0;
 763                 workreq = dev->quereq[c][dev->quhd[c]];
 764                 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
 765                         dev->quhd[c] = j;
 766                         dev->working[c]--;
 767                         dev->in_snd[c] = 0;
 768                         return;
 769                 }
 770                 dev->id[c][scmd_id(workreq)].curr_req = workreq;
 771                 dev->last_cmd[c] = scmd_id(workreq);
 772         }
 773         if ((atp_readb_io(dev, c, 0x1f) & 0xb0) != 0 ||
 774             atp_readb_io(dev, c, 0x1c) != 0) {
 775 #ifdef ED_DBGP
 776                 printk("Abort to Send\n");
 777 #endif
 778                 dev->last_cmd[c] |= 0x40;
 779                 dev->in_snd[c] = 0;
 780                 return;
 781         }
 782 #ifdef ED_DBGP
 783         printk("OK to Send\n");
 784         scmd_printk(KERN_DEBUG, workreq, "CDB");
 785         for(i=0;i<workreq->cmd_len;i++) {
 786                 printk(" %x",workreq->cmnd[i]);
 787         }
 788         printk("\n");
 789 #endif
 790         l = scsi_bufflen(workreq);
 791
 792         if (is885(dev)) {
 793                 j = atp_readb_base(dev, 0x29) & 0xfe;
 794                 atp_writeb_base(dev, 0x29, j);
 795                 dev->r1f[c][scmd_id(workreq)] = 0;
 796         }
 797
 798         if (workreq->cmnd[0] == READ_CAPACITY) {
 799                 if (l > 8)
 800                         l = 8;
 801         }
 802         if (workreq->cmnd[0] == TEST_UNIT_READY) {
 803                 l = 0;
 804         }
 805
 806         j = 0;
 807         target_id = scmd_id(workreq);
 808
 809         /*
 810          *      Wide ?
 811          */
 812         w = 1;
 813         w = w << target_id;
 814         if ((w & dev->wide_id[c]) != 0) {
 815                 j |= 0x01;
 816         }
 817         atp_writeb_io(dev, c, 0x1b, j);
 818         while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j) {
 819                 atp_writeb_pci(dev, c, 0x1b, j);
 820 #ifdef ED_DBGP
 821                 printk("send_s870 while loop 1\n");
 822 #endif
 823         }
 824         /*
 825          *      Write the command
 826          */
 827
 828         atp_writeb_io(dev, c, 0x00, workreq->cmd_len);
 829         atp_writeb_io(dev, c, 0x01, 0x2c);
 830         if (is885(dev))
 831                 atp_writeb_io(dev, c, 0x02, 0x7f);
 832         else
 833                 atp_writeb_io(dev, c, 0x02, 0xcf);
 834         for (i = 0; i < workreq->cmd_len; i++)
 835                 atp_writeb_io(dev, c, 0x03 + i, workreq->cmnd[i]);
 836         atp_writeb_io(dev, c, 0x0f, workreq->device->lun);
 837         /*
 838          *      Write the target
 839          */
 840         atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
 841 #ifdef ED_DBGP
 842         printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,
 843                dev->id[c][target_id].devsp);
 844 #endif
 845
 846         sg_count = scsi_dma_map(workreq);
 847         /*
 848          *      Write transfer size
 849          */
 850         atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&l))[2]);
 851         atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&l))[1]);
 852         atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&l))[0]);
 853         j = target_id;
 854         dev->id[c][j].last_len = l;
 855         dev->id[c][j].tran_len = 0;
 856 #ifdef ED_DBGP
 857         printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
 858 #endif
 859         /*
 860          *      Flip the wide bits
 861          */
 862         if ((j & 0x08) != 0) {
 863                 j = (j & 0x07) | 0x40;
 864         }
 865         /*
 866          *      Check transfer direction
 867          */
 868         if (workreq->sc_data_direction == DMA_TO_DEVICE)
 869                 atp_writeb_io(dev, c, 0x15, j | 0x20);
 870         else
 871                 atp_writeb_io(dev, c, 0x15, j);
 872         atp_writeb_io(dev, c, 0x16, atp_readb_io(dev, c, 0x16) | 0x80);
 873         atp_writeb_io(dev, c, 0x16, 0x80);
 874         dev->id[c][target_id].dirct = 0;
 875         if (l == 0) {
 876                 if (atp_readb_io(dev, c, 0x1c) == 0) {
 877 #ifdef ED_DBGP
 878                         printk("change SCSI_CMD_REG 0x08\n");
 879 #endif
 880                         atp_writeb_io(dev, c, 0x18, 0x08);
 881                 } else
 882                         dev->last_cmd[c] |= 0x40;
 883                 dev->in_snd[c] = 0;
 884                 return;
 885         }
 886         prd = dev->id[c][target_id].prd_table;
 887         dev->id[c][target_id].prd_pos = prd;
 888
 889         /*
 890          *      Now write the request list. Either as scatter/gather or as
 891          *      a linear chain.
 892          */
 893
 894         if (l) {
 895                 struct scatterlist *sgpnt;
 896                 i = 0;
 897                 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
 898                         bttl = sg_dma_address(sgpnt);
 899                         l=sg_dma_len(sgpnt);
 900 #ifdef ED_DBGP
 901                         printk("1. bttl %x, l %x\n",bttl, l);
 902 #endif
 903                         while (l > 0x10000) {
 904                                 (((u16 *) (prd))[i + 3]) = 0x0000;
 905                                 (((u16 *) (prd))[i + 2]) = 0x0000;
 906                                 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
 907                                 l -= 0x10000;
 908                                 bttl += 0x10000;
 909                                 i += 0x04;
 910                         }
 911                         (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
 912                         (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
 913                         (((u16 *) (prd))[i + 3]) = 0;
 914                         i += 0x04;
 915                 }
 916                 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
 917 #ifdef ED_DBGP
 918                 printk("prd %4x %4x %4x %4x\n",
 919                        (((unsigned short int *)prd)[0]),
 920                        (((unsigned short int *)prd)[1]),
 921                        (((unsigned short int *)prd)[2]),
 922                        (((unsigned short int *)prd)[3]));
 923                 printk("2. bttl %x, l %x\n",bttl, l);
 924 #endif
 925         }
 926 #ifdef ED_DBGP
 927         printk("send_s870: prdaddr_2 0x%8x target_id %d\n",
 928                dev->id[c][target_id].prdaddr,target_id);
 929 #endif
 930         dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
 931         atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
 932         atp_writeb_pci(dev, c, 2, 0x06);
 933         atp_writeb_pci(dev, c, 2, 0x00);
 934         if (is885(dev)) {
 935                 j = atp_readb_pci(dev, c, 1) & 0xf3;
 936                 if ((workreq->cmnd[0] == READ_6) ||
 937                     (workreq->cmnd[0] == READ_10) ||
 938                     (workreq->cmnd[0] == WRITE_6) ||
 939                     (workreq->cmnd[0] == WRITE_10)) {
 940                         j |= 0x0c;
 941                 }
 942                 atp_writeb_pci(dev, c, 1, j);
 943         } else if (is880(dev)) {
 944                 if ((workreq->cmnd[0] == READ_6) ||
 945                     (workreq->cmnd[0] == READ_10) ||
 946                     (workreq->cmnd[0] == WRITE_6) ||
 947                     (workreq->cmnd[0] == WRITE_10))
 948                         atp_writeb_base(dev, 0x3b,
 949                                         (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
 950                 else
 951                         atp_writeb_base(dev, 0x3b,
 952                                         atp_readb_base(dev, 0x3b) & 0x3f);
 953         } else {
 954                 if ((workreq->cmnd[0] == READ_6) ||
 955                     (workreq->cmnd[0] == READ_10) ||
 956                     (workreq->cmnd[0] == WRITE_6) ||
 957                     (workreq->cmnd[0] == WRITE_10))
 958                         atp_writeb_base(dev, 0x3a,
 959                                         (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
 960                 else
 961                         atp_writeb_base(dev, 0x3a,
 962                                         atp_readb_base(dev, 0x3a) & 0xf3);
 963         }
 964
 965         if(workreq->sc_data_direction == DMA_TO_DEVICE) {
 966                 dev->id[c][target_id].dirct = 0x20;
 967                 if (atp_readb_io(dev, c, 0x1c) == 0) {
 968                         atp_writeb_io(dev, c, 0x18, 0x08);
 969                         atp_writeb_pci(dev, c, 0, 0x01);
 970 #ifdef ED_DBGP
 971                 printk( "start DMA(to target)\n");
 972 #endif
 973                 } else {
 974                         dev->last_cmd[c] |= 0x40;
 975                 }
 976                 dev->in_snd[c] = 0;
 977                 return;
 978         }
 979         if (atp_readb_io(dev, c, 0x1c) == 0) {
 980                 atp_writeb_io(dev, c, 0x18, 0x08);
 981                 atp_writeb_pci(dev, c, 0, 0x09);
 982 #ifdef ED_DBGP
 983                 printk( "start DMA(to host)\n");
 984 #endif
 985         } else {
 986                 dev->last_cmd[c] |= 0x40;
 987         }
 988         dev->in_snd[c] = 0;
 989         return;
 990
 991 }
 992
 993 static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
 994 {
 995         unsigned short int i, k;
 996         unsigned char j;
 997
 998         atp_writew_io(dev, 0, 0x1c, *val);
 999         for (i = 0; i < 10; i++) {      /* stable >= bus settle delay(400 ns)  */
1000                 k = atp_readw_io(dev, 0, 0x1c);
1001                 j = (unsigned char) (k >> 8);
1002                 if ((k & 0x8000) != 0)  /* DB7 all release?    */
1003                         i = 0;
1004         }
1005         *val |= 0x4000;         /* assert DB6           */
1006         atp_writew_io(dev, 0, 0x1c, *val);
1007         *val &= 0xdfff;         /* assert DB5           */
1008         atp_writew_io(dev, 0, 0x1c, *val);
1009         for (i = 0; i < 10; i++) {      /* stable >= bus settle delay(400 ns) */
1010                 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) != 0) /* DB5 all release?       */
1011                         i = 0;
1012         }
1013         *val |= 0x8000;         /* no DB4-0, assert DB7    */
1014         *val &= 0xe0ff;
1015         atp_writew_io(dev, 0, 0x1c, *val);
1016         *val &= 0xbfff;         /* release DB6             */
1017         atp_writew_io(dev, 0, 0x1c, *val);
1018         for (i = 0; i < 10; i++) {      /* stable >= bus settle delay(400 ns)  */
1019                 if ((atp_readw_io(dev, 0, 0x1c) & 0x4000) != 0) /* DB6 all release?  */
1020                         i = 0;
1021         }
1022
1023         return j;
1024 }
1025
1026 static void tscam(struct Scsi_Host *host, bool wide_chip, u8 scam_on)
1027 {
1028
1029         unsigned char i, j, k;
1030         unsigned long n;
1031         unsigned short int m, assignid_map, val;
1032         unsigned char mbuf[33], quintet[2];
1033         struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
1034         static unsigned char g2q_tab[8] = {
1035                 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
1036         };
1037
1038 /*  I can't believe we need this before we've even done anything.  Remove it
1039  *  and see if anyone bitches.
1040         for (i = 0; i < 0x10; i++) {
1041                 udelay(0xffff);
1042         }
1043  */
1044
1045         atp_writeb_io(dev, 0, 1, 0x08);
1046         atp_writeb_io(dev, 0, 2, 0x7f);
1047         atp_writeb_io(dev, 0, 0x11, 0x20);
1048
1049         if ((scam_on & 0x40) == 0) {
1050                 return;
1051         }
1052         m = 1;
1053         m <<= dev->host_id[0];
1054         j = 16;
1055         if (!wide_chip) {
1056                 m |= 0xff00;
1057                 j = 8;
1058         }
1059         assignid_map = m;
1060         atp_writeb_io(dev, 0, 0x02, 0x02);      /* 2*2=4ms,3EH 2/32*3E=3.9ms */
1061         atp_writeb_io(dev, 0, 0x03, 0);
1062         atp_writeb_io(dev, 0, 0x04, 0);
1063         atp_writeb_io(dev, 0, 0x05, 0);
1064         atp_writeb_io(dev, 0, 0x06, 0);
1065         atp_writeb_io(dev, 0, 0x07, 0);
1066         atp_writeb_io(dev, 0, 0x08, 0);
1067
1068         for (i = 0; i < j; i++) {
1069                 m = 1;
1070                 m = m << i;
1071                 if ((m & assignid_map) != 0) {
1072                         continue;
1073                 }
1074                 atp_writeb_io(dev, 0, 0x0f, 0);
1075                 atp_writeb_io(dev, 0, 0x12, 0);
1076                 atp_writeb_io(dev, 0, 0x13, 0);
1077                 atp_writeb_io(dev, 0, 0x14, 0);
1078                 if (i > 7) {
1079                         k = (i & 0x07) | 0x40;
1080                 } else {
1081                         k = i;
1082                 }
1083                 atp_writeb_io(dev, 0, 0x15, k);
1084                 if (wide_chip)
1085                         atp_writeb_io(dev, 0, 0x1b, 0x01);
1086                 else
1087                         atp_writeb_io(dev, 0, 0x1b, 0x00);
1088                 do {
1089                         atp_writeb_io(dev, 0, 0x18, 0x09);
1090
1091                         while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0x00)
1092                                 cpu_relax();
1093                         k = atp_readb_io(dev, 0, 0x17);
1094                         if ((k == 0x85) || (k == 0x42))
1095                                 break;
1096                         if (k != 0x16)
1097                                 atp_writeb_io(dev, 0, 0x10, 0x41);
1098                 } while (k != 0x16);
1099                 if ((k == 0x85) || (k == 0x42))
1100                         continue;
1101                 assignid_map |= m;
1102
1103         }
1104         atp_writeb_io(dev, 0, 0x02, 0x7f);
1105         atp_writeb_io(dev, 0, 0x1b, 0x02);
1106
1107         udelay(2);
1108
1109         val = 0x0080;           /* bsy  */
1110         atp_writew_io(dev, 0, 0x1c, val);
1111         val |= 0x0040;          /* sel  */
1112         atp_writew_io(dev, 0, 0x1c, val);
1113         val |= 0x0004;          /* msg  */
1114         atp_writew_io(dev, 0, 0x1c, val);
1115         udelay(2);              /* 2 deskew delay(45ns*2=90ns) */
1116         val &= 0x007f;          /* no bsy  */
1117         atp_writew_io(dev, 0, 0x1c, val);
1118         msleep(128);
1119         val &= 0x00fb;          /* after 1ms no msg */
1120         atp_writew_io(dev, 0, 0x1c, val);
1121         while ((atp_readb_io(dev, 0, 0x1c) & 0x04) != 0)
1122                 ;
1123         udelay(2);
1124         udelay(100);
1125         for (n = 0; n < 0x30000; n++)
1126                 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) != 0)   /* bsy ? */
1127                         break;
1128         if (n < 0x30000)
1129                 for (n = 0; n < 0x30000; n++)
1130                         if ((atp_readb_io(dev, 0, 0x1c) & 0x81) == 0x0081) {
1131                                 udelay(2);
1132                                 val |= 0x8003;          /* io,cd,db7  */
1133                                 atp_writew_io(dev, 0, 0x1c, val);
1134                                 udelay(2);
1135                                 val &= 0x00bf;          /* no sel     */
1136                                 atp_writew_io(dev, 0, 0x1c, val);
1137                                 udelay(2);
1138                                 break;
1139                         }
1140         while (1) {
1141         /*
1142          * The funny division into multiple delays is to accomodate
1143          * arches like ARM where udelay() multiplies its argument by
1144          * a large number to initialize a loop counter.  To avoid
1145          * overflow, the maximum supported udelay is 2000 microseconds.
1146          *
1147          * XXX it would be more polite to find a way to use msleep()
1148          */
1149         mdelay(2);
1150         udelay(48);
1151         if ((atp_readb_io(dev, 0, 0x1c) & 0x80) == 0x00) {      /* bsy ? */
1152                 atp_writew_io(dev, 0, 0x1c, 0);
1153                 atp_writeb_io(dev, 0, 0x1b, 0);
1154                 atp_writeb_io(dev, 0, 0x15, 0);
1155                 atp_writeb_io(dev, 0, 0x18, 0x09);
1156                 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0)
1157                         cpu_relax();
1158                 atp_readb_io(dev, 0, 0x17);
1159                 return;
1160         }
1161         val &= 0x00ff;          /* synchronization  */
1162         val |= 0x3f00;
1163         fun_scam(dev, &val);
1164         udelay(2);
1165         val &= 0x00ff;          /* isolation        */
1166         val |= 0x2000;
1167         fun_scam(dev, &val);
1168         udelay(2);
1169         i = 8;
1170         j = 0;
1171
1172         while (1) {
1173                 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) == 0)
1174                         continue;
1175                 udelay(2);
1176                 val &= 0x00ff;          /* get ID_STRING */
1177                 val |= 0x2000;
1178                 k = fun_scam(dev, &val);
1179                 if ((k & 0x03) == 0)
1180                         break;
1181                 mbuf[j] <<= 0x01;
1182                 mbuf[j] &= 0xfe;
1183                 if ((k & 0x02) != 0)
1184                         mbuf[j] |= 0x01;
1185                 i--;
1186                 if (i > 0)
1187                         continue;
1188                 j++;
1189                 i = 8;
1190         }
1191
1192         /* isolation complete..  */
1193 /*    mbuf[32]=0;
1194         printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1195         i = 15;
1196         j = mbuf[0];
1197         if ((j & 0x20) != 0) {  /* bit5=1:ID up to 7      */
1198                 i = 7;
1199         }
1200         if ((j & 0x06) != 0) {  /* IDvalid?             */
1201                 k = mbuf[1];
1202                 while (1) {
1203                         m = 1;
1204                         m <<= k;
1205                         if ((m & assignid_map) == 0)
1206                                 break;
1207                         if (k > 0)
1208                                 k--;
1209                         else
1210                                 break;
1211                 }
1212         }
1213         if ((m & assignid_map) != 0) {  /* srch from max acceptable ID#  */
1214                 k = i;                  /* max acceptable ID#            */
1215                 while (1) {
1216                         m = 1;
1217                         m <<= k;
1218                         if ((m & assignid_map) == 0)
1219                                 break;
1220                         if (k > 0)
1221                                 k--;
1222                         else
1223                                 break;
1224                 }
1225         }
1226         /* k=binID#,       */
1227         assignid_map |= m;
1228         if (k < 8) {
1229                 quintet[0] = 0x38;      /* 1st dft ID<8    */
1230         } else {
1231                 quintet[0] = 0x31;      /* 1st  ID>=8      */
1232         }
1233         k &= 0x07;
1234         quintet[1] = g2q_tab[k];
1235
1236         val &= 0x00ff;          /* AssignID 1stQuintet,AH=001xxxxx  */
1237         m = quintet[0] << 8;
1238         val |= m;
1239         fun_scam(dev, &val);
1240         val &= 0x00ff;          /* AssignID 2ndQuintet,AH=001xxxxx */
1241         m = quintet[1] << 8;
1242         val |= m;
1243         fun_scam(dev, &val);
1244
1245         }
1246 }
1247
1248 static void atp870u_free_tables(struct Scsi_Host *host)
1249 {
1250         struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1251         int j, k;
1252         for (j=0; j < 2; j++) {
1253                 for (k = 0; k < 16; k++) {
1254                         if (!atp_dev->id[j][k].prd_table)
1255                                 continue;
1256                         dma_free_coherent(&atp_dev->pdev->dev, 1024,
1257                                           atp_dev->id[j][k].prd_table,
1258                                           atp_dev->id[j][k].prd_bus);
1259                         atp_dev->id[j][k].prd_table = NULL;
1260                 }
1261         }
1262 }
1263
1264 static int atp870u_init_tables(struct Scsi_Host *host)
1265 {
1266         struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1267         int c,k;
1268         for(c=0;c < 2;c++) {
1269                 for(k=0;k<16;k++) {
1270                         atp_dev->id[c][k].prd_table =
1271                                 dma_alloc_coherent(&atp_dev->pdev->dev, 1024,
1272                                                    &(atp_dev->id[c][k].prd_bus),
1273                                                    GFP_KERNEL);
1274                         if (!atp_dev->id[c][k].prd_table) {
1275                                 printk("atp870u_init_tables fail\n");
1276                                 atp870u_free_tables(host);
1277                                 return -ENOMEM;
1278                         }
1279                         atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1280                         atp_dev->id[c][k].devsp=0x20;
1281                         atp_dev->id[c][k].devtype = 0x7f;
1282                         atp_dev->id[c][k].curr_req = NULL;
1283                 }
1284
1285                 atp_dev->active_id[c] = 0;
1286                 atp_dev->wide_id[c] = 0;
1287                 atp_dev->host_id[c] = 0x07;
1288                 atp_dev->quhd[c] = 0;
1289                 atp_dev->quend[c] = 0;
1290                 atp_dev->last_cmd[c] = 0xff;
1291                 atp_dev->in_snd[c] = 0;
1292                 atp_dev->in_int[c] = 0;
1293
1294                 for (k = 0; k < qcnt; k++) {
1295                         atp_dev->quereq[c][k] = NULL;
1296                 }
1297                 for (k = 0; k < 16; k++) {
1298                            atp_dev->id[c][k].curr_req = NULL;
1299                            atp_dev->sp[c][k] = 0x04;
1300                 }
1301         }
1302         return 0;
1303 }
1304
1305 static void atp_set_host_id(struct atp_unit *atp, u8 c, u8 host_id)
1306 {
1307         atp_writeb_io(atp, c, 0, host_id | 0x08);
1308         atp_writeb_io(atp, c, 0x18, 0);
1309         while ((atp_readb_io(atp, c, 0x1f) & 0x80) == 0)
1310                 mdelay(1);
1311         atp_readb_io(atp, c, 0x17);
1312         atp_writeb_io(atp, c, 1, 8);
1313         atp_writeb_io(atp, c, 2, 0x7f);
1314         atp_writeb_io(atp, c, 0x11, 0x20);
1315 }
1316
1317 static void atp870_init(struct Scsi_Host *shpnt)
1318 {
1319         struct atp_unit *atpdev = shost_priv(shpnt);
1320         struct pci_dev *pdev = atpdev->pdev;
1321         unsigned char k, host_id;
1322         u8 scam_on;
1323         bool wide_chip =
1324                 (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7610 &&
1325                  pdev->revision == 4) ||
1326                 (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7612UW) ||
1327                 (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7612SUW);
1328
1329         pci_read_config_byte(pdev, 0x49, &host_id);
1330
1331         dev_info(&pdev->dev, "ACARD AEC-671X PCI Ultra/W SCSI-2/3 "
1332                  "Host Adapter: IO:%lx, IRQ:%d.\n",
1333                  shpnt->io_port, shpnt->irq);
1334
1335         atpdev->ioport[0] = shpnt->io_port;
1336         atpdev->pciport[0] = shpnt->io_port + 0x20;
1337         host_id &= 0x07;
1338         atpdev->host_id[0] = host_id;
1339         scam_on = atp_readb_pci(atpdev, 0, 2);
1340         atpdev->global_map[0] = atp_readb_base(atpdev, 0x2d);
1341         atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x2e);
1342
1343         if (atpdev->ultra_map[0] == 0) {
1344                 scam_on = 0x00;
1345                 atpdev->global_map[0] = 0x20;
1346                 atpdev->ultra_map[0] = 0xffff;
1347         }
1348
1349         if (pdev->revision > 0x07)      /* check if atp876 chip */
1350                 atp_writeb_base(atpdev, 0x3e, 0x00); /* enable terminator */
1351
1352         k = (atp_readb_base(atpdev, 0x3a) & 0xf3) | 0x10;
1353         atp_writeb_base(atpdev, 0x3a, k);
1354         atp_writeb_base(atpdev, 0x3a, k & 0xdf);
1355         msleep(32);
1356         atp_writeb_base(atpdev, 0x3a, k);
1357         msleep(32);
1358         atp_set_host_id(atpdev, 0, host_id);
1359
1360         tscam(shpnt, wide_chip, scam_on);
1361         atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) | 0x10);
1362         atp_is(atpdev, 0, wide_chip, 0);
1363         atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) & 0xef);
1364         atp_writeb_base(atpdev, 0x3b, atp_readb_base(atpdev, 0x3b) | 0x20);
1365         shpnt->max_id = wide_chip ? 16 : 8;
1366         shpnt->this_id = host_id;
1367 }
1368
1369 static void atp880_init(struct Scsi_Host *shpnt)
1370 {
1371         struct atp_unit *atpdev = shost_priv(shpnt);
1372         struct pci_dev *pdev = atpdev->pdev;
1373         unsigned char k, m, host_id;
1374         unsigned int n;
1375
1376         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
1377
1378         atpdev->ioport[0] = shpnt->io_port + 0x40;
1379         atpdev->pciport[0] = shpnt->io_port + 0x28;
1380
1381         host_id = atp_readb_base(atpdev, 0x39) >> 4;
1382
1383         dev_info(&pdev->dev, "ACARD AEC-67160 PCI Ultra3 LVD "
1384                  "Host Adapter: IO:%lx, IRQ:%d.\n",
1385                  shpnt->io_port, shpnt->irq);
1386         atpdev->host_id[0] = host_id;
1387
1388         atpdev->global_map[0] = atp_readb_base(atpdev, 0x35);
1389         atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x3c);
1390
1391         n = 0x3f09;
1392         while (n < 0x4000) {
1393                 m = 0;
1394                 atp_writew_base(atpdev, 0x34, n);
1395                 n += 0x0002;
1396                 if (atp_readb_base(atpdev, 0x30) == 0xff)
1397                         break;
1398
1399                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1400                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1401                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1402                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1403                 atp_writew_base(atpdev, 0x34, n);
1404                 n += 0x0002;
1405                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1406                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1407                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1408                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1409                 atp_writew_base(atpdev, 0x34, n);
1410                 n += 0x0002;
1411                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1412                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1413                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1414                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1415                 atp_writew_base(atpdev, 0x34, n);
1416                 n += 0x0002;
1417                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1418                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1419                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1420                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1421                 n += 0x0018;
1422         }
1423         atp_writew_base(atpdev, 0x34, 0);
1424         atpdev->ultra_map[0] = 0;
1425         atpdev->async[0] = 0;
1426         for (k = 0; k < 16; k++) {
1427                 n = 1 << k;
1428                 if (atpdev->sp[0][k] > 1)
1429                         atpdev->ultra_map[0] |= n;
1430                 else
1431                         if (atpdev->sp[0][k] == 0)
1432                                 atpdev->async[0] |= n;
1433         }
1434         atpdev->async[0] = ~(atpdev->async[0]);
1435         atp_writeb_base(atpdev, 0x35, atpdev->global_map[0]);
1436
1437         k = atp_readb_base(atpdev, 0x38) & 0x80;
1438         atp_writeb_base(atpdev, 0x38, k);
1439         atp_writeb_base(atpdev, 0x3b, 0x20);
1440         msleep(32);
1441         atp_writeb_base(atpdev, 0x3b, 0);
1442         msleep(32);
1443         atp_readb_io(atpdev, 0, 0x1b);
1444         atp_readb_io(atpdev, 0, 0x17);
1445
1446         atp_set_host_id(atpdev, 0, host_id);
1447
1448         tscam(shpnt, true, atp_readb_base(atpdev, 0x22));
1449         atp_is(atpdev, 0, true, atp_readb_base(atpdev, 0x3f) & 0x40);
1450         atp_writeb_base(atpdev, 0x38, 0xb0);
1451         shpnt->max_id = 16;
1452         shpnt->this_id = host_id;
1453 }
1454
1455 static void atp885_init(struct Scsi_Host *shpnt)
1456 {
1457         struct atp_unit *atpdev = shost_priv(shpnt);
1458         struct pci_dev *pdev = atpdev->pdev;
1459         unsigned char k, m, c;
1460         unsigned int n;
1461         unsigned char setupdata[2][16];
1462
1463         dev_info(&pdev->dev, "ACARD AEC-67162 PCI Ultra3 LVD "
1464                  "Host Adapter: IO:%lx, IRQ:%d.\n",
1465                  shpnt->io_port, shpnt->irq);
1466
1467         atpdev->ioport[0] = shpnt->io_port + 0x80;
1468         atpdev->ioport[1] = shpnt->io_port + 0xc0;
1469         atpdev->pciport[0] = shpnt->io_port + 0x40;
1470         atpdev->pciport[1] = shpnt->io_port + 0x50;
1471
1472         c = atp_readb_base(atpdev, 0x29);
1473         atp_writeb_base(atpdev, 0x29, c | 0x04);
1474
1475         n = 0x1f80;
1476         while (n < 0x2000) {
1477                 atp_writew_base(atpdev, 0x3c, n);
1478                 if (atp_readl_base(atpdev, 0x38) == 0xffffffff)
1479                         break;
1480                 for (m = 0; m < 2; m++) {
1481                         atpdev->global_map[m] = 0;
1482                         for (k = 0; k < 4; k++) {
1483                                 atp_writew_base(atpdev, 0x3c, n++);
1484                                 ((u32 *)&setupdata[m][0])[k] =
1485                                         atp_readl_base(atpdev, 0x38);
1486                         }
1487                         for (k = 0; k < 4; k++) {
1488                                 atp_writew_base(atpdev, 0x3c, n++);
1489                                 ((u32 *)&atpdev->sp[m][0])[k] =
1490                                         atp_readl_base(atpdev, 0x38);
1491                         }
1492                         n += 8;
1493                 }
1494         }
1495         c = atp_readb_base(atpdev, 0x29);
1496         atp_writeb_base(atpdev, 0x29, c & 0xfb);
1497         for (c = 0; c < 2; c++) {
1498                 atpdev->ultra_map[c] = 0;
1499                 atpdev->async[c] = 0;
1500                 for (k = 0; k < 16; k++) {
1501                         n = 1 << k;
1502                         if (atpdev->sp[c][k] > 1)
1503                                 atpdev->ultra_map[c] |= n;
1504                         else
1505                                 if (atpdev->sp[c][k] == 0)
1506                                         atpdev->async[c] |= n;
1507                 }
1508                 atpdev->async[c] = ~(atpdev->async[c]);
1509
1510                 if (atpdev->global_map[c] == 0) {
1511                         k = setupdata[c][1];
1512                         if ((k & 0x40) != 0)
1513                                 atpdev->global_map[c] |= 0x20;
1514                         k &= 0x07;
1515                         atpdev->global_map[c] |= k;
1516                         if ((setupdata[c][2] & 0x04) != 0)
1517                                 atpdev->global_map[c] |= 0x08;
1518                         atpdev->host_id[c] = setupdata[c][0] & 0x07;
1519                 }
1520         }
1521
1522         k = atp_readb_base(atpdev, 0x28) & 0x8f;
1523         k |= 0x10;
1524         atp_writeb_base(atpdev, 0x28, k);
1525         atp_writeb_pci(atpdev, 0, 1, 0x80);
1526         atp_writeb_pci(atpdev, 1, 1, 0x80);
1527         msleep(100);
1528         atp_writeb_pci(atpdev, 0, 1, 0);
1529         atp_writeb_pci(atpdev, 1, 1, 0);
1530         msleep(1000);
1531         atp_readb_io(atpdev, 0, 0x1b);
1532         atp_readb_io(atpdev, 0, 0x17);
1533         atp_readb_io(atpdev, 1, 0x1b);
1534         atp_readb_io(atpdev, 1, 0x17);
1535
1536         k = atpdev->host_id[0];
1537         if (k > 7)
1538                 k = (k & 0x07) | 0x40;
1539         atp_set_host_id(atpdev, 0, k);
1540
1541         k = atpdev->host_id[1];
1542         if (k > 7)
1543                 k = (k & 0x07) | 0x40;
1544         atp_set_host_id(atpdev, 1, k);
1545
1546         msleep(600); /* this delay used to be called tscam_885() */
1547         dev_info(&pdev->dev, "Scanning Channel A SCSI Device ...\n");
1548         atp_is(atpdev, 0, true, atp_readb_io(atpdev, 0, 0x1b) >> 7);
1549         atp_writeb_io(atpdev, 0, 0x16, 0x80);
1550         dev_info(&pdev->dev, "Scanning Channel B SCSI Device ...\n");
1551         atp_is(atpdev, 1, true, atp_readb_io(atpdev, 1, 0x1b) >> 7);
1552         atp_writeb_io(atpdev, 1, 0x16, 0x80);
1553         k = atp_readb_base(atpdev, 0x28) & 0xcf;
1554         k |= 0xc0;
1555         atp_writeb_base(atpdev, 0x28, k);
1556         k = atp_readb_base(atpdev, 0x1f) | 0x80;
1557         atp_writeb_base(atpdev, 0x1f, k);
1558         k = atp_readb_base(atpdev, 0x29) | 0x01;
1559         atp_writeb_base(atpdev, 0x29, k);
1560         shpnt->max_id = 16;
1561         shpnt->max_lun = (atpdev->global_map[0] & 0x07) + 1;
1562         shpnt->max_channel = 1;
1563         shpnt->this_id = atpdev->host_id[0];
1564 }
1565
1566 /* return non-zero on detection */
1567 static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1568 {
1569         struct Scsi_Host *shpnt = NULL;
1570         struct atp_unit *atpdev;
1571         int err;
1572
1573         if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610 && pdev->revision < 2) {
1574                 dev_err(&pdev->dev, "ATP850S chips (AEC6710L/F cards) are not supported.\n");
1575                 return -ENODEV;
1576         }
1577
1578         err = pci_enable_device(pdev);
1579         if (err)
1580                 goto fail;
1581
1582         if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1583                 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
1584                 err = -EIO;
1585                 goto disable_device;
1586         }
1587
1588         err = pci_request_regions(pdev, "atp870u");
1589         if (err)
1590                 goto disable_device;
1591         pci_set_master(pdev);
1592
1593         err = -ENOMEM;
1594         shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1595         if (!shpnt)
1596                 goto release_region;
1597
1598         atpdev = shost_priv(shpnt);
1599
1600         atpdev->host = shpnt;
1601         atpdev->pdev = pdev;
1602         pci_set_drvdata(pdev, atpdev);
1603
1604         shpnt->io_port = pci_resource_start(pdev, 0);
1605         shpnt->io_port &= 0xfffffff8;
1606         shpnt->n_io_port = pci_resource_len(pdev, 0);
1607         atpdev->baseport = shpnt->io_port;
1608         shpnt->unique_id = shpnt->io_port;
1609         shpnt->irq = pdev->irq;
1610
1611         err = atp870u_init_tables(shpnt);
1612         if (err) {
1613                 dev_err(&pdev->dev, "Unable to allocate tables for Acard controller\n");
1614                 goto unregister;
1615         }
1616
1617         if (is880(atpdev))
1618                 atp880_init(shpnt);
1619         else if (is885(atpdev))
1620                 atp885_init(shpnt);
1621         else
1622                 atp870_init(shpnt);
1623
1624         err = request_irq(shpnt->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt);
1625         if (err) {
1626                 dev_err(&pdev->dev, "Unable to allocate IRQ %d.\n", shpnt->irq);
1627                 goto free_tables;
1628         }
1629
1630         err = scsi_add_host(shpnt, &pdev->dev);
1631         if (err)
1632                 goto scsi_add_fail;
1633         scsi_scan_host(shpnt);
1634
1635         return 0;
1636
1637 scsi_add_fail:
1638         free_irq(shpnt->irq, shpnt);
1639 free_tables:
1640         atp870u_free_tables(shpnt);
1641 unregister:
1642         scsi_host_put(shpnt);
1643 release_region:
1644         pci_release_regions(pdev);
1645 disable_device:
1646         pci_disable_device(pdev);
1647 fail:
1648         return err;
1649 }
1650
1651 /* The abort command does not leave the device in a clean state where
1652    it is available to be used again.  Until this gets worked out, we will
1653    leave it commented out.  */
1654
1655 static int atp870u_abort(struct scsi_cmnd * SCpnt)
1656 {
1657         unsigned char  j, k, c;
1658         struct scsi_cmnd *workrequ;
1659         struct atp_unit *dev;
1660         struct Scsi_Host *host;
1661         host = SCpnt->device->host;
1662
1663         dev = (struct atp_unit *)&host->hostdata;
1664         c = scmd_channel(SCpnt);
1665         printk(" atp870u: abort Channel = %x \n", c);
1666         printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
1667         printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1668         for (j = 0; j < 0x18; j++) {
1669                 printk(" r%2x=%2x", j, atp_readb_io(dev, c, j));
1670         }
1671         printk(" r1c=%2x", atp_readb_io(dev, c, 0x1c));
1672         printk(" r1f=%2x in_snd=%2x ", atp_readb_io(dev, c, 0x1f), dev->in_snd[c]);
1673         printk(" d00=%2x", atp_readb_pci(dev, c, 0x00));
1674         printk(" d02=%2x", atp_readb_pci(dev, c, 0x02));
1675         for(j=0;j<16;j++) {
1676            if (dev->id[c][j].curr_req != NULL) {
1677                 workrequ = dev->id[c][j].curr_req;
1678                 printk("\n que cdb= ");
1679                 for (k=0; k < workrequ->cmd_len; k++) {
1680                     printk(" %2x ",workrequ->cmnd[k]);
1681                 }
1682                 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
1683            }
1684         }
1685         return SUCCESS;
1686 }
1687
1688 static const char *atp870u_info(struct Scsi_Host *notused)
1689 {
1690         static char buffer[128];
1691
1692         strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
1693
1694         return buffer;
1695 }
1696
1697 static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1698 {
1699         seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
1700                 "Adapter Configuration:\n");
1701         seq_printf(m, "               Base IO: %#.4lx\n", HBAptr->io_port);
1702         seq_printf(m, "                   IRQ: %d\n", HBAptr->irq);
1703         return 0;
1704 }
1705
1706
1707 static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
1708                         sector_t capacity, int *ip)
1709 {
1710         int heads, sectors, cylinders;
1711
1712         heads = 64;
1713         sectors = 32;
1714         cylinders = (unsigned long)capacity / (heads * sectors);
1715         if (cylinders > 1024) {
1716                 heads = 255;
1717                 sectors = 63;
1718                 cylinders = (unsigned long)capacity / (heads * sectors);
1719         }
1720         ip[0] = heads;
1721         ip[1] = sectors;
1722         ip[2] = cylinders;
1723
1724         return 0;
1725 }
1726
1727 static void atp870u_remove (struct pci_dev *pdev)
1728 {
1729         struct atp_unit *devext = pci_get_drvdata(pdev);
1730         struct Scsi_Host *pshost = devext->host;
1731
1732         scsi_remove_host(pshost);
1733         free_irq(pshost->irq, pshost);
1734         pci_release_regions(pdev);
1735         pci_disable_device(pdev);
1736         atp870u_free_tables(pshost);
1737         scsi_host_put(pshost);
1738 }
1739 MODULE_LICENSE("GPL");
1740
1741 static struct scsi_host_template atp870u_template = {
1742      .module                    = THIS_MODULE,
1743      .name                      = "atp870u"             /* name */,
1744      .proc_name                 = "atp870u",
1745      .show_info                 = atp870u_show_info,
1746      .info                      = atp870u_info          /* info */,
1747      .queuecommand              = atp870u_queuecommand  /* queuecommand */,
1748      .eh_abort_handler          = atp870u_abort         /* abort */,
1749      .bios_param                = atp870u_biosparam     /* biosparm */,
1750      .can_queue                 = qcnt                  /* can_queue */,
1751      .this_id                   = 7                     /* SCSI ID */,
1752      .sg_tablesize              = ATP870U_SCATTER       /*SG_ALL*/,
1753      .max_sectors               = ATP870U_MAX_SECTORS,
1754 };
1755
1756 static struct pci_device_id atp870u_id_table[] = {
1757         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID)                   },
1758         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1)                  },
1759         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2)                  },
1760         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610)    },
1761         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW)  },
1762         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U)   },
1763         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S)   },
1764         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D)   },
1765         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
1766         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060)       },
1767         { 0, },
1768 };
1769
1770 MODULE_DEVICE_TABLE(pci, atp870u_id_table);
1771
1772 static struct pci_driver atp870u_driver = {
1773         .id_table       = atp870u_id_table,
1774         .name           = "atp870u",
1775         .probe          = atp870u_probe,
1776         .remove         = atp870u_remove,
1777 };
1778
1779 module_pci_driver(atp870u_driver);
1780
1781 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
1782                    unsigned char lvdmode)
1783 {
1784         unsigned char i, j, k, rmb, n;
1785         unsigned short int m;
1786         static unsigned char mbuf[512];
1787         static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1788         static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1789         static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1790         unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1791         static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1792         static unsigned char synw_870[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1793         unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1794         static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1795         static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1796
1797         for (i = 0; i < 16; i++) {
1798                 if (!wide_chip && (i > 7))
1799                         break;
1800                 m = 1;
1801                 m = m << i;
1802                 if ((m & dev->active_id[c]) != 0) {
1803                         continue;
1804                 }
1805                 if (i == dev->host_id[c]) {
1806                         printk(KERN_INFO "         ID: %2d  Host Adapter\n", dev->host_id[c]);
1807                         continue;
1808                 }
1809                 atp_writeb_io(dev, c, 0x1b, wide_chip ? 0x01 : 0x00);
1810                 atp_writeb_io(dev, c, 1, 0x08);
1811                 atp_writeb_io(dev, c, 2, 0x7f);
1812                 atp_writeb_io(dev, c, 3, satn[0]);
1813                 atp_writeb_io(dev, c, 4, satn[1]);
1814                 atp_writeb_io(dev, c, 5, satn[2]);
1815                 atp_writeb_io(dev, c, 6, satn[3]);
1816                 atp_writeb_io(dev, c, 7, satn[4]);
1817                 atp_writeb_io(dev, c, 8, satn[5]);
1818                 atp_writeb_io(dev, c, 0x0f, 0);
1819                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1820                 atp_writeb_io(dev, c, 0x12, 0);
1821                 atp_writeb_io(dev, c, 0x13, satn[6]);
1822                 atp_writeb_io(dev, c, 0x14, satn[7]);
1823                 j = i;
1824                 if ((j & 0x08) != 0) {
1825                         j = (j & 0x07) | 0x40;
1826                 }
1827                 atp_writeb_io(dev, c, 0x15, j);
1828                 atp_writeb_io(dev, c, 0x18, satn[8]);
1829
1830                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1831                         cpu_relax();
1832
1833                 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1834                         continue;
1835
1836                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1837                         cpu_relax();
1838
1839                 dev->active_id[c] |= m;
1840
1841                 atp_writeb_io(dev, c, 0x10, 0x30);
1842                 if (is885(dev) || is880(dev))
1843                         atp_writeb_io(dev, c, 0x14, 0x00);
1844                 else /* result of is870() merge - is this a bug? */
1845                         atp_writeb_io(dev, c, 0x04, 0x00);
1846
1847 phase_cmd:
1848                 atp_writeb_io(dev, c, 0x18, 0x08);
1849
1850                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1851                         cpu_relax();
1852
1853                 j = atp_readb_io(dev, c, 0x17);
1854                 if (j != 0x16) {
1855                         atp_writeb_io(dev, c, 0x10, 0x41);
1856                         goto phase_cmd;
1857                 }
1858 sel_ok:
1859                 atp_writeb_io(dev, c, 3, inqd[0]);
1860                 atp_writeb_io(dev, c, 4, inqd[1]);
1861                 atp_writeb_io(dev, c, 5, inqd[2]);
1862                 atp_writeb_io(dev, c, 6, inqd[3]);
1863                 atp_writeb_io(dev, c, 7, inqd[4]);
1864                 atp_writeb_io(dev, c, 8, inqd[5]);
1865                 atp_writeb_io(dev, c, 0x0f, 0);
1866                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1867                 atp_writeb_io(dev, c, 0x12, 0);
1868                 atp_writeb_io(dev, c, 0x13, inqd[6]);
1869                 atp_writeb_io(dev, c, 0x14, inqd[7]);
1870                 atp_writeb_io(dev, c, 0x18, inqd[8]);
1871
1872                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1873                         cpu_relax();
1874
1875                 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1876                         continue;
1877
1878                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1879                         cpu_relax();
1880
1881                 if (wide_chip)
1882                         atp_writeb_io(dev, c, 0x1b, 0x00);
1883
1884                 atp_writeb_io(dev, c, 0x18, 0x08);
1885                 j = 0;
1886 rd_inq_data:
1887                 k = atp_readb_io(dev, c, 0x1f);
1888                 if ((k & 0x01) != 0) {
1889                         mbuf[j++] = atp_readb_io(dev, c, 0x19);
1890                         goto rd_inq_data;
1891                 }
1892                 if ((k & 0x80) == 0) {
1893                         goto rd_inq_data;
1894                 }
1895                 j = atp_readb_io(dev, c, 0x17);
1896                 if (j == 0x16) {
1897                         goto inq_ok;
1898                 }
1899                 atp_writeb_io(dev, c, 0x10, 0x46);
1900                 atp_writeb_io(dev, c, 0x12, 0);
1901                 atp_writeb_io(dev, c, 0x13, 0);
1902                 atp_writeb_io(dev, c, 0x14, 0);
1903                 atp_writeb_io(dev, c, 0x18, 0x08);
1904
1905                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1906                         cpu_relax();
1907
1908                 if (atp_readb_io(dev, c, 0x17) != 0x16)
1909                         goto sel_ok;
1910
1911 inq_ok:
1912                 mbuf[36] = 0;
1913                 printk(KERN_INFO "         ID: %2d  %s\n", i, &mbuf[8]);
1914                 dev->id[c][i].devtype = mbuf[0];
1915                 rmb = mbuf[1];
1916                 n = mbuf[7];
1917                 if (!wide_chip)
1918                         goto not_wide;
1919                 if ((mbuf[7] & 0x60) == 0) {
1920                         goto not_wide;
1921                 }
1922                 if (is885(dev) || is880(dev)) {
1923                         if ((i < 8) && ((dev->global_map[c] & 0x20) == 0))
1924                                 goto not_wide;
1925                 } else { /* result of is870() merge - is this a bug? */
1926                         if ((dev->global_map[c] & 0x20) == 0)
1927                                 goto not_wide;
1928                 }
1929                 if (lvdmode == 0) {
1930                         goto chg_wide;
1931                 }
1932                 if (dev->sp[c][i] != 0x04)      // force u2
1933                 {
1934                         goto chg_wide;
1935                 }
1936
1937                 atp_writeb_io(dev, c, 0x1b, 0x01);
1938                 atp_writeb_io(dev, c, 3, satn[0]);
1939                 atp_writeb_io(dev, c, 4, satn[1]);
1940                 atp_writeb_io(dev, c, 5, satn[2]);
1941                 atp_writeb_io(dev, c, 6, satn[3]);
1942                 atp_writeb_io(dev, c, 7, satn[4]);
1943                 atp_writeb_io(dev, c, 8, satn[5]);
1944                 atp_writeb_io(dev, c, 0x0f, 0);
1945                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1946                 atp_writeb_io(dev, c, 0x12, 0);
1947                 atp_writeb_io(dev, c, 0x13, satn[6]);
1948                 atp_writeb_io(dev, c, 0x14, satn[7]);
1949                 atp_writeb_io(dev, c, 0x18, satn[8]);
1950
1951                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1952                         cpu_relax();
1953
1954                 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1955                         continue;
1956
1957                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1958                         cpu_relax();
1959
1960 try_u3:
1961                 j = 0;
1962                 atp_writeb_io(dev, c, 0x14, 0x09);
1963                 atp_writeb_io(dev, c, 0x18, 0x20);
1964
1965                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1966                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1967                                 atp_writeb_io(dev, c, 0x19, u3[j++]);
1968                         cpu_relax();
1969                 }
1970
1971                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1972                         cpu_relax();
1973
1974                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1975                 if (j == 0x0f) {
1976                         goto u3p_in;
1977                 }
1978                 if (j == 0x0a) {
1979                         goto u3p_cmd;
1980                 }
1981                 if (j == 0x0e) {
1982                         goto try_u3;
1983                 }
1984                 continue;
1985 u3p_out:
1986                 atp_writeb_io(dev, c, 0x18, 0x20);
1987                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1988                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1989                                 atp_writeb_io(dev, c, 0x19, 0);
1990                         cpu_relax();
1991                 }
1992                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1993                 if (j == 0x0f) {
1994                         goto u3p_in;
1995                 }
1996                 if (j == 0x0a) {
1997                         goto u3p_cmd;
1998                 }
1999                 if (j == 0x0e) {
2000                         goto u3p_out;
2001                 }
2002                 continue;
2003 u3p_in:
2004                 atp_writeb_io(dev, c, 0x14, 0x09);
2005                 atp_writeb_io(dev, c, 0x18, 0x20);
2006                 k = 0;
2007 u3p_in1:
2008                 j = atp_readb_io(dev, c, 0x1f);
2009                 if ((j & 0x01) != 0) {
2010                         mbuf[k++] = atp_readb_io(dev, c, 0x19);
2011                         goto u3p_in1;
2012                 }
2013                 if ((j & 0x80) == 0x00) {
2014                         goto u3p_in1;
2015                 }
2016                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2017                 if (j == 0x0f) {
2018                         goto u3p_in;
2019                 }
2020                 if (j == 0x0a) {
2021                         goto u3p_cmd;
2022                 }
2023                 if (j == 0x0e) {
2024                         goto u3p_out;
2025                 }
2026                 continue;
2027 u3p_cmd:
2028                 atp_writeb_io(dev, c, 0x10, 0x30);
2029                 atp_writeb_io(dev, c, 0x14, 0x00);
2030                 atp_writeb_io(dev, c, 0x18, 0x08);
2031
2032                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00);
2033
2034                 j = atp_readb_io(dev, c, 0x17);
2035                 if (j != 0x16) {
2036                         if (j == 0x4e) {
2037                                 goto u3p_out;
2038                         }
2039                         continue;
2040                 }
2041                 if (mbuf[0] != 0x01) {
2042                         goto chg_wide;
2043                 }
2044                 if (mbuf[1] != 0x06) {
2045                         goto chg_wide;
2046                 }
2047                 if (mbuf[2] != 0x04) {
2048                         goto chg_wide;
2049                 }
2050                 if (mbuf[3] == 0x09) {
2051                         m = 1;
2052                         m = m << i;
2053                         dev->wide_id[c] |= m;
2054                         dev->id[c][i].devsp = 0xce;
2055 #ifdef ED_DBGP
2056                         printk("dev->id[%2d][%2d].devsp = %2x\n",
2057                                c, i, dev->id[c][i].devsp);
2058 #endif
2059                         continue;
2060                 }
2061 chg_wide:
2062                 atp_writeb_io(dev, c, 0x1b, 0x01);
2063                 atp_writeb_io(dev, c, 3, satn[0]);
2064                 atp_writeb_io(dev, c, 4, satn[1]);
2065                 atp_writeb_io(dev, c, 5, satn[2]);
2066                 atp_writeb_io(dev, c, 6, satn[3]);
2067                 atp_writeb_io(dev, c, 7, satn[4]);
2068                 atp_writeb_io(dev, c, 8, satn[5]);
2069                 atp_writeb_io(dev, c, 0x0f, 0);
2070                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2071                 atp_writeb_io(dev, c, 0x12, 0);
2072                 atp_writeb_io(dev, c, 0x13, satn[6]);
2073                 atp_writeb_io(dev, c, 0x14, satn[7]);
2074                 atp_writeb_io(dev, c, 0x18, satn[8]);
2075
2076                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2077                         cpu_relax();
2078
2079                 if (atp_readb_io(dev, c, 0x17) != 0x11 &&
2080                     atp_readb_io(dev, c, 0x17) != 0x8e)
2081                         continue;
2082
2083                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
2084                         cpu_relax();
2085
2086 try_wide:
2087                 j = 0;
2088                 atp_writeb_io(dev, c, 0x14, 0x05);
2089                 atp_writeb_io(dev, c, 0x18, 0x20);
2090
2091                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2092                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2093                                 atp_writeb_io(dev, c, 0x19, wide[j++]);
2094                         cpu_relax();
2095                 }
2096
2097                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
2098                         cpu_relax();
2099
2100                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2101                 if (j == 0x0f) {
2102                         goto widep_in;
2103                 }
2104                 if (j == 0x0a) {
2105                         goto widep_cmd;
2106                 }
2107                 if (j == 0x0e) {
2108                         goto try_wide;
2109                 }
2110                 continue;
2111 widep_out:
2112                 atp_writeb_io(dev, c, 0x18, 0x20);
2113                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2114                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2115                                 atp_writeb_io(dev, c, 0x19, 0);
2116                         cpu_relax();
2117                 }
2118                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2119                 if (j == 0x0f) {
2120                         goto widep_in;
2121                 }
2122                 if (j == 0x0a) {
2123                         goto widep_cmd;
2124                 }
2125                 if (j == 0x0e) {
2126                         goto widep_out;
2127                 }
2128                 continue;
2129 widep_in:
2130                 atp_writeb_io(dev, c, 0x14, 0xff);
2131                 atp_writeb_io(dev, c, 0x18, 0x20);
2132                 k = 0;
2133 widep_in1:
2134                 j = atp_readb_io(dev, c, 0x1f);
2135                 if ((j & 0x01) != 0) {
2136                         mbuf[k++] = atp_readb_io(dev, c, 0x19);
2137                         goto widep_in1;
2138                 }
2139                 if ((j & 0x80) == 0x00) {
2140                         goto widep_in1;
2141                 }
2142                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2143                 if (j == 0x0f) {
2144                         goto widep_in;
2145                 }
2146                 if (j == 0x0a) {
2147                         goto widep_cmd;
2148                 }
2149                 if (j == 0x0e) {
2150                         goto widep_out;
2151                 }
2152                 continue;
2153 widep_cmd:
2154                 atp_writeb_io(dev, c, 0x10, 0x30);
2155                 atp_writeb_io(dev, c, 0x14, 0x00);
2156                 atp_writeb_io(dev, c, 0x18, 0x08);
2157
2158                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2159                         cpu_relax();
2160
2161                 j = atp_readb_io(dev, c, 0x17);
2162                 if (j != 0x16) {
2163                         if (j == 0x4e) {
2164                                 goto widep_out;
2165                         }
2166                         continue;
2167                 }
2168                 if (mbuf[0] != 0x01) {
2169                         goto not_wide;
2170                 }
2171                 if (mbuf[1] != 0x02) {
2172                         goto not_wide;
2173                 }
2174                 if (mbuf[2] != 0x03) {
2175                         goto not_wide;
2176                 }
2177                 if (mbuf[3] != 0x01) {
2178                         goto not_wide;
2179                 }
2180                 m = 1;
2181                 m = m << i;
2182                 dev->wide_id[c] |= m;
2183 not_wide:
2184                 if ((dev->id[c][i].devtype == 0x00) ||
2185                     (dev->id[c][i].devtype == 0x07) ||
2186                     ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
2187                         m = 1;
2188                         m = m << i;
2189                         if ((dev->async[c] & m) != 0) {
2190                                 goto set_sync;
2191                         }
2192                 }
2193                 continue;
2194 set_sync:
2195                 if ((!is885(dev) && !is880(dev)) || (dev->sp[c][i] == 0x02)) {
2196                         synu[4] = 0x0c;
2197                         synuw[4] = 0x0c;
2198                 } else {
2199                         if (dev->sp[c][i] >= 0x03) {
2200                                 synu[4] = 0x0a;
2201                                 synuw[4] = 0x0a;
2202                         }
2203                 }
2204                 j = 0;
2205                 if ((m & dev->wide_id[c]) != 0) {
2206                         j |= 0x01;
2207                 }
2208                 atp_writeb_io(dev, c, 0x1b, j);
2209                 atp_writeb_io(dev, c, 3, satn[0]);
2210                 atp_writeb_io(dev, c, 4, satn[1]);
2211                 atp_writeb_io(dev, c, 5, satn[2]);
2212                 atp_writeb_io(dev, c, 6, satn[3]);
2213                 atp_writeb_io(dev, c, 7, satn[4]);
2214                 atp_writeb_io(dev, c, 8, satn[5]);
2215                 atp_writeb_io(dev, c, 0x0f, 0);
2216                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2217                 atp_writeb_io(dev, c, 0x12, 0);
2218                 atp_writeb_io(dev, c, 0x13, satn[6]);
2219                 atp_writeb_io(dev, c, 0x14, satn[7]);
2220                 atp_writeb_io(dev, c, 0x18, satn[8]);
2221
2222                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2223                         cpu_relax();
2224
2225                 if (atp_readb_io(dev, c, 0x17) != 0x11 &&
2226                     atp_readb_io(dev, c, 0x17) != 0x8e)
2227                         continue;
2228
2229                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
2230                         cpu_relax();
2231
2232 try_sync:
2233                 j = 0;
2234                 atp_writeb_io(dev, c, 0x14, 0x06);
2235                 atp_writeb_io(dev, c, 0x18, 0x20);
2236
2237                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2238                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0) {
2239                                 if ((m & dev->wide_id[c]) != 0) {
2240                                         if (is885(dev) || is880(dev)) {
2241                                                 if ((m & dev->ultra_map[c]) != 0) {
2242                                                         atp_writeb_io(dev, c, 0x19, synuw[j++]);
2243                                                 } else {
2244                                                         atp_writeb_io(dev, c, 0x19, synw[j++]);
2245                                                 }
2246                                         } else
2247                                                 atp_writeb_io(dev, c, 0x19, synw_870[j++]);
2248                                 } else {
2249                                         if ((m & dev->ultra_map[c]) != 0) {
2250                                                 atp_writeb_io(dev, c, 0x19, synu[j++]);
2251                                         } else {
2252                                                 atp_writeb_io(dev, c, 0x19, synn[j++]);
2253                                         }
2254                                 }
2255                         }
2256                 }
2257
2258                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
2259                         cpu_relax();
2260
2261                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2262                 if (j == 0x0f) {
2263                         goto phase_ins;
2264                 }
2265                 if (j == 0x0a) {
2266                         goto phase_cmds;
2267                 }
2268                 if (j == 0x0e) {
2269                         goto try_sync;
2270                 }
2271                 continue;
2272 phase_outs:
2273                 atp_writeb_io(dev, c, 0x18, 0x20);
2274                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00) {
2275                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0x00)
2276                                 atp_writeb_io(dev, c, 0x19, 0x00);
2277                         cpu_relax();
2278                 }
2279                 j = atp_readb_io(dev, c, 0x17);
2280                 if (j == 0x85) {
2281                         goto tar_dcons;
2282                 }
2283                 j &= 0x0f;
2284                 if (j == 0x0f) {
2285                         goto phase_ins;
2286                 }
2287                 if (j == 0x0a) {
2288                         goto phase_cmds;
2289                 }
2290                 if (j == 0x0e) {
2291                         goto phase_outs;
2292                 }
2293                 continue;
2294 phase_ins:
2295                 if (is885(dev) || is880(dev))
2296                         atp_writeb_io(dev, c, 0x14, 0x06);
2297                 else
2298                         atp_writeb_io(dev, c, 0x14, 0xff);
2299                 atp_writeb_io(dev, c, 0x18, 0x20);
2300                 k = 0;
2301 phase_ins1:
2302                 j = atp_readb_io(dev, c, 0x1f);
2303                 if ((j & 0x01) != 0x00) {
2304                         mbuf[k++] = atp_readb_io(dev, c, 0x19);
2305                         goto phase_ins1;
2306                 }
2307                 if ((j & 0x80) == 0x00) {
2308                         goto phase_ins1;
2309                 }
2310
2311                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00);
2312
2313                 j = atp_readb_io(dev, c, 0x17);
2314                 if (j == 0x85) {
2315                         goto tar_dcons;
2316                 }
2317                 j &= 0x0f;
2318                 if (j == 0x0f) {
2319                         goto phase_ins;
2320                 }
2321                 if (j == 0x0a) {
2322                         goto phase_cmds;
2323                 }
2324                 if (j == 0x0e) {
2325                         goto phase_outs;
2326                 }
2327                 continue;
2328 phase_cmds:
2329                 atp_writeb_io(dev, c, 0x10, 0x30);
2330 tar_dcons:
2331                 atp_writeb_io(dev, c, 0x14, 0x00);
2332                 atp_writeb_io(dev, c, 0x18, 0x08);
2333
2334                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2335                         cpu_relax();
2336
2337                 j = atp_readb_io(dev, c, 0x17);
2338                 if (j != 0x16) {
2339                         continue;
2340                 }
2341                 if (mbuf[0] != 0x01) {
2342                         continue;
2343                 }
2344                 if (mbuf[1] != 0x03) {
2345                         continue;
2346                 }
2347                 if (mbuf[4] == 0x00) {
2348                         continue;
2349                 }
2350                 if (mbuf[3] > 0x64) {
2351                         continue;
2352                 }
2353                 if (is885(dev) || is880(dev)) {
2354                         if (mbuf[4] > 0x0e) {
2355                                 mbuf[4] = 0x0e;
2356                         }
2357                 } else {
2358                         if (mbuf[4] > 0x0c) {
2359                                 mbuf[4] = 0x0c;
2360                         }
2361                 }
2362                 dev->id[c][i].devsp = mbuf[4];
2363                 if (is885(dev) || is880(dev))
2364                         if (mbuf[3] < 0x0c) {
2365                                 j = 0xb0;
2366                                 goto set_syn_ok;
2367                         }
2368                 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2369                         j = 0xa0;
2370                         goto set_syn_ok;
2371                 }
2372                 if (mbuf[3] < 0x1a) {
2373                         j = 0x20;
2374                         goto set_syn_ok;
2375                 }
2376                 if (mbuf[3] < 0x33) {
2377                         j = 0x40;
2378                         goto set_syn_ok;
2379                 }
2380                 if (mbuf[3] < 0x4c) {
2381                         j = 0x50;
2382                         goto set_syn_ok;
2383                 }
2384                 j = 0x60;
2385 set_syn_ok:
2386                 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
2387 #ifdef ED_DBGP
2388                 printk("dev->id[%2d][%2d].devsp = %2x\n",
2389                        c,i,dev->id[c][i].devsp);
2390 #endif
2391         }
2392 }