drivers/rtc/rtc-pcf2127.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * An I2C and SPI driver for the NXP PCF2127/29 RTC
   4  * Copyright 2013 Til-Technologies
   5  *
   6  * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
   7  *
   8  * Watchdog and tamper functions
   9  * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
  10  *
  11  * based on the other drivers in this same directory.
  12  *
  13  * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
  14  */
  15
  16 #include <linux/i2c.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/bcd.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/regmap.h>
  25 #include <linux/watchdog.h>
  26
  27 /* Control register 1 */
  28 #define PCF2127_REG_CTRL1               0x00
  29 #define PCF2127_BIT_CTRL1_POR_OVRD              BIT(3)
  30 #define PCF2127_BIT_CTRL1_TSF1                  BIT(4)
  31 /* Control register 2 */
  32 #define PCF2127_REG_CTRL2               0x01
  33 #define PCF2127_BIT_CTRL2_AIE                   BIT(1)
  34 #define PCF2127_BIT_CTRL2_TSIE                  BIT(2)
  35 #define PCF2127_BIT_CTRL2_AF                    BIT(4)
  36 #define PCF2127_BIT_CTRL2_TSF2                  BIT(5)
  37 #define PCF2127_BIT_CTRL2_WDTF                  BIT(6)
  38 /* Control register 3 */
  39 #define PCF2127_REG_CTRL3               0x02
  40 #define PCF2127_BIT_CTRL3_BLIE                  BIT(0)
  41 #define PCF2127_BIT_CTRL3_BIE                   BIT(1)
  42 #define PCF2127_BIT_CTRL3_BLF                   BIT(2)
  43 #define PCF2127_BIT_CTRL3_BF                    BIT(3)
  44 #define PCF2127_BIT_CTRL3_BTSE                  BIT(4)
  45 /* Time and date registers */
  46 #define PCF2127_REG_SC                  0x03
  47 #define PCF2127_BIT_SC_OSF                      BIT(7)
  48 #define PCF2127_REG_MN                  0x04
  49 #define PCF2127_REG_HR                  0x05
  50 #define PCF2127_REG_DM                  0x06
  51 #define PCF2127_REG_DW                  0x07
  52 #define PCF2127_REG_MO                  0x08
  53 #define PCF2127_REG_YR                  0x09
  54 /* Alarm registers */
  55 #define PCF2127_REG_ALARM_SC            0x0A
  56 #define PCF2127_REG_ALARM_MN            0x0B
  57 #define PCF2127_REG_ALARM_HR            0x0C
  58 #define PCF2127_REG_ALARM_DM            0x0D
  59 #define PCF2127_REG_ALARM_DW            0x0E
  60 #define PCF2127_BIT_ALARM_AE                    BIT(7)
  61 /* CLKOUT control register */
  62 #define PCF2127_REG_CLKOUT              0x0f
  63 #define PCF2127_BIT_CLKOUT_OTPR                 BIT(5)
  64 /* Watchdog registers */
  65 #define PCF2127_REG_WD_CTL              0x10
  66 #define PCF2127_BIT_WD_CTL_TF0                  BIT(0)
  67 #define PCF2127_BIT_WD_CTL_TF1                  BIT(1)
  68 #define PCF2127_BIT_WD_CTL_CD0                  BIT(6)
  69 #define PCF2127_BIT_WD_CTL_CD1                  BIT(7)
  70 #define PCF2127_REG_WD_VAL              0x11
  71 /* Tamper timestamp registers */
  72 #define PCF2127_REG_TS_CTRL             0x12
  73 #define PCF2127_BIT_TS_CTRL_TSOFF               BIT(6)
  74 #define PCF2127_BIT_TS_CTRL_TSM                 BIT(7)
  75 #define PCF2127_REG_TS_SC               0x13
  76 #define PCF2127_REG_TS_MN               0x14
  77 #define PCF2127_REG_TS_HR               0x15
  78 #define PCF2127_REG_TS_DM               0x16
  79 #define PCF2127_REG_TS_MO               0x17
  80 #define PCF2127_REG_TS_YR               0x18
  81 /*
  82  * RAM registers
  83  * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
  84  * battery backed and can survive a power outage.
  85  * PCF2129 doesn't have this feature.
  86  */
  87 #define PCF2127_REG_RAM_ADDR_MSB        0x1A
  88 #define PCF2127_REG_RAM_WRT_CMD         0x1C
  89 #define PCF2127_REG_RAM_RD_CMD          0x1D
  90
  91 /* Watchdog timer value constants */
  92 #define PCF2127_WD_VAL_STOP             0
  93 #define PCF2127_WD_VAL_MIN              2
  94 #define PCF2127_WD_VAL_MAX              255
  95 #define PCF2127_WD_VAL_DEFAULT          60
  96
  97 struct pcf2127 {
  98         struct rtc_device *rtc;
  99         struct watchdog_device wdd;
 100         struct regmap *regmap;
 101 };
 102
 103 /*
 104  * In the routines that deal directly with the pcf2127 hardware, we use
 105  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
 106  */
 107 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
 108 {
 109         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 110         unsigned char buf[10];
 111         int ret;
 112
 113         /*
 114          * Avoid reading CTRL2 register as it causes WD_VAL register
 115          * value to reset to 0 which means watchdog is stopped.
 116          */
 117         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
 118                                (buf + PCF2127_REG_CTRL3),
 119                                ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
 120         if (ret) {
 121                 dev_err(dev, "%s: read error\n", __func__);
 122                 return ret;
 123         }
 124
 125         if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
 126                 dev_info(dev,
 127                         "low voltage detected, check/replace RTC battery.\n");
 128
 129         /* Clock integrity is not guaranteed when OSF flag is set. */
 130         if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
 131                 /*
 132                  * no need clear the flag here,
 133                  * it will be cleared once the new date is saved
 134                  */
 135                 dev_warn(dev,
 136                          "oscillator stop detected, date/time is not reliable\n");
 137                 return -EINVAL;
 138         }
 139
 140         dev_dbg(dev,
 141                 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
 142                 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
 143                 __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
 144                 buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
 145                 buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
 146                 buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
 147
 148         tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
 149         tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
 150         tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
 151         tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
 152         tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
 153         tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
 154         tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
 155         tm->tm_year += 100;
 156
 157         dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
 158                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 159                 __func__,
 160                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 161                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 162
 163         return 0;
 164 }
 165
 166 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
 167 {
 168         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 169         unsigned char buf[7];
 170         int i = 0, err;
 171
 172         dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
 173                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 174                 __func__,
 175                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 176                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 177
 178         /* hours, minutes and seconds */
 179         buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
 180         buf[i++] = bin2bcd(tm->tm_min);
 181         buf[i++] = bin2bcd(tm->tm_hour);
 182         buf[i++] = bin2bcd(tm->tm_mday);
 183         buf[i++] = tm->tm_wday & 0x07;
 184
 185         /* month, 1 - 12 */
 186         buf[i++] = bin2bcd(tm->tm_mon + 1);
 187
 188         /* year */
 189         buf[i++] = bin2bcd(tm->tm_year - 100);
 190
 191         /* write register's data */
 192         err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
 193         if (err) {
 194                 dev_err(dev,
 195                         "%s: err=%d", __func__, err);
 196                 return err;
 197         }
 198
 199         return 0;
 200 }
 201
 202 static int pcf2127_rtc_ioctl(struct device *dev,
 203                                 unsigned int cmd, unsigned long arg)
 204 {
 205         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 206         int val, touser = 0;
 207         int ret;
 208
 209         switch (cmd) {
 210         case RTC_VL_READ:
 211                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &val);
 212                 if (ret)
 213                         return ret;
 214
 215                 if (val & PCF2127_BIT_CTRL3_BLF)
 216                         touser |= RTC_VL_BACKUP_LOW;
 217
 218                 if (val & PCF2127_BIT_CTRL3_BF)
 219                         touser |= RTC_VL_BACKUP_SWITCH;
 220
 221                 return put_user(touser, (unsigned int __user *)arg);
 222
 223         case RTC_VL_CLR:
 224                 return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 225                                           PCF2127_BIT_CTRL3_BF, 0);
 226
 227         default:
 228                 return -ENOIOCTLCMD;
 229         }
 230 }
 231
 232 static int pcf2127_nvmem_read(void *priv, unsigned int offset,
 233                               void *val, size_t bytes)
 234 {
 235         struct pcf2127 *pcf2127 = priv;
 236         int ret;
 237         unsigned char offsetbuf[] = { offset >> 8, offset };
 238
 239         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 240                                 offsetbuf, 2);
 241         if (ret)
 242                 return ret;
 243
 244         return regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
 245                                 val, bytes);
 246 }
 247
 248 static int pcf2127_nvmem_write(void *priv, unsigned int offset,
 249                                void *val, size_t bytes)
 250 {
 251         struct pcf2127 *pcf2127 = priv;
 252         int ret;
 253         unsigned char offsetbuf[] = { offset >> 8, offset };
 254
 255         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 256                                 offsetbuf, 2);
 257         if (ret)
 258                 return ret;
 259
 260         return regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
 261                                  val, bytes);
 262 }
 263
 264 /* watchdog driver */
 265
 266 static int pcf2127_wdt_ping(struct watchdog_device *wdd)
 267 {
 268         struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 269
 270         return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
 271 }
 272
 273 /*
 274  * Restart watchdog timer if feature is active.
 275  *
 276  * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
 277  * since register also contain control/status flags for other features.
 278  * Always call this function after reading CTRL2 register.
 279  */
 280 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
 281 {
 282         int ret = 0;
 283
 284         if (watchdog_active(wdd)) {
 285                 ret = pcf2127_wdt_ping(wdd);
 286                 if (ret)
 287                         dev_err(wdd->parent,
 288                                 "%s: watchdog restart failed, ret=%d\n",
 289                                 __func__, ret);
 290         }
 291
 292         return ret;
 293 }
 294
 295 static int pcf2127_wdt_start(struct watchdog_device *wdd)
 296 {
 297         return pcf2127_wdt_ping(wdd);
 298 }
 299
 300 static int pcf2127_wdt_stop(struct watchdog_device *wdd)
 301 {
 302         struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 303
 304         return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
 305                             PCF2127_WD_VAL_STOP);
 306 }
 307
 308 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
 309                                    unsigned int new_timeout)
 310 {
 311         dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
 312                 new_timeout, wdd->timeout);
 313
 314         wdd->timeout = new_timeout;
 315
 316         return pcf2127_wdt_active_ping(wdd);
 317 }
 318
 319 static const struct watchdog_info pcf2127_wdt_info = {
 320         .identity = "NXP PCF2127/PCF2129 Watchdog",
 321         .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
 322 };
 323
 324 static const struct watchdog_ops pcf2127_watchdog_ops = {
 325         .owner = THIS_MODULE,
 326         .start = pcf2127_wdt_start,
 327         .stop = pcf2127_wdt_stop,
 328         .ping = pcf2127_wdt_ping,
 329         .set_timeout = pcf2127_wdt_set_timeout,
 330 };
 331
 332 static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
 333 {
 334         u32 wdd_timeout;
 335         int ret;
 336
 337         if (!IS_ENABLED(CONFIG_WATCHDOG) ||
 338             !device_property_read_bool(dev, "reset-source"))
 339                 return 0;
 340
 341         pcf2127->wdd.parent = dev;
 342         pcf2127->wdd.info = &pcf2127_wdt_info;
 343         pcf2127->wdd.ops = &pcf2127_watchdog_ops;
 344         pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
 345         pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
 346         pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
 347         pcf2127->wdd.min_hw_heartbeat_ms = 500;
 348         pcf2127->wdd.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
 349
 350         watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
 351
 352         /* Test if watchdog timer is started by bootloader */
 353         ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout);
 354         if (ret)
 355                 return ret;
 356
 357         if (wdd_timeout)
 358                 set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status);
 359
 360         return devm_watchdog_register_device(dev, &pcf2127->wdd);
 361 }
 362
 363 /* Alarm */
 364 static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 365 {
 366         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 367         unsigned int buf[5], ctrl2;
 368         int ret;
 369
 370         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 371         if (ret)
 372                 return ret;
 373
 374         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 375         if (ret)
 376                 return ret;
 377
 378         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 379                                sizeof(buf));
 380         if (ret)
 381                 return ret;
 382
 383         alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE;
 384         alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF;
 385
 386         alrm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
 387         alrm->time.tm_min = bcd2bin(buf[1] & 0x7F);
 388         alrm->time.tm_hour = bcd2bin(buf[2] & 0x3F);
 389         alrm->time.tm_mday = bcd2bin(buf[3] & 0x3F);
 390
 391         return 0;
 392 }
 393
 394 static int pcf2127_rtc_alarm_irq_enable(struct device *dev, u32 enable)
 395 {
 396         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 397         int ret;
 398
 399         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 400                                  PCF2127_BIT_CTRL2_AIE,
 401                                  enable ? PCF2127_BIT_CTRL2_AIE : 0);
 402         if (ret)
 403                 return ret;
 404
 405         return pcf2127_wdt_active_ping(&pcf2127->wdd);
 406 }
 407
 408 static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 409 {
 410         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 411         uint8_t buf[5];
 412         int ret;
 413
 414         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 415                                  PCF2127_BIT_CTRL2_AF, 0);
 416         if (ret)
 417                 return ret;
 418
 419         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 420         if (ret)
 421                 return ret;
 422
 423         buf[0] = bin2bcd(alrm->time.tm_sec);
 424         buf[1] = bin2bcd(alrm->time.tm_min);
 425         buf[2] = bin2bcd(alrm->time.tm_hour);
 426         buf[3] = bin2bcd(alrm->time.tm_mday);
 427         buf[4] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
 428
 429         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 430                                 sizeof(buf));
 431         if (ret)
 432                 return ret;
 433
 434         return pcf2127_rtc_alarm_irq_enable(dev, alrm->enabled);
 435 }
 436
 437 static irqreturn_t pcf2127_rtc_irq(int irq, void *dev)
 438 {
 439         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 440         unsigned int ctrl2 = 0;
 441         int ret = 0;
 442
 443         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 444         if (ret)
 445                 return IRQ_NONE;
 446
 447         if (!(ctrl2 & PCF2127_BIT_CTRL2_AF))
 448                 return IRQ_NONE;
 449
 450         regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2,
 451                      ctrl2 & ~(PCF2127_BIT_CTRL2_AF | PCF2127_BIT_CTRL2_WDTF));
 452
 453         rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF);
 454
 455         pcf2127_wdt_active_ping(&pcf2127->wdd);
 456
 457         return IRQ_HANDLED;
 458 }
 459
 460 static const struct rtc_class_ops pcf2127_rtc_ops = {
 461         .ioctl            = pcf2127_rtc_ioctl,
 462         .read_time        = pcf2127_rtc_read_time,
 463         .set_time         = pcf2127_rtc_set_time,
 464         .read_alarm       = pcf2127_rtc_read_alarm,
 465         .set_alarm        = pcf2127_rtc_set_alarm,
 466         .alarm_irq_enable = pcf2127_rtc_alarm_irq_enable,
 467 };
 468
 469 /* sysfs interface */
 470
 471 static ssize_t timestamp0_store(struct device *dev,
 472                                 struct device_attribute *attr,
 473                                 const char *buf, size_t count)
 474 {
 475         struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 476         int ret;
 477
 478         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 479                                  PCF2127_BIT_CTRL1_TSF1, 0);
 480         if (ret) {
 481                 dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
 482                 return ret;
 483         }
 484
 485         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 486                                  PCF2127_BIT_CTRL2_TSF2, 0);
 487         if (ret) {
 488                 dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
 489                 return ret;
 490         }
 491
 492         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 493         if (ret)
 494                 return ret;
 495
 496         return count;
 497 };
 498
 499 static ssize_t timestamp0_show(struct device *dev,
 500                                struct device_attribute *attr, char *buf)
 501 {
 502         struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 503         struct rtc_time tm;
 504         int ret;
 505         unsigned char data[25];
 506
 507         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
 508                                sizeof(data));
 509         if (ret) {
 510                 dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
 511                 return ret;
 512         }
 513
 514         dev_dbg(dev,
 515                 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, "
 516                 "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
 517                 __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
 518                 data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
 519                 data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
 520                 data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
 521                 data[PCF2127_REG_TS_YR]);
 522
 523         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 524         if (ret)
 525                 return ret;
 526
 527         if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) &&
 528             !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2))
 529                 return 0;
 530
 531         tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
 532         tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
 533         tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
 534         tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
 535         /* TS_MO register (month) value range: 1-12 */
 536         tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
 537         tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
 538         if (tm.tm_year < 70)
 539                 tm.tm_year += 100; /* assume we are in 1970...2069 */
 540
 541         ret = rtc_valid_tm(&tm);
 542         if (ret)
 543                 return ret;
 544
 545         return sprintf(buf, "%llu\n",
 546                        (unsigned long long)rtc_tm_to_time64(&tm));
 547 };
 548
 549 static DEVICE_ATTR_RW(timestamp0);
 550
 551 static struct attribute *pcf2127_attrs[] = {
 552         &dev_attr_timestamp0.attr,
 553         NULL
 554 };
 555
 556 static const struct attribute_group pcf2127_attr_group = {
 557         .attrs  = pcf2127_attrs,
 558 };
 559
 560 static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 561                          int alarm_irq, const char *name, bool is_pcf2127)
 562 {
 563         struct pcf2127 *pcf2127;
 564         int ret = 0;
 565         unsigned int val;
 566
 567         dev_dbg(dev, "%s\n", __func__);
 568
 569         pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
 570         if (!pcf2127)
 571                 return -ENOMEM;
 572
 573         pcf2127->regmap = regmap;
 574
 575         dev_set_drvdata(dev, pcf2127);
 576
 577         pcf2127->rtc = devm_rtc_allocate_device(dev);
 578         if (IS_ERR(pcf2127->rtc))
 579                 return PTR_ERR(pcf2127->rtc);
 580
 581         pcf2127->rtc->ops = &pcf2127_rtc_ops;
 582         pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 583         pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099;
 584         pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */
 585         pcf2127->rtc->uie_unsupported = 1;
 586         clear_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
 587
 588         if (alarm_irq > 0) {
 589                 ret = devm_request_threaded_irq(dev, alarm_irq, NULL,
 590                                                 pcf2127_rtc_irq,
 591                                                 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 592                                                 dev_name(dev), dev);
 593                 if (ret) {
 594                         dev_err(dev, "failed to request alarm irq\n");
 595                         return ret;
 596                 }
 597         }
 598
 599         if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) {
 600                 device_init_wakeup(dev, true);
 601                 set_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
 602         }
 603
 604         if (is_pcf2127) {
 605                 struct nvmem_config nvmem_cfg = {
 606                         .priv = pcf2127,
 607                         .reg_read = pcf2127_nvmem_read,
 608                         .reg_write = pcf2127_nvmem_write,
 609                         .size = 512,
 610                 };
 611
 612                 ret = devm_rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
 613         }
 614
 615         /*
 616          * The "Power-On Reset Override" facility prevents the RTC to do a reset
 617          * after power on. For normal operation the PORO must be disabled.
 618          */
 619         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 620                                 PCF2127_BIT_CTRL1_POR_OVRD);
 621
 622         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CLKOUT, &val);
 623         if (ret < 0)
 624                 return ret;
 625
 626         if (!(val & PCF2127_BIT_CLKOUT_OTPR)) {
 627                 ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
 628                                       PCF2127_BIT_CLKOUT_OTPR);
 629                 if (ret < 0)
 630                         return ret;
 631
 632                 msleep(100);
 633         }
 634
 635         /*
 636          * Watchdog timer enabled and reset pin /RST activated when timed out.
 637          * Select 1Hz clock source for watchdog timer.
 638          * Note: Countdown timer disabled and not available.
 639          * For pca2129, pcf2129, only bit[7] is for Symbol WD_CD
 640          * of register watchdg_tim_ctl. The bit[6] is labeled
 641          * as T. Bits labeled as T must always be written with
 642          * logic 0.
 643          */
 644         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
 645                                  PCF2127_BIT_WD_CTL_CD1 |
 646                                  PCF2127_BIT_WD_CTL_CD0 |
 647                                  PCF2127_BIT_WD_CTL_TF1 |
 648                                  PCF2127_BIT_WD_CTL_TF0,
 649                                  PCF2127_BIT_WD_CTL_CD1 |
 650                                  (is_pcf2127 ? PCF2127_BIT_WD_CTL_CD0 : 0) |
 651                                  PCF2127_BIT_WD_CTL_TF1);
 652         if (ret) {
 653                 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
 654                 return ret;
 655         }
 656
 657         pcf2127_watchdog_init(dev, pcf2127);
 658
 659         /*
 660          * Disable battery low/switch-over timestamp and interrupts.
 661          * Clear battery interrupt flags which can block new trigger events.
 662          * Note: This is the default chip behaviour but added to ensure
 663          * correct tamper timestamp and interrupt function.
 664          */
 665         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 666                                  PCF2127_BIT_CTRL3_BTSE |
 667                                  PCF2127_BIT_CTRL3_BIE |
 668                                  PCF2127_BIT_CTRL3_BLIE, 0);
 669         if (ret) {
 670                 dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
 671                         __func__);
 672                 return ret;
 673         }
 674
 675         /*
 676          * Enable timestamp function and store timestamp of first trigger
 677          * event until TSF1 and TFS2 interrupt flags are cleared.
 678          */
 679         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
 680                                  PCF2127_BIT_TS_CTRL_TSOFF |
 681                                  PCF2127_BIT_TS_CTRL_TSM,
 682                                  PCF2127_BIT_TS_CTRL_TSM);
 683         if (ret) {
 684                 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
 685                         __func__);
 686                 return ret;
 687         }
 688
 689         /*
 690          * Enable interrupt generation when TSF1 or TSF2 timestamp flags
 691          * are set. Interrupt signal is an open-drain output and can be
 692          * left floating if unused.
 693          */
 694         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 695                                  PCF2127_BIT_CTRL2_TSIE,
 696                                  PCF2127_BIT_CTRL2_TSIE);
 697         if (ret) {
 698                 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
 699                         __func__);
 700                 return ret;
 701         }
 702
 703         ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
 704         if (ret) {
 705                 dev_err(dev, "%s: tamper sysfs registering failed\n",
 706                         __func__);
 707                 return ret;
 708         }
 709
 710         return devm_rtc_register_device(pcf2127->rtc);
 711 }
 712
 713 #ifdef CONFIG_OF
 714 static const struct of_device_id pcf2127_of_match[] = {
 715         { .compatible = "nxp,pcf2127" },
 716         { .compatible = "nxp,pcf2129" },
 717         { .compatible = "nxp,pca2129" },
 718         {}
 719 };
 720 MODULE_DEVICE_TABLE(of, pcf2127_of_match);
 721 #endif
 722
 723 #if IS_ENABLED(CONFIG_I2C)
 724
 725 static int pcf2127_i2c_write(void *context, const void *data, size_t count)
 726 {
 727         struct device *dev = context;
 728         struct i2c_client *client = to_i2c_client(dev);
 729         int ret;
 730
 731         ret = i2c_master_send(client, data, count);
 732         if (ret != count)
 733                 return ret < 0 ? ret : -EIO;
 734
 735         return 0;
 736 }
 737
 738 static int pcf2127_i2c_gather_write(void *context,
 739                                 const void *reg, size_t reg_size,
 740                                 const void *val, size_t val_size)
 741 {
 742         struct device *dev = context;
 743         struct i2c_client *client = to_i2c_client(dev);
 744         int ret;
 745         void *buf;
 746
 747         if (WARN_ON(reg_size != 1))
 748                 return -EINVAL;
 749
 750         buf = kmalloc(val_size + 1, GFP_KERNEL);
 751         if (!buf)
 752                 return -ENOMEM;
 753
 754         memcpy(buf, reg, 1);
 755         memcpy(buf + 1, val, val_size);
 756
 757         ret = i2c_master_send(client, buf, val_size + 1);
 758
 759         kfree(buf);
 760
 761         if (ret != val_size + 1)
 762                 return ret < 0 ? ret : -EIO;
 763
 764         return 0;
 765 }
 766
 767 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
 768                                 void *val, size_t val_size)
 769 {
 770         struct device *dev = context;
 771         struct i2c_client *client = to_i2c_client(dev);
 772         int ret;
 773
 774         if (WARN_ON(reg_size != 1))
 775                 return -EINVAL;
 776
 777         ret = i2c_master_send(client, reg, 1);
 778         if (ret != 1)
 779                 return ret < 0 ? ret : -EIO;
 780
 781         ret = i2c_master_recv(client, val, val_size);
 782         if (ret != val_size)
 783                 return ret < 0 ? ret : -EIO;
 784
 785         return 0;
 786 }
 787
 788 /*
 789  * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
 790  * is that the STOP condition is required between set register address and
 791  * read register data when reading from registers.
 792  */
 793 static const struct regmap_bus pcf2127_i2c_regmap = {
 794         .write = pcf2127_i2c_write,
 795         .gather_write = pcf2127_i2c_gather_write,
 796         .read = pcf2127_i2c_read,
 797 };
 798
 799 static struct i2c_driver pcf2127_i2c_driver;
 800
 801 static int pcf2127_i2c_probe(struct i2c_client *client,
 802                                 const struct i2c_device_id *id)
 803 {
 804         struct regmap *regmap;
 805         static const struct regmap_config config = {
 806                 .reg_bits = 8,
 807                 .val_bits = 8,
 808                 .max_register = 0x1d,
 809         };
 810
 811         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 812                 return -ENODEV;
 813
 814         regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
 815                                         &client->dev, &config);
 816         if (IS_ERR(regmap)) {
 817                 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
 818                         __func__, PTR_ERR(regmap));
 819                 return PTR_ERR(regmap);
 820         }
 821
 822         return pcf2127_probe(&client->dev, regmap, client->irq,
 823                              pcf2127_i2c_driver.driver.name, id->driver_data);
 824 }
 825
 826 static const struct i2c_device_id pcf2127_i2c_id[] = {
 827         { "pcf2127", 1 },
 828         { "pcf2129", 0 },
 829         { "pca2129", 0 },
 830         { }
 831 };
 832 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
 833
 834 static struct i2c_driver pcf2127_i2c_driver = {
 835         .driver         = {
 836                 .name   = "rtc-pcf2127-i2c",
 837                 .of_match_table = of_match_ptr(pcf2127_of_match),
 838         },
 839         .probe          = pcf2127_i2c_probe,
 840         .id_table       = pcf2127_i2c_id,
 841 };
 842
 843 static int pcf2127_i2c_register_driver(void)
 844 {
 845         return i2c_add_driver(&pcf2127_i2c_driver);
 846 }
 847
 848 static void pcf2127_i2c_unregister_driver(void)
 849 {
 850         i2c_del_driver(&pcf2127_i2c_driver);
 851 }
 852
 853 #else
 854
 855 static int pcf2127_i2c_register_driver(void)
 856 {
 857         return 0;
 858 }
 859
 860 static void pcf2127_i2c_unregister_driver(void)
 861 {
 862 }
 863
 864 #endif
 865
 866 #if IS_ENABLED(CONFIG_SPI_MASTER)
 867
 868 static struct spi_driver pcf2127_spi_driver;
 869
 870 static int pcf2127_spi_probe(struct spi_device *spi)
 871 {
 872         static const struct regmap_config config = {
 873                 .reg_bits = 8,
 874                 .val_bits = 8,
 875                 .read_flag_mask = 0xa0,
 876                 .write_flag_mask = 0x20,
 877                 .max_register = 0x1d,
 878         };
 879         struct regmap *regmap;
 880
 881         regmap = devm_regmap_init_spi(spi, &config);
 882         if (IS_ERR(regmap)) {
 883                 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
 884                         __func__, PTR_ERR(regmap));
 885                 return PTR_ERR(regmap);
 886         }
 887
 888         return pcf2127_probe(&spi->dev, regmap, spi->irq,
 889                              pcf2127_spi_driver.driver.name,
 890                              spi_get_device_id(spi)->driver_data);
 891 }
 892
 893 static const struct spi_device_id pcf2127_spi_id[] = {
 894         { "pcf2127", 1 },
 895         { "pcf2129", 0 },
 896         { "pca2129", 0 },
 897         { }
 898 };
 899 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
 900
 901 static struct spi_driver pcf2127_spi_driver = {
 902         .driver         = {
 903                 .name   = "rtc-pcf2127-spi",
 904                 .of_match_table = of_match_ptr(pcf2127_of_match),
 905         },
 906         .probe          = pcf2127_spi_probe,
 907         .id_table       = pcf2127_spi_id,
 908 };
 909
 910 static int pcf2127_spi_register_driver(void)
 911 {
 912         return spi_register_driver(&pcf2127_spi_driver);
 913 }
 914
 915 static void pcf2127_spi_unregister_driver(void)
 916 {
 917         spi_unregister_driver(&pcf2127_spi_driver);
 918 }
 919
 920 #else
 921
 922 static int pcf2127_spi_register_driver(void)
 923 {
 924         return 0;
 925 }
 926
 927 static void pcf2127_spi_unregister_driver(void)
 928 {
 929 }
 930
 931 #endif
 932
 933 static int __init pcf2127_init(void)
 934 {
 935         int ret;
 936
 937         ret = pcf2127_i2c_register_driver();
 938         if (ret) {
 939                 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
 940                 return ret;
 941         }
 942
 943         ret = pcf2127_spi_register_driver();
 944         if (ret) {
 945                 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
 946                 pcf2127_i2c_unregister_driver();
 947         }
 948
 949         return ret;
 950 }
 951 module_init(pcf2127_init)
 952
 953 static void __exit pcf2127_exit(void)
 954 {
 955         pcf2127_spi_unregister_driver();
 956         pcf2127_i2c_unregister_driver();
 957 }
 958 module_exit(pcf2127_exit)
 959
 960 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
 961 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
 962 MODULE_LICENSE("GPL v2");