drivers/pinctrl/pinctrl-sx150x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2016, BayLibre, SAS. All rights reserved.
   4  * Author: Neil Armstrong <narmstrong@baylibre.com>
   5  *
   6  * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
   7  *
   8  * Driver for Semtech SX150X I2C GPIO Expanders
   9  * The handling of the 4-bit chips (SX1501/SX1504/SX1507) is untested.
  10  *
  11  * Author: Gregory Bean <gbean@codeaurora.org>
  12  */
  13
  14 #include <linux/regmap.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/irq.h>
  19 #include <linux/mutex.h>
  20 #include <linux/slab.h>
  21 #include <linux/of.h>
  22 #include <linux/of_device.h>
  23 #include <linux/gpio/driver.h>
  24 #include <linux/pinctrl/pinconf.h>
  25 #include <linux/pinctrl/pinctrl.h>
  26 #include <linux/pinctrl/pinmux.h>
  27 #include <linux/pinctrl/pinconf-generic.h>
  28
  29 #include "core.h"
  30 #include "pinconf.h"
  31 #include "pinctrl-utils.h"
  32
  33 /* The chip models of sx150x */
  34 enum {
  35         SX150X_123 = 0,
  36         SX150X_456,
  37         SX150X_789,
  38 };
  39 enum {
  40         SX150X_789_REG_MISC_AUTOCLEAR_OFF = 1 << 0,
  41         SX150X_MAX_REGISTER = 0xad,
  42         SX150X_IRQ_TYPE_EDGE_RISING = 0x1,
  43         SX150X_IRQ_TYPE_EDGE_FALLING = 0x2,
  44         SX150X_789_RESET_KEY1 = 0x12,
  45         SX150X_789_RESET_KEY2 = 0x34,
  46 };
  47
  48 struct sx150x_123_pri {
  49         u8 reg_pld_mode;
  50         u8 reg_pld_table0;
  51         u8 reg_pld_table1;
  52         u8 reg_pld_table2;
  53         u8 reg_pld_table3;
  54         u8 reg_pld_table4;
  55         u8 reg_advanced;
  56 };
  57
  58 struct sx150x_456_pri {
  59         u8 reg_pld_mode;
  60         u8 reg_pld_table0;
  61         u8 reg_pld_table1;
  62         u8 reg_pld_table2;
  63         u8 reg_pld_table3;
  64         u8 reg_pld_table4;
  65         u8 reg_advanced;
  66 };
  67
  68 struct sx150x_789_pri {
  69         u8 reg_drain;
  70         u8 reg_polarity;
  71         u8 reg_clock;
  72         u8 reg_misc;
  73         u8 reg_reset;
  74         u8 ngpios;
  75 };
  76
  77 struct sx150x_device_data {
  78         u8 model;
  79         u8 reg_pullup;
  80         u8 reg_pulldn;
  81         u8 reg_dir;
  82         u8 reg_data;
  83         u8 reg_irq_mask;
  84         u8 reg_irq_src;
  85         u8 reg_sense;
  86         u8 ngpios;
  87         union {
  88                 struct sx150x_123_pri x123;
  89                 struct sx150x_456_pri x456;
  90                 struct sx150x_789_pri x789;
  91         } pri;
  92         const struct pinctrl_pin_desc *pins;
  93         unsigned int npins;
  94 };
  95
  96 struct sx150x_pinctrl {
  97         struct device *dev;
  98         struct i2c_client *client;
  99         struct pinctrl_dev *pctldev;
 100         struct pinctrl_desc pinctrl_desc;
 101         struct gpio_chip gpio;
 102         struct irq_chip irq_chip;
 103         struct regmap *regmap;
 104         struct {
 105                 u32 sense;
 106                 u32 masked;
 107         } irq;
 108         struct mutex lock;
 109         const struct sx150x_device_data *data;
 110 };
 111
 112 static const struct pinctrl_pin_desc sx150x_4_pins[] = {
 113         PINCTRL_PIN(0, "gpio0"),
 114         PINCTRL_PIN(1, "gpio1"),
 115         PINCTRL_PIN(2, "gpio2"),
 116         PINCTRL_PIN(3, "gpio3"),
 117         PINCTRL_PIN(4, "oscio"),
 118 };
 119
 120 static const struct pinctrl_pin_desc sx150x_8_pins[] = {
 121         PINCTRL_PIN(0, "gpio0"),
 122         PINCTRL_PIN(1, "gpio1"),
 123         PINCTRL_PIN(2, "gpio2"),
 124         PINCTRL_PIN(3, "gpio3"),
 125         PINCTRL_PIN(4, "gpio4"),
 126         PINCTRL_PIN(5, "gpio5"),
 127         PINCTRL_PIN(6, "gpio6"),
 128         PINCTRL_PIN(7, "gpio7"),
 129         PINCTRL_PIN(8, "oscio"),
 130 };
 131
 132 static const struct pinctrl_pin_desc sx150x_16_pins[] = {
 133         PINCTRL_PIN(0, "gpio0"),
 134         PINCTRL_PIN(1, "gpio1"),
 135         PINCTRL_PIN(2, "gpio2"),
 136         PINCTRL_PIN(3, "gpio3"),
 137         PINCTRL_PIN(4, "gpio4"),
 138         PINCTRL_PIN(5, "gpio5"),
 139         PINCTRL_PIN(6, "gpio6"),
 140         PINCTRL_PIN(7, "gpio7"),
 141         PINCTRL_PIN(8, "gpio8"),
 142         PINCTRL_PIN(9, "gpio9"),
 143         PINCTRL_PIN(10, "gpio10"),
 144         PINCTRL_PIN(11, "gpio11"),
 145         PINCTRL_PIN(12, "gpio12"),
 146         PINCTRL_PIN(13, "gpio13"),
 147         PINCTRL_PIN(14, "gpio14"),
 148         PINCTRL_PIN(15, "gpio15"),
 149         PINCTRL_PIN(16, "oscio"),
 150 };
 151
 152 static const struct sx150x_device_data sx1501q_device_data = {
 153         .model = SX150X_123,
 154         .reg_pullup     = 0x02,
 155         .reg_pulldn     = 0x03,
 156         .reg_dir        = 0x01,
 157         .reg_data       = 0x00,
 158         .reg_irq_mask   = 0x05,
 159         .reg_irq_src    = 0x08,
 160         .reg_sense      = 0x07,
 161         .pri.x123 = {
 162                 .reg_pld_mode   = 0x10,
 163                 .reg_pld_table0 = 0x11,
 164                 .reg_pld_table2 = 0x13,
 165                 .reg_advanced   = 0xad,
 166         },
 167         .ngpios = 4,
 168         .pins = sx150x_4_pins,
 169         .npins = 4, /* oscio not available */
 170 };
 171
 172 static const struct sx150x_device_data sx1502q_device_data = {
 173         .model = SX150X_123,
 174         .reg_pullup     = 0x02,
 175         .reg_pulldn     = 0x03,
 176         .reg_dir        = 0x01,
 177         .reg_data       = 0x00,
 178         .reg_irq_mask   = 0x05,
 179         .reg_irq_src    = 0x08,
 180         .reg_sense      = 0x06,
 181         .pri.x123 = {
 182                 .reg_pld_mode   = 0x10,
 183                 .reg_pld_table0 = 0x11,
 184                 .reg_pld_table1 = 0x12,
 185                 .reg_pld_table2 = 0x13,
 186                 .reg_pld_table3 = 0x14,
 187                 .reg_pld_table4 = 0x15,
 188                 .reg_advanced   = 0xad,
 189         },
 190         .ngpios = 8,
 191         .pins = sx150x_8_pins,
 192         .npins = 8, /* oscio not available */
 193 };
 194
 195 static const struct sx150x_device_data sx1503q_device_data = {
 196         .model = SX150X_123,
 197         .reg_pullup     = 0x04,
 198         .reg_pulldn     = 0x06,
 199         .reg_dir        = 0x02,
 200         .reg_data       = 0x00,
 201         .reg_irq_mask   = 0x08,
 202         .reg_irq_src    = 0x0e,
 203         .reg_sense      = 0x0a,
 204         .pri.x123 = {
 205                 .reg_pld_mode   = 0x20,
 206                 .reg_pld_table0 = 0x22,
 207                 .reg_pld_table1 = 0x24,
 208                 .reg_pld_table2 = 0x26,
 209                 .reg_pld_table3 = 0x28,
 210                 .reg_pld_table4 = 0x2a,
 211                 .reg_advanced   = 0xad,
 212         },
 213         .ngpios = 16,
 214         .pins = sx150x_16_pins,
 215         .npins  = 16, /* oscio not available */
 216 };
 217
 218 static const struct sx150x_device_data sx1504q_device_data = {
 219         .model = SX150X_456,
 220         .reg_pullup     = 0x02,
 221         .reg_pulldn     = 0x03,
 222         .reg_dir        = 0x01,
 223         .reg_data       = 0x00,
 224         .reg_irq_mask   = 0x05,
 225         .reg_irq_src    = 0x08,
 226         .reg_sense      = 0x07,
 227         .pri.x456 = {
 228                 .reg_pld_mode   = 0x10,
 229                 .reg_pld_table0 = 0x11,
 230                 .reg_pld_table2 = 0x13,
 231         },
 232         .ngpios = 4,
 233         .pins = sx150x_4_pins,
 234         .npins = 4, /* oscio not available */
 235 };
 236
 237 static const struct sx150x_device_data sx1505q_device_data = {
 238         .model = SX150X_456,
 239         .reg_pullup     = 0x02,
 240         .reg_pulldn     = 0x03,
 241         .reg_dir        = 0x01,
 242         .reg_data       = 0x00,
 243         .reg_irq_mask   = 0x05,
 244         .reg_irq_src    = 0x08,
 245         .reg_sense      = 0x06,
 246         .pri.x456 = {
 247                 .reg_pld_mode   = 0x10,
 248                 .reg_pld_table0 = 0x11,
 249                 .reg_pld_table1 = 0x12,
 250                 .reg_pld_table2 = 0x13,
 251                 .reg_pld_table3 = 0x14,
 252                 .reg_pld_table4 = 0x15,
 253         },
 254         .ngpios = 8,
 255         .pins = sx150x_8_pins,
 256         .npins = 8, /* oscio not available */
 257 };
 258
 259 static const struct sx150x_device_data sx1506q_device_data = {
 260         .model = SX150X_456,
 261         .reg_pullup     = 0x04,
 262         .reg_pulldn     = 0x06,
 263         .reg_dir        = 0x02,
 264         .reg_data       = 0x00,
 265         .reg_irq_mask   = 0x08,
 266         .reg_irq_src    = 0x0e,
 267         .reg_sense      = 0x0a,
 268         .pri.x456 = {
 269                 .reg_pld_mode   = 0x20,
 270                 .reg_pld_table0 = 0x22,
 271                 .reg_pld_table1 = 0x24,
 272                 .reg_pld_table2 = 0x26,
 273                 .reg_pld_table3 = 0x28,
 274                 .reg_pld_table4 = 0x2a,
 275                 .reg_advanced   = 0xad,
 276         },
 277         .ngpios = 16,
 278         .pins = sx150x_16_pins,
 279         .npins = 16, /* oscio not available */
 280 };
 281
 282 static const struct sx150x_device_data sx1507q_device_data = {
 283         .model = SX150X_789,
 284         .reg_pullup     = 0x03,
 285         .reg_pulldn     = 0x04,
 286         .reg_dir        = 0x07,
 287         .reg_data       = 0x08,
 288         .reg_irq_mask   = 0x09,
 289         .reg_irq_src    = 0x0b,
 290         .reg_sense      = 0x0a,
 291         .pri.x789 = {
 292                 .reg_drain      = 0x05,
 293                 .reg_polarity   = 0x06,
 294                 .reg_clock      = 0x0d,
 295                 .reg_misc       = 0x0e,
 296                 .reg_reset      = 0x7d,
 297         },
 298         .ngpios = 4,
 299         .pins = sx150x_4_pins,
 300         .npins = ARRAY_SIZE(sx150x_4_pins),
 301 };
 302
 303 static const struct sx150x_device_data sx1508q_device_data = {
 304         .model = SX150X_789,
 305         .reg_pullup     = 0x03,
 306         .reg_pulldn     = 0x04,
 307         .reg_dir        = 0x07,
 308         .reg_data       = 0x08,
 309         .reg_irq_mask   = 0x09,
 310         .reg_irq_src    = 0x0c,
 311         .reg_sense      = 0x0a,
 312         .pri.x789 = {
 313                 .reg_drain      = 0x05,
 314                 .reg_polarity   = 0x06,
 315                 .reg_clock      = 0x0f,
 316                 .reg_misc       = 0x10,
 317                 .reg_reset      = 0x7d,
 318         },
 319         .ngpios = 8,
 320         .pins = sx150x_8_pins,
 321         .npins = ARRAY_SIZE(sx150x_8_pins),
 322 };
 323
 324 static const struct sx150x_device_data sx1509q_device_data = {
 325         .model = SX150X_789,
 326         .reg_pullup     = 0x06,
 327         .reg_pulldn     = 0x08,
 328         .reg_dir        = 0x0e,
 329         .reg_data       = 0x10,
 330         .reg_irq_mask   = 0x12,
 331         .reg_irq_src    = 0x18,
 332         .reg_sense      = 0x14,
 333         .pri.x789 = {
 334                 .reg_drain      = 0x0a,
 335                 .reg_polarity   = 0x0c,
 336                 .reg_clock      = 0x1e,
 337                 .reg_misc       = 0x1f,
 338                 .reg_reset      = 0x7d,
 339         },
 340         .ngpios = 16,
 341         .pins = sx150x_16_pins,
 342         .npins = ARRAY_SIZE(sx150x_16_pins),
 343 };
 344
 345 static int sx150x_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
 346 {
 347         return 0;
 348 }
 349
 350 static const char *sx150x_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 351                                                 unsigned int group)
 352 {
 353         return NULL;
 354 }
 355
 356 static int sx150x_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 357                                         unsigned int group,
 358                                         const unsigned int **pins,
 359                                         unsigned int *num_pins)
 360 {
 361         return -ENOTSUPP;
 362 }
 363
 364 static const struct pinctrl_ops sx150x_pinctrl_ops = {
 365         .get_groups_count = sx150x_pinctrl_get_groups_count,
 366         .get_group_name = sx150x_pinctrl_get_group_name,
 367         .get_group_pins = sx150x_pinctrl_get_group_pins,
 368 #ifdef CONFIG_OF
 369         .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
 370         .dt_free_map = pinctrl_utils_free_map,
 371 #endif
 372 };
 373
 374 static bool sx150x_pin_is_oscio(struct sx150x_pinctrl *pctl, unsigned int pin)
 375 {
 376         if (pin >= pctl->data->npins)
 377                 return false;
 378
 379         /* OSCIO pin is only present in 789 devices */
 380         if (pctl->data->model != SX150X_789)
 381                 return false;
 382
 383         return !strcmp(pctl->data->pins[pin].name, "oscio");
 384 }
 385
 386 static int sx150x_gpio_get_direction(struct gpio_chip *chip,
 387                                       unsigned int offset)
 388 {
 389         struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
 390         unsigned int value;
 391         int ret;
 392
 393         if (sx150x_pin_is_oscio(pctl, offset))
 394                 return GPIO_LINE_DIRECTION_OUT;
 395
 396         ret = regmap_read(pctl->regmap, pctl->data->reg_dir, &value);
 397         if (ret < 0)
 398                 return ret;
 399
 400         if (value & BIT(offset))
 401                 return GPIO_LINE_DIRECTION_IN;
 402
 403         return GPIO_LINE_DIRECTION_OUT;
 404 }
 405
 406 static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset)
 407 {
 408         struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
 409         unsigned int value;
 410         int ret;
 411
 412         if (sx150x_pin_is_oscio(pctl, offset))
 413                 return -EINVAL;
 414
 415         ret = regmap_read(pctl->regmap, pctl->data->reg_data, &value);
 416         if (ret < 0)
 417                 return ret;
 418
 419         return !!(value & BIT(offset));
 420 }
 421
 422 static int __sx150x_gpio_set(struct sx150x_pinctrl *pctl, unsigned int offset,
 423                              int value)
 424 {
 425         return regmap_write_bits(pctl->regmap, pctl->data->reg_data,
 426                                  BIT(offset), value ? BIT(offset) : 0);
 427 }
 428
 429 static int sx150x_gpio_oscio_set(struct sx150x_pinctrl *pctl,
 430                                  int value)
 431 {
 432         return regmap_write(pctl->regmap,
 433                             pctl->data->pri.x789.reg_clock,
 434                             (value ? 0x1f : 0x10));
 435 }
 436
 437 static void sx150x_gpio_set(struct gpio_chip *chip, unsigned int offset,
 438                             int value)
 439 {
 440         struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
 441
 442         if (sx150x_pin_is_oscio(pctl, offset))
 443                 sx150x_gpio_oscio_set(pctl, value);
 444         else
 445                 __sx150x_gpio_set(pctl, offset, value);
 446
 447 }
 448
 449 static void sx150x_gpio_set_multiple(struct gpio_chip *chip,
 450                                      unsigned long *mask,
 451                                      unsigned long *bits)
 452 {
 453         struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
 454
 455         regmap_write_bits(pctl->regmap, pctl->data->reg_data, *mask, *bits);
 456 }
 457
 458 static int sx150x_gpio_direction_input(struct gpio_chip *chip,
 459                                        unsigned int offset)
 460 {
 461         struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
 462
 463         if (sx150x_pin_is_oscio(pctl, offset))
 464                 return -EINVAL;
 465
 466         return regmap_write_bits(pctl->regmap,
 467                                  pctl->data->reg_dir,
 468                                  BIT(offset), BIT(offset));
 469 }
 470
 471 static int sx150x_gpio_direction_output(struct gpio_chip *chip,
 472                                         unsigned int offset, int value)
 473 {
 474         struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
 475         int ret;
 476
 477         if (sx150x_pin_is_oscio(pctl, offset))
 478                 return sx150x_gpio_oscio_set(pctl, value);
 479
 480         ret = __sx150x_gpio_set(pctl, offset, value);
 481         if (ret < 0)
 482                 return ret;
 483
 484         return regmap_write_bits(pctl->regmap,
 485                                  pctl->data->reg_dir,
 486                                  BIT(offset), 0);
 487 }
 488
 489 static void sx150x_irq_mask(struct irq_data *d)
 490 {
 491         struct sx150x_pinctrl *pctl =
 492                         gpiochip_get_data(irq_data_get_irq_chip_data(d));
 493         unsigned int n = d->hwirq;
 494
 495         pctl->irq.masked |= BIT(n);
 496 }
 497
 498 static void sx150x_irq_unmask(struct irq_data *d)
 499 {
 500         struct sx150x_pinctrl *pctl =
 501                         gpiochip_get_data(irq_data_get_irq_chip_data(d));
 502         unsigned int n = d->hwirq;
 503
 504         pctl->irq.masked &= ~BIT(n);
 505 }
 506
 507 static void sx150x_irq_set_sense(struct sx150x_pinctrl *pctl,
 508                                  unsigned int line, unsigned int sense)
 509 {
 510         /*
 511          * Every interrupt line is represented by two bits shifted
 512          * proportionally to the line number
 513          */
 514         const unsigned int n = line * 2;
 515         const unsigned int mask = ~((SX150X_IRQ_TYPE_EDGE_RISING |
 516                                      SX150X_IRQ_TYPE_EDGE_FALLING) << n);
 517
 518         pctl->irq.sense &= mask;
 519         pctl->irq.sense |= sense << n;
 520 }
 521
 522 static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
 523 {
 524         struct sx150x_pinctrl *pctl =
 525                         gpiochip_get_data(irq_data_get_irq_chip_data(d));
 526         unsigned int n, val = 0;
 527
 528         if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
 529                 return -EINVAL;
 530
 531         n = d->hwirq;
 532
 533         if (flow_type & IRQ_TYPE_EDGE_RISING)
 534                 val |= SX150X_IRQ_TYPE_EDGE_RISING;
 535         if (flow_type & IRQ_TYPE_EDGE_FALLING)
 536                 val |= SX150X_IRQ_TYPE_EDGE_FALLING;
 537
 538         sx150x_irq_set_sense(pctl, n, val);
 539         return 0;
 540 }
 541
 542 static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
 543 {
 544         struct sx150x_pinctrl *pctl = (struct sx150x_pinctrl *)dev_id;
 545         unsigned long n, status;
 546         unsigned int val;
 547         int err;
 548
 549         err = regmap_read(pctl->regmap, pctl->data->reg_irq_src, &val);
 550         if (err < 0)
 551                 return IRQ_NONE;
 552
 553         err = regmap_write(pctl->regmap, pctl->data->reg_irq_src, val);
 554         if (err < 0)
 555                 return IRQ_NONE;
 556
 557         status = val;
 558         for_each_set_bit(n, &status, pctl->data->ngpios)
 559                 handle_nested_irq(irq_find_mapping(pctl->gpio.irq.domain, n));
 560
 561         return IRQ_HANDLED;
 562 }
 563
 564 static void sx150x_irq_bus_lock(struct irq_data *d)
 565 {
 566         struct sx150x_pinctrl *pctl =
 567                         gpiochip_get_data(irq_data_get_irq_chip_data(d));
 568
 569         mutex_lock(&pctl->lock);
 570 }
 571
 572 static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
 573 {
 574         struct sx150x_pinctrl *pctl =
 575                         gpiochip_get_data(irq_data_get_irq_chip_data(d));
 576
 577         regmap_write(pctl->regmap, pctl->data->reg_irq_mask, pctl->irq.masked);
 578         regmap_write(pctl->regmap, pctl->data->reg_sense, pctl->irq.sense);
 579         mutex_unlock(&pctl->lock);
 580 }
 581
 582 static int sx150x_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
 583                               unsigned long *config)
 584 {
 585         struct sx150x_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 586         unsigned int param = pinconf_to_config_param(*config);
 587         int ret;
 588         u32 arg;
 589         unsigned int data;
 590
 591         if (sx150x_pin_is_oscio(pctl, pin)) {
 592                 switch (param) {
 593                 case PIN_CONFIG_DRIVE_PUSH_PULL:
 594                 case PIN_CONFIG_OUTPUT:
 595                         ret = regmap_read(pctl->regmap,
 596                                           pctl->data->pri.x789.reg_clock,
 597                                           &data);
 598                         if (ret < 0)
 599                                 return ret;
 600
 601                         if (param == PIN_CONFIG_DRIVE_PUSH_PULL)
 602                                 arg = (data & 0x1f) ? 1 : 0;
 603                         else {
 604                                 if ((data & 0x1f) == 0x1f)
 605                                         arg = 1;
 606                                 else if ((data & 0x1f) == 0x10)
 607                                         arg = 0;
 608                                 else
 609                                         return -EINVAL;
 610                         }
 611
 612                         break;
 613                 default:
 614                         return -ENOTSUPP;
 615                 }
 616
 617                 goto out;
 618         }
 619
 620         switch (param) {
 621         case PIN_CONFIG_BIAS_PULL_DOWN:
 622                 ret = regmap_read(pctl->regmap,
 623                                   pctl->data->reg_pulldn,
 624                                   &data);
 625                 data &= BIT(pin);
 626
 627                 if (ret < 0)
 628                         return ret;
 629
 630                 if (!ret)
 631                         return -EINVAL;
 632
 633                 arg = 1;
 634                 break;
 635
 636         case PIN_CONFIG_BIAS_PULL_UP:
 637                 ret = regmap_read(pctl->regmap,
 638                                   pctl->data->reg_pullup,
 639                                   &data);
 640                 data &= BIT(pin);
 641
 642                 if (ret < 0)
 643                         return ret;
 644
 645                 if (!ret)
 646                         return -EINVAL;
 647
 648                 arg = 1;
 649                 break;
 650
 651         case PIN_CONFIG_DRIVE_OPEN_DRAIN:
 652                 if (pctl->data->model != SX150X_789)
 653                         return -ENOTSUPP;
 654
 655                 ret = regmap_read(pctl->regmap,
 656                                   pctl->data->pri.x789.reg_drain,
 657                                   &data);
 658                 data &= BIT(pin);
 659
 660                 if (ret < 0)
 661                         return ret;
 662
 663                 if (!data)
 664                         return -EINVAL;
 665
 666                 arg = 1;
 667                 break;
 668
 669         case PIN_CONFIG_DRIVE_PUSH_PULL:
 670                 if (pctl->data->model != SX150X_789)
 671                         arg = true;
 672                 else {
 673                         ret = regmap_read(pctl->regmap,
 674                                           pctl->data->pri.x789.reg_drain,
 675                                           &data);
 676                         data &= BIT(pin);
 677
 678                         if (ret < 0)
 679                                 return ret;
 680
 681                         if (data)
 682                                 return -EINVAL;
 683
 684                         arg = 1;
 685                 }
 686                 break;
 687
 688         case PIN_CONFIG_OUTPUT:
 689                 ret = sx150x_gpio_get_direction(&pctl->gpio, pin);
 690                 if (ret < 0)
 691                         return ret;
 692
 693                 if (ret == GPIO_LINE_DIRECTION_IN)
 694                         return -EINVAL;
 695
 696                 ret = sx150x_gpio_get(&pctl->gpio, pin);
 697                 if (ret < 0)
 698                         return ret;
 699
 700                 arg = ret;
 701                 break;
 702
 703         default:
 704                 return -ENOTSUPP;
 705         }
 706
 707 out:
 708         *config = pinconf_to_config_packed(param, arg);
 709
 710         return 0;
 711 }
 712
 713 static int sx150x_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
 714                               unsigned long *configs, unsigned int num_configs)
 715 {
 716         struct sx150x_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 717         enum pin_config_param param;
 718         u32 arg;
 719         int i;
 720         int ret;
 721
 722         for (i = 0; i < num_configs; i++) {
 723                 param = pinconf_to_config_param(configs[i]);
 724                 arg = pinconf_to_config_argument(configs[i]);
 725
 726                 if (sx150x_pin_is_oscio(pctl, pin)) {
 727                         if (param == PIN_CONFIG_OUTPUT) {
 728                                 ret = sx150x_gpio_direction_output(&pctl->gpio,
 729                                                                    pin, arg);
 730                                 if (ret < 0)
 731                                         return ret;
 732
 733                                 continue;
 734                         } else
 735                                 return -ENOTSUPP;
 736                 }
 737
 738                 switch (param) {
 739                 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 740                 case PIN_CONFIG_BIAS_DISABLE:
 741                         ret = regmap_write_bits(pctl->regmap,
 742                                                 pctl->data->reg_pulldn,
 743                                                 BIT(pin), 0);
 744                         if (ret < 0)
 745                                 return ret;
 746
 747                         ret = regmap_write_bits(pctl->regmap,
 748                                                 pctl->data->reg_pullup,
 749                                                 BIT(pin), 0);
 750                         if (ret < 0)
 751                                 return ret;
 752
 753                         break;
 754
 755                 case PIN_CONFIG_BIAS_PULL_UP:
 756                         ret = regmap_write_bits(pctl->regmap,
 757                                                 pctl->data->reg_pullup,
 758                                                 BIT(pin), BIT(pin));
 759                         if (ret < 0)
 760                                 return ret;
 761
 762                         break;
 763
 764                 case PIN_CONFIG_BIAS_PULL_DOWN:
 765                         ret = regmap_write_bits(pctl->regmap,
 766                                                 pctl->data->reg_pulldn,
 767                                                 BIT(pin), BIT(pin));
 768                         if (ret < 0)
 769                                 return ret;
 770
 771                         break;
 772
 773                 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
 774                         if (pctl->data->model != SX150X_789 ||
 775                             sx150x_pin_is_oscio(pctl, pin))
 776                                 return -ENOTSUPP;
 777
 778                         ret = regmap_write_bits(pctl->regmap,
 779                                                 pctl->data->pri.x789.reg_drain,
 780                                                 BIT(pin), BIT(pin));
 781                         if (ret < 0)
 782                                 return ret;
 783
 784                         break;
 785
 786                 case PIN_CONFIG_DRIVE_PUSH_PULL:
 787                         if (pctl->data->model != SX150X_789 ||
 788                             sx150x_pin_is_oscio(pctl, pin))
 789                                 return 0;
 790
 791                         ret = regmap_write_bits(pctl->regmap,
 792                                                 pctl->data->pri.x789.reg_drain,
 793                                                 BIT(pin), 0);
 794                         if (ret < 0)
 795                                 return ret;
 796
 797                         break;
 798
 799                 case PIN_CONFIG_OUTPUT:
 800                         ret = sx150x_gpio_direction_output(&pctl->gpio,
 801                                                            pin, arg);
 802                         if (ret < 0)
 803                                 return ret;
 804
 805                         break;
 806
 807                 default:
 808                         return -ENOTSUPP;
 809                 }
 810         } /* for each config */
 811
 812         return 0;
 813 }
 814
 815 static const struct pinconf_ops sx150x_pinconf_ops = {
 816         .pin_config_get = sx150x_pinconf_get,
 817         .pin_config_set = sx150x_pinconf_set,
 818         .is_generic = true,
 819 };
 820
 821 static const struct i2c_device_id sx150x_id[] = {
 822         {"sx1501q", (kernel_ulong_t) &sx1501q_device_data },
 823         {"sx1502q", (kernel_ulong_t) &sx1502q_device_data },
 824         {"sx1503q", (kernel_ulong_t) &sx1503q_device_data },
 825         {"sx1504q", (kernel_ulong_t) &sx1504q_device_data },
 826         {"sx1505q", (kernel_ulong_t) &sx1505q_device_data },
 827         {"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
 828         {"sx1507q", (kernel_ulong_t) &sx1507q_device_data },
 829         {"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
 830         {"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
 831         {}
 832 };
 833
 834 static const struct of_device_id sx150x_of_match[] = {
 835         { .compatible = "semtech,sx1501q", .data = &sx1501q_device_data },
 836         { .compatible = "semtech,sx1502q", .data = &sx1502q_device_data },
 837         { .compatible = "semtech,sx1503q", .data = &sx1503q_device_data },
 838         { .compatible = "semtech,sx1504q", .data = &sx1504q_device_data },
 839         { .compatible = "semtech,sx1505q", .data = &sx1505q_device_data },
 840         { .compatible = "semtech,sx1506q", .data = &sx1506q_device_data },
 841         { .compatible = "semtech,sx1507q", .data = &sx1507q_device_data },
 842         { .compatible = "semtech,sx1508q", .data = &sx1508q_device_data },
 843         { .compatible = "semtech,sx1509q", .data = &sx1509q_device_data },
 844         {},
 845 };
 846
 847 static int sx150x_reset(struct sx150x_pinctrl *pctl)
 848 {
 849         int err;
 850
 851         err = i2c_smbus_write_byte_data(pctl->client,
 852                                         pctl->data->pri.x789.reg_reset,
 853                                         SX150X_789_RESET_KEY1);
 854         if (err < 0)
 855                 return err;
 856
 857         err = i2c_smbus_write_byte_data(pctl->client,
 858                                         pctl->data->pri.x789.reg_reset,
 859                                         SX150X_789_RESET_KEY2);
 860         return err;
 861 }
 862
 863 static int sx150x_init_misc(struct sx150x_pinctrl *pctl)
 864 {
 865         u8 reg, value;
 866
 867         switch (pctl->data->model) {
 868         case SX150X_789:
 869                 reg   = pctl->data->pri.x789.reg_misc;
 870                 value = SX150X_789_REG_MISC_AUTOCLEAR_OFF;
 871                 break;
 872         case SX150X_456:
 873                 reg   = pctl->data->pri.x456.reg_advanced;
 874                 value = 0x00;
 875
 876                 /*
 877                  * Only SX1506 has RegAdvanced, SX1504/5 are expected
 878                  * to initialize this offset to zero
 879                  */
 880                 if (!reg)
 881                         return 0;
 882                 break;
 883         case SX150X_123:
 884                 reg   = pctl->data->pri.x123.reg_advanced;
 885                 value = 0x00;
 886                 break;
 887         default:
 888                 WARN(1, "Unknown chip model %d\n", pctl->data->model);
 889                 return -EINVAL;
 890         }
 891
 892         return regmap_write(pctl->regmap, reg, value);
 893 }
 894
 895 static int sx150x_init_hw(struct sx150x_pinctrl *pctl)
 896 {
 897         const u8 reg[] = {
 898                 [SX150X_789] = pctl->data->pri.x789.reg_polarity,
 899                 [SX150X_456] = pctl->data->pri.x456.reg_pld_mode,
 900                 [SX150X_123] = pctl->data->pri.x123.reg_pld_mode,
 901         };
 902         int err;
 903
 904         if (pctl->data->model == SX150X_789 &&
 905             of_property_read_bool(pctl->dev->of_node, "semtech,probe-reset")) {
 906                 err = sx150x_reset(pctl);
 907                 if (err < 0)
 908                         return err;
 909         }
 910
 911         err = sx150x_init_misc(pctl);
 912         if (err < 0)
 913                 return err;
 914
 915         /* Set all pins to work in normal mode */
 916         return regmap_write(pctl->regmap, reg[pctl->data->model], 0);
 917 }
 918
 919 static int sx150x_regmap_reg_width(struct sx150x_pinctrl *pctl,
 920                                    unsigned int reg)
 921 {
 922         const struct sx150x_device_data *data = pctl->data;
 923
 924         if (reg == data->reg_sense) {
 925                 /*
 926                  * RegSense packs two bits of configuration per GPIO,
 927                  * so we'd need to read twice as many bits as there
 928                  * are GPIO in our chip
 929                  */
 930                 return 2 * data->ngpios;
 931         } else if ((data->model == SX150X_789 &&
 932                     (reg == data->pri.x789.reg_misc ||
 933                      reg == data->pri.x789.reg_clock ||
 934                      reg == data->pri.x789.reg_reset))
 935                    ||
 936                    (data->model == SX150X_123 &&
 937                     reg == data->pri.x123.reg_advanced)
 938                    ||
 939                    (data->model == SX150X_456 &&
 940                     data->pri.x456.reg_advanced &&
 941                     reg == data->pri.x456.reg_advanced)) {
 942                 return 8;
 943         } else {
 944                 return data->ngpios;
 945         }
 946 }
 947
 948 static unsigned int sx150x_maybe_swizzle(struct sx150x_pinctrl *pctl,
 949                                          unsigned int reg, unsigned int val)
 950 {
 951         unsigned int a, b;
 952         const struct sx150x_device_data *data = pctl->data;
 953
 954         /*
 955          * Whereas SX1509 presents RegSense in a simple layout as such:
 956          *      reg     [ f f e e d d c c ]
 957          *      reg + 1 [ b b a a 9 9 8 8 ]
 958          *      reg + 2 [ 7 7 6 6 5 5 4 4 ]
 959          *      reg + 3 [ 3 3 2 2 1 1 0 0 ]
 960          *
 961          * SX1503 and SX1506 deviate from that data layout, instead storing
 962          * their contents as follows:
 963          *
 964          *      reg     [ f f e e d d c c ]
 965          *      reg + 1 [ 7 7 6 6 5 5 4 4 ]
 966          *      reg + 2 [ b b a a 9 9 8 8 ]
 967          *      reg + 3 [ 3 3 2 2 1 1 0 0 ]
 968          *
 969          * so, taking that into account, we swap two
 970          * inner bytes of a 4-byte result
 971          */
 972
 973         if (reg == data->reg_sense &&
 974             data->ngpios == 16 &&
 975             (data->model == SX150X_123 ||
 976              data->model == SX150X_456)) {
 977                 a = val & 0x00ff0000;
 978                 b = val & 0x0000ff00;
 979
 980                 val &= 0xff0000ff;
 981                 val |= b << 8;
 982                 val |= a >> 8;
 983         }
 984
 985         return val;
 986 }
 987
 988 /*
 989  * In order to mask the differences between 16 and 8 bit expander
 990  * devices we set up a sligthly ficticious regmap that pretends to be
 991  * a set of 32-bit (to accommodate RegSenseLow/RegSenseHigh
 992  * pair/quartet) registers and transparently reconstructs those
 993  * registers via multiple I2C/SMBus reads
 994  *
 995  * This way the rest of the driver code, interfacing with the chip via
 996  * regmap API, can work assuming that each GPIO pin is represented by
 997  * a group of bits at an offset proportional to GPIO number within a
 998  * given register.
 999  */
1000 static int sx150x_regmap_reg_read(void *context, unsigned int reg,
1001                                   unsigned int *result)
1002 {
1003         int ret, n;
1004         struct sx150x_pinctrl *pctl = context;
1005         struct i2c_client *i2c = pctl->client;
1006         const int width = sx150x_regmap_reg_width(pctl, reg);
1007         unsigned int idx, val;
1008
1009         /*
1010          * There are four potential cases covered by this function:
1011          *
1012          * 1) 8-pin chip, single configuration bit register
1013          *
1014          *      This is trivial the code below just needs to read:
1015          *              reg  [ 7 6 5 4 3 2 1 0 ]
1016          *
1017          * 2) 8-pin chip, double configuration bit register (RegSense)
1018          *
1019          *      The read will be done as follows:
1020          *              reg      [ 7 7 6 6 5 5 4 4 ]
1021          *              reg + 1  [ 3 3 2 2 1 1 0 0 ]
1022          *
1023          * 3) 16-pin chip, single configuration bit register
1024          *
1025          *      The read will be done as follows:
1026          *              reg     [ f e d c b a 9 8 ]
1027          *              reg + 1 [ 7 6 5 4 3 2 1 0 ]
1028          *
1029          * 4) 16-pin chip, double configuration bit register (RegSense)
1030          *
1031          *      The read will be done as follows:
1032          *              reg     [ f f e e d d c c ]
1033          *              reg + 1 [ b b a a 9 9 8 8 ]
1034          *              reg + 2 [ 7 7 6 6 5 5 4 4 ]
1035          *              reg + 3 [ 3 3 2 2 1 1 0 0 ]
1036          */
1037
1038         for (n = width, val = 0, idx = reg; n > 0; n -= 8, idx++) {
1039                 val <<= 8;
1040
1041                 ret = i2c_smbus_read_byte_data(i2c, idx);
1042                 if (ret < 0)
1043                         return ret;
1044
1045                 val |= ret;
1046         }
1047
1048         *result = sx150x_maybe_swizzle(pctl, reg, val);
1049
1050         return 0;
1051 }
1052
1053 static int sx150x_regmap_reg_write(void *context, unsigned int reg,
1054                                    unsigned int val)
1055 {
1056         int ret, n;
1057         struct sx150x_pinctrl *pctl = context;
1058         struct i2c_client *i2c = pctl->client;
1059         const int width = sx150x_regmap_reg_width(pctl, reg);
1060
1061         val = sx150x_maybe_swizzle(pctl, reg, val);
1062
1063         n = (width - 1) & ~7;
1064         do {
1065                 const u8 byte = (val >> n) & 0xff;
1066
1067                 ret = i2c_smbus_write_byte_data(i2c, reg, byte);
1068                 if (ret < 0)
1069                         return ret;
1070
1071                 reg++;
1072                 n -= 8;
1073         } while (n >= 0);
1074
1075         return 0;
1076 }
1077
1078 static bool sx150x_reg_volatile(struct device *dev, unsigned int reg)
1079 {
1080         struct sx150x_pinctrl *pctl = i2c_get_clientdata(to_i2c_client(dev));
1081
1082         return reg == pctl->data->reg_irq_src || reg == pctl->data->reg_data;
1083 }
1084
1085 static const struct regmap_config sx150x_regmap_config = {
1086         .reg_bits = 8,
1087         .val_bits = 32,
1088
1089         .cache_type = REGCACHE_RBTREE,
1090
1091         .reg_read = sx150x_regmap_reg_read,
1092         .reg_write = sx150x_regmap_reg_write,
1093
1094         .max_register = SX150X_MAX_REGISTER,
1095         .volatile_reg = sx150x_reg_volatile,
1096 };
1097
1098 static int sx150x_probe(struct i2c_client *client,
1099                         const struct i2c_device_id *id)
1100 {
1101         static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
1102                                      I2C_FUNC_SMBUS_WRITE_WORD_DATA;
1103         struct device *dev = &client->dev;
1104         struct sx150x_pinctrl *pctl;
1105         int ret;
1106
1107         if (!i2c_check_functionality(client->adapter, i2c_funcs))
1108                 return -ENOSYS;
1109
1110         pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL);
1111         if (!pctl)
1112                 return -ENOMEM;
1113
1114         i2c_set_clientdata(client, pctl);
1115
1116         pctl->dev = dev;
1117         pctl->client = client;
1118
1119         if (dev->of_node)
1120                 pctl->data = of_device_get_match_data(dev);
1121         else
1122                 pctl->data = (struct sx150x_device_data *)id->driver_data;
1123
1124         if (!pctl->data)
1125                 return -EINVAL;
1126
1127         pctl->regmap = devm_regmap_init(dev, NULL, pctl,
1128                                         &sx150x_regmap_config);
1129         if (IS_ERR(pctl->regmap)) {
1130                 ret = PTR_ERR(pctl->regmap);
1131                 dev_err(dev, "Failed to allocate register map: %d\n",
1132                         ret);
1133                 return ret;
1134         }
1135
1136         mutex_init(&pctl->lock);
1137
1138         ret = sx150x_init_hw(pctl);
1139         if (ret)
1140                 return ret;
1141
1142         /* Pinctrl_desc */
1143         pctl->pinctrl_desc.name = "sx150x-pinctrl";
1144         pctl->pinctrl_desc.pctlops = &sx150x_pinctrl_ops;
1145         pctl->pinctrl_desc.confops = &sx150x_pinconf_ops;
1146         pctl->pinctrl_desc.pins = pctl->data->pins;
1147         pctl->pinctrl_desc.npins = pctl->data->npins;
1148         pctl->pinctrl_desc.owner = THIS_MODULE;
1149
1150         ret = devm_pinctrl_register_and_init(dev, &pctl->pinctrl_desc,
1151                                              pctl, &pctl->pctldev);
1152         if (ret) {
1153                 dev_err(dev, "Failed to register pinctrl device\n");
1154                 return ret;
1155         }
1156
1157         /* Register GPIO controller */
1158         pctl->gpio.base = -1;
1159         pctl->gpio.ngpio = pctl->data->npins;
1160         pctl->gpio.get_direction = sx150x_gpio_get_direction;
1161         pctl->gpio.direction_input = sx150x_gpio_direction_input;
1162         pctl->gpio.direction_output = sx150x_gpio_direction_output;
1163         pctl->gpio.get = sx150x_gpio_get;
1164         pctl->gpio.set = sx150x_gpio_set;
1165         pctl->gpio.set_config = gpiochip_generic_config;
1166         pctl->gpio.parent = dev;
1167 #ifdef CONFIG_OF_GPIO
1168         pctl->gpio.of_node = dev->of_node;
1169 #endif
1170         pctl->gpio.can_sleep = true;
1171         pctl->gpio.label = devm_kstrdup(dev, client->name, GFP_KERNEL);
1172         if (!pctl->gpio.label)
1173                 return -ENOMEM;
1174
1175         /*
1176          * Setting multiple pins is not safe when all pins are not
1177          * handled by the same regmap register. The oscio pin (present
1178          * on the SX150X_789 chips) lives in its own register, so
1179          * would require locking that is not in place at this time.
1180          */
1181         if (pctl->data->model != SX150X_789)
1182                 pctl->gpio.set_multiple = sx150x_gpio_set_multiple;
1183
1184         /* Add Interrupt support if an irq is specified */
1185         if (client->irq > 0) {
1186                 struct gpio_irq_chip *girq;
1187
1188                 pctl->irq_chip.irq_mask = sx150x_irq_mask;
1189                 pctl->irq_chip.irq_unmask = sx150x_irq_unmask;
1190                 pctl->irq_chip.irq_set_type = sx150x_irq_set_type;
1191                 pctl->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
1192                 pctl->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
1193                 pctl->irq_chip.name = devm_kstrdup(dev, client->name,
1194                                                    GFP_KERNEL);
1195                 if (!pctl->irq_chip.name)
1196                         return -ENOMEM;
1197
1198                 pctl->irq.masked = ~0;
1199                 pctl->irq.sense = 0;
1200
1201                 /*
1202                  * Because sx150x_irq_threaded_fn invokes all of the
1203                  * nested interrupt handlers via handle_nested_irq,
1204                  * any "handler" assigned to struct gpio_irq_chip
1205                  * below is going to be ignored, so the choice of the
1206                  * function does not matter that much.
1207                  *
1208                  * We set it to handle_bad_irq to avoid confusion,
1209                  * plus it will be instantly noticeable if it is ever
1210                  * called (should not happen)
1211                  */
1212                 girq = &pctl->gpio.irq;
1213                 girq->chip = &pctl->irq_chip;
1214                 /* This will let us handle the parent IRQ in the driver */
1215                 girq->parent_handler = NULL;
1216                 girq->num_parents = 0;
1217                 girq->parents = NULL;
1218                 girq->default_type = IRQ_TYPE_NONE;
1219                 girq->handler = handle_bad_irq;
1220                 girq->threaded = true;
1221
1222                 ret = devm_request_threaded_irq(dev, client->irq, NULL,
1223                                                 sx150x_irq_thread_fn,
1224                                                 IRQF_ONESHOT | IRQF_SHARED |
1225                                                 IRQF_TRIGGER_FALLING,
1226                                                 pctl->irq_chip.name, pctl);
1227                 if (ret < 0)
1228                         return ret;
1229         }
1230
1231         ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl);
1232         if (ret)
1233                 return ret;
1234
1235         /*
1236          * Pin control functions need to be enabled AFTER registering the
1237          * GPIO chip because sx150x_pinconf_set() calls
1238          * sx150x_gpio_direction_output().
1239          */
1240         ret = pinctrl_enable(pctl->pctldev);
1241         if (ret) {
1242                 dev_err(dev, "Failed to enable pinctrl device\n");
1243                 return ret;
1244         }
1245
1246         ret = gpiochip_add_pin_range(&pctl->gpio, dev_name(dev),
1247                                      0, 0, pctl->data->npins);
1248         if (ret)
1249                 return ret;
1250
1251         return 0;
1252 }
1253
1254 static struct i2c_driver sx150x_driver = {
1255         .driver = {
1256                 .name = "sx150x-pinctrl",
1257                 .of_match_table = of_match_ptr(sx150x_of_match),
1258         },
1259         .probe    = sx150x_probe,
1260         .id_table = sx150x_id,
1261 };
1262
1263 static int __init sx150x_init(void)
1264 {
1265         return i2c_add_driver(&sx150x_driver);
1266 }
1267 subsys_initcall(sx150x_init);