1 # SPDX-License-Identifier: GPL-2.0
3 menu "DesignWare PCI Core Support"
11 depends on PCI_MSI_IRQ_DOMAIN
16 depends on PCI_ENDPOINT
22 config PCI_DRA7XX_HOST
23 bool "TI DRA7xx PCIe controller Host Mode"
24 depends on SOC_DRA7XX || COMPILE_TEST
25 depends on PCI_MSI_IRQ_DOMAIN
26 depends on OF && HAS_IOMEM && TI_PIPE3
31 Enables support for the PCIe controller in the DRA7xx SoC to work in
32 host mode. There are two instances of PCIe controller in DRA7xx.
33 This controller can work either as EP or RC. In order to enable
34 host-specific features PCI_DRA7XX_HOST must be selected and in order
35 to enable device-specific features PCI_DRA7XX_EP must be selected.
36 This uses the DesignWare core.
39 bool "TI DRA7xx PCIe controller Endpoint Mode"
40 depends on SOC_DRA7XX || COMPILE_TEST
41 depends on PCI_ENDPOINT
42 depends on OF && HAS_IOMEM && TI_PIPE3
46 Enables support for the PCIe controller in the DRA7xx SoC to work in
47 endpoint mode. There are two instances of PCIe controller in DRA7xx.
48 This controller can work either as EP or RC. In order to enable
49 host-specific features PCI_DRA7XX_HOST must be selected and in order
50 to enable device-specific features PCI_DRA7XX_EP must be selected.
51 This uses the DesignWare core.
56 config PCIE_DW_PLAT_HOST
57 bool "Platform bus based DesignWare PCIe Controller - Host mode"
58 depends on PCI && PCI_MSI_IRQ_DOMAIN
63 Enables support for the PCIe controller in the Designware IP to
64 work in host mode. There are two instances of PCIe controller in
66 This controller can work either as EP or RC. In order to enable
67 host-specific features PCIE_DW_PLAT_HOST must be selected and in
68 order to enable device-specific features PCI_DW_PLAT_EP must be
71 config PCIE_DW_PLAT_EP
72 bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
73 depends on PCI && PCI_MSI_IRQ_DOMAIN
74 depends on PCI_ENDPOINT
78 Enables support for the PCIe controller in the Designware IP to
79 work in endpoint mode. There are two instances of PCIe controller
81 This controller can work either as EP or RC. In order to enable
82 host-specific features PCIE_DW_PLAT_HOST must be selected and in
83 order to enable device-specific features PCI_DW_PLAT_EP must be
87 bool "Samsung Exynos PCIe controller"
88 depends on SOC_EXYNOS5440 || COMPILE_TEST
89 depends on PCI_MSI_IRQ_DOMAIN
93 bool "Freescale i.MX6 PCIe controller"
94 depends on SOC_IMX6Q || (ARM && COMPILE_TEST)
95 depends on PCI_MSI_IRQ_DOMAIN
99 bool "STMicroelectronics SPEAr PCIe controller"
100 depends on ARCH_SPEAR13XX || COMPILE_TEST
101 depends on PCI_MSI_IRQ_DOMAIN
104 Say Y here if you want PCIe support on SPEAr13XX SoCs.
107 bool "TI Keystone PCIe controller"
108 depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
109 depends on PCI_MSI_IRQ_DOMAIN
112 Say Y here if you want to enable PCI controller support on Keystone
113 SoCs. The PCI controller on Keystone is based on DesignWare hardware
114 and therefore the driver re-uses the DesignWare core functions to
115 implement the driver.
117 config PCI_LAYERSCAPE
118 bool "Freescale Layerscape PCIe controller"
119 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
120 depends on PCI_MSI_IRQ_DOMAIN
124 Say Y here if you want PCIe controller support on Layerscape SoCs.
127 depends on OF && (ARM64 || COMPILE_TEST)
128 bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
129 depends on PCI_MSI_IRQ_DOMAIN
131 select PCI_HOST_COMMON
133 Say Y here if you want PCIe controller support on HiSilicon
137 bool "Qualcomm PCIe controller"
138 depends on OF && (ARCH_QCOM || COMPILE_TEST)
139 depends on PCI_MSI_IRQ_DOMAIN
142 Say Y here to enable PCIe controller support on Qualcomm SoCs. The
143 PCIe controller uses the DesignWare core plus Qualcomm-specific
146 config PCIE_ARMADA_8K
147 bool "Marvell Armada-8K PCIe controller"
148 depends on ARCH_MVEBU || COMPILE_TEST
149 depends on PCI_MSI_IRQ_DOMAIN
152 Say Y here if you want to enable PCIe controller support on
153 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
154 DesignWare hardware and therefore the driver re-uses the
155 DesignWare core functions to implement the driver.
160 config PCIE_ARTPEC6_HOST
161 bool "Axis ARTPEC-6 PCIe controller Host Mode"
162 depends on MACH_ARTPEC6 || COMPILE_TEST
163 depends on PCI_MSI_IRQ_DOMAIN
167 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
168 host mode. This uses the DesignWare core.
170 config PCIE_ARTPEC6_EP
171 bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
172 depends on MACH_ARTPEC6 || COMPILE_TEST
173 depends on PCI_ENDPOINT
177 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
178 endpoint mode. This uses the DesignWare core.
181 depends on OF && (ARM64 || COMPILE_TEST)
182 bool "HiSilicon Kirin series SoCs PCIe controllers"
183 depends on PCI_MSI_IRQ_DOMAIN
186 Say Y here if you want PCIe controller support
187 on HiSilicon Kirin series SoCs.
190 bool "HiSilicon STB SoCs PCIe controllers"
191 depends on ARCH_HISI || COMPILE_TEST
192 depends on PCI_MSI_IRQ_DOMAIN
195 Say Y here if you want PCIe controller support on HiSilicon STB SoCs