1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
5 #include <linux/scatterlist.h>
6 #include <linux/memregion.h>
7 #include <linux/highmem.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/hash.h>
11 #include <linux/sort.h>
18 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
21 #include <linux/io-64-nonatomic-hi-lo.h>
23 static DEFINE_PER_CPU(int, flush_idx);
25 static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
26 struct nd_region_data *ndrd)
30 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
31 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
32 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
33 struct resource *res = &nvdimm->flush_wpq[i];
34 unsigned long pfn = PHYS_PFN(res->start);
35 void __iomem *flush_page;
37 /* check if flush hints share a page */
38 for (j = 0; j < i; j++) {
39 struct resource *res_j = &nvdimm->flush_wpq[j];
40 unsigned long pfn_j = PHYS_PFN(res_j->start);
47 flush_page = (void __iomem *) ((unsigned long)
48 ndrd_get_flush_wpq(ndrd, dimm, j)
51 flush_page = devm_nvdimm_ioremap(dev,
52 PFN_PHYS(pfn), PAGE_SIZE);
55 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
56 + (res->start & ~PAGE_MASK));
62 int nd_region_activate(struct nd_region *nd_region)
64 int i, j, num_flush = 0;
65 struct nd_region_data *ndrd;
66 struct device *dev = &nd_region->dev;
67 size_t flush_data_size = sizeof(void *);
69 nvdimm_bus_lock(&nd_region->dev);
70 for (i = 0; i < nd_region->ndr_mappings; i++) {
71 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
72 struct nvdimm *nvdimm = nd_mapping->nvdimm;
74 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
75 nvdimm_bus_unlock(&nd_region->dev);
79 /* at least one null hint slot per-dimm for the "no-hint" case */
80 flush_data_size += sizeof(void *);
81 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
82 if (!nvdimm->num_flush)
84 flush_data_size += nvdimm->num_flush * sizeof(void *);
86 nvdimm_bus_unlock(&nd_region->dev);
88 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
91 dev_set_drvdata(dev, ndrd);
96 ndrd->hints_shift = ilog2(num_flush);
97 for (i = 0; i < nd_region->ndr_mappings; i++) {
98 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
99 struct nvdimm *nvdimm = nd_mapping->nvdimm;
100 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
107 * Clear out entries that are duplicates. This should prevent the
110 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
111 /* ignore if NULL already */
112 if (!ndrd_get_flush_wpq(ndrd, i, 0))
115 for (j = i + 1; j < nd_region->ndr_mappings; j++)
116 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
117 ndrd_get_flush_wpq(ndrd, j, 0))
118 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
124 static void nd_region_release(struct device *dev)
126 struct nd_region *nd_region = to_nd_region(dev);
129 for (i = 0; i < nd_region->ndr_mappings; i++) {
130 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
131 struct nvdimm *nvdimm = nd_mapping->nvdimm;
133 put_device(&nvdimm->dev);
135 free_percpu(nd_region->lane);
136 if (!test_bit(ND_REGION_CXL, &nd_region->flags))
137 memregion_free(nd_region->id);
141 struct nd_region *to_nd_region(struct device *dev)
143 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
145 WARN_ON(dev->type->release != nd_region_release);
148 EXPORT_SYMBOL_GPL(to_nd_region);
150 struct device *nd_region_dev(struct nd_region *nd_region)
154 return &nd_region->dev;
156 EXPORT_SYMBOL_GPL(nd_region_dev);
158 void *nd_region_provider_data(struct nd_region *nd_region)
160 return nd_region->provider_data;
162 EXPORT_SYMBOL_GPL(nd_region_provider_data);
165 * nd_region_to_nstype() - region to an integer namespace type
166 * @nd_region: region-device to interrogate
168 * This is the 'nstype' attribute of a region as well, an input to the
169 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
170 * namespace devices with namespace drivers.
172 int nd_region_to_nstype(struct nd_region *nd_region)
174 if (is_memory(&nd_region->dev)) {
177 for (i = 0, label = 0; i < nd_region->ndr_mappings; i++) {
178 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
179 struct nvdimm *nvdimm = nd_mapping->nvdimm;
181 if (test_bit(NDD_LABELING, &nvdimm->flags))
185 return ND_DEVICE_NAMESPACE_PMEM;
187 return ND_DEVICE_NAMESPACE_IO;
192 EXPORT_SYMBOL(nd_region_to_nstype);
194 static unsigned long long region_size(struct nd_region *nd_region)
196 if (is_memory(&nd_region->dev)) {
197 return nd_region->ndr_size;
198 } else if (nd_region->ndr_mappings == 1) {
199 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
201 return nd_mapping->size;
207 static ssize_t size_show(struct device *dev,
208 struct device_attribute *attr, char *buf)
210 struct nd_region *nd_region = to_nd_region(dev);
212 return sprintf(buf, "%llu\n", region_size(nd_region));
214 static DEVICE_ATTR_RO(size);
216 static ssize_t deep_flush_show(struct device *dev,
217 struct device_attribute *attr, char *buf)
219 struct nd_region *nd_region = to_nd_region(dev);
222 * NOTE: in the nvdimm_has_flush() error case this attribute is
225 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
228 static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
229 const char *buf, size_t len)
232 int rc = strtobool(buf, &flush);
233 struct nd_region *nd_region = to_nd_region(dev);
239 rc = nvdimm_flush(nd_region, NULL);
245 static DEVICE_ATTR_RW(deep_flush);
247 static ssize_t mappings_show(struct device *dev,
248 struct device_attribute *attr, char *buf)
250 struct nd_region *nd_region = to_nd_region(dev);
252 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
254 static DEVICE_ATTR_RO(mappings);
256 static ssize_t nstype_show(struct device *dev,
257 struct device_attribute *attr, char *buf)
259 struct nd_region *nd_region = to_nd_region(dev);
261 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
263 static DEVICE_ATTR_RO(nstype);
265 static ssize_t set_cookie_show(struct device *dev,
266 struct device_attribute *attr, char *buf)
268 struct nd_region *nd_region = to_nd_region(dev);
269 struct nd_interleave_set *nd_set = nd_region->nd_set;
272 if (is_memory(dev) && nd_set)
273 /* pass, should be precluded by region_visible */;
278 * The cookie to show depends on which specification of the
279 * labels we are using. If there are not labels then default to
280 * the v1.1 namespace label cookie definition. To read all this
281 * data we need to wait for probing to settle.
284 nvdimm_bus_lock(dev);
285 wait_nvdimm_bus_probe_idle(dev);
286 if (nd_region->ndr_mappings) {
287 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
288 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
291 struct nd_namespace_index *nsindex;
293 nsindex = to_namespace_index(ndd, ndd->ns_current);
294 rc = sprintf(buf, "%#llx\n",
295 nd_region_interleave_set_cookie(nd_region,
299 nvdimm_bus_unlock(dev);
304 return sprintf(buf, "%#llx\n", nd_set->cookie1);
306 static DEVICE_ATTR_RO(set_cookie);
308 resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
310 resource_size_t available;
313 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
316 for (i = 0; i < nd_region->ndr_mappings; i++) {
317 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
318 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
320 /* if a dimm is disabled the available capacity is zero */
324 available += nd_pmem_available_dpa(nd_region, nd_mapping);
330 resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
332 resource_size_t avail = 0;
335 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
336 for (i = 0; i < nd_region->ndr_mappings; i++) {
337 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
339 avail = min_not_zero(avail, nd_pmem_max_contiguous_dpa(
340 nd_region, nd_mapping));
342 return avail * nd_region->ndr_mappings;
345 static ssize_t available_size_show(struct device *dev,
346 struct device_attribute *attr, char *buf)
348 struct nd_region *nd_region = to_nd_region(dev);
349 unsigned long long available = 0;
352 * Flush in-flight updates and grab a snapshot of the available
353 * size. Of course, this value is potentially invalidated the
354 * memory nvdimm_bus_lock() is dropped, but that's userspace's
355 * problem to not race itself.
358 nvdimm_bus_lock(dev);
359 wait_nvdimm_bus_probe_idle(dev);
360 available = nd_region_available_dpa(nd_region);
361 nvdimm_bus_unlock(dev);
364 return sprintf(buf, "%llu\n", available);
366 static DEVICE_ATTR_RO(available_size);
368 static ssize_t max_available_extent_show(struct device *dev,
369 struct device_attribute *attr, char *buf)
371 struct nd_region *nd_region = to_nd_region(dev);
372 unsigned long long available = 0;
375 nvdimm_bus_lock(dev);
376 wait_nvdimm_bus_probe_idle(dev);
377 available = nd_region_allocatable_dpa(nd_region);
378 nvdimm_bus_unlock(dev);
381 return sprintf(buf, "%llu\n", available);
383 static DEVICE_ATTR_RO(max_available_extent);
385 static ssize_t init_namespaces_show(struct device *dev,
386 struct device_attribute *attr, char *buf)
388 struct nd_region_data *ndrd = dev_get_drvdata(dev);
391 nvdimm_bus_lock(dev);
393 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
396 nvdimm_bus_unlock(dev);
400 static DEVICE_ATTR_RO(init_namespaces);
402 static ssize_t namespace_seed_show(struct device *dev,
403 struct device_attribute *attr, char *buf)
405 struct nd_region *nd_region = to_nd_region(dev);
408 nvdimm_bus_lock(dev);
409 if (nd_region->ns_seed)
410 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
412 rc = sprintf(buf, "\n");
413 nvdimm_bus_unlock(dev);
416 static DEVICE_ATTR_RO(namespace_seed);
418 static ssize_t btt_seed_show(struct device *dev,
419 struct device_attribute *attr, char *buf)
421 struct nd_region *nd_region = to_nd_region(dev);
424 nvdimm_bus_lock(dev);
425 if (nd_region->btt_seed)
426 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
428 rc = sprintf(buf, "\n");
429 nvdimm_bus_unlock(dev);
433 static DEVICE_ATTR_RO(btt_seed);
435 static ssize_t pfn_seed_show(struct device *dev,
436 struct device_attribute *attr, char *buf)
438 struct nd_region *nd_region = to_nd_region(dev);
441 nvdimm_bus_lock(dev);
442 if (nd_region->pfn_seed)
443 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
445 rc = sprintf(buf, "\n");
446 nvdimm_bus_unlock(dev);
450 static DEVICE_ATTR_RO(pfn_seed);
452 static ssize_t dax_seed_show(struct device *dev,
453 struct device_attribute *attr, char *buf)
455 struct nd_region *nd_region = to_nd_region(dev);
458 nvdimm_bus_lock(dev);
459 if (nd_region->dax_seed)
460 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
462 rc = sprintf(buf, "\n");
463 nvdimm_bus_unlock(dev);
467 static DEVICE_ATTR_RO(dax_seed);
469 static ssize_t read_only_show(struct device *dev,
470 struct device_attribute *attr, char *buf)
472 struct nd_region *nd_region = to_nd_region(dev);
474 return sprintf(buf, "%d\n", nd_region->ro);
477 static int revalidate_read_only(struct device *dev, void *data)
479 nd_device_notify(dev, NVDIMM_REVALIDATE_REGION);
483 static ssize_t read_only_store(struct device *dev,
484 struct device_attribute *attr, const char *buf, size_t len)
487 int rc = strtobool(buf, &ro);
488 struct nd_region *nd_region = to_nd_region(dev);
494 device_for_each_child(dev, NULL, revalidate_read_only);
497 static DEVICE_ATTR_RW(read_only);
499 static ssize_t align_show(struct device *dev,
500 struct device_attribute *attr, char *buf)
502 struct nd_region *nd_region = to_nd_region(dev);
504 return sprintf(buf, "%#lx\n", nd_region->align);
507 static ssize_t align_store(struct device *dev,
508 struct device_attribute *attr, const char *buf, size_t len)
510 struct nd_region *nd_region = to_nd_region(dev);
511 unsigned long val, dpa;
515 rc = kstrtoul(buf, 0, &val);
519 if (!nd_region->ndr_mappings)
523 * Ensure space-align is evenly divisible by the region
524 * interleave-width because the kernel typically has no facility
525 * to determine which DIMM(s), dimm-physical-addresses, would
526 * contribute to the tail capacity in system-physical-address
527 * space for the namespace.
529 dpa = div_u64_rem(val, nd_region->ndr_mappings, &remainder);
530 if (!is_power_of_2(dpa) || dpa < PAGE_SIZE
531 || val > region_size(nd_region) || remainder)
535 * Given that space allocation consults this value multiple
536 * times ensure it does not change for the duration of the
539 nvdimm_bus_lock(dev);
540 nd_region->align = val;
541 nvdimm_bus_unlock(dev);
545 static DEVICE_ATTR_RW(align);
547 static ssize_t region_badblocks_show(struct device *dev,
548 struct device_attribute *attr, char *buf)
550 struct nd_region *nd_region = to_nd_region(dev);
555 rc = badblocks_show(&nd_region->bb, buf, 0);
562 static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
564 static ssize_t resource_show(struct device *dev,
565 struct device_attribute *attr, char *buf)
567 struct nd_region *nd_region = to_nd_region(dev);
569 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
571 static DEVICE_ATTR_ADMIN_RO(resource);
573 static ssize_t persistence_domain_show(struct device *dev,
574 struct device_attribute *attr, char *buf)
576 struct nd_region *nd_region = to_nd_region(dev);
578 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
579 return sprintf(buf, "cpu_cache\n");
580 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
581 return sprintf(buf, "memory_controller\n");
583 return sprintf(buf, "\n");
585 static DEVICE_ATTR_RO(persistence_domain);
587 static struct attribute *nd_region_attributes[] = {
589 &dev_attr_align.attr,
590 &dev_attr_nstype.attr,
591 &dev_attr_mappings.attr,
592 &dev_attr_btt_seed.attr,
593 &dev_attr_pfn_seed.attr,
594 &dev_attr_dax_seed.attr,
595 &dev_attr_deep_flush.attr,
596 &dev_attr_read_only.attr,
597 &dev_attr_set_cookie.attr,
598 &dev_attr_available_size.attr,
599 &dev_attr_max_available_extent.attr,
600 &dev_attr_namespace_seed.attr,
601 &dev_attr_init_namespaces.attr,
602 &dev_attr_badblocks.attr,
603 &dev_attr_resource.attr,
604 &dev_attr_persistence_domain.attr,
608 static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
610 struct device *dev = container_of(kobj, typeof(*dev), kobj);
611 struct nd_region *nd_region = to_nd_region(dev);
612 struct nd_interleave_set *nd_set = nd_region->nd_set;
613 int type = nd_region_to_nstype(nd_region);
615 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
618 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
621 if (!is_memory(dev) && a == &dev_attr_badblocks.attr)
624 if (a == &dev_attr_resource.attr && !is_memory(dev))
627 if (a == &dev_attr_deep_flush.attr) {
628 int has_flush = nvdimm_has_flush(nd_region);
632 else if (has_flush == 0)
638 if (a == &dev_attr_persistence_domain.attr) {
639 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
640 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
645 if (a == &dev_attr_align.attr)
648 if (a != &dev_attr_set_cookie.attr
649 && a != &dev_attr_available_size.attr)
652 if (type == ND_DEVICE_NAMESPACE_PMEM &&
653 a == &dev_attr_available_size.attr)
655 else if (is_memory(dev) && nd_set)
661 static ssize_t mappingN(struct device *dev, char *buf, int n)
663 struct nd_region *nd_region = to_nd_region(dev);
664 struct nd_mapping *nd_mapping;
665 struct nvdimm *nvdimm;
667 if (n >= nd_region->ndr_mappings)
669 nd_mapping = &nd_region->mapping[n];
670 nvdimm = nd_mapping->nvdimm;
672 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
673 nd_mapping->start, nd_mapping->size,
674 nd_mapping->position);
677 #define REGION_MAPPING(idx) \
678 static ssize_t mapping##idx##_show(struct device *dev, \
679 struct device_attribute *attr, char *buf) \
681 return mappingN(dev, buf, idx); \
683 static DEVICE_ATTR_RO(mapping##idx)
686 * 32 should be enough for a while, even in the presence of socket
687 * interleave a 32-way interleave set is a degenerate case.
722 static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
724 struct device *dev = container_of(kobj, struct device, kobj);
725 struct nd_region *nd_region = to_nd_region(dev);
727 if (n < nd_region->ndr_mappings)
732 static struct attribute *mapping_attributes[] = {
733 &dev_attr_mapping0.attr,
734 &dev_attr_mapping1.attr,
735 &dev_attr_mapping2.attr,
736 &dev_attr_mapping3.attr,
737 &dev_attr_mapping4.attr,
738 &dev_attr_mapping5.attr,
739 &dev_attr_mapping6.attr,
740 &dev_attr_mapping7.attr,
741 &dev_attr_mapping8.attr,
742 &dev_attr_mapping9.attr,
743 &dev_attr_mapping10.attr,
744 &dev_attr_mapping11.attr,
745 &dev_attr_mapping12.attr,
746 &dev_attr_mapping13.attr,
747 &dev_attr_mapping14.attr,
748 &dev_attr_mapping15.attr,
749 &dev_attr_mapping16.attr,
750 &dev_attr_mapping17.attr,
751 &dev_attr_mapping18.attr,
752 &dev_attr_mapping19.attr,
753 &dev_attr_mapping20.attr,
754 &dev_attr_mapping21.attr,
755 &dev_attr_mapping22.attr,
756 &dev_attr_mapping23.attr,
757 &dev_attr_mapping24.attr,
758 &dev_attr_mapping25.attr,
759 &dev_attr_mapping26.attr,
760 &dev_attr_mapping27.attr,
761 &dev_attr_mapping28.attr,
762 &dev_attr_mapping29.attr,
763 &dev_attr_mapping30.attr,
764 &dev_attr_mapping31.attr,
768 static const struct attribute_group nd_mapping_attribute_group = {
769 .is_visible = mapping_visible,
770 .attrs = mapping_attributes,
773 static const struct attribute_group nd_region_attribute_group = {
774 .attrs = nd_region_attributes,
775 .is_visible = region_visible,
778 static const struct attribute_group *nd_region_attribute_groups[] = {
779 &nd_device_attribute_group,
780 &nd_region_attribute_group,
781 &nd_numa_attribute_group,
782 &nd_mapping_attribute_group,
786 static const struct device_type nd_pmem_device_type = {
788 .release = nd_region_release,
789 .groups = nd_region_attribute_groups,
792 static const struct device_type nd_volatile_device_type = {
793 .name = "nd_volatile",
794 .release = nd_region_release,
795 .groups = nd_region_attribute_groups,
798 bool is_nd_pmem(struct device *dev)
800 return dev ? dev->type == &nd_pmem_device_type : false;
803 bool is_nd_volatile(struct device *dev)
805 return dev ? dev->type == &nd_volatile_device_type : false;
808 u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
809 struct nd_namespace_index *nsindex)
811 struct nd_interleave_set *nd_set = nd_region->nd_set;
816 if (nsindex && __le16_to_cpu(nsindex->major) == 1
817 && __le16_to_cpu(nsindex->minor) == 1)
818 return nd_set->cookie1;
819 return nd_set->cookie2;
822 u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
824 struct nd_interleave_set *nd_set = nd_region->nd_set;
827 return nd_set->altcookie;
831 void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
833 struct nd_label_ent *label_ent, *e;
835 lockdep_assert_held(&nd_mapping->lock);
836 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
837 list_del(&label_ent->list);
843 * When a namespace is activated create new seeds for the next
844 * namespace, or namespace-personality to be configured.
846 void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev)
848 nvdimm_bus_lock(dev);
849 if (nd_region->ns_seed == dev) {
850 nd_region_create_ns_seed(nd_region);
851 } else if (is_nd_btt(dev)) {
852 struct nd_btt *nd_btt = to_nd_btt(dev);
854 if (nd_region->btt_seed == dev)
855 nd_region_create_btt_seed(nd_region);
856 if (nd_region->ns_seed == &nd_btt->ndns->dev)
857 nd_region_create_ns_seed(nd_region);
858 } else if (is_nd_pfn(dev)) {
859 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
861 if (nd_region->pfn_seed == dev)
862 nd_region_create_pfn_seed(nd_region);
863 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
864 nd_region_create_ns_seed(nd_region);
865 } else if (is_nd_dax(dev)) {
866 struct nd_dax *nd_dax = to_nd_dax(dev);
868 if (nd_region->dax_seed == dev)
869 nd_region_create_dax_seed(nd_region);
870 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
871 nd_region_create_ns_seed(nd_region);
873 nvdimm_bus_unlock(dev);
877 * nd_region_acquire_lane - allocate and lock a lane
878 * @nd_region: region id and number of lanes possible
880 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
881 * We optimize for the common case where there are 256 lanes, one
882 * per-cpu. For larger systems we need to lock to share lanes. For now
883 * this implementation assumes the cost of maintaining an allocator for
884 * free lanes is on the order of the lock hold time, so it implements a
885 * static lane = cpu % num_lanes mapping.
887 * In the case of a BTT instance on top of a BLK namespace a lane may be
888 * acquired recursively. We lock on the first instance.
890 * In the case of a BTT instance on top of PMEM, we only acquire a lane
891 * for the BTT metadata updates.
893 unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
895 unsigned int cpu, lane;
898 if (nd_region->num_lanes < nr_cpu_ids) {
899 struct nd_percpu_lane *ndl_lock, *ndl_count;
901 lane = cpu % nd_region->num_lanes;
902 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
903 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
904 if (ndl_count->count++ == 0)
905 spin_lock(&ndl_lock->lock);
911 EXPORT_SYMBOL(nd_region_acquire_lane);
913 void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
915 if (nd_region->num_lanes < nr_cpu_ids) {
916 unsigned int cpu = get_cpu();
917 struct nd_percpu_lane *ndl_lock, *ndl_count;
919 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
920 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
921 if (--ndl_count->count == 0)
922 spin_unlock(&ndl_lock->lock);
927 EXPORT_SYMBOL(nd_region_release_lane);
930 * PowerPC requires this alignment for memremap_pages(). All other archs
931 * should be ok with SUBSECTION_SIZE (see memremap_compat_align()).
933 #define MEMREMAP_COMPAT_ALIGN_MAX SZ_16M
935 static unsigned long default_align(struct nd_region *nd_region)
941 align = MEMREMAP_COMPAT_ALIGN_MAX;
942 if (nd_region->ndr_size < MEMREMAP_COMPAT_ALIGN_MAX)
945 mappings = max_t(u16, 1, nd_region->ndr_mappings);
946 div_u64_rem(align, mappings, &remainder);
953 static struct lock_class_key nvdimm_region_key;
955 static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
956 struct nd_region_desc *ndr_desc,
957 const struct device_type *dev_type, const char *caller)
959 struct nd_region *nd_region;
964 for (i = 0; i < ndr_desc->num_mappings; i++) {
965 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
966 struct nvdimm *nvdimm = mapping->nvdimm;
968 if ((mapping->start | mapping->size) % PAGE_SIZE) {
969 dev_err(&nvdimm_bus->dev,
970 "%s: %s mapping%d is not %ld aligned\n",
971 caller, dev_name(&nvdimm->dev), i, PAGE_SIZE);
975 if (test_bit(NDD_UNARMED, &nvdimm->flags))
981 kzalloc(struct_size(nd_region, mapping, ndr_desc->num_mappings),
986 /* CXL pre-assigns memregion ids before creating nvdimm regions */
987 if (test_bit(ND_REGION_CXL, &ndr_desc->flags)) {
988 nd_region->id = ndr_desc->memregion;
990 nd_region->id = memregion_alloc(GFP_KERNEL);
991 if (nd_region->id < 0)
995 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
996 if (!nd_region->lane)
999 for (i = 0; i < nr_cpu_ids; i++) {
1000 struct nd_percpu_lane *ndl;
1002 ndl = per_cpu_ptr(nd_region->lane, i);
1003 spin_lock_init(&ndl->lock);
1007 for (i = 0; i < ndr_desc->num_mappings; i++) {
1008 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1009 struct nvdimm *nvdimm = mapping->nvdimm;
1011 nd_region->mapping[i].nvdimm = nvdimm;
1012 nd_region->mapping[i].start = mapping->start;
1013 nd_region->mapping[i].size = mapping->size;
1014 nd_region->mapping[i].position = mapping->position;
1015 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1016 mutex_init(&nd_region->mapping[i].lock);
1018 get_device(&nvdimm->dev);
1020 nd_region->ndr_mappings = ndr_desc->num_mappings;
1021 nd_region->provider_data = ndr_desc->provider_data;
1022 nd_region->nd_set = ndr_desc->nd_set;
1023 nd_region->num_lanes = ndr_desc->num_lanes;
1024 nd_region->flags = ndr_desc->flags;
1026 nd_region->numa_node = ndr_desc->numa_node;
1027 nd_region->target_node = ndr_desc->target_node;
1028 ida_init(&nd_region->ns_ida);
1029 ida_init(&nd_region->btt_ida);
1030 ida_init(&nd_region->pfn_ida);
1031 ida_init(&nd_region->dax_ida);
1032 dev = &nd_region->dev;
1033 dev_set_name(dev, "region%d", nd_region->id);
1034 dev->parent = &nvdimm_bus->dev;
1035 dev->type = dev_type;
1036 dev->groups = ndr_desc->attr_groups;
1037 dev->of_node = ndr_desc->of_node;
1038 nd_region->ndr_size = resource_size(ndr_desc->res);
1039 nd_region->ndr_start = ndr_desc->res->start;
1040 nd_region->align = default_align(nd_region);
1041 if (ndr_desc->flush)
1042 nd_region->flush = ndr_desc->flush;
1044 nd_region->flush = NULL;
1046 device_initialize(dev);
1047 lockdep_set_class(&dev->mutex, &nvdimm_region_key);
1048 nd_device_register(dev);
1053 if (!test_bit(ND_REGION_CXL, &ndr_desc->flags))
1054 memregion_free(nd_region->id);
1060 struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1061 struct nd_region_desc *ndr_desc)
1063 ndr_desc->num_lanes = ND_MAX_LANES;
1064 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1067 EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1069 struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1070 struct nd_region_desc *ndr_desc)
1072 ndr_desc->num_lanes = ND_MAX_LANES;
1073 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1076 EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
1078 void nvdimm_region_delete(struct nd_region *nd_region)
1081 nd_device_unregister(&nd_region->dev, ND_SYNC);
1083 EXPORT_SYMBOL_GPL(nvdimm_region_delete);
1085 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1089 if (!nd_region->flush)
1090 rc = generic_nvdimm_flush(nd_region);
1092 if (nd_region->flush(nd_region, bio))
1099 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1100 * @nd_region: interleaved pmem region
1102 int generic_nvdimm_flush(struct nd_region *nd_region)
1104 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
1108 * Try to encourage some diversity in flush hint addresses
1109 * across cpus assuming a limited number of flush hints.
1111 idx = this_cpu_read(flush_idx);
1112 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
1115 * The pmem_wmb() is needed to 'sfence' all
1116 * previous writes such that they are architecturally visible for
1117 * the platform buffer flush. Note that we've already arranged for pmem
1118 * writes to avoid the cache via memcpy_flushcache(). The final
1119 * wmb() ensures ordering for the NVDIMM flush write.
1122 for (i = 0; i < nd_region->ndr_mappings; i++)
1123 if (ndrd_get_flush_wpq(ndrd, i, 0))
1124 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
1129 EXPORT_SYMBOL_GPL(nvdimm_flush);
1132 * nvdimm_has_flush - determine write flushing requirements
1133 * @nd_region: interleaved pmem region
1135 * Returns 1 if writes require flushing
1136 * Returns 0 if writes do not require flushing
1137 * Returns -ENXIO if flushing capability can not be determined
1139 int nvdimm_has_flush(struct nd_region *nd_region)
1143 /* no nvdimm or pmem api == flushing capability unknown */
1144 if (nd_region->ndr_mappings == 0
1145 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
1148 /* Test if an explicit flush function is defined */
1149 if (test_bit(ND_REGION_ASYNC, &nd_region->flags) && nd_region->flush)
1152 /* Test if any flush hints for the region are available */
1153 for (i = 0; i < nd_region->ndr_mappings; i++) {
1154 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1155 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1157 /* flush hints present / available */
1158 if (nvdimm->num_flush)
1163 * The platform defines dimm devices without hints nor explicit flush,
1164 * assume platform persistence mechanism like ADR
1168 EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1170 int nvdimm_has_cache(struct nd_region *nd_region)
1172 return is_nd_pmem(&nd_region->dev) &&
1173 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
1175 EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1177 bool is_nvdimm_sync(struct nd_region *nd_region)
1179 if (is_nd_volatile(&nd_region->dev))
1182 return is_nd_pmem(&nd_region->dev) &&
1183 !test_bit(ND_REGION_ASYNC, &nd_region->flags);
1185 EXPORT_SYMBOL_GPL(is_nvdimm_sync);
1187 struct conflict_context {
1188 struct nd_region *nd_region;
1189 resource_size_t start, size;
1192 static int region_conflict(struct device *dev, void *data)
1194 struct nd_region *nd_region;
1195 struct conflict_context *ctx = data;
1196 resource_size_t res_end, region_end, region_start;
1198 if (!is_memory(dev))
1201 nd_region = to_nd_region(dev);
1202 if (nd_region == ctx->nd_region)
1205 res_end = ctx->start + ctx->size;
1206 region_start = nd_region->ndr_start;
1207 region_end = region_start + nd_region->ndr_size;
1208 if (ctx->start >= region_start && ctx->start < region_end)
1210 if (res_end > region_start && res_end <= region_end)
1215 int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1216 resource_size_t size)
1218 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1219 struct conflict_context ctx = {
1220 .nd_region = nd_region,
1225 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);