drivers/net/wireless/mediatek/mt76/mt7615/pci_mac.c

   1 // SPDX-License-Identifier: ISC
   2 /* Copyright (C) 2020 MediaTek Inc.
   3  *
   4  * Author: Ryder Lee <ryder.lee@mediatek.com>
   5  *         Roy Luo <royluo@google.com>
   6  *         Felix Fietkau <nbd@nbd.name>
   7  *         Lorenzo Bianconi <lorenzo@kernel.org>
   8  */
   9
  10 #include <linux/etherdevice.h>
  11 #include <linux/timekeeping.h>
  12
  13 #include "mt7615.h"
  14 #include "../dma.h"
  15 #include "mac.h"
  16
  17 static void
  18 mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info,
  19                     void *txp_ptr, u32 id)
  20 {
  21         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data;
  22         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
  23         struct ieee80211_key_conf *key = info->control.hw_key;
  24         struct ieee80211_vif *vif = info->control.vif;
  25         struct mt76_connac_fw_txp *txp = txp_ptr;
  26         u8 *rept_wds_wcid = (u8 *)&txp->rept_wds_wcid;
  27         int nbuf = tx_info->nbuf - 1;
  28         int i;
  29
  30         for (i = 0; i < nbuf; i++) {
  31                 txp->buf[i] = cpu_to_le32(tx_info->buf[i + 1].addr);
  32                 txp->len[i] = cpu_to_le16(tx_info->buf[i + 1].len);
  33         }
  34         txp->nbuf = nbuf;
  35
  36         /* pass partial skb header to fw */
  37         tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp);
  38         tx_info->buf[1].len = MT_CT_PARSE_LEN;
  39         tx_info->buf[1].skip_unmap = true;
  40         tx_info->nbuf = MT_CT_DMA_BUF_NUM;
  41
  42         txp->flags = cpu_to_le16(MT_CT_INFO_APPLY_TXD);
  43
  44         if (!key)
  45                 txp->flags |= cpu_to_le16(MT_CT_INFO_NONE_CIPHER_FRAME);
  46
  47         if (ieee80211_is_mgmt(hdr->frame_control))
  48                 txp->flags |= cpu_to_le16(MT_CT_INFO_MGMT_FRAME);
  49
  50         if (vif) {
  51                 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
  52
  53                 txp->bss_idx = mvif->idx;
  54         }
  55
  56         txp->token = cpu_to_le16(id);
  57         *rept_wds_wcid = 0xff;
  58 }
  59
  60 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
  61                           enum mt76_txq_id qid, struct mt76_wcid *wcid,
  62                           struct ieee80211_sta *sta,
  63                           struct mt76_tx_info *tx_info)
  64 {
  65         struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
  66         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
  67         struct ieee80211_key_conf *key = info->control.hw_key;
  68         int pid, id;
  69         u8 *txwi = (u8 *)txwi_ptr;
  70         struct mt76_txwi_cache *t;
  71         struct mt7615_sta *msta;
  72         void *txp;
  73
  74         msta = wcid ? container_of(wcid, struct mt7615_sta, wcid) : NULL;
  75         if (!wcid)
  76                 wcid = &dev->mt76.global_wcid;
  77
  78         if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) && msta) {
  79                 struct mt7615_phy *phy = &dev->phy;
  80
  81                 if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && mdev->phy2)
  82                         phy = mdev->phy2->priv;
  83
  84                 spin_lock_bh(&dev->mt76.lock);
  85                 mt7615_mac_set_rates(phy, msta, &info->control.rates[0],
  86                                      msta->rates);
  87                 spin_unlock_bh(&dev->mt76.lock);
  88         }
  89
  90         t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size);
  91         t->skb = tx_info->skb;
  92
  93         id = mt76_token_get(mdev, &t);
  94         if (id < 0)
  95                 return id;
  96
  97         pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);
  98         mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta,
  99                               pid, key, false);
 100
 101         txp = txwi + MT_TXD_SIZE;
 102         memset(txp, 0, sizeof(struct mt76_connac_txp_common));
 103         if (is_mt7615(&dev->mt76))
 104                 mt7615_write_fw_txp(dev, tx_info, txp, id);
 105         else
 106                 mt76_connac_write_hw_txp(mdev, tx_info, txp, id);
 107
 108         tx_info->skb = DMA_DUMMY_DATA;
 109
 110         return 0;
 111 }
 112
 113 void mt7615_dma_reset(struct mt7615_dev *dev)
 114 {
 115         int i;
 116
 117         mt76_clear(dev, MT_WPDMA_GLO_CFG,
 118                    MT_WPDMA_GLO_CFG_RX_DMA_EN | MT_WPDMA_GLO_CFG_TX_DMA_EN |
 119                    MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
 120
 121         usleep_range(1000, 2000);
 122
 123         for (i = 0; i < __MT_TXQ_MAX; i++)
 124                 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);
 125
 126         for (i = 0; i < __MT_MCUQ_MAX; i++)
 127                 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);
 128
 129         mt76_for_each_q_rx(&dev->mt76, i)
 130                 mt76_queue_rx_reset(dev, i);
 131
 132         mt76_tx_status_check(&dev->mt76, true);
 133
 134         mt7615_dma_start(dev);
 135 }
 136 EXPORT_SYMBOL_GPL(mt7615_dma_reset);
 137
 138 static void
 139 mt7615_hif_int_event_trigger(struct mt7615_dev *dev, u8 event)
 140 {
 141         u32 reg = MT_MCU_INT_EVENT;
 142
 143         if (is_mt7663(&dev->mt76))
 144                 reg = MT7663_MCU_INT_EVENT;
 145
 146         mt76_wr(dev, reg, event);
 147
 148         mt7622_trigger_hif_int(dev, true);
 149         mt7622_trigger_hif_int(dev, false);
 150 }
 151
 152 static bool
 153 mt7615_wait_reset_state(struct mt7615_dev *dev, u32 state)
 154 {
 155         bool ret;
 156
 157         ret = wait_event_timeout(dev->reset_wait,
 158                                  (READ_ONCE(dev->reset_state) & state),
 159                                  MT7615_RESET_TIMEOUT);
 160         WARN(!ret, "Timeout waiting for MCU reset state %x\n", state);
 161         return ret;
 162 }
 163
 164 static void
 165 mt7615_update_vif_beacon(void *priv, u8 *mac, struct ieee80211_vif *vif)
 166 {
 167         struct ieee80211_hw *hw = priv;
 168         struct mt7615_dev *dev = mt7615_hw_dev(hw);
 169
 170         switch (vif->type) {
 171         case NL80211_IFTYPE_MESH_POINT:
 172         case NL80211_IFTYPE_ADHOC:
 173         case NL80211_IFTYPE_AP:
 174                 mt7615_mcu_add_beacon(dev, hw, vif,
 175                                       vif->bss_conf.enable_beacon);
 176                 break;
 177         default:
 178                 break;
 179         }
 180 }
 181
 182 static void
 183 mt7615_update_beacons(struct mt7615_dev *dev)
 184 {
 185         ieee80211_iterate_active_interfaces(dev->mt76.hw,
 186                 IEEE80211_IFACE_ITER_RESUME_ALL,
 187                 mt7615_update_vif_beacon, dev->mt76.hw);
 188
 189         if (!dev->mt76.phy2)
 190                 return;
 191
 192         ieee80211_iterate_active_interfaces(dev->mt76.phy2->hw,
 193                 IEEE80211_IFACE_ITER_RESUME_ALL,
 194                 mt7615_update_vif_beacon, dev->mt76.phy2->hw);
 195 }
 196
 197 void mt7615_mac_reset_work(struct work_struct *work)
 198 {
 199         struct mt7615_phy *phy2;
 200         struct mt76_phy *ext_phy;
 201         struct mt7615_dev *dev;
 202         unsigned long timeout;
 203         int i;
 204
 205         dev = container_of(work, struct mt7615_dev, reset_work);
 206         ext_phy = dev->mt76.phy2;
 207         phy2 = ext_phy ? ext_phy->priv : NULL;
 208
 209         if (!(READ_ONCE(dev->reset_state) & MT_MCU_CMD_STOP_PDMA))
 210                 return;
 211
 212         ieee80211_stop_queues(mt76_hw(dev));
 213         if (ext_phy)
 214                 ieee80211_stop_queues(ext_phy->hw);
 215
 216         set_bit(MT76_RESET, &dev->mphy.state);
 217         set_bit(MT76_MCU_RESET, &dev->mphy.state);
 218         wake_up(&dev->mt76.mcu.wait);
 219         cancel_delayed_work_sync(&dev->mphy.mac_work);
 220         del_timer_sync(&dev->phy.roc_timer);
 221         cancel_work_sync(&dev->phy.roc_work);
 222         if (phy2) {
 223                 set_bit(MT76_RESET, &phy2->mt76->state);
 224                 cancel_delayed_work_sync(&phy2->mt76->mac_work);
 225                 del_timer_sync(&phy2->roc_timer);
 226                 cancel_work_sync(&phy2->roc_work);
 227         }
 228
 229         /* lock/unlock all queues to ensure that no tx is pending */
 230         mt76_txq_schedule_all(&dev->mphy);
 231         if (ext_phy)
 232                 mt76_txq_schedule_all(ext_phy);
 233
 234         mt76_worker_disable(&dev->mt76.tx_worker);
 235         mt76_for_each_q_rx(&dev->mt76, i)
 236                 napi_disable(&dev->mt76.napi[i]);
 237         napi_disable(&dev->mt76.tx_napi);
 238
 239         mt7615_mutex_acquire(dev);
 240
 241         mt7615_hif_int_event_trigger(dev, MT_MCU_INT_EVENT_PDMA_STOPPED);
 242
 243         if (mt7615_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) {
 244                 mt7615_dma_reset(dev);
 245
 246                 mt7615_tx_token_put(dev);
 247                 idr_init(&dev->mt76.token);
 248
 249                 mt76_wr(dev, MT_WPDMA_MEM_RNG_ERR, 0);
 250
 251                 mt7615_hif_int_event_trigger(dev, MT_MCU_INT_EVENT_PDMA_INIT);
 252                 mt7615_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);
 253         }
 254
 255         clear_bit(MT76_MCU_RESET, &dev->mphy.state);
 256         clear_bit(MT76_RESET, &dev->mphy.state);
 257         if (phy2)
 258                 clear_bit(MT76_RESET, &phy2->mt76->state);
 259
 260         mt76_worker_enable(&dev->mt76.tx_worker);
 261
 262         local_bh_disable();
 263         napi_enable(&dev->mt76.tx_napi);
 264         napi_schedule(&dev->mt76.tx_napi);
 265
 266         mt76_for_each_q_rx(&dev->mt76, i) {
 267                 napi_enable(&dev->mt76.napi[i]);
 268                 napi_schedule(&dev->mt76.napi[i]);
 269         }
 270         local_bh_enable();
 271
 272         ieee80211_wake_queues(mt76_hw(dev));
 273         if (ext_phy)
 274                 ieee80211_wake_queues(ext_phy->hw);
 275
 276         mt7615_hif_int_event_trigger(dev, MT_MCU_INT_EVENT_RESET_DONE);
 277         mt7615_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
 278
 279         mt7615_update_beacons(dev);
 280
 281         mt7615_mutex_release(dev);
 282
 283         timeout = mt7615_get_macwork_timeout(dev);
 284         ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work,
 285                                      timeout);
 286         if (phy2)
 287                 ieee80211_queue_delayed_work(ext_phy->hw,
 288                                              &phy2->mt76->mac_work, timeout);
 289
 290 }