drivers/net/wireless/mediatek/mt76/mt7615/init.c

   1 // SPDX-License-Identifier: ISC
   2 /* Copyright (C) 2019 MediaTek Inc.
   3  *
   4  * Author: Roy Luo <royluo@google.com>
   5  *         Ryder Lee <ryder.lee@mediatek.com>
   6  *         Felix Fietkau <nbd@nbd.name>
   7  *         Lorenzo Bianconi <lorenzo@kernel.org>
   8  */
   9
  10 #include <linux/etherdevice.h>
  11 #include "mt7615.h"
  12 #include "mac.h"
  13 #include "mcu.h"
  14 #include "eeprom.h"
  15
  16 static void
  17 mt7615_phy_init(struct mt7615_dev *dev)
  18 {
  19         /* disable rf low power beacon mode */
  20         mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
  21         mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
  22 }
  23
  24 static void
  25 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
  26 {
  27         u32 val;
  28
  29         if (!chain)
  30                 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
  31         else
  32                 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
  33
  34         /* enable band 0/1 clk */
  35         mt76_set(dev, MT_CFG_CCR, val);
  36
  37         mt76_rmw(dev, MT_TMAC_TRCR(chain),
  38                  MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
  39                  FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
  40                  FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
  41
  42         mt76_wr(dev, MT_AGG_ACR(chain),
  43                 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
  44                 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
  45                 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
  46
  47         mt76_wr(dev, MT_AGG_ARUCR(chain),
  48                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
  49                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
  50                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
  51                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
  52                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
  53                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
  54                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
  55                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
  56
  57         mt76_wr(dev, MT_AGG_ARDCR(chain),
  58                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
  59                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
  60                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
  61                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
  62                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
  63                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
  64                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
  65                 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
  66
  67         mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
  68         if (!mt7615_firmware_offload(dev)) {
  69                 u32 mask, set;
  70
  71                 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
  72                        MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
  73                        MT_DMA_RCFR0_MCU_RX_CTL_BAR |
  74                        MT_DMA_RCFR0_MCU_RX_BYPASS |
  75                        MT_DMA_RCFR0_RX_DROPPED_UCAST |
  76                        MT_DMA_RCFR0_RX_DROPPED_MCAST;
  77                 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
  78                       FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
  79                 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
  80         }
  81 }
  82
  83 static void
  84 mt7615_mac_init(struct mt7615_dev *dev)
  85 {
  86         int i;
  87
  88         mt7615_init_mac_chain(dev, 0);
  89
  90         mt76_rmw_field(dev, MT_TMAC_CTCR0,
  91                        MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
  92         mt76_rmw_field(dev, MT_TMAC_CTCR0,
  93                        MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
  94         mt76_rmw(dev, MT_TMAC_CTCR0,
  95                  MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
  96                  MT_TMAC_CTCR0_INS_DDLMT_EN,
  97                  MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
  98                  MT_TMAC_CTCR0_INS_DDLMT_EN);
  99
 100         mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
 101         mt7615_mac_set_scs(&dev->phy, true);
 102
 103         mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
 104                  MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
 105
 106         mt76_wr(dev, MT_AGG_ARCR,
 107                 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
 108                 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
 109                 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
 110                 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
 111
 112         for (i = 0; i < MT7615_WTBL_SIZE; i++)
 113                 mt7615_mac_wtbl_update(dev, i,
 114                                        MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
 115
 116         mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
 117         mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
 118
 119         mt76_wr(dev, MT_DMA_DCR0,
 120                 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
 121                 MT_DMA_DCR0_RX_VEC_DROP | MT_DMA_DCR0_DAMSDU_EN |
 122                 MT_DMA_DCR0_RX_HDR_TRANS_EN);
 123         /* disable TDLS filtering */
 124         mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
 125         mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
 126         if (is_mt7663(&dev->mt76)) {
 127                 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
 128                 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
 129         } else {
 130                 mt7615_init_mac_chain(dev, 1);
 131         }
 132         mt7615_mcu_set_rx_hdr_trans_blacklist(dev);
 133 }
 134
 135 static void
 136 mt7615_check_offload_capability(struct mt7615_dev *dev)
 137 {
 138         struct ieee80211_hw *hw = mt76_hw(dev);
 139         struct wiphy *wiphy = hw->wiphy;
 140
 141         if (mt7615_firmware_offload(dev)) {
 142                 ieee80211_hw_set(hw, SUPPORTS_PS);
 143                 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
 144
 145                 wiphy->max_remain_on_channel_duration = 5000;
 146                 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
 147                                    NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
 148                                    WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
 149                                    NL80211_FEATURE_P2P_GO_CTWIN |
 150                                    NL80211_FEATURE_P2P_GO_OPPPS;
 151         } else {
 152                 dev->ops->hw_scan = NULL;
 153                 dev->ops->cancel_hw_scan = NULL;
 154                 dev->ops->sched_scan_start = NULL;
 155                 dev->ops->sched_scan_stop = NULL;
 156                 dev->ops->set_rekey_data = NULL;
 157                 dev->ops->remain_on_channel = NULL;
 158                 dev->ops->cancel_remain_on_channel = NULL;
 159
 160                 wiphy->max_sched_scan_plan_interval = 0;
 161                 wiphy->max_sched_scan_ie_len = 0;
 162                 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
 163                 wiphy->max_sched_scan_ssids = 0;
 164                 wiphy->max_match_sets = 0;
 165                 wiphy->max_sched_scan_reqs = 0;
 166         }
 167 }
 168
 169 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
 170 {
 171         flush_work(&dev->mcu_work);
 172
 173         return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
 174 }
 175 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
 176
 177 #define CCK_RATE(_idx, _rate) {                                         \
 178         .bitrate = _rate,                                               \
 179         .flags = IEEE80211_RATE_SHORT_PREAMBLE,                         \
 180         .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx),                    \
 181         .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)),        \
 182 }
 183
 184 #define OFDM_RATE(_idx, _rate) {                                        \
 185         .bitrate = _rate,                                               \
 186         .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx),                   \
 187         .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx),             \
 188 }
 189
 190 struct ieee80211_rate mt7615_rates[] = {
 191         CCK_RATE(0, 10),
 192         CCK_RATE(1, 20),
 193         CCK_RATE(2, 55),
 194         CCK_RATE(3, 110),
 195         OFDM_RATE(11, 60),
 196         OFDM_RATE(15, 90),
 197         OFDM_RATE(10, 120),
 198         OFDM_RATE(14, 180),
 199         OFDM_RATE(9,  240),
 200         OFDM_RATE(13, 360),
 201         OFDM_RATE(8,  480),
 202         OFDM_RATE(12, 540),
 203 };
 204 EXPORT_SYMBOL_GPL(mt7615_rates);
 205
 206 static const struct ieee80211_iface_limit if_limits[] = {
 207         {
 208                 .max = 1,
 209                 .types = BIT(NL80211_IFTYPE_ADHOC)
 210         }, {
 211                 .max = MT7615_MAX_INTERFACES,
 212                 .types = BIT(NL80211_IFTYPE_AP) |
 213 #ifdef CONFIG_MAC80211_MESH
 214                          BIT(NL80211_IFTYPE_MESH_POINT) |
 215 #endif
 216                          BIT(NL80211_IFTYPE_P2P_CLIENT) |
 217                          BIT(NL80211_IFTYPE_P2P_GO) |
 218                          BIT(NL80211_IFTYPE_STATION)
 219         }
 220 };
 221
 222 static const struct ieee80211_iface_combination if_comb_radar[] = {
 223         {
 224                 .limits = if_limits,
 225                 .n_limits = ARRAY_SIZE(if_limits),
 226                 .max_interfaces = MT7615_MAX_INTERFACES,
 227                 .num_different_channels = 1,
 228                 .beacon_int_infra_match = true,
 229                 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
 230                                        BIT(NL80211_CHAN_WIDTH_20) |
 231                                        BIT(NL80211_CHAN_WIDTH_40) |
 232                                        BIT(NL80211_CHAN_WIDTH_80) |
 233                                        BIT(NL80211_CHAN_WIDTH_160) |
 234                                        BIT(NL80211_CHAN_WIDTH_80P80),
 235         }
 236 };
 237
 238 static const struct ieee80211_iface_combination if_comb[] = {
 239         {
 240                 .limits = if_limits,
 241                 .n_limits = ARRAY_SIZE(if_limits),
 242                 .max_interfaces = MT7615_MAX_INTERFACES,
 243                 .num_different_channels = 1,
 244                 .beacon_int_infra_match = true,
 245         }
 246 };
 247
 248 void mt7615_init_txpower(struct mt7615_dev *dev,
 249                          struct ieee80211_supported_band *sband)
 250 {
 251         int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
 252         int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
 253         u8 *eep = (u8 *)dev->mt76.eeprom.data;
 254         enum nl80211_band band = sband->band;
 255         struct mt76_power_limits limits;
 256         u8 rate_val;
 257
 258         delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
 259         rate_val = eep[delta_idx];
 260         if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
 261             (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
 262                 delta += rate_val & MT_EE_RATE_POWER_MASK;
 263
 264         if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
 265                 target_chains = 1;
 266         else
 267                 target_chains = n_chains;
 268
 269         for (i = 0; i < sband->n_channels; i++) {
 270                 struct ieee80211_channel *chan = &sband->channels[i];
 271                 u8 target_power = 0;
 272                 int j;
 273
 274                 for (j = 0; j < target_chains; j++) {
 275                         int index;
 276
 277                         index = mt7615_eeprom_get_target_power_index(dev, chan, j);
 278                         if (index < 0)
 279                                 continue;
 280
 281                         target_power = max(target_power, eep[index]);
 282                 }
 283
 284                 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
 285                                                           &limits,
 286                                                           target_power);
 287                 target_power += delta;
 288                 target_power = DIV_ROUND_UP(target_power, 2);
 289                 chan->max_power = min_t(int, chan->max_reg_power,
 290                                         target_power);
 291                 chan->orig_mpwr = target_power;
 292         }
 293 }
 294 EXPORT_SYMBOL_GPL(mt7615_init_txpower);
 295
 296 void mt7615_init_work(struct mt7615_dev *dev)
 297 {
 298         mt7615_mcu_set_eeprom(dev);
 299         mt7615_mac_init(dev);
 300         mt7615_phy_init(dev);
 301         mt7615_mcu_del_wtbl_all(dev);
 302         mt7615_check_offload_capability(dev);
 303 }
 304 EXPORT_SYMBOL_GPL(mt7615_init_work);
 305
 306 static void
 307 mt7615_regd_notifier(struct wiphy *wiphy,
 308                      struct regulatory_request *request)
 309 {
 310         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
 311         struct mt7615_dev *dev = mt7615_hw_dev(hw);
 312         struct mt76_phy *mphy = hw->priv;
 313         struct mt7615_phy *phy = mphy->priv;
 314         struct cfg80211_chan_def *chandef = &mphy->chandef;
 315
 316         memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
 317         dev->mt76.region = request->dfs_region;
 318
 319         mt7615_init_txpower(dev, &mphy->sband_2g.sband);
 320         mt7615_init_txpower(dev, &mphy->sband_5g.sband);
 321
 322         mt7615_mutex_acquire(dev);
 323
 324         if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
 325                 mt7615_dfs_init_radar_detector(phy);
 326
 327         if (mt7615_firmware_offload(phy->dev)) {
 328                 mt76_connac_mcu_set_channel_domain(mphy);
 329                 mt76_connac_mcu_set_rate_txpower(mphy);
 330         }
 331
 332         mt7615_mutex_release(dev);
 333 }
 334
 335 static void
 336 mt7615_init_wiphy(struct ieee80211_hw *hw)
 337 {
 338         struct mt7615_phy *phy = mt7615_hw_phy(hw);
 339         struct wiphy *wiphy = hw->wiphy;
 340
 341         hw->queues = 4;
 342         hw->max_rates = 3;
 343         hw->max_report_rates = 7;
 344         hw->max_rate_tries = 11;
 345         hw->netdev_features = NETIF_F_RXCSUM;
 346
 347         hw->radiotap_timestamp.units_pos =
 348                 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
 349
 350         phy->slottime = 9;
 351
 352         hw->sta_data_size = sizeof(struct mt7615_sta);
 353         hw->vif_data_size = sizeof(struct mt7615_vif);
 354
 355         if (is_mt7663(&phy->dev->mt76)) {
 356                 wiphy->iface_combinations = if_comb;
 357                 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
 358         } else {
 359                 wiphy->iface_combinations = if_comb_radar;
 360                 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
 361         }
 362         wiphy->reg_notifier = mt7615_regd_notifier;
 363
 364         wiphy->max_sched_scan_plan_interval =
 365                 MT76_CONNAC_MAX_SCHED_SCAN_INTERVAL;
 366         wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
 367         wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
 368         wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
 369         wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
 370         wiphy->max_sched_scan_reqs = 1;
 371         wiphy->max_scan_ssids = 4;
 372
 373         wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
 374         wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
 375
 376         ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
 377         ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
 378         ieee80211_hw_set(hw, WANT_MONITOR_VIF);
 379         ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
 380
 381         if (is_mt7615(&phy->dev->mt76))
 382                 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
 383         else
 384                 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
 385
 386         phy->mt76->sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
 387         phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
 388         phy->mt76->sband_5g.sband.vht_cap.cap |=
 389                         IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
 390 }
 391
 392 static void
 393 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
 394 {
 395         dev->mphy.sband_5g.sband.vht_cap.cap &=
 396                         ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
 397                           IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
 398         if (dev->chainmask == 0xf)
 399                 dev->mphy.antenna_mask = dev->chainmask >> 2;
 400         else
 401                 dev->mphy.antenna_mask = dev->chainmask >> 1;
 402         dev->mphy.chainmask = dev->mphy.antenna_mask;
 403         dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
 404         dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
 405         mt76_set_stream_caps(&dev->mphy, true);
 406 }
 407
 408 static void
 409 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
 410 {
 411         dev->mphy.sband_5g.sband.vht_cap.cap |=
 412                         IEEE80211_VHT_CAP_SHORT_GI_160 |
 413                         IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
 414         dev->mphy.antenna_mask = dev->chainmask;
 415         dev->mphy.chainmask = dev->chainmask;
 416         dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
 417         dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
 418         mt76_set_stream_caps(&dev->mphy, true);
 419 }
 420
 421 int mt7615_register_ext_phy(struct mt7615_dev *dev)
 422 {
 423         struct mt7615_phy *phy = mt7615_ext_phy(dev);
 424         struct mt76_phy *mphy;
 425         int i, ret;
 426
 427         if (!is_mt7615(&dev->mt76))
 428                 return -EOPNOTSUPP;
 429
 430         if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
 431                 return -EINVAL;
 432
 433         if (phy)
 434                 return 0;
 435
 436         mt7615_cap_dbdc_enable(dev);
 437         mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops);
 438         if (!mphy)
 439                 return -ENOMEM;
 440
 441         phy = mphy->priv;
 442         phy->dev = dev;
 443         phy->mt76 = mphy;
 444         mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
 445         mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
 446         mt7615_init_wiphy(mphy->hw);
 447
 448         INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
 449         INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
 450         skb_queue_head_init(&phy->scan_event_list);
 451
 452         INIT_WORK(&phy->roc_work, mt7615_roc_work);
 453         timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
 454         init_waitqueue_head(&phy->roc_wait);
 455
 456         mt7615_mac_set_scs(phy, true);
 457
 458         /*
 459          * Make the secondary PHY MAC address local without overlapping with
 460          * the usual MAC address allocation scheme on multiple virtual interfaces
 461          */
 462         memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
 463                ETH_ALEN);
 464         mphy->macaddr[0] |= 2;
 465         mphy->macaddr[0] ^= BIT(7);
 466         mt76_eeprom_override(mphy);
 467
 468         /* second phy can only handle 5 GHz */
 469         mphy->cap.has_5ghz = true;
 470
 471         /* mt7615 second phy shares the same hw queues with the primary one */
 472         for (i = 0; i <= MT_TXQ_PSD ; i++)
 473                 mphy->q_tx[i] = dev->mphy.q_tx[i];
 474
 475         ret = mt76_register_phy(mphy, true, mt7615_rates,
 476                                 ARRAY_SIZE(mt7615_rates));
 477         if (ret)
 478                 ieee80211_free_hw(mphy->hw);
 479
 480         return ret;
 481 }
 482 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
 483
 484 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
 485 {
 486         struct mt7615_phy *phy = mt7615_ext_phy(dev);
 487         struct mt76_phy *mphy = dev->mt76.phy2;
 488
 489         if (!phy)
 490                 return;
 491
 492         mt7615_cap_dbdc_disable(dev);
 493         mt76_unregister_phy(mphy);
 494         ieee80211_free_hw(mphy->hw);
 495 }
 496 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
 497
 498 void mt7615_init_device(struct mt7615_dev *dev)
 499 {
 500         struct ieee80211_hw *hw = mt76_hw(dev);
 501
 502         dev->phy.dev = dev;
 503         dev->phy.mt76 = &dev->mt76.phy;
 504         dev->mt76.phy.priv = &dev->phy;
 505         dev->mt76.tx_worker.fn = mt7615_tx_worker;
 506
 507         INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
 508         INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
 509         spin_lock_init(&dev->pm.wake.lock);
 510         mutex_init(&dev->pm.mutex);
 511         init_waitqueue_head(&dev->pm.wait);
 512         spin_lock_init(&dev->pm.txq_lock);
 513         INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
 514         INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
 515         INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work);
 516         skb_queue_head_init(&dev->phy.scan_event_list);
 517         skb_queue_head_init(&dev->coredump.msg_list);
 518         INIT_LIST_HEAD(&dev->sta_poll_list);
 519         spin_lock_init(&dev->sta_poll_lock);
 520         init_waitqueue_head(&dev->reset_wait);
 521         init_waitqueue_head(&dev->phy.roc_wait);
 522
 523         INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
 524         timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
 525
 526         mt7615_init_wiphy(hw);
 527         dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
 528         dev->pm.stats.last_wake_event = jiffies;
 529         dev->pm.stats.last_doze_event = jiffies;
 530         mt7615_cap_dbdc_disable(dev);
 531         dev->phy.dfs_state = -1;
 532
 533 #ifdef CONFIG_NL80211_TESTMODE
 534         dev->mt76.test_ops = &mt7615_testmode_ops;
 535 #endif
 536 }
 537 EXPORT_SYMBOL_GPL(mt7615_init_device);