drivers/net/wireless/intel/iwlwifi/fw/dbg.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
   4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
   5  * Copyright (C) 2015-2017 Intel Deutschland GmbH
   6  */
   7 #include <linux/devcoredump.h>
   8 #include "iwl-drv.h"
   9 #include "runtime.h"
  10 #include "dbg.h"
  11 #include "debugfs.h"
  12 #include "iwl-io.h"
  13 #include "iwl-prph.h"
  14 #include "iwl-csr.h"
  15
  16 /**
  17  * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump
  18  *
  19  * @fwrt_ptr: pointer to the buffer coming from fwrt
  20  * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
  21  *      transport's data.
  22  * @trans_len: length of the valid data in trans_ptr
  23  * @fwrt_len: length of the valid data in fwrt_ptr
  24  */
  25 struct iwl_fw_dump_ptrs {
  26         struct iwl_trans_dump_data *trans_ptr;
  27         void *fwrt_ptr;
  28         u32 fwrt_len;
  29 };
  30
  31 #define RADIO_REG_MAX_READ 0x2ad
  32 static void iwl_read_radio_regs(struct iwl_fw_runtime *fwrt,
  33                                 struct iwl_fw_error_dump_data **dump_data)
  34 {
  35         u8 *pos = (void *)(*dump_data)->data;
  36         unsigned long flags;
  37         int i;
  38
  39         IWL_DEBUG_INFO(fwrt, "WRT radio registers dump\n");
  40
  41         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
  42                 return;
  43
  44         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RADIO_REG);
  45         (*dump_data)->len = cpu_to_le32(RADIO_REG_MAX_READ);
  46
  47         for (i = 0; i < RADIO_REG_MAX_READ; i++) {
  48                 u32 rd_cmd = RADIO_RSP_RD_CMD;
  49
  50                 rd_cmd |= i << RADIO_RSP_ADDR_POS;
  51                 iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
  52                 *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
  53
  54                 pos++;
  55         }
  56
  57         *dump_data = iwl_fw_error_next_data(*dump_data);
  58
  59         iwl_trans_release_nic_access(fwrt->trans, &flags);
  60 }
  61
  62 static void iwl_fwrt_dump_rxf(struct iwl_fw_runtime *fwrt,
  63                               struct iwl_fw_error_dump_data **dump_data,
  64                               int size, u32 offset, int fifo_num)
  65 {
  66         struct iwl_fw_error_dump_fifo *fifo_hdr;
  67         u32 *fifo_data;
  68         u32 fifo_len;
  69         int i;
  70
  71         fifo_hdr = (void *)(*dump_data)->data;
  72         fifo_data = (void *)fifo_hdr->data;
  73         fifo_len = size;
  74
  75         /* No need to try to read the data if the length is 0 */
  76         if (fifo_len == 0)
  77                 return;
  78
  79         /* Add a TLV for the RXF */
  80         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RXF);
  81         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
  82
  83         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
  84         fifo_hdr->available_bytes =
  85                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  86                                                 RXF_RD_D_SPACE + offset));
  87         fifo_hdr->wr_ptr =
  88                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  89                                                 RXF_RD_WR_PTR + offset));
  90         fifo_hdr->rd_ptr =
  91                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  92                                                 RXF_RD_RD_PTR + offset));
  93         fifo_hdr->fence_ptr =
  94                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  95                                                 RXF_RD_FENCE_PTR + offset));
  96         fifo_hdr->fence_mode =
  97                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  98                                                 RXF_SET_FENCE_MODE + offset));
  99
 100         /* Lock fence */
 101         iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offset, 0x1);
 102         /* Set fence pointer to the same place like WR pointer */
 103         iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offset, 0x1);
 104         /* Set fence offset */
 105         iwl_trans_write_prph(fwrt->trans,
 106                              RXF_LD_FENCE_OFFSET_ADDR + offset, 0x0);
 107
 108         /* Read FIFO */
 109         fifo_len /= sizeof(u32); /* Size in DWORDS */
 110         for (i = 0; i < fifo_len; i++)
 111                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 112                                                  RXF_FIFO_RD_FENCE_INC +
 113                                                  offset);
 114         *dump_data = iwl_fw_error_next_data(*dump_data);
 115 }
 116
 117 static void iwl_fwrt_dump_txf(struct iwl_fw_runtime *fwrt,
 118                               struct iwl_fw_error_dump_data **dump_data,
 119                               int size, u32 offset, int fifo_num)
 120 {
 121         struct iwl_fw_error_dump_fifo *fifo_hdr;
 122         u32 *fifo_data;
 123         u32 fifo_len;
 124         int i;
 125
 126         fifo_hdr = (void *)(*dump_data)->data;
 127         fifo_data = (void *)fifo_hdr->data;
 128         fifo_len = size;
 129
 130         /* No need to try to read the data if the length is 0 */
 131         if (fifo_len == 0)
 132                 return;
 133
 134         /* Add a TLV for the FIFO */
 135         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_TXF);
 136         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 137
 138         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 139         fifo_hdr->available_bytes =
 140                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 141                                                 TXF_FIFO_ITEM_CNT + offset));
 142         fifo_hdr->wr_ptr =
 143                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 144                                                 TXF_WR_PTR + offset));
 145         fifo_hdr->rd_ptr =
 146                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 147                                                 TXF_RD_PTR + offset));
 148         fifo_hdr->fence_ptr =
 149                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 150                                                 TXF_FENCE_PTR + offset));
 151         fifo_hdr->fence_mode =
 152                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 153                                                 TXF_LOCK_FENCE + offset));
 154
 155         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
 156         iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offset,
 157                              TXF_WR_PTR + offset);
 158
 159         /* Dummy-read to advance the read pointer to the head */
 160         iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
 161
 162         /* Read FIFO */
 163         fifo_len /= sizeof(u32); /* Size in DWORDS */
 164         for (i = 0; i < fifo_len; i++)
 165                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 166                                                   TXF_READ_MODIFY_DATA +
 167                                                   offset);
 168         *dump_data = iwl_fw_error_next_data(*dump_data);
 169 }
 170
 171 static void iwl_fw_dump_rxf(struct iwl_fw_runtime *fwrt,
 172                             struct iwl_fw_error_dump_data **dump_data)
 173 {
 174         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 175         unsigned long flags;
 176
 177         IWL_DEBUG_INFO(fwrt, "WRT RX FIFO dump\n");
 178
 179         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
 180                 return;
 181
 182         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF)) {
 183                 /* Pull RXF1 */
 184                 iwl_fwrt_dump_rxf(fwrt, dump_data,
 185                                   cfg->lmac[0].rxfifo1_size, 0, 0);
 186                 /* Pull RXF2 */
 187                 iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->rxfifo2_size,
 188                                   RXF_DIFF_FROM_PREV +
 189                                   fwrt->trans->trans_cfg->umac_prph_offset, 1);
 190                 /* Pull LMAC2 RXF1 */
 191                 if (fwrt->smem_cfg.num_lmacs > 1)
 192                         iwl_fwrt_dump_rxf(fwrt, dump_data,
 193                                           cfg->lmac[1].rxfifo1_size,
 194                                           LMAC2_PRPH_OFFSET, 2);
 195         }
 196
 197         iwl_trans_release_nic_access(fwrt->trans, &flags);
 198 }
 199
 200 static void iwl_fw_dump_txf(struct iwl_fw_runtime *fwrt,
 201                             struct iwl_fw_error_dump_data **dump_data)
 202 {
 203         struct iwl_fw_error_dump_fifo *fifo_hdr;
 204         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 205         u32 *fifo_data;
 206         u32 fifo_len;
 207         unsigned long flags;
 208         int i, j;
 209
 210         IWL_DEBUG_INFO(fwrt, "WRT TX FIFO dump\n");
 211
 212         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
 213                 return;
 214
 215         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF)) {
 216                 /* Pull TXF data from LMAC1 */
 217                 for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
 218                         /* Mark the number of TXF we're pulling now */
 219                         iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM, i);
 220                         iwl_fwrt_dump_txf(fwrt, dump_data,
 221                                           cfg->lmac[0].txfifo_size[i], 0, i);
 222                 }
 223
 224                 /* Pull TXF data from LMAC2 */
 225                 if (fwrt->smem_cfg.num_lmacs > 1) {
 226                         for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries;
 227                              i++) {
 228                                 /* Mark the number of TXF we're pulling now */
 229                                 iwl_trans_write_prph(fwrt->trans,
 230                                                      TXF_LARC_NUM +
 231                                                      LMAC2_PRPH_OFFSET, i);
 232                                 iwl_fwrt_dump_txf(fwrt, dump_data,
 233                                                   cfg->lmac[1].txfifo_size[i],
 234                                                   LMAC2_PRPH_OFFSET,
 235                                                   i + cfg->num_txfifo_entries);
 236                         }
 237                 }
 238         }
 239
 240         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 241             fw_has_capa(&fwrt->fw->ucode_capa,
 242                         IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 243                 /* Pull UMAC internal TXF data from all TXFs */
 244                 for (i = 0;
 245                      i < ARRAY_SIZE(fwrt->smem_cfg.internal_txfifo_size);
 246                      i++) {
 247                         fifo_hdr = (void *)(*dump_data)->data;
 248                         fifo_data = (void *)fifo_hdr->data;
 249                         fifo_len = fwrt->smem_cfg.internal_txfifo_size[i];
 250
 251                         /* No need to try to read the data if the length is 0 */
 252                         if (fifo_len == 0)
 253                                 continue;
 254
 255                         /* Add a TLV for the internal FIFOs */
 256                         (*dump_data)->type =
 257                                 cpu_to_le32(IWL_FW_ERROR_DUMP_INTERNAL_TXF);
 258                         (*dump_data)->len =
 259                                 cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 260
 261                         fifo_hdr->fifo_num = cpu_to_le32(i);
 262
 263                         /* Mark the number of TXF we're pulling now */
 264                         iwl_trans_write_prph(fwrt->trans, TXF_CPU2_NUM, i +
 265                                 fwrt->smem_cfg.num_txfifo_entries);
 266
 267                         fifo_hdr->available_bytes =
 268                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 269                                                                 TXF_CPU2_FIFO_ITEM_CNT));
 270                         fifo_hdr->wr_ptr =
 271                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 272                                                                 TXF_CPU2_WR_PTR));
 273                         fifo_hdr->rd_ptr =
 274                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 275                                                                 TXF_CPU2_RD_PTR));
 276                         fifo_hdr->fence_ptr =
 277                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 278                                                                 TXF_CPU2_FENCE_PTR));
 279                         fifo_hdr->fence_mode =
 280                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 281                                                                 TXF_CPU2_LOCK_FENCE));
 282
 283                         /* Set TXF_CPU2_READ_MODIFY_ADDR to TXF_CPU2_WR_PTR */
 284                         iwl_trans_write_prph(fwrt->trans,
 285                                              TXF_CPU2_READ_MODIFY_ADDR,
 286                                              TXF_CPU2_WR_PTR);
 287
 288                         /* Dummy-read to advance the read pointer to head */
 289                         iwl_trans_read_prph(fwrt->trans,
 290                                             TXF_CPU2_READ_MODIFY_DATA);
 291
 292                         /* Read FIFO */
 293                         fifo_len /= sizeof(u32); /* Size in DWORDS */
 294                         for (j = 0; j < fifo_len; j++)
 295                                 fifo_data[j] =
 296                                         iwl_trans_read_prph(fwrt->trans,
 297                                                             TXF_CPU2_READ_MODIFY_DATA);
 298                         *dump_data = iwl_fw_error_next_data(*dump_data);
 299                 }
 300         }
 301
 302         iwl_trans_release_nic_access(fwrt->trans, &flags);
 303 }
 304
 305 #define IWL8260_ICCM_OFFSET             0x44000 /* Only for B-step */
 306 #define IWL8260_ICCM_LEN                0xC000 /* Only for B-step */
 307
 308 struct iwl_prph_range {
 309         u32 start, end;
 310 };
 311
 312 static const struct iwl_prph_range iwl_prph_dump_addr_comm[] = {
 313         { .start = 0x00a00000, .end = 0x00a00000 },
 314         { .start = 0x00a0000c, .end = 0x00a00024 },
 315         { .start = 0x00a0002c, .end = 0x00a0003c },
 316         { .start = 0x00a00410, .end = 0x00a00418 },
 317         { .start = 0x00a00420, .end = 0x00a00420 },
 318         { .start = 0x00a00428, .end = 0x00a00428 },
 319         { .start = 0x00a00430, .end = 0x00a0043c },
 320         { .start = 0x00a00444, .end = 0x00a00444 },
 321         { .start = 0x00a004c0, .end = 0x00a004cc },
 322         { .start = 0x00a004d8, .end = 0x00a004d8 },
 323         { .start = 0x00a004e0, .end = 0x00a004f0 },
 324         { .start = 0x00a00840, .end = 0x00a00840 },
 325         { .start = 0x00a00850, .end = 0x00a00858 },
 326         { .start = 0x00a01004, .end = 0x00a01008 },
 327         { .start = 0x00a01010, .end = 0x00a01010 },
 328         { .start = 0x00a01018, .end = 0x00a01018 },
 329         { .start = 0x00a01024, .end = 0x00a01024 },
 330         { .start = 0x00a0102c, .end = 0x00a01034 },
 331         { .start = 0x00a0103c, .end = 0x00a01040 },
 332         { .start = 0x00a01048, .end = 0x00a01094 },
 333         { .start = 0x00a01c00, .end = 0x00a01c20 },
 334         { .start = 0x00a01c58, .end = 0x00a01c58 },
 335         { .start = 0x00a01c7c, .end = 0x00a01c7c },
 336         { .start = 0x00a01c28, .end = 0x00a01c54 },
 337         { .start = 0x00a01c5c, .end = 0x00a01c5c },
 338         { .start = 0x00a01c60, .end = 0x00a01cdc },
 339         { .start = 0x00a01ce0, .end = 0x00a01d0c },
 340         { .start = 0x00a01d18, .end = 0x00a01d20 },
 341         { .start = 0x00a01d2c, .end = 0x00a01d30 },
 342         { .start = 0x00a01d40, .end = 0x00a01d5c },
 343         { .start = 0x00a01d80, .end = 0x00a01d80 },
 344         { .start = 0x00a01d98, .end = 0x00a01d9c },
 345         { .start = 0x00a01da8, .end = 0x00a01da8 },
 346         { .start = 0x00a01db8, .end = 0x00a01df4 },
 347         { .start = 0x00a01dc0, .end = 0x00a01dfc },
 348         { .start = 0x00a01e00, .end = 0x00a01e2c },
 349         { .start = 0x00a01e40, .end = 0x00a01e60 },
 350         { .start = 0x00a01e68, .end = 0x00a01e6c },
 351         { .start = 0x00a01e74, .end = 0x00a01e74 },
 352         { .start = 0x00a01e84, .end = 0x00a01e90 },
 353         { .start = 0x00a01e9c, .end = 0x00a01ec4 },
 354         { .start = 0x00a01ed0, .end = 0x00a01ee0 },
 355         { .start = 0x00a01f00, .end = 0x00a01f1c },
 356         { .start = 0x00a01f44, .end = 0x00a01ffc },
 357         { .start = 0x00a02000, .end = 0x00a02048 },
 358         { .start = 0x00a02068, .end = 0x00a020f0 },
 359         { .start = 0x00a02100, .end = 0x00a02118 },
 360         { .start = 0x00a02140, .end = 0x00a0214c },
 361         { .start = 0x00a02168, .end = 0x00a0218c },
 362         { .start = 0x00a021c0, .end = 0x00a021c0 },
 363         { .start = 0x00a02400, .end = 0x00a02410 },
 364         { .start = 0x00a02418, .end = 0x00a02420 },
 365         { .start = 0x00a02428, .end = 0x00a0242c },
 366         { .start = 0x00a02434, .end = 0x00a02434 },
 367         { .start = 0x00a02440, .end = 0x00a02460 },
 368         { .start = 0x00a02468, .end = 0x00a024b0 },
 369         { .start = 0x00a024c8, .end = 0x00a024cc },
 370         { .start = 0x00a02500, .end = 0x00a02504 },
 371         { .start = 0x00a0250c, .end = 0x00a02510 },
 372         { .start = 0x00a02540, .end = 0x00a02554 },
 373         { .start = 0x00a02580, .end = 0x00a025f4 },
 374         { .start = 0x00a02600, .end = 0x00a0260c },
 375         { .start = 0x00a02648, .end = 0x00a02650 },
 376         { .start = 0x00a02680, .end = 0x00a02680 },
 377         { .start = 0x00a026c0, .end = 0x00a026d0 },
 378         { .start = 0x00a02700, .end = 0x00a0270c },
 379         { .start = 0x00a02804, .end = 0x00a02804 },
 380         { .start = 0x00a02818, .end = 0x00a0281c },
 381         { .start = 0x00a02c00, .end = 0x00a02db4 },
 382         { .start = 0x00a02df4, .end = 0x00a02fb0 },
 383         { .start = 0x00a03000, .end = 0x00a03014 },
 384         { .start = 0x00a0301c, .end = 0x00a0302c },
 385         { .start = 0x00a03034, .end = 0x00a03038 },
 386         { .start = 0x00a03040, .end = 0x00a03048 },
 387         { .start = 0x00a03060, .end = 0x00a03068 },
 388         { .start = 0x00a03070, .end = 0x00a03074 },
 389         { .start = 0x00a0307c, .end = 0x00a0307c },
 390         { .start = 0x00a03080, .end = 0x00a03084 },
 391         { .start = 0x00a0308c, .end = 0x00a03090 },
 392         { .start = 0x00a03098, .end = 0x00a03098 },
 393         { .start = 0x00a030a0, .end = 0x00a030a0 },
 394         { .start = 0x00a030a8, .end = 0x00a030b4 },
 395         { .start = 0x00a030bc, .end = 0x00a030bc },
 396         { .start = 0x00a030c0, .end = 0x00a0312c },
 397         { .start = 0x00a03c00, .end = 0x00a03c5c },
 398         { .start = 0x00a04400, .end = 0x00a04454 },
 399         { .start = 0x00a04460, .end = 0x00a04474 },
 400         { .start = 0x00a044c0, .end = 0x00a044ec },
 401         { .start = 0x00a04500, .end = 0x00a04504 },
 402         { .start = 0x00a04510, .end = 0x00a04538 },
 403         { .start = 0x00a04540, .end = 0x00a04548 },
 404         { .start = 0x00a04560, .end = 0x00a0457c },
 405         { .start = 0x00a04590, .end = 0x00a04598 },
 406         { .start = 0x00a045c0, .end = 0x00a045f4 },
 407 };
 408
 409 static const struct iwl_prph_range iwl_prph_dump_addr_9000[] = {
 410         { .start = 0x00a05c00, .end = 0x00a05c18 },
 411         { .start = 0x00a05400, .end = 0x00a056e8 },
 412         { .start = 0x00a08000, .end = 0x00a098bc },
 413         { .start = 0x00a02400, .end = 0x00a02758 },
 414         { .start = 0x00a04764, .end = 0x00a0476c },
 415         { .start = 0x00a04770, .end = 0x00a04774 },
 416         { .start = 0x00a04620, .end = 0x00a04624 },
 417 };
 418
 419 static const struct iwl_prph_range iwl_prph_dump_addr_22000[] = {
 420         { .start = 0x00a00000, .end = 0x00a00000 },
 421         { .start = 0x00a0000c, .end = 0x00a00024 },
 422         { .start = 0x00a0002c, .end = 0x00a00034 },
 423         { .start = 0x00a0003c, .end = 0x00a0003c },
 424         { .start = 0x00a00410, .end = 0x00a00418 },
 425         { .start = 0x00a00420, .end = 0x00a00420 },
 426         { .start = 0x00a00428, .end = 0x00a00428 },
 427         { .start = 0x00a00430, .end = 0x00a0043c },
 428         { .start = 0x00a00444, .end = 0x00a00444 },
 429         { .start = 0x00a00840, .end = 0x00a00840 },
 430         { .start = 0x00a00850, .end = 0x00a00858 },
 431         { .start = 0x00a01004, .end = 0x00a01008 },
 432         { .start = 0x00a01010, .end = 0x00a01010 },
 433         { .start = 0x00a01018, .end = 0x00a01018 },
 434         { .start = 0x00a01024, .end = 0x00a01024 },
 435         { .start = 0x00a0102c, .end = 0x00a01034 },
 436         { .start = 0x00a0103c, .end = 0x00a01040 },
 437         { .start = 0x00a01048, .end = 0x00a01050 },
 438         { .start = 0x00a01058, .end = 0x00a01058 },
 439         { .start = 0x00a01060, .end = 0x00a01070 },
 440         { .start = 0x00a0108c, .end = 0x00a0108c },
 441         { .start = 0x00a01c20, .end = 0x00a01c28 },
 442         { .start = 0x00a01d10, .end = 0x00a01d10 },
 443         { .start = 0x00a01e28, .end = 0x00a01e2c },
 444         { .start = 0x00a01e60, .end = 0x00a01e60 },
 445         { .start = 0x00a01e80, .end = 0x00a01e80 },
 446         { .start = 0x00a01ea0, .end = 0x00a01ea0 },
 447         { .start = 0x00a02000, .end = 0x00a0201c },
 448         { .start = 0x00a02024, .end = 0x00a02024 },
 449         { .start = 0x00a02040, .end = 0x00a02048 },
 450         { .start = 0x00a020c0, .end = 0x00a020e0 },
 451         { .start = 0x00a02400, .end = 0x00a02404 },
 452         { .start = 0x00a0240c, .end = 0x00a02414 },
 453         { .start = 0x00a0241c, .end = 0x00a0243c },
 454         { .start = 0x00a02448, .end = 0x00a024bc },
 455         { .start = 0x00a024c4, .end = 0x00a024cc },
 456         { .start = 0x00a02508, .end = 0x00a02508 },
 457         { .start = 0x00a02510, .end = 0x00a02514 },
 458         { .start = 0x00a0251c, .end = 0x00a0251c },
 459         { .start = 0x00a0252c, .end = 0x00a0255c },
 460         { .start = 0x00a02564, .end = 0x00a025a0 },
 461         { .start = 0x00a025a8, .end = 0x00a025b4 },
 462         { .start = 0x00a025c0, .end = 0x00a025c0 },
 463         { .start = 0x00a025e8, .end = 0x00a025f4 },
 464         { .start = 0x00a02c08, .end = 0x00a02c18 },
 465         { .start = 0x00a02c2c, .end = 0x00a02c38 },
 466         { .start = 0x00a02c68, .end = 0x00a02c78 },
 467         { .start = 0x00a03000, .end = 0x00a03000 },
 468         { .start = 0x00a03010, .end = 0x00a03014 },
 469         { .start = 0x00a0301c, .end = 0x00a0302c },
 470         { .start = 0x00a03034, .end = 0x00a03038 },
 471         { .start = 0x00a03040, .end = 0x00a03044 },
 472         { .start = 0x00a03060, .end = 0x00a03068 },
 473         { .start = 0x00a03070, .end = 0x00a03070 },
 474         { .start = 0x00a0307c, .end = 0x00a03084 },
 475         { .start = 0x00a0308c, .end = 0x00a03090 },
 476         { .start = 0x00a03098, .end = 0x00a03098 },
 477         { .start = 0x00a030a0, .end = 0x00a030a0 },
 478         { .start = 0x00a030a8, .end = 0x00a030b4 },
 479         { .start = 0x00a030bc, .end = 0x00a030c0 },
 480         { .start = 0x00a030c8, .end = 0x00a030f4 },
 481         { .start = 0x00a03100, .end = 0x00a0312c },
 482         { .start = 0x00a03c00, .end = 0x00a03c5c },
 483         { .start = 0x00a04400, .end = 0x00a04454 },
 484         { .start = 0x00a04460, .end = 0x00a04474 },
 485         { .start = 0x00a044c0, .end = 0x00a044ec },
 486         { .start = 0x00a04500, .end = 0x00a04504 },
 487         { .start = 0x00a04510, .end = 0x00a04538 },
 488         { .start = 0x00a04540, .end = 0x00a04548 },
 489         { .start = 0x00a04560, .end = 0x00a04560 },
 490         { .start = 0x00a04570, .end = 0x00a0457c },
 491         { .start = 0x00a04590, .end = 0x00a04590 },
 492         { .start = 0x00a04598, .end = 0x00a04598 },
 493         { .start = 0x00a045c0, .end = 0x00a045f4 },
 494         { .start = 0x00a05c18, .end = 0x00a05c1c },
 495         { .start = 0x00a0c000, .end = 0x00a0c018 },
 496         { .start = 0x00a0c020, .end = 0x00a0c028 },
 497         { .start = 0x00a0c038, .end = 0x00a0c094 },
 498         { .start = 0x00a0c0c0, .end = 0x00a0c104 },
 499         { .start = 0x00a0c10c, .end = 0x00a0c118 },
 500         { .start = 0x00a0c150, .end = 0x00a0c174 },
 501         { .start = 0x00a0c17c, .end = 0x00a0c188 },
 502         { .start = 0x00a0c190, .end = 0x00a0c198 },
 503         { .start = 0x00a0c1a0, .end = 0x00a0c1a8 },
 504         { .start = 0x00a0c1b0, .end = 0x00a0c1b8 },
 505 };
 506
 507 static const struct iwl_prph_range iwl_prph_dump_addr_ax210[] = {
 508         { .start = 0x00d03c00, .end = 0x00d03c64 },
 509         { .start = 0x00d05c18, .end = 0x00d05c1c },
 510         { .start = 0x00d0c000, .end = 0x00d0c174 },
 511 };
 512
 513 static void iwl_read_prph_block(struct iwl_trans *trans, u32 start,
 514                                 u32 len_bytes, __le32 *data)
 515 {
 516         u32 i;
 517
 518         for (i = 0; i < len_bytes; i += 4)
 519                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
 520 }
 521
 522 static void iwl_dump_prph(struct iwl_fw_runtime *fwrt,
 523                           const struct iwl_prph_range *iwl_prph_dump_addr,
 524                           u32 range_len, void *ptr)
 525 {
 526         struct iwl_fw_error_dump_prph *prph;
 527         struct iwl_trans *trans = fwrt->trans;
 528         struct iwl_fw_error_dump_data **data =
 529                 (struct iwl_fw_error_dump_data **)ptr;
 530         unsigned long flags;
 531         u32 i;
 532
 533         if (!data)
 534                 return;
 535
 536         IWL_DEBUG_INFO(trans, "WRT PRPH dump\n");
 537
 538         if (!iwl_trans_grab_nic_access(trans, &flags))
 539                 return;
 540
 541         for (i = 0; i < range_len; i++) {
 542                 /* The range includes both boundaries */
 543                 int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
 544                          iwl_prph_dump_addr[i].start + 4;
 545
 546                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
 547                 (*data)->len = cpu_to_le32(sizeof(*prph) +
 548                                         num_bytes_in_chunk);
 549                 prph = (void *)(*data)->data;
 550                 prph->prph_start = cpu_to_le32(iwl_prph_dump_addr[i].start);
 551
 552                 iwl_read_prph_block(trans, iwl_prph_dump_addr[i].start,
 553                                     /* our range is inclusive, hence + 4 */
 554                                     iwl_prph_dump_addr[i].end -
 555                                     iwl_prph_dump_addr[i].start + 4,
 556                                     (void *)prph->data);
 557
 558                 *data = iwl_fw_error_next_data(*data);
 559         }
 560
 561         iwl_trans_release_nic_access(trans, &flags);
 562 }
 563
 564 /*
 565  * alloc_sgtable - allocates scallerlist table in the given size,
 566  * fills it with pages and returns it
 567  * @size: the size (in bytes) of the table
 568 */
 569 static struct scatterlist *alloc_sgtable(int size)
 570 {
 571         int alloc_size, nents, i;
 572         struct page *new_page;
 573         struct scatterlist *iter;
 574         struct scatterlist *table;
 575
 576         nents = DIV_ROUND_UP(size, PAGE_SIZE);
 577         table = kcalloc(nents, sizeof(*table), GFP_KERNEL);
 578         if (!table)
 579                 return NULL;
 580         sg_init_table(table, nents);
 581         iter = table;
 582         for_each_sg(table, iter, sg_nents(table), i) {
 583                 new_page = alloc_page(GFP_KERNEL);
 584                 if (!new_page) {
 585                         /* release all previous allocated pages in the table */
 586                         iter = table;
 587                         for_each_sg(table, iter, sg_nents(table), i) {
 588                                 new_page = sg_page(iter);
 589                                 if (new_page)
 590                                         __free_page(new_page);
 591                         }
 592                         kfree(table);
 593                         return NULL;
 594                 }
 595                 alloc_size = min_t(int, size, PAGE_SIZE);
 596                 size -= PAGE_SIZE;
 597                 sg_set_page(iter, new_page, alloc_size, 0);
 598         }
 599         return table;
 600 }
 601
 602 static void iwl_fw_get_prph_len(struct iwl_fw_runtime *fwrt,
 603                                 const struct iwl_prph_range *iwl_prph_dump_addr,
 604                                 u32 range_len, void *ptr)
 605 {
 606         u32 *prph_len = (u32 *)ptr;
 607         int i, num_bytes_in_chunk;
 608
 609         if (!prph_len)
 610                 return;
 611
 612         for (i = 0; i < range_len; i++) {
 613                 /* The range includes both boundaries */
 614                 num_bytes_in_chunk =
 615                         iwl_prph_dump_addr[i].end -
 616                         iwl_prph_dump_addr[i].start + 4;
 617
 618                 *prph_len += sizeof(struct iwl_fw_error_dump_data) +
 619                         sizeof(struct iwl_fw_error_dump_prph) +
 620                         num_bytes_in_chunk;
 621         }
 622 }
 623
 624 static void iwl_fw_prph_handler(struct iwl_fw_runtime *fwrt, void *ptr,
 625                                 void (*handler)(struct iwl_fw_runtime *,
 626                                                 const struct iwl_prph_range *,
 627                                                 u32, void *))
 628 {
 629         u32 range_len;
 630
 631         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
 632                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_ax210);
 633                 handler(fwrt, iwl_prph_dump_addr_ax210, range_len, ptr);
 634         } else if (fwrt->trans->trans_cfg->device_family >=
 635                    IWL_DEVICE_FAMILY_22000) {
 636                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_22000);
 637                 handler(fwrt, iwl_prph_dump_addr_22000, range_len, ptr);
 638         } else {
 639                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_comm);
 640                 handler(fwrt, iwl_prph_dump_addr_comm, range_len, ptr);
 641
 642                 if (fwrt->trans->trans_cfg->mq_rx_supported) {
 643                         range_len = ARRAY_SIZE(iwl_prph_dump_addr_9000);
 644                         handler(fwrt, iwl_prph_dump_addr_9000, range_len, ptr);
 645                 }
 646         }
 647 }
 648
 649 static void iwl_fw_dump_mem(struct iwl_fw_runtime *fwrt,
 650                             struct iwl_fw_error_dump_data **dump_data,
 651                             u32 len, u32 ofs, u32 type)
 652 {
 653         struct iwl_fw_error_dump_mem *dump_mem;
 654
 655         if (!len)
 656                 return;
 657
 658         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 659         (*dump_data)->len = cpu_to_le32(len + sizeof(*dump_mem));
 660         dump_mem = (void *)(*dump_data)->data;
 661         dump_mem->type = cpu_to_le32(type);
 662         dump_mem->offset = cpu_to_le32(ofs);
 663         iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
 664         *dump_data = iwl_fw_error_next_data(*dump_data);
 665
 666         IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n", dump_mem->type);
 667 }
 668
 669 #define ADD_LEN(len, item_len, const_len) \
 670         do {size_t item = item_len; len += (!!item) * const_len + item; } \
 671         while (0)
 672
 673 static int iwl_fw_rxf_len(struct iwl_fw_runtime *fwrt,
 674                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 675 {
 676         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 677                          sizeof(struct iwl_fw_error_dump_fifo);
 678         u32 fifo_len = 0;
 679         int i;
 680
 681         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF))
 682                 return 0;
 683
 684         /* Count RXF2 size */
 685         ADD_LEN(fifo_len, mem_cfg->rxfifo2_size, hdr_len);
 686
 687         /* Count RXF1 sizes */
 688         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 689                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 690
 691         for (i = 0; i < mem_cfg->num_lmacs; i++)
 692                 ADD_LEN(fifo_len, mem_cfg->lmac[i].rxfifo1_size, hdr_len);
 693
 694         return fifo_len;
 695 }
 696
 697 static int iwl_fw_txf_len(struct iwl_fw_runtime *fwrt,
 698                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 699 {
 700         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 701                          sizeof(struct iwl_fw_error_dump_fifo);
 702         u32 fifo_len = 0;
 703         int i;
 704
 705         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF))
 706                 goto dump_internal_txf;
 707
 708         /* Count TXF sizes */
 709         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 710                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 711
 712         for (i = 0; i < mem_cfg->num_lmacs; i++) {
 713                 int j;
 714
 715                 for (j = 0; j < mem_cfg->num_txfifo_entries; j++)
 716                         ADD_LEN(fifo_len, mem_cfg->lmac[i].txfifo_size[j],
 717                                 hdr_len);
 718         }
 719
 720 dump_internal_txf:
 721         if (!(iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 722               fw_has_capa(&fwrt->fw->ucode_capa,
 723                           IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)))
 724                 goto out;
 725
 726         for (i = 0; i < ARRAY_SIZE(mem_cfg->internal_txfifo_size); i++)
 727                 ADD_LEN(fifo_len, mem_cfg->internal_txfifo_size[i], hdr_len);
 728
 729 out:
 730         return fifo_len;
 731 }
 732
 733 static void iwl_dump_paging(struct iwl_fw_runtime *fwrt,
 734                             struct iwl_fw_error_dump_data **data)
 735 {
 736         int i;
 737
 738         IWL_DEBUG_INFO(fwrt, "WRT paging dump\n");
 739         for (i = 1; i < fwrt->num_of_paging_blk + 1; i++) {
 740                 struct iwl_fw_error_dump_paging *paging;
 741                 struct page *pages =
 742                         fwrt->fw_paging_db[i].fw_paging_block;
 743                 dma_addr_t addr = fwrt->fw_paging_db[i].fw_paging_phys;
 744
 745                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING);
 746                 (*data)->len = cpu_to_le32(sizeof(*paging) +
 747                                              PAGING_BLOCK_SIZE);
 748                 paging =  (void *)(*data)->data;
 749                 paging->index = cpu_to_le32(i);
 750                 dma_sync_single_for_cpu(fwrt->trans->dev, addr,
 751                                         PAGING_BLOCK_SIZE,
 752                                         DMA_BIDIRECTIONAL);
 753                 memcpy(paging->data, page_address(pages),
 754                        PAGING_BLOCK_SIZE);
 755                 dma_sync_single_for_device(fwrt->trans->dev, addr,
 756                                            PAGING_BLOCK_SIZE,
 757                                            DMA_BIDIRECTIONAL);
 758                 (*data) = iwl_fw_error_next_data(*data);
 759         }
 760 }
 761
 762 static struct iwl_fw_error_dump_file *
 763 iwl_fw_error_dump_file(struct iwl_fw_runtime *fwrt,
 764                        struct iwl_fw_dump_ptrs *fw_error_dump,
 765                        struct iwl_fwrt_dump_data *data)
 766 {
 767         struct iwl_fw_error_dump_file *dump_file;
 768         struct iwl_fw_error_dump_data *dump_data;
 769         struct iwl_fw_error_dump_info *dump_info;
 770         struct iwl_fw_error_dump_smem_cfg *dump_smem_cfg;
 771         struct iwl_fw_error_dump_trigger_desc *dump_trig;
 772         u32 sram_len, sram_ofs;
 773         const struct iwl_fw_dbg_mem_seg_tlv *fw_mem = fwrt->fw->dbg.mem_tlv;
 774         struct iwl_fwrt_shared_mem_cfg *mem_cfg = &fwrt->smem_cfg;
 775         u32 file_len, fifo_len = 0, prph_len = 0, radio_len = 0;
 776         u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
 777         u32 sram2_len = fwrt->fw->dbg.n_mem_tlv ?
 778                                 0 : fwrt->trans->cfg->dccm2_len;
 779         int i;
 780
 781         /* SRAM - include stack CCM if driver knows the values for it */
 782         if (!fwrt->trans->cfg->dccm_offset || !fwrt->trans->cfg->dccm_len) {
 783                 const struct fw_img *img;
 784
 785                 if (fwrt->cur_fw_img >= IWL_UCODE_TYPE_MAX)
 786                         return NULL;
 787                 img = &fwrt->fw->img[fwrt->cur_fw_img];
 788                 sram_ofs = img->sec[IWL_UCODE_SECTION_DATA].offset;
 789                 sram_len = img->sec[IWL_UCODE_SECTION_DATA].len;
 790         } else {
 791                 sram_ofs = fwrt->trans->cfg->dccm_offset;
 792                 sram_len = fwrt->trans->cfg->dccm_len;
 793         }
 794
 795         /* reading RXF/TXF sizes */
 796         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
 797                 fifo_len = iwl_fw_rxf_len(fwrt, mem_cfg);
 798                 fifo_len += iwl_fw_txf_len(fwrt, mem_cfg);
 799
 800                 /* Make room for PRPH registers */
 801                 if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_PRPH))
 802                         iwl_fw_prph_handler(fwrt, &prph_len,
 803                                             iwl_fw_get_prph_len);
 804
 805                 if (fwrt->trans->trans_cfg->device_family ==
 806                     IWL_DEVICE_FAMILY_7000 &&
 807                     iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RADIO_REG))
 808                         radio_len = sizeof(*dump_data) + RADIO_REG_MAX_READ;
 809         }
 810
 811         file_len = sizeof(*dump_file) + fifo_len + prph_len + radio_len;
 812
 813         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO))
 814                 file_len += sizeof(*dump_data) + sizeof(*dump_info);
 815         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG))
 816                 file_len += sizeof(*dump_data) + sizeof(*dump_smem_cfg);
 817
 818         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 819                 size_t hdr_len = sizeof(*dump_data) +
 820                                  sizeof(struct iwl_fw_error_dump_mem);
 821
 822                 /* Dump SRAM only if no mem_tlvs */
 823                 if (!fwrt->fw->dbg.n_mem_tlv)
 824                         ADD_LEN(file_len, sram_len, hdr_len);
 825
 826                 /* Make room for all mem types that exist */
 827                 ADD_LEN(file_len, smem_len, hdr_len);
 828                 ADD_LEN(file_len, sram2_len, hdr_len);
 829
 830                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++)
 831                         ADD_LEN(file_len, le32_to_cpu(fw_mem[i].len), hdr_len);
 832         }
 833
 834         /* Make room for fw's virtual image pages, if it exists */
 835         if (iwl_fw_dbg_is_paging_enabled(fwrt))
 836                 file_len += fwrt->num_of_paging_blk *
 837                         (sizeof(*dump_data) +
 838                          sizeof(struct iwl_fw_error_dump_paging) +
 839                          PAGING_BLOCK_SIZE);
 840
 841         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 842                 file_len += sizeof(*dump_data) +
 843                         fwrt->trans->cfg->d3_debug_data_length * 2;
 844         }
 845
 846         /* If we only want a monitor dump, reset the file length */
 847         if (data->monitor_only) {
 848                 file_len = sizeof(*dump_file) + sizeof(*dump_data) * 2 +
 849                            sizeof(*dump_info) + sizeof(*dump_smem_cfg);
 850         }
 851
 852         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 853             data->desc)
 854                 file_len += sizeof(*dump_data) + sizeof(*dump_trig) +
 855                         data->desc->len;
 856
 857         dump_file = vzalloc(file_len);
 858         if (!dump_file)
 859                 return NULL;
 860
 861         fw_error_dump->fwrt_ptr = dump_file;
 862
 863         dump_file->barker = cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER);
 864         dump_data = (void *)dump_file->data;
 865
 866         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO)) {
 867                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO);
 868                 dump_data->len = cpu_to_le32(sizeof(*dump_info));
 869                 dump_info = (void *)dump_data->data;
 870                 dump_info->hw_type =
 871                         cpu_to_le32(CSR_HW_REV_TYPE(fwrt->trans->hw_rev));
 872                 dump_info->hw_step =
 873                         cpu_to_le32(CSR_HW_REV_STEP(fwrt->trans->hw_rev));
 874                 memcpy(dump_info->fw_human_readable, fwrt->fw->human_readable,
 875                        sizeof(dump_info->fw_human_readable));
 876                 strncpy(dump_info->dev_human_readable, fwrt->trans->name,
 877                         sizeof(dump_info->dev_human_readable) - 1);
 878                 strncpy(dump_info->bus_human_readable, fwrt->dev->bus->name,
 879                         sizeof(dump_info->bus_human_readable) - 1);
 880                 dump_info->num_of_lmacs = fwrt->smem_cfg.num_lmacs;
 881                 dump_info->lmac_err_id[0] =
 882                         cpu_to_le32(fwrt->dump.lmac_err_id[0]);
 883                 if (fwrt->smem_cfg.num_lmacs > 1)
 884                         dump_info->lmac_err_id[1] =
 885                                 cpu_to_le32(fwrt->dump.lmac_err_id[1]);
 886                 dump_info->umac_err_id = cpu_to_le32(fwrt->dump.umac_err_id);
 887
 888                 dump_data = iwl_fw_error_next_data(dump_data);
 889         }
 890
 891         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG)) {
 892                 /* Dump shared memory configuration */
 893                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG);
 894                 dump_data->len = cpu_to_le32(sizeof(*dump_smem_cfg));
 895                 dump_smem_cfg = (void *)dump_data->data;
 896                 dump_smem_cfg->num_lmacs = cpu_to_le32(mem_cfg->num_lmacs);
 897                 dump_smem_cfg->num_txfifo_entries =
 898                         cpu_to_le32(mem_cfg->num_txfifo_entries);
 899                 for (i = 0; i < MAX_NUM_LMAC; i++) {
 900                         int j;
 901                         u32 *txf_size = mem_cfg->lmac[i].txfifo_size;
 902
 903                         for (j = 0; j < TX_FIFO_MAX_NUM; j++)
 904                                 dump_smem_cfg->lmac[i].txfifo_size[j] =
 905                                         cpu_to_le32(txf_size[j]);
 906                         dump_smem_cfg->lmac[i].rxfifo1_size =
 907                                 cpu_to_le32(mem_cfg->lmac[i].rxfifo1_size);
 908                 }
 909                 dump_smem_cfg->rxfifo2_size =
 910                         cpu_to_le32(mem_cfg->rxfifo2_size);
 911                 dump_smem_cfg->internal_txfifo_addr =
 912                         cpu_to_le32(mem_cfg->internal_txfifo_addr);
 913                 for (i = 0; i < TX_FIFO_INTERNAL_MAX_NUM; i++) {
 914                         dump_smem_cfg->internal_txfifo_size[i] =
 915                                 cpu_to_le32(mem_cfg->internal_txfifo_size[i]);
 916                 }
 917
 918                 dump_data = iwl_fw_error_next_data(dump_data);
 919         }
 920
 921         /* We only dump the FIFOs if the FW is in error state */
 922         if (fifo_len) {
 923                 iwl_fw_dump_rxf(fwrt, &dump_data);
 924                 iwl_fw_dump_txf(fwrt, &dump_data);
 925         }
 926
 927         if (radio_len)
 928                 iwl_read_radio_regs(fwrt, &dump_data);
 929
 930         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 931             data->desc) {
 932                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
 933                 dump_data->len = cpu_to_le32(sizeof(*dump_trig) +
 934                                              data->desc->len);
 935                 dump_trig = (void *)dump_data->data;
 936                 memcpy(dump_trig, &data->desc->trig_desc,
 937                        sizeof(*dump_trig) + data->desc->len);
 938
 939                 dump_data = iwl_fw_error_next_data(dump_data);
 940         }
 941
 942         /* In case we only want monitor dump, skip to dump trasport data */
 943         if (data->monitor_only)
 944                 goto out;
 945
 946         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 947                 const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem =
 948                         fwrt->fw->dbg.mem_tlv;
 949
 950                 if (!fwrt->fw->dbg.n_mem_tlv)
 951                         iwl_fw_dump_mem(fwrt, &dump_data, sram_len, sram_ofs,
 952                                         IWL_FW_ERROR_DUMP_MEM_SRAM);
 953
 954                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
 955                         u32 len = le32_to_cpu(fw_dbg_mem[i].len);
 956                         u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
 957
 958                         iwl_fw_dump_mem(fwrt, &dump_data, len, ofs,
 959                                         le32_to_cpu(fw_dbg_mem[i].data_type));
 960                 }
 961
 962                 iwl_fw_dump_mem(fwrt, &dump_data, smem_len,
 963                                 fwrt->trans->cfg->smem_offset,
 964                                 IWL_FW_ERROR_DUMP_MEM_SMEM);
 965
 966                 iwl_fw_dump_mem(fwrt, &dump_data, sram2_len,
 967                                 fwrt->trans->cfg->dccm2_offset,
 968                                 IWL_FW_ERROR_DUMP_MEM_SRAM);
 969         }
 970
 971         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 972                 u32 addr = fwrt->trans->cfg->d3_debug_data_base_addr;
 973                 size_t data_size = fwrt->trans->cfg->d3_debug_data_length;
 974
 975                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
 976                 dump_data->len = cpu_to_le32(data_size * 2);
 977
 978                 memcpy(dump_data->data, fwrt->dump.d3_debug_data, data_size);
 979
 980                 kfree(fwrt->dump.d3_debug_data);
 981                 fwrt->dump.d3_debug_data = NULL;
 982
 983                 iwl_trans_read_mem_bytes(fwrt->trans, addr,
 984                                          dump_data->data + data_size,
 985                                          data_size);
 986
 987                 dump_data = iwl_fw_error_next_data(dump_data);
 988         }
 989
 990         /* Dump fw's virtual image */
 991         if (iwl_fw_dbg_is_paging_enabled(fwrt))
 992                 iwl_dump_paging(fwrt, &dump_data);
 993
 994         if (prph_len)
 995                 iwl_fw_prph_handler(fwrt, &dump_data, iwl_dump_prph);
 996
 997 out:
 998         dump_file->file_len = cpu_to_le32(file_len);
 999         return dump_file;
1000 }
1001
1002 /**
1003  * struct iwl_dump_ini_region_data - region data
1004  * @reg_tlv: region TLV
1005  * @dump_data: dump data
1006  */
1007 struct iwl_dump_ini_region_data {
1008         struct iwl_ucode_tlv *reg_tlv;
1009         struct iwl_fwrt_dump_data *dump_data;
1010 };
1011
1012 static int
1013 iwl_dump_ini_prph_mac_iter(struct iwl_fw_runtime *fwrt,
1014                            struct iwl_dump_ini_region_data *reg_data,
1015                            void *range_ptr, int idx)
1016 {
1017         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1018         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1019         __le32 *val = range->data;
1020         u32 prph_val;
1021         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1022                    le32_to_cpu(reg->dev_addr.offset);
1023         int i;
1024
1025         range->internal_base_addr = cpu_to_le32(addr);
1026         range->range_data_size = reg->dev_addr.size;
1027         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1028                 prph_val = iwl_read_prph(fwrt->trans, addr + i);
1029                 if (prph_val == 0x5a5a5a5a)
1030                         return -EBUSY;
1031                 *val++ = cpu_to_le32(prph_val);
1032         }
1033
1034         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1035 }
1036
1037 static int
1038 iwl_dump_ini_prph_phy_iter(struct iwl_fw_runtime *fwrt,
1039                            struct iwl_dump_ini_region_data *reg_data,
1040                            void *range_ptr, int idx)
1041 {
1042         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1043         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1044         __le32 *val = range->data;
1045         u32 indirect_wr_addr = WMAL_INDRCT_RD_CMD1;
1046         u32 indirect_rd_addr = WMAL_MRSPF_1;
1047         u32 prph_val;
1048         u32 addr = le32_to_cpu(reg->addrs[idx]);
1049         u32 dphy_state;
1050         u32 dphy_addr;
1051         unsigned long flags;
1052         int i;
1053
1054         range->internal_base_addr = cpu_to_le32(addr);
1055         range->range_data_size = reg->dev_addr.size;
1056
1057         if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
1058                 indirect_wr_addr = WMAL_INDRCT_CMD1;
1059
1060         indirect_wr_addr += le32_to_cpu(reg->dev_addr.offset);
1061         indirect_rd_addr += le32_to_cpu(reg->dev_addr.offset);
1062
1063         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
1064                 return -EBUSY;
1065
1066         dphy_addr = (reg->dev_addr.offset) ? WFPM_LMAC2_PS_CTL_RW :
1067                                              WFPM_LMAC1_PS_CTL_RW;
1068         dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1069
1070         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1071                 if (dphy_state == HBUS_TIMEOUT ||
1072                     (dphy_state & WFPM_PS_CTL_RW_PHYRF_PD_FSM_CURSTATE_MSK) !=
1073                     WFPM_PHYRF_STATE_ON) {
1074                         *val++ = cpu_to_le32(WFPM_DPHY_OFF);
1075                         continue;
1076                 }
1077
1078                 iwl_write_prph_no_grab(fwrt->trans, indirect_wr_addr,
1079                                        WMAL_INDRCT_CMD(addr + i));
1080                 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1081                                                  indirect_rd_addr);
1082                 *val++ = cpu_to_le32(prph_val);
1083         }
1084
1085         iwl_trans_release_nic_access(fwrt->trans, &flags);
1086         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1087 }
1088
1089 static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt,
1090                                  struct iwl_dump_ini_region_data *reg_data,
1091                                  void *range_ptr, int idx)
1092 {
1093         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1094         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1095         __le32 *val = range->data;
1096         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1097                    le32_to_cpu(reg->dev_addr.offset);
1098         int i;
1099
1100         range->internal_base_addr = cpu_to_le32(addr);
1101         range->range_data_size = reg->dev_addr.size;
1102         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4)
1103                 *val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans, addr + i));
1104
1105         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1106 }
1107
1108 static int iwl_dump_ini_config_iter(struct iwl_fw_runtime *fwrt,
1109                                     struct iwl_dump_ini_region_data *reg_data,
1110                                     void *range_ptr, int idx)
1111 {
1112         struct iwl_trans *trans = fwrt->trans;
1113         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1114         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1115         __le32 *val = range->data;
1116         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1117                    le32_to_cpu(reg->dev_addr.offset);
1118         int i;
1119
1120         /* we shouldn't get here if the trans doesn't have read_config32 */
1121         if (WARN_ON_ONCE(!trans->ops->read_config32))
1122                 return -EOPNOTSUPP;
1123
1124         range->internal_base_addr = cpu_to_le32(addr);
1125         range->range_data_size = reg->dev_addr.size;
1126         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1127                 int ret;
1128                 u32 tmp;
1129
1130                 ret = trans->ops->read_config32(trans, addr + i, &tmp);
1131                 if (ret < 0)
1132                         return ret;
1133
1134                 *val++ = cpu_to_le32(tmp);
1135         }
1136
1137         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1138 }
1139
1140 static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt,
1141                                      struct iwl_dump_ini_region_data *reg_data,
1142                                      void *range_ptr, int idx)
1143 {
1144         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1145         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1146         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1147                    le32_to_cpu(reg->dev_addr.offset);
1148
1149         range->internal_base_addr = cpu_to_le32(addr);
1150         range->range_data_size = reg->dev_addr.size;
1151         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1152                                  le32_to_cpu(reg->dev_addr.size));
1153
1154         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1155 }
1156
1157 static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1158                                      void *range_ptr, int idx)
1159 {
1160         struct page *page = fwrt->fw_paging_db[idx].fw_paging_block;
1161         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1162         dma_addr_t addr = fwrt->fw_paging_db[idx].fw_paging_phys;
1163         u32 page_size = fwrt->fw_paging_db[idx].fw_paging_size;
1164
1165         range->page_num = cpu_to_le32(idx);
1166         range->range_data_size = cpu_to_le32(page_size);
1167         dma_sync_single_for_cpu(fwrt->trans->dev, addr, page_size,
1168                                 DMA_BIDIRECTIONAL);
1169         memcpy(range->data, page_address(page), page_size);
1170         dma_sync_single_for_device(fwrt->trans->dev, addr, page_size,
1171                                    DMA_BIDIRECTIONAL);
1172
1173         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1174 }
1175
1176 static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1177                                     struct iwl_dump_ini_region_data *reg_data,
1178                                     void *range_ptr, int idx)
1179 {
1180         struct iwl_fw_ini_error_dump_range *range;
1181         u32 page_size;
1182
1183         /* all paged index start from 1 to skip CSS section */
1184         idx++;
1185
1186         if (!fwrt->trans->trans_cfg->gen2)
1187                 return _iwl_dump_ini_paging_iter(fwrt, range_ptr, idx);
1188
1189         range = range_ptr;
1190         page_size = fwrt->trans->init_dram.paging[idx].size;
1191
1192         range->page_num = cpu_to_le32(idx);
1193         range->range_data_size = cpu_to_le32(page_size);
1194         memcpy(range->data, fwrt->trans->init_dram.paging[idx].block,
1195                page_size);
1196
1197         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1198 }
1199
1200 static int
1201 iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt,
1202                            struct iwl_dump_ini_region_data *reg_data,
1203                            void *range_ptr, int idx)
1204 {
1205         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1206         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1207         struct iwl_dram_data *frag;
1208         u32 alloc_id = le32_to_cpu(reg->dram_alloc_id);
1209
1210         frag = &fwrt->trans->dbg.fw_mon_ini[alloc_id].frags[idx];
1211
1212         range->dram_base_addr = cpu_to_le64(frag->physical);
1213         range->range_data_size = cpu_to_le32(frag->size);
1214
1215         memcpy(range->data, frag->block, frag->size);
1216
1217         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1218 }
1219
1220 static int iwl_dump_ini_mon_smem_iter(struct iwl_fw_runtime *fwrt,
1221                                       struct iwl_dump_ini_region_data *reg_data,
1222                                       void *range_ptr, int idx)
1223 {
1224         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1225         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1226         u32 addr = le32_to_cpu(reg->internal_buffer.base_addr);
1227
1228         range->internal_base_addr = cpu_to_le32(addr);
1229         range->range_data_size = reg->internal_buffer.size;
1230         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1231                                  le32_to_cpu(reg->internal_buffer.size));
1232
1233         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1234 }
1235
1236 static bool iwl_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1237                              struct iwl_dump_ini_region_data *reg_data, int idx)
1238 {
1239         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1240         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1241         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
1242         int txf_num = cfg->num_txfifo_entries;
1243         int int_txf_num = ARRAY_SIZE(cfg->internal_txfifo_size);
1244         u32 lmac_bitmap = le32_to_cpu(reg->fifos.fid[0]);
1245
1246         if (!idx) {
1247                 if (le32_to_cpu(reg->fifos.offset) && cfg->num_lmacs == 1) {
1248                         IWL_ERR(fwrt, "WRT: Invalid lmac offset 0x%x\n",
1249                                 le32_to_cpu(reg->fifos.offset));
1250                         return false;
1251                 }
1252
1253                 iter->internal_txf = 0;
1254                 iter->fifo_size = 0;
1255                 iter->fifo = -1;
1256                 if (le32_to_cpu(reg->fifos.offset))
1257                         iter->lmac = 1;
1258                 else
1259                         iter->lmac = 0;
1260         }
1261
1262         if (!iter->internal_txf) {
1263                 for (iter->fifo++; iter->fifo < txf_num; iter->fifo++) {
1264                         iter->fifo_size =
1265                                 cfg->lmac[iter->lmac].txfifo_size[iter->fifo];
1266                         if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1267                                 return true;
1268                 }
1269                 iter->fifo--;
1270         }
1271
1272         iter->internal_txf = 1;
1273
1274         if (!fw_has_capa(&fwrt->fw->ucode_capa,
1275                          IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
1276                 return false;
1277
1278         for (iter->fifo++; iter->fifo < int_txf_num + txf_num; iter->fifo++) {
1279                 iter->fifo_size =
1280                         cfg->internal_txfifo_size[iter->fifo - txf_num];
1281                 if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1282                         return true;
1283         }
1284
1285         return false;
1286 }
1287
1288 static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1289                                  struct iwl_dump_ini_region_data *reg_data,
1290                                  void *range_ptr, int idx)
1291 {
1292         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1293         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1294         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1295         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1296         u32 offs = le32_to_cpu(reg->fifos.offset), addr;
1297         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1298         u32 registers_size = registers_num * sizeof(*reg_dump);
1299         __le32 *data;
1300         unsigned long flags;
1301         int i;
1302
1303         if (!iwl_ini_txf_iter(fwrt, reg_data, idx))
1304                 return -EIO;
1305
1306         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
1307                 return -EBUSY;
1308
1309         range->fifo_hdr.fifo_num = cpu_to_le32(iter->fifo);
1310         range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
1311         range->range_data_size = cpu_to_le32(iter->fifo_size + registers_size);
1312
1313         iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
1314
1315         /*
1316          * read txf registers. for each register, write to the dump the
1317          * register address and its value
1318          */
1319         for (i = 0; i < registers_num; i++) {
1320                 addr = le32_to_cpu(reg->addrs[i]) + offs;
1321
1322                 reg_dump->addr = cpu_to_le32(addr);
1323                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1324                                                                    addr));
1325
1326                 reg_dump++;
1327         }
1328
1329         if (reg->fifos.hdr_only) {
1330                 range->range_data_size = cpu_to_le32(registers_size);
1331                 goto out;
1332         }
1333
1334         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
1335         iwl_write_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
1336                                TXF_WR_PTR + offs);
1337
1338         /* Dummy-read to advance the read pointer to the head */
1339         iwl_read_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
1340
1341         /* Read FIFO */
1342         addr = TXF_READ_MODIFY_DATA + offs;
1343         data = (void *)reg_dump;
1344         for (i = 0; i < iter->fifo_size; i += sizeof(*data))
1345                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1346
1347 out:
1348         iwl_trans_release_nic_access(fwrt->trans, &flags);
1349
1350         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1351 }
1352
1353 struct iwl_ini_rxf_data {
1354         u32 fifo_num;
1355         u32 size;
1356         u32 offset;
1357 };
1358
1359 static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt,
1360                                  struct iwl_dump_ini_region_data *reg_data,
1361                                  struct iwl_ini_rxf_data *data)
1362 {
1363         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1364         u32 fid1 = le32_to_cpu(reg->fifos.fid[0]);
1365         u32 fid2 = le32_to_cpu(reg->fifos.fid[1]);
1366         u8 fifo_idx;
1367
1368         if (!data)
1369                 return;
1370
1371         /* make sure only one bit is set in only one fid */
1372         if (WARN_ONCE(hweight_long(fid1) + hweight_long(fid2) != 1,
1373                       "fid1=%x, fid2=%x\n", fid1, fid2))
1374                 return;
1375
1376         memset(data, 0, sizeof(*data));
1377
1378         if (fid1) {
1379                 fifo_idx = ffs(fid1) - 1;
1380                 if (WARN_ONCE(fifo_idx >= MAX_NUM_LMAC, "fifo_idx=%d\n",
1381                               fifo_idx))
1382                         return;
1383
1384                 data->size = fwrt->smem_cfg.lmac[fifo_idx].rxfifo1_size;
1385                 data->fifo_num = fifo_idx;
1386         } else {
1387                 u8 max_idx;
1388
1389                 fifo_idx = ffs(fid2) - 1;
1390                 if (iwl_fw_lookup_notif_ver(fwrt->fw, SYSTEM_GROUP,
1391                                             SHARED_MEM_CFG_CMD, 0) <= 3)
1392                         max_idx = 0;
1393                 else
1394                         max_idx = 1;
1395
1396                 if (WARN_ONCE(fifo_idx > max_idx,
1397                               "invalid umac fifo idx %d", fifo_idx))
1398                         return;
1399
1400                 /* use bit 31 to distinguish between umac and lmac rxf while
1401                  * parsing the dump
1402                  */
1403                 data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
1404
1405                 switch (fifo_idx) {
1406                 case 0:
1407                         data->size = fwrt->smem_cfg.rxfifo2_size;
1408                         data->offset = iwl_umac_prph(fwrt->trans,
1409                                                      RXF_DIFF_FROM_PREV);
1410                         break;
1411                 case 1:
1412                         data->size = fwrt->smem_cfg.rxfifo2_control_size;
1413                         data->offset = iwl_umac_prph(fwrt->trans,
1414                                                      RXF2C_DIFF_FROM_PREV);
1415                         break;
1416                 }
1417         }
1418 }
1419
1420 static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
1421                                  struct iwl_dump_ini_region_data *reg_data,
1422                                  void *range_ptr, int idx)
1423 {
1424         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1425         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1426         struct iwl_ini_rxf_data rxf_data;
1427         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1428         u32 offs = le32_to_cpu(reg->fifos.offset), addr;
1429         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1430         u32 registers_size = registers_num * sizeof(*reg_dump);
1431         __le32 *data;
1432         unsigned long flags;
1433         int i;
1434
1435         iwl_ini_get_rxf_data(fwrt, reg_data, &rxf_data);
1436         if (!rxf_data.size)
1437                 return -EIO;
1438
1439         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
1440                 return -EBUSY;
1441
1442         range->fifo_hdr.fifo_num = cpu_to_le32(rxf_data.fifo_num);
1443         range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
1444         range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
1445
1446         /*
1447          * read rxf registers. for each register, write to the dump the
1448          * register address and its value
1449          */
1450         for (i = 0; i < registers_num; i++) {
1451                 addr = le32_to_cpu(reg->addrs[i]) + offs;
1452
1453                 reg_dump->addr = cpu_to_le32(addr);
1454                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1455                                                                    addr));
1456
1457                 reg_dump++;
1458         }
1459
1460         if (reg->fifos.hdr_only) {
1461                 range->range_data_size = cpu_to_le32(registers_size);
1462                 goto out;
1463         }
1464
1465         offs = rxf_data.offset;
1466
1467         /* Lock fence */
1468         iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
1469         /* Set fence pointer to the same place like WR pointer */
1470         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
1471         /* Set fence offset */
1472         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
1473                                0x0);
1474
1475         /* Read FIFO */
1476         addr =  RXF_FIFO_RD_FENCE_INC + offs;
1477         data = (void *)reg_dump;
1478         for (i = 0; i < rxf_data.size; i += sizeof(*data))
1479                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1480
1481 out:
1482         iwl_trans_release_nic_access(fwrt->trans, &flags);
1483
1484         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1485 }
1486
1487 static int
1488 iwl_dump_ini_err_table_iter(struct iwl_fw_runtime *fwrt,
1489                             struct iwl_dump_ini_region_data *reg_data,
1490                             void *range_ptr, int idx)
1491 {
1492         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1493         struct iwl_fw_ini_region_err_table *err_table = &reg->err_table;
1494         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1495         u32 addr = le32_to_cpu(err_table->base_addr) +
1496                    le32_to_cpu(err_table->offset);
1497
1498         range->internal_base_addr = cpu_to_le32(addr);
1499         range->range_data_size = err_table->size;
1500         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1501                                  le32_to_cpu(err_table->size));
1502
1503         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1504 }
1505
1506 static int
1507 iwl_dump_ini_special_mem_iter(struct iwl_fw_runtime *fwrt,
1508                               struct iwl_dump_ini_region_data *reg_data,
1509                               void *range_ptr, int idx)
1510 {
1511         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1512         struct iwl_fw_ini_region_special_device_memory *special_mem =
1513                 &reg->special_mem;
1514
1515         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1516         u32 addr = le32_to_cpu(special_mem->base_addr) +
1517                    le32_to_cpu(special_mem->offset);
1518
1519         range->internal_base_addr = cpu_to_le32(addr);
1520         range->range_data_size = special_mem->size;
1521         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1522                                  le32_to_cpu(special_mem->size));
1523
1524         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1525 }
1526
1527 static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt,
1528                                     struct iwl_dump_ini_region_data *reg_data,
1529                                     void *range_ptr, int idx)
1530 {
1531         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1532         struct iwl_rx_packet *pkt = reg_data->dump_data->fw_pkt;
1533         u32 pkt_len;
1534
1535         if (!pkt)
1536                 return -EIO;
1537
1538         pkt_len = iwl_rx_packet_payload_len(pkt);
1539
1540         memcpy(&range->fw_pkt_hdr, &pkt->hdr, sizeof(range->fw_pkt_hdr));
1541         range->range_data_size = cpu_to_le32(pkt_len);
1542
1543         memcpy(range->data, pkt->data, pkt_len);
1544
1545         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1546 }
1547
1548 static void *
1549 iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
1550                              struct iwl_dump_ini_region_data *reg_data,
1551                              void *data)
1552 {
1553         struct iwl_fw_ini_error_dump *dump = data;
1554
1555         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1556
1557         return dump->ranges;
1558 }
1559
1560 /**
1561  * mask_apply_and_normalize - applies mask on val and normalize the result
1562  *
1563  * The normalization is based on the first set bit in the mask
1564  *
1565  * @val: value
1566  * @mask: mask to apply and to normalize with
1567  */
1568 static u32 mask_apply_and_normalize(u32 val, u32 mask)
1569 {
1570         return (val & mask) >> (ffs(mask) - 1);
1571 }
1572
1573 static __le32 iwl_get_mon_reg(struct iwl_fw_runtime *fwrt, u32 alloc_id,
1574                               const struct iwl_fw_mon_reg *reg_info)
1575 {
1576         u32 val, offs;
1577
1578         /* The header addresses of DBGCi is calculate as follows:
1579          * DBGC1 address + (0x100 * i)
1580          */
1581         offs = (alloc_id - IWL_FW_INI_ALLOCATION_ID_DBGC1) * 0x100;
1582
1583         if (!reg_info || !reg_info->addr || !reg_info->mask)
1584                 return 0;
1585
1586         val = iwl_read_prph_no_grab(fwrt->trans, reg_info->addr + offs);
1587
1588         return cpu_to_le32(mask_apply_and_normalize(val, reg_info->mask));
1589 }
1590
1591 static void *
1592 iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime *fwrt,
1593                              struct iwl_dump_ini_region_data *reg_data,
1594                              struct iwl_fw_ini_monitor_dump *data,
1595                              const struct iwl_fw_mon_regs *addrs)
1596 {
1597         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1598         u32 alloc_id = le32_to_cpu(reg->dram_alloc_id);
1599         unsigned long flags;
1600
1601         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags)) {
1602                 IWL_ERR(fwrt, "Failed to get monitor header\n");
1603                 return NULL;
1604         }
1605
1606         data->write_ptr = iwl_get_mon_reg(fwrt, alloc_id,
1607                                           &addrs->write_ptr);
1608         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
1609                 u32 wrt_ptr = le32_to_cpu(data->write_ptr);
1610
1611                 data->write_ptr = cpu_to_le32(wrt_ptr >> 2);
1612         }
1613         data->cycle_cnt = iwl_get_mon_reg(fwrt, alloc_id,
1614                                           &addrs->cycle_cnt);
1615         data->cur_frag = iwl_get_mon_reg(fwrt, alloc_id,
1616                                          &addrs->cur_frag);
1617
1618         iwl_trans_release_nic_access(fwrt->trans, &flags);
1619
1620         data->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1621
1622         return data->ranges;
1623 }
1624
1625 static void *
1626 iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt,
1627                                   struct iwl_dump_ini_region_data *reg_data,
1628                                   void *data)
1629 {
1630         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1631
1632         return iwl_dump_ini_mon_fill_header(fwrt, reg_data, mon_dump,
1633                                             &fwrt->trans->cfg->mon_dram_regs);
1634 }
1635
1636 static void *
1637 iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt,
1638                                   struct iwl_dump_ini_region_data *reg_data,
1639                                   void *data)
1640 {
1641         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1642
1643         return iwl_dump_ini_mon_fill_header(fwrt, reg_data, mon_dump,
1644                                             &fwrt->trans->cfg->mon_smem_regs);
1645 }
1646
1647 static void *
1648 iwl_dump_ini_err_table_fill_header(struct iwl_fw_runtime *fwrt,
1649                                    struct iwl_dump_ini_region_data *reg_data,
1650                                    void *data)
1651 {
1652         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1653         struct iwl_fw_ini_err_table_dump *dump = data;
1654
1655         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1656         dump->version = reg->err_table.version;
1657
1658         return dump->ranges;
1659 }
1660
1661 static void *
1662 iwl_dump_ini_special_mem_fill_header(struct iwl_fw_runtime *fwrt,
1663                                      struct iwl_dump_ini_region_data *reg_data,
1664                                      void *data)
1665 {
1666         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1667         struct iwl_fw_ini_special_device_memory *dump = data;
1668
1669         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1670         dump->type = reg->special_mem.type;
1671         dump->version = reg->special_mem.version;
1672
1673         return dump->ranges;
1674 }
1675
1676 static u32 iwl_dump_ini_mem_ranges(struct iwl_fw_runtime *fwrt,
1677                                    struct iwl_dump_ini_region_data *reg_data)
1678 {
1679         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1680
1681         return iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1682 }
1683
1684 static u32 iwl_dump_ini_paging_ranges(struct iwl_fw_runtime *fwrt,
1685                                       struct iwl_dump_ini_region_data *reg_data)
1686 {
1687         if (fwrt->trans->trans_cfg->gen2) {
1688                 if (fwrt->trans->init_dram.paging_cnt)
1689                         return fwrt->trans->init_dram.paging_cnt - 1;
1690                 else
1691                         return 0;
1692         }
1693
1694         return fwrt->num_of_paging_blk;
1695 }
1696
1697 static u32
1698 iwl_dump_ini_mon_dram_ranges(struct iwl_fw_runtime *fwrt,
1699                              struct iwl_dump_ini_region_data *reg_data)
1700 {
1701         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1702         struct iwl_fw_mon *fw_mon;
1703         u32 ranges = 0, alloc_id = le32_to_cpu(reg->dram_alloc_id);
1704         int i;
1705
1706         fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
1707
1708         for (i = 0; i < fw_mon->num_frags; i++) {
1709                 if (!fw_mon->frags[i].size)
1710                         break;
1711
1712                 ranges++;
1713         }
1714
1715         return ranges;
1716 }
1717
1718 static u32 iwl_dump_ini_txf_ranges(struct iwl_fw_runtime *fwrt,
1719                                    struct iwl_dump_ini_region_data *reg_data)
1720 {
1721         u32 num_of_fifos = 0;
1722
1723         while (iwl_ini_txf_iter(fwrt, reg_data, num_of_fifos))
1724                 num_of_fifos++;
1725
1726         return num_of_fifos;
1727 }
1728
1729 static u32 iwl_dump_ini_single_range(struct iwl_fw_runtime *fwrt,
1730                                      struct iwl_dump_ini_region_data *reg_data)
1731 {
1732         return 1;
1733 }
1734
1735 static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt,
1736                                      struct iwl_dump_ini_region_data *reg_data)
1737 {
1738         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1739         u32 size = le32_to_cpu(reg->dev_addr.size);
1740         u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
1741
1742         if (!size || !ranges)
1743                 return 0;
1744
1745         return sizeof(struct iwl_fw_ini_error_dump) + ranges *
1746                 (size + sizeof(struct iwl_fw_ini_error_dump_range));
1747 }
1748
1749 static u32
1750 iwl_dump_ini_paging_get_size(struct iwl_fw_runtime *fwrt,
1751                              struct iwl_dump_ini_region_data *reg_data)
1752 {
1753         int i;
1754         u32 range_header_len = sizeof(struct iwl_fw_ini_error_dump_range);
1755         u32 size = sizeof(struct iwl_fw_ini_error_dump);
1756
1757         /* start from 1 to skip CSS section */
1758         for (i = 1; i <= iwl_dump_ini_paging_ranges(fwrt, reg_data); i++) {
1759                 size += range_header_len;
1760                 if (fwrt->trans->trans_cfg->gen2)
1761                         size += fwrt->trans->init_dram.paging[i].size;
1762                 else
1763                         size += fwrt->fw_paging_db[i].fw_paging_size;
1764         }
1765
1766         return size;
1767 }
1768
1769 static u32
1770 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime *fwrt,
1771                                struct iwl_dump_ini_region_data *reg_data)
1772 {
1773         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1774         struct iwl_fw_mon *fw_mon;
1775         u32 size = 0, alloc_id = le32_to_cpu(reg->dram_alloc_id);
1776         int i;
1777
1778         fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
1779
1780         for (i = 0; i < fw_mon->num_frags; i++) {
1781                 struct iwl_dram_data *frag = &fw_mon->frags[i];
1782
1783                 if (!frag->size)
1784                         break;
1785
1786                 size += sizeof(struct iwl_fw_ini_error_dump_range) + frag->size;
1787         }
1788
1789         if (size)
1790                 size += sizeof(struct iwl_fw_ini_monitor_dump);
1791
1792         return size;
1793 }
1794
1795 static u32
1796 iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime *fwrt,
1797                                struct iwl_dump_ini_region_data *reg_data)
1798 {
1799         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1800         u32 size;
1801
1802         size = le32_to_cpu(reg->internal_buffer.size);
1803         if (!size)
1804                 return 0;
1805
1806         size += sizeof(struct iwl_fw_ini_monitor_dump) +
1807                 sizeof(struct iwl_fw_ini_error_dump_range);
1808
1809         return size;
1810 }
1811
1812 static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
1813                                      struct iwl_dump_ini_region_data *reg_data)
1814 {
1815         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1816         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1817         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1818         u32 size = 0;
1819         u32 fifo_hdr = sizeof(struct iwl_fw_ini_error_dump_range) +
1820                        registers_num *
1821                        sizeof(struct iwl_fw_ini_error_dump_register);
1822
1823         while (iwl_ini_txf_iter(fwrt, reg_data, size)) {
1824                 size += fifo_hdr;
1825                 if (!reg->fifos.hdr_only)
1826                         size += iter->fifo_size;
1827         }
1828
1829         if (!size)
1830                 return 0;
1831
1832         return size + sizeof(struct iwl_fw_ini_error_dump);
1833 }
1834
1835 static u32 iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime *fwrt,
1836                                      struct iwl_dump_ini_region_data *reg_data)
1837 {
1838         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1839         struct iwl_ini_rxf_data rx_data;
1840         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1841         u32 size = sizeof(struct iwl_fw_ini_error_dump) +
1842                 sizeof(struct iwl_fw_ini_error_dump_range) +
1843                 registers_num * sizeof(struct iwl_fw_ini_error_dump_register);
1844
1845         if (reg->fifos.hdr_only)
1846                 return size;
1847
1848         iwl_ini_get_rxf_data(fwrt, reg_data, &rx_data);
1849         size += rx_data.size;
1850
1851         return size;
1852 }
1853
1854 static u32
1855 iwl_dump_ini_err_table_get_size(struct iwl_fw_runtime *fwrt,
1856                                 struct iwl_dump_ini_region_data *reg_data)
1857 {
1858         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1859         u32 size = le32_to_cpu(reg->err_table.size);
1860
1861         if (size)
1862                 size += sizeof(struct iwl_fw_ini_err_table_dump) +
1863                         sizeof(struct iwl_fw_ini_error_dump_range);
1864
1865         return size;
1866 }
1867
1868 static u32
1869 iwl_dump_ini_special_mem_get_size(struct iwl_fw_runtime *fwrt,
1870                                   struct iwl_dump_ini_region_data *reg_data)
1871 {
1872         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1873         u32 size = le32_to_cpu(reg->special_mem.size);
1874
1875         if (size)
1876                 size += sizeof(struct iwl_fw_ini_special_device_memory) +
1877                         sizeof(struct iwl_fw_ini_error_dump_range);
1878
1879         return size;
1880 }
1881
1882 static u32
1883 iwl_dump_ini_fw_pkt_get_size(struct iwl_fw_runtime *fwrt,
1884                              struct iwl_dump_ini_region_data *reg_data)
1885 {
1886         u32 size = 0;
1887
1888         if (!reg_data->dump_data->fw_pkt)
1889                 return 0;
1890
1891         size += iwl_rx_packet_payload_len(reg_data->dump_data->fw_pkt);
1892         if (size)
1893                 size += sizeof(struct iwl_fw_ini_error_dump) +
1894                         sizeof(struct iwl_fw_ini_error_dump_range);
1895
1896         return size;
1897 }
1898
1899 /**
1900  * struct iwl_dump_ini_mem_ops - ini memory dump operations
1901  * @get_num_of_ranges: returns the number of memory ranges in the region.
1902  * @get_size: returns the total size of the region.
1903  * @fill_mem_hdr: fills region type specific headers and returns pointer to
1904  *      the first range or NULL if failed to fill headers.
1905  * @fill_range: copies a given memory range into the dump.
1906  *      Returns the size of the range or negative error value otherwise.
1907  */
1908 struct iwl_dump_ini_mem_ops {
1909         u32 (*get_num_of_ranges)(struct iwl_fw_runtime *fwrt,
1910                                  struct iwl_dump_ini_region_data *reg_data);
1911         u32 (*get_size)(struct iwl_fw_runtime *fwrt,
1912                         struct iwl_dump_ini_region_data *reg_data);
1913         void *(*fill_mem_hdr)(struct iwl_fw_runtime *fwrt,
1914                               struct iwl_dump_ini_region_data *reg_data,
1915                               void *data);
1916         int (*fill_range)(struct iwl_fw_runtime *fwrt,
1917                           struct iwl_dump_ini_region_data *reg_data,
1918                           void *range, int idx);
1919 };
1920
1921 /**
1922  * iwl_dump_ini_mem
1923  *
1924  * Creates a dump tlv and copy a memory region into it.
1925  * Returns the size of the current dump tlv or 0 if failed
1926  *
1927  * @fwrt: fw runtime struct
1928  * @list: list to add the dump tlv to
1929  * @reg_data: memory region
1930  * @ops: memory dump operations
1931  */
1932 static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list,
1933                             struct iwl_dump_ini_region_data *reg_data,
1934                             const struct iwl_dump_ini_mem_ops *ops)
1935 {
1936         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1937         struct iwl_fw_ini_dump_entry *entry;
1938         struct iwl_fw_error_dump_data *tlv;
1939         struct iwl_fw_ini_error_dump_header *header;
1940         u32 type = le32_to_cpu(reg->type), id = le32_to_cpu(reg->id);
1941         u32 num_of_ranges, i, size;
1942         void *range;
1943
1944         if (!ops->get_num_of_ranges || !ops->get_size || !ops->fill_mem_hdr ||
1945             !ops->fill_range)
1946                 return 0;
1947
1948         size = ops->get_size(fwrt, reg_data);
1949         if (!size)
1950                 return 0;
1951
1952         entry = vzalloc(sizeof(*entry) + sizeof(*tlv) + size);
1953         if (!entry)
1954                 return 0;
1955
1956         entry->size = sizeof(*tlv) + size;
1957
1958         tlv = (void *)entry->data;
1959         tlv->type = reg->type;
1960         tlv->len = cpu_to_le32(size);
1961
1962         IWL_DEBUG_FW(fwrt, "WRT: Collecting region: id=%d, type=%d\n", id,
1963                      type);
1964
1965         num_of_ranges = ops->get_num_of_ranges(fwrt, reg_data);
1966
1967         header = (void *)tlv->data;
1968         header->region_id = reg->id;
1969         header->num_of_ranges = cpu_to_le32(num_of_ranges);
1970         header->name_len = cpu_to_le32(IWL_FW_INI_MAX_NAME);
1971         memcpy(header->name, reg->name, IWL_FW_INI_MAX_NAME);
1972
1973         range = ops->fill_mem_hdr(fwrt, reg_data, header);
1974         if (!range) {
1975                 IWL_ERR(fwrt,
1976                         "WRT: Failed to fill region header: id=%d, type=%d\n",
1977                         id, type);
1978                 goto out_err;
1979         }
1980
1981         for (i = 0; i < num_of_ranges; i++) {
1982                 int range_size = ops->fill_range(fwrt, reg_data, range, i);
1983
1984                 if (range_size < 0) {
1985                         IWL_ERR(fwrt,
1986                                 "WRT: Failed to dump region: id=%d, type=%d\n",
1987                                 id, type);
1988                         goto out_err;
1989                 }
1990                 range = range + range_size;
1991         }
1992
1993         list_add_tail(&entry->list, list);
1994
1995         return entry->size;
1996
1997 out_err:
1998         vfree(entry);
1999
2000         return 0;
2001 }
2002
2003 static u32 iwl_dump_ini_info(struct iwl_fw_runtime *fwrt,
2004                              struct iwl_fw_ini_trigger_tlv *trigger,
2005                              struct list_head *list)
2006 {
2007         struct iwl_fw_ini_dump_entry *entry;
2008         struct iwl_fw_error_dump_data *tlv;
2009         struct iwl_fw_ini_dump_info *dump;
2010         struct iwl_dbg_tlv_node *node;
2011         struct iwl_fw_ini_dump_cfg_name *cfg_name;
2012         u32 size = sizeof(*tlv) + sizeof(*dump);
2013         u32 num_of_cfg_names = 0;
2014         u32 hw_type;
2015
2016         list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2017                 size += sizeof(*cfg_name);
2018                 num_of_cfg_names++;
2019         }
2020
2021         entry = vzalloc(sizeof(*entry) + size);
2022         if (!entry)
2023                 return 0;
2024
2025         entry->size = size;
2026
2027         tlv = (void *)entry->data;
2028         tlv->type = cpu_to_le32(IWL_INI_DUMP_INFO_TYPE);
2029         tlv->len = cpu_to_le32(size - sizeof(*tlv));
2030
2031         dump = (void *)tlv->data;
2032
2033         dump->version = cpu_to_le32(IWL_INI_DUMP_VER);
2034         dump->time_point = trigger->time_point;
2035         dump->trigger_reason = trigger->trigger_reason;
2036         dump->external_cfg_state =
2037                 cpu_to_le32(fwrt->trans->dbg.external_ini_cfg);
2038
2039         dump->ver_type = cpu_to_le32(fwrt->dump.fw_ver.type);
2040         dump->ver_subtype = cpu_to_le32(fwrt->dump.fw_ver.subtype);
2041
2042         dump->hw_step = cpu_to_le32(CSR_HW_REV_STEP(fwrt->trans->hw_rev));
2043
2044         /*
2045          * Several HWs all have type == 0x42, so we'll override this value
2046          * according to the detected HW
2047          */
2048         hw_type = CSR_HW_REV_TYPE(fwrt->trans->hw_rev);
2049         if (hw_type == IWL_AX210_HW_TYPE) {
2050                 u32 prph_val = iwl_read_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR);
2051                 u32 is_jacket = !!(prph_val & WFPM_OTP_CFG1_IS_JACKET_BIT);
2052                 u32 is_cdb = !!(prph_val & WFPM_OTP_CFG1_IS_CDB_BIT);
2053                 u32 masked_bits = is_jacket | (is_cdb << 1);
2054
2055                 /*
2056                  * The HW type depends on certain bits in this case, so add
2057                  * these bits to the HW type. We won't have collisions since we
2058                  * add these bits after the highest possible bit in the mask.
2059                  */
2060                 hw_type |= masked_bits << IWL_AX210_HW_TYPE_ADDITION_SHIFT;
2061         }
2062         dump->hw_type = cpu_to_le32(hw_type);
2063
2064         dump->rf_id_flavor =
2065                 cpu_to_le32(CSR_HW_RFID_FLAVOR(fwrt->trans->hw_rf_id));
2066         dump->rf_id_dash = cpu_to_le32(CSR_HW_RFID_DASH(fwrt->trans->hw_rf_id));
2067         dump->rf_id_step = cpu_to_le32(CSR_HW_RFID_STEP(fwrt->trans->hw_rf_id));
2068         dump->rf_id_type = cpu_to_le32(CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id));
2069
2070         dump->lmac_major = cpu_to_le32(fwrt->dump.fw_ver.lmac_major);
2071         dump->lmac_minor = cpu_to_le32(fwrt->dump.fw_ver.lmac_minor);
2072         dump->umac_major = cpu_to_le32(fwrt->dump.fw_ver.umac_major);
2073         dump->umac_minor = cpu_to_le32(fwrt->dump.fw_ver.umac_minor);
2074
2075         dump->fw_mon_mode = cpu_to_le32(fwrt->trans->dbg.ini_dest);
2076         dump->regions_mask = trigger->regions_mask;
2077
2078         dump->build_tag_len = cpu_to_le32(sizeof(dump->build_tag));
2079         memcpy(dump->build_tag, fwrt->fw->human_readable,
2080                sizeof(dump->build_tag));
2081
2082         cfg_name = dump->cfg_names;
2083         dump->num_of_cfg_names = cpu_to_le32(num_of_cfg_names);
2084         list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2085                 struct iwl_fw_ini_debug_info_tlv *debug_info =
2086                         (void *)node->tlv.data;
2087
2088                 cfg_name->image_type = debug_info->image_type;
2089                 cfg_name->cfg_name_len =
2090                         cpu_to_le32(IWL_FW_INI_MAX_CFG_NAME);
2091                 memcpy(cfg_name->cfg_name, debug_info->debug_cfg_name,
2092                        sizeof(cfg_name->cfg_name));
2093                 cfg_name++;
2094         }
2095
2096         /* add dump info TLV to the beginning of the list since it needs to be
2097          * the first TLV in the dump
2098          */
2099         list_add(&entry->list, list);
2100
2101         return entry->size;
2102 }
2103
2104 static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = {
2105         [IWL_FW_INI_REGION_INVALID] = {},
2106         [IWL_FW_INI_REGION_INTERNAL_BUFFER] = {
2107                 .get_num_of_ranges = iwl_dump_ini_single_range,
2108                 .get_size = iwl_dump_ini_mon_smem_get_size,
2109                 .fill_mem_hdr = iwl_dump_ini_mon_smem_fill_header,
2110                 .fill_range = iwl_dump_ini_mon_smem_iter,
2111         },
2112         [IWL_FW_INI_REGION_DRAM_BUFFER] = {
2113                 .get_num_of_ranges = iwl_dump_ini_mon_dram_ranges,
2114                 .get_size = iwl_dump_ini_mon_dram_get_size,
2115                 .fill_mem_hdr = iwl_dump_ini_mon_dram_fill_header,
2116                 .fill_range = iwl_dump_ini_mon_dram_iter,
2117         },
2118         [IWL_FW_INI_REGION_TXF] = {
2119                 .get_num_of_ranges = iwl_dump_ini_txf_ranges,
2120                 .get_size = iwl_dump_ini_txf_get_size,
2121                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2122                 .fill_range = iwl_dump_ini_txf_iter,
2123         },
2124         [IWL_FW_INI_REGION_RXF] = {
2125                 .get_num_of_ranges = iwl_dump_ini_single_range,
2126                 .get_size = iwl_dump_ini_rxf_get_size,
2127                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2128                 .fill_range = iwl_dump_ini_rxf_iter,
2129         },
2130         [IWL_FW_INI_REGION_LMAC_ERROR_TABLE] = {
2131                 .get_num_of_ranges = iwl_dump_ini_single_range,
2132                 .get_size = iwl_dump_ini_err_table_get_size,
2133                 .fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
2134                 .fill_range = iwl_dump_ini_err_table_iter,
2135         },
2136         [IWL_FW_INI_REGION_UMAC_ERROR_TABLE] = {
2137                 .get_num_of_ranges = iwl_dump_ini_single_range,
2138                 .get_size = iwl_dump_ini_err_table_get_size,
2139                 .fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
2140                 .fill_range = iwl_dump_ini_err_table_iter,
2141         },
2142         [IWL_FW_INI_REGION_RSP_OR_NOTIF] = {
2143                 .get_num_of_ranges = iwl_dump_ini_single_range,
2144                 .get_size = iwl_dump_ini_fw_pkt_get_size,
2145                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2146                 .fill_range = iwl_dump_ini_fw_pkt_iter,
2147         },
2148         [IWL_FW_INI_REGION_DEVICE_MEMORY] = {
2149                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2150                 .get_size = iwl_dump_ini_mem_get_size,
2151                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2152                 .fill_range = iwl_dump_ini_dev_mem_iter,
2153         },
2154         [IWL_FW_INI_REGION_PERIPHERY_MAC] = {
2155                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2156                 .get_size = iwl_dump_ini_mem_get_size,
2157                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2158                 .fill_range = iwl_dump_ini_prph_mac_iter,
2159         },
2160         [IWL_FW_INI_REGION_PERIPHERY_PHY] = {
2161                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2162                 .get_size = iwl_dump_ini_mem_get_size,
2163                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2164                 .fill_range = iwl_dump_ini_prph_phy_iter,
2165         },
2166         [IWL_FW_INI_REGION_PERIPHERY_AUX] = {},
2167         [IWL_FW_INI_REGION_PAGING] = {
2168                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2169                 .get_num_of_ranges = iwl_dump_ini_paging_ranges,
2170                 .get_size = iwl_dump_ini_paging_get_size,
2171                 .fill_range = iwl_dump_ini_paging_iter,
2172         },
2173         [IWL_FW_INI_REGION_CSR] = {
2174                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2175                 .get_size = iwl_dump_ini_mem_get_size,
2176                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2177                 .fill_range = iwl_dump_ini_csr_iter,
2178         },
2179         [IWL_FW_INI_REGION_DRAM_IMR] = {},
2180         [IWL_FW_INI_REGION_PCI_IOSF_CONFIG] = {
2181                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2182                 .get_size = iwl_dump_ini_mem_get_size,
2183                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2184                 .fill_range = iwl_dump_ini_config_iter,
2185         },
2186         [IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY] = {
2187                 .get_num_of_ranges = iwl_dump_ini_single_range,
2188                 .get_size = iwl_dump_ini_special_mem_get_size,
2189                 .fill_mem_hdr = iwl_dump_ini_special_mem_fill_header,
2190                 .fill_range = iwl_dump_ini_special_mem_iter,
2191         },
2192 };
2193
2194 static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
2195                                 struct iwl_fwrt_dump_data *dump_data,
2196                                 struct list_head *list)
2197 {
2198         struct iwl_fw_ini_trigger_tlv *trigger = dump_data->trig;
2199         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trigger->time_point);
2200         struct iwl_dump_ini_region_data reg_data = {
2201                 .dump_data = dump_data,
2202         };
2203         int i;
2204         u32 size = 0;
2205         u64 regions_mask = le64_to_cpu(trigger->regions_mask);
2206
2207         BUILD_BUG_ON(sizeof(trigger->regions_mask) != sizeof(regions_mask));
2208         BUILD_BUG_ON((sizeof(trigger->regions_mask) * BITS_PER_BYTE) <
2209                      ARRAY_SIZE(fwrt->trans->dbg.active_regions));
2210
2211         for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions); i++) {
2212                 u32 reg_type;
2213                 struct iwl_fw_ini_region_tlv *reg;
2214
2215                 if (!(BIT_ULL(i) & regions_mask))
2216                         continue;
2217
2218                 reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2219                 if (!reg_data.reg_tlv) {
2220                         IWL_WARN(fwrt,
2221                                  "WRT: Unassigned region id %d, skipping\n", i);
2222                         continue;
2223                 }
2224
2225                 reg = (void *)reg_data.reg_tlv->data;
2226                 reg_type = le32_to_cpu(reg->type);
2227                 if (reg_type >= ARRAY_SIZE(iwl_dump_ini_region_ops))
2228                         continue;
2229
2230                 if (reg_type == IWL_FW_INI_REGION_PERIPHERY_PHY &&
2231                     tp_id != IWL_FW_INI_TIME_POINT_FW_ASSERT) {
2232                         IWL_WARN(fwrt,
2233                                  "WRT: trying to collect phy prph at time point: %d, skipping\n",
2234                                  tp_id);
2235                         continue;
2236                 }
2237
2238                 size += iwl_dump_ini_mem(fwrt, list, &reg_data,
2239                                          &iwl_dump_ini_region_ops[reg_type]);
2240         }
2241
2242         if (size)
2243                 size += iwl_dump_ini_info(fwrt, trigger, list);
2244
2245         return size;
2246 }
2247
2248 static bool iwl_fw_ini_trigger_on(struct iwl_fw_runtime *fwrt,
2249                                   struct iwl_fw_ini_trigger_tlv *trig)
2250 {
2251         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trig->time_point);
2252         u32 usec = le32_to_cpu(trig->ignore_consec);
2253
2254         if (!iwl_trans_dbg_ini_valid(fwrt->trans) ||
2255             tp_id == IWL_FW_INI_TIME_POINT_INVALID ||
2256             tp_id >= IWL_FW_INI_TIME_POINT_NUM ||
2257             iwl_fw_dbg_no_trig_window(fwrt, tp_id, usec))
2258                 return false;
2259
2260         return true;
2261 }
2262
2263 static u32 iwl_dump_ini_file_gen(struct iwl_fw_runtime *fwrt,
2264                                  struct iwl_fwrt_dump_data *dump_data,
2265                                  struct list_head *list)
2266 {
2267         struct iwl_fw_ini_trigger_tlv *trigger = dump_data->trig;
2268         struct iwl_fw_ini_dump_entry *entry;
2269         struct iwl_fw_ini_dump_file_hdr *hdr;
2270         u32 size;
2271
2272         if (!trigger || !iwl_fw_ini_trigger_on(fwrt, trigger) ||
2273             !le64_to_cpu(trigger->regions_mask))
2274                 return 0;
2275
2276         entry = vzalloc(sizeof(*entry) + sizeof(*hdr));
2277         if (!entry)
2278                 return 0;
2279
2280         entry->size = sizeof(*hdr);
2281
2282         size = iwl_dump_ini_trigger(fwrt, dump_data, list);
2283         if (!size) {
2284                 vfree(entry);
2285                 return 0;
2286         }
2287
2288         hdr = (void *)entry->data;
2289         hdr->barker = cpu_to_le32(IWL_FW_INI_ERROR_DUMP_BARKER);
2290         hdr->file_len = cpu_to_le32(size + entry->size);
2291
2292         list_add(&entry->list, list);
2293
2294         return le32_to_cpu(hdr->file_len);
2295 }
2296
2297 static inline void iwl_fw_free_dump_desc(struct iwl_fw_runtime *fwrt,
2298                                          const struct iwl_fw_dump_desc *desc)
2299 {
2300         if (desc && desc != &iwl_dump_desc_assert)
2301                 kfree(desc);
2302
2303         fwrt->dump.lmac_err_id[0] = 0;
2304         if (fwrt->smem_cfg.num_lmacs > 1)
2305                 fwrt->dump.lmac_err_id[1] = 0;
2306         fwrt->dump.umac_err_id = 0;
2307 }
2308
2309 static void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt,
2310                               struct iwl_fwrt_dump_data *dump_data)
2311 {
2312         struct iwl_fw_dump_ptrs fw_error_dump = {};
2313         struct iwl_fw_error_dump_file *dump_file;
2314         struct scatterlist *sg_dump_data;
2315         u32 file_len;
2316         u32 dump_mask = fwrt->fw->dbg.dump_mask;
2317
2318         dump_file = iwl_fw_error_dump_file(fwrt, &fw_error_dump, dump_data);
2319         if (!dump_file)
2320                 return;
2321
2322         if (dump_data->monitor_only)
2323                 dump_mask &= IWL_FW_ERROR_DUMP_FW_MONITOR;
2324
2325         fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask);
2326         file_len = le32_to_cpu(dump_file->file_len);
2327         fw_error_dump.fwrt_len = file_len;
2328
2329         if (fw_error_dump.trans_ptr) {
2330                 file_len += fw_error_dump.trans_ptr->len;
2331                 dump_file->file_len = cpu_to_le32(file_len);
2332         }
2333
2334         sg_dump_data = alloc_sgtable(file_len);
2335         if (sg_dump_data) {
2336                 sg_pcopy_from_buffer(sg_dump_data,
2337                                      sg_nents(sg_dump_data),
2338                                      fw_error_dump.fwrt_ptr,
2339                                      fw_error_dump.fwrt_len, 0);
2340                 if (fw_error_dump.trans_ptr)
2341                         sg_pcopy_from_buffer(sg_dump_data,
2342                                              sg_nents(sg_dump_data),
2343                                              fw_error_dump.trans_ptr->data,
2344                                              fw_error_dump.trans_ptr->len,
2345                                              fw_error_dump.fwrt_len);
2346                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2347                                GFP_KERNEL);
2348         }
2349         vfree(fw_error_dump.fwrt_ptr);
2350         vfree(fw_error_dump.trans_ptr);
2351 }
2352
2353 static void iwl_dump_ini_list_free(struct list_head *list)
2354 {
2355         while (!list_empty(list)) {
2356                 struct iwl_fw_ini_dump_entry *entry =
2357                         list_entry(list->next, typeof(*entry), list);
2358
2359                 list_del(&entry->list);
2360                 vfree(entry);
2361         }
2362 }
2363
2364 static void iwl_fw_error_dump_data_free(struct iwl_fwrt_dump_data *dump_data)
2365 {
2366         dump_data->trig = NULL;
2367         kfree(dump_data->fw_pkt);
2368         dump_data->fw_pkt = NULL;
2369 }
2370
2371 static void iwl_fw_error_ini_dump(struct iwl_fw_runtime *fwrt,
2372                                   struct iwl_fwrt_dump_data *dump_data)
2373 {
2374         struct list_head dump_list = LIST_HEAD_INIT(dump_list);
2375         struct scatterlist *sg_dump_data;
2376         u32 file_len = iwl_dump_ini_file_gen(fwrt, dump_data, &dump_list);
2377
2378         if (!file_len)
2379                 return;
2380
2381         sg_dump_data = alloc_sgtable(file_len);
2382         if (sg_dump_data) {
2383                 struct iwl_fw_ini_dump_entry *entry;
2384                 int sg_entries = sg_nents(sg_dump_data);
2385                 u32 offs = 0;
2386
2387                 list_for_each_entry(entry, &dump_list, list) {
2388                         sg_pcopy_from_buffer(sg_dump_data, sg_entries,
2389                                              entry->data, entry->size, offs);
2390                         offs += entry->size;
2391                 }
2392                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2393                                GFP_KERNEL);
2394         }
2395         iwl_dump_ini_list_free(&dump_list);
2396 }
2397
2398 const struct iwl_fw_dump_desc iwl_dump_desc_assert = {
2399         .trig_desc = {
2400                 .type = cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT),
2401         },
2402 };
2403 IWL_EXPORT_SYMBOL(iwl_dump_desc_assert);
2404
2405 int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime *fwrt,
2406                             const struct iwl_fw_dump_desc *desc,
2407                             bool monitor_only,
2408                             unsigned int delay)
2409 {
2410         struct iwl_fwrt_wk_data *wk_data;
2411         unsigned long idx;
2412
2413         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2414                 iwl_fw_free_dump_desc(fwrt, desc);
2415                 return 0;
2416         }
2417
2418         /*
2419          * Check there is an available worker.
2420          * ffz return value is undefined if no zero exists,
2421          * so check against ~0UL first.
2422          */
2423         if (fwrt->dump.active_wks == ~0UL)
2424                 return -EBUSY;
2425
2426         idx = ffz(fwrt->dump.active_wks);
2427
2428         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
2429             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
2430                 return -EBUSY;
2431
2432         wk_data = &fwrt->dump.wks[idx];
2433
2434         if (WARN_ON(wk_data->dump_data.desc))
2435                 iwl_fw_free_dump_desc(fwrt, wk_data->dump_data.desc);
2436
2437         wk_data->dump_data.desc = desc;
2438         wk_data->dump_data.monitor_only = monitor_only;
2439
2440         IWL_WARN(fwrt, "Collecting data: trigger %d fired.\n",
2441                  le32_to_cpu(desc->trig_desc.type));
2442
2443         schedule_delayed_work(&wk_data->wk, usecs_to_jiffies(delay));
2444
2445         return 0;
2446 }
2447 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_desc);
2448
2449 int iwl_fw_dbg_error_collect(struct iwl_fw_runtime *fwrt,
2450                              enum iwl_fw_dbg_trigger trig_type)
2451 {
2452         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status))
2453                 return -EIO;
2454
2455         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2456                 if (trig_type != FW_DBG_TRIGGER_ALIVE_TIMEOUT)
2457                         return -EIO;
2458
2459                 iwl_dbg_tlv_time_point(fwrt,
2460                                        IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
2461                                        NULL);
2462         } else {
2463                 struct iwl_fw_dump_desc *iwl_dump_error_desc;
2464                 int ret;
2465
2466                 iwl_dump_error_desc =
2467                         kmalloc(sizeof(*iwl_dump_error_desc), GFP_KERNEL);
2468
2469                 if (!iwl_dump_error_desc)
2470                         return -ENOMEM;
2471
2472                 iwl_dump_error_desc->trig_desc.type = cpu_to_le32(trig_type);
2473                 iwl_dump_error_desc->len = 0;
2474
2475                 ret = iwl_fw_dbg_collect_desc(fwrt, iwl_dump_error_desc,
2476                                               false, 0);
2477                 if (ret) {
2478                         kfree(iwl_dump_error_desc);
2479                         return ret;
2480                 }
2481         }
2482
2483         iwl_trans_sync_nmi(fwrt->trans);
2484
2485         return 0;
2486 }
2487 IWL_EXPORT_SYMBOL(iwl_fw_dbg_error_collect);
2488
2489 int iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt,
2490                        enum iwl_fw_dbg_trigger trig,
2491                        const char *str, size_t len,
2492                        struct iwl_fw_dbg_trigger_tlv *trigger)
2493 {
2494         struct iwl_fw_dump_desc *desc;
2495         unsigned int delay = 0;
2496         bool monitor_only = false;
2497
2498         if (trigger) {
2499                 u16 occurrences = le16_to_cpu(trigger->occurrences) - 1;
2500
2501                 if (!le16_to_cpu(trigger->occurrences))
2502                         return 0;
2503
2504                 if (trigger->flags & IWL_FW_DBG_FORCE_RESTART) {
2505                         IWL_WARN(fwrt, "Force restart: trigger %d fired.\n",
2506                                  trig);
2507                         iwl_force_nmi(fwrt->trans);
2508                         return 0;
2509                 }
2510
2511                 trigger->occurrences = cpu_to_le16(occurrences);
2512                 monitor_only = trigger->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY;
2513
2514                 /* convert msec to usec */
2515                 delay = le32_to_cpu(trigger->stop_delay) * USEC_PER_MSEC;
2516         }
2517
2518         desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC);
2519         if (!desc)
2520                 return -ENOMEM;
2521
2522
2523         desc->len = len;
2524         desc->trig_desc.type = cpu_to_le32(trig);
2525         memcpy(desc->trig_desc.data, str, len);
2526
2527         return iwl_fw_dbg_collect_desc(fwrt, desc, monitor_only, delay);
2528 }
2529 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect);
2530
2531 int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt,
2532                            struct iwl_fwrt_dump_data *dump_data)
2533 {
2534         struct iwl_fw_ini_trigger_tlv *trig = dump_data->trig;
2535         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trig->time_point);
2536         u32 occur, delay;
2537         unsigned long idx;
2538
2539         if (!iwl_fw_ini_trigger_on(fwrt, trig)) {
2540                 IWL_WARN(fwrt, "WRT: Trigger %d is not active, aborting dump\n",
2541                          tp_id);
2542                 return -EINVAL;
2543         }
2544
2545         delay = le32_to_cpu(trig->dump_delay);
2546         occur = le32_to_cpu(trig->occurrences);
2547         if (!occur)
2548                 return 0;
2549
2550         trig->occurrences = cpu_to_le32(--occur);
2551
2552         /* Check there is an available worker.
2553          * ffz return value is undefined if no zero exists,
2554          * so check against ~0UL first.
2555          */
2556         if (fwrt->dump.active_wks == ~0UL)
2557                 return -EBUSY;
2558
2559         idx = ffz(fwrt->dump.active_wks);
2560
2561         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
2562             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
2563                 return -EBUSY;
2564
2565         fwrt->dump.wks[idx].dump_data = *dump_data;
2566
2567         IWL_WARN(fwrt, "WRT: Collecting data: ini trigger %d fired.\n", tp_id);
2568
2569         schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay));
2570
2571         return 0;
2572 }
2573
2574 int iwl_fw_dbg_collect_trig(struct iwl_fw_runtime *fwrt,
2575                             struct iwl_fw_dbg_trigger_tlv *trigger,
2576                             const char *fmt, ...)
2577 {
2578         int ret, len = 0;
2579         char buf[64];
2580
2581         if (iwl_trans_dbg_ini_valid(fwrt->trans))
2582                 return 0;
2583
2584         if (fmt) {
2585                 va_list ap;
2586
2587                 buf[sizeof(buf) - 1] = '\0';
2588
2589                 va_start(ap, fmt);
2590                 vsnprintf(buf, sizeof(buf), fmt, ap);
2591                 va_end(ap);
2592
2593                 /* check for truncation */
2594                 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
2595                         buf[sizeof(buf) - 1] = '\0';
2596
2597                 len = strlen(buf) + 1;
2598         }
2599
2600         ret = iwl_fw_dbg_collect(fwrt, le32_to_cpu(trigger->id), buf, len,
2601                                  trigger);
2602
2603         if (ret)
2604                 return ret;
2605
2606         return 0;
2607 }
2608 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_trig);
2609
2610 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 conf_id)
2611 {
2612         u8 *ptr;
2613         int ret;
2614         int i;
2615
2616         if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg.conf_tlv),
2617                       "Invalid configuration %d\n", conf_id))
2618                 return -EINVAL;
2619
2620         /* EARLY START - firmware's configuration is hard coded */
2621         if ((!fwrt->fw->dbg.conf_tlv[conf_id] ||
2622              !fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds) &&
2623             conf_id == FW_DBG_START_FROM_ALIVE)
2624                 return 0;
2625
2626         if (!fwrt->fw->dbg.conf_tlv[conf_id])
2627                 return -EINVAL;
2628
2629         if (fwrt->dump.conf != FW_DBG_INVALID)
2630                 IWL_INFO(fwrt, "FW already configured (%d) - re-configuring\n",
2631                          fwrt->dump.conf);
2632
2633         /* Send all HCMDs for configuring the FW debug */
2634         ptr = (void *)&fwrt->fw->dbg.conf_tlv[conf_id]->hcmd;
2635         for (i = 0; i < fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds; i++) {
2636                 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
2637                 struct iwl_host_cmd hcmd = {
2638                         .id = cmd->id,
2639                         .len = { le16_to_cpu(cmd->len), },
2640                         .data = { cmd->data, },
2641                 };
2642
2643                 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
2644                 if (ret)
2645                         return ret;
2646
2647                 ptr += sizeof(*cmd);
2648                 ptr += le16_to_cpu(cmd->len);
2649         }
2650
2651         fwrt->dump.conf = conf_id;
2652
2653         return 0;
2654 }
2655 IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf);
2656
2657 /* this function assumes dump_start was called beforehand and dump_end will be
2658  * called afterwards
2659  */
2660 static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx)
2661 {
2662         struct iwl_fw_dbg_params params = {0};
2663         struct iwl_fwrt_dump_data *dump_data =
2664                 &fwrt->dump.wks[wk_idx].dump_data;
2665
2666         if (!test_bit(wk_idx, &fwrt->dump.active_wks))
2667                 return;
2668
2669         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status)) {
2670                 IWL_ERR(fwrt, "Device is not enabled - cannot dump error\n");
2671                 goto out;
2672         }
2673
2674         /* there's no point in fw dump if the bus is dead */
2675         if (test_bit(STATUS_TRANS_DEAD, &fwrt->trans->status)) {
2676                 IWL_ERR(fwrt, "Skip fw error dump since bus is dead\n");
2677                 goto out;
2678         }
2679
2680         iwl_fw_dbg_stop_restart_recording(fwrt, &params, true);
2681
2682         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection start\n");
2683         if (iwl_trans_dbg_ini_valid(fwrt->trans))
2684                 iwl_fw_error_ini_dump(fwrt, &fwrt->dump.wks[wk_idx].dump_data);
2685         else
2686                 iwl_fw_error_dump(fwrt, &fwrt->dump.wks[wk_idx].dump_data);
2687         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection done\n");
2688
2689         iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
2690
2691 out:
2692         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2693                 iwl_fw_error_dump_data_free(dump_data);
2694         } else {
2695                 iwl_fw_free_dump_desc(fwrt, dump_data->desc);
2696                 dump_data->desc = NULL;
2697         }
2698
2699         clear_bit(wk_idx, &fwrt->dump.active_wks);
2700 }
2701
2702 void iwl_fw_error_dump_wk(struct work_struct *work)
2703 {
2704         struct iwl_fwrt_wk_data *wks =
2705                 container_of(work, typeof(*wks), wk.work);
2706         struct iwl_fw_runtime *fwrt =
2707                 container_of(wks, typeof(*fwrt), dump.wks[wks->idx]);
2708
2709         /* assumes the op mode mutex is locked in dump_start since
2710          * iwl_fw_dbg_collect_sync can't run in parallel
2711          */
2712         if (fwrt->ops && fwrt->ops->dump_start &&
2713             fwrt->ops->dump_start(fwrt->ops_ctx))
2714                 return;
2715
2716         iwl_fw_dbg_collect_sync(fwrt, wks->idx);
2717
2718         if (fwrt->ops && fwrt->ops->dump_end)
2719                 fwrt->ops->dump_end(fwrt->ops_ctx);
2720 }
2721
2722 void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime *fwrt)
2723 {
2724         const struct iwl_cfg *cfg = fwrt->trans->cfg;
2725
2726         if (!iwl_fw_dbg_is_d3_debug_enabled(fwrt))
2727                 return;
2728
2729         if (!fwrt->dump.d3_debug_data) {
2730                 fwrt->dump.d3_debug_data = kmalloc(cfg->d3_debug_data_length,
2731                                                    GFP_KERNEL);
2732                 if (!fwrt->dump.d3_debug_data) {
2733                         IWL_ERR(fwrt,
2734                                 "failed to allocate memory for D3 debug data\n");
2735                         return;
2736                 }
2737         }
2738
2739         /* if the buffer holds previous debug data it is overwritten */
2740         iwl_trans_read_mem_bytes(fwrt->trans, cfg->d3_debug_data_base_addr,
2741                                  fwrt->dump.d3_debug_data,
2742                                  cfg->d3_debug_data_length);
2743 }
2744 IWL_EXPORT_SYMBOL(iwl_fw_dbg_read_d3_debug_data);
2745
2746 void iwl_fw_dbg_stop_sync(struct iwl_fw_runtime *fwrt)
2747 {
2748         int i;
2749
2750         iwl_dbg_tlv_del_timers(fwrt->trans);
2751         for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++)
2752                 iwl_fw_dbg_collect_sync(fwrt, i);
2753
2754         iwl_fw_dbg_stop_restart_recording(fwrt, NULL, true);
2755 }
2756 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_sync);
2757
2758 #define FSEQ_REG(x) { .addr = (x), .str = #x, }
2759
2760 void iwl_fw_error_print_fseq_regs(struct iwl_fw_runtime *fwrt)
2761 {
2762         struct iwl_trans *trans = fwrt->trans;
2763         unsigned long flags;
2764         int i;
2765         struct {
2766                 u32 addr;
2767                 const char *str;
2768         } fseq_regs[] = {
2769                 FSEQ_REG(FSEQ_ERROR_CODE),
2770                 FSEQ_REG(FSEQ_TOP_INIT_VERSION),
2771                 FSEQ_REG(FSEQ_CNVIO_INIT_VERSION),
2772                 FSEQ_REG(FSEQ_OTP_VERSION),
2773                 FSEQ_REG(FSEQ_TOP_CONTENT_VERSION),
2774                 FSEQ_REG(FSEQ_ALIVE_TOKEN),
2775                 FSEQ_REG(FSEQ_CNVI_ID),
2776                 FSEQ_REG(FSEQ_CNVR_ID),
2777                 FSEQ_REG(CNVI_AUX_MISC_CHIP),
2778                 FSEQ_REG(CNVR_AUX_MISC_CHIP),
2779                 FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM),
2780                 FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR),
2781         };
2782
2783         if (!iwl_trans_grab_nic_access(trans, &flags))
2784                 return;
2785
2786         IWL_ERR(fwrt, "Fseq Registers:\n");
2787
2788         for (i = 0; i < ARRAY_SIZE(fseq_regs); i++)
2789                 IWL_ERR(fwrt, "0x%08X | %s\n",
2790                         iwl_read_prph_no_grab(trans, fseq_regs[i].addr),
2791                         fseq_regs[i].str);
2792
2793         iwl_trans_release_nic_access(trans, &flags);
2794 }
2795 IWL_EXPORT_SYMBOL(iwl_fw_error_print_fseq_regs);
2796
2797 static int iwl_fw_dbg_suspend_resume_hcmd(struct iwl_trans *trans, bool suspend)
2798 {
2799         struct iwl_dbg_suspend_resume_cmd cmd = {
2800                 .operation = suspend ?
2801                         cpu_to_le32(DBGC_SUSPEND_CMD) :
2802                         cpu_to_le32(DBGC_RESUME_CMD),
2803         };
2804         struct iwl_host_cmd hcmd = {
2805                 .id = WIDE_ID(DEBUG_GROUP, DBGC_SUSPEND_RESUME),
2806                 .data[0] = &cmd,
2807                 .len[0] = sizeof(cmd),
2808         };
2809
2810         return iwl_trans_send_cmd(trans, &hcmd);
2811 }
2812
2813 static void iwl_fw_dbg_stop_recording(struct iwl_trans *trans,
2814                                       struct iwl_fw_dbg_params *params)
2815 {
2816         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
2817                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
2818                 return;
2819         }
2820
2821         if (params) {
2822                 params->in_sample = iwl_read_umac_prph(trans, DBGC_IN_SAMPLE);
2823                 params->out_ctrl = iwl_read_umac_prph(trans, DBGC_OUT_CTRL);
2824         }
2825
2826         iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, 0);
2827         /* wait for the DBGC to finish writing the internal buffer to DRAM to
2828          * avoid halting the HW while writing
2829          */
2830         usleep_range(700, 1000);
2831         iwl_write_umac_prph(trans, DBGC_OUT_CTRL, 0);
2832 }
2833
2834 static int iwl_fw_dbg_restart_recording(struct iwl_trans *trans,
2835                                         struct iwl_fw_dbg_params *params)
2836 {
2837         if (!params)
2838                 return -EIO;
2839
2840         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
2841                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
2842                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
2843                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
2844         } else {
2845                 iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, params->in_sample);
2846                 iwl_write_umac_prph(trans, DBGC_OUT_CTRL, params->out_ctrl);
2847         }
2848
2849         return 0;
2850 }
2851
2852 void iwl_fw_dbg_stop_restart_recording(struct iwl_fw_runtime *fwrt,
2853                                        struct iwl_fw_dbg_params *params,
2854                                        bool stop)
2855 {
2856         int ret __maybe_unused = 0;
2857
2858         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
2859                 return;
2860
2861         if (fw_has_capa(&fwrt->fw->ucode_capa,
2862                         IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP))
2863                 ret = iwl_fw_dbg_suspend_resume_hcmd(fwrt->trans, stop);
2864         else if (stop)
2865                 iwl_fw_dbg_stop_recording(fwrt->trans, params);
2866         else
2867                 ret = iwl_fw_dbg_restart_recording(fwrt->trans, params);
2868 #ifdef CONFIG_IWLWIFI_DEBUGFS
2869         if (!ret) {
2870                 if (stop)
2871                         fwrt->trans->dbg.rec_on = false;
2872                 else
2873                         iwl_fw_set_dbg_rec_on(fwrt);
2874         }
2875 #endif
2876 }
2877 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_restart_recording);