drivers/net/wireless/ath/ath10k/core.c

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2005-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/firmware.h>
  10 #include <linux/of.h>
  11 #include <linux/property.h>
  12 #include <linux/dmi.h>
  13 #include <linux/ctype.h>
  14 #include <linux/pm_qos.h>
  15 #include <asm/byteorder.h>
  16
  17 #include "core.h"
  18 #include "mac.h"
  19 #include "htc.h"
  20 #include "hif.h"
  21 #include "wmi.h"
  22 #include "bmi.h"
  23 #include "debug.h"
  24 #include "htt.h"
  25 #include "testmode.h"
  26 #include "wmi-ops.h"
  27 #include "coredump.h"
  28
  29 unsigned int ath10k_debug_mask;
  30 EXPORT_SYMBOL(ath10k_debug_mask);
  31
  32 static unsigned int ath10k_cryptmode_param;
  33 static bool uart_print;
  34 static bool skip_otp;
  35 static bool rawmode;
  36 static bool fw_diag_log;
  37
  38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
  39                                      BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
  40
  41 /* FIXME: most of these should be readonly */
  42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  44 module_param(uart_print, bool, 0644);
  45 module_param(skip_otp, bool, 0644);
  46 module_param(rawmode, bool, 0644);
  47 module_param(fw_diag_log, bool, 0644);
  48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  49
  50 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  51 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
  57
  58 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  59         {
  60                 .id = QCA988X_HW_2_0_VERSION,
  61                 .dev_id = QCA988X_2_0_DEVICE_ID,
  62                 .bus = ATH10K_BUS_PCI,
  63                 .name = "qca988x hw2.0",
  64                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  65                 .uart_pin = 7,
  66                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  67                 .otp_exe_param = 0,
  68                 .channel_counters_freq_hz = 88000,
  69                 .max_probe_resp_desc_thres = 0,
  70                 .cal_data_len = 2116,
  71                 .fw = {
  72                         .dir = QCA988X_HW_2_0_FW_DIR,
  73                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  74                         .board_size = QCA988X_BOARD_DATA_SZ,
  75                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  76                 },
  77                 .hw_ops = &qca988x_ops,
  78                 .decap_align_bytes = 4,
  79                 .spectral_bin_discard = 0,
  80                 .spectral_bin_offset = 0,
  81                 .vht160_mcs_rx_highest = 0,
  82                 .vht160_mcs_tx_highest = 0,
  83                 .n_cipher_suites = 8,
  84                 .ast_skid_limit = 0x10,
  85                 .num_wds_entries = 0x20,
  86                 .target_64bit = false,
  87                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  88                 .shadow_reg_support = false,
  89                 .rri_on_ddr = false,
  90                 .hw_filter_reset_required = true,
  91                 .fw_diag_ce_download = false,
  92                 .tx_stats_over_pktlog = true,
  93         },
  94         {
  95                 .id = QCA988X_HW_2_0_VERSION,
  96                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
  97                 .name = "qca988x hw2.0 ubiquiti",
  98                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  99                 .uart_pin = 7,
 100                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 101                 .otp_exe_param = 0,
 102                 .channel_counters_freq_hz = 88000,
 103                 .max_probe_resp_desc_thres = 0,
 104                 .cal_data_len = 2116,
 105                 .fw = {
 106                         .dir = QCA988X_HW_2_0_FW_DIR,
 107                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 108                         .board_size = QCA988X_BOARD_DATA_SZ,
 109                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 110                 },
 111                 .hw_ops = &qca988x_ops,
 112                 .decap_align_bytes = 4,
 113                 .spectral_bin_discard = 0,
 114                 .spectral_bin_offset = 0,
 115                 .vht160_mcs_rx_highest = 0,
 116                 .vht160_mcs_tx_highest = 0,
 117                 .n_cipher_suites = 8,
 118                 .ast_skid_limit = 0x10,
 119                 .num_wds_entries = 0x20,
 120                 .target_64bit = false,
 121                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 122                 .per_ce_irq = false,
 123                 .shadow_reg_support = false,
 124                 .rri_on_ddr = false,
 125                 .hw_filter_reset_required = true,
 126                 .fw_diag_ce_download = false,
 127                 .tx_stats_over_pktlog = true,
 128         },
 129         {
 130                 .id = QCA9887_HW_1_0_VERSION,
 131                 .dev_id = QCA9887_1_0_DEVICE_ID,
 132                 .bus = ATH10K_BUS_PCI,
 133                 .name = "qca9887 hw1.0",
 134                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 135                 .uart_pin = 7,
 136                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 137                 .otp_exe_param = 0,
 138                 .channel_counters_freq_hz = 88000,
 139                 .max_probe_resp_desc_thres = 0,
 140                 .cal_data_len = 2116,
 141                 .fw = {
 142                         .dir = QCA9887_HW_1_0_FW_DIR,
 143                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 144                         .board_size = QCA9887_BOARD_DATA_SZ,
 145                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 146                 },
 147                 .hw_ops = &qca988x_ops,
 148                 .decap_align_bytes = 4,
 149                 .spectral_bin_discard = 0,
 150                 .spectral_bin_offset = 0,
 151                 .vht160_mcs_rx_highest = 0,
 152                 .vht160_mcs_tx_highest = 0,
 153                 .n_cipher_suites = 8,
 154                 .ast_skid_limit = 0x10,
 155                 .num_wds_entries = 0x20,
 156                 .target_64bit = false,
 157                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 158                 .per_ce_irq = false,
 159                 .shadow_reg_support = false,
 160                 .rri_on_ddr = false,
 161                 .hw_filter_reset_required = true,
 162                 .fw_diag_ce_download = false,
 163                 .tx_stats_over_pktlog = false,
 164         },
 165         {
 166                 .id = QCA6174_HW_3_2_VERSION,
 167                 .dev_id = QCA6174_3_2_DEVICE_ID,
 168                 .bus = ATH10K_BUS_SDIO,
 169                 .name = "qca6174 hw3.2 sdio",
 170                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 171                 .uart_pin = 19,
 172                 .otp_exe_param = 0,
 173                 .channel_counters_freq_hz = 88000,
 174                 .max_probe_resp_desc_thres = 0,
 175                 .cal_data_len = 0,
 176                 .fw = {
 177                         .dir = QCA6174_HW_3_0_FW_DIR,
 178                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 179                         .board_size = QCA6174_BOARD_DATA_SZ,
 180                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 181                 },
 182                 .hw_ops = &qca6174_sdio_ops,
 183                 .hw_clk = qca6174_clk,
 184                 .target_cpu_freq = 176000000,
 185                 .decap_align_bytes = 4,
 186                 .n_cipher_suites = 8,
 187                 .num_peers = 10,
 188                 .ast_skid_limit = 0x10,
 189                 .num_wds_entries = 0x20,
 190                 .uart_pin_workaround = true,
 191                 .tx_stats_over_pktlog = false,
 192                 .bmi_large_size_download = true,
 193         },
 194         {
 195                 .id = QCA6174_HW_2_1_VERSION,
 196                 .dev_id = QCA6164_2_1_DEVICE_ID,
 197                 .bus = ATH10K_BUS_PCI,
 198                 .name = "qca6164 hw2.1",
 199                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 200                 .uart_pin = 6,
 201                 .otp_exe_param = 0,
 202                 .channel_counters_freq_hz = 88000,
 203                 .max_probe_resp_desc_thres = 0,
 204                 .cal_data_len = 8124,
 205                 .fw = {
 206                         .dir = QCA6174_HW_2_1_FW_DIR,
 207                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 208                         .board_size = QCA6174_BOARD_DATA_SZ,
 209                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 210                 },
 211                 .hw_ops = &qca988x_ops,
 212                 .decap_align_bytes = 4,
 213                 .spectral_bin_discard = 0,
 214                 .spectral_bin_offset = 0,
 215                 .vht160_mcs_rx_highest = 0,
 216                 .vht160_mcs_tx_highest = 0,
 217                 .n_cipher_suites = 8,
 218                 .ast_skid_limit = 0x10,
 219                 .num_wds_entries = 0x20,
 220                 .target_64bit = false,
 221                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 222                 .per_ce_irq = false,
 223                 .shadow_reg_support = false,
 224                 .rri_on_ddr = false,
 225                 .hw_filter_reset_required = true,
 226                 .fw_diag_ce_download = false,
 227                 .tx_stats_over_pktlog = false,
 228         },
 229         {
 230                 .id = QCA6174_HW_2_1_VERSION,
 231                 .dev_id = QCA6174_2_1_DEVICE_ID,
 232                 .bus = ATH10K_BUS_PCI,
 233                 .name = "qca6174 hw2.1",
 234                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 235                 .uart_pin = 6,
 236                 .otp_exe_param = 0,
 237                 .channel_counters_freq_hz = 88000,
 238                 .max_probe_resp_desc_thres = 0,
 239                 .cal_data_len = 8124,
 240                 .fw = {
 241                         .dir = QCA6174_HW_2_1_FW_DIR,
 242                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 243                         .board_size = QCA6174_BOARD_DATA_SZ,
 244                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 245                 },
 246                 .hw_ops = &qca988x_ops,
 247                 .decap_align_bytes = 4,
 248                 .spectral_bin_discard = 0,
 249                 .spectral_bin_offset = 0,
 250                 .vht160_mcs_rx_highest = 0,
 251                 .vht160_mcs_tx_highest = 0,
 252                 .n_cipher_suites = 8,
 253                 .ast_skid_limit = 0x10,
 254                 .num_wds_entries = 0x20,
 255                 .target_64bit = false,
 256                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 257                 .per_ce_irq = false,
 258                 .shadow_reg_support = false,
 259                 .rri_on_ddr = false,
 260                 .hw_filter_reset_required = true,
 261                 .fw_diag_ce_download = false,
 262                 .tx_stats_over_pktlog = false,
 263         },
 264         {
 265                 .id = QCA6174_HW_3_0_VERSION,
 266                 .dev_id = QCA6174_2_1_DEVICE_ID,
 267                 .bus = ATH10K_BUS_PCI,
 268                 .name = "qca6174 hw3.0",
 269                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 270                 .uart_pin = 6,
 271                 .otp_exe_param = 0,
 272                 .channel_counters_freq_hz = 88000,
 273                 .max_probe_resp_desc_thres = 0,
 274                 .cal_data_len = 8124,
 275                 .fw = {
 276                         .dir = QCA6174_HW_3_0_FW_DIR,
 277                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 278                         .board_size = QCA6174_BOARD_DATA_SZ,
 279                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 280                 },
 281                 .hw_ops = &qca988x_ops,
 282                 .decap_align_bytes = 4,
 283                 .spectral_bin_discard = 0,
 284                 .spectral_bin_offset = 0,
 285                 .vht160_mcs_rx_highest = 0,
 286                 .vht160_mcs_tx_highest = 0,
 287                 .n_cipher_suites = 8,
 288                 .ast_skid_limit = 0x10,
 289                 .num_wds_entries = 0x20,
 290                 .target_64bit = false,
 291                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 292                 .per_ce_irq = false,
 293                 .shadow_reg_support = false,
 294                 .rri_on_ddr = false,
 295                 .hw_filter_reset_required = true,
 296                 .fw_diag_ce_download = false,
 297                 .tx_stats_over_pktlog = false,
 298         },
 299         {
 300                 .id = QCA6174_HW_3_2_VERSION,
 301                 .dev_id = QCA6174_2_1_DEVICE_ID,
 302                 .bus = ATH10K_BUS_PCI,
 303                 .name = "qca6174 hw3.2",
 304                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 305                 .uart_pin = 6,
 306                 .otp_exe_param = 0,
 307                 .channel_counters_freq_hz = 88000,
 308                 .max_probe_resp_desc_thres = 0,
 309                 .cal_data_len = 8124,
 310                 .fw = {
 311                         /* uses same binaries as hw3.0 */
 312                         .dir = QCA6174_HW_3_0_FW_DIR,
 313                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 314                         .board_size = QCA6174_BOARD_DATA_SZ,
 315                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 316                 },
 317                 .hw_ops = &qca6174_ops,
 318                 .hw_clk = qca6174_clk,
 319                 .target_cpu_freq = 176000000,
 320                 .decap_align_bytes = 4,
 321                 .spectral_bin_discard = 0,
 322                 .spectral_bin_offset = 0,
 323                 .vht160_mcs_rx_highest = 0,
 324                 .vht160_mcs_tx_highest = 0,
 325                 .n_cipher_suites = 8,
 326                 .ast_skid_limit = 0x10,
 327                 .num_wds_entries = 0x20,
 328                 .target_64bit = false,
 329                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 330                 .per_ce_irq = false,
 331                 .shadow_reg_support = false,
 332                 .rri_on_ddr = false,
 333                 .hw_filter_reset_required = true,
 334                 .fw_diag_ce_download = true,
 335                 .tx_stats_over_pktlog = false,
 336         },
 337         {
 338                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 339                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 340                 .bus = ATH10K_BUS_PCI,
 341                 .name = "qca99x0 hw2.0",
 342                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 343                 .uart_pin = 7,
 344                 .otp_exe_param = 0x00000700,
 345                 .continuous_frag_desc = true,
 346                 .cck_rate_map_rev2 = true,
 347                 .channel_counters_freq_hz = 150000,
 348                 .max_probe_resp_desc_thres = 24,
 349                 .tx_chain_mask = 0xf,
 350                 .rx_chain_mask = 0xf,
 351                 .max_spatial_stream = 4,
 352                 .cal_data_len = 12064,
 353                 .fw = {
 354                         .dir = QCA99X0_HW_2_0_FW_DIR,
 355                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 356                         .board_size = QCA99X0_BOARD_DATA_SZ,
 357                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 358                 },
 359                 .sw_decrypt_mcast_mgmt = true,
 360                 .hw_ops = &qca99x0_ops,
 361                 .decap_align_bytes = 1,
 362                 .spectral_bin_discard = 4,
 363                 .spectral_bin_offset = 0,
 364                 .vht160_mcs_rx_highest = 0,
 365                 .vht160_mcs_tx_highest = 0,
 366                 .n_cipher_suites = 11,
 367                 .ast_skid_limit = 0x10,
 368                 .num_wds_entries = 0x20,
 369                 .target_64bit = false,
 370                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 371                 .per_ce_irq = false,
 372                 .shadow_reg_support = false,
 373                 .rri_on_ddr = false,
 374                 .hw_filter_reset_required = true,
 375                 .fw_diag_ce_download = false,
 376                 .tx_stats_over_pktlog = false,
 377         },
 378         {
 379                 .id = QCA9984_HW_1_0_DEV_VERSION,
 380                 .dev_id = QCA9984_1_0_DEVICE_ID,
 381                 .bus = ATH10K_BUS_PCI,
 382                 .name = "qca9984/qca9994 hw1.0",
 383                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 384                 .uart_pin = 7,
 385                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 386                 .otp_exe_param = 0x00000700,
 387                 .continuous_frag_desc = true,
 388                 .cck_rate_map_rev2 = true,
 389                 .channel_counters_freq_hz = 150000,
 390                 .max_probe_resp_desc_thres = 24,
 391                 .tx_chain_mask = 0xf,
 392                 .rx_chain_mask = 0xf,
 393                 .max_spatial_stream = 4,
 394                 .cal_data_len = 12064,
 395                 .fw = {
 396                         .dir = QCA9984_HW_1_0_FW_DIR,
 397                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 398                         .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
 399                         .board_size = QCA99X0_BOARD_DATA_SZ,
 400                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 401                         .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
 402                 },
 403                 .sw_decrypt_mcast_mgmt = true,
 404                 .hw_ops = &qca99x0_ops,
 405                 .decap_align_bytes = 1,
 406                 .spectral_bin_discard = 12,
 407                 .spectral_bin_offset = 8,
 408
 409                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 410                  * or 2x2 160Mhz, long-guard-interval.
 411                  */
 412                 .vht160_mcs_rx_highest = 1560,
 413                 .vht160_mcs_tx_highest = 1560,
 414                 .n_cipher_suites = 11,
 415                 .ast_skid_limit = 0x10,
 416                 .num_wds_entries = 0x20,
 417                 .target_64bit = false,
 418                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 419                 .per_ce_irq = false,
 420                 .shadow_reg_support = false,
 421                 .rri_on_ddr = false,
 422                 .hw_filter_reset_required = true,
 423                 .fw_diag_ce_download = false,
 424                 .tx_stats_over_pktlog = false,
 425         },
 426         {
 427                 .id = QCA9888_HW_2_0_DEV_VERSION,
 428                 .dev_id = QCA9888_2_0_DEVICE_ID,
 429                 .bus = ATH10K_BUS_PCI,
 430                 .name = "qca9888 hw2.0",
 431                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 432                 .uart_pin = 7,
 433                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 434                 .otp_exe_param = 0x00000700,
 435                 .continuous_frag_desc = true,
 436                 .channel_counters_freq_hz = 150000,
 437                 .max_probe_resp_desc_thres = 24,
 438                 .tx_chain_mask = 3,
 439                 .rx_chain_mask = 3,
 440                 .max_spatial_stream = 2,
 441                 .cal_data_len = 12064,
 442                 .fw = {
 443                         .dir = QCA9888_HW_2_0_FW_DIR,
 444                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 445                         .board_size = QCA99X0_BOARD_DATA_SZ,
 446                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 447                 },
 448                 .sw_decrypt_mcast_mgmt = true,
 449                 .hw_ops = &qca99x0_ops,
 450                 .decap_align_bytes = 1,
 451                 .spectral_bin_discard = 12,
 452                 .spectral_bin_offset = 8,
 453
 454                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 455                  * 1x1 160Mhz, long-guard-interval.
 456                  */
 457                 .vht160_mcs_rx_highest = 780,
 458                 .vht160_mcs_tx_highest = 780,
 459                 .n_cipher_suites = 11,
 460                 .ast_skid_limit = 0x10,
 461                 .num_wds_entries = 0x20,
 462                 .target_64bit = false,
 463                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 464                 .per_ce_irq = false,
 465                 .shadow_reg_support = false,
 466                 .rri_on_ddr = false,
 467                 .hw_filter_reset_required = true,
 468                 .fw_diag_ce_download = false,
 469                 .tx_stats_over_pktlog = false,
 470         },
 471         {
 472                 .id = QCA9377_HW_1_0_DEV_VERSION,
 473                 .dev_id = QCA9377_1_0_DEVICE_ID,
 474                 .bus = ATH10K_BUS_PCI,
 475                 .name = "qca9377 hw1.0",
 476                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 477                 .uart_pin = 6,
 478                 .otp_exe_param = 0,
 479                 .channel_counters_freq_hz = 88000,
 480                 .max_probe_resp_desc_thres = 0,
 481                 .cal_data_len = 8124,
 482                 .fw = {
 483                         .dir = QCA9377_HW_1_0_FW_DIR,
 484                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 485                         .board_size = QCA9377_BOARD_DATA_SZ,
 486                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 487                 },
 488                 .hw_ops = &qca988x_ops,
 489                 .decap_align_bytes = 4,
 490                 .spectral_bin_discard = 0,
 491                 .spectral_bin_offset = 0,
 492                 .vht160_mcs_rx_highest = 0,
 493                 .vht160_mcs_tx_highest = 0,
 494                 .n_cipher_suites = 8,
 495                 .ast_skid_limit = 0x10,
 496                 .num_wds_entries = 0x20,
 497                 .target_64bit = false,
 498                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 499                 .per_ce_irq = false,
 500                 .shadow_reg_support = false,
 501                 .rri_on_ddr = false,
 502                 .hw_filter_reset_required = true,
 503                 .fw_diag_ce_download = false,
 504                 .tx_stats_over_pktlog = false,
 505         },
 506         {
 507                 .id = QCA9377_HW_1_1_DEV_VERSION,
 508                 .dev_id = QCA9377_1_0_DEVICE_ID,
 509                 .bus = ATH10K_BUS_PCI,
 510                 .name = "qca9377 hw1.1",
 511                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 512                 .uart_pin = 6,
 513                 .otp_exe_param = 0,
 514                 .channel_counters_freq_hz = 88000,
 515                 .max_probe_resp_desc_thres = 0,
 516                 .cal_data_len = 8124,
 517                 .fw = {
 518                         .dir = QCA9377_HW_1_0_FW_DIR,
 519                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 520                         .board_size = QCA9377_BOARD_DATA_SZ,
 521                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 522                 },
 523                 .hw_ops = &qca6174_ops,
 524                 .hw_clk = qca6174_clk,
 525                 .target_cpu_freq = 176000000,
 526                 .decap_align_bytes = 4,
 527                 .spectral_bin_discard = 0,
 528                 .spectral_bin_offset = 0,
 529                 .vht160_mcs_rx_highest = 0,
 530                 .vht160_mcs_tx_highest = 0,
 531                 .n_cipher_suites = 8,
 532                 .ast_skid_limit = 0x10,
 533                 .num_wds_entries = 0x20,
 534                 .target_64bit = false,
 535                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 536                 .per_ce_irq = false,
 537                 .shadow_reg_support = false,
 538                 .rri_on_ddr = false,
 539                 .hw_filter_reset_required = true,
 540                 .fw_diag_ce_download = true,
 541                 .tx_stats_over_pktlog = false,
 542         },
 543         {
 544                 .id = QCA9377_HW_1_1_DEV_VERSION,
 545                 .dev_id = QCA9377_1_0_DEVICE_ID,
 546                 .bus = ATH10K_BUS_SDIO,
 547                 .name = "qca9377 hw1.1 sdio",
 548                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 549                 .uart_pin = 19,
 550                 .otp_exe_param = 0,
 551                 .channel_counters_freq_hz = 88000,
 552                 .max_probe_resp_desc_thres = 0,
 553                 .cal_data_len = 8124,
 554                 .fw = {
 555                         .dir = QCA9377_HW_1_0_FW_DIR,
 556                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 557                         .board_size = QCA9377_BOARD_DATA_SZ,
 558                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 559                 },
 560                 .hw_ops = &qca6174_ops,
 561                 .hw_clk = qca6174_clk,
 562                 .target_cpu_freq = 176000000,
 563                 .decap_align_bytes = 4,
 564                 .n_cipher_suites = 8,
 565                 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
 566                 .ast_skid_limit = 0x10,
 567                 .num_wds_entries = 0x20,
 568                 .uart_pin_workaround = true,
 569         },
 570         {
 571                 .id = QCA4019_HW_1_0_DEV_VERSION,
 572                 .dev_id = 0,
 573                 .bus = ATH10K_BUS_AHB,
 574                 .name = "qca4019 hw1.0",
 575                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 576                 .uart_pin = 7,
 577                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 578                 .otp_exe_param = 0x0010000,
 579                 .continuous_frag_desc = true,
 580                 .cck_rate_map_rev2 = true,
 581                 .channel_counters_freq_hz = 125000,
 582                 .max_probe_resp_desc_thres = 24,
 583                 .tx_chain_mask = 0x3,
 584                 .rx_chain_mask = 0x3,
 585                 .max_spatial_stream = 2,
 586                 .cal_data_len = 12064,
 587                 .fw = {
 588                         .dir = QCA4019_HW_1_0_FW_DIR,
 589                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 590                         .board_size = QCA4019_BOARD_DATA_SZ,
 591                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 592                 },
 593                 .sw_decrypt_mcast_mgmt = true,
 594                 .hw_ops = &qca99x0_ops,
 595                 .decap_align_bytes = 1,
 596                 .spectral_bin_discard = 4,
 597                 .spectral_bin_offset = 0,
 598                 .vht160_mcs_rx_highest = 0,
 599                 .vht160_mcs_tx_highest = 0,
 600                 .n_cipher_suites = 11,
 601                 .ast_skid_limit = 0x10,
 602                 .num_wds_entries = 0x20,
 603                 .target_64bit = false,
 604                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 605                 .per_ce_irq = false,
 606                 .shadow_reg_support = false,
 607                 .rri_on_ddr = false,
 608                 .hw_filter_reset_required = true,
 609                 .fw_diag_ce_download = false,
 610                 .tx_stats_over_pktlog = false,
 611         },
 612         {
 613                 .id = WCN3990_HW_1_0_DEV_VERSION,
 614                 .dev_id = 0,
 615                 .bus = ATH10K_BUS_SNOC,
 616                 .name = "wcn3990 hw1.0",
 617                 .continuous_frag_desc = true,
 618                 .tx_chain_mask = 0x7,
 619                 .rx_chain_mask = 0x7,
 620                 .max_spatial_stream = 4,
 621                 .fw = {
 622                         .dir = WCN3990_HW_1_0_FW_DIR,
 623                 },
 624                 .sw_decrypt_mcast_mgmt = true,
 625                 .hw_ops = &wcn3990_ops,
 626                 .decap_align_bytes = 1,
 627                 .num_peers = TARGET_HL_TLV_NUM_PEERS,
 628                 .n_cipher_suites = 11,
 629                 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
 630                 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
 631                 .target_64bit = true,
 632                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 633                 .per_ce_irq = true,
 634                 .shadow_reg_support = true,
 635                 .rri_on_ddr = true,
 636                 .hw_filter_reset_required = false,
 637                 .fw_diag_ce_download = false,
 638                 .tx_stats_over_pktlog = false,
 639         },
 640 };
 641
 642 static const char *const ath10k_core_fw_feature_str[] = {
 643         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 644         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 645         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 646         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 647         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 648         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 649         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 650         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 651         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 652         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 653         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 654         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 655         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 656         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 657         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 658         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 659         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 660         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 661         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 662         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 663         [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
 664         [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
 665 };
 666
 667 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 668                                                    size_t buf_len,
 669                                                    enum ath10k_fw_features feat)
 670 {
 671         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 672         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 673                      ATH10K_FW_FEATURE_COUNT);
 674
 675         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 676             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 677                 return scnprintf(buf, buf_len, "bit%d", feat);
 678         }
 679
 680         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 681 }
 682
 683 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 684                                      char *buf,
 685                                      size_t buf_len)
 686 {
 687         size_t len = 0;
 688         int i;
 689
 690         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 691                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 692                         if (len > 0)
 693                                 len += scnprintf(buf + len, buf_len - len, ",");
 694
 695                         len += ath10k_core_get_fw_feature_str(buf + len,
 696                                                               buf_len - len,
 697                                                               i);
 698                 }
 699         }
 700 }
 701
 702 static void ath10k_send_suspend_complete(struct ath10k *ar)
 703 {
 704         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 705
 706         complete(&ar->target_suspend);
 707 }
 708
 709 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 710 {
 711         int ret;
 712         u32 param = 0;
 713
 714         ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 715         if (ret)
 716                 return ret;
 717
 718         ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 719         if (ret)
 720                 return ret;
 721
 722         ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
 723         if (ret)
 724                 return ret;
 725
 726         param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 727
 728         /* Alternate credit size of 1544 as used by SDIO firmware is
 729          * not big enough for mac80211 / native wifi frames. disable it
 730          */
 731         param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 732
 733         if (mode == ATH10K_FIRMWARE_MODE_UTF)
 734                 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 735         else
 736                 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 737
 738         ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
 739         if (ret)
 740                 return ret;
 741
 742         return 0;
 743 }
 744
 745 static int ath10k_init_configure_target(struct ath10k *ar)
 746 {
 747         u32 param_host;
 748         int ret;
 749
 750         /* tell target which HTC version it is used*/
 751         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 752                                  HTC_PROTOCOL_VERSION);
 753         if (ret) {
 754                 ath10k_err(ar, "settings HTC version failed\n");
 755                 return ret;
 756         }
 757
 758         /* set the firmware mode to STA/IBSS/AP */
 759         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 760         if (ret) {
 761                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 762                 return ret;
 763         }
 764
 765         /* TODO following parameters need to be re-visited. */
 766         /* num_device */
 767         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 768         /* Firmware mode */
 769         /* FIXME: Why FW_MODE_AP ??.*/
 770         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 771         /* mac_addr_method */
 772         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 773         /* firmware_bridge */
 774         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 775         /* fwsubmode */
 776         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 777
 778         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 779         if (ret) {
 780                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 781                 return ret;
 782         }
 783
 784         /* We do all byte-swapping on the host */
 785         ret = ath10k_bmi_write32(ar, hi_be, 0);
 786         if (ret) {
 787                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 788                 return ret;
 789         }
 790
 791         /* FW descriptor/Data swap flags */
 792         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 793
 794         if (ret) {
 795                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 796                 return ret;
 797         }
 798
 799         /* Some devices have a special sanity check that verifies the PCI
 800          * Device ID is written to this host interest var. It is known to be
 801          * required to boot QCA6164.
 802          */
 803         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 804                                  ar->dev_id);
 805         if (ret) {
 806                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 807                 return ret;
 808         }
 809
 810         return 0;
 811 }
 812
 813 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 814                                                    const char *dir,
 815                                                    const char *file)
 816 {
 817         char filename[100];
 818         const struct firmware *fw;
 819         int ret;
 820
 821         if (file == NULL)
 822                 return ERR_PTR(-ENOENT);
 823
 824         if (dir == NULL)
 825                 dir = ".";
 826
 827         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 828         ret = firmware_request_nowarn(&fw, filename, ar->dev);
 829         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 830                    filename, ret);
 831
 832         if (ret)
 833                 return ERR_PTR(ret);
 834
 835         return fw;
 836 }
 837
 838 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 839                                       size_t data_len)
 840 {
 841         u32 board_data_size = ar->hw_params.fw.board_size;
 842         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 843         u32 board_ext_data_addr;
 844         int ret;
 845
 846         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 847         if (ret) {
 848                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 849                            ret);
 850                 return ret;
 851         }
 852
 853         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 854                    "boot push board extended data addr 0x%x\n",
 855                    board_ext_data_addr);
 856
 857         if (board_ext_data_addr == 0)
 858                 return 0;
 859
 860         if (data_len != (board_data_size + board_ext_data_size)) {
 861                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 862                            data_len, board_data_size, board_ext_data_size);
 863                 return -EINVAL;
 864         }
 865
 866         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 867                                       data + board_data_size,
 868                                       board_ext_data_size);
 869         if (ret) {
 870                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 871                 return ret;
 872         }
 873
 874         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 875                                  (board_ext_data_size << 16) | 1);
 876         if (ret) {
 877                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 878                            ret);
 879                 return ret;
 880         }
 881
 882         return 0;
 883 }
 884
 885 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 886 {
 887         u32 result, address;
 888         u8 board_id, chip_id;
 889         bool ext_bid_support;
 890         int ret, bmi_board_id_param;
 891
 892         address = ar->hw_params.patch_load_addr;
 893
 894         if (!ar->normal_mode_fw.fw_file.otp_data ||
 895             !ar->normal_mode_fw.fw_file.otp_len) {
 896                 ath10k_warn(ar,
 897                             "failed to retrieve board id because of invalid otp\n");
 898                 return -ENODATA;
 899         }
 900
 901         if (ar->id.bmi_ids_valid) {
 902                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 903                            "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
 904                            ar->id.bmi_board_id, ar->id.bmi_chip_id);
 905                 goto skip_otp_download;
 906         }
 907
 908         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 909                    "boot upload otp to 0x%x len %zd for board id\n",
 910                    address, ar->normal_mode_fw.fw_file.otp_len);
 911
 912         ret = ath10k_bmi_fast_download(ar, address,
 913                                        ar->normal_mode_fw.fw_file.otp_data,
 914                                        ar->normal_mode_fw.fw_file.otp_len);
 915         if (ret) {
 916                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 917                            ret);
 918                 return ret;
 919         }
 920
 921         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 922             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 923                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 924         else
 925                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 926
 927         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 928         if (ret) {
 929                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 930                            ret);
 931                 return ret;
 932         }
 933
 934         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 935         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 936         ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
 937
 938         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 939                    "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
 940                    result, board_id, chip_id, ext_bid_support);
 941
 942         ar->id.ext_bid_supported = ext_bid_support;
 943
 944         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 945             (board_id == 0)) {
 946                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 947                            "board id does not exist in otp, ignore it\n");
 948                 return -EOPNOTSUPP;
 949         }
 950
 951         ar->id.bmi_ids_valid = true;
 952         ar->id.bmi_board_id = board_id;
 953         ar->id.bmi_chip_id = chip_id;
 954
 955 skip_otp_download:
 956
 957         return 0;
 958 }
 959
 960 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
 961 {
 962         struct ath10k *ar = data;
 963         const char *bdf_ext;
 964         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
 965         u8 bdf_enabled;
 966         int i;
 967
 968         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
 969                 return;
 970
 971         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
 972                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 973                            "wrong smbios bdf ext type length (%d).\n",
 974                            hdr->length);
 975                 return;
 976         }
 977
 978         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
 979         if (!bdf_enabled) {
 980                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
 981                 return;
 982         }
 983
 984         /* Only one string exists (per spec) */
 985         bdf_ext = (char *)hdr + hdr->length;
 986
 987         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
 988                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 989                            "bdf variant magic does not match.\n");
 990                 return;
 991         }
 992
 993         for (i = 0; i < strlen(bdf_ext); i++) {
 994                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
 995                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 996                                    "bdf variant name contains non ascii chars.\n");
 997                         return;
 998                 }
 999         }
1000
1001         /* Copy extension name without magic suffix */
1002         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1003                     sizeof(ar->id.bdf_ext)) < 0) {
1004                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1005                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1006                             bdf_ext);
1007                 return;
1008         }
1009
1010         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1011                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1012                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1013 }
1014
1015 static int ath10k_core_check_smbios(struct ath10k *ar)
1016 {
1017         ar->id.bdf_ext[0] = '\0';
1018         dmi_walk(ath10k_core_check_bdfext, ar);
1019
1020         if (ar->id.bdf_ext[0] == '\0')
1021                 return -ENODATA;
1022
1023         return 0;
1024 }
1025
1026 static int ath10k_core_check_dt(struct ath10k *ar)
1027 {
1028         struct device_node *node;
1029         const char *variant = NULL;
1030
1031         node = ar->dev->of_node;
1032         if (!node)
1033                 return -ENOENT;
1034
1035         of_property_read_string(node, "qcom,ath10k-calibration-variant",
1036                                 &variant);
1037         if (!variant)
1038                 return -ENODATA;
1039
1040         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1041                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1042                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1043                             variant);
1044
1045         return 0;
1046 }
1047
1048 static int ath10k_download_fw(struct ath10k *ar)
1049 {
1050         u32 address, data_len;
1051         const void *data;
1052         int ret;
1053         struct pm_qos_request latency_qos;
1054
1055         address = ar->hw_params.patch_load_addr;
1056
1057         data = ar->running_fw->fw_file.firmware_data;
1058         data_len = ar->running_fw->fw_file.firmware_len;
1059
1060         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1061         if (ret) {
1062                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1063                            ret);
1064                 return ret;
1065         }
1066
1067         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1068                    "boot uploading firmware image %pK len %d\n",
1069                    data, data_len);
1070
1071         /* Check if device supports to download firmware via
1072          * diag copy engine. Downloading firmware via diag CE
1073          * greatly reduces the time to download firmware.
1074          */
1075         if (ar->hw_params.fw_diag_ce_download) {
1076                 ret = ath10k_hw_diag_fast_download(ar, address,
1077                                                    data, data_len);
1078                 if (ret == 0)
1079                         /* firmware upload via diag ce was successful */
1080                         return 0;
1081
1082                 ath10k_warn(ar,
1083                             "failed to upload firmware via diag ce, trying BMI: %d",
1084                             ret);
1085         }
1086
1087         memset(&latency_qos, 0, sizeof(latency_qos));
1088         cpu_latency_qos_add_request(&latency_qos, 0);
1089
1090         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1091
1092         cpu_latency_qos_remove_request(&latency_qos);
1093
1094         return ret;
1095 }
1096
1097 void ath10k_core_free_board_files(struct ath10k *ar)
1098 {
1099         if (!IS_ERR(ar->normal_mode_fw.board))
1100                 release_firmware(ar->normal_mode_fw.board);
1101
1102         if (!IS_ERR(ar->normal_mode_fw.ext_board))
1103                 release_firmware(ar->normal_mode_fw.ext_board);
1104
1105         ar->normal_mode_fw.board = NULL;
1106         ar->normal_mode_fw.board_data = NULL;
1107         ar->normal_mode_fw.board_len = 0;
1108         ar->normal_mode_fw.ext_board = NULL;
1109         ar->normal_mode_fw.ext_board_data = NULL;
1110         ar->normal_mode_fw.ext_board_len = 0;
1111 }
1112 EXPORT_SYMBOL(ath10k_core_free_board_files);
1113
1114 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1115 {
1116         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1117                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1118
1119         if (!IS_ERR(ar->cal_file))
1120                 release_firmware(ar->cal_file);
1121
1122         if (!IS_ERR(ar->pre_cal_file))
1123                 release_firmware(ar->pre_cal_file);
1124
1125         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1126
1127         ar->normal_mode_fw.fw_file.otp_data = NULL;
1128         ar->normal_mode_fw.fw_file.otp_len = 0;
1129
1130         ar->normal_mode_fw.fw_file.firmware = NULL;
1131         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1132         ar->normal_mode_fw.fw_file.firmware_len = 0;
1133
1134         ar->cal_file = NULL;
1135         ar->pre_cal_file = NULL;
1136 }
1137
1138 static int ath10k_fetch_cal_file(struct ath10k *ar)
1139 {
1140         char filename[100];
1141
1142         /* pre-cal-<bus>-<id>.bin */
1143         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1144                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1145
1146         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1147         if (!IS_ERR(ar->pre_cal_file))
1148                 goto success;
1149
1150         /* cal-<bus>-<id>.bin */
1151         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1152                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1153
1154         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1155         if (IS_ERR(ar->cal_file))
1156                 /* calibration file is optional, don't print any warnings */
1157                 return PTR_ERR(ar->cal_file);
1158 success:
1159         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1160                    ATH10K_FW_DIR, filename);
1161
1162         return 0;
1163 }
1164
1165 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1166 {
1167         const struct firmware *fw;
1168
1169         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1170                 if (!ar->hw_params.fw.board) {
1171                         ath10k_err(ar, "failed to find board file fw entry\n");
1172                         return -EINVAL;
1173                 }
1174
1175                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1176                                                                 ar->hw_params.fw.dir,
1177                                                                 ar->hw_params.fw.board);
1178                 if (IS_ERR(ar->normal_mode_fw.board))
1179                         return PTR_ERR(ar->normal_mode_fw.board);
1180
1181                 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1182                 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1183         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1184                 if (!ar->hw_params.fw.eboard) {
1185                         ath10k_err(ar, "failed to find eboard file fw entry\n");
1186                         return -EINVAL;
1187                 }
1188
1189                 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1190                                           ar->hw_params.fw.eboard);
1191                 ar->normal_mode_fw.ext_board = fw;
1192                 if (IS_ERR(ar->normal_mode_fw.ext_board))
1193                         return PTR_ERR(ar->normal_mode_fw.ext_board);
1194
1195                 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1196                 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1197         }
1198
1199         return 0;
1200 }
1201
1202 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1203                                          const void *buf, size_t buf_len,
1204                                          const char *boardname,
1205                                          int bd_ie_type)
1206 {
1207         const struct ath10k_fw_ie *hdr;
1208         bool name_match_found;
1209         int ret, board_ie_id;
1210         size_t board_ie_len;
1211         const void *board_ie_data;
1212
1213         name_match_found = false;
1214
1215         /* go through ATH10K_BD_IE_BOARD_ elements */
1216         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1217                 hdr = buf;
1218                 board_ie_id = le32_to_cpu(hdr->id);
1219                 board_ie_len = le32_to_cpu(hdr->len);
1220                 board_ie_data = hdr->data;
1221
1222                 buf_len -= sizeof(*hdr);
1223                 buf += sizeof(*hdr);
1224
1225                 if (buf_len < ALIGN(board_ie_len, 4)) {
1226                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1227                                    buf_len, ALIGN(board_ie_len, 4));
1228                         ret = -EINVAL;
1229                         goto out;
1230                 }
1231
1232                 switch (board_ie_id) {
1233                 case ATH10K_BD_IE_BOARD_NAME:
1234                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1235                                         board_ie_data, board_ie_len);
1236
1237                         if (board_ie_len != strlen(boardname))
1238                                 break;
1239
1240                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1241                         if (ret)
1242                                 break;
1243
1244                         name_match_found = true;
1245                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1246                                    "boot found match for name '%s'",
1247                                    boardname);
1248                         break;
1249                 case ATH10K_BD_IE_BOARD_DATA:
1250                         if (!name_match_found)
1251                                 /* no match found */
1252                                 break;
1253
1254                         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1255                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1256                                            "boot found board data for '%s'",
1257                                                 boardname);
1258
1259                                 ar->normal_mode_fw.board_data = board_ie_data;
1260                                 ar->normal_mode_fw.board_len = board_ie_len;
1261                         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1262                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1263                                            "boot found eboard data for '%s'",
1264                                                 boardname);
1265
1266                                 ar->normal_mode_fw.ext_board_data = board_ie_data;
1267                                 ar->normal_mode_fw.ext_board_len = board_ie_len;
1268                         }
1269
1270                         ret = 0;
1271                         goto out;
1272                 default:
1273                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1274                                     board_ie_id);
1275                         break;
1276                 }
1277
1278                 /* jump over the padding */
1279                 board_ie_len = ALIGN(board_ie_len, 4);
1280
1281                 buf_len -= board_ie_len;
1282                 buf += board_ie_len;
1283         }
1284
1285         /* no match found */
1286         ret = -ENOENT;
1287
1288 out:
1289         return ret;
1290 }
1291
1292 static int ath10k_core_search_bd(struct ath10k *ar,
1293                                  const char *boardname,
1294                                  const u8 *data,
1295                                  size_t len)
1296 {
1297         size_t ie_len;
1298         struct ath10k_fw_ie *hdr;
1299         int ret = -ENOENT, ie_id;
1300
1301         while (len > sizeof(struct ath10k_fw_ie)) {
1302                 hdr = (struct ath10k_fw_ie *)data;
1303                 ie_id = le32_to_cpu(hdr->id);
1304                 ie_len = le32_to_cpu(hdr->len);
1305
1306                 len -= sizeof(*hdr);
1307                 data = hdr->data;
1308
1309                 if (len < ALIGN(ie_len, 4)) {
1310                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1311                                    ie_id, ie_len, len);
1312                         return -EINVAL;
1313                 }
1314
1315                 switch (ie_id) {
1316                 case ATH10K_BD_IE_BOARD:
1317                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1318                                                             boardname,
1319                                                             ATH10K_BD_IE_BOARD);
1320                         if (ret == -ENOENT)
1321                                 /* no match found, continue */
1322                                 break;
1323
1324                         /* either found or error, so stop searching */
1325                         goto out;
1326                 case ATH10K_BD_IE_BOARD_EXT:
1327                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1328                                                             boardname,
1329                                                             ATH10K_BD_IE_BOARD_EXT);
1330                         if (ret == -ENOENT)
1331                                 /* no match found, continue */
1332                                 break;
1333
1334                         /* either found or error, so stop searching */
1335                         goto out;
1336                 }
1337
1338                 /* jump over the padding */
1339                 ie_len = ALIGN(ie_len, 4);
1340
1341                 len -= ie_len;
1342                 data += ie_len;
1343         }
1344
1345 out:
1346         /* return result of parse_bd_ie_board() or -ENOENT */
1347         return ret;
1348 }
1349
1350 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1351                                               const char *boardname,
1352                                               const char *fallback_boardname,
1353                                               const char *filename)
1354 {
1355         size_t len, magic_len;
1356         const u8 *data;
1357         int ret;
1358
1359         /* Skip if already fetched during board data download */
1360         if (!ar->normal_mode_fw.board)
1361                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1362                                                                 ar->hw_params.fw.dir,
1363                                                                 filename);
1364         if (IS_ERR(ar->normal_mode_fw.board))
1365                 return PTR_ERR(ar->normal_mode_fw.board);
1366
1367         data = ar->normal_mode_fw.board->data;
1368         len = ar->normal_mode_fw.board->size;
1369
1370         /* magic has extra null byte padded */
1371         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1372         if (len < magic_len) {
1373                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1374                            ar->hw_params.fw.dir, filename, len);
1375                 ret = -EINVAL;
1376                 goto err;
1377         }
1378
1379         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1380                 ath10k_err(ar, "found invalid board magic\n");
1381                 ret = -EINVAL;
1382                 goto err;
1383         }
1384
1385         /* magic is padded to 4 bytes */
1386         magic_len = ALIGN(magic_len, 4);
1387         if (len < magic_len) {
1388                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1389                            ar->hw_params.fw.dir, filename, len);
1390                 ret = -EINVAL;
1391                 goto err;
1392         }
1393
1394         data += magic_len;
1395         len -= magic_len;
1396
1397         /* attempt to find boardname in the IE list */
1398         ret = ath10k_core_search_bd(ar, boardname, data, len);
1399
1400         /* if we didn't find it and have a fallback name, try that */
1401         if (ret == -ENOENT && fallback_boardname)
1402                 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1403
1404         if (ret == -ENOENT) {
1405                 ath10k_err(ar,
1406                            "failed to fetch board data for %s from %s/%s\n",
1407                            boardname, ar->hw_params.fw.dir, filename);
1408                 ret = -ENODATA;
1409         }
1410
1411         if (ret)
1412                 goto err;
1413
1414         return 0;
1415
1416 err:
1417         ath10k_core_free_board_files(ar);
1418         return ret;
1419 }
1420
1421 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1422                                          size_t name_len, bool with_variant)
1423 {
1424         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1425         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1426
1427         if (with_variant && ar->id.bdf_ext[0] != '\0')
1428                 scnprintf(variant, sizeof(variant), ",variant=%s",
1429                           ar->id.bdf_ext);
1430
1431         if (ar->id.bmi_ids_valid) {
1432                 scnprintf(name, name_len,
1433                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1434                           ath10k_bus_str(ar->hif.bus),
1435                           ar->id.bmi_chip_id,
1436                           ar->id.bmi_board_id, variant);
1437                 goto out;
1438         }
1439
1440         if (ar->id.qmi_ids_valid) {
1441                 scnprintf(name, name_len,
1442                           "bus=%s,qmi-board-id=%x",
1443                           ath10k_bus_str(ar->hif.bus),
1444                           ar->id.qmi_board_id);
1445                 goto out;
1446         }
1447
1448         scnprintf(name, name_len,
1449                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1450                   ath10k_bus_str(ar->hif.bus),
1451                   ar->id.vendor, ar->id.device,
1452                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1453 out:
1454         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1455
1456         return 0;
1457 }
1458
1459 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1460                                           size_t name_len)
1461 {
1462         if (ar->id.bmi_ids_valid) {
1463                 scnprintf(name, name_len,
1464                           "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1465                           ath10k_bus_str(ar->hif.bus),
1466                           ar->id.bmi_chip_id,
1467                           ar->id.bmi_eboard_id);
1468
1469                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1470                 return 0;
1471         }
1472         /* Fallback if returned board id is zero */
1473         return -1;
1474 }
1475
1476 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1477 {
1478         char boardname[100], fallback_boardname[100];
1479         int ret;
1480
1481         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1482                 ret = ath10k_core_create_board_name(ar, boardname,
1483                                                     sizeof(boardname), true);
1484                 if (ret) {
1485                         ath10k_err(ar, "failed to create board name: %d", ret);
1486                         return ret;
1487                 }
1488
1489                 ret = ath10k_core_create_board_name(ar, fallback_boardname,
1490                                                     sizeof(boardname), false);
1491                 if (ret) {
1492                         ath10k_err(ar, "failed to create fallback board name: %d", ret);
1493                         return ret;
1494                 }
1495         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1496                 ret = ath10k_core_create_eboard_name(ar, boardname,
1497                                                      sizeof(boardname));
1498                 if (ret) {
1499                         ath10k_err(ar, "fallback to eboard.bin since board id 0");
1500                         goto fallback;
1501                 }
1502         }
1503
1504         ar->bd_api = 2;
1505         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1506                                                  fallback_boardname,
1507                                                  ATH10K_BOARD_API2_FILE);
1508         if (!ret)
1509                 goto success;
1510
1511 fallback:
1512         ar->bd_api = 1;
1513         ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1514         if (ret) {
1515                 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1516                            ar->hw_params.fw.dir);
1517                 return ret;
1518         }
1519
1520 success:
1521         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1522         return 0;
1523 }
1524 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1525
1526 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1527 {
1528         u32 result, address;
1529         u8 ext_board_id;
1530         int ret;
1531
1532         address = ar->hw_params.patch_load_addr;
1533
1534         if (!ar->normal_mode_fw.fw_file.otp_data ||
1535             !ar->normal_mode_fw.fw_file.otp_len) {
1536                 ath10k_warn(ar,
1537                             "failed to retrieve extended board id due to otp binary missing\n");
1538                 return -ENODATA;
1539         }
1540
1541         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1542                    "boot upload otp to 0x%x len %zd for ext board id\n",
1543                    address, ar->normal_mode_fw.fw_file.otp_len);
1544
1545         ret = ath10k_bmi_fast_download(ar, address,
1546                                        ar->normal_mode_fw.fw_file.otp_data,
1547                                        ar->normal_mode_fw.fw_file.otp_len);
1548         if (ret) {
1549                 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1550                            ret);
1551                 return ret;
1552         }
1553
1554         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1555         if (ret) {
1556                 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1557                            ret);
1558                 return ret;
1559         }
1560
1561         if (!result) {
1562                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1563                            "ext board id does not exist in otp, ignore it\n");
1564                 return -EOPNOTSUPP;
1565         }
1566
1567         ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1568
1569         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1570                    "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1571                    result, ext_board_id);
1572
1573         ar->id.bmi_eboard_id = ext_board_id;
1574
1575         return 0;
1576 }
1577
1578 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1579                                       size_t data_len)
1580 {
1581         u32 board_data_size = ar->hw_params.fw.board_size;
1582         u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1583         u32 board_address;
1584         u32 ext_board_address;
1585         int ret;
1586
1587         ret = ath10k_push_board_ext_data(ar, data, data_len);
1588         if (ret) {
1589                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1590                 goto exit;
1591         }
1592
1593         ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1594         if (ret) {
1595                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1596                 goto exit;
1597         }
1598
1599         ret = ath10k_bmi_write_memory(ar, board_address, data,
1600                                       min_t(u32, board_data_size,
1601                                             data_len));
1602         if (ret) {
1603                 ath10k_err(ar, "could not write board data (%d)\n", ret);
1604                 goto exit;
1605         }
1606
1607         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1608         if (ret) {
1609                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1610                 goto exit;
1611         }
1612
1613         if (!ar->id.ext_bid_supported)
1614                 goto exit;
1615
1616         /* Extended board data download */
1617         ret = ath10k_core_get_ext_board_id_from_otp(ar);
1618         if (ret == -EOPNOTSUPP) {
1619                 /* Not fetching ext_board_data if ext board id is 0 */
1620                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1621                 return 0;
1622         } else if (ret) {
1623                 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1624                 goto exit;
1625         }
1626
1627         ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1628         if (ret)
1629                 goto exit;
1630
1631         if (ar->normal_mode_fw.ext_board_data) {
1632                 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1633                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1634                            "boot writing ext board data to addr 0x%x",
1635                            ext_board_address);
1636                 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1637                                               ar->normal_mode_fw.ext_board_data,
1638                                               min_t(u32, eboard_data_size, data_len));
1639                 if (ret)
1640                         ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1641         }
1642
1643 exit:
1644         return ret;
1645 }
1646
1647 static int ath10k_download_and_run_otp(struct ath10k *ar)
1648 {
1649         u32 result, address = ar->hw_params.patch_load_addr;
1650         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1651         int ret;
1652
1653         ret = ath10k_download_board_data(ar,
1654                                          ar->running_fw->board_data,
1655                                          ar->running_fw->board_len);
1656         if (ret) {
1657                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1658                 return ret;
1659         }
1660
1661         /* OTP is optional */
1662
1663         if (!ar->running_fw->fw_file.otp_data ||
1664             !ar->running_fw->fw_file.otp_len) {
1665                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1666                             ar->running_fw->fw_file.otp_data,
1667                             ar->running_fw->fw_file.otp_len);
1668                 return 0;
1669         }
1670
1671         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1672                    address, ar->running_fw->fw_file.otp_len);
1673
1674         ret = ath10k_bmi_fast_download(ar, address,
1675                                        ar->running_fw->fw_file.otp_data,
1676                                        ar->running_fw->fw_file.otp_len);
1677         if (ret) {
1678                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1679                 return ret;
1680         }
1681
1682         /* As of now pre-cal is valid for 10_4 variants */
1683         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1684             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1685                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1686
1687         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1688         if (ret) {
1689                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1690                 return ret;
1691         }
1692
1693         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1694
1695         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1696                                    ar->running_fw->fw_file.fw_features)) &&
1697             result != 0) {
1698                 ath10k_err(ar, "otp calibration failed: %d", result);
1699                 return -EINVAL;
1700         }
1701
1702         return 0;
1703 }
1704
1705 static int ath10k_download_cal_file(struct ath10k *ar,
1706                                     const struct firmware *file)
1707 {
1708         int ret;
1709
1710         if (!file)
1711                 return -ENOENT;
1712
1713         if (IS_ERR(file))
1714                 return PTR_ERR(file);
1715
1716         ret = ath10k_download_board_data(ar, file->data, file->size);
1717         if (ret) {
1718                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1719                 return ret;
1720         }
1721
1722         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1723
1724         return 0;
1725 }
1726
1727 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1728 {
1729         struct device_node *node;
1730         int data_len;
1731         void *data;
1732         int ret;
1733
1734         node = ar->dev->of_node;
1735         if (!node)
1736                 /* Device Tree is optional, don't print any warnings if
1737                  * there's no node for ath10k.
1738                  */
1739                 return -ENOENT;
1740
1741         if (!of_get_property(node, dt_name, &data_len)) {
1742                 /* The calibration data node is optional */
1743                 return -ENOENT;
1744         }
1745
1746         if (data_len != ar->hw_params.cal_data_len) {
1747                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1748                             data_len);
1749                 ret = -EMSGSIZE;
1750                 goto out;
1751         }
1752
1753         data = kmalloc(data_len, GFP_KERNEL);
1754         if (!data) {
1755                 ret = -ENOMEM;
1756                 goto out;
1757         }
1758
1759         ret = of_property_read_u8_array(node, dt_name, data, data_len);
1760         if (ret) {
1761                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1762                             ret);
1763                 goto out_free;
1764         }
1765
1766         ret = ath10k_download_board_data(ar, data, data_len);
1767         if (ret) {
1768                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1769                             ret);
1770                 goto out_free;
1771         }
1772
1773         ret = 0;
1774
1775 out_free:
1776         kfree(data);
1777
1778 out:
1779         return ret;
1780 }
1781
1782 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1783 {
1784         size_t data_len;
1785         void *data = NULL;
1786         int ret;
1787
1788         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1789         if (ret) {
1790                 if (ret != -EOPNOTSUPP)
1791                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1792                                     ret);
1793                 goto out_free;
1794         }
1795
1796         ret = ath10k_download_board_data(ar, data, data_len);
1797         if (ret) {
1798                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1799                             ret);
1800                 goto out_free;
1801         }
1802
1803         ret = 0;
1804
1805 out_free:
1806         kfree(data);
1807
1808         return ret;
1809 }
1810
1811 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1812                                      struct ath10k_fw_file *fw_file)
1813 {
1814         size_t magic_len, len, ie_len;
1815         int ie_id, i, index, bit, ret;
1816         struct ath10k_fw_ie *hdr;
1817         const u8 *data;
1818         __le32 *timestamp, *version;
1819
1820         /* first fetch the firmware file (firmware-*.bin) */
1821         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1822                                                  name);
1823         if (IS_ERR(fw_file->firmware))
1824                 return PTR_ERR(fw_file->firmware);
1825
1826         data = fw_file->firmware->data;
1827         len = fw_file->firmware->size;
1828
1829         /* magic also includes the null byte, check that as well */
1830         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1831
1832         if (len < magic_len) {
1833                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1834                            ar->hw_params.fw.dir, name, len);
1835                 ret = -EINVAL;
1836                 goto err;
1837         }
1838
1839         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1840                 ath10k_err(ar, "invalid firmware magic\n");
1841                 ret = -EINVAL;
1842                 goto err;
1843         }
1844
1845         /* jump over the padding */
1846         magic_len = ALIGN(magic_len, 4);
1847
1848         len -= magic_len;
1849         data += magic_len;
1850
1851         /* loop elements */
1852         while (len > sizeof(struct ath10k_fw_ie)) {
1853                 hdr = (struct ath10k_fw_ie *)data;
1854
1855                 ie_id = le32_to_cpu(hdr->id);
1856                 ie_len = le32_to_cpu(hdr->len);
1857
1858                 len -= sizeof(*hdr);
1859                 data += sizeof(*hdr);
1860
1861                 if (len < ie_len) {
1862                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1863                                    ie_id, len, ie_len);
1864                         ret = -EINVAL;
1865                         goto err;
1866                 }
1867
1868                 switch (ie_id) {
1869                 case ATH10K_FW_IE_FW_VERSION:
1870                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1871                                 break;
1872
1873                         memcpy(fw_file->fw_version, data, ie_len);
1874                         fw_file->fw_version[ie_len] = '\0';
1875
1876                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1877                                    "found fw version %s\n",
1878                                     fw_file->fw_version);
1879                         break;
1880                 case ATH10K_FW_IE_TIMESTAMP:
1881                         if (ie_len != sizeof(u32))
1882                                 break;
1883
1884                         timestamp = (__le32 *)data;
1885
1886                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1887                                    le32_to_cpup(timestamp));
1888                         break;
1889                 case ATH10K_FW_IE_FEATURES:
1890                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1891                                    "found firmware features ie (%zd B)\n",
1892                                    ie_len);
1893
1894                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1895                                 index = i / 8;
1896                                 bit = i % 8;
1897
1898                                 if (index == ie_len)
1899                                         break;
1900
1901                                 if (data[index] & (1 << bit)) {
1902                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1903                                                    "Enabling feature bit: %i\n",
1904                                                    i);
1905                                         __set_bit(i, fw_file->fw_features);
1906                                 }
1907                         }
1908
1909                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1910                                         fw_file->fw_features,
1911                                         sizeof(fw_file->fw_features));
1912                         break;
1913                 case ATH10K_FW_IE_FW_IMAGE:
1914                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1915                                    "found fw image ie (%zd B)\n",
1916                                    ie_len);
1917
1918                         fw_file->firmware_data = data;
1919                         fw_file->firmware_len = ie_len;
1920
1921                         break;
1922                 case ATH10K_FW_IE_OTP_IMAGE:
1923                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1924                                    "found otp image ie (%zd B)\n",
1925                                    ie_len);
1926
1927                         fw_file->otp_data = data;
1928                         fw_file->otp_len = ie_len;
1929
1930                         break;
1931                 case ATH10K_FW_IE_WMI_OP_VERSION:
1932                         if (ie_len != sizeof(u32))
1933                                 break;
1934
1935                         version = (__le32 *)data;
1936
1937                         fw_file->wmi_op_version = le32_to_cpup(version);
1938
1939                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1940                                    fw_file->wmi_op_version);
1941                         break;
1942                 case ATH10K_FW_IE_HTT_OP_VERSION:
1943                         if (ie_len != sizeof(u32))
1944                                 break;
1945
1946                         version = (__le32 *)data;
1947
1948                         fw_file->htt_op_version = le32_to_cpup(version);
1949
1950                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1951                                    fw_file->htt_op_version);
1952                         break;
1953                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1954                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1955                                    "found fw code swap image ie (%zd B)\n",
1956                                    ie_len);
1957                         fw_file->codeswap_data = data;
1958                         fw_file->codeswap_len = ie_len;
1959                         break;
1960                 default:
1961                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1962                                     le32_to_cpu(hdr->id));
1963                         break;
1964                 }
1965
1966                 /* jump over the padding */
1967                 ie_len = ALIGN(ie_len, 4);
1968
1969                 len -= ie_len;
1970                 data += ie_len;
1971         }
1972
1973         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1974             (!fw_file->firmware_data || !fw_file->firmware_len)) {
1975                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1976                             ar->hw_params.fw.dir, name);
1977                 ret = -ENOMEDIUM;
1978                 goto err;
1979         }
1980
1981         return 0;
1982
1983 err:
1984         ath10k_core_free_firmware_files(ar);
1985         return ret;
1986 }
1987
1988 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1989                                     size_t fw_name_len, int fw_api)
1990 {
1991         switch (ar->hif.bus) {
1992         case ATH10K_BUS_SDIO:
1993         case ATH10K_BUS_USB:
1994                 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1995                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1996                           fw_api);
1997                 break;
1998         case ATH10K_BUS_PCI:
1999         case ATH10K_BUS_AHB:
2000         case ATH10K_BUS_SNOC:
2001                 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2002                           ATH10K_FW_FILE_BASE, fw_api);
2003                 break;
2004         }
2005 }
2006
2007 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2008 {
2009         int ret, i;
2010         char fw_name[100];
2011
2012         /* calibration file is optional, don't check for any errors */
2013         ath10k_fetch_cal_file(ar);
2014
2015         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2016                 ar->fw_api = i;
2017                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2018                            ar->fw_api);
2019
2020                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2021                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2022                                                        &ar->normal_mode_fw.fw_file);
2023                 if (!ret)
2024                         goto success;
2025         }
2026
2027         /* we end up here if we couldn't fetch any firmware */
2028
2029         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2030                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2031                    ret);
2032
2033         return ret;
2034
2035 success:
2036         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2037
2038         return 0;
2039 }
2040
2041 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2042 {
2043         int ret;
2044
2045         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2046         if (ret == 0) {
2047                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2048                 goto success;
2049         }
2050
2051         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2052                    "boot did not find a pre calibration file, try DT next: %d\n",
2053                    ret);
2054
2055         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2056         if (ret) {
2057                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2058                            "unable to load pre cal data from DT: %d\n", ret);
2059                 return ret;
2060         }
2061         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2062
2063 success:
2064         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2065                    ath10k_cal_mode_str(ar->cal_mode));
2066
2067         return 0;
2068 }
2069
2070 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2071 {
2072         int ret;
2073
2074         ret = ath10k_core_pre_cal_download(ar);
2075         if (ret) {
2076                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2077                            "failed to load pre cal data: %d\n", ret);
2078                 return ret;
2079         }
2080
2081         ret = ath10k_core_get_board_id_from_otp(ar);
2082         if (ret) {
2083                 ath10k_err(ar, "failed to get board id: %d\n", ret);
2084                 return ret;
2085         }
2086
2087         ret = ath10k_download_and_run_otp(ar);
2088         if (ret) {
2089                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2090                 return ret;
2091         }
2092
2093         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2094                    "pre cal configuration done successfully\n");
2095
2096         return 0;
2097 }
2098
2099 static int ath10k_download_cal_data(struct ath10k *ar)
2100 {
2101         int ret;
2102
2103         ret = ath10k_core_pre_cal_config(ar);
2104         if (ret == 0)
2105                 return 0;
2106
2107         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2108                    "pre cal download procedure failed, try cal file: %d\n",
2109                    ret);
2110
2111         ret = ath10k_download_cal_file(ar, ar->cal_file);
2112         if (ret == 0) {
2113                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2114                 goto done;
2115         }
2116
2117         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2118                    "boot did not find a calibration file, try DT next: %d\n",
2119                    ret);
2120
2121         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2122         if (ret == 0) {
2123                 ar->cal_mode = ATH10K_CAL_MODE_DT;
2124                 goto done;
2125         }
2126
2127         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2128                    "boot did not find DT entry, try target EEPROM next: %d\n",
2129                    ret);
2130
2131         ret = ath10k_download_cal_eeprom(ar);
2132         if (ret == 0) {
2133                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2134                 goto done;
2135         }
2136
2137         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2138                    "boot did not find target EEPROM entry, try OTP next: %d\n",
2139                    ret);
2140
2141         ret = ath10k_download_and_run_otp(ar);
2142         if (ret) {
2143                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2144                 return ret;
2145         }
2146
2147         ar->cal_mode = ATH10K_CAL_MODE_OTP;
2148
2149 done:
2150         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2151                    ath10k_cal_mode_str(ar->cal_mode));
2152         return 0;
2153 }
2154
2155 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2156 {
2157         struct device_node *node;
2158         u8 coex_support = 0;
2159         int ret;
2160
2161         node = ar->dev->of_node;
2162         if (!node)
2163                 goto out;
2164
2165         ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2166         if (ret) {
2167                 ar->coex_support = true;
2168                 goto out;
2169         }
2170
2171         if (coex_support) {
2172                 ar->coex_support = true;
2173         } else {
2174                 ar->coex_support = false;
2175                 ar->coex_gpio_pin = -1;
2176                 goto out;
2177         }
2178
2179         ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2180                                    &ar->coex_gpio_pin);
2181         if (ret)
2182                 ar->coex_gpio_pin = -1;
2183
2184 out:
2185         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2186                    ar->coex_support, ar->coex_gpio_pin);
2187 }
2188
2189 static int ath10k_init_uart(struct ath10k *ar)
2190 {
2191         int ret;
2192
2193         /*
2194          * Explicitly setting UART prints to zero as target turns it on
2195          * based on scratch registers.
2196          */
2197         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2198         if (ret) {
2199                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2200                 return ret;
2201         }
2202
2203         if (!uart_print) {
2204                 if (ar->hw_params.uart_pin_workaround) {
2205                         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2206                                                  ar->hw_params.uart_pin);
2207                         if (ret) {
2208                                 ath10k_warn(ar, "failed to set UART TX pin: %d",
2209                                             ret);
2210                                 return ret;
2211                         }
2212                 }
2213
2214                 return 0;
2215         }
2216
2217         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2218         if (ret) {
2219                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2220                 return ret;
2221         }
2222
2223         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2224         if (ret) {
2225                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2226                 return ret;
2227         }
2228
2229         /* Set the UART baud rate to 19200. */
2230         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2231         if (ret) {
2232                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2233                 return ret;
2234         }
2235
2236         ath10k_info(ar, "UART prints enabled\n");
2237         return 0;
2238 }
2239
2240 static int ath10k_init_hw_params(struct ath10k *ar)
2241 {
2242         const struct ath10k_hw_params *uninitialized_var(hw_params);
2243         int i;
2244
2245         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2246                 hw_params = &ath10k_hw_params_list[i];
2247
2248                 if (hw_params->bus == ar->hif.bus &&
2249                     hw_params->id == ar->target_version &&
2250                     hw_params->dev_id == ar->dev_id)
2251                         break;
2252         }
2253
2254         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2255                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2256                            ar->target_version);
2257                 return -EINVAL;
2258         }
2259
2260         ar->hw_params = *hw_params;
2261
2262         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2263                    ar->hw_params.name, ar->target_version);
2264
2265         return 0;
2266 }
2267
2268 static void ath10k_core_restart(struct work_struct *work)
2269 {
2270         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2271         int ret;
2272
2273         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2274
2275         /* Place a barrier to make sure the compiler doesn't reorder
2276          * CRASH_FLUSH and calling other functions.
2277          */
2278         barrier();
2279
2280         ieee80211_stop_queues(ar->hw);
2281         ath10k_drain_tx(ar);
2282         complete(&ar->scan.started);
2283         complete(&ar->scan.completed);
2284         complete(&ar->scan.on_channel);
2285         complete(&ar->offchan_tx_completed);
2286         complete(&ar->install_key_done);
2287         complete(&ar->vdev_setup_done);
2288         complete(&ar->vdev_delete_done);
2289         complete(&ar->thermal.wmi_sync);
2290         complete(&ar->bss_survey_done);
2291         wake_up(&ar->htt.empty_tx_wq);
2292         wake_up(&ar->wmi.tx_credits_wq);
2293         wake_up(&ar->peer_mapping_wq);
2294
2295         /* TODO: We can have one instance of cancelling coverage_class_work by
2296          * moving it to ath10k_halt(), so that both stop() and restart() would
2297          * call that but it takes conf_mutex() and if we call cancel_work_sync()
2298          * with conf_mutex it will deadlock.
2299          */
2300         cancel_work_sync(&ar->set_coverage_class_work);
2301
2302         mutex_lock(&ar->conf_mutex);
2303
2304         switch (ar->state) {
2305         case ATH10K_STATE_ON:
2306                 ar->state = ATH10K_STATE_RESTARTING;
2307                 ath10k_halt(ar);
2308                 ath10k_scan_finish(ar);
2309                 ieee80211_restart_hw(ar->hw);
2310                 break;
2311         case ATH10K_STATE_OFF:
2312                 /* this can happen if driver is being unloaded
2313                  * or if the crash happens during FW probing
2314                  */
2315                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2316                 break;
2317         case ATH10K_STATE_RESTARTING:
2318                 /* hw restart might be requested from multiple places */
2319                 break;
2320         case ATH10K_STATE_RESTARTED:
2321                 ar->state = ATH10K_STATE_WEDGED;
2322                 /* fall through */
2323         case ATH10K_STATE_WEDGED:
2324                 ath10k_warn(ar, "device is wedged, will not restart\n");
2325                 break;
2326         case ATH10K_STATE_UTF:
2327                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2328                 break;
2329         }
2330
2331         mutex_unlock(&ar->conf_mutex);
2332
2333         ret = ath10k_coredump_submit(ar);
2334         if (ret)
2335                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2336                             ret);
2337
2338         complete(&ar->driver_recovery);
2339 }
2340
2341 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2342 {
2343         struct ath10k *ar = container_of(work, struct ath10k,
2344                                          set_coverage_class_work);
2345
2346         if (ar->hw_params.hw_ops->set_coverage_class)
2347                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2348 }
2349
2350 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2351 {
2352         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2353         int max_num_peers;
2354
2355         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2356             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2357                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2358                 return -EINVAL;
2359         }
2360
2361         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2362                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2363                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2364                 return -EINVAL;
2365         }
2366
2367         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2368         switch (ath10k_cryptmode_param) {
2369         case ATH10K_CRYPT_MODE_HW:
2370                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2371                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2372                 break;
2373         case ATH10K_CRYPT_MODE_SW:
2374                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2375                               fw_file->fw_features)) {
2376                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2377                         return -EINVAL;
2378                 }
2379
2380                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2381                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2382                 break;
2383         default:
2384                 ath10k_info(ar, "invalid cryptmode: %d\n",
2385                             ath10k_cryptmode_param);
2386                 return -EINVAL;
2387         }
2388
2389         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2390         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2391
2392         if (rawmode) {
2393                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2394                               fw_file->fw_features)) {
2395                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
2396                         return -EINVAL;
2397                 }
2398                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2399         }
2400
2401         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2402                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2403
2404                 /* Workaround:
2405                  *
2406                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2407                  * and causes enormous performance issues (malformed frames,
2408                  * etc).
2409                  *
2410                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
2411                  * albeit a bit slower compared to regular operation.
2412                  */
2413                 ar->htt.max_num_amsdu = 1;
2414         }
2415
2416         /* Backwards compatibility for firmwares without
2417          * ATH10K_FW_IE_WMI_OP_VERSION.
2418          */
2419         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2420                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2421                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2422                                      fw_file->fw_features))
2423                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2424                         else
2425                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2426                 } else {
2427                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2428                 }
2429         }
2430
2431         switch (fw_file->wmi_op_version) {
2432         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2433                 max_num_peers = TARGET_NUM_PEERS;
2434                 ar->max_num_stations = TARGET_NUM_STATIONS;
2435                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2436                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2437                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2438                         WMI_STAT_PEER;
2439                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2440                 break;
2441         case ATH10K_FW_WMI_OP_VERSION_10_1:
2442         case ATH10K_FW_WMI_OP_VERSION_10_2:
2443         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2444                 if (ath10k_peer_stats_enabled(ar)) {
2445                         max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2446                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2447                 } else {
2448                         max_num_peers = TARGET_10X_NUM_PEERS;
2449                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2450                 }
2451                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2452                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2453                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2454                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2455                 break;
2456         case ATH10K_FW_WMI_OP_VERSION_TLV:
2457                 max_num_peers = TARGET_TLV_NUM_PEERS;
2458                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2459                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2460                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2461                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2462                         ar->htt.max_num_pending_tx =
2463                                 TARGET_TLV_NUM_MSDU_DESC_HL;
2464                 else
2465                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2466                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2467                 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2468                         WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2469                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2470                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2471                 break;
2472         case ATH10K_FW_WMI_OP_VERSION_10_4:
2473                 max_num_peers = TARGET_10_4_NUM_PEERS;
2474                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2475                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2476                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2477                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2478                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2479                                         WMI_10_4_STAT_PEER_EXTD |
2480                                         WMI_10_4_STAT_VDEV_EXTD;
2481                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2482                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2483
2484                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2485                              fw_file->fw_features))
2486                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2487                 else
2488                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2489                 break;
2490         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2491         case ATH10K_FW_WMI_OP_VERSION_MAX:
2492         default:
2493                 WARN_ON(1);
2494                 return -EINVAL;
2495         }
2496
2497         if (ar->hw_params.num_peers)
2498                 ar->max_num_peers = ar->hw_params.num_peers;
2499         else
2500                 ar->max_num_peers = max_num_peers;
2501
2502         /* Backwards compatibility for firmwares without
2503          * ATH10K_FW_IE_HTT_OP_VERSION.
2504          */
2505         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2506                 switch (fw_file->wmi_op_version) {
2507                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2508                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2509                         break;
2510                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2511                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2512                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2513                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2514                         break;
2515                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2516                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2517                         break;
2518                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2519                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2520                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2521                         ath10k_err(ar, "htt op version not found from fw meta data");
2522                         return -EINVAL;
2523                 }
2524         }
2525
2526         return 0;
2527 }
2528
2529 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2530 {
2531         int ret;
2532         int vdev_id;
2533         int vdev_type;
2534         int vdev_subtype;
2535         const u8 *vdev_addr;
2536
2537         vdev_id = 0;
2538         vdev_type = WMI_VDEV_TYPE_STA;
2539         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2540         vdev_addr = ar->mac_addr;
2541
2542         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2543                                      vdev_addr);
2544         if (ret) {
2545                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2546                 return ret;
2547         }
2548
2549         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2550         if (ret) {
2551                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2552                 return ret;
2553         }
2554
2555         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2556          * serialized properly implicitly.
2557          *
2558          * Moreover (most) WMI commands have no explicit acknowledges. It is
2559          * possible to infer it implicitly by poking firmware with echo
2560          * command - getting a reply means all preceding comments have been
2561          * (mostly) processed.
2562          *
2563          * In case of vdev create/delete this is sufficient.
2564          *
2565          * Without this it's possible to end up with a race when HTT Rx ring is
2566          * started before vdev create/delete hack is complete allowing a short
2567          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2568          */
2569         ret = ath10k_wmi_barrier(ar);
2570         if (ret) {
2571                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2572                 return ret;
2573         }
2574
2575         return 0;
2576 }
2577
2578 static int ath10k_core_compat_services(struct ath10k *ar)
2579 {
2580         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2581
2582         /* all 10.x firmware versions support thermal throttling but don't
2583          * advertise the support via service flags so we have to hardcode
2584          * it here
2585          */
2586         switch (fw_file->wmi_op_version) {
2587         case ATH10K_FW_WMI_OP_VERSION_10_1:
2588         case ATH10K_FW_WMI_OP_VERSION_10_2:
2589         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2590         case ATH10K_FW_WMI_OP_VERSION_10_4:
2591                 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2592                 break;
2593         default:
2594                 break;
2595         }
2596
2597         return 0;
2598 }
2599
2600 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2601                       const struct ath10k_fw_components *fw)
2602 {
2603         int status;
2604         u32 val;
2605
2606         lockdep_assert_held(&ar->conf_mutex);
2607
2608         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2609
2610         ar->running_fw = fw;
2611
2612         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2613                       ar->running_fw->fw_file.fw_features)) {
2614                 ath10k_bmi_start(ar);
2615
2616                 if (ath10k_init_configure_target(ar)) {
2617                         status = -EINVAL;
2618                         goto err;
2619                 }
2620
2621                 status = ath10k_download_cal_data(ar);
2622                 if (status)
2623                         goto err;
2624
2625                 /* Some of of qca988x solutions are having global reset issue
2626                  * during target initialization. Bypassing PLL setting before
2627                  * downloading firmware and letting the SoC run on REF_CLK is
2628                  * fixing the problem. Corresponding firmware change is also
2629                  * needed to set the clock source once the target is
2630                  * initialized.
2631                  */
2632                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2633                              ar->running_fw->fw_file.fw_features)) {
2634                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2635                         if (status) {
2636                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2637                                            status);
2638                                 goto err;
2639                         }
2640                 }
2641
2642                 status = ath10k_download_fw(ar);
2643                 if (status)
2644                         goto err;
2645
2646                 status = ath10k_init_uart(ar);
2647                 if (status)
2648                         goto err;
2649
2650                 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2651                         status = ath10k_init_sdio(ar, mode);
2652                         if (status) {
2653                                 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2654                                 goto err;
2655                         }
2656                 }
2657         }
2658
2659         ar->htc.htc_ops.target_send_suspend_complete =
2660                 ath10k_send_suspend_complete;
2661
2662         status = ath10k_htc_init(ar);
2663         if (status) {
2664                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2665                 goto err;
2666         }
2667
2668         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2669                       ar->running_fw->fw_file.fw_features)) {
2670                 status = ath10k_bmi_done(ar);
2671                 if (status)
2672                         goto err;
2673         }
2674
2675         status = ath10k_wmi_attach(ar);
2676         if (status) {
2677                 ath10k_err(ar, "WMI attach failed: %d\n", status);
2678                 goto err;
2679         }
2680
2681         status = ath10k_htt_init(ar);
2682         if (status) {
2683                 ath10k_err(ar, "failed to init htt: %d\n", status);
2684                 goto err_wmi_detach;
2685         }
2686
2687         status = ath10k_htt_tx_start(&ar->htt);
2688         if (status) {
2689                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2690                 goto err_wmi_detach;
2691         }
2692
2693         /* If firmware indicates Full Rx Reorder support it must be used in a
2694          * slightly different manner. Let HTT code know.
2695          */
2696         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2697                                                 ar->wmi.svc_map));
2698
2699         status = ath10k_htt_rx_alloc(&ar->htt);
2700         if (status) {
2701                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2702                 goto err_htt_tx_detach;
2703         }
2704
2705         status = ath10k_hif_start(ar);
2706         if (status) {
2707                 ath10k_err(ar, "could not start HIF: %d\n", status);
2708                 goto err_htt_rx_detach;
2709         }
2710
2711         status = ath10k_htc_wait_target(&ar->htc);
2712         if (status) {
2713                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2714                 goto err_hif_stop;
2715         }
2716
2717         status = ath10k_hif_swap_mailbox(ar);
2718         if (status) {
2719                 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2720                 goto err_hif_stop;
2721         }
2722
2723         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2724                 status = ath10k_htt_connect(&ar->htt);
2725                 if (status) {
2726                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
2727                         goto err_hif_stop;
2728                 }
2729         }
2730
2731         status = ath10k_wmi_connect(ar);
2732         if (status) {
2733                 ath10k_err(ar, "could not connect wmi: %d\n", status);
2734                 goto err_hif_stop;
2735         }
2736
2737         status = ath10k_htc_start(&ar->htc);
2738         if (status) {
2739                 ath10k_err(ar, "failed to start htc: %d\n", status);
2740                 goto err_hif_stop;
2741         }
2742
2743         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2744                 status = ath10k_wmi_wait_for_service_ready(ar);
2745                 if (status) {
2746                         ath10k_warn(ar, "wmi service ready event not received");
2747                         goto err_hif_stop;
2748                 }
2749         }
2750
2751         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2752                    ar->hw->wiphy->fw_version);
2753
2754         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2755             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2756                 val = 0;
2757                 if (ath10k_peer_stats_enabled(ar))
2758                         val = WMI_10_4_PEER_STATS;
2759
2760                 /* Enable vdev stats by default */
2761                 val |= WMI_10_4_VDEV_STATS;
2762
2763                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2764                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2765
2766                 ath10k_core_fetch_btcoex_dt(ar);
2767
2768                 /* 10.4 firmware supports BT-Coex without reloading firmware
2769                  * via pdev param. To support Bluetooth coexistence pdev param,
2770                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2771                  * enabled always.
2772                  *
2773                  * We can still enable BTCOEX if firmware has the support
2774                  * eventhough btceox_support value is
2775                  * ATH10K_DT_BTCOEX_NOT_FOUND
2776                  */
2777
2778                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2779                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2780                              ar->running_fw->fw_file.fw_features) &&
2781                     ar->coex_support)
2782                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
2783
2784                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2785                              ar->wmi.svc_map))
2786                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2787
2788                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2789                              ar->wmi.svc_map))
2790                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2791
2792                 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2793                              ar->wmi.svc_map))
2794                         val |= WMI_10_4_TX_DATA_ACK_RSSI;
2795
2796                 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2797                         val |= WMI_10_4_REPORT_AIRTIME;
2798
2799                 status = ath10k_mac_ext_resource_config(ar, val);
2800                 if (status) {
2801                         ath10k_err(ar,
2802                                    "failed to send ext resource cfg command : %d\n",
2803                                    status);
2804                         goto err_hif_stop;
2805                 }
2806         }
2807
2808         status = ath10k_wmi_cmd_init(ar);
2809         if (status) {
2810                 ath10k_err(ar, "could not send WMI init command (%d)\n",
2811                            status);
2812                 goto err_hif_stop;
2813         }
2814
2815         status = ath10k_wmi_wait_for_unified_ready(ar);
2816         if (status) {
2817                 ath10k_err(ar, "wmi unified ready event not received\n");
2818                 goto err_hif_stop;
2819         }
2820
2821         status = ath10k_core_compat_services(ar);
2822         if (status) {
2823                 ath10k_err(ar, "compat services failed: %d\n", status);
2824                 goto err_hif_stop;
2825         }
2826
2827         status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2828         if (status && status != -EOPNOTSUPP) {
2829                 ath10k_err(ar,
2830                            "failed to set base mac address: %d\n", status);
2831                 goto err_hif_stop;
2832         }
2833
2834         /* Some firmware revisions do not properly set up hardware rx filter
2835          * registers.
2836          *
2837          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2838          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2839          * any frames that matches MAC_PCU_RX_FILTER which is also
2840          * misconfigured to accept anything.
2841          *
2842          * The ADDR1 is programmed using internal firmware structure field and
2843          * can't be (easily/sanely) reached from the driver explicitly. It is
2844          * possible to implicitly make it correct by creating a dummy vdev and
2845          * then deleting it.
2846          */
2847         if (ar->hw_params.hw_filter_reset_required &&
2848             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2849                 status = ath10k_core_reset_rx_filter(ar);
2850                 if (status) {
2851                         ath10k_err(ar,
2852                                    "failed to reset rx filter: %d\n", status);
2853                         goto err_hif_stop;
2854                 }
2855         }
2856
2857         status = ath10k_htt_rx_ring_refill(ar);
2858         if (status) {
2859                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2860                 goto err_hif_stop;
2861         }
2862
2863         if (ar->max_num_vdevs >= 64)
2864                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2865         else
2866                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2867
2868         INIT_LIST_HEAD(&ar->arvifs);
2869
2870         /* we don't care about HTT in UTF mode */
2871         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2872                 status = ath10k_htt_setup(&ar->htt);
2873                 if (status) {
2874                         ath10k_err(ar, "failed to setup htt: %d\n", status);
2875                         goto err_hif_stop;
2876                 }
2877         }
2878
2879         status = ath10k_debug_start(ar);
2880         if (status)
2881                 goto err_hif_stop;
2882
2883         status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
2884         if (status && status != -EOPNOTSUPP) {
2885                 ath10k_warn(ar, "set target log mode failed: %d\n", status);
2886                 goto err_hif_stop;
2887         }
2888
2889         return 0;
2890
2891 err_hif_stop:
2892         ath10k_hif_stop(ar);
2893 err_htt_rx_detach:
2894         ath10k_htt_rx_free(&ar->htt);
2895 err_htt_tx_detach:
2896         ath10k_htt_tx_free(&ar->htt);
2897 err_wmi_detach:
2898         ath10k_wmi_detach(ar);
2899 err:
2900         return status;
2901 }
2902 EXPORT_SYMBOL(ath10k_core_start);
2903
2904 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2905 {
2906         int ret;
2907         unsigned long time_left;
2908
2909         reinit_completion(&ar->target_suspend);
2910
2911         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2912         if (ret) {
2913                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2914                 return ret;
2915         }
2916
2917         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2918
2919         if (!time_left) {
2920                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2921                 return -ETIMEDOUT;
2922         }
2923
2924         return 0;
2925 }
2926
2927 void ath10k_core_stop(struct ath10k *ar)
2928 {
2929         lockdep_assert_held(&ar->conf_mutex);
2930         ath10k_debug_stop(ar);
2931
2932         /* try to suspend target */
2933         if (ar->state != ATH10K_STATE_RESTARTING &&
2934             ar->state != ATH10K_STATE_UTF)
2935                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2936
2937         ath10k_hif_stop(ar);
2938         ath10k_htt_tx_stop(&ar->htt);
2939         ath10k_htt_rx_free(&ar->htt);
2940         ath10k_wmi_detach(ar);
2941
2942         ar->id.bmi_ids_valid = false;
2943 }
2944 EXPORT_SYMBOL(ath10k_core_stop);
2945
2946 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2947  * order to know what hw capabilities should be advertised to mac80211 it is
2948  * necessary to load the firmware (and tear it down immediately since start
2949  * hook will try to init it again) before registering
2950  */
2951 static int ath10k_core_probe_fw(struct ath10k *ar)
2952 {
2953         struct bmi_target_info target_info;
2954         int ret = 0;
2955
2956         ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
2957         if (ret) {
2958                 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2959                 return ret;
2960         }
2961
2962         switch (ar->hif.bus) {
2963         case ATH10K_BUS_SDIO:
2964                 memset(&target_info, 0, sizeof(target_info));
2965                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2966                 if (ret) {
2967                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2968                         goto err_power_down;
2969                 }
2970                 ar->target_version = target_info.version;
2971                 ar->hw->wiphy->hw_version = target_info.version;
2972                 break;
2973         case ATH10K_BUS_PCI:
2974         case ATH10K_BUS_AHB:
2975         case ATH10K_BUS_USB:
2976                 memset(&target_info, 0, sizeof(target_info));
2977                 ret = ath10k_bmi_get_target_info(ar, &target_info);
2978                 if (ret) {
2979                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2980                         goto err_power_down;
2981                 }
2982                 ar->target_version = target_info.version;
2983                 ar->hw->wiphy->hw_version = target_info.version;
2984                 break;
2985         case ATH10K_BUS_SNOC:
2986                 memset(&target_info, 0, sizeof(target_info));
2987                 ret = ath10k_hif_get_target_info(ar, &target_info);
2988                 if (ret) {
2989                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2990                         goto err_power_down;
2991                 }
2992                 ar->target_version = target_info.version;
2993                 ar->hw->wiphy->hw_version = target_info.version;
2994                 break;
2995         default:
2996                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2997         }
2998
2999         ret = ath10k_init_hw_params(ar);
3000         if (ret) {
3001                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3002                 goto err_power_down;
3003         }
3004
3005         ret = ath10k_core_fetch_firmware_files(ar);
3006         if (ret) {
3007                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3008                 goto err_power_down;
3009         }
3010
3011         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3012                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
3013         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3014                sizeof(ar->hw->wiphy->fw_version));
3015
3016         ath10k_debug_print_hwfw_info(ar);
3017
3018         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3019                       ar->normal_mode_fw.fw_file.fw_features)) {
3020                 ret = ath10k_core_pre_cal_download(ar);
3021                 if (ret) {
3022                         /* pre calibration data download is not necessary
3023                          * for all the chipsets. Ignore failures and continue.
3024                          */
3025                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
3026                                    "could not load pre cal data: %d\n", ret);
3027                 }
3028
3029                 ret = ath10k_core_get_board_id_from_otp(ar);
3030                 if (ret && ret != -EOPNOTSUPP) {
3031                         ath10k_err(ar, "failed to get board id from otp: %d\n",
3032                                    ret);
3033                         goto err_free_firmware_files;
3034                 }
3035
3036                 ret = ath10k_core_check_smbios(ar);
3037                 if (ret)
3038                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3039
3040                 ret = ath10k_core_check_dt(ar);
3041                 if (ret)
3042                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3043
3044                 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3045                 if (ret) {
3046                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3047                         goto err_free_firmware_files;
3048                 }
3049
3050                 ath10k_debug_print_board_info(ar);
3051         }
3052
3053         device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
3054
3055         ret = ath10k_core_init_firmware_features(ar);
3056         if (ret) {
3057                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3058                            ret);
3059                 goto err_free_firmware_files;
3060         }
3061
3062         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3063                       ar->normal_mode_fw.fw_file.fw_features)) {
3064                 ret = ath10k_swap_code_seg_init(ar,
3065                                                 &ar->normal_mode_fw.fw_file);
3066                 if (ret) {
3067                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3068                                    ret);
3069                         goto err_free_firmware_files;
3070                 }
3071         }
3072
3073         mutex_lock(&ar->conf_mutex);
3074
3075         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3076                                 &ar->normal_mode_fw);
3077         if (ret) {
3078                 ath10k_err(ar, "could not init core (%d)\n", ret);
3079                 goto err_unlock;
3080         }
3081
3082         ath10k_debug_print_boot_info(ar);
3083         ath10k_core_stop(ar);
3084
3085         mutex_unlock(&ar->conf_mutex);
3086
3087         ath10k_hif_power_down(ar);
3088         return 0;
3089
3090 err_unlock:
3091         mutex_unlock(&ar->conf_mutex);
3092
3093 err_free_firmware_files:
3094         ath10k_core_free_firmware_files(ar);
3095
3096 err_power_down:
3097         ath10k_hif_power_down(ar);
3098
3099         return ret;
3100 }
3101
3102 static void ath10k_core_register_work(struct work_struct *work)
3103 {
3104         struct ath10k *ar = container_of(work, struct ath10k, register_work);
3105         int status;
3106
3107         /* peer stats are enabled by default */
3108         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3109
3110         status = ath10k_core_probe_fw(ar);
3111         if (status) {
3112                 ath10k_err(ar, "could not probe fw (%d)\n", status);
3113                 goto err;
3114         }
3115
3116         status = ath10k_mac_register(ar);
3117         if (status) {
3118                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3119                 goto err_release_fw;
3120         }
3121
3122         status = ath10k_coredump_register(ar);
3123         if (status) {
3124                 ath10k_err(ar, "unable to register coredump\n");
3125                 goto err_unregister_mac;
3126         }
3127
3128         status = ath10k_debug_register(ar);
3129         if (status) {
3130                 ath10k_err(ar, "unable to initialize debugfs\n");
3131                 goto err_unregister_coredump;
3132         }
3133
3134         status = ath10k_spectral_create(ar);
3135         if (status) {
3136                 ath10k_err(ar, "failed to initialize spectral\n");
3137                 goto err_debug_destroy;
3138         }
3139
3140         status = ath10k_thermal_register(ar);
3141         if (status) {
3142                 ath10k_err(ar, "could not register thermal device: %d\n",
3143                            status);
3144                 goto err_spectral_destroy;
3145         }
3146
3147         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3148         return;
3149
3150 err_spectral_destroy:
3151         ath10k_spectral_destroy(ar);
3152 err_debug_destroy:
3153         ath10k_debug_destroy(ar);
3154 err_unregister_coredump:
3155         ath10k_coredump_unregister(ar);
3156 err_unregister_mac:
3157         ath10k_mac_unregister(ar);
3158 err_release_fw:
3159         ath10k_core_free_firmware_files(ar);
3160 err:
3161         /* TODO: It's probably a good idea to release device from the driver
3162          * but calling device_release_driver() here will cause a deadlock.
3163          */
3164         return;
3165 }
3166
3167 int ath10k_core_register(struct ath10k *ar,
3168                          const struct ath10k_bus_params *bus_params)
3169 {
3170         ar->bus_param = *bus_params;
3171
3172         queue_work(ar->workqueue, &ar->register_work);
3173
3174         return 0;
3175 }
3176 EXPORT_SYMBOL(ath10k_core_register);
3177
3178 void ath10k_core_unregister(struct ath10k *ar)
3179 {
3180         cancel_work_sync(&ar->register_work);
3181
3182         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3183                 return;
3184
3185         ath10k_thermal_unregister(ar);
3186         /* Stop spectral before unregistering from mac80211 to remove the
3187          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3188          * would be already be free'd recursively, leading to a double free.
3189          */
3190         ath10k_spectral_destroy(ar);
3191
3192         /* We must unregister from mac80211 before we stop HTC and HIF.
3193          * Otherwise we will fail to submit commands to FW and mac80211 will be
3194          * unhappy about callback failures.
3195          */
3196         ath10k_mac_unregister(ar);
3197
3198         ath10k_testmode_destroy(ar);
3199
3200         ath10k_core_free_firmware_files(ar);
3201         ath10k_core_free_board_files(ar);
3202
3203         ath10k_debug_unregister(ar);
3204 }
3205 EXPORT_SYMBOL(ath10k_core_unregister);
3206
3207 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3208                                   enum ath10k_bus bus,
3209                                   enum ath10k_hw_rev hw_rev,
3210                                   const struct ath10k_hif_ops *hif_ops)
3211 {
3212         struct ath10k *ar;
3213         int ret;
3214
3215         ar = ath10k_mac_create(priv_size);
3216         if (!ar)
3217                 return NULL;
3218
3219         ar->ath_common.priv = ar;
3220         ar->ath_common.hw = ar->hw;
3221         ar->dev = dev;
3222         ar->hw_rev = hw_rev;
3223         ar->hif.ops = hif_ops;
3224         ar->hif.bus = bus;
3225
3226         switch (hw_rev) {
3227         case ATH10K_HW_QCA988X:
3228         case ATH10K_HW_QCA9887:
3229                 ar->regs = &qca988x_regs;
3230                 ar->hw_ce_regs = &qcax_ce_regs;
3231                 ar->hw_values = &qca988x_values;
3232                 break;
3233         case ATH10K_HW_QCA6174:
3234         case ATH10K_HW_QCA9377:
3235                 ar->regs = &qca6174_regs;
3236                 ar->hw_ce_regs = &qcax_ce_regs;
3237                 ar->hw_values = &qca6174_values;
3238                 break;
3239         case ATH10K_HW_QCA99X0:
3240         case ATH10K_HW_QCA9984:
3241                 ar->regs = &qca99x0_regs;
3242                 ar->hw_ce_regs = &qcax_ce_regs;
3243                 ar->hw_values = &qca99x0_values;
3244                 break;
3245         case ATH10K_HW_QCA9888:
3246                 ar->regs = &qca99x0_regs;
3247                 ar->hw_ce_regs = &qcax_ce_regs;
3248                 ar->hw_values = &qca9888_values;
3249                 break;
3250         case ATH10K_HW_QCA4019:
3251                 ar->regs = &qca4019_regs;
3252                 ar->hw_ce_regs = &qcax_ce_regs;
3253                 ar->hw_values = &qca4019_values;
3254                 break;
3255         case ATH10K_HW_WCN3990:
3256                 ar->regs = &wcn3990_regs;
3257                 ar->hw_ce_regs = &wcn3990_ce_regs;
3258                 ar->hw_values = &wcn3990_values;
3259                 break;
3260         default:
3261                 ath10k_err(ar, "unsupported core hardware revision %d\n",
3262                            hw_rev);
3263                 ret = -ENOTSUPP;
3264                 goto err_free_mac;
3265         }
3266
3267         init_completion(&ar->scan.started);
3268         init_completion(&ar->scan.completed);
3269         init_completion(&ar->scan.on_channel);
3270         init_completion(&ar->target_suspend);
3271         init_completion(&ar->driver_recovery);
3272         init_completion(&ar->wow.wakeup_completed);
3273
3274         init_completion(&ar->install_key_done);
3275         init_completion(&ar->vdev_setup_done);
3276         init_completion(&ar->vdev_delete_done);
3277         init_completion(&ar->thermal.wmi_sync);
3278         init_completion(&ar->bss_survey_done);
3279         init_completion(&ar->peer_delete_done);
3280
3281         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3282
3283         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3284         if (!ar->workqueue)
3285                 goto err_free_mac;
3286
3287         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3288         if (!ar->workqueue_aux)
3289                 goto err_free_wq;
3290
3291         mutex_init(&ar->conf_mutex);
3292         mutex_init(&ar->dump_mutex);
3293         spin_lock_init(&ar->data_lock);
3294
3295         INIT_LIST_HEAD(&ar->peers);
3296         init_waitqueue_head(&ar->peer_mapping_wq);
3297         init_waitqueue_head(&ar->htt.empty_tx_wq);
3298         init_waitqueue_head(&ar->wmi.tx_credits_wq);
3299
3300         skb_queue_head_init(&ar->htt.rx_indication_head);
3301
3302         init_completion(&ar->offchan_tx_completed);
3303         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3304         skb_queue_head_init(&ar->offchan_tx_queue);
3305
3306         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3307         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3308
3309         INIT_WORK(&ar->register_work, ath10k_core_register_work);
3310         INIT_WORK(&ar->restart_work, ath10k_core_restart);
3311         INIT_WORK(&ar->set_coverage_class_work,
3312                   ath10k_core_set_coverage_class_work);
3313
3314         init_dummy_netdev(&ar->napi_dev);
3315
3316         ret = ath10k_coredump_create(ar);
3317         if (ret)
3318                 goto err_free_aux_wq;
3319
3320         ret = ath10k_debug_create(ar);
3321         if (ret)
3322                 goto err_free_coredump;
3323
3324         return ar;
3325
3326 err_free_coredump:
3327         ath10k_coredump_destroy(ar);
3328
3329 err_free_aux_wq:
3330         destroy_workqueue(ar->workqueue_aux);
3331 err_free_wq:
3332         destroy_workqueue(ar->workqueue);
3333
3334 err_free_mac:
3335         ath10k_mac_destroy(ar);
3336
3337         return NULL;
3338 }
3339 EXPORT_SYMBOL(ath10k_core_create);
3340
3341 void ath10k_core_destroy(struct ath10k *ar)
3342 {
3343         flush_workqueue(ar->workqueue);
3344         destroy_workqueue(ar->workqueue);
3345
3346         flush_workqueue(ar->workqueue_aux);
3347         destroy_workqueue(ar->workqueue_aux);
3348
3349         ath10k_debug_destroy(ar);
3350         ath10k_coredump_destroy(ar);
3351         ath10k_htt_tx_destroy(&ar->htt);
3352         ath10k_wmi_free_host_mem(ar);
3353         ath10k_mac_destroy(ar);
3354 }
3355 EXPORT_SYMBOL(ath10k_core_destroy);
3356
3357 MODULE_AUTHOR("Qualcomm Atheros");
3358 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3359 MODULE_LICENSE("Dual BSD/GPL");