2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 #define PHY_MODE_MARVELL 0x0000
25 #define MII_MARVELL_LED_CTRL 0x0018
26 #define MII_MARVELL_STATUS 0x001b
27 #define MII_MARVELL_CTRL 0x0014
29 #define MARVELL_LED_MANUAL 0x0019
31 #define MARVELL_STATUS_HWCFG 0x0004
33 #define MARVELL_CTRL_TXDELAY 0x0002
34 #define MARVELL_CTRL_RXDELAY 0x0080
36 #define PHY_MODE_RTL8211CL 0x000C
38 #define AX88772A_PHY14H 0x14
39 #define AX88772A_PHY14H_DEFAULT 0x442C
41 #define AX88772A_PHY15H 0x15
42 #define AX88772A_PHY15H_DEFAULT 0x03C8
44 #define AX88772A_PHY16H 0x16
45 #define AX88772A_PHY16H_DEFAULT 0x4044
47 struct ax88172_int_data {
55 static void asix_status(struct usbnet *dev, struct urb *urb)
57 struct ax88172_int_data *event;
60 if (urb->actual_length < 8)
63 event = urb->transfer_buffer;
64 link = event->link & 0x01;
65 if (netif_carrier_ok(dev->net) != link) {
66 usbnet_link_change(dev, link, 1);
67 netdev_dbg(dev->net, "Link Status is: %d\n", link);
71 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
73 if (is_valid_ether_addr(addr)) {
74 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
76 netdev_info(dev->net, "invalid hw address, using random\n");
77 eth_hw_addr_random(dev->net);
81 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
82 static u32 asix_get_phyid(struct usbnet *dev)
88 /* Poll for the rare case the FW or phy isn't ready yet. */
89 for (i = 0; i < 100; i++) {
90 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
93 if (phy_reg != 0 && phy_reg != 0xFFFF)
98 if (phy_reg <= 0 || phy_reg == 0xFFFF)
101 phy_id = (phy_reg & 0xffff) << 16;
103 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
107 phy_id |= (phy_reg & 0xffff);
112 static u32 asix_get_link(struct net_device *net)
114 struct usbnet *dev = netdev_priv(net);
116 return mii_link_ok(&dev->mii);
119 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
121 struct usbnet *dev = netdev_priv(net);
123 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
126 /* We need to override some ethtool_ops so we require our
127 own structure so we don't interfere with other usbnet
128 devices that may be connected at the same time. */
129 static const struct ethtool_ops ax88172_ethtool_ops = {
130 .get_drvinfo = asix_get_drvinfo,
131 .get_link = asix_get_link,
132 .get_msglevel = usbnet_get_msglevel,
133 .set_msglevel = usbnet_set_msglevel,
134 .get_wol = asix_get_wol,
135 .set_wol = asix_set_wol,
136 .get_eeprom_len = asix_get_eeprom_len,
137 .get_eeprom = asix_get_eeprom,
138 .set_eeprom = asix_set_eeprom,
139 .nway_reset = usbnet_nway_reset,
140 .get_link_ksettings = usbnet_get_link_ksettings,
141 .set_link_ksettings = usbnet_set_link_ksettings,
144 static void ax88172_set_multicast(struct net_device *net)
146 struct usbnet *dev = netdev_priv(net);
147 struct asix_data *data = (struct asix_data *)&dev->data;
150 if (net->flags & IFF_PROMISC) {
152 } else if (net->flags & IFF_ALLMULTI ||
153 netdev_mc_count(net) > AX_MAX_MCAST) {
155 } else if (netdev_mc_empty(net)) {
156 /* just broadcast and directed */
158 /* We use the 20 byte dev->data
159 * for our 8 byte filter buffer
160 * to avoid allocating memory that
161 * is tricky to free later */
162 struct netdev_hw_addr *ha;
165 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
167 /* Build the multicast hash filter. */
168 netdev_for_each_mc_addr(ha, net) {
169 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
170 data->multi_filter[crc_bits >> 3] |=
174 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
175 AX_MCAST_FILTER_SIZE, data->multi_filter);
180 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
183 static int ax88172_link_reset(struct usbnet *dev)
186 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
188 mii_check_media(&dev->mii, 1, 1);
189 mii_ethtool_gset(&dev->mii, &ecmd);
190 mode = AX88172_MEDIUM_DEFAULT;
192 if (ecmd.duplex != DUPLEX_FULL)
193 mode |= ~AX88172_MEDIUM_FD;
195 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
196 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
198 asix_write_medium_mode(dev, mode, 0);
203 static const struct net_device_ops ax88172_netdev_ops = {
204 .ndo_open = usbnet_open,
205 .ndo_stop = usbnet_stop,
206 .ndo_start_xmit = usbnet_start_xmit,
207 .ndo_tx_timeout = usbnet_tx_timeout,
208 .ndo_change_mtu = usbnet_change_mtu,
209 .ndo_get_stats64 = usbnet_get_stats64,
210 .ndo_set_mac_address = eth_mac_addr,
211 .ndo_validate_addr = eth_validate_addr,
212 .ndo_do_ioctl = asix_ioctl,
213 .ndo_set_rx_mode = ax88172_set_multicast,
216 static void asix_phy_reset(struct usbnet *dev, unsigned int reset_bits)
218 unsigned int timeout = 5000;
220 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);
222 /* give phy_id a chance to process reset */
225 /* See IEEE 802.3 "22.2.4.1.1 Reset": 500ms max */
227 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)
234 netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n",
238 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
243 unsigned long gpio_bits = dev->driver_info->data;
245 usbnet_get_endpoints(dev,intf);
247 /* Toggle the GPIOs in a manufacturer/model specific way */
248 for (i = 2; i >= 0; i--) {
249 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
250 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
256 ret = asix_write_rx_ctl(dev, 0x80, 0);
260 /* Get the MAC address */
261 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
262 0, 0, ETH_ALEN, buf, 0);
264 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
269 asix_set_netdev_dev_addr(dev, buf);
271 /* Initialize MII structure */
272 dev->mii.dev = dev->net;
273 dev->mii.mdio_read = asix_mdio_read;
274 dev->mii.mdio_write = asix_mdio_write;
275 dev->mii.phy_id_mask = 0x3f;
276 dev->mii.reg_num_mask = 0x1f;
277 dev->mii.phy_id = asix_get_phy_addr(dev);
279 dev->net->netdev_ops = &ax88172_netdev_ops;
280 dev->net->ethtool_ops = &ax88172_ethtool_ops;
281 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
282 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
284 asix_phy_reset(dev, BMCR_RESET);
285 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
286 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
287 mii_nway_restart(&dev->mii);
295 static const struct ethtool_ops ax88772_ethtool_ops = {
296 .get_drvinfo = asix_get_drvinfo,
297 .get_link = asix_get_link,
298 .get_msglevel = usbnet_get_msglevel,
299 .set_msglevel = usbnet_set_msglevel,
300 .get_wol = asix_get_wol,
301 .set_wol = asix_set_wol,
302 .get_eeprom_len = asix_get_eeprom_len,
303 .get_eeprom = asix_get_eeprom,
304 .set_eeprom = asix_set_eeprom,
305 .nway_reset = usbnet_nway_reset,
306 .get_link_ksettings = usbnet_get_link_ksettings,
307 .set_link_ksettings = usbnet_set_link_ksettings,
310 static int ax88772_link_reset(struct usbnet *dev)
313 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
315 mii_check_media(&dev->mii, 1, 1);
316 mii_ethtool_gset(&dev->mii, &ecmd);
317 mode = AX88772_MEDIUM_DEFAULT;
319 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
320 mode &= ~AX_MEDIUM_PS;
322 if (ecmd.duplex != DUPLEX_FULL)
323 mode &= ~AX_MEDIUM_FD;
325 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
326 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
328 asix_write_medium_mode(dev, mode, 0);
333 static int ax88772_reset(struct usbnet *dev)
335 struct asix_data *data = (struct asix_data *)&dev->data;
338 /* Rewrite MAC address */
339 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
340 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
341 ETH_ALEN, data->mac_addr, 0);
345 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
346 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
350 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
360 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
362 struct asix_data *data = (struct asix_data *)&dev->data;
366 ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
367 AX_GPIO_GPO2EN, 5, in_pm);
371 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
373 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy,
376 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
381 ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
385 usleep_range(10000, 11000);
387 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
393 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
398 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
406 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
412 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
416 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
420 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
421 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
422 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
424 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
428 /* Rewrite MAC address */
429 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
430 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
431 ETH_ALEN, data->mac_addr, in_pm);
435 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
436 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
440 rx_ctl = asix_read_rx_ctl(dev, in_pm);
441 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
444 rx_ctl = asix_read_medium_status(dev, in_pm);
446 "Medium Status is 0x%04x after all initializations\n",
455 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
457 struct asix_data *data = (struct asix_data *)&dev->data;
459 u16 rx_ctl, phy14h, phy15h, phy16h;
462 ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
466 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
468 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy |
469 AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
471 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
474 usleep_range(10000, 11000);
476 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
480 usleep_range(10000, 11000);
482 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
488 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
492 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
498 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
504 ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0,
505 0, 1, &chipcode, in_pm);
509 if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772B_CHIPCODE) {
510 ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
513 netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
517 } else if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772A_CHIPCODE) {
518 /* Check if the PHY registers have default settings */
519 phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
521 phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
523 phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
527 "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n",
528 phy14h, phy15h, phy16h);
530 /* Restore PHY registers default setting if not */
531 if (phy14h != AX88772A_PHY14H_DEFAULT)
532 asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
534 AX88772A_PHY14H_DEFAULT);
535 if (phy15h != AX88772A_PHY15H_DEFAULT)
536 asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
538 AX88772A_PHY15H_DEFAULT);
539 if (phy16h != AX88772A_PHY16H_DEFAULT)
540 asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
542 AX88772A_PHY16H_DEFAULT);
545 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
546 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
547 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
549 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
553 /* Rewrite MAC address */
554 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
555 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
556 data->mac_addr, in_pm);
560 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
561 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
565 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
569 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
570 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
574 rx_ctl = asix_read_rx_ctl(dev, in_pm);
575 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
578 rx_ctl = asix_read_medium_status(dev, in_pm);
580 "Medium Status is 0x%04x after all initializations\n",
589 static const struct net_device_ops ax88772_netdev_ops = {
590 .ndo_open = usbnet_open,
591 .ndo_stop = usbnet_stop,
592 .ndo_start_xmit = usbnet_start_xmit,
593 .ndo_tx_timeout = usbnet_tx_timeout,
594 .ndo_change_mtu = usbnet_change_mtu,
595 .ndo_get_stats64 = usbnet_get_stats64,
596 .ndo_set_mac_address = asix_set_mac_address,
597 .ndo_validate_addr = eth_validate_addr,
598 .ndo_do_ioctl = asix_ioctl,
599 .ndo_set_rx_mode = asix_set_multicast,
602 static void ax88772_suspend(struct usbnet *dev)
604 struct asix_common_private *priv = dev->driver_priv;
607 /* Stop MAC operation */
608 medium = asix_read_medium_status(dev, 1);
609 medium &= ~AX_MEDIUM_RE;
610 asix_write_medium_mode(dev, medium, 1);
612 netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n",
613 asix_read_medium_status(dev, 1));
615 /* Preserve BMCR for restoring */
616 priv->presvd_phy_bmcr =
617 asix_mdio_read_nopm(dev->net, dev->mii.phy_id, MII_BMCR);
619 /* Preserve ANAR for restoring */
620 priv->presvd_phy_advertise =
621 asix_mdio_read_nopm(dev->net, dev->mii.phy_id, MII_ADVERTISE);
624 static int asix_suspend(struct usb_interface *intf, pm_message_t message)
626 struct usbnet *dev = usb_get_intfdata(intf);
627 struct asix_common_private *priv = dev->driver_priv;
629 if (priv && priv->suspend)
632 return usbnet_suspend(intf, message);
635 static void ax88772_restore_phy(struct usbnet *dev)
637 struct asix_common_private *priv = dev->driver_priv;
639 if (priv->presvd_phy_advertise) {
640 /* Restore Advertisement control reg */
641 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_ADVERTISE,
642 priv->presvd_phy_advertise);
645 if (priv->presvd_phy_bmcr & BMCR_ANENABLE)
646 priv->presvd_phy_bmcr |= BMCR_ANRESTART;
648 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_BMCR,
649 priv->presvd_phy_bmcr);
651 priv->presvd_phy_advertise = 0;
652 priv->presvd_phy_bmcr = 0;
656 static void ax88772_resume(struct usbnet *dev)
660 for (i = 0; i < 3; i++)
661 if (!ax88772_hw_reset(dev, 1))
663 ax88772_restore_phy(dev);
666 static void ax88772a_resume(struct usbnet *dev)
670 for (i = 0; i < 3; i++) {
671 if (!ax88772a_hw_reset(dev, 1))
675 ax88772_restore_phy(dev);
678 static int asix_resume(struct usb_interface *intf)
680 struct usbnet *dev = usb_get_intfdata(intf);
681 struct asix_common_private *priv = dev->driver_priv;
683 if (priv && priv->resume)
686 return usbnet_resume(intf);
689 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
692 u8 buf[ETH_ALEN], chipcode = 0;
694 struct asix_common_private *priv;
696 usbnet_get_endpoints(dev,intf);
698 /* Get the MAC address */
699 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
700 for (i = 0; i < (ETH_ALEN >> 1); i++) {
701 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
702 0, 2, buf + i * 2, 0);
707 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
708 0, 0, ETH_ALEN, buf, 0);
712 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
716 asix_set_netdev_dev_addr(dev, buf);
718 /* Initialize MII structure */
719 dev->mii.dev = dev->net;
720 dev->mii.mdio_read = asix_mdio_read;
721 dev->mii.mdio_write = asix_mdio_write;
722 dev->mii.phy_id_mask = 0x1f;
723 dev->mii.reg_num_mask = 0x1f;
724 dev->mii.phy_id = asix_get_phy_addr(dev);
726 dev->net->netdev_ops = &ax88772_netdev_ops;
727 dev->net->ethtool_ops = &ax88772_ethtool_ops;
728 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
729 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
731 asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, &chipcode, 0);
732 chipcode &= AX_CHIPCODE_MASK;
734 (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev, 0) :
735 ax88772a_hw_reset(dev, 0);
737 /* Read PHYID register *AFTER* the PHY was reset properly */
738 phyid = asix_get_phyid(dev);
739 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
741 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
742 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
743 /* hard_mtu is still the default - the device does not support
745 dev->rx_urb_size = 2048;
748 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
749 if (!dev->driver_priv)
752 priv = dev->driver_priv;
754 priv->presvd_phy_bmcr = 0;
755 priv->presvd_phy_advertise = 0;
756 if (chipcode == AX_AX88772_CHIPCODE) {
757 priv->resume = ax88772_resume;
758 priv->suspend = ax88772_suspend;
760 priv->resume = ax88772a_resume;
761 priv->suspend = ax88772_suspend;
767 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
769 asix_rx_fixup_common_free(dev->driver_priv);
770 kfree(dev->driver_priv);
773 static const struct ethtool_ops ax88178_ethtool_ops = {
774 .get_drvinfo = asix_get_drvinfo,
775 .get_link = asix_get_link,
776 .get_msglevel = usbnet_get_msglevel,
777 .set_msglevel = usbnet_set_msglevel,
778 .get_wol = asix_get_wol,
779 .set_wol = asix_set_wol,
780 .get_eeprom_len = asix_get_eeprom_len,
781 .get_eeprom = asix_get_eeprom,
782 .set_eeprom = asix_set_eeprom,
783 .nway_reset = usbnet_nway_reset,
784 .get_link_ksettings = usbnet_get_link_ksettings,
785 .set_link_ksettings = usbnet_set_link_ksettings,
788 static int marvell_phy_init(struct usbnet *dev)
790 struct asix_data *data = (struct asix_data *)&dev->data;
793 netdev_dbg(dev->net, "marvell_phy_init()\n");
795 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
796 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
798 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
799 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
802 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
803 MII_MARVELL_LED_CTRL);
804 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
808 asix_mdio_write(dev->net, dev->mii.phy_id,
809 MII_MARVELL_LED_CTRL, reg);
811 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
812 MII_MARVELL_LED_CTRL);
813 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
820 static int rtl8211cl_phy_init(struct usbnet *dev)
822 struct asix_data *data = (struct asix_data *)&dev->data;
824 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
826 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
827 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
828 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
829 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
830 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
832 if (data->ledmode == 12) {
833 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
834 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
835 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
841 static int marvell_led_status(struct usbnet *dev, u16 speed)
843 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
845 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
847 /* Clear out the center LED bits - 0x03F0 */
861 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
862 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
867 static int ax88178_reset(struct usbnet *dev)
869 struct asix_data *data = (struct asix_data *)&dev->data;
876 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
877 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
879 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
880 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
881 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
883 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
885 if (eeprom == cpu_to_le16(0xffff)) {
886 data->phymode = PHY_MODE_MARVELL;
890 data->phymode = le16_to_cpu(eeprom) & 0x7F;
891 data->ledmode = le16_to_cpu(eeprom) >> 8;
892 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
894 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
896 /* Power up external GigaPHY through AX88178 GPIO pin */
897 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
898 AX_GPIO_GPO1EN, 40, 0);
899 if ((le16_to_cpu(eeprom) >> 8) != 1) {
900 asix_write_gpio(dev, 0x003c, 30, 0);
901 asix_write_gpio(dev, 0x001c, 300, 0);
902 asix_write_gpio(dev, 0x003c, 30, 0);
904 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
905 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
906 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
909 /* Read PHYID register *AFTER* powering up PHY */
910 phyid = asix_get_phyid(dev);
911 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
913 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
914 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
916 asix_sw_reset(dev, 0, 0);
919 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
922 asix_write_rx_ctl(dev, 0, 0);
924 if (data->phymode == PHY_MODE_MARVELL) {
925 marvell_phy_init(dev);
927 } else if (data->phymode == PHY_MODE_RTL8211CL)
928 rtl8211cl_phy_init(dev);
930 asix_phy_reset(dev, BMCR_RESET | BMCR_ANENABLE);
931 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
932 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
933 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
936 asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
937 mii_nway_restart(&dev->mii);
939 /* Rewrite MAC address */
940 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
941 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
946 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
953 static int ax88178_link_reset(struct usbnet *dev)
956 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
957 struct asix_data *data = (struct asix_data *)&dev->data;
960 netdev_dbg(dev->net, "ax88178_link_reset()\n");
962 mii_check_media(&dev->mii, 1, 1);
963 mii_ethtool_gset(&dev->mii, &ecmd);
964 mode = AX88178_MEDIUM_DEFAULT;
965 speed = ethtool_cmd_speed(&ecmd);
967 if (speed == SPEED_1000)
968 mode |= AX_MEDIUM_GM;
969 else if (speed == SPEED_100)
970 mode |= AX_MEDIUM_PS;
972 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
974 mode |= AX_MEDIUM_ENCK;
976 if (ecmd.duplex == DUPLEX_FULL)
977 mode |= AX_MEDIUM_FD;
979 mode &= ~AX_MEDIUM_FD;
981 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
982 speed, ecmd.duplex, mode);
984 asix_write_medium_mode(dev, mode, 0);
986 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
987 marvell_led_status(dev, speed);
992 static void ax88178_set_mfb(struct usbnet *dev)
994 u16 mfb = AX_RX_CTL_MFB_16384;
997 int old_rx_urb_size = dev->rx_urb_size;
999 if (dev->hard_mtu < 2048) {
1000 dev->rx_urb_size = 2048;
1001 mfb = AX_RX_CTL_MFB_2048;
1002 } else if (dev->hard_mtu < 4096) {
1003 dev->rx_urb_size = 4096;
1004 mfb = AX_RX_CTL_MFB_4096;
1005 } else if (dev->hard_mtu < 8192) {
1006 dev->rx_urb_size = 8192;
1007 mfb = AX_RX_CTL_MFB_8192;
1008 } else if (dev->hard_mtu < 16384) {
1009 dev->rx_urb_size = 16384;
1010 mfb = AX_RX_CTL_MFB_16384;
1013 rxctl = asix_read_rx_ctl(dev, 0);
1014 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
1016 medium = asix_read_medium_status(dev, 0);
1017 if (dev->net->mtu > 1500)
1018 medium |= AX_MEDIUM_JFE;
1020 medium &= ~AX_MEDIUM_JFE;
1021 asix_write_medium_mode(dev, medium, 0);
1023 if (dev->rx_urb_size > old_rx_urb_size)
1024 usbnet_unlink_rx_urbs(dev);
1027 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1029 struct usbnet *dev = netdev_priv(net);
1030 int ll_mtu = new_mtu + net->hard_header_len + 4;
1032 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1034 if ((ll_mtu % dev->maxpacket) == 0)
1038 dev->hard_mtu = net->mtu + net->hard_header_len;
1039 ax88178_set_mfb(dev);
1041 /* max qlen depend on hard_mtu and rx_urb_size */
1042 usbnet_update_max_qlen(dev);
1047 static const struct net_device_ops ax88178_netdev_ops = {
1048 .ndo_open = usbnet_open,
1049 .ndo_stop = usbnet_stop,
1050 .ndo_start_xmit = usbnet_start_xmit,
1051 .ndo_tx_timeout = usbnet_tx_timeout,
1052 .ndo_get_stats64 = usbnet_get_stats64,
1053 .ndo_set_mac_address = asix_set_mac_address,
1054 .ndo_validate_addr = eth_validate_addr,
1055 .ndo_set_rx_mode = asix_set_multicast,
1056 .ndo_do_ioctl = asix_ioctl,
1057 .ndo_change_mtu = ax88178_change_mtu,
1060 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1065 usbnet_get_endpoints(dev,intf);
1067 /* Get the MAC address */
1068 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1070 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1074 asix_set_netdev_dev_addr(dev, buf);
1076 /* Initialize MII structure */
1077 dev->mii.dev = dev->net;
1078 dev->mii.mdio_read = asix_mdio_read;
1079 dev->mii.mdio_write = asix_mdio_write;
1080 dev->mii.phy_id_mask = 0x1f;
1081 dev->mii.reg_num_mask = 0xff;
1082 dev->mii.supports_gmii = 1;
1083 dev->mii.phy_id = asix_get_phy_addr(dev);
1085 dev->net->netdev_ops = &ax88178_netdev_ops;
1086 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1087 dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4);
1089 /* Blink LEDS so users know driver saw dongle */
1090 asix_sw_reset(dev, 0, 0);
1093 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1096 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1097 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1098 /* hard_mtu is still the default - the device does not support
1100 dev->rx_urb_size = 2048;
1103 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1104 if (!dev->driver_priv)
1110 static const struct driver_info ax8817x_info = {
1111 .description = "ASIX AX8817x USB 2.0 Ethernet",
1112 .bind = ax88172_bind,
1113 .status = asix_status,
1114 .link_reset = ax88172_link_reset,
1115 .reset = ax88172_link_reset,
1116 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1120 static const struct driver_info dlink_dub_e100_info = {
1121 .description = "DLink DUB-E100 USB Ethernet",
1122 .bind = ax88172_bind,
1123 .status = asix_status,
1124 .link_reset = ax88172_link_reset,
1125 .reset = ax88172_link_reset,
1126 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1130 static const struct driver_info netgear_fa120_info = {
1131 .description = "Netgear FA-120 USB Ethernet",
1132 .bind = ax88172_bind,
1133 .status = asix_status,
1134 .link_reset = ax88172_link_reset,
1135 .reset = ax88172_link_reset,
1136 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1140 static const struct driver_info hawking_uf200_info = {
1141 .description = "Hawking UF200 USB Ethernet",
1142 .bind = ax88172_bind,
1143 .status = asix_status,
1144 .link_reset = ax88172_link_reset,
1145 .reset = ax88172_link_reset,
1146 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1150 static const struct driver_info ax88772_info = {
1151 .description = "ASIX AX88772 USB 2.0 Ethernet",
1152 .bind = ax88772_bind,
1153 .unbind = ax88772_unbind,
1154 .status = asix_status,
1155 .link_reset = ax88772_link_reset,
1156 .reset = ax88772_reset,
1157 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1158 .rx_fixup = asix_rx_fixup_common,
1159 .tx_fixup = asix_tx_fixup,
1162 static const struct driver_info ax88772b_info = {
1163 .description = "ASIX AX88772B USB 2.0 Ethernet",
1164 .bind = ax88772_bind,
1165 .unbind = ax88772_unbind,
1166 .status = asix_status,
1167 .link_reset = ax88772_link_reset,
1168 .reset = ax88772_reset,
1169 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1171 .rx_fixup = asix_rx_fixup_common,
1172 .tx_fixup = asix_tx_fixup,
1173 .data = FLAG_EEPROM_MAC,
1176 static const struct driver_info ax88178_info = {
1177 .description = "ASIX AX88178 USB 2.0 Ethernet",
1178 .bind = ax88178_bind,
1179 .unbind = ax88772_unbind,
1180 .status = asix_status,
1181 .link_reset = ax88178_link_reset,
1182 .reset = ax88178_reset,
1183 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1185 .rx_fixup = asix_rx_fixup_common,
1186 .tx_fixup = asix_tx_fixup,
1190 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1191 * no-name packaging.
1192 * USB device strings are:
1193 * 1: Manufacturer: USBLINK
1194 * 2: Product: HG20F9 USB2.0
1196 * Appears to be compatible with Asix 88772B.
1198 static const struct driver_info hg20f9_info = {
1199 .description = "HG20F9 USB 2.0 Ethernet",
1200 .bind = ax88772_bind,
1201 .unbind = ax88772_unbind,
1202 .status = asix_status,
1203 .link_reset = ax88772_link_reset,
1204 .reset = ax88772_reset,
1205 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1207 .rx_fixup = asix_rx_fixup_common,
1208 .tx_fixup = asix_tx_fixup,
1209 .data = FLAG_EEPROM_MAC,
1212 static const struct usb_device_id products [] = {
1215 USB_DEVICE (0x077b, 0x2226),
1216 .driver_info = (unsigned long) &ax8817x_info,
1219 USB_DEVICE (0x0846, 0x1040),
1220 .driver_info = (unsigned long) &netgear_fa120_info,
1223 USB_DEVICE (0x2001, 0x1a00),
1224 .driver_info = (unsigned long) &dlink_dub_e100_info,
1226 // Intellinet, ST Lab USB Ethernet
1227 USB_DEVICE (0x0b95, 0x1720),
1228 .driver_info = (unsigned long) &ax8817x_info,
1230 // Hawking UF200, TrendNet TU2-ET100
1231 USB_DEVICE (0x07b8, 0x420a),
1232 .driver_info = (unsigned long) &hawking_uf200_info,
1234 // Billionton Systems, USB2AR
1235 USB_DEVICE (0x08dd, 0x90ff),
1236 .driver_info = (unsigned long) &ax8817x_info,
1238 // Billionton Systems, GUSB2AM-1G-B
1239 USB_DEVICE(0x08dd, 0x0114),
1240 .driver_info = (unsigned long) &ax88178_info,
1243 USB_DEVICE (0x0557, 0x2009),
1244 .driver_info = (unsigned long) &ax8817x_info,
1246 // Buffalo LUA-U2-KTX
1247 USB_DEVICE (0x0411, 0x003d),
1248 .driver_info = (unsigned long) &ax8817x_info,
1250 // Buffalo LUA-U2-GT 10/100/1000
1251 USB_DEVICE (0x0411, 0x006e),
1252 .driver_info = (unsigned long) &ax88178_info,
1254 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1255 USB_DEVICE (0x6189, 0x182d),
1256 .driver_info = (unsigned long) &ax8817x_info,
1258 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1259 USB_DEVICE (0x0df6, 0x0056),
1260 .driver_info = (unsigned long) &ax88178_info,
1262 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1263 USB_DEVICE (0x0df6, 0x061c),
1264 .driver_info = (unsigned long) &ax88178_info,
1266 // corega FEther USB2-TX
1267 USB_DEVICE (0x07aa, 0x0017),
1268 .driver_info = (unsigned long) &ax8817x_info,
1270 // Surecom EP-1427X-2
1271 USB_DEVICE (0x1189, 0x0893),
1272 .driver_info = (unsigned long) &ax8817x_info,
1274 // goodway corp usb gwusb2e
1275 USB_DEVICE (0x1631, 0x6200),
1276 .driver_info = (unsigned long) &ax8817x_info,
1278 // JVC MP-PRX1 Port Replicator
1279 USB_DEVICE (0x04f1, 0x3008),
1280 .driver_info = (unsigned long) &ax8817x_info,
1282 // Lenovo U2L100P 10/100
1283 USB_DEVICE (0x17ef, 0x7203),
1284 .driver_info = (unsigned long)&ax88772b_info,
1286 // ASIX AX88772B 10/100
1287 USB_DEVICE (0x0b95, 0x772b),
1288 .driver_info = (unsigned long) &ax88772b_info,
1290 // ASIX AX88772 10/100
1291 USB_DEVICE (0x0b95, 0x7720),
1292 .driver_info = (unsigned long) &ax88772_info,
1294 // ASIX AX88178 10/100/1000
1295 USB_DEVICE (0x0b95, 0x1780),
1296 .driver_info = (unsigned long) &ax88178_info,
1298 // Logitec LAN-GTJ/U2A
1299 USB_DEVICE (0x0789, 0x0160),
1300 .driver_info = (unsigned long) &ax88178_info,
1302 // Linksys USB200M Rev 2
1303 USB_DEVICE (0x13b1, 0x0018),
1304 .driver_info = (unsigned long) &ax88772_info,
1306 // 0Q0 cable ethernet
1307 USB_DEVICE (0x1557, 0x7720),
1308 .driver_info = (unsigned long) &ax88772_info,
1310 // DLink DUB-E100 H/W Ver B1
1311 USB_DEVICE (0x07d1, 0x3c05),
1312 .driver_info = (unsigned long) &ax88772_info,
1314 // DLink DUB-E100 H/W Ver B1 Alternate
1315 USB_DEVICE (0x2001, 0x3c05),
1316 .driver_info = (unsigned long) &ax88772_info,
1318 // DLink DUB-E100 H/W Ver C1
1319 USB_DEVICE (0x2001, 0x1a02),
1320 .driver_info = (unsigned long) &ax88772_info,
1323 USB_DEVICE (0x1737, 0x0039),
1324 .driver_info = (unsigned long) &ax88178_info,
1327 USB_DEVICE (0x04bb, 0x0930),
1328 .driver_info = (unsigned long) &ax88178_info,
1331 USB_DEVICE(0x050d, 0x5055),
1332 .driver_info = (unsigned long) &ax88178_info,
1334 // Apple USB Ethernet Adapter
1335 USB_DEVICE(0x05ac, 0x1402),
1336 .driver_info = (unsigned long) &ax88772_info,
1338 // Cables-to-Go USB Ethernet Adapter
1339 USB_DEVICE(0x0b95, 0x772a),
1340 .driver_info = (unsigned long) &ax88772_info,
1343 USB_DEVICE(0x14ea, 0xab11),
1344 .driver_info = (unsigned long) &ax88178_info,
1347 USB_DEVICE(0x0db0, 0xa877),
1348 .driver_info = (unsigned long) &ax88772_info,
1350 // Asus USB Ethernet Adapter
1351 USB_DEVICE (0x0b95, 0x7e2b),
1352 .driver_info = (unsigned long)&ax88772b_info,
1354 /* ASIX 88172a demo board */
1355 USB_DEVICE(0x0b95, 0x172a),
1356 .driver_info = (unsigned long) &ax88172a_info,
1359 * USBLINK HG20F9 "USB 2.0 LAN"
1360 * Appears to have gazumped Linksys's manufacturer ID but
1361 * doesn't (yet) conflict with any known Linksys product.
1363 USB_DEVICE(0x066b, 0x20f9),
1364 .driver_info = (unsigned long) &hg20f9_info,
1368 MODULE_DEVICE_TABLE(usb, products);
1370 static struct usb_driver asix_driver = {
1371 .name = DRIVER_NAME,
1372 .id_table = products,
1373 .probe = usbnet_probe,
1374 .suspend = asix_suspend,
1375 .resume = asix_resume,
1376 .reset_resume = asix_resume,
1377 .disconnect = usbnet_disconnect,
1378 .supports_autosuspend = 1,
1379 .disable_hub_initiated_lpm = 1,
1382 module_usb_driver(asix_driver);
1384 MODULE_AUTHOR("David Hollis");
1385 MODULE_VERSION(DRIVER_VERSION);
1386 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1387 MODULE_LICENSE("GPL");