797ce187d6839341fcaeccb562a8c95a6f5bd41e
[linux-2.6-microblaze.git] / drivers / net / ethernet / qlogic / qede / qede_ptp.c
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3  * Copyright (c) 2015-2017  QLogic Corporation
4  */
5
6 #include "qede_ptp.h"
7 #define QEDE_PTP_TX_TIMEOUT (2 * HZ)
8
9 struct qede_ptp {
10         const struct qed_eth_ptp_ops    *ops;
11         struct ptp_clock_info           clock_info;
12         struct cyclecounter             cc;
13         struct timecounter              tc;
14         struct ptp_clock                *clock;
15         struct work_struct              work;
16         unsigned long                   ptp_tx_start;
17         struct qede_dev                 *edev;
18         struct sk_buff                  *tx_skb;
19
20         /* ptp spinlock is used for protecting the cycle/time counter fields
21          * and, also for serializing the qed PTP API invocations.
22          */
23         spinlock_t                      lock;
24         bool                            hw_ts_ioctl_called;
25         u16                             tx_type;
26         u16                             rx_filter;
27 };
28
29 /**
30  * qede_ptp_adjfreq
31  * @ptp: the ptp clock structure
32  * @ppb: parts per billion adjustment from base
33  *
34  * Adjust the frequency of the ptp cycle counter by the
35  * indicated ppb from the base frequency.
36  */
37 static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb)
38 {
39         struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info);
40         struct qede_dev *edev = ptp->edev;
41         int rc;
42
43         __qede_lock(edev);
44         if (edev->state == QEDE_STATE_OPEN) {
45                 spin_lock_bh(&ptp->lock);
46                 rc = ptp->ops->adjfreq(edev->cdev, ppb);
47                 spin_unlock_bh(&ptp->lock);
48         } else {
49                 DP_ERR(edev, "PTP adjfreq called while interface is down\n");
50                 rc = -EFAULT;
51         }
52         __qede_unlock(edev);
53
54         return rc;
55 }
56
57 static int qede_ptp_adjtime(struct ptp_clock_info *info, s64 delta)
58 {
59         struct qede_dev *edev;
60         struct qede_ptp *ptp;
61
62         ptp = container_of(info, struct qede_ptp, clock_info);
63         edev = ptp->edev;
64
65         DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP adjtime called, delta = %llx\n",
66                    delta);
67
68         spin_lock_bh(&ptp->lock);
69         timecounter_adjtime(&ptp->tc, delta);
70         spin_unlock_bh(&ptp->lock);
71
72         return 0;
73 }
74
75 static int qede_ptp_gettime(struct ptp_clock_info *info, struct timespec64 *ts)
76 {
77         struct qede_dev *edev;
78         struct qede_ptp *ptp;
79         u64 ns;
80
81         ptp = container_of(info, struct qede_ptp, clock_info);
82         edev = ptp->edev;
83
84         spin_lock_bh(&ptp->lock);
85         ns = timecounter_read(&ptp->tc);
86         spin_unlock_bh(&ptp->lock);
87
88         DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP gettime called, ns = %llu\n", ns);
89
90         *ts = ns_to_timespec64(ns);
91
92         return 0;
93 }
94
95 static int qede_ptp_settime(struct ptp_clock_info *info,
96                             const struct timespec64 *ts)
97 {
98         struct qede_dev *edev;
99         struct qede_ptp *ptp;
100         u64 ns;
101
102         ptp = container_of(info, struct qede_ptp, clock_info);
103         edev = ptp->edev;
104
105         ns = timespec64_to_ns(ts);
106
107         DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP settime called, ns = %llu\n", ns);
108
109         /* Re-init the timecounter */
110         spin_lock_bh(&ptp->lock);
111         timecounter_init(&ptp->tc, &ptp->cc, ns);
112         spin_unlock_bh(&ptp->lock);
113
114         return 0;
115 }
116
117 /* Enable (or disable) ancillary features of the phc subsystem */
118 static int qede_ptp_ancillary_feature_enable(struct ptp_clock_info *info,
119                                              struct ptp_clock_request *rq,
120                                              int on)
121 {
122         struct qede_dev *edev;
123         struct qede_ptp *ptp;
124
125         ptp = container_of(info, struct qede_ptp, clock_info);
126         edev = ptp->edev;
127
128         DP_ERR(edev, "PHC ancillary features are not supported\n");
129
130         return -ENOTSUPP;
131 }
132
133 static void qede_ptp_task(struct work_struct *work)
134 {
135         struct skb_shared_hwtstamps shhwtstamps;
136         struct qede_dev *edev;
137         struct qede_ptp *ptp;
138         u64 timestamp, ns;
139         bool timedout;
140         int rc;
141
142         ptp = container_of(work, struct qede_ptp, work);
143         edev = ptp->edev;
144         timedout = time_is_before_jiffies(ptp->ptp_tx_start +
145                                           QEDE_PTP_TX_TIMEOUT);
146
147         /* Read Tx timestamp registers */
148         spin_lock_bh(&ptp->lock);
149         rc = ptp->ops->read_tx_ts(edev->cdev, &timestamp);
150         spin_unlock_bh(&ptp->lock);
151         if (rc) {
152                 if (unlikely(timedout)) {
153                         DP_INFO(edev, "Tx timestamp is not recorded\n");
154                         dev_kfree_skb_any(ptp->tx_skb);
155                         ptp->tx_skb = NULL;
156                         clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS,
157                                          &edev->flags);
158                         edev->ptp_skip_txts++;
159                 } else {
160                         /* Reschedule to keep checking for a valid TS value */
161                         schedule_work(&ptp->work);
162                 }
163                 return;
164         }
165
166         ns = timecounter_cyc2time(&ptp->tc, timestamp);
167         memset(&shhwtstamps, 0, sizeof(shhwtstamps));
168         shhwtstamps.hwtstamp = ns_to_ktime(ns);
169         skb_tstamp_tx(ptp->tx_skb, &shhwtstamps);
170         dev_kfree_skb_any(ptp->tx_skb);
171         ptp->tx_skb = NULL;
172         clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
173
174         DP_VERBOSE(edev, QED_MSG_DEBUG,
175                    "Tx timestamp, timestamp cycles = %llu, ns = %llu\n",
176                    timestamp, ns);
177 }
178
179 /* Read the PHC. This API is invoked with ptp_lock held. */
180 static u64 qede_ptp_read_cc(const struct cyclecounter *cc)
181 {
182         struct qede_dev *edev;
183         struct qede_ptp *ptp;
184         u64 phc_cycles;
185         int rc;
186
187         ptp = container_of(cc, struct qede_ptp, cc);
188         edev = ptp->edev;
189         rc = ptp->ops->read_cc(edev->cdev, &phc_cycles);
190         if (rc)
191                 WARN_ONCE(1, "PHC read err %d\n", rc);
192
193         DP_VERBOSE(edev, QED_MSG_DEBUG, "PHC read cycles = %llu\n", phc_cycles);
194
195         return phc_cycles;
196 }
197
198 static int qede_ptp_cfg_filters(struct qede_dev *edev)
199 {
200         enum qed_ptp_hwtstamp_tx_type tx_type = QED_PTP_HWTSTAMP_TX_ON;
201         enum qed_ptp_filter_type rx_filter = QED_PTP_FILTER_NONE;
202         struct qede_ptp *ptp = edev->ptp;
203
204         if (!ptp)
205                 return -EIO;
206
207         if (!ptp->hw_ts_ioctl_called) {
208                 DP_INFO(edev, "TS IOCTL not called\n");
209                 return 0;
210         }
211
212         switch (ptp->tx_type) {
213         case HWTSTAMP_TX_ON:
214                 set_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags);
215                 tx_type = QED_PTP_HWTSTAMP_TX_ON;
216                 break;
217
218         case HWTSTAMP_TX_OFF:
219                 clear_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags);
220                 tx_type = QED_PTP_HWTSTAMP_TX_OFF;
221                 break;
222
223         case HWTSTAMP_TX_ONESTEP_SYNC:
224         case HWTSTAMP_TX_ONESTEP_P2P:
225                 DP_ERR(edev, "One-step timestamping is not supported\n");
226                 return -ERANGE;
227         }
228
229         spin_lock_bh(&ptp->lock);
230         switch (ptp->rx_filter) {
231         case HWTSTAMP_FILTER_NONE:
232                 rx_filter = QED_PTP_FILTER_NONE;
233                 break;
234         case HWTSTAMP_FILTER_ALL:
235         case HWTSTAMP_FILTER_SOME:
236         case HWTSTAMP_FILTER_NTP_ALL:
237                 ptp->rx_filter = HWTSTAMP_FILTER_NONE;
238                 rx_filter = QED_PTP_FILTER_ALL;
239                 break;
240         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
241                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
242                 rx_filter = QED_PTP_FILTER_V1_L4_EVENT;
243                 break;
244         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
245         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
246                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
247                 /* Initialize PTP detection for UDP/IPv4 events */
248                 rx_filter = QED_PTP_FILTER_V1_L4_GEN;
249                 break;
250         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
251                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
252                 rx_filter = QED_PTP_FILTER_V2_L4_EVENT;
253                 break;
254         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
255         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
256                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
257                 /* Initialize PTP detection for UDP/IPv4 or UDP/IPv6 events */
258                 rx_filter = QED_PTP_FILTER_V2_L4_GEN;
259                 break;
260         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
261                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
262                 rx_filter = QED_PTP_FILTER_V2_L2_EVENT;
263                 break;
264         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
265         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
266                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
267                 /* Initialize PTP detection L2 events */
268                 rx_filter = QED_PTP_FILTER_V2_L2_GEN;
269                 break;
270         case HWTSTAMP_FILTER_PTP_V2_EVENT:
271                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
272                 rx_filter = QED_PTP_FILTER_V2_EVENT;
273                 break;
274         case HWTSTAMP_FILTER_PTP_V2_SYNC:
275         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
276                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
277                 /* Initialize PTP detection L2, UDP/IPv4 or UDP/IPv6 events */
278                 rx_filter = QED_PTP_FILTER_V2_GEN;
279                 break;
280         }
281
282         ptp->ops->cfg_filters(edev->cdev, rx_filter, tx_type);
283
284         spin_unlock_bh(&ptp->lock);
285
286         return 0;
287 }
288
289 int qede_ptp_hw_ts(struct qede_dev *edev, struct ifreq *ifr)
290 {
291         struct hwtstamp_config config;
292         struct qede_ptp *ptp;
293         int rc;
294
295         ptp = edev->ptp;
296         if (!ptp)
297                 return -EIO;
298
299         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
300                 return -EFAULT;
301
302         DP_VERBOSE(edev, QED_MSG_DEBUG,
303                    "HWTSTAMP IOCTL: Requested tx_type = %d, requested rx_filters = %d\n",
304                    config.tx_type, config.rx_filter);
305
306         if (config.flags) {
307                 DP_ERR(edev, "config.flags is reserved for future use\n");
308                 return -EINVAL;
309         }
310
311         ptp->hw_ts_ioctl_called = 1;
312         ptp->tx_type = config.tx_type;
313         ptp->rx_filter = config.rx_filter;
314
315         rc = qede_ptp_cfg_filters(edev);
316         if (rc)
317                 return rc;
318
319         config.rx_filter = ptp->rx_filter;
320
321         return copy_to_user(ifr->ifr_data, &config,
322                             sizeof(config)) ? -EFAULT : 0;
323 }
324
325 int qede_ptp_get_ts_info(struct qede_dev *edev, struct ethtool_ts_info *info)
326 {
327         struct qede_ptp *ptp = edev->ptp;
328
329         if (!ptp) {
330                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
331                                         SOF_TIMESTAMPING_RX_SOFTWARE |
332                                         SOF_TIMESTAMPING_SOFTWARE;
333                 info->phc_index = -1;
334
335                 return 0;
336         }
337
338         info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
339                                 SOF_TIMESTAMPING_RX_SOFTWARE |
340                                 SOF_TIMESTAMPING_SOFTWARE |
341                                 SOF_TIMESTAMPING_TX_HARDWARE |
342                                 SOF_TIMESTAMPING_RX_HARDWARE |
343                                 SOF_TIMESTAMPING_RAW_HARDWARE;
344
345         if (ptp->clock)
346                 info->phc_index = ptp_clock_index(ptp->clock);
347         else
348                 info->phc_index = -1;
349
350         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
351                            BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
352                            BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
353                            BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
354                            BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
355                            BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
356                            BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
357                            BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
358                            BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
359                            BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
360                            BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
361                            BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
362                            BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
363
364         info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
365
366         return 0;
367 }
368
369 void qede_ptp_disable(struct qede_dev *edev)
370 {
371         struct qede_ptp *ptp;
372
373         ptp = edev->ptp;
374         if (!ptp)
375                 return;
376
377         if (ptp->clock) {
378                 ptp_clock_unregister(ptp->clock);
379                 ptp->clock = NULL;
380         }
381
382         /* Cancel PTP work queue. Should be done after the Tx queues are
383          * drained to prevent additional scheduling.
384          */
385         cancel_work_sync(&ptp->work);
386         if (ptp->tx_skb) {
387                 dev_kfree_skb_any(ptp->tx_skb);
388                 ptp->tx_skb = NULL;
389                 clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
390         }
391
392         /* Disable PTP in HW */
393         spin_lock_bh(&ptp->lock);
394         ptp->ops->disable(edev->cdev);
395         spin_unlock_bh(&ptp->lock);
396
397         kfree(ptp);
398         edev->ptp = NULL;
399 }
400
401 static int qede_ptp_init(struct qede_dev *edev)
402 {
403         struct qede_ptp *ptp;
404         int rc;
405
406         ptp = edev->ptp;
407         if (!ptp)
408                 return -EINVAL;
409
410         spin_lock_init(&ptp->lock);
411
412         /* Configure PTP in HW */
413         rc = ptp->ops->enable(edev->cdev);
414         if (rc) {
415                 DP_INFO(edev, "PTP HW enable failed\n");
416                 return rc;
417         }
418
419         /* Init work queue for Tx timestamping */
420         INIT_WORK(&ptp->work, qede_ptp_task);
421
422         /* Init cyclecounter and timecounter */
423         memset(&ptp->cc, 0, sizeof(ptp->cc));
424         ptp->cc.read = qede_ptp_read_cc;
425         ptp->cc.mask = CYCLECOUNTER_MASK(64);
426         ptp->cc.shift = 0;
427         ptp->cc.mult = 1;
428
429         timecounter_init(&ptp->tc, &ptp->cc, ktime_to_ns(ktime_get_real()));
430
431         return 0;
432 }
433
434 int qede_ptp_enable(struct qede_dev *edev)
435 {
436         struct qede_ptp *ptp;
437         int rc;
438
439         ptp = kzalloc(sizeof(*ptp), GFP_KERNEL);
440         if (!ptp) {
441                 DP_INFO(edev, "Failed to allocate struct for PTP\n");
442                 return -ENOMEM;
443         }
444
445         ptp->edev = edev;
446         ptp->ops = edev->ops->ptp;
447         if (!ptp->ops) {
448                 DP_INFO(edev, "PTP enable failed\n");
449                 rc = -EIO;
450                 goto err1;
451         }
452
453         edev->ptp = ptp;
454
455         rc = qede_ptp_init(edev);
456         if (rc)
457                 goto err1;
458
459         qede_ptp_cfg_filters(edev);
460
461         /* Fill the ptp_clock_info struct and register PTP clock */
462         ptp->clock_info.owner = THIS_MODULE;
463         snprintf(ptp->clock_info.name, 16, "%s", edev->ndev->name);
464         ptp->clock_info.max_adj = QED_MAX_PHC_DRIFT_PPB;
465         ptp->clock_info.n_alarm = 0;
466         ptp->clock_info.n_ext_ts = 0;
467         ptp->clock_info.n_per_out = 0;
468         ptp->clock_info.pps = 0;
469         ptp->clock_info.adjfreq = qede_ptp_adjfreq;
470         ptp->clock_info.adjtime = qede_ptp_adjtime;
471         ptp->clock_info.gettime64 = qede_ptp_gettime;
472         ptp->clock_info.settime64 = qede_ptp_settime;
473         ptp->clock_info.enable = qede_ptp_ancillary_feature_enable;
474
475         ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev);
476         if (IS_ERR(ptp->clock)) {
477                 DP_ERR(edev, "PTP clock registration failed\n");
478                 qede_ptp_disable(edev);
479                 rc = -EINVAL;
480                 goto err2;
481         }
482
483         return 0;
484
485 err1:
486         kfree(ptp);
487 err2:
488         edev->ptp = NULL;
489
490         return rc;
491 }
492
493 void qede_ptp_tx_ts(struct qede_dev *edev, struct sk_buff *skb)
494 {
495         struct qede_ptp *ptp;
496
497         ptp = edev->ptp;
498         if (!ptp)
499                 return;
500
501         if (test_and_set_bit_lock(QEDE_FLAGS_PTP_TX_IN_PRORGESS,
502                                   &edev->flags)) {
503                 DP_ERR(edev, "Timestamping in progress\n");
504                 edev->ptp_skip_txts++;
505                 return;
506         }
507
508         if (unlikely(!test_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags))) {
509                 DP_ERR(edev,
510                        "Tx timestamping was not enabled, this packet will not be timestamped\n");
511                 clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
512                 edev->ptp_skip_txts++;
513         } else if (unlikely(ptp->tx_skb)) {
514                 DP_ERR(edev,
515                        "The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n");
516                 clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
517                 edev->ptp_skip_txts++;
518         } else {
519                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
520                 /* schedule check for Tx timestamp */
521                 ptp->tx_skb = skb_get(skb);
522                 ptp->ptp_tx_start = jiffies;
523                 schedule_work(&ptp->work);
524         }
525 }
526
527 void qede_ptp_rx_ts(struct qede_dev *edev, struct sk_buff *skb)
528 {
529         struct qede_ptp *ptp;
530         u64 timestamp, ns;
531         int rc;
532
533         ptp = edev->ptp;
534         if (!ptp)
535                 return;
536
537         spin_lock_bh(&ptp->lock);
538         rc = ptp->ops->read_rx_ts(edev->cdev, &timestamp);
539         if (rc) {
540                 spin_unlock_bh(&ptp->lock);
541                 DP_INFO(edev, "Invalid Rx timestamp\n");
542                 return;
543         }
544
545         ns = timecounter_cyc2time(&ptp->tc, timestamp);
546         spin_unlock_bh(&ptp->lock);
547         skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);
548         DP_VERBOSE(edev, QED_MSG_DEBUG,
549                    "Rx timestamp, timestamp cycles = %llu, ns = %llu\n",
550                    timestamp, ns);
551 }