drivers/net/ethernet/qlogic/qed/qed_roce.c

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2 /* QLogic qed NIC Driver
   3  * Copyright (c) 2015-2017  QLogic Corporation
   4  * Copyright (c) 2019-2020 Marvell International Ltd.
   5  */
   6
   7 #include <linux/types.h>
   8 #include <asm/byteorder.h>
   9 #include <linux/bitops.h>
  10 #include <linux/delay.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/errno.h>
  13 #include <linux/io.h>
  14 #include <linux/kernel.h>
  15 #include <linux/list.h>
  16 #include <linux/module.h>
  17 #include <linux/mutex.h>
  18 #include <linux/pci.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/string.h>
  22 #include <linux/if_vlan.h>
  23 #include "qed.h"
  24 #include "qed_cxt.h"
  25 #include "qed_dcbx.h"
  26 #include "qed_hsi.h"
  27 #include "qed_hw.h"
  28 #include "qed_init_ops.h"
  29 #include "qed_int.h"
  30 #include "qed_ll2.h"
  31 #include "qed_mcp.h"
  32 #include "qed_reg_addr.h"
  33 #include <linux/qed/qed_rdma_if.h>
  34 #include "qed_rdma.h"
  35 #include "qed_roce.h"
  36 #include "qed_sp.h"
  37
  38 static void qed_roce_free_real_icid(struct qed_hwfn *p_hwfn, u16 icid);
  39
  40 static int qed_roce_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
  41                                 u16 echo, union event_ring_data *data,
  42                                 u8 fw_return_code)
  43 {
  44         struct qed_rdma_events events = p_hwfn->p_rdma_info->events;
  45
  46         if (fw_event_code == ROCE_ASYNC_EVENT_DESTROY_QP_DONE) {
  47                 u16 icid =
  48                     (u16)le32_to_cpu(data->rdma_data.rdma_destroy_qp_data.cid);
  49
  50                 /* icid release in this async event can occur only if the icid
  51                  * was offloaded to the FW. In case it wasn't offloaded this is
  52                  * handled in qed_roce_sp_destroy_qp.
  53                  */
  54                 qed_roce_free_real_icid(p_hwfn, icid);
  55         } else {
  56                 if (fw_event_code == ROCE_ASYNC_EVENT_SRQ_EMPTY ||
  57                     fw_event_code == ROCE_ASYNC_EVENT_SRQ_LIMIT) {
  58                         u16 srq_id = (u16)data->rdma_data.async_handle.lo;
  59
  60                         events.affiliated_event(events.context, fw_event_code,
  61                                                 &srq_id);
  62                 } else {
  63                         union rdma_eqe_data rdata = data->rdma_data;
  64
  65                         events.affiliated_event(events.context, fw_event_code,
  66                                                 (void *)&rdata.async_handle);
  67                 }
  68         }
  69
  70         return 0;
  71 }
  72
  73 void qed_roce_stop(struct qed_hwfn *p_hwfn)
  74 {
  75         struct qed_bmap *rcid_map = &p_hwfn->p_rdma_info->real_cid_map;
  76         int wait_count = 0;
  77
  78         /* when destroying a_RoCE QP the control is returned to the user after
  79          * the synchronous part. The asynchronous part may take a little longer.
  80          * We delay for a short while if an async destroy QP is still expected.
  81          * Beyond the added delay we clear the bitmap anyway.
  82          */
  83         while (bitmap_weight(rcid_map->bitmap, rcid_map->max_count)) {
  84                 msleep(100);
  85                 if (wait_count++ > 20) {
  86                         DP_NOTICE(p_hwfn, "cid bitmap wait timed out\n");
  87                         break;
  88                 }
  89         }
  90 }
  91
  92 static void qed_rdma_copy_gids(struct qed_rdma_qp *qp, __le32 *src_gid,
  93                                __le32 *dst_gid)
  94 {
  95         u32 i;
  96
  97         if (qp->roce_mode == ROCE_V2_IPV4) {
  98                 /* The IPv4 addresses shall be aligned to the highest word.
  99                  * The lower words must be zero.
 100                  */
 101                 memset(src_gid, 0, sizeof(union qed_gid));
 102                 memset(dst_gid, 0, sizeof(union qed_gid));
 103                 src_gid[3] = cpu_to_le32(qp->sgid.ipv4_addr);
 104                 dst_gid[3] = cpu_to_le32(qp->dgid.ipv4_addr);
 105         } else {
 106                 /* GIDs and IPv6 addresses coincide in location and size */
 107                 for (i = 0; i < ARRAY_SIZE(qp->sgid.dwords); i++) {
 108                         src_gid[i] = cpu_to_le32(qp->sgid.dwords[i]);
 109                         dst_gid[i] = cpu_to_le32(qp->dgid.dwords[i]);
 110                 }
 111         }
 112 }
 113
 114 static enum roce_flavor qed_roce_mode_to_flavor(enum roce_mode roce_mode)
 115 {
 116         switch (roce_mode) {
 117         case ROCE_V1:
 118                 return PLAIN_ROCE;
 119         case ROCE_V2_IPV4:
 120                 return RROCE_IPV4;
 121         case ROCE_V2_IPV6:
 122                 return RROCE_IPV6;
 123         default:
 124                 return MAX_ROCE_FLAVOR;
 125         }
 126 }
 127
 128 static void qed_roce_free_cid_pair(struct qed_hwfn *p_hwfn, u16 cid)
 129 {
 130         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 131         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->cid_map, cid);
 132         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->cid_map, cid + 1);
 133         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 134 }
 135
 136 int qed_roce_alloc_cid(struct qed_hwfn *p_hwfn, u16 *cid)
 137 {
 138         struct qed_rdma_info *p_rdma_info = p_hwfn->p_rdma_info;
 139         u32 responder_icid;
 140         u32 requester_icid;
 141         int rc;
 142
 143         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 144         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_rdma_info->cid_map,
 145                                     &responder_icid);
 146         if (rc) {
 147                 spin_unlock_bh(&p_rdma_info->lock);
 148                 return rc;
 149         }
 150
 151         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_rdma_info->cid_map,
 152                                     &requester_icid);
 153
 154         spin_unlock_bh(&p_rdma_info->lock);
 155         if (rc)
 156                 goto err;
 157
 158         /* the two icid's should be adjacent */
 159         if ((requester_icid - responder_icid) != 1) {
 160                 DP_NOTICE(p_hwfn, "Failed to allocate two adjacent qp's'\n");
 161                 rc = -EINVAL;
 162                 goto err;
 163         }
 164
 165         responder_icid += qed_cxt_get_proto_cid_start(p_hwfn,
 166                                                       p_rdma_info->proto);
 167         requester_icid += qed_cxt_get_proto_cid_start(p_hwfn,
 168                                                       p_rdma_info->proto);
 169
 170         /* If these icids require a new ILT line allocate DMA-able context for
 171          * an ILT page
 172          */
 173         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_CXT, responder_icid);
 174         if (rc)
 175                 goto err;
 176
 177         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_CXT, requester_icid);
 178         if (rc)
 179                 goto err;
 180
 181         *cid = (u16)responder_icid;
 182         return rc;
 183
 184 err:
 185         spin_lock_bh(&p_rdma_info->lock);
 186         qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, responder_icid);
 187         qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, requester_icid);
 188
 189         spin_unlock_bh(&p_rdma_info->lock);
 190         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 191                    "Allocate CID - failed, rc = %d\n", rc);
 192         return rc;
 193 }
 194
 195 static void qed_roce_set_real_cid(struct qed_hwfn *p_hwfn, u32 cid)
 196 {
 197         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 198         qed_bmap_set_id(p_hwfn, &p_hwfn->p_rdma_info->real_cid_map, cid);
 199         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 200 }
 201
 202 static u8 qed_roce_get_qp_tc(struct qed_hwfn *p_hwfn, struct qed_rdma_qp *qp)
 203 {
 204         u8 pri, tc = 0;
 205
 206         if (qp->vlan_id) {
 207                 pri = (qp->vlan_id & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
 208                 tc = qed_dcbx_get_priority_tc(p_hwfn, pri);
 209         }
 210
 211         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 212                    "qp icid %u tc: %u (vlan priority %s)\n",
 213                    qp->icid, tc, qp->vlan_id ? "enabled" : "disabled");
 214
 215         return tc;
 216 }
 217
 218 static int qed_roce_sp_create_responder(struct qed_hwfn *p_hwfn,
 219                                         struct qed_rdma_qp *qp)
 220 {
 221         struct roce_create_qp_resp_ramrod_data *p_ramrod;
 222         u16 regular_latency_queue, low_latency_queue;
 223         struct qed_sp_init_data init_data;
 224         enum roce_flavor roce_flavor;
 225         struct qed_spq_entry *p_ent;
 226         enum protocol_type proto;
 227         int rc;
 228         u8 tc;
 229
 230         if (!qp->has_resp)
 231                 return 0;
 232
 233         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 234
 235         /* Allocate DMA-able memory for IRQ */
 236         qp->irq_num_pages = 1;
 237         qp->irq = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 238                                      RDMA_RING_PAGE_SIZE,
 239                                      &qp->irq_phys_addr, GFP_KERNEL);
 240         if (!qp->irq) {
 241                 rc = -ENOMEM;
 242                 DP_NOTICE(p_hwfn,
 243                           "qed create responder failed: cannot allocate memory (irq). rc = %d\n",
 244                           rc);
 245                 return rc;
 246         }
 247
 248         /* Get SPQ entry */
 249         memset(&init_data, 0, sizeof(init_data));
 250         init_data.cid = qp->icid;
 251         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 252         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 253
 254         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_CREATE_QP,
 255                                  PROTOCOLID_ROCE, &init_data);
 256         if (rc)
 257                 goto err;
 258
 259         p_ramrod = &p_ent->ramrod.roce_create_qp_resp;
 260
 261         p_ramrod->flags = 0;
 262
 263         roce_flavor = qed_roce_mode_to_flavor(qp->roce_mode);
 264         SET_FIELD(p_ramrod->flags,
 265                   ROCE_CREATE_QP_RESP_RAMROD_DATA_ROCE_FLAVOR, roce_flavor);
 266
 267         SET_FIELD(p_ramrod->flags,
 268                   ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
 269                   qp->incoming_rdma_read_en);
 270
 271         SET_FIELD(p_ramrod->flags,
 272                   ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
 273                   qp->incoming_rdma_write_en);
 274
 275         SET_FIELD(p_ramrod->flags,
 276                   ROCE_CREATE_QP_RESP_RAMROD_DATA_ATOMIC_EN,
 277                   qp->incoming_atomic_en);
 278
 279         SET_FIELD(p_ramrod->flags,
 280                   ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
 281                   qp->e2e_flow_control_en);
 282
 283         SET_FIELD(p_ramrod->flags,
 284                   ROCE_CREATE_QP_RESP_RAMROD_DATA_SRQ_FLG, qp->use_srq);
 285
 286         SET_FIELD(p_ramrod->flags,
 287                   ROCE_CREATE_QP_RESP_RAMROD_DATA_RESERVED_KEY_EN,
 288                   qp->fmr_and_reserved_lkey);
 289
 290         SET_FIELD(p_ramrod->flags,
 291                   ROCE_CREATE_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER,
 292                   qp->min_rnr_nak_timer);
 293
 294         SET_FIELD(p_ramrod->flags,
 295                   ROCE_CREATE_QP_RESP_RAMROD_DATA_XRC_FLAG,
 296                   qed_rdma_is_xrc_qp(qp));
 297
 298         p_ramrod->max_ird = qp->max_rd_atomic_resp;
 299         p_ramrod->traffic_class = qp->traffic_class_tos;
 300         p_ramrod->hop_limit = qp->hop_limit_ttl;
 301         p_ramrod->irq_num_pages = qp->irq_num_pages;
 302         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 303         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 304         p_ramrod->dst_qp_id = cpu_to_le32(qp->dest_qp);
 305         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 306         p_ramrod->initial_psn = cpu_to_le32(qp->rq_psn);
 307         p_ramrod->pd = cpu_to_le16(qp->pd);
 308         p_ramrod->rq_num_pages = cpu_to_le16(qp->rq_num_pages);
 309         DMA_REGPAIR_LE(p_ramrod->rq_pbl_addr, qp->rq_pbl_ptr);
 310         DMA_REGPAIR_LE(p_ramrod->irq_pbl_addr, qp->irq_phys_addr);
 311         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 312         p_ramrod->qp_handle_for_async.hi = cpu_to_le32(qp->qp_handle_async.hi);
 313         p_ramrod->qp_handle_for_async.lo = cpu_to_le32(qp->qp_handle_async.lo);
 314         p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi);
 315         p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo);
 316         p_ramrod->cq_cid = cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) |
 317                                        qp->rq_cq_id);
 318         p_ramrod->xrc_domain = cpu_to_le16(qp->xrcd_id);
 319
 320         tc = qed_roce_get_qp_tc(p_hwfn, qp);
 321         regular_latency_queue = qed_get_cm_pq_idx_ofld_mtc(p_hwfn, tc);
 322         low_latency_queue = qed_get_cm_pq_idx_llt_mtc(p_hwfn, tc);
 323         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 324                    "qp icid %u pqs: regular_latency %u low_latency %u\n",
 325                    qp->icid, regular_latency_queue - CM_TX_PQ_BASE,
 326                    low_latency_queue - CM_TX_PQ_BASE);
 327         p_ramrod->regular_latency_phy_queue =
 328             cpu_to_le16(regular_latency_queue);
 329         p_ramrod->low_latency_phy_queue =
 330             cpu_to_le16(low_latency_queue);
 331
 332         p_ramrod->dpi = cpu_to_le16(qp->dpi);
 333
 334         qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr);
 335         qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr);
 336
 337         p_ramrod->udp_src_port = qp->udp_src_port;
 338         p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id);
 339         p_ramrod->srq_id.srq_idx = cpu_to_le16(qp->srq_id);
 340         p_ramrod->srq_id.opaque_fid = cpu_to_le16(p_hwfn->hw_info.opaque_fid);
 341
 342         p_ramrod->stats_counter_id = RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) +
 343                                      qp->stats_queue;
 344
 345         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 346         if (rc)
 347                 goto err;
 348
 349         qp->resp_offloaded = true;
 350         qp->cq_prod = 0;
 351
 352         proto = p_hwfn->p_rdma_info->proto;
 353         qed_roce_set_real_cid(p_hwfn, qp->icid -
 354                               qed_cxt_get_proto_cid_start(p_hwfn, proto));
 355
 356         return rc;
 357
 358 err:
 359         DP_NOTICE(p_hwfn, "create responder - failed, rc = %d\n", rc);
 360         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 361                           qp->irq_num_pages * RDMA_RING_PAGE_SIZE,
 362                           qp->irq, qp->irq_phys_addr);
 363
 364         return rc;
 365 }
 366
 367 static int qed_roce_sp_create_requester(struct qed_hwfn *p_hwfn,
 368                                         struct qed_rdma_qp *qp)
 369 {
 370         struct roce_create_qp_req_ramrod_data *p_ramrod;
 371         u16 regular_latency_queue, low_latency_queue;
 372         struct qed_sp_init_data init_data;
 373         enum roce_flavor roce_flavor;
 374         struct qed_spq_entry *p_ent;
 375         enum protocol_type proto;
 376         int rc;
 377         u8 tc;
 378
 379         if (!qp->has_req)
 380                 return 0;
 381
 382         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 383
 384         /* Allocate DMA-able memory for ORQ */
 385         qp->orq_num_pages = 1;
 386         qp->orq = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 387                                      RDMA_RING_PAGE_SIZE,
 388                                      &qp->orq_phys_addr, GFP_KERNEL);
 389         if (!qp->orq) {
 390                 rc = -ENOMEM;
 391                 DP_NOTICE(p_hwfn,
 392                           "qed create requester failed: cannot allocate memory (orq). rc = %d\n",
 393                           rc);
 394                 return rc;
 395         }
 396
 397         /* Get SPQ entry */
 398         memset(&init_data, 0, sizeof(init_data));
 399         init_data.cid = qp->icid + 1;
 400         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 401         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 402
 403         rc = qed_sp_init_request(p_hwfn, &p_ent,
 404                                  ROCE_RAMROD_CREATE_QP,
 405                                  PROTOCOLID_ROCE, &init_data);
 406         if (rc)
 407                 goto err;
 408
 409         p_ramrod = &p_ent->ramrod.roce_create_qp_req;
 410
 411         p_ramrod->flags = 0;
 412
 413         roce_flavor = qed_roce_mode_to_flavor(qp->roce_mode);
 414         SET_FIELD(p_ramrod->flags,
 415                   ROCE_CREATE_QP_REQ_RAMROD_DATA_ROCE_FLAVOR, roce_flavor);
 416
 417         SET_FIELD(p_ramrod->flags,
 418                   ROCE_CREATE_QP_REQ_RAMROD_DATA_FMR_AND_RESERVED_EN,
 419                   qp->fmr_and_reserved_lkey);
 420
 421         SET_FIELD(p_ramrod->flags,
 422                   ROCE_CREATE_QP_REQ_RAMROD_DATA_SIGNALED_COMP, qp->signal_all);
 423
 424         SET_FIELD(p_ramrod->flags,
 425                   ROCE_CREATE_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt);
 426
 427         SET_FIELD(p_ramrod->flags,
 428                   ROCE_CREATE_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
 429                   qp->rnr_retry_cnt);
 430
 431         SET_FIELD(p_ramrod->flags,
 432                   ROCE_CREATE_QP_REQ_RAMROD_DATA_XRC_FLAG,
 433                   qed_rdma_is_xrc_qp(qp));
 434
 435         SET_FIELD(p_ramrod->flags2,
 436                   ROCE_CREATE_QP_REQ_RAMROD_DATA_EDPM_MODE, qp->edpm_mode);
 437
 438         p_ramrod->max_ord = qp->max_rd_atomic_req;
 439         p_ramrod->traffic_class = qp->traffic_class_tos;
 440         p_ramrod->hop_limit = qp->hop_limit_ttl;
 441         p_ramrod->orq_num_pages = qp->orq_num_pages;
 442         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 443         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 444         p_ramrod->dst_qp_id = cpu_to_le32(qp->dest_qp);
 445         p_ramrod->ack_timeout_val = cpu_to_le32(qp->ack_timeout);
 446         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 447         p_ramrod->initial_psn = cpu_to_le32(qp->sq_psn);
 448         p_ramrod->pd = cpu_to_le16(qp->pd);
 449         p_ramrod->sq_num_pages = cpu_to_le16(qp->sq_num_pages);
 450         DMA_REGPAIR_LE(p_ramrod->sq_pbl_addr, qp->sq_pbl_ptr);
 451         DMA_REGPAIR_LE(p_ramrod->orq_pbl_addr, qp->orq_phys_addr);
 452         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 453         p_ramrod->qp_handle_for_async.hi = cpu_to_le32(qp->qp_handle_async.hi);
 454         p_ramrod->qp_handle_for_async.lo = cpu_to_le32(qp->qp_handle_async.lo);
 455         p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi);
 456         p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo);
 457         p_ramrod->cq_cid =
 458             cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) | qp->sq_cq_id);
 459
 460         tc = qed_roce_get_qp_tc(p_hwfn, qp);
 461         regular_latency_queue = qed_get_cm_pq_idx_ofld_mtc(p_hwfn, tc);
 462         low_latency_queue = qed_get_cm_pq_idx_llt_mtc(p_hwfn, tc);
 463         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 464                    "qp icid %u pqs: regular_latency %u low_latency %u\n",
 465                    qp->icid, regular_latency_queue - CM_TX_PQ_BASE,
 466                    low_latency_queue - CM_TX_PQ_BASE);
 467         p_ramrod->regular_latency_phy_queue =
 468             cpu_to_le16(regular_latency_queue);
 469         p_ramrod->low_latency_phy_queue =
 470             cpu_to_le16(low_latency_queue);
 471
 472         p_ramrod->dpi = cpu_to_le16(qp->dpi);
 473
 474         qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr);
 475         qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr);
 476
 477         p_ramrod->udp_src_port = qp->udp_src_port;
 478         p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id);
 479         p_ramrod->stats_counter_id = RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) +
 480                                      qp->stats_queue;
 481
 482         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 483         if (rc)
 484                 goto err;
 485
 486         qp->req_offloaded = true;
 487         proto = p_hwfn->p_rdma_info->proto;
 488         qed_roce_set_real_cid(p_hwfn,
 489                               qp->icid + 1 -
 490                               qed_cxt_get_proto_cid_start(p_hwfn, proto));
 491
 492         return rc;
 493
 494 err:
 495         DP_NOTICE(p_hwfn, "Create requested - failed, rc = %d\n", rc);
 496         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 497                           qp->orq_num_pages * RDMA_RING_PAGE_SIZE,
 498                           qp->orq, qp->orq_phys_addr);
 499         return rc;
 500 }
 501
 502 static int qed_roce_sp_modify_responder(struct qed_hwfn *p_hwfn,
 503                                         struct qed_rdma_qp *qp,
 504                                         bool move_to_err, u32 modify_flags)
 505 {
 506         struct roce_modify_qp_resp_ramrod_data *p_ramrod;
 507         struct qed_sp_init_data init_data;
 508         struct qed_spq_entry *p_ent;
 509         int rc;
 510
 511         if (!qp->has_resp)
 512                 return 0;
 513
 514         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 515
 516         if (move_to_err && !qp->resp_offloaded)
 517                 return 0;
 518
 519         /* Get SPQ entry */
 520         memset(&init_data, 0, sizeof(init_data));
 521         init_data.cid = qp->icid;
 522         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 523         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 524
 525         rc = qed_sp_init_request(p_hwfn, &p_ent,
 526                                  ROCE_EVENT_MODIFY_QP,
 527                                  PROTOCOLID_ROCE, &init_data);
 528         if (rc) {
 529                 DP_NOTICE(p_hwfn, "rc = %d\n", rc);
 530                 return rc;
 531         }
 532
 533         p_ramrod = &p_ent->ramrod.roce_modify_qp_resp;
 534
 535         p_ramrod->flags = 0;
 536
 537         SET_FIELD(p_ramrod->flags,
 538                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_MOVE_TO_ERR_FLG, move_to_err);
 539
 540         SET_FIELD(p_ramrod->flags,
 541                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
 542                   qp->incoming_rdma_read_en);
 543
 544         SET_FIELD(p_ramrod->flags,
 545                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
 546                   qp->incoming_rdma_write_en);
 547
 548         SET_FIELD(p_ramrod->flags,
 549                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_ATOMIC_EN,
 550                   qp->incoming_atomic_en);
 551
 552         SET_FIELD(p_ramrod->flags,
 553                   ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
 554                   qp->e2e_flow_control_en);
 555
 556         SET_FIELD(p_ramrod->flags,
 557                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_OPS_EN_FLG,
 558                   GET_FIELD(modify_flags,
 559                             QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN));
 560
 561         SET_FIELD(p_ramrod->flags,
 562                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_P_KEY_FLG,
 563                   GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY));
 564
 565         SET_FIELD(p_ramrod->flags,
 566                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_ADDRESS_VECTOR_FLG,
 567                   GET_FIELD(modify_flags,
 568                             QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR));
 569
 570         SET_FIELD(p_ramrod->flags,
 571                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_MAX_IRD_FLG,
 572                   GET_FIELD(modify_flags,
 573                             QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP));
 574
 575         SET_FIELD(p_ramrod->flags,
 576                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER_FLG,
 577                   GET_FIELD(modify_flags,
 578                             QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER));
 579
 580         p_ramrod->fields = 0;
 581         SET_FIELD(p_ramrod->fields,
 582                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER,
 583                   qp->min_rnr_nak_timer);
 584
 585         p_ramrod->max_ird = qp->max_rd_atomic_resp;
 586         p_ramrod->traffic_class = qp->traffic_class_tos;
 587         p_ramrod->hop_limit = qp->hop_limit_ttl;
 588         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 589         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 590         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 591         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 592         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 593
 594         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Modify responder, rc = %d\n", rc);
 595         return rc;
 596 }
 597
 598 static int qed_roce_sp_modify_requester(struct qed_hwfn *p_hwfn,
 599                                         struct qed_rdma_qp *qp,
 600                                         bool move_to_sqd,
 601                                         bool move_to_err, u32 modify_flags)
 602 {
 603         struct roce_modify_qp_req_ramrod_data *p_ramrod;
 604         struct qed_sp_init_data init_data;
 605         struct qed_spq_entry *p_ent;
 606         int rc;
 607
 608         if (!qp->has_req)
 609                 return 0;
 610
 611         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 612
 613         if (move_to_err && !(qp->req_offloaded))
 614                 return 0;
 615
 616         /* Get SPQ entry */
 617         memset(&init_data, 0, sizeof(init_data));
 618         init_data.cid = qp->icid + 1;
 619         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 620         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 621
 622         rc = qed_sp_init_request(p_hwfn, &p_ent,
 623                                  ROCE_EVENT_MODIFY_QP,
 624                                  PROTOCOLID_ROCE, &init_data);
 625         if (rc) {
 626                 DP_NOTICE(p_hwfn, "rc = %d\n", rc);
 627                 return rc;
 628         }
 629
 630         p_ramrod = &p_ent->ramrod.roce_modify_qp_req;
 631
 632         p_ramrod->flags = 0;
 633
 634         SET_FIELD(p_ramrod->flags,
 635                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_ERR_FLG, move_to_err);
 636
 637         SET_FIELD(p_ramrod->flags,
 638                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_SQD_FLG, move_to_sqd);
 639
 640         SET_FIELD(p_ramrod->flags,
 641                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_EN_SQD_ASYNC_NOTIFY,
 642                   qp->sqd_async);
 643
 644         SET_FIELD(p_ramrod->flags,
 645                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_P_KEY_FLG,
 646                   GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY));
 647
 648         SET_FIELD(p_ramrod->flags,
 649                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_ADDRESS_VECTOR_FLG,
 650                   GET_FIELD(modify_flags,
 651                             QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR));
 652
 653         SET_FIELD(p_ramrod->flags,
 654                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_MAX_ORD_FLG,
 655                   GET_FIELD(modify_flags,
 656                             QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ));
 657
 658         SET_FIELD(p_ramrod->flags,
 659                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT_FLG,
 660                   GET_FIELD(modify_flags,
 661                             QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT));
 662
 663         SET_FIELD(p_ramrod->flags,
 664                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT_FLG,
 665                   GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_RETRY_CNT));
 666
 667         SET_FIELD(p_ramrod->flags,
 668                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_ACK_TIMEOUT_FLG,
 669                   GET_FIELD(modify_flags,
 670                             QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT));
 671
 672         p_ramrod->fields = 0;
 673         SET_FIELD(p_ramrod->fields,
 674                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt);
 675
 676         SET_FIELD(p_ramrod->fields,
 677                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
 678                   qp->rnr_retry_cnt);
 679
 680         p_ramrod->max_ord = qp->max_rd_atomic_req;
 681         p_ramrod->traffic_class = qp->traffic_class_tos;
 682         p_ramrod->hop_limit = qp->hop_limit_ttl;
 683         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 684         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 685         p_ramrod->ack_timeout_val = cpu_to_le32(qp->ack_timeout);
 686         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 687         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 688         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 689
 690         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Modify requester, rc = %d\n", rc);
 691         return rc;
 692 }
 693
 694 static int qed_roce_sp_destroy_qp_responder(struct qed_hwfn *p_hwfn,
 695                                             struct qed_rdma_qp *qp,
 696                                             u32 *cq_prod)
 697 {
 698         struct roce_destroy_qp_resp_output_params *p_ramrod_res;
 699         struct roce_destroy_qp_resp_ramrod_data *p_ramrod;
 700         struct qed_sp_init_data init_data;
 701         struct qed_spq_entry *p_ent;
 702         dma_addr_t ramrod_res_phys;
 703         int rc;
 704
 705         if (!qp->has_resp) {
 706                 *cq_prod = 0;
 707                 return 0;
 708         }
 709
 710         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 711         *cq_prod = qp->cq_prod;
 712
 713         if (!qp->resp_offloaded) {
 714                 /* If a responder was never offload, we need to free the cids
 715                  * allocated in create_qp as a FW async event will never arrive
 716                  */
 717                 u32 cid;
 718
 719                 cid = qp->icid -
 720                       qed_cxt_get_proto_cid_start(p_hwfn,
 721                                                   p_hwfn->p_rdma_info->proto);
 722                 qed_roce_free_cid_pair(p_hwfn, (u16)cid);
 723
 724                 return 0;
 725         }
 726
 727         /* Get SPQ entry */
 728         memset(&init_data, 0, sizeof(init_data));
 729         init_data.cid = qp->icid;
 730         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 731         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 732
 733         rc = qed_sp_init_request(p_hwfn, &p_ent,
 734                                  ROCE_RAMROD_DESTROY_QP,
 735                                  PROTOCOLID_ROCE, &init_data);
 736         if (rc)
 737                 return rc;
 738
 739         p_ramrod = &p_ent->ramrod.roce_destroy_qp_resp;
 740
 741         p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 742                                           sizeof(*p_ramrod_res),
 743                                           &ramrod_res_phys, GFP_KERNEL);
 744
 745         if (!p_ramrod_res) {
 746                 rc = -ENOMEM;
 747                 DP_NOTICE(p_hwfn,
 748                           "qed destroy responder failed: cannot allocate memory (ramrod). rc = %d\n",
 749                           rc);
 750                 qed_sp_destroy_request(p_hwfn, p_ent);
 751                 return rc;
 752         }
 753
 754         DMA_REGPAIR_LE(p_ramrod->output_params_addr, ramrod_res_phys);
 755
 756         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 757         if (rc)
 758                 goto err;
 759
 760         *cq_prod = le32_to_cpu(p_ramrod_res->cq_prod);
 761         qp->cq_prod = *cq_prod;
 762
 763         /* Free IRQ - only if ramrod succeeded, in case FW is still using it */
 764         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 765                           qp->irq_num_pages * RDMA_RING_PAGE_SIZE,
 766                           qp->irq, qp->irq_phys_addr);
 767
 768         qp->resp_offloaded = false;
 769
 770         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Destroy responder, rc = %d\n", rc);
 771
 772 err:
 773         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 774                           sizeof(struct roce_destroy_qp_resp_output_params),
 775                           p_ramrod_res, ramrod_res_phys);
 776
 777         return rc;
 778 }
 779
 780 static int qed_roce_sp_destroy_qp_requester(struct qed_hwfn *p_hwfn,
 781                                             struct qed_rdma_qp *qp)
 782 {
 783         struct roce_destroy_qp_req_output_params *p_ramrod_res;
 784         struct roce_destroy_qp_req_ramrod_data *p_ramrod;
 785         struct qed_sp_init_data init_data;
 786         struct qed_spq_entry *p_ent;
 787         dma_addr_t ramrod_res_phys;
 788         int rc = -ENOMEM;
 789
 790         if (!qp->has_req)
 791                 return 0;
 792
 793         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 794
 795         if (!qp->req_offloaded)
 796                 return 0;
 797
 798         p_ramrod_res = (struct roce_destroy_qp_req_output_params *)
 799                        dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 800                                           sizeof(*p_ramrod_res),
 801                                           &ramrod_res_phys, GFP_KERNEL);
 802         if (!p_ramrod_res) {
 803                 DP_NOTICE(p_hwfn,
 804                           "qed destroy requester failed: cannot allocate memory (ramrod)\n");
 805                 return rc;
 806         }
 807
 808         /* Get SPQ entry */
 809         memset(&init_data, 0, sizeof(init_data));
 810         init_data.cid = qp->icid + 1;
 811         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 812         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 813
 814         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_DESTROY_QP,
 815                                  PROTOCOLID_ROCE, &init_data);
 816         if (rc)
 817                 goto err;
 818
 819         p_ramrod = &p_ent->ramrod.roce_destroy_qp_req;
 820         DMA_REGPAIR_LE(p_ramrod->output_params_addr, ramrod_res_phys);
 821
 822         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 823         if (rc)
 824                 goto err;
 825
 826
 827         /* Free ORQ - only if ramrod succeeded, in case FW is still using it */
 828         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 829                           qp->orq_num_pages * RDMA_RING_PAGE_SIZE,
 830                           qp->orq, qp->orq_phys_addr);
 831
 832         qp->req_offloaded = false;
 833
 834         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Destroy requester, rc = %d\n", rc);
 835
 836 err:
 837         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_ramrod_res),
 838                           p_ramrod_res, ramrod_res_phys);
 839
 840         return rc;
 841 }
 842
 843 int qed_roce_query_qp(struct qed_hwfn *p_hwfn,
 844                       struct qed_rdma_qp *qp,
 845                       struct qed_rdma_query_qp_out_params *out_params)
 846 {
 847         struct roce_query_qp_resp_output_params *p_resp_ramrod_res;
 848         struct roce_query_qp_req_output_params *p_req_ramrod_res;
 849         struct roce_query_qp_resp_ramrod_data *p_resp_ramrod;
 850         struct roce_query_qp_req_ramrod_data *p_req_ramrod;
 851         struct qed_sp_init_data init_data;
 852         dma_addr_t resp_ramrod_res_phys;
 853         dma_addr_t req_ramrod_res_phys;
 854         struct qed_spq_entry *p_ent;
 855         bool rq_err_state;
 856         bool sq_err_state;
 857         bool sq_draining;
 858         int rc = -ENOMEM;
 859
 860         if ((!(qp->resp_offloaded)) && (!(qp->req_offloaded))) {
 861                 /* We can't send ramrod to the fw since this qp wasn't offloaded
 862                  * to the fw yet
 863                  */
 864                 out_params->draining = false;
 865                 out_params->rq_psn = qp->rq_psn;
 866                 out_params->sq_psn = qp->sq_psn;
 867                 out_params->state = qp->cur_state;
 868
 869                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "No QPs as no offload\n");
 870                 return 0;
 871         }
 872
 873         if (!(qp->resp_offloaded)) {
 874                 DP_NOTICE(p_hwfn,
 875                           "The responder's qp should be offloaded before requester's\n");
 876                 return -EINVAL;
 877         }
 878
 879         /* Send a query responder ramrod to FW to get RQ-PSN and state */
 880         p_resp_ramrod_res =
 881                 dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 882                                    sizeof(*p_resp_ramrod_res),
 883                                    &resp_ramrod_res_phys, GFP_KERNEL);
 884         if (!p_resp_ramrod_res) {
 885                 DP_NOTICE(p_hwfn,
 886                           "qed query qp failed: cannot allocate memory (ramrod)\n");
 887                 return rc;
 888         }
 889
 890         /* Get SPQ entry */
 891         memset(&init_data, 0, sizeof(init_data));
 892         init_data.cid = qp->icid;
 893         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 894         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 895         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_QUERY_QP,
 896                                  PROTOCOLID_ROCE, &init_data);
 897         if (rc)
 898                 goto err_resp;
 899
 900         p_resp_ramrod = &p_ent->ramrod.roce_query_qp_resp;
 901         DMA_REGPAIR_LE(p_resp_ramrod->output_params_addr, resp_ramrod_res_phys);
 902
 903         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 904         if (rc)
 905                 goto err_resp;
 906
 907         out_params->rq_psn = le32_to_cpu(p_resp_ramrod_res->psn);
 908         rq_err_state = GET_FIELD(le32_to_cpu(p_resp_ramrod_res->flags),
 909                                  ROCE_QUERY_QP_RESP_OUTPUT_PARAMS_ERROR_FLG);
 910
 911         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_resp_ramrod_res),
 912                           p_resp_ramrod_res, resp_ramrod_res_phys);
 913
 914         if (!(qp->req_offloaded)) {
 915                 /* Don't send query qp for the requester */
 916                 out_params->sq_psn = qp->sq_psn;
 917                 out_params->draining = false;
 918
 919                 if (rq_err_state)
 920                         qp->cur_state = QED_ROCE_QP_STATE_ERR;
 921
 922                 out_params->state = qp->cur_state;
 923
 924                 return 0;
 925         }
 926
 927         /* Send a query requester ramrod to FW to get SQ-PSN and state */
 928         p_req_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 929                                               sizeof(*p_req_ramrod_res),
 930                                               &req_ramrod_res_phys,
 931                                               GFP_KERNEL);
 932         if (!p_req_ramrod_res) {
 933                 rc = -ENOMEM;
 934                 DP_NOTICE(p_hwfn,
 935                           "qed query qp failed: cannot allocate memory (ramrod)\n");
 936                 return rc;
 937         }
 938
 939         /* Get SPQ entry */
 940         init_data.cid = qp->icid + 1;
 941         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_QUERY_QP,
 942                                  PROTOCOLID_ROCE, &init_data);
 943         if (rc)
 944                 goto err_req;
 945
 946         p_req_ramrod = &p_ent->ramrod.roce_query_qp_req;
 947         DMA_REGPAIR_LE(p_req_ramrod->output_params_addr, req_ramrod_res_phys);
 948
 949         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 950         if (rc)
 951                 goto err_req;
 952
 953         out_params->sq_psn = le32_to_cpu(p_req_ramrod_res->psn);
 954         sq_err_state = GET_FIELD(le32_to_cpu(p_req_ramrod_res->flags),
 955                                  ROCE_QUERY_QP_REQ_OUTPUT_PARAMS_ERR_FLG);
 956         sq_draining =
 957                 GET_FIELD(le32_to_cpu(p_req_ramrod_res->flags),
 958                           ROCE_QUERY_QP_REQ_OUTPUT_PARAMS_SQ_DRAINING_FLG);
 959
 960         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_req_ramrod_res),
 961                           p_req_ramrod_res, req_ramrod_res_phys);
 962
 963         out_params->draining = false;
 964
 965         if (rq_err_state || sq_err_state)
 966                 qp->cur_state = QED_ROCE_QP_STATE_ERR;
 967         else if (sq_draining)
 968                 out_params->draining = true;
 969         out_params->state = qp->cur_state;
 970
 971         return 0;
 972
 973 err_req:
 974         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_req_ramrod_res),
 975                           p_req_ramrod_res, req_ramrod_res_phys);
 976         return rc;
 977 err_resp:
 978         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_resp_ramrod_res),
 979                           p_resp_ramrod_res, resp_ramrod_res_phys);
 980         return rc;
 981 }
 982
 983 int qed_roce_destroy_qp(struct qed_hwfn *p_hwfn, struct qed_rdma_qp *qp)
 984 {
 985         u32 cq_prod;
 986         int rc;
 987
 988         /* Destroys the specified QP */
 989         if ((qp->cur_state != QED_ROCE_QP_STATE_RESET) &&
 990             (qp->cur_state != QED_ROCE_QP_STATE_ERR) &&
 991             (qp->cur_state != QED_ROCE_QP_STATE_INIT)) {
 992                 DP_NOTICE(p_hwfn,
 993                           "QP must be in error, reset or init state before destroying it\n");
 994                 return -EINVAL;
 995         }
 996
 997         if (qp->cur_state != QED_ROCE_QP_STATE_RESET) {
 998                 rc = qed_roce_sp_destroy_qp_responder(p_hwfn, qp,
 999                                                       &cq_prod);
1000                 if (rc)
1001                         return rc;
1002
1003                 /* Send destroy requester ramrod */
1004                 rc = qed_roce_sp_destroy_qp_requester(p_hwfn, qp);
1005                 if (rc)
1006                         return rc;
1007         }
1008
1009         return 0;
1010 }
1011
1012 int qed_roce_modify_qp(struct qed_hwfn *p_hwfn,
1013                        struct qed_rdma_qp *qp,
1014                        enum qed_roce_qp_state prev_state,
1015                        struct qed_rdma_modify_qp_in_params *params)
1016 {
1017         int rc = 0;
1018
1019         /* Perform additional operations according to the current state and the
1020          * next state
1021          */
1022         if (((prev_state == QED_ROCE_QP_STATE_INIT) ||
1023              (prev_state == QED_ROCE_QP_STATE_RESET)) &&
1024             (qp->cur_state == QED_ROCE_QP_STATE_RTR)) {
1025                 /* Init->RTR or Reset->RTR */
1026                 rc = qed_roce_sp_create_responder(p_hwfn, qp);
1027                 return rc;
1028         } else if ((prev_state == QED_ROCE_QP_STATE_RTR) &&
1029                    (qp->cur_state == QED_ROCE_QP_STATE_RTS)) {
1030                 /* RTR-> RTS */
1031                 rc = qed_roce_sp_create_requester(p_hwfn, qp);
1032                 if (rc)
1033                         return rc;
1034
1035                 /* Send modify responder ramrod */
1036                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1037                                                   params->modify_flags);
1038                 return rc;
1039         } else if ((prev_state == QED_ROCE_QP_STATE_RTS) &&
1040                    (qp->cur_state == QED_ROCE_QP_STATE_RTS)) {
1041                 /* RTS->RTS */
1042                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1043                                                   params->modify_flags);
1044                 if (rc)
1045                         return rc;
1046
1047                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, false,
1048                                                   params->modify_flags);
1049                 return rc;
1050         } else if ((prev_state == QED_ROCE_QP_STATE_RTS) &&
1051                    (qp->cur_state == QED_ROCE_QP_STATE_SQD)) {
1052                 /* RTS->SQD */
1053                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, true, false,
1054                                                   params->modify_flags);
1055                 return rc;
1056         } else if ((prev_state == QED_ROCE_QP_STATE_SQD) &&
1057                    (qp->cur_state == QED_ROCE_QP_STATE_SQD)) {
1058                 /* SQD->SQD */
1059                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1060                                                   params->modify_flags);
1061                 if (rc)
1062                         return rc;
1063
1064                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, false,
1065                                                   params->modify_flags);
1066                 return rc;
1067         } else if ((prev_state == QED_ROCE_QP_STATE_SQD) &&
1068                    (qp->cur_state == QED_ROCE_QP_STATE_RTS)) {
1069                 /* SQD->RTS */
1070                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1071                                                   params->modify_flags);
1072                 if (rc)
1073                         return rc;
1074
1075                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, false,
1076                                                   params->modify_flags);
1077
1078                 return rc;
1079         } else if (qp->cur_state == QED_ROCE_QP_STATE_ERR) {
1080                 /* ->ERR */
1081                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, true,
1082                                                   params->modify_flags);
1083                 if (rc)
1084                         return rc;
1085
1086                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, true,
1087                                                   params->modify_flags);
1088                 return rc;
1089         } else if (qp->cur_state == QED_ROCE_QP_STATE_RESET) {
1090                 /* Any state -> RESET */
1091                 u32 cq_prod;
1092
1093                 /* Send destroy responder ramrod */
1094                 rc = qed_roce_sp_destroy_qp_responder(p_hwfn,
1095                                                       qp,
1096                                                       &cq_prod);
1097
1098                 if (rc)
1099                         return rc;
1100
1101                 qp->cq_prod = cq_prod;
1102
1103                 rc = qed_roce_sp_destroy_qp_requester(p_hwfn, qp);
1104         } else {
1105                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "0\n");
1106         }
1107
1108         return rc;
1109 }
1110
1111 static void qed_roce_free_real_icid(struct qed_hwfn *p_hwfn, u16 icid)
1112 {
1113         struct qed_rdma_info *p_rdma_info = p_hwfn->p_rdma_info;
1114         u32 start_cid, cid, xcid;
1115
1116         /* an even icid belongs to a responder while an odd icid belongs to a
1117          * requester. The 'cid' received as an input can be either. We calculate
1118          * the "partner" icid and call it xcid. Only if both are free then the
1119          * "cid" map can be cleared.
1120          */
1121         start_cid = qed_cxt_get_proto_cid_start(p_hwfn, p_rdma_info->proto);
1122         cid = icid - start_cid;
1123         xcid = cid ^ 1;
1124
1125         spin_lock_bh(&p_rdma_info->lock);
1126
1127         qed_bmap_release_id(p_hwfn, &p_rdma_info->real_cid_map, cid);
1128         if (qed_bmap_test_id(p_hwfn, &p_rdma_info->real_cid_map, xcid) == 0) {
1129                 qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, cid);
1130                 qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, xcid);
1131         }
1132
1133         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1134 }
1135
1136 void qed_roce_dpm_dcbx(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1137 {
1138         u8 val;
1139
1140         /* if any QPs are already active, we want to disable DPM, since their
1141          * context information contains information from before the latest DCBx
1142          * update. Otherwise enable it.
1143          */
1144         val = qed_rdma_allocated_qps(p_hwfn) ? true : false;
1145         p_hwfn->dcbx_no_edpm = (u8)val;
1146
1147         qed_rdma_dpm_conf(p_hwfn, p_ptt);
1148 }
1149
1150 int qed_roce_setup(struct qed_hwfn *p_hwfn)
1151 {
1152         return qed_spq_register_async_cb(p_hwfn, PROTOCOLID_ROCE,
1153                                          qed_roce_async_event);
1154 }
1155
1156 int qed_roce_init_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1157 {
1158         u32 ll2_ethertype_en;
1159
1160         qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF, 0);
1161
1162         p_hwfn->rdma_prs_search_reg = PRS_REG_SEARCH_ROCE;
1163
1164         ll2_ethertype_en = qed_rd(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN);
1165         qed_wr(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN,
1166                (ll2_ethertype_en | 0x01));
1167
1168         if (qed_cxt_get_proto_cid_start(p_hwfn, PROTOCOLID_ROCE) % 2) {
1169                 DP_NOTICE(p_hwfn, "The first RoCE's cid should be even\n");
1170                 return -EINVAL;
1171         }
1172
1173         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Initializing HW - Done\n");
1174         return 0;
1175 }