drivers/net/ethernet/qlogic/qed/qed_main.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015 QLogic Corporation
   3  *
   4  * This software is available under the terms of the GNU General Public License
   5  * (GPL) Version 2, available from the file COPYING in the main directory of
   6  * this source tree.
   7  */
   8
   9 #include <linux/stddef.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/version.h>
  14 #include <linux/delay.h>
  15 #include <asm/byteorder.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/string.h>
  18 #include <linux/module.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/workqueue.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/qed/qed_if.h>
  25
  26 #include "qed.h"
  27 #include "qed_sriov.h"
  28 #include "qed_sp.h"
  29 #include "qed_dev_api.h"
  30 #include "qed_mcp.h"
  31 #include "qed_hw.h"
  32 #include "qed_selftest.h"
  33
  34 static char version[] =
  35         "QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n";
  36
  37 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Core Module");
  38 MODULE_LICENSE("GPL");
  39 MODULE_VERSION(DRV_MODULE_VERSION);
  40
  41 #define FW_FILE_VERSION                         \
  42         __stringify(FW_MAJOR_VERSION) "."       \
  43         __stringify(FW_MINOR_VERSION) "."       \
  44         __stringify(FW_REVISION_VERSION) "."    \
  45         __stringify(FW_ENGINEERING_VERSION)
  46
  47 #define QED_FW_FILE_NAME        \
  48         "qed/qed_init_values_zipped-" FW_FILE_VERSION ".bin"
  49
  50 MODULE_FIRMWARE(QED_FW_FILE_NAME);
  51
  52 static int __init qed_init(void)
  53 {
  54         pr_notice("qed_init called\n");
  55
  56         pr_info("%s", version);
  57
  58         return 0;
  59 }
  60
  61 static void __exit qed_cleanup(void)
  62 {
  63         pr_notice("qed_cleanup called\n");
  64 }
  65
  66 module_init(qed_init);
  67 module_exit(qed_cleanup);
  68
  69 /* Check if the DMA controller on the machine can properly handle the DMA
  70  * addressing required by the device.
  71 */
  72 static int qed_set_coherency_mask(struct qed_dev *cdev)
  73 {
  74         struct device *dev = &cdev->pdev->dev;
  75
  76         if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) {
  77                 if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) {
  78                         DP_NOTICE(cdev,
  79                                   "Can't request 64-bit consistent allocations\n");
  80                         return -EIO;
  81                 }
  82         } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) {
  83                 DP_NOTICE(cdev, "Can't request 64b/32b DMA addresses\n");
  84                 return -EIO;
  85         }
  86
  87         return 0;
  88 }
  89
  90 static void qed_free_pci(struct qed_dev *cdev)
  91 {
  92         struct pci_dev *pdev = cdev->pdev;
  93
  94         if (cdev->doorbells)
  95                 iounmap(cdev->doorbells);
  96         if (cdev->regview)
  97                 iounmap(cdev->regview);
  98         if (atomic_read(&pdev->enable_cnt) == 1)
  99                 pci_release_regions(pdev);
 100
 101         pci_disable_device(pdev);
 102 }
 103
 104 #define PCI_REVISION_ID_ERROR_VAL       0xff
 105
 106 /* Performs PCI initializations as well as initializing PCI-related parameters
 107  * in the device structrue. Returns 0 in case of success.
 108  */
 109 static int qed_init_pci(struct qed_dev *cdev,
 110                         struct pci_dev *pdev)
 111 {
 112         u8 rev_id;
 113         int rc;
 114
 115         cdev->pdev = pdev;
 116
 117         rc = pci_enable_device(pdev);
 118         if (rc) {
 119                 DP_NOTICE(cdev, "Cannot enable PCI device\n");
 120                 goto err0;
 121         }
 122
 123         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 124                 DP_NOTICE(cdev, "No memory region found in bar #0\n");
 125                 rc = -EIO;
 126                 goto err1;
 127         }
 128
 129         if (IS_PF(cdev) && !(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 130                 DP_NOTICE(cdev, "No memory region found in bar #2\n");
 131                 rc = -EIO;
 132                 goto err1;
 133         }
 134
 135         if (atomic_read(&pdev->enable_cnt) == 1) {
 136                 rc = pci_request_regions(pdev, "qed");
 137                 if (rc) {
 138                         DP_NOTICE(cdev,
 139                                   "Failed to request PCI memory resources\n");
 140                         goto err1;
 141                 }
 142                 pci_set_master(pdev);
 143                 pci_save_state(pdev);
 144         }
 145
 146         pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
 147         if (rev_id == PCI_REVISION_ID_ERROR_VAL) {
 148                 DP_NOTICE(cdev,
 149                           "Detected PCI device error [rev_id 0x%x]. Probably due to prior indication. Aborting.\n",
 150                           rev_id);
 151                 rc = -ENODEV;
 152                 goto err2;
 153         }
 154         if (!pci_is_pcie(pdev)) {
 155                 DP_NOTICE(cdev, "The bus is not PCI Express\n");
 156                 rc = -EIO;
 157                 goto err2;
 158         }
 159
 160         cdev->pci_params.pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
 161         if (cdev->pci_params.pm_cap == 0)
 162                 DP_NOTICE(cdev, "Cannot find power management capability\n");
 163
 164         rc = qed_set_coherency_mask(cdev);
 165         if (rc)
 166                 goto err2;
 167
 168         cdev->pci_params.mem_start = pci_resource_start(pdev, 0);
 169         cdev->pci_params.mem_end = pci_resource_end(pdev, 0);
 170         cdev->pci_params.irq = pdev->irq;
 171
 172         cdev->regview = pci_ioremap_bar(pdev, 0);
 173         if (!cdev->regview) {
 174                 DP_NOTICE(cdev, "Cannot map register space, aborting\n");
 175                 rc = -ENOMEM;
 176                 goto err2;
 177         }
 178
 179         if (IS_PF(cdev)) {
 180                         cdev->db_phys_addr = pci_resource_start(cdev->pdev, 2);
 181                 cdev->db_size = pci_resource_len(cdev->pdev, 2);
 182                 cdev->doorbells = ioremap_wc(cdev->db_phys_addr, cdev->db_size);
 183                 if (!cdev->doorbells) {
 184                         DP_NOTICE(cdev, "Cannot map doorbell space\n");
 185                         return -ENOMEM;
 186                 }
 187         }
 188
 189         return 0;
 190
 191 err2:
 192         pci_release_regions(pdev);
 193 err1:
 194         pci_disable_device(pdev);
 195 err0:
 196         return rc;
 197 }
 198
 199 int qed_fill_dev_info(struct qed_dev *cdev,
 200                       struct qed_dev_info *dev_info)
 201 {
 202         struct qed_ptt  *ptt;
 203
 204         memset(dev_info, 0, sizeof(struct qed_dev_info));
 205
 206         dev_info->num_hwfns = cdev->num_hwfns;
 207         dev_info->pci_mem_start = cdev->pci_params.mem_start;
 208         dev_info->pci_mem_end = cdev->pci_params.mem_end;
 209         dev_info->pci_irq = cdev->pci_params.irq;
 210         dev_info->is_mf_default = IS_MF_DEFAULT(&cdev->hwfns[0]);
 211         ether_addr_copy(dev_info->hw_mac, cdev->hwfns[0].hw_info.hw_mac_addr);
 212
 213         if (IS_PF(cdev)) {
 214                 dev_info->fw_major = FW_MAJOR_VERSION;
 215                 dev_info->fw_minor = FW_MINOR_VERSION;
 216                 dev_info->fw_rev = FW_REVISION_VERSION;
 217                 dev_info->fw_eng = FW_ENGINEERING_VERSION;
 218                 dev_info->mf_mode = cdev->mf_mode;
 219         } else {
 220                 qed_vf_get_fw_version(&cdev->hwfns[0], &dev_info->fw_major,
 221                                       &dev_info->fw_minor, &dev_info->fw_rev,
 222                                       &dev_info->fw_eng);
 223         }
 224
 225         if (IS_PF(cdev)) {
 226                 ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
 227                 if (ptt) {
 228                         qed_mcp_get_mfw_ver(QED_LEADING_HWFN(cdev), ptt,
 229                                             &dev_info->mfw_rev, NULL);
 230
 231                         qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev), ptt,
 232                                                &dev_info->flash_size);
 233
 234                         qed_ptt_release(QED_LEADING_HWFN(cdev), ptt);
 235                 }
 236         } else {
 237                 qed_mcp_get_mfw_ver(QED_LEADING_HWFN(cdev), NULL,
 238                                     &dev_info->mfw_rev, NULL);
 239         }
 240
 241         return 0;
 242 }
 243
 244 static void qed_free_cdev(struct qed_dev *cdev)
 245 {
 246         kfree((void *)cdev);
 247 }
 248
 249 static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)
 250 {
 251         struct qed_dev *cdev;
 252
 253         cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
 254         if (!cdev)
 255                 return cdev;
 256
 257         qed_init_struct(cdev);
 258
 259         return cdev;
 260 }
 261
 262 /* Sets the requested power state */
 263 static int qed_set_power_state(struct qed_dev *cdev,
 264                                pci_power_t state)
 265 {
 266         if (!cdev)
 267                 return -ENODEV;
 268
 269         DP_VERBOSE(cdev, NETIF_MSG_DRV, "Omitting Power state change\n");
 270         return 0;
 271 }
 272
 273 /* probing */
 274 static struct qed_dev *qed_probe(struct pci_dev *pdev,
 275                                  struct qed_probe_params *params)
 276 {
 277         struct qed_dev *cdev;
 278         int rc;
 279
 280         cdev = qed_alloc_cdev(pdev);
 281         if (!cdev)
 282                 goto err0;
 283
 284         cdev->protocol = params->protocol;
 285
 286         if (params->is_vf)
 287                 cdev->b_is_vf = true;
 288
 289         qed_init_dp(cdev, params->dp_module, params->dp_level);
 290
 291         rc = qed_init_pci(cdev, pdev);
 292         if (rc) {
 293                 DP_ERR(cdev, "init pci failed\n");
 294                 goto err1;
 295         }
 296         DP_INFO(cdev, "PCI init completed successfully\n");
 297
 298         rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT);
 299         if (rc) {
 300                 DP_ERR(cdev, "hw prepare failed\n");
 301                 goto err2;
 302         }
 303
 304         DP_INFO(cdev, "qed_probe completed successffuly\n");
 305
 306         return cdev;
 307
 308 err2:
 309         qed_free_pci(cdev);
 310 err1:
 311         qed_free_cdev(cdev);
 312 err0:
 313         return NULL;
 314 }
 315
 316 static void qed_remove(struct qed_dev *cdev)
 317 {
 318         if (!cdev)
 319                 return;
 320
 321         qed_hw_remove(cdev);
 322
 323         qed_free_pci(cdev);
 324
 325         qed_set_power_state(cdev, PCI_D3hot);
 326
 327         qed_free_cdev(cdev);
 328 }
 329
 330 static void qed_disable_msix(struct qed_dev *cdev)
 331 {
 332         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 333                 pci_disable_msix(cdev->pdev);
 334                 kfree(cdev->int_params.msix_table);
 335         } else if (cdev->int_params.out.int_mode == QED_INT_MODE_MSI) {
 336                 pci_disable_msi(cdev->pdev);
 337         }
 338
 339         memset(&cdev->int_params.out, 0, sizeof(struct qed_int_param));
 340 }
 341
 342 static int qed_enable_msix(struct qed_dev *cdev,
 343                            struct qed_int_params *int_params)
 344 {
 345         int i, rc, cnt;
 346
 347         cnt = int_params->in.num_vectors;
 348
 349         for (i = 0; i < cnt; i++)
 350                 int_params->msix_table[i].entry = i;
 351
 352         rc = pci_enable_msix_range(cdev->pdev, int_params->msix_table,
 353                                    int_params->in.min_msix_cnt, cnt);
 354         if (rc < cnt && rc >= int_params->in.min_msix_cnt &&
 355             (rc % cdev->num_hwfns)) {
 356                 pci_disable_msix(cdev->pdev);
 357
 358                 /* If fastpath is initialized, we need at least one interrupt
 359                  * per hwfn [and the slow path interrupts]. New requested number
 360                  * should be a multiple of the number of hwfns.
 361                  */
 362                 cnt = (rc / cdev->num_hwfns) * cdev->num_hwfns;
 363                 DP_NOTICE(cdev,
 364                           "Trying to enable MSI-X with less vectors (%d out of %d)\n",
 365                           cnt, int_params->in.num_vectors);
 366                 rc = pci_enable_msix_exact(cdev->pdev,
 367                                            int_params->msix_table, cnt);
 368                 if (!rc)
 369                         rc = cnt;
 370         }
 371
 372         if (rc > 0) {
 373                 /* MSI-x configuration was achieved */
 374                 int_params->out.int_mode = QED_INT_MODE_MSIX;
 375                 int_params->out.num_vectors = rc;
 376                 rc = 0;
 377         } else {
 378                 DP_NOTICE(cdev,
 379                           "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
 380                           cnt, rc);
 381         }
 382
 383         return rc;
 384 }
 385
 386 /* This function outputs the int mode and the number of enabled msix vector */
 387 static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
 388 {
 389         struct qed_int_params *int_params = &cdev->int_params;
 390         struct msix_entry *tbl;
 391         int rc = 0, cnt;
 392
 393         switch (int_params->in.int_mode) {
 394         case QED_INT_MODE_MSIX:
 395                 /* Allocate MSIX table */
 396                 cnt = int_params->in.num_vectors;
 397                 int_params->msix_table = kcalloc(cnt, sizeof(*tbl), GFP_KERNEL);
 398                 if (!int_params->msix_table) {
 399                         rc = -ENOMEM;
 400                         goto out;
 401                 }
 402
 403                 /* Enable MSIX */
 404                 rc = qed_enable_msix(cdev, int_params);
 405                 if (!rc)
 406                         goto out;
 407
 408                 DP_NOTICE(cdev, "Failed to enable MSI-X\n");
 409                 kfree(int_params->msix_table);
 410                 if (force_mode)
 411                         goto out;
 412                 /* Fallthrough */
 413
 414         case QED_INT_MODE_MSI:
 415                 rc = pci_enable_msi(cdev->pdev);
 416                 if (!rc) {
 417                         int_params->out.int_mode = QED_INT_MODE_MSI;
 418                         goto out;
 419                 }
 420
 421                 DP_NOTICE(cdev, "Failed to enable MSI\n");
 422                 if (force_mode)
 423                         goto out;
 424                 /* Fallthrough */
 425
 426         case QED_INT_MODE_INTA:
 427                         int_params->out.int_mode = QED_INT_MODE_INTA;
 428                         rc = 0;
 429                         goto out;
 430         default:
 431                 DP_NOTICE(cdev, "Unknown int_mode value %d\n",
 432                           int_params->in.int_mode);
 433                 rc = -EINVAL;
 434         }
 435
 436 out:
 437         cdev->int_coalescing_mode = QED_COAL_MODE_ENABLE;
 438
 439         return rc;
 440 }
 441
 442 static void qed_simd_handler_config(struct qed_dev *cdev, void *token,
 443                                     int index, void(*handler)(void *))
 444 {
 445         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 446         int relative_idx = index / cdev->num_hwfns;
 447
 448         hwfn->simd_proto_handler[relative_idx].func = handler;
 449         hwfn->simd_proto_handler[relative_idx].token = token;
 450 }
 451
 452 static void qed_simd_handler_clean(struct qed_dev *cdev, int index)
 453 {
 454         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 455         int relative_idx = index / cdev->num_hwfns;
 456
 457         memset(&hwfn->simd_proto_handler[relative_idx], 0,
 458                sizeof(struct qed_simd_fp_handler));
 459 }
 460
 461 static irqreturn_t qed_msix_sp_int(int irq, void *tasklet)
 462 {
 463         tasklet_schedule((struct tasklet_struct *)tasklet);
 464         return IRQ_HANDLED;
 465 }
 466
 467 static irqreturn_t qed_single_int(int irq, void *dev_instance)
 468 {
 469         struct qed_dev *cdev = (struct qed_dev *)dev_instance;
 470         struct qed_hwfn *hwfn;
 471         irqreturn_t rc = IRQ_NONE;
 472         u64 status;
 473         int i, j;
 474
 475         for (i = 0; i < cdev->num_hwfns; i++) {
 476                 status = qed_int_igu_read_sisr_reg(&cdev->hwfns[i]);
 477
 478                 if (!status)
 479                         continue;
 480
 481                 hwfn = &cdev->hwfns[i];
 482
 483                 /* Slowpath interrupt */
 484                 if (unlikely(status & 0x1)) {
 485                         tasklet_schedule(hwfn->sp_dpc);
 486                         status &= ~0x1;
 487                         rc = IRQ_HANDLED;
 488                 }
 489
 490                 /* Fastpath interrupts */
 491                 for (j = 0; j < 64; j++) {
 492                         if ((0x2ULL << j) & status) {
 493                                 hwfn->simd_proto_handler[j].func(
 494                                         hwfn->simd_proto_handler[j].token);
 495                                 status &= ~(0x2ULL << j);
 496                                 rc = IRQ_HANDLED;
 497                         }
 498                 }
 499
 500                 if (unlikely(status))
 501                         DP_VERBOSE(hwfn, NETIF_MSG_INTR,
 502                                    "got an unknown interrupt status 0x%llx\n",
 503                                    status);
 504         }
 505
 506         return rc;
 507 }
 508
 509 int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
 510 {
 511         struct qed_dev *cdev = hwfn->cdev;
 512         int rc = 0;
 513         u8 id;
 514
 515         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 516                 id = hwfn->my_id;
 517                 snprintf(hwfn->name, NAME_SIZE, "sp-%d-%02x:%02x.%02x",
 518                          id, cdev->pdev->bus->number,
 519                          PCI_SLOT(cdev->pdev->devfn), hwfn->abs_pf_id);
 520                 rc = request_irq(cdev->int_params.msix_table[id].vector,
 521                                  qed_msix_sp_int, 0, hwfn->name, hwfn->sp_dpc);
 522                 if (!rc)
 523                         DP_VERBOSE(hwfn, (NETIF_MSG_INTR | QED_MSG_SP),
 524                                    "Requested slowpath MSI-X\n");
 525         } else {
 526                 unsigned long flags = 0;
 527
 528                 snprintf(cdev->name, NAME_SIZE, "%02x:%02x.%02x",
 529                          cdev->pdev->bus->number, PCI_SLOT(cdev->pdev->devfn),
 530                          PCI_FUNC(cdev->pdev->devfn));
 531
 532                 if (cdev->int_params.out.int_mode == QED_INT_MODE_INTA)
 533                         flags |= IRQF_SHARED;
 534
 535                 rc = request_irq(cdev->pdev->irq, qed_single_int,
 536                                  flags, cdev->name, cdev);
 537         }
 538
 539         return rc;
 540 }
 541
 542 static void qed_slowpath_irq_free(struct qed_dev *cdev)
 543 {
 544         int i;
 545
 546         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 547                 for_each_hwfn(cdev, i) {
 548                         if (!cdev->hwfns[i].b_int_requested)
 549                                 break;
 550                         synchronize_irq(cdev->int_params.msix_table[i].vector);
 551                         free_irq(cdev->int_params.msix_table[i].vector,
 552                                  cdev->hwfns[i].sp_dpc);
 553                 }
 554         } else {
 555                 if (QED_LEADING_HWFN(cdev)->b_int_requested)
 556                         free_irq(cdev->pdev->irq, cdev);
 557         }
 558         qed_int_disable_post_isr_release(cdev);
 559 }
 560
 561 static int qed_nic_stop(struct qed_dev *cdev)
 562 {
 563         int i, rc;
 564
 565         rc = qed_hw_stop(cdev);
 566
 567         for (i = 0; i < cdev->num_hwfns; i++) {
 568                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 569
 570                 if (p_hwfn->b_sp_dpc_enabled) {
 571                         tasklet_disable(p_hwfn->sp_dpc);
 572                         p_hwfn->b_sp_dpc_enabled = false;
 573                         DP_VERBOSE(cdev, NETIF_MSG_IFDOWN,
 574                                    "Disabled sp taskelt [hwfn %d] at %p\n",
 575                                    i, p_hwfn->sp_dpc);
 576                 }
 577         }
 578
 579         return rc;
 580 }
 581
 582 static int qed_nic_reset(struct qed_dev *cdev)
 583 {
 584         int rc;
 585
 586         rc = qed_hw_reset(cdev);
 587         if (rc)
 588                 return rc;
 589
 590         qed_resc_free(cdev);
 591
 592         return 0;
 593 }
 594
 595 static int qed_nic_setup(struct qed_dev *cdev)
 596 {
 597         int rc;
 598
 599         rc = qed_resc_alloc(cdev);
 600         if (rc)
 601                 return rc;
 602
 603         DP_INFO(cdev, "Allocated qed resources\n");
 604
 605         qed_resc_setup(cdev);
 606
 607         return rc;
 608 }
 609
 610 static int qed_set_int_fp(struct qed_dev *cdev, u16 cnt)
 611 {
 612         int limit = 0;
 613
 614         /* Mark the fastpath as free/used */
 615         cdev->int_params.fp_initialized = cnt ? true : false;
 616
 617         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX)
 618                 limit = cdev->num_hwfns * 63;
 619         else if (cdev->int_params.fp_msix_cnt)
 620                 limit = cdev->int_params.fp_msix_cnt;
 621
 622         if (!limit)
 623                 return -ENOMEM;
 624
 625         return min_t(int, cnt, limit);
 626 }
 627
 628 static int qed_get_int_fp(struct qed_dev *cdev, struct qed_int_info *info)
 629 {
 630         memset(info, 0, sizeof(struct qed_int_info));
 631
 632         if (!cdev->int_params.fp_initialized) {
 633                 DP_INFO(cdev,
 634                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 635                 return -EINVAL;
 636         }
 637
 638         /* Need to expose only MSI-X information; Single IRQ is handled solely
 639          * by qed.
 640          */
 641         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 642                 int msix_base = cdev->int_params.fp_msix_base;
 643
 644                 info->msix_cnt = cdev->int_params.fp_msix_cnt;
 645                 info->msix = &cdev->int_params.msix_table[msix_base];
 646         }
 647
 648         return 0;
 649 }
 650
 651 static int qed_slowpath_setup_int(struct qed_dev *cdev,
 652                                   enum qed_int_mode int_mode)
 653 {
 654         struct qed_sb_cnt_info sb_cnt_info;
 655         int rc;
 656         int i;
 657         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 658
 659         cdev->int_params.in.int_mode = int_mode;
 660         for_each_hwfn(cdev, i) {
 661                 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
 662                 qed_int_get_num_sbs(&cdev->hwfns[i], &sb_cnt_info);
 663                 cdev->int_params.in.num_vectors += sb_cnt_info.sb_cnt;
 664                 cdev->int_params.in.num_vectors++; /* slowpath */
 665         }
 666
 667         /* We want a minimum of one slowpath and one fastpath vector per hwfn */
 668         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
 669
 670         rc = qed_set_int_mode(cdev, false);
 671         if (rc)  {
 672                 DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
 673                 return rc;
 674         }
 675
 676         cdev->int_params.fp_msix_base = cdev->num_hwfns;
 677         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors -
 678                                        cdev->num_hwfns;
 679
 680         return 0;
 681 }
 682
 683 static int qed_slowpath_vf_setup_int(struct qed_dev *cdev)
 684 {
 685         int rc;
 686
 687         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 688         cdev->int_params.in.int_mode = QED_INT_MODE_MSIX;
 689
 690         qed_vf_get_num_rxqs(QED_LEADING_HWFN(cdev),
 691                             &cdev->int_params.in.num_vectors);
 692         if (cdev->num_hwfns > 1) {
 693                 u8 vectors = 0;
 694
 695                 qed_vf_get_num_rxqs(&cdev->hwfns[1], &vectors);
 696                 cdev->int_params.in.num_vectors += vectors;
 697         }
 698
 699         /* We want a minimum of one fastpath vector per vf hwfn */
 700         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns;
 701
 702         rc = qed_set_int_mode(cdev, true);
 703         if (rc)
 704                 return rc;
 705
 706         cdev->int_params.fp_msix_base = 0;
 707         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors;
 708
 709         return 0;
 710 }
 711
 712 u32 qed_unzip_data(struct qed_hwfn *p_hwfn, u32 input_len,
 713                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
 714 {
 715         int rc;
 716
 717         p_hwfn->stream->next_in = input_buf;
 718         p_hwfn->stream->avail_in = input_len;
 719         p_hwfn->stream->next_out = unzip_buf;
 720         p_hwfn->stream->avail_out = max_size;
 721
 722         rc = zlib_inflateInit2(p_hwfn->stream, MAX_WBITS);
 723
 724         if (rc != Z_OK) {
 725                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "zlib init failed, rc = %d\n",
 726                            rc);
 727                 return 0;
 728         }
 729
 730         rc = zlib_inflate(p_hwfn->stream, Z_FINISH);
 731         zlib_inflateEnd(p_hwfn->stream);
 732
 733         if (rc != Z_OK && rc != Z_STREAM_END) {
 734                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "FW unzip error: %s, rc=%d\n",
 735                            p_hwfn->stream->msg, rc);
 736                 return 0;
 737         }
 738
 739         return p_hwfn->stream->total_out / 4;
 740 }
 741
 742 static int qed_alloc_stream_mem(struct qed_dev *cdev)
 743 {
 744         int i;
 745         void *workspace;
 746
 747         for_each_hwfn(cdev, i) {
 748                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 749
 750                 p_hwfn->stream = kzalloc(sizeof(*p_hwfn->stream), GFP_KERNEL);
 751                 if (!p_hwfn->stream)
 752                         return -ENOMEM;
 753
 754                 workspace = vzalloc(zlib_inflate_workspacesize());
 755                 if (!workspace)
 756                         return -ENOMEM;
 757                 p_hwfn->stream->workspace = workspace;
 758         }
 759
 760         return 0;
 761 }
 762
 763 static void qed_free_stream_mem(struct qed_dev *cdev)
 764 {
 765         int i;
 766
 767         for_each_hwfn(cdev, i) {
 768                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 769
 770                 if (!p_hwfn->stream)
 771                         return;
 772
 773                 vfree(p_hwfn->stream->workspace);
 774                 kfree(p_hwfn->stream);
 775         }
 776 }
 777
 778 static void qed_update_pf_params(struct qed_dev *cdev,
 779                                  struct qed_pf_params *params)
 780 {
 781         int i;
 782
 783         for (i = 0; i < cdev->num_hwfns; i++) {
 784                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 785
 786                 p_hwfn->pf_params = *params;
 787         }
 788 }
 789
 790 static int qed_slowpath_start(struct qed_dev *cdev,
 791                               struct qed_slowpath_params *params)
 792 {
 793         struct qed_tunn_start_params tunn_info;
 794         struct qed_mcp_drv_version drv_version;
 795         const u8 *data = NULL;
 796         struct qed_hwfn *hwfn;
 797         int rc = -EINVAL;
 798
 799         if (qed_iov_wq_start(cdev))
 800                 goto err;
 801
 802         if (IS_PF(cdev)) {
 803                 rc = request_firmware(&cdev->firmware, QED_FW_FILE_NAME,
 804                                       &cdev->pdev->dev);
 805                 if (rc) {
 806                         DP_NOTICE(cdev,
 807                                   "Failed to find fw file - /lib/firmware/%s\n",
 808                                   QED_FW_FILE_NAME);
 809                         goto err;
 810                 }
 811         }
 812
 813         rc = qed_nic_setup(cdev);
 814         if (rc)
 815                 goto err;
 816
 817         if (IS_PF(cdev))
 818                 rc = qed_slowpath_setup_int(cdev, params->int_mode);
 819         else
 820                 rc = qed_slowpath_vf_setup_int(cdev);
 821         if (rc)
 822                 goto err1;
 823
 824         if (IS_PF(cdev)) {
 825                 /* Allocate stream for unzipping */
 826                 rc = qed_alloc_stream_mem(cdev);
 827                 if (rc) {
 828                         DP_NOTICE(cdev, "Failed to allocate stream memory\n");
 829                         goto err2;
 830                 }
 831
 832                 data = cdev->firmware->data;
 833         }
 834
 835         memset(&tunn_info, 0, sizeof(tunn_info));
 836         tunn_info.tunn_mode |=  1 << QED_MODE_VXLAN_TUNN |
 837                                 1 << QED_MODE_L2GRE_TUNN |
 838                                 1 << QED_MODE_IPGRE_TUNN |
 839                                 1 << QED_MODE_L2GENEVE_TUNN |
 840                                 1 << QED_MODE_IPGENEVE_TUNN;
 841
 842         tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN;
 843         tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN;
 844         tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN;
 845
 846         /* Start the slowpath */
 847         rc = qed_hw_init(cdev, &tunn_info, true,
 848                          cdev->int_params.out.int_mode,
 849                          true, data);
 850         if (rc)
 851                 goto err2;
 852
 853         DP_INFO(cdev,
 854                 "HW initialization and function start completed successfully\n");
 855
 856         if (IS_PF(cdev)) {
 857                 hwfn = QED_LEADING_HWFN(cdev);
 858                 drv_version.version = (params->drv_major << 24) |
 859                                       (params->drv_minor << 16) |
 860                                       (params->drv_rev << 8) |
 861                                       (params->drv_eng);
 862                 strlcpy(drv_version.name, params->name,
 863                         MCP_DRV_VER_STR_SIZE - 4);
 864                 rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
 865                                               &drv_version);
 866                 if (rc) {
 867                         DP_NOTICE(cdev, "Failed sending drv version command\n");
 868                         return rc;
 869                 }
 870         }
 871
 872         qed_reset_vport_stats(cdev);
 873
 874         return 0;
 875
 876 err2:
 877         qed_hw_timers_stop_all(cdev);
 878         if (IS_PF(cdev))
 879                 qed_slowpath_irq_free(cdev);
 880         qed_free_stream_mem(cdev);
 881         qed_disable_msix(cdev);
 882 err1:
 883         qed_resc_free(cdev);
 884 err:
 885         if (IS_PF(cdev))
 886                 release_firmware(cdev->firmware);
 887
 888         qed_iov_wq_stop(cdev, false);
 889
 890         return rc;
 891 }
 892
 893 static int qed_slowpath_stop(struct qed_dev *cdev)
 894 {
 895         if (!cdev)
 896                 return -ENODEV;
 897
 898         if (IS_PF(cdev)) {
 899                 qed_free_stream_mem(cdev);
 900
 901                 qed_nic_stop(cdev);
 902                 qed_slowpath_irq_free(cdev);
 903         }
 904
 905         qed_disable_msix(cdev);
 906         qed_nic_reset(cdev);
 907
 908         qed_iov_wq_stop(cdev, true);
 909
 910         if (IS_PF(cdev))
 911                 release_firmware(cdev->firmware);
 912
 913         return 0;
 914 }
 915
 916 static void qed_set_id(struct qed_dev *cdev, char name[NAME_SIZE],
 917                        char ver_str[VER_SIZE])
 918 {
 919         int i;
 920
 921         memcpy(cdev->name, name, NAME_SIZE);
 922         for_each_hwfn(cdev, i)
 923                 snprintf(cdev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
 924
 925         memcpy(cdev->ver_str, ver_str, VER_SIZE);
 926         cdev->drv_type = DRV_ID_DRV_TYPE_LINUX;
 927 }
 928
 929 static u32 qed_sb_init(struct qed_dev *cdev,
 930                        struct qed_sb_info *sb_info,
 931                        void *sb_virt_addr,
 932                        dma_addr_t sb_phy_addr, u16 sb_id,
 933                        enum qed_sb_type type)
 934 {
 935         struct qed_hwfn *p_hwfn;
 936         int hwfn_index;
 937         u16 rel_sb_id;
 938         u8 n_hwfns;
 939         u32 rc;
 940
 941         /* RoCE uses single engine and CMT uses two engines. When using both
 942          * we force only a single engine. Storage uses only engine 0 too.
 943          */
 944         if (type == QED_SB_TYPE_L2_QUEUE)
 945                 n_hwfns = cdev->num_hwfns;
 946         else
 947                 n_hwfns = 1;
 948
 949         hwfn_index = sb_id % n_hwfns;
 950         p_hwfn = &cdev->hwfns[hwfn_index];
 951         rel_sb_id = sb_id / n_hwfns;
 952
 953         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 954                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 955                    hwfn_index, rel_sb_id, sb_id);
 956
 957         rc = qed_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
 958                              sb_virt_addr, sb_phy_addr, rel_sb_id);
 959
 960         return rc;
 961 }
 962
 963 static u32 qed_sb_release(struct qed_dev *cdev,
 964                           struct qed_sb_info *sb_info,
 965                           u16 sb_id)
 966 {
 967         struct qed_hwfn *p_hwfn;
 968         int hwfn_index;
 969         u16 rel_sb_id;
 970         u32 rc;
 971
 972         hwfn_index = sb_id % cdev->num_hwfns;
 973         p_hwfn = &cdev->hwfns[hwfn_index];
 974         rel_sb_id = sb_id / cdev->num_hwfns;
 975
 976         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 977                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 978                    hwfn_index, rel_sb_id, sb_id);
 979
 980         rc = qed_int_sb_release(p_hwfn, sb_info, rel_sb_id);
 981
 982         return rc;
 983 }
 984
 985 static bool qed_can_link_change(struct qed_dev *cdev)
 986 {
 987         return true;
 988 }
 989
 990 static int qed_set_link(struct qed_dev *cdev,
 991                         struct qed_link_params *params)
 992 {
 993         struct qed_hwfn *hwfn;
 994         struct qed_mcp_link_params *link_params;
 995         struct qed_ptt *ptt;
 996         int rc;
 997
 998         if (!cdev)
 999                 return -ENODEV;
1000
1001         if (IS_VF(cdev))
1002                 return 0;
1003
1004         /* The link should be set only once per PF */
1005         hwfn = &cdev->hwfns[0];
1006
1007         ptt = qed_ptt_acquire(hwfn);
1008         if (!ptt)
1009                 return -EBUSY;
1010
1011         link_params = qed_mcp_get_link_params(hwfn);
1012         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
1013                 link_params->speed.autoneg = params->autoneg;
1014         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
1015                 link_params->speed.advertised_speeds = 0;
1016                 if ((params->adv_speeds & SUPPORTED_1000baseT_Half) ||
1017                     (params->adv_speeds & SUPPORTED_1000baseT_Full))
1018                         link_params->speed.advertised_speeds |=
1019                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
1020                 if (params->adv_speeds & SUPPORTED_10000baseKR_Full)
1021                         link_params->speed.advertised_speeds |=
1022                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
1023                 if (params->adv_speeds & SUPPORTED_40000baseLR4_Full)
1024                         link_params->speed.advertised_speeds |=
1025                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
1026                 if (params->adv_speeds & 0)
1027                         link_params->speed.advertised_speeds |=
1028                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
1029                 if (params->adv_speeds & 0)
1030                         link_params->speed.advertised_speeds |=
1031                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G;
1032         }
1033         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_FORCED_SPEED)
1034                 link_params->speed.forced_speed = params->forced_speed;
1035         if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
1036                 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1037                         link_params->pause.autoneg = true;
1038                 else
1039                         link_params->pause.autoneg = false;
1040                 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
1041                         link_params->pause.forced_rx = true;
1042                 else
1043                         link_params->pause.forced_rx = false;
1044                 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
1045                         link_params->pause.forced_tx = true;
1046                 else
1047                         link_params->pause.forced_tx = false;
1048         }
1049         if (params->override_flags & QED_LINK_OVERRIDE_LOOPBACK_MODE) {
1050                 switch (params->loopback_mode) {
1051                 case QED_LINK_LOOPBACK_INT_PHY:
1052                         link_params->loopback_mode = PMM_LOOPBACK_INT_PHY;
1053                         break;
1054                 case QED_LINK_LOOPBACK_EXT_PHY:
1055                         link_params->loopback_mode = PMM_LOOPBACK_EXT_PHY;
1056                         break;
1057                 case QED_LINK_LOOPBACK_EXT:
1058                         link_params->loopback_mode = PMM_LOOPBACK_EXT;
1059                         break;
1060                 case QED_LINK_LOOPBACK_MAC:
1061                         link_params->loopback_mode = PMM_LOOPBACK_MAC;
1062                         break;
1063                 default:
1064                         link_params->loopback_mode = PMM_LOOPBACK_NONE;
1065                         break;
1066                 }
1067         }
1068
1069         rc = qed_mcp_set_link(hwfn, ptt, params->link_up);
1070
1071         qed_ptt_release(hwfn, ptt);
1072
1073         return rc;
1074 }
1075
1076 static int qed_get_port_type(u32 media_type)
1077 {
1078         int port_type;
1079
1080         switch (media_type) {
1081         case MEDIA_SFPP_10G_FIBER:
1082         case MEDIA_SFP_1G_FIBER:
1083         case MEDIA_XFP_FIBER:
1084         case MEDIA_KR:
1085                 port_type = PORT_FIBRE;
1086                 break;
1087         case MEDIA_DA_TWINAX:
1088                 port_type = PORT_DA;
1089                 break;
1090         case MEDIA_BASE_T:
1091                 port_type = PORT_TP;
1092                 break;
1093         case MEDIA_NOT_PRESENT:
1094                 port_type = PORT_NONE;
1095                 break;
1096         case MEDIA_UNSPECIFIED:
1097         default:
1098                 port_type = PORT_OTHER;
1099                 break;
1100         }
1101         return port_type;
1102 }
1103
1104 static void qed_fill_link(struct qed_hwfn *hwfn,
1105                           struct qed_link_output *if_link)
1106 {
1107         struct qed_mcp_link_params params;
1108         struct qed_mcp_link_state link;
1109         struct qed_mcp_link_capabilities link_caps;
1110         u32 media_type;
1111
1112         memset(if_link, 0, sizeof(*if_link));
1113
1114         /* Prepare source inputs */
1115         if (IS_PF(hwfn->cdev)) {
1116                 memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
1117                 memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
1118                 memcpy(&link_caps, qed_mcp_get_link_capabilities(hwfn),
1119                        sizeof(link_caps));
1120         } else {
1121                 memset(&params, 0, sizeof(params));
1122                 memset(&link, 0, sizeof(link));
1123                 memset(&link_caps, 0, sizeof(link_caps));
1124         }
1125
1126         /* Set the link parameters to pass to protocol driver */
1127         if (link.link_up)
1128                 if_link->link_up = true;
1129
1130         /* TODO - at the moment assume supported and advertised speed equal */
1131         if_link->supported_caps = SUPPORTED_FIBRE;
1132         if (params.speed.autoneg)
1133                 if_link->supported_caps |= SUPPORTED_Autoneg;
1134         if (params.pause.autoneg ||
1135             (params.pause.forced_rx && params.pause.forced_tx))
1136                 if_link->supported_caps |= SUPPORTED_Asym_Pause;
1137         if (params.pause.autoneg || params.pause.forced_rx ||
1138             params.pause.forced_tx)
1139                 if_link->supported_caps |= SUPPORTED_Pause;
1140
1141         if_link->advertised_caps = if_link->supported_caps;
1142         if (params.speed.advertised_speeds &
1143             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1144                 if_link->advertised_caps |= SUPPORTED_1000baseT_Half |
1145                                            SUPPORTED_1000baseT_Full;
1146         if (params.speed.advertised_speeds &
1147             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1148                 if_link->advertised_caps |= SUPPORTED_10000baseKR_Full;
1149         if (params.speed.advertised_speeds &
1150                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1151                 if_link->advertised_caps |= SUPPORTED_40000baseLR4_Full;
1152         if (params.speed.advertised_speeds &
1153                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1154                 if_link->advertised_caps |= 0;
1155         if (params.speed.advertised_speeds &
1156                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1157                 if_link->advertised_caps |= 0;
1158
1159         if (link_caps.speed_capabilities &
1160             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1161                 if_link->supported_caps |= SUPPORTED_1000baseT_Half |
1162                                            SUPPORTED_1000baseT_Full;
1163         if (link_caps.speed_capabilities &
1164             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1165                 if_link->supported_caps |= SUPPORTED_10000baseKR_Full;
1166         if (link_caps.speed_capabilities &
1167                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1168                 if_link->supported_caps |= SUPPORTED_40000baseLR4_Full;
1169         if (link_caps.speed_capabilities &
1170                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1171                 if_link->supported_caps |= 0;
1172         if (link_caps.speed_capabilities &
1173                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1174                 if_link->supported_caps |= 0;
1175
1176         if (link.link_up)
1177                 if_link->speed = link.speed;
1178
1179         /* TODO - fill duplex properly */
1180         if_link->duplex = DUPLEX_FULL;
1181         qed_mcp_get_media_type(hwfn->cdev, &media_type);
1182         if_link->port = qed_get_port_type(media_type);
1183
1184         if_link->autoneg = params.speed.autoneg;
1185
1186         if (params.pause.autoneg)
1187                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1188         if (params.pause.forced_rx)
1189                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1190         if (params.pause.forced_tx)
1191                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1192
1193         /* Link partner capabilities */
1194         if (link.partner_adv_speed &
1195             QED_LINK_PARTNER_SPEED_1G_HD)
1196                 if_link->lp_caps |= SUPPORTED_1000baseT_Half;
1197         if (link.partner_adv_speed &
1198             QED_LINK_PARTNER_SPEED_1G_FD)
1199                 if_link->lp_caps |= SUPPORTED_1000baseT_Full;
1200         if (link.partner_adv_speed &
1201             QED_LINK_PARTNER_SPEED_10G)
1202                 if_link->lp_caps |= SUPPORTED_10000baseKR_Full;
1203         if (link.partner_adv_speed &
1204             QED_LINK_PARTNER_SPEED_40G)
1205                 if_link->lp_caps |= SUPPORTED_40000baseLR4_Full;
1206         if (link.partner_adv_speed &
1207             QED_LINK_PARTNER_SPEED_50G)
1208                 if_link->lp_caps |= 0;
1209         if (link.partner_adv_speed &
1210             QED_LINK_PARTNER_SPEED_100G)
1211                 if_link->lp_caps |= 0;
1212
1213         if (link.an_complete)
1214                 if_link->lp_caps |= SUPPORTED_Autoneg;
1215
1216         if (link.partner_adv_pause)
1217                 if_link->lp_caps |= SUPPORTED_Pause;
1218         if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
1219             link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1220                 if_link->lp_caps |= SUPPORTED_Asym_Pause;
1221 }
1222
1223 static void qed_get_current_link(struct qed_dev *cdev,
1224                                  struct qed_link_output *if_link)
1225 {
1226         qed_fill_link(&cdev->hwfns[0], if_link);
1227 }
1228
1229 void qed_link_update(struct qed_hwfn *hwfn)
1230 {
1231         void *cookie = hwfn->cdev->ops_cookie;
1232         struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
1233         struct qed_link_output if_link;
1234
1235         qed_fill_link(hwfn, &if_link);
1236
1237         if (IS_LEAD_HWFN(hwfn) && cookie)
1238                 op->link_update(cookie, &if_link);
1239 }
1240
1241 static int qed_drain(struct qed_dev *cdev)
1242 {
1243         struct qed_hwfn *hwfn;
1244         struct qed_ptt *ptt;
1245         int i, rc;
1246
1247         if (IS_VF(cdev))
1248                 return 0;
1249
1250         for_each_hwfn(cdev, i) {
1251                 hwfn = &cdev->hwfns[i];
1252                 ptt = qed_ptt_acquire(hwfn);
1253                 if (!ptt) {
1254                         DP_NOTICE(hwfn, "Failed to drain NIG; No PTT\n");
1255                         return -EBUSY;
1256                 }
1257                 rc = qed_mcp_drain(hwfn, ptt);
1258                 if (rc)
1259                         return rc;
1260                 qed_ptt_release(hwfn, ptt);
1261         }
1262
1263         return 0;
1264 }
1265
1266 static int qed_set_led(struct qed_dev *cdev, enum qed_led_mode mode)
1267 {
1268         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1269         struct qed_ptt *ptt;
1270         int status = 0;
1271
1272         ptt = qed_ptt_acquire(hwfn);
1273         if (!ptt)
1274                 return -EAGAIN;
1275
1276         status = qed_mcp_set_led(hwfn, ptt, mode);
1277
1278         qed_ptt_release(hwfn, ptt);
1279
1280         return status;
1281 }
1282
1283 struct qed_selftest_ops qed_selftest_ops_pass = {
1284         .selftest_memory = &qed_selftest_memory,
1285         .selftest_interrupt = &qed_selftest_interrupt,
1286         .selftest_register = &qed_selftest_register,
1287         .selftest_clock = &qed_selftest_clock,
1288 };
1289
1290 const struct qed_common_ops qed_common_ops_pass = {
1291         .selftest = &qed_selftest_ops_pass,
1292         .probe = &qed_probe,
1293         .remove = &qed_remove,
1294         .set_power_state = &qed_set_power_state,
1295         .set_id = &qed_set_id,
1296         .update_pf_params = &qed_update_pf_params,
1297         .slowpath_start = &qed_slowpath_start,
1298         .slowpath_stop = &qed_slowpath_stop,
1299         .set_fp_int = &qed_set_int_fp,
1300         .get_fp_int = &qed_get_int_fp,
1301         .sb_init = &qed_sb_init,
1302         .sb_release = &qed_sb_release,
1303         .simd_handler_config = &qed_simd_handler_config,
1304         .simd_handler_clean = &qed_simd_handler_clean,
1305         .can_link_change = &qed_can_link_change,
1306         .set_link = &qed_set_link,
1307         .get_link = &qed_get_current_link,
1308         .drain = &qed_drain,
1309         .update_msglvl = &qed_init_dp,
1310         .chain_alloc = &qed_chain_alloc,
1311         .chain_free = &qed_chain_free,
1312         .set_led = &qed_set_led,
1313 };