drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/ethtool_netlink.h>
  34
  35 #include "en.h"
  36 #include "en/port.h"
  37 #include "en/params.h"
  38 #include "en/ptp.h"
  39 #include "lib/clock.h"
  40 #include "en/fs_ethtool.h"
  41
  42 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
  43                                struct ethtool_drvinfo *drvinfo)
  44 {
  45         struct mlx5_core_dev *mdev = priv->mdev;
  46         int count;
  47
  48         strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
  49         count = snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  50                          "%d.%d.%04d (%.16s)", fw_rev_maj(mdev),
  51                          fw_rev_min(mdev), fw_rev_sub(mdev), mdev->board_id);
  52         if (count >= sizeof(drvinfo->fw_version))
  53                 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  54                          "%d.%d.%04d", fw_rev_maj(mdev),
  55                          fw_rev_min(mdev), fw_rev_sub(mdev));
  56
  57         strscpy(drvinfo->bus_info, dev_name(mdev->device),
  58                 sizeof(drvinfo->bus_info));
  59 }
  60
  61 static void mlx5e_get_drvinfo(struct net_device *dev,
  62                               struct ethtool_drvinfo *drvinfo)
  63 {
  64         struct mlx5e_priv *priv = netdev_priv(dev);
  65
  66         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
  67 }
  68
  69 struct ptys2ethtool_config {
  70         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  71         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  72 };
  73
  74 static
  75 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
  76 static
  77 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
  78
  79 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...)                  \
  80         ({                                                              \
  81                 struct ptys2ethtool_config *cfg;                        \
  82                 const unsigned int modes[] = { __VA_ARGS__ };           \
  83                 unsigned int i, bit, idx;                               \
  84                 cfg = &ptys2##table##_ethtool_table[reg_];              \
  85                 bitmap_zero(cfg->supported,                             \
  86                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  87                 bitmap_zero(cfg->advertised,                            \
  88                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  89                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  90                         bit = modes[i] % 64;                            \
  91                         idx = modes[i] / 64;                            \
  92                         __set_bit(bit, &cfg->supported[idx]);           \
  93                         __set_bit(bit, &cfg->advertised[idx]);          \
  94                 }                                                       \
  95         })
  96
  97 void mlx5e_build_ptys2ethtool_map(void)
  98 {
  99         memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
 100         memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
 101         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
 102                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
 103         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
 104                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
 105         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
 106                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 107         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
 108                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 109         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
 110                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 111         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
 112                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 113         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
 114                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 115         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
 116                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 117         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
 118                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 119         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
 120                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 121         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
 122                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 123         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
 124                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 125         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
 126                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 127         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
 128                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 129         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
 130                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 131         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
 132                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 133         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
 134                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 135         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
 136                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 137         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
 138                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 139         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
 140                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 141         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
 142                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 143         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
 144                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 145         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
 146                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 147         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
 148                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 149         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
 150                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 151         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
 152                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 153         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
 154                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
 155                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
 156                                        ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
 157         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
 158                                        ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
 159         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
 160                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
 161                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
 162                                        ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
 163                                        ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
 164                                        ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
 165                                        ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
 166                                        ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
 167         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
 168                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
 169                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
 170                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
 171                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 172         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
 173                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
 174                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
 175                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 176         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
 177                                        ext,
 178                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
 179                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
 180                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 181         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
 182                                        ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
 183                                        ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
 184                                        ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
 185                                        ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 186                                        ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
 187         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
 188                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
 189                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
 190                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
 191                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 192         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
 193                                        ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
 194                                        ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
 195                                        ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
 196                                        ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 197                                        ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
 198         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
 199                                        ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
 200                                        ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
 201                                        ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 202                                        ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
 203                                        ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
 204         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
 205                                        ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
 206                                        ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
 207                                        ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 208                                        ETHTOOL_LINK_MODE_100000baseDR_Full_BIT,
 209                                        ETHTOOL_LINK_MODE_100000baseCR_Full_BIT);
 210         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_2_200GBASE_CR2_KR2, ext,
 211                                        ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
 212                                        ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
 213                                        ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 214                                        ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT,
 215                                        ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT);
 216         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_4_400GBASE_CR4_KR4, ext,
 217                                        ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
 218                                        ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
 219                                        ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 220                                        ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT,
 221                                        ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT);
 222 }
 223
 224 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
 225                                         struct ptys2ethtool_config **arr,
 226                                         u32 *size)
 227 {
 228         bool ext = mlx5_ptys_ext_supported(mdev);
 229
 230         *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 231         *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 232                       ARRAY_SIZE(ptys2legacy_ethtool_table);
 233 }
 234
 235 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
 236
 237 struct pflag_desc {
 238         char name[ETH_GSTRING_LEN];
 239         mlx5e_pflag_handler handler;
 240 };
 241
 242 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
 243
 244 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
 245 {
 246         switch (sset) {
 247         case ETH_SS_STATS:
 248                 return mlx5e_stats_total_num(priv);
 249         case ETH_SS_PRIV_FLAGS:
 250                 return MLX5E_NUM_PFLAGS;
 251         case ETH_SS_TEST:
 252                 return mlx5e_self_test_num(priv);
 253         default:
 254                 return -EOPNOTSUPP;
 255         }
 256 }
 257
 258 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 259 {
 260         struct mlx5e_priv *priv = netdev_priv(dev);
 261
 262         return mlx5e_ethtool_get_sset_count(priv, sset);
 263 }
 264
 265 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
 266 {
 267         int i;
 268
 269         switch (stringset) {
 270         case ETH_SS_PRIV_FLAGS:
 271                 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
 272                         strcpy(data + i * ETH_GSTRING_LEN,
 273                                mlx5e_priv_flags[i].name);
 274                 break;
 275
 276         case ETH_SS_TEST:
 277                 mlx5e_self_test_fill_strings(priv, data);
 278                 break;
 279
 280         case ETH_SS_STATS:
 281                 mlx5e_stats_fill_strings(priv, data);
 282                 break;
 283         }
 284 }
 285
 286 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 287 {
 288         struct mlx5e_priv *priv = netdev_priv(dev);
 289
 290         mlx5e_ethtool_get_strings(priv, stringset, data);
 291 }
 292
 293 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
 294                                      struct ethtool_stats *stats, u64 *data)
 295 {
 296         int idx = 0;
 297
 298         mutex_lock(&priv->state_lock);
 299         mlx5e_stats_update(priv);
 300         mutex_unlock(&priv->state_lock);
 301
 302         mlx5e_stats_fill(priv, data, idx);
 303 }
 304
 305 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 306                                     struct ethtool_stats *stats,
 307                                     u64 *data)
 308 {
 309         struct mlx5e_priv *priv = netdev_priv(dev);
 310
 311         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
 312 }
 313
 314 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
 315                                  struct ethtool_ringparam *param,
 316                                  struct kernel_ethtool_ringparam *kernel_param)
 317 {
 318         /* Limitation for regular RQ. XSK RQ may clamp the queue length in
 319          * mlx5e_mpwqe_get_log_rq_size.
 320          */
 321         u8 max_log_mpwrq_pkts = mlx5e_mpwrq_max_log_rq_pkts(priv->mdev,
 322                                                             PAGE_SHIFT,
 323                                                             MLX5E_MPWRQ_UMR_MODE_ALIGNED);
 324
 325         param->rx_max_pending = 1 << min_t(u8, MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE,
 326                                            max_log_mpwrq_pkts);
 327         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 328         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
 329         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
 330
 331         kernel_param->tcp_data_split =
 332                 (priv->channels.params.packet_merge.type == MLX5E_PACKET_MERGE_SHAMPO) ?
 333                 ETHTOOL_TCP_DATA_SPLIT_ENABLED :
 334                 ETHTOOL_TCP_DATA_SPLIT_DISABLED;
 335 }
 336
 337 static void mlx5e_get_ringparam(struct net_device *dev,
 338                                 struct ethtool_ringparam *param,
 339                                 struct kernel_ethtool_ringparam *kernel_param,
 340                                 struct netlink_ext_ack *extack)
 341 {
 342         struct mlx5e_priv *priv = netdev_priv(dev);
 343
 344         mlx5e_ethtool_get_ringparam(priv, param, kernel_param);
 345 }
 346
 347 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
 348                                 struct ethtool_ringparam *param)
 349 {
 350         struct mlx5e_params new_params;
 351         u8 log_rq_size;
 352         u8 log_sq_size;
 353         int err = 0;
 354
 355         if (param->rx_jumbo_pending) {
 356                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
 357                             __func__);
 358                 return -EINVAL;
 359         }
 360         if (param->rx_mini_pending) {
 361                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
 362                             __func__);
 363                 return -EINVAL;
 364         }
 365
 366         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
 367                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
 368                             __func__, param->rx_pending,
 369                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
 370                 return -EINVAL;
 371         }
 372
 373         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 374                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
 375                             __func__, param->tx_pending,
 376                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 377                 return -EINVAL;
 378         }
 379
 380         log_rq_size = order_base_2(param->rx_pending);
 381         log_sq_size = order_base_2(param->tx_pending);
 382
 383         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
 384             log_sq_size == priv->channels.params.log_sq_size)
 385                 return 0;
 386
 387         mutex_lock(&priv->state_lock);
 388
 389         new_params = priv->channels.params;
 390         new_params.log_rq_mtu_frames = log_rq_size;
 391         new_params.log_sq_size = log_sq_size;
 392
 393         err = mlx5e_validate_params(priv->mdev, &new_params);
 394         if (err)
 395                 goto unlock;
 396
 397         err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
 398
 399 unlock:
 400         mutex_unlock(&priv->state_lock);
 401
 402         return err;
 403 }
 404
 405 static int mlx5e_set_ringparam(struct net_device *dev,
 406                                struct ethtool_ringparam *param,
 407                                struct kernel_ethtool_ringparam *kernel_param,
 408                                struct netlink_ext_ack *extack)
 409 {
 410         struct mlx5e_priv *priv = netdev_priv(dev);
 411
 412         return mlx5e_ethtool_set_ringparam(priv, param);
 413 }
 414
 415 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
 416                                 struct ethtool_channels *ch)
 417 {
 418         mutex_lock(&priv->state_lock);
 419         ch->max_combined   = priv->max_nch;
 420         ch->combined_count = priv->channels.params.num_channels;
 421         mutex_unlock(&priv->state_lock);
 422 }
 423
 424 static void mlx5e_get_channels(struct net_device *dev,
 425                                struct ethtool_channels *ch)
 426 {
 427         struct mlx5e_priv *priv = netdev_priv(dev);
 428
 429         mlx5e_ethtool_get_channels(priv, ch);
 430 }
 431
 432 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
 433                                struct ethtool_channels *ch)
 434 {
 435         struct mlx5e_params *cur_params = &priv->channels.params;
 436         unsigned int count = ch->combined_count;
 437         struct mlx5e_params new_params;
 438         bool arfs_enabled;
 439         int rss_cnt;
 440         bool opened;
 441         int err = 0;
 442
 443         if (!count) {
 444                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
 445                             __func__);
 446                 return -EINVAL;
 447         }
 448
 449         if (cur_params->num_channels == count)
 450                 return 0;
 451
 452         mutex_lock(&priv->state_lock);
 453
 454         /* Don't allow changing the number of channels if HTB offload is active,
 455          * because the numeration of the QoS SQs will change, while per-queue
 456          * qdiscs are attached.
 457          */
 458         if (mlx5e_selq_is_htb_enabled(&priv->selq)) {
 459                 err = -EINVAL;
 460                 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the number of channels\n",
 461                            __func__);
 462                 goto out;
 463         }
 464
 465         /* Don't allow changing the number of channels if non-default RSS contexts exist,
 466          * the kernel doesn't protect against set_channels operations that break them.
 467          */
 468         rss_cnt = mlx5e_rx_res_rss_cnt(priv->rx_res) - 1;
 469         if (rss_cnt) {
 470                 err = -EINVAL;
 471                 netdev_err(priv->netdev, "%s: Non-default RSS contexts exist (%d), cannot change the number of channels\n",
 472                            __func__, rss_cnt);
 473                 goto out;
 474         }
 475
 476         /* Don't allow changing the number of channels if MQPRIO mode channel offload is active,
 477          * because it defines a partition over the channels queues.
 478          */
 479         if (cur_params->mqprio.mode == TC_MQPRIO_MODE_CHANNEL) {
 480                 err = -EINVAL;
 481                 netdev_err(priv->netdev, "%s: MQPRIO mode channel offload is active, cannot change the number of channels\n",
 482                            __func__);
 483                 goto out;
 484         }
 485
 486         new_params = *cur_params;
 487         new_params.num_channels = count;
 488
 489         opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 490
 491         arfs_enabled = opened && (priv->netdev->features & NETIF_F_NTUPLE);
 492         if (arfs_enabled)
 493                 mlx5e_arfs_disable(priv->fs);
 494
 495         /* Switch to new channels, set new parameters and close old ones */
 496         err = mlx5e_safe_switch_params(priv, &new_params,
 497                                        mlx5e_num_channels_changed_ctx, NULL, true);
 498
 499         if (arfs_enabled) {
 500                 int err2 = mlx5e_arfs_enable(priv->fs);
 501
 502                 if (err2)
 503                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
 504                                    __func__, err2);
 505         }
 506
 507 out:
 508         mutex_unlock(&priv->state_lock);
 509
 510         return err;
 511 }
 512
 513 static int mlx5e_set_channels(struct net_device *dev,
 514                               struct ethtool_channels *ch)
 515 {
 516         struct mlx5e_priv *priv = netdev_priv(dev);
 517
 518         return mlx5e_ethtool_set_channels(priv, ch);
 519 }
 520
 521 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
 522                                struct ethtool_coalesce *coal,
 523                                struct kernel_ethtool_coalesce *kernel_coal)
 524 {
 525         struct dim_cq_moder *rx_moder, *tx_moder;
 526
 527         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 528                 return -EOPNOTSUPP;
 529
 530         rx_moder = &priv->channels.params.rx_cq_moderation;
 531         coal->rx_coalesce_usecs         = rx_moder->usec;
 532         coal->rx_max_coalesced_frames   = rx_moder->pkts;
 533         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
 534
 535         tx_moder = &priv->channels.params.tx_cq_moderation;
 536         coal->tx_coalesce_usecs         = tx_moder->usec;
 537         coal->tx_max_coalesced_frames   = tx_moder->pkts;
 538         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
 539
 540         kernel_coal->use_cqe_mode_rx =
 541                 MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_BASED_MODER);
 542         kernel_coal->use_cqe_mode_tx =
 543                 MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_TX_CQE_BASED_MODER);
 544
 545         return 0;
 546 }
 547
 548 static int mlx5e_get_coalesce(struct net_device *netdev,
 549                               struct ethtool_coalesce *coal,
 550                               struct kernel_ethtool_coalesce *kernel_coal,
 551                               struct netlink_ext_ack *extack)
 552 {
 553         struct mlx5e_priv *priv = netdev_priv(netdev);
 554
 555         return mlx5e_ethtool_get_coalesce(priv, coal, kernel_coal);
 556 }
 557
 558 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
 559 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
 560
 561 static void
 562 mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 563 {
 564         struct mlx5_core_dev *mdev = priv->mdev;
 565         int tc;
 566         int i;
 567
 568         for (i = 0; i < priv->channels.num; ++i) {
 569                 struct mlx5e_channel *c = priv->channels.c[i];
 570
 571                 for (tc = 0; tc < c->num_tc; tc++) {
 572                         mlx5_core_modify_cq_moderation(mdev,
 573                                                 &c->sq[tc].cq.mcq,
 574                                                 coal->tx_coalesce_usecs,
 575                                                 coal->tx_max_coalesced_frames);
 576                 }
 577         }
 578 }
 579
 580 static void
 581 mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 582 {
 583         struct mlx5_core_dev *mdev = priv->mdev;
 584         int i;
 585
 586         for (i = 0; i < priv->channels.num; ++i) {
 587                 struct mlx5e_channel *c = priv->channels.c[i];
 588
 589                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 590                                                coal->rx_coalesce_usecs,
 591                                                coal->rx_max_coalesced_frames);
 592         }
 593 }
 594
 595 /* convert a boolean value of cq_mode to mlx5 period mode
 596  * true  : MLX5_CQ_PERIOD_MODE_START_FROM_CQE
 597  * false : MLX5_CQ_PERIOD_MODE_START_FROM_EQE
 598  */
 599 static int cqe_mode_to_period_mode(bool val)
 600 {
 601         return val ? MLX5_CQ_PERIOD_MODE_START_FROM_CQE : MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
 602 }
 603
 604 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
 605                                struct ethtool_coalesce *coal,
 606                                struct kernel_ethtool_coalesce *kernel_coal,
 607                                struct netlink_ext_ack *extack)
 608 {
 609         struct dim_cq_moder *rx_moder, *tx_moder;
 610         struct mlx5_core_dev *mdev = priv->mdev;
 611         struct mlx5e_params new_params;
 612         bool reset_rx, reset_tx;
 613         bool reset = true;
 614         u8 cq_period_mode;
 615         int err = 0;
 616
 617         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 618                 return -EOPNOTSUPP;
 619
 620         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
 621             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
 622                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
 623                             __func__, MLX5E_MAX_COAL_TIME);
 624                 return -ERANGE;
 625         }
 626
 627         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
 628             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
 629                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
 630                             __func__, MLX5E_MAX_COAL_FRAMES);
 631                 return -ERANGE;
 632         }
 633
 634         if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) &&
 635             !MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe)) {
 636                 NL_SET_ERR_MSG_MOD(extack, "cqe_mode_rx/tx is not supported on this device");
 637                 return -EOPNOTSUPP;
 638         }
 639
 640         mutex_lock(&priv->state_lock);
 641         new_params = priv->channels.params;
 642
 643         rx_moder          = &new_params.rx_cq_moderation;
 644         rx_moder->usec    = coal->rx_coalesce_usecs;
 645         rx_moder->pkts    = coal->rx_max_coalesced_frames;
 646         new_params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
 647
 648         tx_moder          = &new_params.tx_cq_moderation;
 649         tx_moder->usec    = coal->tx_coalesce_usecs;
 650         tx_moder->pkts    = coal->tx_max_coalesced_frames;
 651         new_params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
 652
 653         reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
 654         reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
 655
 656         cq_period_mode = cqe_mode_to_period_mode(kernel_coal->use_cqe_mode_rx);
 657         if (cq_period_mode != rx_moder->cq_period_mode) {
 658                 mlx5e_set_rx_cq_mode_params(&new_params, cq_period_mode);
 659                 reset_rx = true;
 660         }
 661
 662         cq_period_mode = cqe_mode_to_period_mode(kernel_coal->use_cqe_mode_tx);
 663         if (cq_period_mode != tx_moder->cq_period_mode) {
 664                 mlx5e_set_tx_cq_mode_params(&new_params, cq_period_mode);
 665                 reset_tx = true;
 666         }
 667
 668         if (reset_rx) {
 669                 u8 mode = MLX5E_GET_PFLAG(&new_params,
 670                                           MLX5E_PFLAG_RX_CQE_BASED_MODER);
 671
 672                 mlx5e_reset_rx_moderation(&new_params, mode);
 673         }
 674         if (reset_tx) {
 675                 u8 mode = MLX5E_GET_PFLAG(&new_params,
 676                                           MLX5E_PFLAG_TX_CQE_BASED_MODER);
 677
 678                 mlx5e_reset_tx_moderation(&new_params, mode);
 679         }
 680
 681         /* If DIM state hasn't changed, it's possible to modify interrupt
 682          * moderation parameters on the fly, even if the channels are open.
 683          */
 684         if (!reset_rx && !reset_tx && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 685                 if (!coal->use_adaptive_rx_coalesce)
 686                         mlx5e_set_priv_channels_rx_coalesce(priv, coal);
 687                 if (!coal->use_adaptive_tx_coalesce)
 688                         mlx5e_set_priv_channels_tx_coalesce(priv, coal);
 689                 reset = false;
 690         }
 691
 692         err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, reset);
 693
 694         mutex_unlock(&priv->state_lock);
 695         return err;
 696 }
 697
 698 static int mlx5e_set_coalesce(struct net_device *netdev,
 699                               struct ethtool_coalesce *coal,
 700                               struct kernel_ethtool_coalesce *kernel_coal,
 701                               struct netlink_ext_ack *extack)
 702 {
 703         struct mlx5e_priv *priv = netdev_priv(netdev);
 704
 705         return mlx5e_ethtool_set_coalesce(priv, coal, kernel_coal, extack);
 706 }
 707
 708 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
 709                                         unsigned long *supported_modes,
 710                                         u32 eth_proto_cap)
 711 {
 712         unsigned long proto_cap = eth_proto_cap;
 713         struct ptys2ethtool_config *table;
 714         u32 max_size;
 715         int proto;
 716
 717         mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
 718         for_each_set_bit(proto, &proto_cap, max_size)
 719                 bitmap_or(supported_modes, supported_modes,
 720                           table[proto].supported,
 721                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 722 }
 723
 724 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 725                                     u32 eth_proto_cap, bool ext)
 726 {
 727         unsigned long proto_cap = eth_proto_cap;
 728         struct ptys2ethtool_config *table;
 729         u32 max_size;
 730         int proto;
 731
 732         table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 733         max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 734                          ARRAY_SIZE(ptys2legacy_ethtool_table);
 735
 736         for_each_set_bit(proto, &proto_cap, max_size)
 737                 bitmap_or(advertising_modes, advertising_modes,
 738                           table[proto].advertised,
 739                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 740 }
 741
 742 static const u32 pplm_fec_2_ethtool[] = {
 743         [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
 744         [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
 745         [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
 746         [MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,
 747         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,
 748 };
 749
 750 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
 751 {
 752         int mode = 0;
 753
 754         if (!fec_mode)
 755                 return ETHTOOL_FEC_AUTO;
 756
 757         mode = find_first_bit(&fec_mode, size);
 758
 759         if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
 760                 return pplm_fec_2_ethtool[mode];
 761
 762         return 0;
 763 }
 764
 765 #define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec)            \
 766         do {                                                            \
 767                 if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec)))            \
 768                         __set_bit(ethtool_fec,                          \
 769                                   link_ksettings->link_modes.supported);\
 770         } while (0)
 771
 772 static const u32 pplm_fec_2_ethtool_linkmodes[] = {
 773         [MLX5E_FEC_NOFEC] = ETHTOOL_LINK_MODE_FEC_NONE_BIT,
 774         [MLX5E_FEC_FIRECODE] = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
 775         [MLX5E_FEC_RS_528_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 776         [MLX5E_FEC_RS_544_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 777         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
 778 };
 779
 780 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
 781                                         struct ethtool_link_ksettings *link_ksettings)
 782 {
 783         unsigned long active_fec_long;
 784         u32 active_fec;
 785         u32 bitn;
 786         int err;
 787
 788         err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
 789         if (err)
 790                 return (err == -EOPNOTSUPP) ? 0 : err;
 791
 792         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC,
 793                                       ETHTOOL_LINK_MODE_FEC_NONE_BIT);
 794         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE,
 795                                       ETHTOOL_LINK_MODE_FEC_BASER_BIT);
 796         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514,
 797                                       ETHTOOL_LINK_MODE_FEC_RS_BIT);
 798         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,
 799                                       ETHTOOL_LINK_MODE_FEC_LLRS_BIT);
 800
 801         active_fec_long = active_fec;
 802         /* active fec is a bit set, find out which bit is set and
 803          * advertise the corresponding ethtool bit
 804          */
 805         bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);
 806         if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))
 807                 __set_bit(pplm_fec_2_ethtool_linkmodes[bitn],
 808                           link_ksettings->link_modes.advertising);
 809
 810         return 0;
 811 }
 812
 813 static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,
 814                                                    struct ethtool_link_ksettings *link_ksettings,
 815                                                    u32 eth_proto_cap, u8 connector_type)
 816 {
 817         if (!MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type)) {
 818                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 819                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 820                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 821                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 822                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 823                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 824                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 825                                                              supported,
 826                                                              FIBRE);
 827                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 828                                                              advertising,
 829                                                              FIBRE);
 830                 }
 831
 832                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 833                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 834                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 835                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 836                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 837                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 838                                                              supported,
 839                                                              Backplane);
 840                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 841                                                              advertising,
 842                                                              Backplane);
 843                 }
 844                 return;
 845         }
 846
 847         switch (connector_type) {
 848         case MLX5E_PORT_TP:
 849                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 850                                                      supported, TP);
 851                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 852                                                      advertising, TP);
 853                 break;
 854         case MLX5E_PORT_AUI:
 855                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 856                                                      supported, AUI);
 857                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 858                                                      advertising, AUI);
 859                 break;
 860         case MLX5E_PORT_BNC:
 861                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 862                                                      supported, BNC);
 863                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 864                                                      advertising, BNC);
 865                 break;
 866         case MLX5E_PORT_MII:
 867                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 868                                                      supported, MII);
 869                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 870                                                      advertising, MII);
 871                 break;
 872         case MLX5E_PORT_FIBRE:
 873                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 874                                                      supported, FIBRE);
 875                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 876                                                      advertising, FIBRE);
 877                 break;
 878         case MLX5E_PORT_DA:
 879                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 880                                                      supported, Backplane);
 881                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 882                                                      advertising, Backplane);
 883                 break;
 884         case MLX5E_PORT_NONE:
 885         case MLX5E_PORT_OTHER:
 886         default:
 887                 break;
 888         }
 889 }
 890
 891 static void get_speed_duplex(struct net_device *netdev,
 892                              u32 eth_proto_oper, bool force_legacy,
 893                              u16 data_rate_oper,
 894                              struct ethtool_link_ksettings *link_ksettings)
 895 {
 896         struct mlx5e_priv *priv = netdev_priv(netdev);
 897         u32 speed = SPEED_UNKNOWN;
 898         u8 duplex = DUPLEX_UNKNOWN;
 899
 900         if (!netif_carrier_ok(netdev))
 901                 goto out;
 902
 903         speed = mlx5_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
 904         if (!speed) {
 905                 if (data_rate_oper)
 906                         speed = 100 * data_rate_oper;
 907                 else
 908                         speed = SPEED_UNKNOWN;
 909                 goto out;
 910         }
 911
 912         duplex = DUPLEX_FULL;
 913
 914 out:
 915         link_ksettings->base.speed = speed;
 916         link_ksettings->base.duplex = duplex;
 917 }
 918
 919 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
 920                           struct ethtool_link_ksettings *link_ksettings)
 921 {
 922         unsigned long *supported = link_ksettings->link_modes.supported;
 923         ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
 924
 925         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 926 }
 927
 928 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
 929                             struct ethtool_link_ksettings *link_ksettings,
 930                             bool ext)
 931 {
 932         unsigned long *advertising = link_ksettings->link_modes.advertising;
 933         ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
 934
 935         if (rx_pause)
 936                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 937         if (tx_pause ^ rx_pause)
 938                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 939 }
 940
 941 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
 942                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
 943                 [MLX5E_PORT_NONE]               = PORT_NONE,
 944                 [MLX5E_PORT_TP]                 = PORT_TP,
 945                 [MLX5E_PORT_AUI]                = PORT_AUI,
 946                 [MLX5E_PORT_BNC]                = PORT_BNC,
 947                 [MLX5E_PORT_MII]                = PORT_MII,
 948                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
 949                 [MLX5E_PORT_DA]                 = PORT_DA,
 950                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
 951         };
 952
 953 static u8 get_connector_port(struct mlx5_core_dev *mdev, u32 eth_proto, u8 connector_type)
 954 {
 955         if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type))
 956                 return ptys2connector_type[connector_type];
 957
 958         if (eth_proto &
 959             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
 960              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
 961              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
 962              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 963                 return PORT_FIBRE;
 964         }
 965
 966         if (eth_proto &
 967             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
 968              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
 969              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 970                 return PORT_DA;
 971         }
 972
 973         if (eth_proto &
 974             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
 975              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
 976              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
 977              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 978                 return PORT_NONE;
 979         }
 980
 981         return PORT_OTHER;
 982 }
 983
 984 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
 985                                struct ethtool_link_ksettings *link_ksettings)
 986 {
 987         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 988         bool ext = mlx5_ptys_ext_supported(mdev);
 989
 990         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
 991 }
 992
 993 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
 994                                      struct ethtool_link_ksettings *link_ksettings)
 995 {
 996         struct mlx5_core_dev *mdev = priv->mdev;
 997         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
 998         u32 eth_proto_admin;
 999         u8 an_disable_admin;
1000         u16 data_rate_oper;
1001         u32 eth_proto_oper;
1002         u32 eth_proto_cap;
1003         u8 connector_type;
1004         u32 rx_pause = 0;
1005         u32 tx_pause = 0;
1006         u32 eth_proto_lp;
1007         bool admin_ext;
1008         u8 an_status;
1009         bool ext;
1010         int err;
1011
1012         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
1013         if (err) {
1014                 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
1015                            __func__, err);
1016                 goto err_query_regs;
1017         }
1018         ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
1019         eth_proto_cap    = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
1020                                               eth_proto_capability);
1021         eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
1022                                               eth_proto_admin);
1023         /* Fields: eth_proto_admin and ext_eth_proto_admin  are
1024          * mutually exclusive. Hence try reading legacy advertising
1025          * when extended advertising is zero.
1026          * admin_ext indicates which proto_admin (ext vs. legacy)
1027          * should be read and interpreted
1028          */
1029         admin_ext = ext;
1030         if (ext && !eth_proto_admin) {
1031                 eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
1032                                                       eth_proto_admin);
1033                 admin_ext = false;
1034         }
1035
1036         eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
1037                                               eth_proto_oper);
1038         eth_proto_lp        = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
1039         an_disable_admin    = MLX5_GET(ptys_reg, out, an_disable_admin);
1040         an_status           = MLX5_GET(ptys_reg, out, an_status);
1041         connector_type      = MLX5_GET(ptys_reg, out, connector_type);
1042         data_rate_oper      = MLX5_GET(ptys_reg, out, data_rate_oper);
1043
1044         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
1045
1046         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
1047         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
1048
1049         get_supported(mdev, eth_proto_cap, link_ksettings);
1050         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
1051                         admin_ext);
1052         get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
1053                          data_rate_oper, link_ksettings);
1054
1055         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1056         connector_type = connector_type < MLX5E_CONNECTOR_TYPE_NUMBER ?
1057                          connector_type : MLX5E_PORT_UNKNOWN;
1058         link_ksettings->base.port = get_connector_port(mdev, eth_proto_oper, connector_type);
1059         ptys2ethtool_supported_advertised_port(mdev, link_ksettings, eth_proto_admin,
1060                                                connector_type);
1061         get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
1062
1063         if (an_status == MLX5_AN_COMPLETE)
1064                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1065                                                      lp_advertising, Autoneg);
1066
1067         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
1068                                                           AUTONEG_ENABLE;
1069         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
1070                                              Autoneg);
1071
1072         err = get_fec_supported_advertised(mdev, link_ksettings);
1073         if (err) {
1074                 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
1075                            __func__, err);
1076                 err = 0; /* don't fail caps query because of FEC error */
1077         }
1078
1079         if (!an_disable_admin)
1080                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1081                                                      advertising, Autoneg);
1082
1083 err_query_regs:
1084         return err;
1085 }
1086
1087 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1088                                     struct ethtool_link_ksettings *link_ksettings)
1089 {
1090         struct mlx5e_priv *priv = netdev_priv(netdev);
1091
1092         return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
1093 }
1094
1095 static int mlx5e_speed_validate(struct net_device *netdev, bool ext,
1096                                 const unsigned long link_modes, u8 autoneg)
1097 {
1098         /* Extended link-mode has no speed limitations. */
1099         if (ext)
1100                 return 0;
1101
1102         if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1103             autoneg != AUTONEG_ENABLE) {
1104                 netdev_err(netdev, "%s: 56G link speed requires autoneg enabled\n",
1105                            __func__);
1106                 return -EINVAL;
1107         }
1108         return 0;
1109 }
1110
1111 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1112 {
1113         u32 i, ptys_modes = 0;
1114
1115         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1116                 if (*ptys2legacy_ethtool_table[i].advertised == 0)
1117                         continue;
1118                 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
1119                                       link_modes,
1120                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
1121                         ptys_modes |= MLX5E_PROT_MASK(i);
1122         }
1123
1124         return ptys_modes;
1125 }
1126
1127 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
1128 {
1129         u32 i, ptys_modes = 0;
1130         unsigned long modes[2];
1131
1132         for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1133                 if (ptys2ext_ethtool_table[i].advertised[0] == 0 &&
1134                     ptys2ext_ethtool_table[i].advertised[1] == 0)
1135                         continue;
1136                 memset(modes, 0, sizeof(modes));
1137                 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1138                            link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1139
1140                 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1141                     modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1142                         ptys_modes |= MLX5E_PROT_MASK(i);
1143         }
1144         return ptys_modes;
1145 }
1146
1147 static bool ext_link_mode_requested(const unsigned long *adver)
1148 {
1149 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1150         int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1151         __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1152
1153         bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1154         return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1155 }
1156
1157 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1158 {
1159         bool ext_link_mode = ext_link_mode_requested(adver);
1160
1161         return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1162 }
1163
1164 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1165                                      const struct ethtool_link_ksettings *link_ksettings)
1166 {
1167         struct mlx5_core_dev *mdev = priv->mdev;
1168         struct mlx5_port_eth_proto eproto;
1169         const unsigned long *adver;
1170         bool an_changes = false;
1171         u8 an_disable_admin;
1172         bool ext_supported;
1173         u8 an_disable_cap;
1174         bool an_disable;
1175         u32 link_modes;
1176         u8 an_status;
1177         u8 autoneg;
1178         u32 speed;
1179         bool ext;
1180         int err;
1181
1182         u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1183
1184         adver = link_ksettings->link_modes.advertising;
1185         autoneg = link_ksettings->base.autoneg;
1186         speed = link_ksettings->base.speed;
1187
1188         ext_supported = mlx5_ptys_ext_supported(mdev);
1189         ext = ext_requested(autoneg, adver, ext_supported);
1190         if (!ext_supported && ext)
1191                 return -EOPNOTSUPP;
1192
1193         ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1194                                   mlx5e_ethtool2ptys_adver_link;
1195         err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1196         if (err) {
1197                 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1198                            __func__, err);
1199                 goto out;
1200         }
1201         link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1202                 mlx5_port_speed2linkmodes(mdev, speed, !ext);
1203
1204         err = mlx5e_speed_validate(priv->netdev, ext, link_modes, autoneg);
1205         if (err)
1206                 goto out;
1207
1208         link_modes = link_modes & eproto.cap;
1209         if (!link_modes) {
1210                 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1211                            __func__);
1212                 err = -EINVAL;
1213                 goto out;
1214         }
1215
1216         mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1217                                     &an_disable_admin);
1218
1219         an_disable = autoneg == AUTONEG_DISABLE;
1220         an_changes = ((!an_disable && an_disable_admin) ||
1221                       (an_disable && !an_disable_admin));
1222
1223         if (!an_changes && link_modes == eproto.admin)
1224                 goto out;
1225
1226         mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1227         mlx5_toggle_port_link(mdev);
1228
1229 out:
1230         return err;
1231 }
1232
1233 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1234                                     const struct ethtool_link_ksettings *link_ksettings)
1235 {
1236         struct mlx5e_priv *priv = netdev_priv(netdev);
1237
1238         return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1239 }
1240
1241 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1242 {
1243         return sizeof_field(struct mlx5e_rss_params_hash, toeplitz_hash_key);
1244 }
1245
1246 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1247 {
1248         struct mlx5e_priv *priv = netdev_priv(netdev);
1249
1250         return mlx5e_ethtool_get_rxfh_key_size(priv);
1251 }
1252
1253 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1254 {
1255         return mlx5e_rqt_size(priv->mdev, priv->channels.params.num_channels);
1256 }
1257
1258 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1259 {
1260         struct mlx5e_priv *priv = netdev_priv(netdev);
1261
1262         return mlx5e_ethtool_get_rxfh_indir_size(priv);
1263 }
1264
1265 int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)
1266 {
1267         struct mlx5e_priv *priv = netdev_priv(netdev);
1268         u32 rss_context = rxfh->rss_context;
1269         int err;
1270
1271         mutex_lock(&priv->state_lock);
1272         err = mlx5e_rx_res_rss_get_rxfh(priv->rx_res, rss_context,
1273                                         rxfh->indir, rxfh->key, &rxfh->hfunc);
1274         mutex_unlock(&priv->state_lock);
1275         return err;
1276 }
1277
1278 int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,
1279                    struct netlink_ext_ack *extack)
1280 {
1281         struct mlx5e_priv *priv = netdev_priv(dev);
1282         u32 *rss_context = &rxfh->rss_context;
1283         u8 hfunc = rxfh->hfunc;
1284         int err;
1285
1286         mutex_lock(&priv->state_lock);
1287         if (*rss_context && rxfh->rss_delete) {
1288                 err = mlx5e_rx_res_rss_destroy(priv->rx_res, *rss_context);
1289                 goto unlock;
1290         }
1291
1292         if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {
1293                 unsigned int count = priv->channels.params.num_channels;
1294
1295                 err = mlx5e_rx_res_rss_init(priv->rx_res, rss_context, count);
1296                 if (err)
1297                         goto unlock;
1298         }
1299
1300         err = mlx5e_rx_res_rss_set_rxfh(priv->rx_res, *rss_context,
1301                                         rxfh->indir, rxfh->key,
1302                                         hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &hfunc);
1303
1304 unlock:
1305         mutex_unlock(&priv->state_lock);
1306         return err;
1307 }
1308
1309 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
1310 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
1311 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
1312 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
1313 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1314         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1315               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1316
1317 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1318                                          u16 *pfc_prevention_tout)
1319 {
1320         struct mlx5e_priv *priv    = netdev_priv(netdev);
1321         struct mlx5_core_dev *mdev = priv->mdev;
1322
1323         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1324             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1325                 return -EOPNOTSUPP;
1326
1327         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1328 }
1329
1330 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1331                                          u16 pfc_preven)
1332 {
1333         struct mlx5e_priv *priv = netdev_priv(netdev);
1334         struct mlx5_core_dev *mdev = priv->mdev;
1335         u16 critical_tout;
1336         u16 minor;
1337
1338         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1339             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1340                 return -EOPNOTSUPP;
1341
1342         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1343                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1344                         pfc_preven;
1345
1346         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1347             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1348              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1349                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1350                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1351                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1352                 return -EINVAL;
1353         }
1354
1355         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1356         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1357                                              minor);
1358 }
1359
1360 static int mlx5e_get_tunable(struct net_device *dev,
1361                              const struct ethtool_tunable *tuna,
1362                              void *data)
1363 {
1364         int err;
1365
1366         switch (tuna->id) {
1367         case ETHTOOL_PFC_PREVENTION_TOUT:
1368                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1369                 break;
1370         default:
1371                 err = -EINVAL;
1372                 break;
1373         }
1374
1375         return err;
1376 }
1377
1378 static int mlx5e_set_tunable(struct net_device *dev,
1379                              const struct ethtool_tunable *tuna,
1380                              const void *data)
1381 {
1382         struct mlx5e_priv *priv = netdev_priv(dev);
1383         int err;
1384
1385         mutex_lock(&priv->state_lock);
1386
1387         switch (tuna->id) {
1388         case ETHTOOL_PFC_PREVENTION_TOUT:
1389                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1390                 break;
1391         default:
1392                 err = -EINVAL;
1393                 break;
1394         }
1395
1396         mutex_unlock(&priv->state_lock);
1397         return err;
1398 }
1399
1400 static void mlx5e_get_pause_stats(struct net_device *netdev,
1401                                   struct ethtool_pause_stats *pause_stats)
1402 {
1403         struct mlx5e_priv *priv = netdev_priv(netdev);
1404
1405         mlx5e_stats_pause_get(priv, pause_stats);
1406 }
1407
1408 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1409                                   struct ethtool_pauseparam *pauseparam)
1410 {
1411         struct mlx5_core_dev *mdev = priv->mdev;
1412         int err;
1413
1414         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1415                                     &pauseparam->tx_pause);
1416         if (err) {
1417                 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1418                            __func__, err);
1419         }
1420 }
1421
1422 static void mlx5e_get_pauseparam(struct net_device *netdev,
1423                                  struct ethtool_pauseparam *pauseparam)
1424 {
1425         struct mlx5e_priv *priv = netdev_priv(netdev);
1426
1427         mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1428 }
1429
1430 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1431                                  struct ethtool_pauseparam *pauseparam)
1432 {
1433         struct mlx5_core_dev *mdev = priv->mdev;
1434         int err;
1435
1436         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1437                 return -EOPNOTSUPP;
1438
1439         if (pauseparam->autoneg)
1440                 return -EINVAL;
1441
1442         err = mlx5_set_port_pause(mdev,
1443                                   pauseparam->rx_pause ? 1 : 0,
1444                                   pauseparam->tx_pause ? 1 : 0);
1445         if (err) {
1446                 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1447                            __func__, err);
1448         }
1449
1450         return err;
1451 }
1452
1453 static int mlx5e_set_pauseparam(struct net_device *netdev,
1454                                 struct ethtool_pauseparam *pauseparam)
1455 {
1456         struct mlx5e_priv *priv = netdev_priv(netdev);
1457
1458         return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1459 }
1460
1461 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1462                               struct ethtool_ts_info *info)
1463 {
1464         struct mlx5_core_dev *mdev = priv->mdev;
1465
1466         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1467
1468         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1469             info->phc_index == -1)
1470                 return 0;
1471
1472         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1473                                 SOF_TIMESTAMPING_RX_HARDWARE |
1474                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1475
1476         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1477                          BIT(HWTSTAMP_TX_ON);
1478
1479         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1480                            BIT(HWTSTAMP_FILTER_ALL);
1481
1482         return 0;
1483 }
1484
1485 static int mlx5e_get_ts_info(struct net_device *dev,
1486                              struct ethtool_ts_info *info)
1487 {
1488         struct mlx5e_priv *priv = netdev_priv(dev);
1489
1490         return mlx5e_ethtool_get_ts_info(priv, info);
1491 }
1492
1493 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1494 {
1495         __u32 ret = 0;
1496
1497         if (MLX5_CAP_GEN(mdev, wol_g))
1498                 ret |= WAKE_MAGIC;
1499
1500         if (MLX5_CAP_GEN(mdev, wol_s))
1501                 ret |= WAKE_MAGICSECURE;
1502
1503         if (MLX5_CAP_GEN(mdev, wol_a))
1504                 ret |= WAKE_ARP;
1505
1506         if (MLX5_CAP_GEN(mdev, wol_b))
1507                 ret |= WAKE_BCAST;
1508
1509         if (MLX5_CAP_GEN(mdev, wol_m))
1510                 ret |= WAKE_MCAST;
1511
1512         if (MLX5_CAP_GEN(mdev, wol_u))
1513                 ret |= WAKE_UCAST;
1514
1515         if (MLX5_CAP_GEN(mdev, wol_p))
1516                 ret |= WAKE_PHY;
1517
1518         return ret;
1519 }
1520
1521 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1522 {
1523         __u32 ret = 0;
1524
1525         if (mode & MLX5_WOL_MAGIC)
1526                 ret |= WAKE_MAGIC;
1527
1528         if (mode & MLX5_WOL_SECURED_MAGIC)
1529                 ret |= WAKE_MAGICSECURE;
1530
1531         if (mode & MLX5_WOL_ARP)
1532                 ret |= WAKE_ARP;
1533
1534         if (mode & MLX5_WOL_BROADCAST)
1535                 ret |= WAKE_BCAST;
1536
1537         if (mode & MLX5_WOL_MULTICAST)
1538                 ret |= WAKE_MCAST;
1539
1540         if (mode & MLX5_WOL_UNICAST)
1541                 ret |= WAKE_UCAST;
1542
1543         if (mode & MLX5_WOL_PHY_ACTIVITY)
1544                 ret |= WAKE_PHY;
1545
1546         return ret;
1547 }
1548
1549 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1550 {
1551         u8 ret = 0;
1552
1553         if (mode & WAKE_MAGIC)
1554                 ret |= MLX5_WOL_MAGIC;
1555
1556         if (mode & WAKE_MAGICSECURE)
1557                 ret |= MLX5_WOL_SECURED_MAGIC;
1558
1559         if (mode & WAKE_ARP)
1560                 ret |= MLX5_WOL_ARP;
1561
1562         if (mode & WAKE_BCAST)
1563                 ret |= MLX5_WOL_BROADCAST;
1564
1565         if (mode & WAKE_MCAST)
1566                 ret |= MLX5_WOL_MULTICAST;
1567
1568         if (mode & WAKE_UCAST)
1569                 ret |= MLX5_WOL_UNICAST;
1570
1571         if (mode & WAKE_PHY)
1572                 ret |= MLX5_WOL_PHY_ACTIVITY;
1573
1574         return ret;
1575 }
1576
1577 static void mlx5e_get_wol(struct net_device *netdev,
1578                           struct ethtool_wolinfo *wol)
1579 {
1580         struct mlx5e_priv *priv = netdev_priv(netdev);
1581         struct mlx5_core_dev *mdev = priv->mdev;
1582         u8 mlx5_wol_mode;
1583         int err;
1584
1585         memset(wol, 0, sizeof(*wol));
1586
1587         wol->supported = mlx5e_get_wol_supported(mdev);
1588         if (!wol->supported)
1589                 return;
1590
1591         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1592         if (err)
1593                 return;
1594
1595         wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1596 }
1597
1598 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1599 {
1600         struct mlx5e_priv *priv = netdev_priv(netdev);
1601         struct mlx5_core_dev *mdev = priv->mdev;
1602         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1603         u32 mlx5_wol_mode;
1604
1605         if (!wol_supported)
1606                 return -EOPNOTSUPP;
1607
1608         if (wol->wolopts & ~wol_supported)
1609                 return -EINVAL;
1610
1611         mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1612
1613         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1614 }
1615
1616 static void mlx5e_get_fec_stats(struct net_device *netdev,
1617                                 struct ethtool_fec_stats *fec_stats)
1618 {
1619         struct mlx5e_priv *priv = netdev_priv(netdev);
1620
1621         mlx5e_stats_fec_get(priv, fec_stats);
1622 }
1623
1624 static int mlx5e_get_fecparam(struct net_device *netdev,
1625                               struct ethtool_fecparam *fecparam)
1626 {
1627         struct mlx5e_priv *priv = netdev_priv(netdev);
1628         struct mlx5_core_dev *mdev = priv->mdev;
1629         u16 fec_configured;
1630         u32 fec_active;
1631         int err;
1632
1633         err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1634
1635         if (err)
1636                 return err;
1637
1638         fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,
1639                                                 sizeof(unsigned long) * BITS_PER_BYTE);
1640
1641         if (!fecparam->active_fec)
1642                 return -EOPNOTSUPP;
1643
1644         fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,
1645                                          sizeof(unsigned long) * BITS_PER_BYTE);
1646
1647         return 0;
1648 }
1649
1650 static int mlx5e_set_fecparam(struct net_device *netdev,
1651                               struct ethtool_fecparam *fecparam)
1652 {
1653         struct mlx5e_priv *priv = netdev_priv(netdev);
1654         struct mlx5_core_dev *mdev = priv->mdev;
1655         unsigned long fec_bitmap;
1656         u16 fec_policy = 0;
1657         int mode;
1658         int err;
1659
1660         bitmap_from_arr32(&fec_bitmap, &fecparam->fec, sizeof(fecparam->fec) * BITS_PER_BYTE);
1661         if (bitmap_weight(&fec_bitmap, ETHTOOL_FEC_LLRS_BIT + 1) > 1)
1662                 return -EOPNOTSUPP;
1663
1664         for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1665                 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1666                         continue;
1667                 fec_policy |= (1 << mode);
1668                 break;
1669         }
1670
1671         err = mlx5e_set_fec_mode(mdev, fec_policy);
1672
1673         if (err)
1674                 return err;
1675
1676         mlx5_toggle_port_link(mdev);
1677
1678         return 0;
1679 }
1680
1681 static int mlx5e_set_phys_id(struct net_device *dev,
1682                              enum ethtool_phys_id_state state)
1683 {
1684         struct mlx5e_priv *priv = netdev_priv(dev);
1685         struct mlx5_core_dev *mdev = priv->mdev;
1686         u16 beacon_duration;
1687
1688         if (!MLX5_CAP_GEN(mdev, beacon_led))
1689                 return -EOPNOTSUPP;
1690
1691         switch (state) {
1692         case ETHTOOL_ID_ACTIVE:
1693                 beacon_duration = MLX5_BEACON_DURATION_INF;
1694                 break;
1695         case ETHTOOL_ID_INACTIVE:
1696                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1697                 break;
1698         default:
1699                 return -EOPNOTSUPP;
1700         }
1701
1702         return mlx5_set_port_beacon(mdev, beacon_duration);
1703 }
1704
1705 static int mlx5e_get_module_info(struct net_device *netdev,
1706                                  struct ethtool_modinfo *modinfo)
1707 {
1708         struct mlx5e_priv *priv = netdev_priv(netdev);
1709         struct mlx5_core_dev *dev = priv->mdev;
1710         int size_read = 0;
1711         u8 data[4] = {0};
1712
1713         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1714         if (size_read < 2)
1715                 return -EIO;
1716
1717         /* data[0] = identifier byte */
1718         switch (data[0]) {
1719         case MLX5_MODULE_ID_QSFP:
1720                 modinfo->type       = ETH_MODULE_SFF_8436;
1721                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1722                 break;
1723         case MLX5_MODULE_ID_QSFP_PLUS:
1724         case MLX5_MODULE_ID_QSFP28:
1725                 /* data[1] = revision id */
1726                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1727                         modinfo->type       = ETH_MODULE_SFF_8636;
1728                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1729                 } else {
1730                         modinfo->type       = ETH_MODULE_SFF_8436;
1731                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1732                 }
1733                 break;
1734         case MLX5_MODULE_ID_SFP:
1735                 modinfo->type       = ETH_MODULE_SFF_8472;
1736                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1737                 break;
1738         default:
1739                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1740                            __func__, data[0]);
1741                 return -EINVAL;
1742         }
1743
1744         return 0;
1745 }
1746
1747 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1748                                    struct ethtool_eeprom *ee,
1749                                    u8 *data)
1750 {
1751         struct mlx5e_priv *priv = netdev_priv(netdev);
1752         struct mlx5_core_dev *mdev = priv->mdev;
1753         int offset = ee->offset;
1754         int size_read;
1755         int i = 0;
1756
1757         if (!ee->len)
1758                 return -EINVAL;
1759
1760         memset(data, 0, ee->len);
1761
1762         while (i < ee->len) {
1763                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1764                                                      data + i);
1765
1766                 if (!size_read)
1767                         /* Done reading */
1768                         return 0;
1769
1770                 if (size_read < 0) {
1771                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1772                                    __func__, size_read);
1773                         return size_read;
1774                 }
1775
1776                 i += size_read;
1777                 offset += size_read;
1778         }
1779
1780         return 0;
1781 }
1782
1783 static int mlx5e_get_module_eeprom_by_page(struct net_device *netdev,
1784                                            const struct ethtool_module_eeprom *page_data,
1785                                            struct netlink_ext_ack *extack)
1786 {
1787         struct mlx5e_priv *priv = netdev_priv(netdev);
1788         struct mlx5_module_eeprom_query_params query;
1789         struct mlx5_core_dev *mdev = priv->mdev;
1790         u8 *data = page_data->data;
1791         int size_read;
1792         int i = 0;
1793
1794         if (!page_data->length)
1795                 return -EINVAL;
1796
1797         memset(data, 0, page_data->length);
1798
1799         query.offset = page_data->offset;
1800         query.i2c_address = page_data->i2c_address;
1801         query.bank = page_data->bank;
1802         query.page = page_data->page;
1803         while (i < page_data->length) {
1804                 query.size = page_data->length - i;
1805                 size_read = mlx5_query_module_eeprom_by_page(mdev, &query, data + i);
1806
1807                 /* Done reading, return how many bytes was read */
1808                 if (!size_read)
1809                         return i;
1810
1811                 if (size_read == -EINVAL)
1812                         return -EINVAL;
1813                 if (size_read < 0) {
1814                         netdev_err(priv->netdev, "%s: mlx5_query_module_eeprom_by_page failed:0x%x\n",
1815                                    __func__, size_read);
1816                         return i;
1817                 }
1818
1819                 i += size_read;
1820                 query.offset += size_read;
1821         }
1822
1823         return i;
1824 }
1825
1826 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1827                                struct ethtool_flash *flash)
1828 {
1829         struct mlx5_core_dev *mdev = priv->mdev;
1830         struct net_device *dev = priv->netdev;
1831         const struct firmware *fw;
1832         int err;
1833
1834         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1835                 return -EOPNOTSUPP;
1836
1837         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1838         if (err)
1839                 return err;
1840
1841         dev_hold(dev);
1842         rtnl_unlock();
1843
1844         err = mlx5_firmware_flash(mdev, fw, NULL);
1845         release_firmware(fw);
1846
1847         rtnl_lock();
1848         dev_put(dev);
1849         return err;
1850 }
1851
1852 static int mlx5e_flash_device(struct net_device *dev,
1853                               struct ethtool_flash *flash)
1854 {
1855         struct mlx5e_priv *priv = netdev_priv(dev);
1856
1857         return mlx5e_ethtool_flash_device(priv, flash);
1858 }
1859
1860 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1861                                      bool is_rx_cq)
1862 {
1863         struct mlx5e_priv *priv = netdev_priv(netdev);
1864         u8 cq_period_mode, current_cq_period_mode;
1865         struct mlx5e_params new_params;
1866
1867         if (enable && !MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe))
1868                 return -EOPNOTSUPP;
1869
1870         cq_period_mode = cqe_mode_to_period_mode(enable);
1871
1872         current_cq_period_mode = is_rx_cq ?
1873                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1874                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1875
1876         if (cq_period_mode == current_cq_period_mode)
1877                 return 0;
1878
1879         new_params = priv->channels.params;
1880         if (is_rx_cq)
1881                 mlx5e_set_rx_cq_mode_params(&new_params, cq_period_mode);
1882         else
1883                 mlx5e_set_tx_cq_mode_params(&new_params, cq_period_mode);
1884
1885         return mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
1886 }
1887
1888 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1889 {
1890         return set_pflag_cqe_based_moder(netdev, enable, false);
1891 }
1892
1893 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1894 {
1895         return set_pflag_cqe_based_moder(netdev, enable, true);
1896 }
1897
1898 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val, bool rx_filter)
1899 {
1900         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1901         struct mlx5e_params new_params;
1902         int err = 0;
1903
1904         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1905                 return new_val ? -EOPNOTSUPP : 0;
1906
1907         if (curr_val == new_val)
1908                 return 0;
1909
1910         if (new_val && !mlx5e_profile_feature_cap(priv->profile, PTP_RX) && rx_filter) {
1911                 netdev_err(priv->netdev,
1912                            "Profile doesn't support enabling of CQE compression while hardware time-stamping is enabled.\n");
1913                 return -EINVAL;
1914         }
1915
1916         if (priv->channels.params.packet_merge.type == MLX5E_PACKET_MERGE_SHAMPO) {
1917                 netdev_warn(priv->netdev, "Can't set CQE compression with HW-GRO, disable it first.\n");
1918                 return -EINVAL;
1919         }
1920
1921         new_params = priv->channels.params;
1922         MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1923         if (rx_filter)
1924                 new_params.ptp_rx = new_val;
1925
1926         if (new_params.ptp_rx == priv->channels.params.ptp_rx)
1927                 err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
1928         else
1929                 err = mlx5e_safe_switch_params(priv, &new_params, mlx5e_ptp_rx_manage_fs_ctx,
1930                                                &new_params.ptp_rx, true);
1931         if (err)
1932                 return err;
1933
1934         netdev_dbg(priv->netdev, "MLX5E: RxCqeCmprss was turned %s\n",
1935                    MLX5E_GET_PFLAG(&priv->channels.params,
1936                                    MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1937
1938         return 0;
1939 }
1940
1941 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1942                                      bool enable)
1943 {
1944         struct mlx5e_priv *priv = netdev_priv(netdev);
1945         struct mlx5_core_dev *mdev = priv->mdev;
1946         bool rx_filter;
1947         int err;
1948
1949         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1950                 return -EOPNOTSUPP;
1951
1952         rx_filter = priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE;
1953         err = mlx5e_modify_rx_cqe_compression_locked(priv, enable, rx_filter);
1954         if (err)
1955                 return err;
1956
1957         priv->channels.params.rx_cqe_compress_def = enable;
1958
1959         return 0;
1960 }
1961
1962 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1963 {
1964         struct mlx5e_priv *priv = netdev_priv(netdev);
1965         struct mlx5_core_dev *mdev = priv->mdev;
1966         struct mlx5e_params new_params;
1967         int err;
1968
1969         if (enable) {
1970                 /* Checking the regular RQ here; mlx5e_validate_xsk_param called
1971                  * from mlx5e_open_xsk will check for each XSK queue, and
1972                  * mlx5e_safe_switch_params will be reverted if any check fails.
1973                  */
1974                 int err = mlx5e_mpwrq_validate_regular(mdev, &priv->channels.params);
1975
1976                 if (err)
1977                         return err;
1978         } else if (priv->channels.params.packet_merge.type != MLX5E_PACKET_MERGE_NONE) {
1979                 netdev_warn(netdev, "Can't set legacy RQ with HW-GRO/LRO, disable them first\n");
1980                 return -EINVAL;
1981         }
1982
1983         new_params = priv->channels.params;
1984
1985         MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1986         mlx5e_set_rq_type(mdev, &new_params);
1987
1988         err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
1989         if (err)
1990                 return err;
1991
1992         /* update XDP supported features */
1993         mlx5e_set_xdp_feature(netdev);
1994
1995         return 0;
1996 }
1997
1998 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1999 {
2000         struct mlx5e_priv *priv = netdev_priv(netdev);
2001         struct mlx5e_channels *channels = &priv->channels;
2002         struct mlx5e_channel *c;
2003         int i;
2004
2005         if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
2006             priv->channels.params.xdp_prog)
2007                 return 0;
2008
2009         for (i = 0; i < channels->num; i++) {
2010                 c = channels->c[i];
2011                 if (enable)
2012                         __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
2013                 else
2014                         __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
2015         }
2016
2017         return 0;
2018 }
2019
2020 static int set_pflag_tx_mpwqe_common(struct net_device *netdev, u32 flag, bool enable)
2021 {
2022         struct mlx5e_priv *priv = netdev_priv(netdev);
2023         struct mlx5_core_dev *mdev = priv->mdev;
2024         struct mlx5e_params new_params;
2025
2026         if (enable && !mlx5e_tx_mpwqe_supported(mdev))
2027                 return -EOPNOTSUPP;
2028
2029         new_params = priv->channels.params;
2030
2031         MLX5E_SET_PFLAG(&new_params, flag, enable);
2032
2033         return mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
2034 }
2035
2036 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
2037 {
2038         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
2039 }
2040
2041 static int set_pflag_skb_tx_mpwqe(struct net_device *netdev, bool enable)
2042 {
2043         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_SKB_TX_MPWQE, enable);
2044 }
2045
2046 static int set_pflag_tx_port_ts(struct net_device *netdev, bool enable)
2047 {
2048         struct mlx5e_priv *priv = netdev_priv(netdev);
2049         struct mlx5_core_dev *mdev = priv->mdev;
2050         struct mlx5e_params new_params;
2051         int err;
2052
2053         if (!MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn) ||
2054             !MLX5_CAP_GEN_2(mdev, ts_cqe_metadata_size2wqe_counter))
2055                 return -EOPNOTSUPP;
2056
2057         /* Don't allow changing the PTP state if HTB offload is active, because
2058          * the numeration of the QoS SQs will change, while per-queue qdiscs are
2059          * attached.
2060          */
2061         if (mlx5e_selq_is_htb_enabled(&priv->selq)) {
2062                 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the PTP state\n",
2063                            __func__);
2064                 return -EINVAL;
2065         }
2066
2067         new_params = priv->channels.params;
2068         /* Don't allow enabling TX-port-TS if MQPRIO mode channel  offload is
2069          * active, since it defines explicitly which TC accepts the packet.
2070          * This conflicts with TX-port-TS hijacking the PTP traffic to a specific
2071          * HW TX-queue.
2072          */
2073         if (enable && new_params.mqprio.mode == TC_MQPRIO_MODE_CHANNEL) {
2074                 netdev_err(priv->netdev,
2075                            "%s: MQPRIO mode channel offload is active, cannot set the TX-port-TS\n",
2076                            __func__);
2077                 return -EINVAL;
2078         }
2079         MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_TX_PORT_TS, enable);
2080         /* No need to verify SQ stop room as
2081          * ptpsq.txqsq.stop_room <= generic_sq->stop_room, and both
2082          * has the same log_sq_size.
2083          */
2084
2085         err = mlx5e_safe_switch_params(priv, &new_params,
2086                                        mlx5e_num_channels_changed_ctx, NULL, true);
2087         if (!err)
2088                 priv->tx_ptp_opened = true;
2089
2090         return err;
2091 }
2092
2093 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
2094         { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
2095         { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
2096         { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
2097         { "rx_striding_rq",      set_pflag_rx_striding_rq },
2098         { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
2099         { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
2100         { "skb_tx_mpwqe",        set_pflag_skb_tx_mpwqe },
2101         { "tx_port_ts",          set_pflag_tx_port_ts },
2102 };
2103
2104 static int mlx5e_handle_pflag(struct net_device *netdev,
2105                               u32 wanted_flags,
2106                               enum mlx5e_priv_flag flag)
2107 {
2108         struct mlx5e_priv *priv = netdev_priv(netdev);
2109         bool enable = !!(wanted_flags & BIT(flag));
2110         u32 changes = wanted_flags ^ priv->channels.params.pflags;
2111         int err;
2112
2113         if (!(changes & BIT(flag)))
2114                 return 0;
2115
2116         err = mlx5e_priv_flags[flag].handler(netdev, enable);
2117         if (err) {
2118                 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
2119                            enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
2120                 return err;
2121         }
2122
2123         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
2124         return 0;
2125 }
2126
2127 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
2128 {
2129         struct mlx5e_priv *priv = netdev_priv(netdev);
2130         enum mlx5e_priv_flag pflag;
2131         int err;
2132
2133         mutex_lock(&priv->state_lock);
2134
2135         for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
2136                 err = mlx5e_handle_pflag(netdev, pflags, pflag);
2137                 if (err)
2138                         break;
2139         }
2140
2141         mutex_unlock(&priv->state_lock);
2142
2143         /* Need to fix some features.. */
2144         netdev_update_features(netdev);
2145
2146         return err;
2147 }
2148
2149 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
2150 {
2151         struct mlx5e_priv *priv = netdev_priv(netdev);
2152
2153         return priv->channels.params.pflags;
2154 }
2155
2156 static int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
2157                            u32 *rule_locs)
2158 {
2159         struct mlx5e_priv *priv = netdev_priv(dev);
2160
2161         /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
2162          * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
2163          * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
2164          * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
2165          */
2166         if (info->cmd == ETHTOOL_GRXRINGS) {
2167                 info->data = priv->channels.params.num_channels;
2168                 return 0;
2169         }
2170
2171         return mlx5e_ethtool_get_rxnfc(priv, info, rule_locs);
2172 }
2173
2174 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2175 {
2176         struct mlx5e_priv *priv = netdev_priv(dev);
2177
2178         return mlx5e_ethtool_set_rxnfc(priv, cmd);
2179 }
2180
2181 static int query_port_status_opcode(struct mlx5_core_dev *mdev, u32 *status_opcode)
2182 {
2183         struct mlx5_ifc_pddr_troubleshooting_page_bits *pddr_troubleshooting_page;
2184         u32 in[MLX5_ST_SZ_DW(pddr_reg)] = {};
2185         u32 out[MLX5_ST_SZ_DW(pddr_reg)];
2186         int err;
2187
2188         MLX5_SET(pddr_reg, in, local_port, 1);
2189         MLX5_SET(pddr_reg, in, page_select,
2190                  MLX5_PDDR_REG_PAGE_SELECT_TROUBLESHOOTING_INFO_PAGE);
2191
2192         pddr_troubleshooting_page = MLX5_ADDR_OF(pddr_reg, in, page_data);
2193         MLX5_SET(pddr_troubleshooting_page, pddr_troubleshooting_page,
2194                  group_opcode, MLX5_PDDR_REG_TRBLSH_GROUP_OPCODE_MONITOR);
2195         err = mlx5_core_access_reg(mdev, in, sizeof(in), out,
2196                                    sizeof(out), MLX5_REG_PDDR, 0, 0);
2197         if (err)
2198                 return err;
2199
2200         pddr_troubleshooting_page = MLX5_ADDR_OF(pddr_reg, out, page_data);
2201         *status_opcode = MLX5_GET(pddr_troubleshooting_page, pddr_troubleshooting_page,
2202                                   status_opcode);
2203         return 0;
2204 }
2205
2206 struct mlx5e_ethtool_link_ext_state_opcode_mapping {
2207         u32 status_opcode;
2208         enum ethtool_link_ext_state link_ext_state;
2209         u8 link_ext_substate;
2210 };
2211
2212 static const struct mlx5e_ethtool_link_ext_state_opcode_mapping
2213 mlx5e_link_ext_state_opcode_map[] = {
2214         /* States relating to the autonegotiation or issues therein */
2215         {2, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2216                 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED},
2217         {3, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2218                 ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED},
2219         {4, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2220                 ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED},
2221         {36, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2222                 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE},
2223         {38, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2224                 ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE},
2225         {39, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2226                 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD},
2227
2228         /* Failure during link training */
2229         {5, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2230                 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED},
2231         {6, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2232                 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT},
2233         {7, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2234                 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY},
2235         {8, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE, 0},
2236         {14, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2237                 ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT},
2238
2239         /* Logical mismatch in physical coding sublayer or forward error correction sublayer */
2240         {9, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2241                 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK},
2242         {10, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2243                 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK},
2244         {11, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2245                 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS},
2246         {12, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2247                 ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED},
2248         {13, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2249                 ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED},
2250
2251         /* Signal integrity issues */
2252         {15, ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY, 0},
2253         {17, ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
2254                 ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS},
2255         {42, ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
2256                 ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE},
2257
2258         /* No cable connected */
2259         {1024, ETHTOOL_LINK_EXT_STATE_NO_CABLE, 0},
2260
2261         /* Failure is related to cable, e.g., unsupported cable */
2262         {16, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2263                 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2264         {20, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2265                 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2266         {29, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2267                 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2268         {1025, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2269                 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2270         {1029, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2271                 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2272         {1031, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE, 0},
2273
2274         /* Failure is related to EEPROM, e.g., failure during reading or parsing the data */
2275         {1027, ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE, 0},
2276
2277         /* Failure during calibration algorithm */
2278         {23, ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE, 0},
2279
2280         /* The hardware is not able to provide the power required from cable or module */
2281         {1032, ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED, 0},
2282
2283         /* The module is overheated */
2284         {1030, ETHTOOL_LINK_EXT_STATE_OVERHEAT, 0},
2285 };
2286
2287 static void
2288 mlx5e_set_link_ext_state(struct mlx5e_ethtool_link_ext_state_opcode_mapping
2289                          link_ext_state_mapping,
2290                          struct ethtool_link_ext_state_info *link_ext_state_info)
2291 {
2292         switch (link_ext_state_mapping.link_ext_state) {
2293         case ETHTOOL_LINK_EXT_STATE_AUTONEG:
2294                 link_ext_state_info->autoneg =
2295                         link_ext_state_mapping.link_ext_substate;
2296                 break;
2297         case ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE:
2298                 link_ext_state_info->link_training =
2299                         link_ext_state_mapping.link_ext_substate;
2300                 break;
2301         case ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH:
2302                 link_ext_state_info->link_logical_mismatch =
2303                         link_ext_state_mapping.link_ext_substate;
2304                 break;
2305         case ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY:
2306                 link_ext_state_info->bad_signal_integrity =
2307                         link_ext_state_mapping.link_ext_substate;
2308                 break;
2309         case ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE:
2310                 link_ext_state_info->cable_issue =
2311                         link_ext_state_mapping.link_ext_substate;
2312                 break;
2313         default:
2314                 break;
2315         }
2316
2317         link_ext_state_info->link_ext_state = link_ext_state_mapping.link_ext_state;
2318 }
2319
2320 static int
2321 mlx5e_get_link_ext_state(struct net_device *dev,
2322                          struct ethtool_link_ext_state_info *link_ext_state_info)
2323 {
2324         struct mlx5e_ethtool_link_ext_state_opcode_mapping link_ext_state_mapping;
2325         struct mlx5e_priv *priv = netdev_priv(dev);
2326         u32 status_opcode = 0;
2327         int i;
2328
2329         /* Exit without data if the interface state is OK, since no extended data is
2330          * available in such case
2331          */
2332         if (netif_carrier_ok(dev))
2333                 return -ENODATA;
2334
2335         if (query_port_status_opcode(priv->mdev, &status_opcode) ||
2336             !status_opcode)
2337                 return -ENODATA;
2338
2339         for (i = 0; i < ARRAY_SIZE(mlx5e_link_ext_state_opcode_map); i++) {
2340                 link_ext_state_mapping = mlx5e_link_ext_state_opcode_map[i];
2341                 if (link_ext_state_mapping.status_opcode == status_opcode) {
2342                         mlx5e_set_link_ext_state(link_ext_state_mapping,
2343                                                  link_ext_state_info);
2344                         return 0;
2345                 }
2346         }
2347
2348         return -ENODATA;
2349 }
2350
2351 static void mlx5e_get_eth_phy_stats(struct net_device *netdev,
2352                                     struct ethtool_eth_phy_stats *phy_stats)
2353 {
2354         struct mlx5e_priv *priv = netdev_priv(netdev);
2355
2356         mlx5e_stats_eth_phy_get(priv, phy_stats);
2357 }
2358
2359 static void mlx5e_get_eth_mac_stats(struct net_device *netdev,
2360                                     struct ethtool_eth_mac_stats *mac_stats)
2361 {
2362         struct mlx5e_priv *priv = netdev_priv(netdev);
2363
2364         mlx5e_stats_eth_mac_get(priv, mac_stats);
2365 }
2366
2367 static void mlx5e_get_eth_ctrl_stats(struct net_device *netdev,
2368                                      struct ethtool_eth_ctrl_stats *ctrl_stats)
2369 {
2370         struct mlx5e_priv *priv = netdev_priv(netdev);
2371
2372         mlx5e_stats_eth_ctrl_get(priv, ctrl_stats);
2373 }
2374
2375 static void mlx5e_get_rmon_stats(struct net_device *netdev,
2376                                  struct ethtool_rmon_stats *rmon_stats,
2377                                  const struct ethtool_rmon_hist_range **ranges)
2378 {
2379         struct mlx5e_priv *priv = netdev_priv(netdev);
2380
2381         mlx5e_stats_rmon_get(priv, rmon_stats, ranges);
2382 }
2383
2384 const struct ethtool_ops mlx5e_ethtool_ops = {
2385         .cap_rss_ctx_supported  = true,
2386         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2387                                      ETHTOOL_COALESCE_MAX_FRAMES |
2388                                      ETHTOOL_COALESCE_USE_ADAPTIVE |
2389                                      ETHTOOL_COALESCE_USE_CQE,
2390         .get_drvinfo       = mlx5e_get_drvinfo,
2391         .get_link          = ethtool_op_get_link,
2392         .get_link_ext_state  = mlx5e_get_link_ext_state,
2393         .get_strings       = mlx5e_get_strings,
2394         .get_sset_count    = mlx5e_get_sset_count,
2395         .get_ethtool_stats = mlx5e_get_ethtool_stats,
2396         .get_ringparam     = mlx5e_get_ringparam,
2397         .set_ringparam     = mlx5e_set_ringparam,
2398         .get_channels      = mlx5e_get_channels,
2399         .set_channels      = mlx5e_set_channels,
2400         .get_coalesce      = mlx5e_get_coalesce,
2401         .set_coalesce      = mlx5e_set_coalesce,
2402         .get_link_ksettings  = mlx5e_get_link_ksettings,
2403         .set_link_ksettings  = mlx5e_set_link_ksettings,
2404         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
2405         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
2406         .get_rxfh          = mlx5e_get_rxfh,
2407         .set_rxfh          = mlx5e_set_rxfh,
2408         .get_rxnfc         = mlx5e_get_rxnfc,
2409         .set_rxnfc         = mlx5e_set_rxnfc,
2410         .get_tunable       = mlx5e_get_tunable,
2411         .set_tunable       = mlx5e_set_tunable,
2412         .get_pause_stats   = mlx5e_get_pause_stats,
2413         .get_pauseparam    = mlx5e_get_pauseparam,
2414         .set_pauseparam    = mlx5e_set_pauseparam,
2415         .get_ts_info       = mlx5e_get_ts_info,
2416         .set_phys_id       = mlx5e_set_phys_id,
2417         .get_wol           = mlx5e_get_wol,
2418         .set_wol           = mlx5e_set_wol,
2419         .get_module_info   = mlx5e_get_module_info,
2420         .get_module_eeprom = mlx5e_get_module_eeprom,
2421         .get_module_eeprom_by_page = mlx5e_get_module_eeprom_by_page,
2422         .flash_device      = mlx5e_flash_device,
2423         .get_priv_flags    = mlx5e_get_priv_flags,
2424         .set_priv_flags    = mlx5e_set_priv_flags,
2425         .self_test         = mlx5e_self_test,
2426         .get_fec_stats     = mlx5e_get_fec_stats,
2427         .get_fecparam      = mlx5e_get_fecparam,
2428         .set_fecparam      = mlx5e_set_fecparam,
2429         .get_eth_phy_stats = mlx5e_get_eth_phy_stats,
2430         .get_eth_mac_stats = mlx5e_get_eth_mac_stats,
2431         .get_eth_ctrl_stats = mlx5e_get_eth_ctrl_stats,
2432         .get_rmon_stats    = mlx5e_get_rmon_stats,
2433         .get_link_ext_stats = mlx5e_get_link_ext_stats
2434 };