clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
[linux-2.6-microblaze.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34 #include "en/port.h"
35 #include "lib/clock.h"
36
37 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
38                                struct ethtool_drvinfo *drvinfo)
39 {
40         struct mlx5_core_dev *mdev = priv->mdev;
41
42         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
43         strlcpy(drvinfo->version, DRIVER_VERSION,
44                 sizeof(drvinfo->version));
45         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
46                  "%d.%d.%04d (%.16s)",
47                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
48                  mdev->board_id);
49         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
50                 sizeof(drvinfo->bus_info));
51 }
52
53 static void mlx5e_get_drvinfo(struct net_device *dev,
54                               struct ethtool_drvinfo *drvinfo)
55 {
56         struct mlx5e_priv *priv = netdev_priv(dev);
57
58         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
59 }
60
61 struct ptys2ethtool_config {
62         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
63         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
64 };
65
66 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
67
68 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, ...)                       \
69         ({                                                              \
70                 struct ptys2ethtool_config *cfg;                        \
71                 const unsigned int modes[] = { __VA_ARGS__ };           \
72                 unsigned int i;                                         \
73                 cfg = &ptys2ethtool_table[reg_];                        \
74                 bitmap_zero(cfg->supported,                             \
75                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
76                 bitmap_zero(cfg->advertised,                            \
77                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
78                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
79                         __set_bit(modes[i], cfg->supported);            \
80                         __set_bit(modes[i], cfg->advertised);           \
81                 }                                                       \
82         })
83
84 void mlx5e_build_ptys2ethtool_map(void)
85 {
86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII,
87                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX,
89                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4,
91                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4,
93                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR,
95                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2,
97                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4,
99                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4,
101                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4,
103                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR,
105                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR,
107                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER,
109                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4,
111                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4,
113                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2,
115                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4,
117                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4,
119                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4,
121                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4,
123                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T,
125                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR,
127                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
128         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR,
129                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
130         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR,
131                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
132         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2,
133                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
134         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2,
135                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
136 }
137
138 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
139
140 struct pflag_desc {
141         char name[ETH_GSTRING_LEN];
142         mlx5e_pflag_handler handler;
143 };
144
145 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
146
147 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
148 {
149         int i, num_stats = 0;
150
151         switch (sset) {
152         case ETH_SS_STATS:
153                 for (i = 0; i < mlx5e_num_stats_grps; i++)
154                         num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
155                 return num_stats;
156         case ETH_SS_PRIV_FLAGS:
157                 return MLX5E_NUM_PFLAGS;
158         case ETH_SS_TEST:
159                 return mlx5e_self_test_num(priv);
160         /* fallthrough */
161         default:
162                 return -EOPNOTSUPP;
163         }
164 }
165
166 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
167 {
168         struct mlx5e_priv *priv = netdev_priv(dev);
169
170         return mlx5e_ethtool_get_sset_count(priv, sset);
171 }
172
173 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
174 {
175         int i, idx = 0;
176
177         for (i = 0; i < mlx5e_num_stats_grps; i++)
178                 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
179 }
180
181 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
182 {
183         int i;
184
185         switch (stringset) {
186         case ETH_SS_PRIV_FLAGS:
187                 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
188                         strcpy(data + i * ETH_GSTRING_LEN,
189                                mlx5e_priv_flags[i].name);
190                 break;
191
192         case ETH_SS_TEST:
193                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
194                         strcpy(data + i * ETH_GSTRING_LEN,
195                                mlx5e_self_tests[i]);
196                 break;
197
198         case ETH_SS_STATS:
199                 mlx5e_fill_stats_strings(priv, data);
200                 break;
201         }
202 }
203
204 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
205 {
206         struct mlx5e_priv *priv = netdev_priv(dev);
207
208         mlx5e_ethtool_get_strings(priv, stringset, data);
209 }
210
211 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
212                                      struct ethtool_stats *stats, u64 *data)
213 {
214         int i, idx = 0;
215
216         mutex_lock(&priv->state_lock);
217         mlx5e_update_stats(priv);
218         mutex_unlock(&priv->state_lock);
219
220         for (i = 0; i < mlx5e_num_stats_grps; i++)
221                 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
222 }
223
224 static void mlx5e_get_ethtool_stats(struct net_device *dev,
225                                     struct ethtool_stats *stats,
226                                     u64 *data)
227 {
228         struct mlx5e_priv *priv = netdev_priv(dev);
229
230         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
231 }
232
233 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
234                                  struct ethtool_ringparam *param)
235 {
236         param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
237         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
238         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
239         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
240 }
241
242 static void mlx5e_get_ringparam(struct net_device *dev,
243                                 struct ethtool_ringparam *param)
244 {
245         struct mlx5e_priv *priv = netdev_priv(dev);
246
247         mlx5e_ethtool_get_ringparam(priv, param);
248 }
249
250 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
251                                 struct ethtool_ringparam *param)
252 {
253         struct mlx5e_channels new_channels = {};
254         u8 log_rq_size;
255         u8 log_sq_size;
256         int err = 0;
257
258         if (param->rx_jumbo_pending) {
259                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
260                             __func__);
261                 return -EINVAL;
262         }
263         if (param->rx_mini_pending) {
264                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
265                             __func__);
266                 return -EINVAL;
267         }
268
269         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
270                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
271                             __func__, param->rx_pending,
272                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
273                 return -EINVAL;
274         }
275
276         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
277                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
278                             __func__, param->tx_pending,
279                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
280                 return -EINVAL;
281         }
282
283         log_rq_size = order_base_2(param->rx_pending);
284         log_sq_size = order_base_2(param->tx_pending);
285
286         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
287             log_sq_size == priv->channels.params.log_sq_size)
288                 return 0;
289
290         mutex_lock(&priv->state_lock);
291
292         new_channels.params = priv->channels.params;
293         new_channels.params.log_rq_mtu_frames = log_rq_size;
294         new_channels.params.log_sq_size = log_sq_size;
295
296         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
297                 priv->channels.params = new_channels.params;
298                 goto unlock;
299         }
300
301         err = mlx5e_open_channels(priv, &new_channels);
302         if (err)
303                 goto unlock;
304
305         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
306
307 unlock:
308         mutex_unlock(&priv->state_lock);
309
310         return err;
311 }
312
313 static int mlx5e_set_ringparam(struct net_device *dev,
314                                struct ethtool_ringparam *param)
315 {
316         struct mlx5e_priv *priv = netdev_priv(dev);
317
318         return mlx5e_ethtool_set_ringparam(priv, param);
319 }
320
321 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
322                                 struct ethtool_channels *ch)
323 {
324         ch->max_combined   = mlx5e_get_netdev_max_channels(priv->netdev);
325         ch->combined_count = priv->channels.params.num_channels;
326 }
327
328 static void mlx5e_get_channels(struct net_device *dev,
329                                struct ethtool_channels *ch)
330 {
331         struct mlx5e_priv *priv = netdev_priv(dev);
332
333         mlx5e_ethtool_get_channels(priv, ch);
334 }
335
336 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
337                                struct ethtool_channels *ch)
338 {
339         unsigned int count = ch->combined_count;
340         struct mlx5e_channels new_channels = {};
341         bool arfs_enabled;
342         int err = 0;
343
344         if (!count) {
345                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
346                             __func__);
347                 return -EINVAL;
348         }
349
350         if (priv->channels.params.num_channels == count)
351                 return 0;
352
353         mutex_lock(&priv->state_lock);
354
355         new_channels.params = priv->channels.params;
356         new_channels.params.num_channels = count;
357         if (!netif_is_rxfh_configured(priv->netdev))
358                 mlx5e_build_default_indir_rqt(priv->rss_params.indirection_rqt,
359                                               MLX5E_INDIR_RQT_SIZE, count);
360
361         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
362                 priv->channels.params = new_channels.params;
363                 goto out;
364         }
365
366         /* Create fresh channels with new parameters */
367         err = mlx5e_open_channels(priv, &new_channels);
368         if (err)
369                 goto out;
370
371         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
372         if (arfs_enabled)
373                 mlx5e_arfs_disable(priv);
374
375         /* Switch to new channels, set new parameters and close old ones */
376         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
377
378         if (arfs_enabled) {
379                 err = mlx5e_arfs_enable(priv);
380                 if (err)
381                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
382                                    __func__, err);
383         }
384
385 out:
386         mutex_unlock(&priv->state_lock);
387
388         return err;
389 }
390
391 static int mlx5e_set_channels(struct net_device *dev,
392                               struct ethtool_channels *ch)
393 {
394         struct mlx5e_priv *priv = netdev_priv(dev);
395
396         return mlx5e_ethtool_set_channels(priv, ch);
397 }
398
399 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
400                                struct ethtool_coalesce *coal)
401 {
402         struct net_dim_cq_moder *rx_moder, *tx_moder;
403
404         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
405                 return -EOPNOTSUPP;
406
407         rx_moder = &priv->channels.params.rx_cq_moderation;
408         coal->rx_coalesce_usecs         = rx_moder->usec;
409         coal->rx_max_coalesced_frames   = rx_moder->pkts;
410         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
411
412         tx_moder = &priv->channels.params.tx_cq_moderation;
413         coal->tx_coalesce_usecs         = tx_moder->usec;
414         coal->tx_max_coalesced_frames   = tx_moder->pkts;
415         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
416
417         return 0;
418 }
419
420 static int mlx5e_get_coalesce(struct net_device *netdev,
421                               struct ethtool_coalesce *coal)
422 {
423         struct mlx5e_priv *priv = netdev_priv(netdev);
424
425         return mlx5e_ethtool_get_coalesce(priv, coal);
426 }
427
428 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
429 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
430
431 static void
432 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
433 {
434         struct mlx5_core_dev *mdev = priv->mdev;
435         int tc;
436         int i;
437
438         for (i = 0; i < priv->channels.num; ++i) {
439                 struct mlx5e_channel *c = priv->channels.c[i];
440
441                 for (tc = 0; tc < c->num_tc; tc++) {
442                         mlx5_core_modify_cq_moderation(mdev,
443                                                 &c->sq[tc].cq.mcq,
444                                                 coal->tx_coalesce_usecs,
445                                                 coal->tx_max_coalesced_frames);
446                 }
447
448                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
449                                                coal->rx_coalesce_usecs,
450                                                coal->rx_max_coalesced_frames);
451         }
452 }
453
454 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
455                                struct ethtool_coalesce *coal)
456 {
457         struct net_dim_cq_moder *rx_moder, *tx_moder;
458         struct mlx5_core_dev *mdev = priv->mdev;
459         struct mlx5e_channels new_channels = {};
460         int err = 0;
461         bool reset;
462
463         if (!MLX5_CAP_GEN(mdev, cq_moderation))
464                 return -EOPNOTSUPP;
465
466         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
467             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
468                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
469                             __func__, MLX5E_MAX_COAL_TIME);
470                 return -ERANGE;
471         }
472
473         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
474             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
475                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
476                             __func__, MLX5E_MAX_COAL_FRAMES);
477                 return -ERANGE;
478         }
479
480         mutex_lock(&priv->state_lock);
481         new_channels.params = priv->channels.params;
482
483         rx_moder          = &new_channels.params.rx_cq_moderation;
484         rx_moder->usec    = coal->rx_coalesce_usecs;
485         rx_moder->pkts    = coal->rx_max_coalesced_frames;
486         new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
487
488         tx_moder          = &new_channels.params.tx_cq_moderation;
489         tx_moder->usec    = coal->tx_coalesce_usecs;
490         tx_moder->pkts    = coal->tx_max_coalesced_frames;
491         new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
492
493         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
494                 priv->channels.params = new_channels.params;
495                 goto out;
496         }
497         /* we are opened */
498
499         reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) ||
500                 (!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);
501
502         if (!reset) {
503                 mlx5e_set_priv_channels_coalesce(priv, coal);
504                 priv->channels.params = new_channels.params;
505                 goto out;
506         }
507
508         /* open fresh channels with new coal parameters */
509         err = mlx5e_open_channels(priv, &new_channels);
510         if (err)
511                 goto out;
512
513         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
514
515 out:
516         mutex_unlock(&priv->state_lock);
517         return err;
518 }
519
520 static int mlx5e_set_coalesce(struct net_device *netdev,
521                               struct ethtool_coalesce *coal)
522 {
523         struct mlx5e_priv *priv    = netdev_priv(netdev);
524
525         return mlx5e_ethtool_set_coalesce(priv, coal);
526 }
527
528 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
529                                         u32 eth_proto_cap)
530 {
531         unsigned long proto_cap = eth_proto_cap;
532         int proto;
533
534         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
535                 bitmap_or(supported_modes, supported_modes,
536                           ptys2ethtool_table[proto].supported,
537                           __ETHTOOL_LINK_MODE_MASK_NBITS);
538 }
539
540 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
541                                     u32 eth_proto_cap)
542 {
543         unsigned long proto_cap = eth_proto_cap;
544         int proto;
545
546         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
547                 bitmap_or(advertising_modes, advertising_modes,
548                           ptys2ethtool_table[proto].advertised,
549                           __ETHTOOL_LINK_MODE_MASK_NBITS);
550 }
551
552 static const u32 pplm_fec_2_ethtool[] = {
553         [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
554         [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
555         [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
556 };
557
558 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
559 {
560         int mode = 0;
561
562         if (!fec_mode)
563                 return ETHTOOL_FEC_AUTO;
564
565         mode = find_first_bit(&fec_mode, size);
566
567         if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
568                 return pplm_fec_2_ethtool[mode];
569
570         return 0;
571 }
572
573 /* we use ETHTOOL_FEC_* offset and apply it to ETHTOOL_LINK_MODE_FEC_*_BIT */
574 static u32 ethtool_fec2ethtool_caps(u_long ethtool_fec_code)
575 {
576         u32 offset;
577
578         offset = find_first_bit(&ethtool_fec_code, sizeof(u32));
579         offset -= ETHTOOL_FEC_OFF_BIT;
580         offset += ETHTOOL_LINK_MODE_FEC_NONE_BIT;
581
582         return offset;
583 }
584
585 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
586                                         struct ethtool_link_ksettings *link_ksettings)
587 {
588         u_long fec_caps = 0;
589         u32 active_fec = 0;
590         u32 offset;
591         u32 bitn;
592         int err;
593
594         err = mlx5e_get_fec_caps(dev, (u8 *)&fec_caps);
595         if (err)
596                 return (err == -EOPNOTSUPP) ? 0 : err;
597
598         err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
599         if (err)
600                 return err;
601
602         for_each_set_bit(bitn, &fec_caps, ARRAY_SIZE(pplm_fec_2_ethtool)) {
603                 u_long ethtool_bitmask = pplm_fec_2_ethtool[bitn];
604
605                 offset = ethtool_fec2ethtool_caps(ethtool_bitmask);
606                 __set_bit(offset, link_ksettings->link_modes.supported);
607         }
608
609         active_fec = pplm2ethtool_fec(active_fec, sizeof(u32) * BITS_PER_BYTE);
610         offset = ethtool_fec2ethtool_caps(active_fec);
611         __set_bit(offset, link_ksettings->link_modes.advertising);
612
613         return 0;
614 }
615
616 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
617                                                    u32 eth_proto_cap,
618                                                    u8 connector_type)
619 {
620         if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
621                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
622                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
623                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
624                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
625                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
626                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
627                         ethtool_link_ksettings_add_link_mode(link_ksettings,
628                                                              supported,
629                                                              FIBRE);
630                         ethtool_link_ksettings_add_link_mode(link_ksettings,
631                                                              advertising,
632                                                              FIBRE);
633                 }
634
635                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
636                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
637                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
638                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
639                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
640                         ethtool_link_ksettings_add_link_mode(link_ksettings,
641                                                              supported,
642                                                              Backplane);
643                         ethtool_link_ksettings_add_link_mode(link_ksettings,
644                                                              advertising,
645                                                              Backplane);
646                 }
647                 return;
648         }
649
650         switch (connector_type) {
651         case MLX5E_PORT_TP:
652                 ethtool_link_ksettings_add_link_mode(link_ksettings,
653                                                      supported, TP);
654                 ethtool_link_ksettings_add_link_mode(link_ksettings,
655                                                      advertising, TP);
656                 break;
657         case MLX5E_PORT_AUI:
658                 ethtool_link_ksettings_add_link_mode(link_ksettings,
659                                                      supported, AUI);
660                 ethtool_link_ksettings_add_link_mode(link_ksettings,
661                                                      advertising, AUI);
662                 break;
663         case MLX5E_PORT_BNC:
664                 ethtool_link_ksettings_add_link_mode(link_ksettings,
665                                                      supported, BNC);
666                 ethtool_link_ksettings_add_link_mode(link_ksettings,
667                                                      advertising, BNC);
668                 break;
669         case MLX5E_PORT_MII:
670                 ethtool_link_ksettings_add_link_mode(link_ksettings,
671                                                      supported, MII);
672                 ethtool_link_ksettings_add_link_mode(link_ksettings,
673                                                      advertising, MII);
674                 break;
675         case MLX5E_PORT_FIBRE:
676                 ethtool_link_ksettings_add_link_mode(link_ksettings,
677                                                      supported, FIBRE);
678                 ethtool_link_ksettings_add_link_mode(link_ksettings,
679                                                      advertising, FIBRE);
680                 break;
681         case MLX5E_PORT_DA:
682                 ethtool_link_ksettings_add_link_mode(link_ksettings,
683                                                      supported, Backplane);
684                 ethtool_link_ksettings_add_link_mode(link_ksettings,
685                                                      advertising, Backplane);
686                 break;
687         case MLX5E_PORT_NONE:
688         case MLX5E_PORT_OTHER:
689         default:
690                 break;
691         }
692 }
693
694 static void get_speed_duplex(struct net_device *netdev,
695                              u32 eth_proto_oper,
696                              struct ethtool_link_ksettings *link_ksettings)
697 {
698         u32 speed = SPEED_UNKNOWN;
699         u8 duplex = DUPLEX_UNKNOWN;
700
701         if (!netif_carrier_ok(netdev))
702                 goto out;
703
704         speed = mlx5e_port_ptys2speed(eth_proto_oper);
705         if (!speed) {
706                 speed = SPEED_UNKNOWN;
707                 goto out;
708         }
709
710         duplex = DUPLEX_FULL;
711
712 out:
713         link_ksettings->base.speed = speed;
714         link_ksettings->base.duplex = duplex;
715 }
716
717 static void get_supported(u32 eth_proto_cap,
718                           struct ethtool_link_ksettings *link_ksettings)
719 {
720         unsigned long *supported = link_ksettings->link_modes.supported;
721
722         ptys2ethtool_supported_link(supported, eth_proto_cap);
723         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
724 }
725
726 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
727                             u8 rx_pause,
728                             struct ethtool_link_ksettings *link_ksettings)
729 {
730         unsigned long *advertising = link_ksettings->link_modes.advertising;
731
732         ptys2ethtool_adver_link(advertising, eth_proto_cap);
733         if (rx_pause)
734                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
735         if (tx_pause ^ rx_pause)
736                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
737 }
738
739 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
740                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
741                 [MLX5E_PORT_NONE]               = PORT_NONE,
742                 [MLX5E_PORT_TP]                 = PORT_TP,
743                 [MLX5E_PORT_AUI]                = PORT_AUI,
744                 [MLX5E_PORT_BNC]                = PORT_BNC,
745                 [MLX5E_PORT_MII]                = PORT_MII,
746                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
747                 [MLX5E_PORT_DA]                 = PORT_DA,
748                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
749         };
750
751 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
752 {
753         if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
754                 return ptys2connector_type[connector_type];
755
756         if (eth_proto &
757             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
758              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
759              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
760              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
761                 return PORT_FIBRE;
762         }
763
764         if (eth_proto &
765             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
766              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
767              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
768                 return PORT_DA;
769         }
770
771         if (eth_proto &
772             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
773              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
774              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
775              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
776                 return PORT_NONE;
777         }
778
779         return PORT_OTHER;
780 }
781
782 static void get_lp_advertising(u32 eth_proto_lp,
783                                struct ethtool_link_ksettings *link_ksettings)
784 {
785         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
786
787         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
788 }
789
790 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
791                                      struct ethtool_link_ksettings *link_ksettings)
792 {
793         struct mlx5_core_dev *mdev = priv->mdev;
794         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
795         u32 rx_pause = 0;
796         u32 tx_pause = 0;
797         u32 eth_proto_cap;
798         u32 eth_proto_admin;
799         u32 eth_proto_lp;
800         u32 eth_proto_oper;
801         u8 an_disable_admin;
802         u8 an_status;
803         u8 connector_type;
804         int err;
805
806         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
807         if (err) {
808                 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
809                            __func__, err);
810                 goto err_query_regs;
811         }
812
813         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
814         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
815         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
816         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
817         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
818         an_status        = MLX5_GET(ptys_reg, out, an_status);
819         connector_type   = MLX5_GET(ptys_reg, out, connector_type);
820
821         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
822
823         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
824         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
825
826         get_supported(eth_proto_cap, link_ksettings);
827         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
828         get_speed_duplex(priv->netdev, eth_proto_oper, link_ksettings);
829
830         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
831
832         link_ksettings->base.port = get_connector_port(eth_proto_oper,
833                                                        connector_type);
834         ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
835                                                connector_type);
836         get_lp_advertising(eth_proto_lp, link_ksettings);
837
838         if (an_status == MLX5_AN_COMPLETE)
839                 ethtool_link_ksettings_add_link_mode(link_ksettings,
840                                                      lp_advertising, Autoneg);
841
842         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
843                                                           AUTONEG_ENABLE;
844         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
845                                              Autoneg);
846
847         if (get_fec_supported_advertised(mdev, link_ksettings))
848                 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
849                            __func__, err);
850
851         if (!an_disable_admin)
852                 ethtool_link_ksettings_add_link_mode(link_ksettings,
853                                                      advertising, Autoneg);
854
855 err_query_regs:
856         return err;
857 }
858
859 static int mlx5e_get_link_ksettings(struct net_device *netdev,
860                                     struct ethtool_link_ksettings *link_ksettings)
861 {
862         struct mlx5e_priv *priv = netdev_priv(netdev);
863
864         return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
865 }
866
867 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
868 {
869         u32 i, ptys_modes = 0;
870
871         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
872                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
873                                       link_modes,
874                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
875                         ptys_modes |= MLX5E_PROT_MASK(i);
876         }
877
878         return ptys_modes;
879 }
880
881 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
882                                      const struct ethtool_link_ksettings *link_ksettings)
883 {
884         struct mlx5_core_dev *mdev = priv->mdev;
885         u32 eth_proto_cap, eth_proto_admin;
886         bool an_changes = false;
887         u8 an_disable_admin;
888         u8 an_disable_cap;
889         bool an_disable;
890         u32 link_modes;
891         u8 an_status;
892         u32 speed;
893         int err;
894
895         speed = link_ksettings->base.speed;
896
897         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
898                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
899                 mlx5e_port_speed2linkmodes(speed);
900
901         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
902         if (err) {
903                 netdev_err(priv->netdev, "%s: query port eth proto cap failed: %d\n",
904                            __func__, err);
905                 goto out;
906         }
907
908         link_modes = link_modes & eth_proto_cap;
909         if (!link_modes) {
910                 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
911                            __func__);
912                 err = -EINVAL;
913                 goto out;
914         }
915
916         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
917         if (err) {
918                 netdev_err(priv->netdev, "%s: query port eth proto admin failed: %d\n",
919                            __func__, err);
920                 goto out;
921         }
922
923         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
924                                 &an_disable_cap, &an_disable_admin);
925
926         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
927         an_changes = ((!an_disable && an_disable_admin) ||
928                       (an_disable && !an_disable_admin));
929
930         if (!an_changes && link_modes == eth_proto_admin)
931                 goto out;
932
933         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
934         mlx5_toggle_port_link(mdev);
935
936 out:
937         return err;
938 }
939
940 static int mlx5e_set_link_ksettings(struct net_device *netdev,
941                                     const struct ethtool_link_ksettings *link_ksettings)
942 {
943         struct mlx5e_priv *priv = netdev_priv(netdev);
944
945         return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
946 }
947
948 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
949 {
950         return sizeof(priv->rss_params.toeplitz_hash_key);
951 }
952
953 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
954 {
955         struct mlx5e_priv *priv = netdev_priv(netdev);
956
957         return mlx5e_ethtool_get_rxfh_key_size(priv);
958 }
959
960 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
961 {
962         return MLX5E_INDIR_RQT_SIZE;
963 }
964
965 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
966 {
967         struct mlx5e_priv *priv = netdev_priv(netdev);
968
969         return mlx5e_ethtool_get_rxfh_indir_size(priv);
970 }
971
972 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
973                           u8 *hfunc)
974 {
975         struct mlx5e_priv *priv = netdev_priv(netdev);
976         struct mlx5e_rss_params *rss = &priv->rss_params;
977
978         if (indir)
979                 memcpy(indir, rss->indirection_rqt,
980                        sizeof(rss->indirection_rqt));
981
982         if (key)
983                 memcpy(key, rss->toeplitz_hash_key,
984                        sizeof(rss->toeplitz_hash_key));
985
986         if (hfunc)
987                 *hfunc = rss->hfunc;
988
989         return 0;
990 }
991
992 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
993                           const u8 *key, const u8 hfunc)
994 {
995         struct mlx5e_priv *priv = netdev_priv(dev);
996         struct mlx5e_rss_params *rss = &priv->rss_params;
997         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
998         bool hash_changed = false;
999         void *in;
1000
1001         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1002             (hfunc != ETH_RSS_HASH_XOR) &&
1003             (hfunc != ETH_RSS_HASH_TOP))
1004                 return -EINVAL;
1005
1006         in = kvzalloc(inlen, GFP_KERNEL);
1007         if (!in)
1008                 return -ENOMEM;
1009
1010         mutex_lock(&priv->state_lock);
1011
1012         if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
1013                 rss->hfunc = hfunc;
1014                 hash_changed = true;
1015         }
1016
1017         if (indir) {
1018                 memcpy(rss->indirection_rqt, indir,
1019                        sizeof(rss->indirection_rqt));
1020
1021                 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1022                         u32 rqtn = priv->indir_rqt.rqtn;
1023                         struct mlx5e_redirect_rqt_param rrp = {
1024                                 .is_rss = true,
1025                                 {
1026                                         .rss = {
1027                                                 .hfunc = rss->hfunc,
1028                                                 .channels  = &priv->channels,
1029                                         },
1030                                 },
1031                         };
1032
1033                         mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1034                 }
1035         }
1036
1037         if (key) {
1038                 memcpy(rss->toeplitz_hash_key, key,
1039                        sizeof(rss->toeplitz_hash_key));
1040                 hash_changed = hash_changed || rss->hfunc == ETH_RSS_HASH_TOP;
1041         }
1042
1043         if (hash_changed)
1044                 mlx5e_modify_tirs_hash(priv, in, inlen);
1045
1046         mutex_unlock(&priv->state_lock);
1047
1048         kvfree(in);
1049
1050         return 0;
1051 }
1052
1053 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
1054 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
1055 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
1056 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
1057 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1058         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1059               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1060
1061 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1062                                          u16 *pfc_prevention_tout)
1063 {
1064         struct mlx5e_priv *priv    = netdev_priv(netdev);
1065         struct mlx5_core_dev *mdev = priv->mdev;
1066
1067         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1068             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1069                 return -EOPNOTSUPP;
1070
1071         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1072 }
1073
1074 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1075                                          u16 pfc_preven)
1076 {
1077         struct mlx5e_priv *priv = netdev_priv(netdev);
1078         struct mlx5_core_dev *mdev = priv->mdev;
1079         u16 critical_tout;
1080         u16 minor;
1081
1082         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1083             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1084                 return -EOPNOTSUPP;
1085
1086         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1087                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1088                         pfc_preven;
1089
1090         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1091             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1092              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1093                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1094                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1095                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1096                 return -EINVAL;
1097         }
1098
1099         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1100         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1101                                              minor);
1102 }
1103
1104 static int mlx5e_get_tunable(struct net_device *dev,
1105                              const struct ethtool_tunable *tuna,
1106                              void *data)
1107 {
1108         int err;
1109
1110         switch (tuna->id) {
1111         case ETHTOOL_PFC_PREVENTION_TOUT:
1112                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1113                 break;
1114         default:
1115                 err = -EINVAL;
1116                 break;
1117         }
1118
1119         return err;
1120 }
1121
1122 static int mlx5e_set_tunable(struct net_device *dev,
1123                              const struct ethtool_tunable *tuna,
1124                              const void *data)
1125 {
1126         struct mlx5e_priv *priv = netdev_priv(dev);
1127         int err;
1128
1129         mutex_lock(&priv->state_lock);
1130
1131         switch (tuna->id) {
1132         case ETHTOOL_PFC_PREVENTION_TOUT:
1133                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1134                 break;
1135         default:
1136                 err = -EINVAL;
1137                 break;
1138         }
1139
1140         mutex_unlock(&priv->state_lock);
1141         return err;
1142 }
1143
1144 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1145                                   struct ethtool_pauseparam *pauseparam)
1146 {
1147         struct mlx5_core_dev *mdev = priv->mdev;
1148         int err;
1149
1150         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1151                                     &pauseparam->tx_pause);
1152         if (err) {
1153                 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1154                            __func__, err);
1155         }
1156 }
1157
1158 static void mlx5e_get_pauseparam(struct net_device *netdev,
1159                                  struct ethtool_pauseparam *pauseparam)
1160 {
1161         struct mlx5e_priv *priv = netdev_priv(netdev);
1162
1163         mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1164 }
1165
1166 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1167                                  struct ethtool_pauseparam *pauseparam)
1168 {
1169         struct mlx5_core_dev *mdev = priv->mdev;
1170         int err;
1171
1172         if (pauseparam->autoneg)
1173                 return -EINVAL;
1174
1175         err = mlx5_set_port_pause(mdev,
1176                                   pauseparam->rx_pause ? 1 : 0,
1177                                   pauseparam->tx_pause ? 1 : 0);
1178         if (err) {
1179                 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1180                            __func__, err);
1181         }
1182
1183         return err;
1184 }
1185
1186 static int mlx5e_set_pauseparam(struct net_device *netdev,
1187                                 struct ethtool_pauseparam *pauseparam)
1188 {
1189         struct mlx5e_priv *priv = netdev_priv(netdev);
1190
1191         return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1192 }
1193
1194 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1195                               struct ethtool_ts_info *info)
1196 {
1197         struct mlx5_core_dev *mdev = priv->mdev;
1198
1199         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1200
1201         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1202             info->phc_index == -1)
1203                 return 0;
1204
1205         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1206                                 SOF_TIMESTAMPING_RX_HARDWARE |
1207                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1208
1209         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1210                          BIT(HWTSTAMP_TX_ON);
1211
1212         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1213                            BIT(HWTSTAMP_FILTER_ALL);
1214
1215         return 0;
1216 }
1217
1218 static int mlx5e_get_ts_info(struct net_device *dev,
1219                              struct ethtool_ts_info *info)
1220 {
1221         struct mlx5e_priv *priv = netdev_priv(dev);
1222
1223         return mlx5e_ethtool_get_ts_info(priv, info);
1224 }
1225
1226 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1227 {
1228         __u32 ret = 0;
1229
1230         if (MLX5_CAP_GEN(mdev, wol_g))
1231                 ret |= WAKE_MAGIC;
1232
1233         if (MLX5_CAP_GEN(mdev, wol_s))
1234                 ret |= WAKE_MAGICSECURE;
1235
1236         if (MLX5_CAP_GEN(mdev, wol_a))
1237                 ret |= WAKE_ARP;
1238
1239         if (MLX5_CAP_GEN(mdev, wol_b))
1240                 ret |= WAKE_BCAST;
1241
1242         if (MLX5_CAP_GEN(mdev, wol_m))
1243                 ret |= WAKE_MCAST;
1244
1245         if (MLX5_CAP_GEN(mdev, wol_u))
1246                 ret |= WAKE_UCAST;
1247
1248         if (MLX5_CAP_GEN(mdev, wol_p))
1249                 ret |= WAKE_PHY;
1250
1251         return ret;
1252 }
1253
1254 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1255 {
1256         __u32 ret = 0;
1257
1258         if (mode & MLX5_WOL_MAGIC)
1259                 ret |= WAKE_MAGIC;
1260
1261         if (mode & MLX5_WOL_SECURED_MAGIC)
1262                 ret |= WAKE_MAGICSECURE;
1263
1264         if (mode & MLX5_WOL_ARP)
1265                 ret |= WAKE_ARP;
1266
1267         if (mode & MLX5_WOL_BROADCAST)
1268                 ret |= WAKE_BCAST;
1269
1270         if (mode & MLX5_WOL_MULTICAST)
1271                 ret |= WAKE_MCAST;
1272
1273         if (mode & MLX5_WOL_UNICAST)
1274                 ret |= WAKE_UCAST;
1275
1276         if (mode & MLX5_WOL_PHY_ACTIVITY)
1277                 ret |= WAKE_PHY;
1278
1279         return ret;
1280 }
1281
1282 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1283 {
1284         u8 ret = 0;
1285
1286         if (mode & WAKE_MAGIC)
1287                 ret |= MLX5_WOL_MAGIC;
1288
1289         if (mode & WAKE_MAGICSECURE)
1290                 ret |= MLX5_WOL_SECURED_MAGIC;
1291
1292         if (mode & WAKE_ARP)
1293                 ret |= MLX5_WOL_ARP;
1294
1295         if (mode & WAKE_BCAST)
1296                 ret |= MLX5_WOL_BROADCAST;
1297
1298         if (mode & WAKE_MCAST)
1299                 ret |= MLX5_WOL_MULTICAST;
1300
1301         if (mode & WAKE_UCAST)
1302                 ret |= MLX5_WOL_UNICAST;
1303
1304         if (mode & WAKE_PHY)
1305                 ret |= MLX5_WOL_PHY_ACTIVITY;
1306
1307         return ret;
1308 }
1309
1310 static void mlx5e_get_wol(struct net_device *netdev,
1311                           struct ethtool_wolinfo *wol)
1312 {
1313         struct mlx5e_priv *priv = netdev_priv(netdev);
1314         struct mlx5_core_dev *mdev = priv->mdev;
1315         u8 mlx5_wol_mode;
1316         int err;
1317
1318         memset(wol, 0, sizeof(*wol));
1319
1320         wol->supported = mlx5e_get_wol_supported(mdev);
1321         if (!wol->supported)
1322                 return;
1323
1324         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1325         if (err)
1326                 return;
1327
1328         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1329 }
1330
1331 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1332 {
1333         struct mlx5e_priv *priv = netdev_priv(netdev);
1334         struct mlx5_core_dev *mdev = priv->mdev;
1335         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1336         u32 mlx5_wol_mode;
1337
1338         if (!wol_supported)
1339                 return -EOPNOTSUPP;
1340
1341         if (wol->wolopts & ~wol_supported)
1342                 return -EINVAL;
1343
1344         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1345
1346         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1347 }
1348
1349 static int mlx5e_get_fecparam(struct net_device *netdev,
1350                               struct ethtool_fecparam *fecparam)
1351 {
1352         struct mlx5e_priv *priv = netdev_priv(netdev);
1353         struct mlx5_core_dev *mdev = priv->mdev;
1354         u8 fec_configured = 0;
1355         u32 fec_active = 0;
1356         int err;
1357
1358         err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1359
1360         if (err)
1361                 return err;
1362
1363         fecparam->active_fec = pplm2ethtool_fec((u_long)fec_active,
1364                                                 sizeof(u32) * BITS_PER_BYTE);
1365
1366         if (!fecparam->active_fec)
1367                 return -EOPNOTSUPP;
1368
1369         fecparam->fec = pplm2ethtool_fec((u_long)fec_configured,
1370                                          sizeof(u8) * BITS_PER_BYTE);
1371
1372         return 0;
1373 }
1374
1375 static int mlx5e_set_fecparam(struct net_device *netdev,
1376                               struct ethtool_fecparam *fecparam)
1377 {
1378         struct mlx5e_priv *priv = netdev_priv(netdev);
1379         struct mlx5_core_dev *mdev = priv->mdev;
1380         u8 fec_policy = 0;
1381         int mode;
1382         int err;
1383
1384         for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1385                 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1386                         continue;
1387                 fec_policy |= (1 << mode);
1388                 break;
1389         }
1390
1391         err = mlx5e_set_fec_mode(mdev, fec_policy);
1392
1393         if (err)
1394                 return err;
1395
1396         mlx5_toggle_port_link(mdev);
1397
1398         return 0;
1399 }
1400
1401 static u32 mlx5e_get_msglevel(struct net_device *dev)
1402 {
1403         return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1404 }
1405
1406 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1407 {
1408         ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1409 }
1410
1411 static int mlx5e_set_phys_id(struct net_device *dev,
1412                              enum ethtool_phys_id_state state)
1413 {
1414         struct mlx5e_priv *priv = netdev_priv(dev);
1415         struct mlx5_core_dev *mdev = priv->mdev;
1416         u16 beacon_duration;
1417
1418         if (!MLX5_CAP_GEN(mdev, beacon_led))
1419                 return -EOPNOTSUPP;
1420
1421         switch (state) {
1422         case ETHTOOL_ID_ACTIVE:
1423                 beacon_duration = MLX5_BEACON_DURATION_INF;
1424                 break;
1425         case ETHTOOL_ID_INACTIVE:
1426                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1427                 break;
1428         default:
1429                 return -EOPNOTSUPP;
1430         }
1431
1432         return mlx5_set_port_beacon(mdev, beacon_duration);
1433 }
1434
1435 static int mlx5e_get_module_info(struct net_device *netdev,
1436                                  struct ethtool_modinfo *modinfo)
1437 {
1438         struct mlx5e_priv *priv = netdev_priv(netdev);
1439         struct mlx5_core_dev *dev = priv->mdev;
1440         int size_read = 0;
1441         u8 data[4];
1442
1443         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1444         if (size_read < 2)
1445                 return -EIO;
1446
1447         /* data[0] = identifier byte */
1448         switch (data[0]) {
1449         case MLX5_MODULE_ID_QSFP:
1450                 modinfo->type       = ETH_MODULE_SFF_8436;
1451                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1452                 break;
1453         case MLX5_MODULE_ID_QSFP_PLUS:
1454         case MLX5_MODULE_ID_QSFP28:
1455                 /* data[1] = revision id */
1456                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1457                         modinfo->type       = ETH_MODULE_SFF_8636;
1458                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1459                 } else {
1460                         modinfo->type       = ETH_MODULE_SFF_8436;
1461                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1462                 }
1463                 break;
1464         case MLX5_MODULE_ID_SFP:
1465                 modinfo->type       = ETH_MODULE_SFF_8472;
1466                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1467                 break;
1468         default:
1469                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1470                            __func__, data[0]);
1471                 return -EINVAL;
1472         }
1473
1474         return 0;
1475 }
1476
1477 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1478                                    struct ethtool_eeprom *ee,
1479                                    u8 *data)
1480 {
1481         struct mlx5e_priv *priv = netdev_priv(netdev);
1482         struct mlx5_core_dev *mdev = priv->mdev;
1483         int offset = ee->offset;
1484         int size_read;
1485         int i = 0;
1486
1487         if (!ee->len)
1488                 return -EINVAL;
1489
1490         memset(data, 0, ee->len);
1491
1492         while (i < ee->len) {
1493                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1494                                                      data + i);
1495
1496                 if (!size_read)
1497                         /* Done reading */
1498                         return 0;
1499
1500                 if (size_read < 0) {
1501                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1502                                    __func__, size_read);
1503                         return 0;
1504                 }
1505
1506                 i += size_read;
1507                 offset += size_read;
1508         }
1509
1510         return 0;
1511 }
1512
1513 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1514                                      bool is_rx_cq)
1515 {
1516         struct mlx5e_priv *priv = netdev_priv(netdev);
1517         struct mlx5_core_dev *mdev = priv->mdev;
1518         struct mlx5e_channels new_channels = {};
1519         bool mode_changed;
1520         u8 cq_period_mode, current_cq_period_mode;
1521         int err = 0;
1522
1523         cq_period_mode = enable ?
1524                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1525                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1526         current_cq_period_mode = is_rx_cq ?
1527                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1528                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1529         mode_changed = cq_period_mode != current_cq_period_mode;
1530
1531         if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1532             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1533                 return -EOPNOTSUPP;
1534
1535         if (!mode_changed)
1536                 return 0;
1537
1538         new_channels.params = priv->channels.params;
1539         if (is_rx_cq)
1540                 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1541         else
1542                 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1543
1544         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1545                 priv->channels.params = new_channels.params;
1546                 return 0;
1547         }
1548
1549         err = mlx5e_open_channels(priv, &new_channels);
1550         if (err)
1551                 return err;
1552
1553         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1554         return 0;
1555 }
1556
1557 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1558 {
1559         return set_pflag_cqe_based_moder(netdev, enable, false);
1560 }
1561
1562 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1563 {
1564         return set_pflag_cqe_based_moder(netdev, enable, true);
1565 }
1566
1567 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1568 {
1569         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1570         struct mlx5e_channels new_channels = {};
1571         int err = 0;
1572
1573         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1574                 return new_val ? -EOPNOTSUPP : 0;
1575
1576         if (curr_val == new_val)
1577                 return 0;
1578
1579         new_channels.params = priv->channels.params;
1580         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1581
1582         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1583                 priv->channels.params = new_channels.params;
1584                 return 0;
1585         }
1586
1587         err = mlx5e_open_channels(priv, &new_channels);
1588         if (err)
1589                 return err;
1590
1591         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1592         mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1593                   MLX5E_GET_PFLAG(&priv->channels.params,
1594                                   MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1595
1596         return 0;
1597 }
1598
1599 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1600                                      bool enable)
1601 {
1602         struct mlx5e_priv *priv = netdev_priv(netdev);
1603         struct mlx5_core_dev *mdev = priv->mdev;
1604
1605         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1606                 return -EOPNOTSUPP;
1607
1608         if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1609                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1610                 return -EINVAL;
1611         }
1612
1613         mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1614         priv->channels.params.rx_cqe_compress_def = enable;
1615
1616         return 0;
1617 }
1618
1619 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1620 {
1621         struct mlx5e_priv *priv = netdev_priv(netdev);
1622         struct mlx5_core_dev *mdev = priv->mdev;
1623         struct mlx5e_channels new_channels = {};
1624         int err;
1625
1626         if (enable) {
1627                 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1628                         return -EOPNOTSUPP;
1629                 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1630                         return -EINVAL;
1631         } else if (priv->channels.params.lro_en) {
1632                 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1633                 return -EINVAL;
1634         }
1635
1636         new_channels.params = priv->channels.params;
1637
1638         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1639         mlx5e_set_rq_type(mdev, &new_channels.params);
1640
1641         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1642                 priv->channels.params = new_channels.params;
1643                 return 0;
1644         }
1645
1646         err = mlx5e_open_channels(priv, &new_channels);
1647         if (err)
1648                 return err;
1649
1650         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1651         return 0;
1652 }
1653
1654 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1655 {
1656         struct mlx5e_priv *priv = netdev_priv(netdev);
1657         struct mlx5e_channels *channels = &priv->channels;
1658         struct mlx5e_channel *c;
1659         int i;
1660
1661         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
1662                 return 0;
1663
1664         for (i = 0; i < channels->num; i++) {
1665                 c = channels->c[i];
1666                 if (enable)
1667                         __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1668                 else
1669                         __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1670         }
1671
1672         return 0;
1673 }
1674
1675 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
1676 {
1677         struct mlx5e_priv *priv = netdev_priv(netdev);
1678         struct mlx5_core_dev *mdev = priv->mdev;
1679         struct mlx5e_channels new_channels = {};
1680         int err;
1681
1682         if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
1683                 return -EOPNOTSUPP;
1684
1685         new_channels.params = priv->channels.params;
1686
1687         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
1688
1689         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1690                 priv->channels.params = new_channels.params;
1691                 return 0;
1692         }
1693
1694         err = mlx5e_open_channels(priv, &new_channels);
1695         if (err)
1696                 return err;
1697
1698         mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1699         return 0;
1700 }
1701
1702 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
1703         { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
1704         { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
1705         { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
1706         { "rx_striding_rq",      set_pflag_rx_striding_rq },
1707         { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
1708         { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
1709 };
1710
1711 static int mlx5e_handle_pflag(struct net_device *netdev,
1712                               u32 wanted_flags,
1713                               enum mlx5e_priv_flag flag)
1714 {
1715         struct mlx5e_priv *priv = netdev_priv(netdev);
1716         bool enable = !!(wanted_flags & BIT(flag));
1717         u32 changes = wanted_flags ^ priv->channels.params.pflags;
1718         int err;
1719
1720         if (!(changes & BIT(flag)))
1721                 return 0;
1722
1723         err = mlx5e_priv_flags[flag].handler(netdev, enable);
1724         if (err) {
1725                 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
1726                            enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
1727                 return err;
1728         }
1729
1730         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1731         return 0;
1732 }
1733
1734 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1735 {
1736         struct mlx5e_priv *priv = netdev_priv(netdev);
1737         enum mlx5e_priv_flag pflag;
1738         int err;
1739
1740         mutex_lock(&priv->state_lock);
1741
1742         for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
1743                 err = mlx5e_handle_pflag(netdev, pflags, pflag);
1744                 if (err)
1745                         break;
1746         }
1747
1748         mutex_unlock(&priv->state_lock);
1749
1750         /* Need to fix some features.. */
1751         netdev_update_features(netdev);
1752
1753         return err;
1754 }
1755
1756 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1757 {
1758         struct mlx5e_priv *priv = netdev_priv(netdev);
1759
1760         return priv->channels.params.pflags;
1761 }
1762
1763 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1764                                struct ethtool_flash *flash)
1765 {
1766         struct mlx5_core_dev *mdev = priv->mdev;
1767         struct net_device *dev = priv->netdev;
1768         const struct firmware *fw;
1769         int err;
1770
1771         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1772                 return -EOPNOTSUPP;
1773
1774         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1775         if (err)
1776                 return err;
1777
1778         dev_hold(dev);
1779         rtnl_unlock();
1780
1781         err = mlx5_firmware_flash(mdev, fw);
1782         release_firmware(fw);
1783
1784         rtnl_lock();
1785         dev_put(dev);
1786         return err;
1787 }
1788
1789 static int mlx5e_flash_device(struct net_device *dev,
1790                               struct ethtool_flash *flash)
1791 {
1792         struct mlx5e_priv *priv = netdev_priv(dev);
1793
1794         return mlx5e_ethtool_flash_device(priv, flash);
1795 }
1796
1797 const struct ethtool_ops mlx5e_ethtool_ops = {
1798         .get_drvinfo       = mlx5e_get_drvinfo,
1799         .get_link          = ethtool_op_get_link,
1800         .get_strings       = mlx5e_get_strings,
1801         .get_sset_count    = mlx5e_get_sset_count,
1802         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1803         .get_ringparam     = mlx5e_get_ringparam,
1804         .set_ringparam     = mlx5e_set_ringparam,
1805         .get_channels      = mlx5e_get_channels,
1806         .set_channels      = mlx5e_set_channels,
1807         .get_coalesce      = mlx5e_get_coalesce,
1808         .set_coalesce      = mlx5e_set_coalesce,
1809         .get_link_ksettings  = mlx5e_get_link_ksettings,
1810         .set_link_ksettings  = mlx5e_set_link_ksettings,
1811         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1812         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1813         .get_rxfh          = mlx5e_get_rxfh,
1814         .set_rxfh          = mlx5e_set_rxfh,
1815 #ifdef CONFIG_MLX5_EN_RXNFC
1816         .get_rxnfc         = mlx5e_get_rxnfc,
1817         .set_rxnfc         = mlx5e_set_rxnfc,
1818 #endif
1819         .flash_device      = mlx5e_flash_device,
1820         .get_tunable       = mlx5e_get_tunable,
1821         .set_tunable       = mlx5e_set_tunable,
1822         .get_pauseparam    = mlx5e_get_pauseparam,
1823         .set_pauseparam    = mlx5e_set_pauseparam,
1824         .get_ts_info       = mlx5e_get_ts_info,
1825         .set_phys_id       = mlx5e_set_phys_id,
1826         .get_wol           = mlx5e_get_wol,
1827         .set_wol           = mlx5e_set_wol,
1828         .get_module_info   = mlx5e_get_module_info,
1829         .get_module_eeprom = mlx5e_get_module_eeprom,
1830         .get_priv_flags    = mlx5e_get_priv_flags,
1831         .set_priv_flags    = mlx5e_set_priv_flags,
1832         .self_test         = mlx5e_self_test,
1833         .get_msglevel      = mlx5e_get_msglevel,
1834         .set_msglevel      = mlx5e_set_msglevel,
1835         .get_fecparam      = mlx5e_get_fecparam,
1836         .set_fecparam      = mlx5e_set_fecparam,
1837 };