2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 #include <linux/bitops.h>
38 #include <linux/compiler.h>
39 #include <linux/ethtool.h>
40 #include <linux/list.h>
41 #include <linux/mutex.h>
42 #include <linux/netdevice.h>
43 #include <linux/if_vlan.h>
44 #include <linux/net_tstamp.h>
45 #ifdef CONFIG_MLX4_EN_DCB
46 #include <linux/dcbnl.h>
48 #include <linux/cpu_rmap.h>
49 #include <linux/ptp_clock_kernel.h>
52 #include <linux/mlx4/device.h>
53 #include <linux/mlx4/qp.h>
54 #include <linux/mlx4/cq.h>
55 #include <linux/mlx4/srq.h>
56 #include <linux/mlx4/doorbell.h>
57 #include <linux/mlx4/cmd.h>
60 #include "mlx4_stats.h"
62 #define DRV_NAME "mlx4_en"
63 #define DRV_VERSION "4.0-0"
65 #define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
72 #define MLX4_EN_PAGE_SHIFT 12
73 #define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
74 #define DEF_RX_RINGS 16
75 #define MAX_RX_RINGS 128
76 #define MIN_RX_RINGS 1
77 #define LOG_TXBB_SIZE 6
78 #define TXBB_SIZE BIT(LOG_TXBB_SIZE)
79 #define HEADROOM (2048 / TXBB_SIZE + 1)
80 #define STAMP_STRIDE 64
81 #define STAMP_DWORDS (STAMP_STRIDE / 4)
82 #define STAMP_SHIFT 31
83 #define STAMP_VAL 0x7fffffff
84 #define STATS_DELAY (HZ / 4)
85 #define SERVICE_TASK_DELAY (HZ / 4)
86 #define MAX_NUM_OF_FS_RULES 256
88 #define MLX4_EN_FILTER_HASH_SHIFT 4
89 #define MLX4_EN_FILTER_EXPIRY_QUOTA 60
91 /* Typical TSO descriptor with 16 gather entries is 352 bytes... */
92 #define MAX_DESC_SIZE 512
93 #define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE)
96 * OS related constants and tunables
99 #define MLX4_EN_PRIV_FLAGS_BLUEFLAME 1
100 #define MLX4_EN_PRIV_FLAGS_PHV 2
102 #define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ)
104 /* Use the maximum between 16384 and a single page */
105 #define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(16384)
107 #define MLX4_EN_MAX_RX_FRAGS 4
109 /* Maximum ring sizes */
110 #define MLX4_EN_MAX_TX_SIZE 8192
111 #define MLX4_EN_MAX_RX_SIZE 8192
113 /* Minimum ring size for our page-allocation scheme to work */
114 #define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES)
115 #define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE)
117 #define MLX4_EN_SMALL_PKT_SIZE 64
118 #define MLX4_EN_MIN_TX_RING_P_UP 1
119 #define MLX4_EN_MAX_TX_RING_P_UP 32
120 #define MLX4_EN_NUM_UP_LOW 1
121 #define MLX4_EN_NUM_UP_HIGH 8
122 #define MLX4_EN_DEF_RX_RING_SIZE 1024
123 #define MLX4_EN_DEF_TX_RING_SIZE MLX4_EN_DEF_RX_RING_SIZE
124 #define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \
127 #define MLX4_EN_DEFAULT_TX_WORK 256
129 /* Target number of packets to coalesce with interrupt moderation */
130 #define MLX4_EN_RX_COAL_TARGET 44
131 #define MLX4_EN_RX_COAL_TIME 0x10
133 #define MLX4_EN_TX_COAL_PKTS 16
134 #define MLX4_EN_TX_COAL_TIME 0x10
136 #define MLX4_EN_MAX_COAL_PKTS U16_MAX
137 #define MLX4_EN_MAX_COAL_TIME U16_MAX
139 #define MLX4_EN_RX_RATE_LOW 400000
140 #define MLX4_EN_RX_COAL_TIME_LOW 0
141 #define MLX4_EN_RX_RATE_HIGH 450000
142 #define MLX4_EN_RX_COAL_TIME_HIGH 128
143 #define MLX4_EN_RX_SIZE_THRESH 1024
144 #define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH)
145 #define MLX4_EN_SAMPLE_INTERVAL 0
146 #define MLX4_EN_AVG_PKT_SMALL 256
148 #define MLX4_EN_AUTO_CONF 0xffff
150 #define MLX4_EN_DEF_RX_PAUSE 1
151 #define MLX4_EN_DEF_TX_PAUSE 1
153 /* Interval between successive polls in the Tx routine when polling is used
154 instead of interrupts (in per-core Tx rings) - should be power of 2 */
155 #define MLX4_EN_TX_POLL_MODER 16
156 #define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4)
158 #define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN)
159 #define HEADER_COPY_SIZE (128 - NET_IP_ALIGN)
160 #define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETH_HLEN)
161 #define PREAMBLE_LEN 8
162 #define MLX4_SELFTEST_LB_MIN_MTU (MLX4_LOOPBACK_TEST_PAYLOAD + NET_IP_ALIGN + \
163 ETH_HLEN + PREAMBLE_LEN)
165 /* VLAN_HLEN is added twice,to support skb vlan tagged with multiple
166 * headers. (For example: ETH_P_8021Q and ETH_P_8021AD).
168 #define MLX4_EN_EFF_MTU(mtu) ((mtu) + ETH_HLEN + (2 * VLAN_HLEN))
169 #define ETH_BCAST 0xffffffffffffULL
171 #define MLX4_EN_LOOPBACK_RETRIES 5
172 #define MLX4_EN_LOOPBACK_TIMEOUT 100
174 /* Constants for TX flow */
176 MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
186 /* keep tx types first */
189 #define MLX4_EN_NUM_TX_TYPES (TX_XDP + 1)
197 #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x))
198 #define XNOR(x, y) (!(x) == !(y))
201 struct mlx4_en_tx_info {
215 } ____cacheline_aligned_in_smp;
218 #define MLX4_EN_BIT_DESC_OWN 0x80000000
219 #define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg)
220 #define MLX4_EN_MEMTYPE_PAD 0x100
221 #define DS_SIZE sizeof(struct mlx4_wqe_data_seg)
224 struct mlx4_en_tx_desc {
225 struct mlx4_wqe_ctrl_seg ctrl;
227 struct mlx4_wqe_data_seg data; /* at least one data segment */
228 struct mlx4_wqe_lso_seg lso;
229 struct mlx4_wqe_inline_seg inl;
233 #define MLX4_EN_USE_SRQ 0x01000000
235 #define MLX4_EN_CX3_LOW_ID 0x1000
236 #define MLX4_EN_CX3_HIGH_ID 0x1005
238 struct mlx4_en_rx_alloc {
244 #define MLX4_EN_CACHE_SIZE (2 * NAPI_POLL_WEIGHT)
246 struct mlx4_en_page_cache {
251 } buf[MLX4_EN_CACHE_SIZE];
255 MLX4_EN_TX_RING_STATE_RECOVERING,
260 struct mlx4_en_tx_ring {
261 /* cache line used and dirtied in tx completion
262 * (mlx4_en_free_tx_buf())
266 unsigned long wake_queue;
267 struct netdev_queue *tx_queue;
268 u32 (*free_tx_desc)(struct mlx4_en_priv *priv,
269 struct mlx4_en_tx_ring *ring,
271 u64 timestamp, int napi_mode);
272 struct mlx4_en_rx_ring *recycle_ring;
274 /* cache line used and dirtied in mlx4_en_xmit() */
275 u32 prod ____cacheline_aligned_in_smp;
276 unsigned int tx_dropped;
278 unsigned long packets;
279 unsigned long tx_csum;
280 unsigned long tso_packets;
281 unsigned long xmit_more;
284 /* Following part should be mostly read */
287 u32 size; /* number of TXBBs */
292 struct mlx4_en_tx_info *tx_info;
300 /* Not used in fast path
301 * Only queue_stopped might be used if BQL is not properly working.
303 unsigned long queue_stopped;
305 struct mlx4_hwq_resources sp_wqres;
306 struct mlx4_qp sp_qp;
307 struct mlx4_qp_context sp_context;
308 cpumask_t sp_affinity_mask;
309 enum mlx4_qp_state sp_qp_state;
311 u16 sp_cqn; /* index of port CQ associated with this ring */
312 } ____cacheline_aligned_in_smp;
314 struct mlx4_en_rx_desc {
315 /* actual number of entries depends on rx ring stride */
316 struct mlx4_wqe_data_seg data[0];
319 struct mlx4_en_rx_ring {
320 struct mlx4_hwq_resources wqres;
321 u32 size ; /* number of Rx descs*/
326 u16 cqn; /* index of port CQ associated with this ring */
333 struct bpf_prog __rcu *xdp_prog;
334 struct mlx4_en_page_cache page_cache;
336 unsigned long packets;
337 unsigned long csum_ok;
338 unsigned long csum_none;
339 unsigned long csum_complete;
340 unsigned long rx_alloc_pages;
341 unsigned long xdp_drop;
342 unsigned long xdp_tx;
343 unsigned long xdp_tx_full;
344 unsigned long dropped;
345 int hwtstamp_rx_filter;
346 cpumask_var_t affinity_mask;
347 struct xdp_rxq_info xdp_rxq;
352 struct mlx4_hwq_resources wqres;
354 struct net_device *dev;
356 struct napi_struct napi;
365 struct mlx4_cqe *buf;
366 #define MLX4_EN_OPCODE_ERROR 0x1e
368 struct irq_desc *irq_desc;
371 struct mlx4_en_port_profile {
373 u32 tx_ring_num[MLX4_EN_NUM_TX_TYPES];
377 u8 num_tx_rings_p_up;
385 struct hwtstamp_config hwtstamp_config;
388 struct mlx4_en_profile {
394 u8 max_num_tx_rings_p_up;
395 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];
399 struct mlx4_dev *dev;
400 struct pci_dev *pdev;
401 struct mutex state_lock;
402 struct net_device *pndev[MLX4_MAX_PORTS + 1];
403 struct net_device *upper[MLX4_MAX_PORTS + 1];
406 struct mlx4_en_profile profile;
408 struct workqueue_struct *workqueue;
409 struct device *dma_device;
410 void __iomem *uar_map;
411 struct mlx4_uar priv_uar;
415 u8 mac_removed[MLX4_MAX_PORTS + 1];
417 struct cyclecounter cycles;
418 seqlock_t clock_lock;
419 struct timecounter clock;
420 unsigned long last_overflow_check;
421 struct ptp_clock *ptp_clock;
422 struct ptp_clock_info ptp_clock_info;
423 struct notifier_block nb;
427 struct mlx4_en_rss_map {
429 struct mlx4_qp qps[MAX_RX_RINGS];
430 enum mlx4_qp_state state[MAX_RX_RINGS];
431 struct mlx4_qp *indir_qp;
432 enum mlx4_qp_state indir_state;
435 enum mlx4_en_port_flag {
436 MLX4_EN_PORT_ANC = 1<<0, /* Auto-negotiation complete */
437 MLX4_EN_PORT_ANE = 1<<1, /* Auto-negotiation enabled */
440 struct mlx4_en_port_state {
447 enum mlx4_en_mclist_act {
453 struct mlx4_en_mc_list {
454 struct list_head list;
455 enum mlx4_en_mclist_act action;
461 struct mlx4_en_frag_info {
466 #ifdef CONFIG_MLX4_EN_DCB
467 /* Minimal TC BW - setting to 0 will block traffic */
468 #define MLX4_EN_BW_MIN 1
469 #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */
471 #define MLX4_EN_TC_VENDOR 0
472 #define MLX4_EN_TC_ETS 7
481 struct mlx4_en_cee_config {
483 enum dcb_pfc_type dcb_pfc[MLX4_EN_NUM_UP_HIGH];
487 struct ethtool_flow_id {
488 struct list_head list;
489 struct ethtool_rx_flow_spec flow_spec;
494 MLX4_EN_FLAG_PROMISC = (1 << 0),
495 MLX4_EN_FLAG_MC_PROMISC = (1 << 1),
496 /* whether we need to enable hardware loopback by putting dmac
499 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK = (1 << 2),
500 /* whether we need to drop packets that hardware loopback-ed */
501 MLX4_EN_FLAG_RX_FILTER_NEEDED = (1 << 3),
502 MLX4_EN_FLAG_FORCE_PROMISC = (1 << 4),
503 MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP = (1 << 5),
504 #ifdef CONFIG_MLX4_EN_DCB
505 MLX4_EN_FLAG_DCB_ENABLED = (1 << 6),
509 #define PORT_BEACON_MAX_LIMIT (65535)
510 #define MLX4_EN_MAC_HASH_SIZE (1 << BITS_PER_BYTE)
511 #define MLX4_EN_MAC_HASH_IDX 5
513 struct mlx4_en_stats_bitmap {
514 DECLARE_BITMAP(bitmap, NUM_ALL_STATS);
515 struct mutex mutex; /* for mutual access to stats bitmap */
519 MLX4_EN_STATE_FLAG_RESTARTING,
522 struct mlx4_en_priv {
523 struct mlx4_en_dev *mdev;
524 struct mlx4_en_port_profile *prof;
525 struct net_device *dev;
526 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
527 struct mlx4_en_port_state port_state;
528 spinlock_t stats_lock;
529 struct ethtool_flow_id ethtool_rules[MAX_NUM_OF_FS_RULES];
530 /* To allow rules removal while port is going down */
531 struct list_head ethtool_list;
533 unsigned long last_moder_packets[MAX_RX_RINGS];
534 unsigned long last_moder_tx_packets;
535 unsigned long last_moder_bytes[MAX_RX_RINGS];
536 unsigned long last_moder_jiffies;
537 int last_moder_time[MAX_RX_RINGS];
547 u32 adaptive_rx_coal;
550 u32 validate_loopback;
552 struct mlx4_hwq_resources res;
560 unsigned char current_mac[ETH_ALEN + 2];
567 struct mlx4_en_rss_map rss_map;
570 u8 num_tx_rings_p_up;
572 u32 tx_ring_num[MLX4_EN_NUM_TX_TYPES];
575 struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
581 struct mlx4_en_tx_ring **tx_ring[MLX4_EN_NUM_TX_TYPES];
582 struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS];
583 struct mlx4_en_cq **tx_cq[MLX4_EN_NUM_TX_TYPES];
584 struct mlx4_en_cq *rx_cq[MAX_RX_RINGS];
585 struct mlx4_qp drop_qp;
586 struct work_struct rx_mode_task;
587 struct work_struct restart_task;
588 struct work_struct linkstate_task;
589 struct delayed_work stats_task;
590 struct delayed_work service_task;
591 struct mlx4_en_pkt_stats pkstats;
592 struct mlx4_en_counter_stats pf_stats;
593 struct mlx4_en_flow_stats_rx rx_priority_flowstats[MLX4_NUM_PRIORITIES];
594 struct mlx4_en_flow_stats_tx tx_priority_flowstats[MLX4_NUM_PRIORITIES];
595 struct mlx4_en_flow_stats_rx rx_flowstats;
596 struct mlx4_en_flow_stats_tx tx_flowstats;
597 struct mlx4_en_port_stats port_stats;
598 struct mlx4_en_xdp_stats xdp_stats;
599 struct mlx4_en_phy_stats phy_stats;
600 struct mlx4_en_stats_bitmap stats_bitmap;
601 struct list_head mc_list;
602 struct list_head curr_list;
604 struct mlx4_en_stat_out_mbox hw_stats;
608 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE];
609 struct hwtstamp_config hwtstamp_config;
612 #ifdef CONFIG_MLX4_EN_DCB
613 #define MLX4_EN_DCB_ENABLED 0x3
615 u16 maxrate[IEEE_8021QAZ_MAX_TCS];
616 enum dcbnl_cndd_states cndd_state[IEEE_8021QAZ_MAX_TCS];
617 struct mlx4_en_cee_config cee_config;
620 #ifdef CONFIG_RFS_ACCEL
621 spinlock_t filters_lock;
623 struct list_head filters;
624 struct hlist_head filter_hash[1 << MLX4_EN_FILTER_HASH_SHIFT];
630 u8 rss_key[MLX4_EN_RSS_KEY_SIZE];
636 MLX4_EN_WOL_MAGIC = (1ULL << 61),
637 MLX4_EN_WOL_ENABLED = (1ULL << 62),
640 struct mlx4_mac_entry {
641 struct hlist_node hlist;
642 unsigned char mac[ETH_ALEN + 2];
647 static inline struct mlx4_cqe *mlx4_en_get_cqe(void *buf, int idx, int cqe_sz)
649 return buf + idx * cqe_sz;
652 #define MLX4_EN_WOL_DO_MODIFY (1ULL << 63)
654 void mlx4_en_init_ptys2ethtool_map(void);
655 void mlx4_en_update_loopback_state(struct net_device *dev,
656 netdev_features_t features);
658 void mlx4_en_destroy_netdev(struct net_device *dev);
659 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
660 struct mlx4_en_port_profile *prof);
662 int mlx4_en_start_port(struct net_device *dev);
663 void mlx4_en_stop_port(struct net_device *dev, int detach);
665 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
666 struct mlx4_en_stats_bitmap *stats_bitmap,
667 u8 rx_ppp, u8 rx_pause,
668 u8 tx_ppp, u8 tx_pause);
670 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
671 struct mlx4_en_priv *tmp,
672 struct mlx4_en_port_profile *prof,
673 bool carry_xdp_prog);
674 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
675 struct mlx4_en_priv *tmp);
677 int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq,
678 int entries, int ring, enum cq_type mode, int node);
679 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq);
680 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
682 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
683 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
684 void mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
686 void mlx4_en_tx_irq(struct mlx4_cq *mcq);
687 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb,
688 struct net_device *sb_dev);
689 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev);
690 netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_ring *rx_ring,
691 struct mlx4_en_rx_alloc *frame,
692 struct mlx4_en_priv *priv, unsigned int length,
693 int tx_ind, bool *doorbell_pending);
694 void mlx4_en_xmit_doorbell(struct mlx4_en_tx_ring *ring);
695 bool mlx4_en_rx_recycle(struct mlx4_en_rx_ring *ring,
696 struct mlx4_en_rx_alloc *frame);
698 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
699 struct mlx4_en_tx_ring **pring,
700 u32 size, u16 stride,
701 int node, int queue_index);
702 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
703 struct mlx4_en_tx_ring **pring);
704 void mlx4_en_init_tx_xdp_ring_descs(struct mlx4_en_priv *priv,
705 struct mlx4_en_tx_ring *ring);
706 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
707 struct mlx4_en_tx_ring *ring,
708 int cq, int user_prio);
709 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
710 struct mlx4_en_tx_ring *ring);
711 void mlx4_en_set_num_rx_rings(struct mlx4_en_dev *mdev);
712 void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv);
713 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
714 struct mlx4_en_rx_ring **pring,
715 u32 size, u16 stride, int node, int queue_index);
716 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
717 struct mlx4_en_rx_ring **pring,
718 u32 size, u16 stride);
719 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv);
720 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
721 struct mlx4_en_rx_ring *ring);
722 int mlx4_en_process_rx_cq(struct net_device *dev,
723 struct mlx4_en_cq *cq,
725 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget);
726 int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget);
727 int mlx4_en_process_tx_cq(struct net_device *dev,
728 struct mlx4_en_cq *cq, int napi_budget);
729 u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
730 struct mlx4_en_tx_ring *ring,
731 int index, u64 timestamp,
733 u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,
734 struct mlx4_en_tx_ring *ring,
735 int index, u64 timestamp,
737 void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
738 int is_tx, int rss, int qpn, int cqn, int user_prio,
739 struct mlx4_qp_context *context);
740 void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);
741 int mlx4_en_change_mcast_lb(struct mlx4_en_priv *priv, struct mlx4_qp *qp,
743 void mlx4_en_calc_rx_buf(struct net_device *dev);
744 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv);
745 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv);
746 int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv);
747 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv);
748 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring);
749 void mlx4_en_rx_irq(struct mlx4_cq *mcq);
751 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode);
752 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv);
754 void mlx4_en_fold_software_stats(struct net_device *dev);
755 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
756 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
758 #ifdef CONFIG_MLX4_EN_DCB
759 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;
760 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_pfc_ops;
763 int mlx4_en_setup_tc(struct net_device *dev, u8 up);
764 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc);
766 #ifdef CONFIG_RFS_ACCEL
767 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv);
770 #define MLX4_EN_NUM_SELF_TEST 5
771 void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
772 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev);
774 #define DEV_FEATURE_CHANGED(dev, new_features, feature) \
775 ((dev->features & feature) ^ (new_features & feature))
777 int mlx4_en_reset_config(struct net_device *dev,
778 struct hwtstamp_config ts_config,
779 netdev_features_t new_features);
780 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
781 struct mlx4_en_stats_bitmap *stats_bitmap,
782 u8 rx_ppp, u8 rx_pause,
783 u8 tx_ppp, u8 tx_pause);
784 int mlx4_en_netdev_event(struct notifier_block *this,
785 unsigned long event, void *ptr);
788 * Functions for time stamping
790 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe);
791 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
792 struct skb_shared_hwtstamps *hwts,
794 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev);
795 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev);
799 extern const struct ethtool_ops mlx4_en_ethtool_ops;
804 * printk / logging functions
808 void en_print(const char *level, const struct mlx4_en_priv *priv,
809 const char *format, ...);
811 #define en_dbg(mlevel, priv, format, ...) \
813 if (NETIF_MSG_##mlevel & (priv)->msg_enable) \
814 en_print(KERN_DEBUG, priv, format, ##__VA_ARGS__); \
816 #define en_warn(priv, format, ...) \
817 en_print(KERN_WARNING, priv, format, ##__VA_ARGS__)
818 #define en_err(priv, format, ...) \
819 en_print(KERN_ERR, priv, format, ##__VA_ARGS__)
820 #define en_info(priv, format, ...) \
821 en_print(KERN_INFO, priv, format, ##__VA_ARGS__)
823 #define mlx4_err(mdev, format, ...) \
824 pr_err(DRV_NAME " %s: " format, \
825 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__)
826 #define mlx4_info(mdev, format, ...) \
827 pr_info(DRV_NAME " %s: " format, \
828 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__)
829 #define mlx4_warn(mdev, format, ...) \
830 pr_warn(DRV_NAME " %s: " format, \
831 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__)