1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Marvell OcteonTx2 RPM driver
4 * Copyright (C) 2020 Marvell.
13 * struct lmac - per lmac locks and properties
14 * @wq_cmd_cmplt: waitq to keep the process blocked until cmd completion
15 * @cmd_lock: Lock to serialize the command interface
16 * @resp: command response
17 * @link_info: link related information
18 * @mac_to_index_bmap: Mac address to CGX table index mapping
19 * @event_cb: callback for linkchange events
20 * @event_cb_lock: lock for serializing callback with unregister
21 * @cgx: parent cgx port
22 * @mcast_filters_count: Number of multicast filters installed
23 * @lmac_id: lmac port id
24 * @cmd_pend: flag set before new command is started
25 * flag cleared after command response is received
26 * @name: lmac port name
29 wait_queue_head_t wq_cmd_cmplt;
30 /* Lock to serialize the command interface */
31 struct mutex cmd_lock;
33 struct cgx_link_user_info link_info;
34 struct rsrc_bmap mac_to_index_bmap;
35 struct cgx_event_cb event_cb;
36 /* lock for serializing callback with unregister */
37 spinlock_t event_cb_lock;
39 u8 mcast_filters_count;
45 /* CGX & RPM has different feature set
46 * update the structure fields with different one
50 /* Features like RXSTAT, TXSTAT, DMAC FILTER csrs differs by fixed
51 * bar offset for example
53 * RPM DMAC_CTL0 0x4ff8
56 /* For ATF to send events to kernel, there is no dedicated interrupt
57 * defined hence CGX uses OVERFLOW bit in CMR_INT. RPM block supports
58 * SW_INT so that ATF triggers this interrupt after processing of
63 /* lmac offset is different is RPM */
69 bool non_contiguous_serdes_lane;
70 /* RPM & CGX differs in number of Receive/transmit stats */
73 /* Incase of RPM get number of lmacs from RPMX_CMR_RX_LMACS[LMAC_EXIST]
74 * number of setbits in lmac_exist tells number of lmacs
76 int (*get_nr_lmacs)(void *cgx);
77 u8 (*get_lmac_type)(void *cgx, int lmac_id);
78 int (*mac_lmac_intl_lbk)(void *cgx, int lmac_id,
80 /* Register Stats related functions */
81 int (*mac_get_rx_stats)(void *cgx, int lmac_id,
82 int idx, u64 *rx_stat);
83 int (*mac_get_tx_stats)(void *cgx, int lmac_id,
84 int idx, u64 *tx_stat);
86 /* Enable LMAC Pause Frame Configuration */
87 void (*mac_enadis_rx_pause_fwding)(void *cgxd,
91 int (*mac_get_pause_frm_status)(void *cgxd,
96 int (*mac_enadis_pause_frm)(void *cgxd,
101 void (*mac_pause_frm_config)(void *cgxd,
107 void __iomem *reg_base;
108 struct pci_dev *pdev;
111 struct lmac *lmac_idmap[MAX_LMAC_PER_CGX];
112 struct work_struct cgx_cmd_work;
113 struct workqueue_struct *cgx_cmd_workq;
114 struct list_head cgx_list;
116 struct mac_ops *mac_ops;
117 unsigned long lmac_bmap; /* bitmap of enabled lmacs */
118 /* Lock to serialize read/write of global csrs like
119 * RPMX_MTI_STAT_DATA_HI_CDC etc
124 typedef struct cgx rpm_t;
126 /* Function Declarations */
127 void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val);
128 u64 cgx_read(struct cgx *cgx, u64 lmac, u64 offset);
129 struct lmac *lmac_pdata(u8 lmac_id, struct cgx *cgx);
130 int cgx_fwi_cmd_send(u64 req, u64 *resp, struct lmac *lmac);
131 int cgx_fwi_cmd_generic(u64 req, u64 *resp, struct cgx *cgx, int lmac_id);
132 bool is_lmac_valid(struct cgx *cgx, int lmac_id);
133 struct mac_ops *rpm_get_mac_ops(void);
135 #endif /* LMAC_COMMON_H */