1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2018 Intel Corporation. */
4 #include <linux/bpf_trace.h>
5 #include <net/xdp_sock_drv.h>
9 #include "ixgbe_txrx_common.h"
11 struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter,
12 struct ixgbe_ring *ring)
14 bool xdp_on = READ_ONCE(adapter->xdp_prog);
15 int qid = ring->ring_idx;
17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps))
20 return xsk_get_pool_from_qid(adapter->netdev, qid);
23 static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter,
24 struct xsk_buff_pool *pool,
27 struct net_device *netdev = adapter->netdev;
31 if (qid >= adapter->num_rx_queues)
34 if (qid >= netdev->real_num_rx_queues ||
35 qid >= netdev->real_num_tx_queues)
38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR);
42 if_running = netif_running(adapter->netdev) &&
43 ixgbe_enabled_xdp_adapter(adapter);
46 ixgbe_txrx_ring_disable(adapter, qid);
48 set_bit(qid, adapter->af_xdp_zc_qps);
51 ixgbe_txrx_ring_enable(adapter, qid);
53 /* Kick start the NAPI context so that receiving will start */
54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX);
62 static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid)
64 struct xsk_buff_pool *pool;
67 pool = xsk_get_pool_from_qid(adapter->netdev, qid);
71 if_running = netif_running(adapter->netdev) &&
72 ixgbe_enabled_xdp_adapter(adapter);
75 ixgbe_txrx_ring_disable(adapter, qid);
77 clear_bit(qid, adapter->af_xdp_zc_qps);
78 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
81 ixgbe_txrx_ring_enable(adapter, qid);
86 int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter,
87 struct xsk_buff_pool *pool,
90 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) :
91 ixgbe_xsk_pool_disable(adapter, qid);
94 static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
95 struct ixgbe_ring *rx_ring,
98 int err, result = IXGBE_XDP_PASS;
99 struct bpf_prog *xdp_prog;
100 struct xdp_frame *xdpf;
103 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
104 act = bpf_prog_run_xdp(xdp_prog, xdp);
106 if (likely(act == XDP_REDIRECT)) {
107 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
110 return IXGBE_XDP_REDIR;
117 xdpf = xdp_convert_buff_to_frame(xdp);
120 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
121 if (result == IXGBE_XDP_CONSUMED)
125 bpf_warn_invalid_xdp_action(act);
129 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
130 fallthrough; /* handle aborts by dropping packet */
132 result = IXGBE_XDP_CONSUMED;
138 bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
140 union ixgbe_adv_rx_desc *rx_desc;
141 struct ixgbe_rx_buffer *bi;
142 u16 i = rx_ring->next_to_use;
150 rx_desc = IXGBE_RX_DESC(rx_ring, i);
151 bi = &rx_ring->rx_buffer_info[i];
155 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool);
161 dma = xsk_buff_xdp_get_dma(bi->xdp);
163 /* Refresh the desc even if buffer_addrs didn't change
164 * because each write-back erases this info.
166 rx_desc->read.pkt_addr = cpu_to_le64(dma);
172 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
173 bi = rx_ring->rx_buffer_info;
177 /* clear the length for the next_to_use descriptor */
178 rx_desc->wb.upper.length = 0;
185 if (rx_ring->next_to_use != i) {
186 rx_ring->next_to_use = i;
188 /* Force memory writes to complete before letting h/w
189 * know there are new descriptors to fetch. (Only
190 * applicable for weak-ordered memory model archs,
194 writel(i, rx_ring->tail);
200 static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
201 struct ixgbe_rx_buffer *bi)
203 unsigned int metasize = bi->xdp->data - bi->xdp->data_meta;
204 unsigned int datasize = bi->xdp->data_end - bi->xdp->data;
207 /* allocate a skb to store the frags */
208 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
209 bi->xdp->data_end - bi->xdp->data_hard_start,
210 GFP_ATOMIC | __GFP_NOWARN);
214 skb_reserve(skb, bi->xdp->data - bi->xdp->data_hard_start);
215 memcpy(__skb_put(skb, datasize), bi->xdp->data, datasize);
217 skb_metadata_set(skb, metasize);
219 xsk_buff_free(bi->xdp);
224 static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
226 u32 ntc = rx_ring->next_to_clean + 1;
228 ntc = (ntc < rx_ring->count) ? ntc : 0;
229 rx_ring->next_to_clean = ntc;
230 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
233 int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
234 struct ixgbe_ring *rx_ring,
237 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
238 struct ixgbe_adapter *adapter = q_vector->adapter;
239 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
240 unsigned int xdp_res, xdp_xmit = 0;
241 bool failure = false;
244 while (likely(total_rx_packets < budget)) {
245 union ixgbe_adv_rx_desc *rx_desc;
246 struct ixgbe_rx_buffer *bi;
249 /* return some buffers to hardware, one at a time is too slow */
250 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
252 !ixgbe_alloc_rx_buffers_zc(rx_ring,
257 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
258 size = le16_to_cpu(rx_desc->wb.upper.length);
262 /* This memory barrier is needed to keep us from reading
263 * any other fields out of the rx_desc until we know the
264 * descriptor has been written back
268 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
270 if (unlikely(!ixgbe_test_staterr(rx_desc,
271 IXGBE_RXD_STAT_EOP))) {
272 struct ixgbe_rx_buffer *next_bi;
274 xsk_buff_free(bi->xdp);
276 ixgbe_inc_ntc(rx_ring);
278 &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
279 next_bi->discard = true;
283 if (unlikely(bi->discard)) {
284 xsk_buff_free(bi->xdp);
287 ixgbe_inc_ntc(rx_ring);
291 bi->xdp->data_end = bi->xdp->data + size;
292 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool);
293 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp);
296 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR))
299 xsk_buff_free(bi->xdp);
303 total_rx_bytes += size;
306 ixgbe_inc_ntc(rx_ring);
311 skb = ixgbe_construct_skb_zc(rx_ring, bi);
313 rx_ring->rx_stats.alloc_rx_buff_failed++;
318 ixgbe_inc_ntc(rx_ring);
320 if (eth_skb_pad(skb))
323 total_rx_bytes += skb->len;
326 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
327 ixgbe_rx_skb(q_vector, skb);
330 if (xdp_xmit & IXGBE_XDP_REDIR)
333 if (xdp_xmit & IXGBE_XDP_TX) {
334 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
336 /* Force memory writes to complete before letting h/w
337 * know there are new descriptors to fetch.
340 writel(ring->next_to_use, ring->tail);
343 u64_stats_update_begin(&rx_ring->syncp);
344 rx_ring->stats.packets += total_rx_packets;
345 rx_ring->stats.bytes += total_rx_bytes;
346 u64_stats_update_end(&rx_ring->syncp);
347 q_vector->rx.total_packets += total_rx_packets;
348 q_vector->rx.total_bytes += total_rx_bytes;
350 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) {
351 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
352 xsk_set_rx_need_wakeup(rx_ring->xsk_pool);
354 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool);
356 return (int)total_rx_packets;
358 return failure ? budget : (int)total_rx_packets;
361 void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
363 struct ixgbe_rx_buffer *bi;
366 for (i = 0; i < rx_ring->count; i++) {
367 bi = &rx_ring->rx_buffer_info[i];
372 xsk_buff_free(bi->xdp);
377 static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
379 struct xsk_buff_pool *pool = xdp_ring->xsk_pool;
380 union ixgbe_adv_tx_desc *tx_desc = NULL;
381 struct ixgbe_tx_buffer *tx_bi;
382 bool work_done = true;
383 struct xdp_desc desc;
387 while (budget-- > 0) {
388 if (unlikely(!ixgbe_desc_unused(xdp_ring)) ||
389 !netif_carrier_ok(xdp_ring->netdev)) {
394 if (!xsk_tx_peek_desc(pool, &desc))
397 dma = xsk_buff_raw_get_dma(pool, desc.addr);
398 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len);
400 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
401 tx_bi->bytecount = desc.len;
405 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
406 tx_desc->read.buffer_addr = cpu_to_le64(dma);
408 /* put descriptor type bits */
409 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
410 IXGBE_ADVTXD_DCMD_DEXT |
411 IXGBE_ADVTXD_DCMD_IFCS;
412 cmd_type |= desc.len | IXGBE_TXD_CMD;
413 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
414 tx_desc->read.olinfo_status =
415 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT);
417 xdp_ring->next_to_use++;
418 if (xdp_ring->next_to_use == xdp_ring->count)
419 xdp_ring->next_to_use = 0;
423 ixgbe_xdp_ring_update_tail(xdp_ring);
424 xsk_tx_release(pool);
427 return !!budget && work_done;
430 static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
431 struct ixgbe_tx_buffer *tx_bi)
433 xdp_return_frame(tx_bi->xdpf);
434 dma_unmap_single(tx_ring->dev,
435 dma_unmap_addr(tx_bi, dma),
436 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
437 dma_unmap_len_set(tx_bi, len, 0);
440 bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
441 struct ixgbe_ring *tx_ring, int napi_budget)
443 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
444 unsigned int total_packets = 0, total_bytes = 0;
445 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
446 union ixgbe_adv_tx_desc *tx_desc;
447 struct ixgbe_tx_buffer *tx_bi;
450 tx_bi = &tx_ring->tx_buffer_info[ntc];
451 tx_desc = IXGBE_TX_DESC(tx_ring, ntc);
454 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
457 total_bytes += tx_bi->bytecount;
458 total_packets += tx_bi->gso_segs;
461 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
470 if (unlikely(ntc == tx_ring->count)) {
472 tx_bi = tx_ring->tx_buffer_info;
473 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
476 /* issue prefetch for next Tx descriptor */
480 tx_ring->next_to_clean = ntc;
482 u64_stats_update_begin(&tx_ring->syncp);
483 tx_ring->stats.bytes += total_bytes;
484 tx_ring->stats.packets += total_packets;
485 u64_stats_update_end(&tx_ring->syncp);
486 q_vector->tx.total_bytes += total_bytes;
487 q_vector->tx.total_packets += total_packets;
490 xsk_tx_completed(pool, xsk_frames);
492 if (xsk_uses_need_wakeup(pool))
493 xsk_set_tx_need_wakeup(pool);
495 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
498 int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
500 struct ixgbe_adapter *adapter = netdev_priv(dev);
501 struct ixgbe_ring *ring;
503 if (test_bit(__IXGBE_DOWN, &adapter->state))
506 if (!READ_ONCE(adapter->xdp_prog))
509 if (qid >= adapter->num_xdp_queues)
512 ring = adapter->xdp_ring[qid];
514 if (test_bit(__IXGBE_TX_DISABLED, &ring->state))
520 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
521 u64 eics = BIT_ULL(ring->q_vector->v_idx);
523 ixgbe_irq_rearm_queues(adapter, eics);
529 void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
531 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
532 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
533 struct ixgbe_tx_buffer *tx_bi;
537 tx_bi = &tx_ring->tx_buffer_info[ntc];
540 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
547 if (ntc == tx_ring->count)
552 xsk_tx_completed(pool, xsk_frames);