drivers/net/ethernet/intel/igc/igc_ptp.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c)  2019 Intel Corporation */
   3
   4 #include "igc.h"
   5
   6 #include <linux/module.h>
   7 #include <linux/device.h>
   8 #include <linux/pci.h>
   9 #include <linux/ptp_classify.h>
  10 #include <linux/clocksource.h>
  11 #include <linux/ktime.h>
  12
  13 #define INCVALUE_MASK           0x7fffffff
  14 #define ISGN                    0x80000000
  15
  16 #define IGC_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 9)
  17 #define IGC_PTP_TX_TIMEOUT              (HZ * 15)
  18
  19 /* SYSTIM read access for I225 */
  20 void igc_ptp_read(struct igc_adapter *adapter, struct timespec64 *ts)
  21 {
  22         struct igc_hw *hw = &adapter->hw;
  23         u32 sec, nsec;
  24
  25         /* The timestamp is latched when SYSTIML is read. */
  26         nsec = rd32(IGC_SYSTIML);
  27         sec = rd32(IGC_SYSTIMH);
  28
  29         ts->tv_sec = sec;
  30         ts->tv_nsec = nsec;
  31 }
  32
  33 static void igc_ptp_write_i225(struct igc_adapter *adapter,
  34                                const struct timespec64 *ts)
  35 {
  36         struct igc_hw *hw = &adapter->hw;
  37
  38         wr32(IGC_SYSTIML, ts->tv_nsec);
  39         wr32(IGC_SYSTIMH, ts->tv_sec);
  40 }
  41
  42 static int igc_ptp_adjfine_i225(struct ptp_clock_info *ptp, long scaled_ppm)
  43 {
  44         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
  45                                                ptp_caps);
  46         struct igc_hw *hw = &igc->hw;
  47         int neg_adj = 0;
  48         u64 rate;
  49         u32 inca;
  50
  51         if (scaled_ppm < 0) {
  52                 neg_adj = 1;
  53                 scaled_ppm = -scaled_ppm;
  54         }
  55         rate = scaled_ppm;
  56         rate <<= 14;
  57         rate = div_u64(rate, 78125);
  58
  59         inca = rate & INCVALUE_MASK;
  60         if (neg_adj)
  61                 inca |= ISGN;
  62
  63         wr32(IGC_TIMINCA, inca);
  64
  65         return 0;
  66 }
  67
  68 static int igc_ptp_adjtime_i225(struct ptp_clock_info *ptp, s64 delta)
  69 {
  70         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
  71                                                ptp_caps);
  72         struct timespec64 now, then = ns_to_timespec64(delta);
  73         unsigned long flags;
  74
  75         spin_lock_irqsave(&igc->tmreg_lock, flags);
  76
  77         igc_ptp_read(igc, &now);
  78         now = timespec64_add(now, then);
  79         igc_ptp_write_i225(igc, (const struct timespec64 *)&now);
  80
  81         spin_unlock_irqrestore(&igc->tmreg_lock, flags);
  82
  83         return 0;
  84 }
  85
  86 static int igc_ptp_gettimex64_i225(struct ptp_clock_info *ptp,
  87                                    struct timespec64 *ts,
  88                                    struct ptp_system_timestamp *sts)
  89 {
  90         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
  91                                                ptp_caps);
  92         struct igc_hw *hw = &igc->hw;
  93         unsigned long flags;
  94
  95         spin_lock_irqsave(&igc->tmreg_lock, flags);
  96
  97         ptp_read_system_prets(sts);
  98         ts->tv_nsec = rd32(IGC_SYSTIML);
  99         ts->tv_sec = rd32(IGC_SYSTIMH);
 100         ptp_read_system_postts(sts);
 101
 102         spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 103
 104         return 0;
 105 }
 106
 107 static int igc_ptp_settime_i225(struct ptp_clock_info *ptp,
 108                                 const struct timespec64 *ts)
 109 {
 110         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
 111                                                ptp_caps);
 112         unsigned long flags;
 113
 114         spin_lock_irqsave(&igc->tmreg_lock, flags);
 115
 116         igc_ptp_write_i225(igc, ts);
 117
 118         spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 119
 120         return 0;
 121 }
 122
 123 static void igc_pin_direction(int pin, int input, u32 *ctrl, u32 *ctrl_ext)
 124 {
 125         u32 *ptr = pin < 2 ? ctrl : ctrl_ext;
 126         static const u32 mask[IGC_N_SDP] = {
 127                 IGC_CTRL_SDP0_DIR,
 128                 IGC_CTRL_SDP1_DIR,
 129                 IGC_CTRL_EXT_SDP2_DIR,
 130                 IGC_CTRL_EXT_SDP3_DIR,
 131         };
 132
 133         if (input)
 134                 *ptr &= ~mask[pin];
 135         else
 136                 *ptr |= mask[pin];
 137 }
 138
 139 static void igc_pin_perout(struct igc_adapter *igc, int chan, int pin, int freq)
 140 {
 141         static const u32 igc_aux0_sel_sdp[IGC_N_SDP] = {
 142                 IGC_AUX0_SEL_SDP0, IGC_AUX0_SEL_SDP1, IGC_AUX0_SEL_SDP2, IGC_AUX0_SEL_SDP3,
 143         };
 144         static const u32 igc_aux1_sel_sdp[IGC_N_SDP] = {
 145                 IGC_AUX1_SEL_SDP0, IGC_AUX1_SEL_SDP1, IGC_AUX1_SEL_SDP2, IGC_AUX1_SEL_SDP3,
 146         };
 147         static const u32 igc_ts_sdp_en[IGC_N_SDP] = {
 148                 IGC_TS_SDP0_EN, IGC_TS_SDP1_EN, IGC_TS_SDP2_EN, IGC_TS_SDP3_EN,
 149         };
 150         static const u32 igc_ts_sdp_sel_tt0[IGC_N_SDP] = {
 151                 IGC_TS_SDP0_SEL_TT0, IGC_TS_SDP1_SEL_TT0,
 152                 IGC_TS_SDP2_SEL_TT0, IGC_TS_SDP3_SEL_TT0,
 153         };
 154         static const u32 igc_ts_sdp_sel_tt1[IGC_N_SDP] = {
 155                 IGC_TS_SDP0_SEL_TT1, IGC_TS_SDP1_SEL_TT1,
 156                 IGC_TS_SDP2_SEL_TT1, IGC_TS_SDP3_SEL_TT1,
 157         };
 158         static const u32 igc_ts_sdp_sel_fc0[IGC_N_SDP] = {
 159                 IGC_TS_SDP0_SEL_FC0, IGC_TS_SDP1_SEL_FC0,
 160                 IGC_TS_SDP2_SEL_FC0, IGC_TS_SDP3_SEL_FC0,
 161         };
 162         static const u32 igc_ts_sdp_sel_fc1[IGC_N_SDP] = {
 163                 IGC_TS_SDP0_SEL_FC1, IGC_TS_SDP1_SEL_FC1,
 164                 IGC_TS_SDP2_SEL_FC1, IGC_TS_SDP3_SEL_FC1,
 165         };
 166         static const u32 igc_ts_sdp_sel_clr[IGC_N_SDP] = {
 167                 IGC_TS_SDP0_SEL_FC1, IGC_TS_SDP1_SEL_FC1,
 168                 IGC_TS_SDP2_SEL_FC1, IGC_TS_SDP3_SEL_FC1,
 169         };
 170         struct igc_hw *hw = &igc->hw;
 171         u32 ctrl, ctrl_ext, tssdp = 0;
 172
 173         ctrl = rd32(IGC_CTRL);
 174         ctrl_ext = rd32(IGC_CTRL_EXT);
 175         tssdp = rd32(IGC_TSSDP);
 176
 177         igc_pin_direction(pin, 0, &ctrl, &ctrl_ext);
 178
 179         /* Make sure this pin is not enabled as an input. */
 180         if ((tssdp & IGC_AUX0_SEL_SDP3) == igc_aux0_sel_sdp[pin])
 181                 tssdp &= ~IGC_AUX0_TS_SDP_EN;
 182
 183         if ((tssdp & IGC_AUX1_SEL_SDP3) == igc_aux1_sel_sdp[pin])
 184                 tssdp &= ~IGC_AUX1_TS_SDP_EN;
 185
 186         tssdp &= ~igc_ts_sdp_sel_clr[pin];
 187         if (freq) {
 188                 if (chan == 1)
 189                         tssdp |= igc_ts_sdp_sel_fc1[pin];
 190                 else
 191                         tssdp |= igc_ts_sdp_sel_fc0[pin];
 192         } else {
 193                 if (chan == 1)
 194                         tssdp |= igc_ts_sdp_sel_tt1[pin];
 195                 else
 196                         tssdp |= igc_ts_sdp_sel_tt0[pin];
 197         }
 198         tssdp |= igc_ts_sdp_en[pin];
 199
 200         wr32(IGC_TSSDP, tssdp);
 201         wr32(IGC_CTRL, ctrl);
 202         wr32(IGC_CTRL_EXT, ctrl_ext);
 203 }
 204
 205 static void igc_pin_extts(struct igc_adapter *igc, int chan, int pin)
 206 {
 207         static const u32 igc_aux0_sel_sdp[IGC_N_SDP] = {
 208                 IGC_AUX0_SEL_SDP0, IGC_AUX0_SEL_SDP1, IGC_AUX0_SEL_SDP2, IGC_AUX0_SEL_SDP3,
 209         };
 210         static const u32 igc_aux1_sel_sdp[IGC_N_SDP] = {
 211                 IGC_AUX1_SEL_SDP0, IGC_AUX1_SEL_SDP1, IGC_AUX1_SEL_SDP2, IGC_AUX1_SEL_SDP3,
 212         };
 213         static const u32 igc_ts_sdp_en[IGC_N_SDP] = {
 214                 IGC_TS_SDP0_EN, IGC_TS_SDP1_EN, IGC_TS_SDP2_EN, IGC_TS_SDP3_EN,
 215         };
 216         struct igc_hw *hw = &igc->hw;
 217         u32 ctrl, ctrl_ext, tssdp = 0;
 218
 219         ctrl = rd32(IGC_CTRL);
 220         ctrl_ext = rd32(IGC_CTRL_EXT);
 221         tssdp = rd32(IGC_TSSDP);
 222
 223         igc_pin_direction(pin, 1, &ctrl, &ctrl_ext);
 224
 225         /* Make sure this pin is not enabled as an output. */
 226         tssdp &= ~igc_ts_sdp_en[pin];
 227
 228         if (chan == 1) {
 229                 tssdp &= ~IGC_AUX1_SEL_SDP3;
 230                 tssdp |= igc_aux1_sel_sdp[pin] | IGC_AUX1_TS_SDP_EN;
 231         } else {
 232                 tssdp &= ~IGC_AUX0_SEL_SDP3;
 233                 tssdp |= igc_aux0_sel_sdp[pin] | IGC_AUX0_TS_SDP_EN;
 234         }
 235
 236         wr32(IGC_TSSDP, tssdp);
 237         wr32(IGC_CTRL, ctrl);
 238         wr32(IGC_CTRL_EXT, ctrl_ext);
 239 }
 240
 241 static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
 242                                        struct ptp_clock_request *rq, int on)
 243 {
 244         struct igc_adapter *igc =
 245                 container_of(ptp, struct igc_adapter, ptp_caps);
 246         struct igc_hw *hw = &igc->hw;
 247         unsigned long flags;
 248         struct timespec64 ts;
 249         int use_freq = 0, pin = -1;
 250         u32 tsim, tsauxc, tsauxc_mask, tsim_mask, trgttiml, trgttimh, freqout;
 251         s64 ns;
 252
 253         switch (rq->type) {
 254         case PTP_CLK_REQ_EXTTS:
 255                 /* Reject requests with unsupported flags */
 256                 if (rq->extts.flags & ~(PTP_ENABLE_FEATURE |
 257                                         PTP_RISING_EDGE |
 258                                         PTP_FALLING_EDGE |
 259                                         PTP_STRICT_FLAGS))
 260                         return -EOPNOTSUPP;
 261
 262                 /* Reject requests failing to enable both edges. */
 263                 if ((rq->extts.flags & PTP_STRICT_FLAGS) &&
 264                     (rq->extts.flags & PTP_ENABLE_FEATURE) &&
 265                     (rq->extts.flags & PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)
 266                         return -EOPNOTSUPP;
 267
 268                 if (on) {
 269                         pin = ptp_find_pin(igc->ptp_clock, PTP_PF_EXTTS,
 270                                            rq->extts.index);
 271                         if (pin < 0)
 272                                 return -EBUSY;
 273                 }
 274                 if (rq->extts.index == 1) {
 275                         tsauxc_mask = IGC_TSAUXC_EN_TS1;
 276                         tsim_mask = IGC_TSICR_AUTT1;
 277                 } else {
 278                         tsauxc_mask = IGC_TSAUXC_EN_TS0;
 279                         tsim_mask = IGC_TSICR_AUTT0;
 280                 }
 281                 spin_lock_irqsave(&igc->tmreg_lock, flags);
 282                 tsauxc = rd32(IGC_TSAUXC);
 283                 tsim = rd32(IGC_TSIM);
 284                 if (on) {
 285                         igc_pin_extts(igc, rq->extts.index, pin);
 286                         tsauxc |= tsauxc_mask;
 287                         tsim |= tsim_mask;
 288                 } else {
 289                         tsauxc &= ~tsauxc_mask;
 290                         tsim &= ~tsim_mask;
 291                 }
 292                 wr32(IGC_TSAUXC, tsauxc);
 293                 wr32(IGC_TSIM, tsim);
 294                 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 295                 return 0;
 296
 297         case PTP_CLK_REQ_PEROUT:
 298                 /* Reject requests with unsupported flags */
 299                 if (rq->perout.flags)
 300                         return -EOPNOTSUPP;
 301
 302                 if (on) {
 303                         pin = ptp_find_pin(igc->ptp_clock, PTP_PF_PEROUT,
 304                                            rq->perout.index);
 305                         if (pin < 0)
 306                                 return -EBUSY;
 307                 }
 308                 ts.tv_sec = rq->perout.period.sec;
 309                 ts.tv_nsec = rq->perout.period.nsec;
 310                 ns = timespec64_to_ns(&ts);
 311                 ns = ns >> 1;
 312                 if (on && (ns <= 70000000LL || ns == 125000000LL ||
 313                            ns == 250000000LL || ns == 500000000LL)) {
 314                         if (ns < 8LL)
 315                                 return -EINVAL;
 316                         use_freq = 1;
 317                 }
 318                 ts = ns_to_timespec64(ns);
 319                 if (rq->perout.index == 1) {
 320                         if (use_freq) {
 321                                 tsauxc_mask = IGC_TSAUXC_EN_CLK1;
 322                                 tsim_mask = 0;
 323                         } else {
 324                                 tsauxc_mask = IGC_TSAUXC_EN_TT1;
 325                                 tsim_mask = IGC_TSICR_TT1;
 326                         }
 327                         trgttiml = IGC_TRGTTIML1;
 328                         trgttimh = IGC_TRGTTIMH1;
 329                         freqout = IGC_FREQOUT1;
 330                 } else {
 331                         if (use_freq) {
 332                                 tsauxc_mask = IGC_TSAUXC_EN_CLK0;
 333                                 tsim_mask = 0;
 334                         } else {
 335                                 tsauxc_mask = IGC_TSAUXC_EN_TT0;
 336                                 tsim_mask = IGC_TSICR_TT0;
 337                         }
 338                         trgttiml = IGC_TRGTTIML0;
 339                         trgttimh = IGC_TRGTTIMH0;
 340                         freqout = IGC_FREQOUT0;
 341                 }
 342                 spin_lock_irqsave(&igc->tmreg_lock, flags);
 343                 tsauxc = rd32(IGC_TSAUXC);
 344                 tsim = rd32(IGC_TSIM);
 345                 if (rq->perout.index == 1) {
 346                         tsauxc &= ~(IGC_TSAUXC_EN_TT1 | IGC_TSAUXC_EN_CLK1);
 347                         tsim &= ~IGC_TSICR_TT1;
 348                 } else {
 349                         tsauxc &= ~(IGC_TSAUXC_EN_TT0 | IGC_TSAUXC_EN_CLK0);
 350                         tsim &= ~IGC_TSICR_TT0;
 351                 }
 352                 if (on) {
 353                         int i = rq->perout.index;
 354
 355                         igc_pin_perout(igc, i, pin, use_freq);
 356                         igc->perout[i].start.tv_sec = rq->perout.start.sec;
 357                         igc->perout[i].start.tv_nsec = rq->perout.start.nsec;
 358                         igc->perout[i].period.tv_sec = ts.tv_sec;
 359                         igc->perout[i].period.tv_nsec = ts.tv_nsec;
 360                         wr32(trgttimh, rq->perout.start.sec);
 361                         /* For now, always select timer 0 as source. */
 362                         wr32(trgttiml, rq->perout.start.nsec | IGC_TT_IO_TIMER_SEL_SYSTIM0);
 363                         if (use_freq)
 364                                 wr32(freqout, ns);
 365                         tsauxc |= tsauxc_mask;
 366                         tsim |= tsim_mask;
 367                 }
 368                 wr32(IGC_TSAUXC, tsauxc);
 369                 wr32(IGC_TSIM, tsim);
 370                 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 371                 return 0;
 372
 373         case PTP_CLK_REQ_PPS:
 374                 spin_lock_irqsave(&igc->tmreg_lock, flags);
 375                 tsim = rd32(IGC_TSIM);
 376                 if (on)
 377                         tsim |= IGC_TSICR_SYS_WRAP;
 378                 else
 379                         tsim &= ~IGC_TSICR_SYS_WRAP;
 380                 igc->pps_sys_wrap_on = on;
 381                 wr32(IGC_TSIM, tsim);
 382                 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 383                 return 0;
 384
 385         default:
 386                 break;
 387         }
 388
 389         return -EOPNOTSUPP;
 390 }
 391
 392 static int igc_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
 393                               enum ptp_pin_function func, unsigned int chan)
 394 {
 395         switch (func) {
 396         case PTP_PF_NONE:
 397         case PTP_PF_EXTTS:
 398         case PTP_PF_PEROUT:
 399                 break;
 400         case PTP_PF_PHYSYNC:
 401                 return -1;
 402         }
 403         return 0;
 404 }
 405
 406 /**
 407  * igc_ptp_systim_to_hwtstamp - convert system time value to HW timestamp
 408  * @adapter: board private structure
 409  * @hwtstamps: timestamp structure to update
 410  * @systim: unsigned 64bit system time value
 411  *
 412  * We need to convert the system time value stored in the RX/TXSTMP registers
 413  * into a hwtstamp which can be used by the upper level timestamping functions.
 414  **/
 415 static void igc_ptp_systim_to_hwtstamp(struct igc_adapter *adapter,
 416                                        struct skb_shared_hwtstamps *hwtstamps,
 417                                        u64 systim)
 418 {
 419         switch (adapter->hw.mac.type) {
 420         case igc_i225:
 421                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 422                 /* Upper 32 bits contain s, lower 32 bits contain ns. */
 423                 hwtstamps->hwtstamp = ktime_set(systim >> 32,
 424                                                 systim & 0xFFFFFFFF);
 425                 break;
 426         default:
 427                 break;
 428         }
 429 }
 430
 431 /**
 432  * igc_ptp_rx_pktstamp - Retrieve timestamp from Rx packet buffer
 433  * @adapter: Pointer to adapter the packet buffer belongs to
 434  * @buf: Pointer to packet buffer
 435  *
 436  * This function retrieves the timestamp saved in the beginning of packet
 437  * buffer. While two timestamps are available, one in timer0 reference and the
 438  * other in timer1 reference, this function considers only the timestamp in
 439  * timer0 reference.
 440  *
 441  * Returns timestamp value.
 442  */
 443 ktime_t igc_ptp_rx_pktstamp(struct igc_adapter *adapter, __le32 *buf)
 444 {
 445         ktime_t timestamp;
 446         u32 secs, nsecs;
 447         int adjust;
 448
 449         /* Timestamps are saved in little endian at the beginning of the packet
 450          * buffer following the layout:
 451          *
 452          * DWORD: | 0              | 1              | 2              | 3              |
 453          * Field: | Timer1 SYSTIML | Timer1 SYSTIMH | Timer0 SYSTIML | Timer0 SYSTIMH |
 454          *
 455          * SYSTIML holds the nanoseconds part while SYSTIMH holds the seconds
 456          * part of the timestamp.
 457          */
 458         nsecs = le32_to_cpu(buf[2]);
 459         secs = le32_to_cpu(buf[3]);
 460
 461         timestamp = ktime_set(secs, nsecs);
 462
 463         /* Adjust timestamp for the RX latency based on link speed */
 464         switch (adapter->link_speed) {
 465         case SPEED_10:
 466                 adjust = IGC_I225_RX_LATENCY_10;
 467                 break;
 468         case SPEED_100:
 469                 adjust = IGC_I225_RX_LATENCY_100;
 470                 break;
 471         case SPEED_1000:
 472                 adjust = IGC_I225_RX_LATENCY_1000;
 473                 break;
 474         case SPEED_2500:
 475                 adjust = IGC_I225_RX_LATENCY_2500;
 476                 break;
 477         default:
 478                 adjust = 0;
 479                 netdev_warn_once(adapter->netdev, "Imprecise timestamp\n");
 480                 break;
 481         }
 482
 483         return ktime_sub_ns(timestamp, adjust);
 484 }
 485
 486 static void igc_ptp_disable_rx_timestamp(struct igc_adapter *adapter)
 487 {
 488         struct igc_hw *hw = &adapter->hw;
 489         u32 val;
 490         int i;
 491
 492         wr32(IGC_TSYNCRXCTL, 0);
 493
 494         for (i = 0; i < adapter->num_rx_queues; i++) {
 495                 val = rd32(IGC_SRRCTL(i));
 496                 val &= ~IGC_SRRCTL_TIMESTAMP;
 497                 wr32(IGC_SRRCTL(i), val);
 498         }
 499
 500         val = rd32(IGC_RXPBS);
 501         val &= ~IGC_RXPBS_CFG_TS_EN;
 502         wr32(IGC_RXPBS, val);
 503 }
 504
 505 static void igc_ptp_enable_rx_timestamp(struct igc_adapter *adapter)
 506 {
 507         struct igc_hw *hw = &adapter->hw;
 508         u32 val;
 509         int i;
 510
 511         val = rd32(IGC_RXPBS);
 512         val |= IGC_RXPBS_CFG_TS_EN;
 513         wr32(IGC_RXPBS, val);
 514
 515         for (i = 0; i < adapter->num_rx_queues; i++) {
 516                 val = rd32(IGC_SRRCTL(i));
 517                 /* FIXME: For now, only support retrieving RX timestamps from
 518                  * timer 0.
 519                  */
 520                 val |= IGC_SRRCTL_TIMER1SEL(0) | IGC_SRRCTL_TIMER0SEL(0) |
 521                        IGC_SRRCTL_TIMESTAMP;
 522                 wr32(IGC_SRRCTL(i), val);
 523         }
 524
 525         val = IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_ALL |
 526               IGC_TSYNCRXCTL_RXSYNSIG;
 527         wr32(IGC_TSYNCRXCTL, val);
 528 }
 529
 530 static void igc_ptp_disable_tx_timestamp(struct igc_adapter *adapter)
 531 {
 532         struct igc_hw *hw = &adapter->hw;
 533
 534         wr32(IGC_TSYNCTXCTL, 0);
 535 }
 536
 537 static void igc_ptp_enable_tx_timestamp(struct igc_adapter *adapter)
 538 {
 539         struct igc_hw *hw = &adapter->hw;
 540
 541         wr32(IGC_TSYNCTXCTL, IGC_TSYNCTXCTL_ENABLED | IGC_TSYNCTXCTL_TXSYNSIG);
 542
 543         /* Read TXSTMP registers to discard any timestamp previously stored. */
 544         rd32(IGC_TXSTMPL);
 545         rd32(IGC_TXSTMPH);
 546 }
 547
 548 /**
 549  * igc_ptp_set_timestamp_mode - setup hardware for timestamping
 550  * @adapter: networking device structure
 551  * @config: hwtstamp configuration
 552  *
 553  * Return: 0 in case of success, negative errno code otherwise.
 554  */
 555 static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
 556                                       struct hwtstamp_config *config)
 557 {
 558         /* reserved for future extensions */
 559         if (config->flags)
 560                 return -EINVAL;
 561
 562         switch (config->tx_type) {
 563         case HWTSTAMP_TX_OFF:
 564                 igc_ptp_disable_tx_timestamp(adapter);
 565                 break;
 566         case HWTSTAMP_TX_ON:
 567                 igc_ptp_enable_tx_timestamp(adapter);
 568                 break;
 569         default:
 570                 return -ERANGE;
 571         }
 572
 573         switch (config->rx_filter) {
 574         case HWTSTAMP_FILTER_NONE:
 575                 igc_ptp_disable_rx_timestamp(adapter);
 576                 break;
 577         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 578         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 579         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 580         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 581         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 582         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 583         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 584         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 585         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 586         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 587         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 588         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 589         case HWTSTAMP_FILTER_NTP_ALL:
 590         case HWTSTAMP_FILTER_ALL:
 591                 igc_ptp_enable_rx_timestamp(adapter);
 592                 config->rx_filter = HWTSTAMP_FILTER_ALL;
 593                 break;
 594         default:
 595                 return -ERANGE;
 596         }
 597
 598         return 0;
 599 }
 600
 601 static void igc_ptp_tx_timeout(struct igc_adapter *adapter)
 602 {
 603         struct igc_hw *hw = &adapter->hw;
 604
 605         dev_kfree_skb_any(adapter->ptp_tx_skb);
 606         adapter->ptp_tx_skb = NULL;
 607         adapter->tx_hwtstamp_timeouts++;
 608         clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 609         /* Clear the tx valid bit in TSYNCTXCTL register to enable interrupt. */
 610         rd32(IGC_TXSTMPH);
 611         netdev_warn(adapter->netdev, "Tx timestamp timeout\n");
 612 }
 613
 614 void igc_ptp_tx_hang(struct igc_adapter *adapter)
 615 {
 616         bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +
 617                                               IGC_PTP_TX_TIMEOUT);
 618
 619         if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
 620                 return;
 621
 622         /* If we haven't received a timestamp within the timeout, it is
 623          * reasonable to assume that it will never occur, so we can unlock the
 624          * timestamp bit when this occurs.
 625          */
 626         if (timeout) {
 627                 cancel_work_sync(&adapter->ptp_tx_work);
 628                 igc_ptp_tx_timeout(adapter);
 629         }
 630 }
 631
 632 /**
 633  * igc_ptp_tx_hwtstamp - utility function which checks for TX time stamp
 634  * @adapter: Board private structure
 635  *
 636  * If we were asked to do hardware stamping and such a time stamp is
 637  * available, then it must have been for this skb here because we only
 638  * allow only one such packet into the queue.
 639  */
 640 static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)
 641 {
 642         struct sk_buff *skb = adapter->ptp_tx_skb;
 643         struct skb_shared_hwtstamps shhwtstamps;
 644         struct igc_hw *hw = &adapter->hw;
 645         int adjust = 0;
 646         u64 regval;
 647
 648         if (WARN_ON_ONCE(!skb))
 649                 return;
 650
 651         regval = rd32(IGC_TXSTMPL);
 652         regval |= (u64)rd32(IGC_TXSTMPH) << 32;
 653         igc_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
 654
 655         switch (adapter->link_speed) {
 656         case SPEED_10:
 657                 adjust = IGC_I225_TX_LATENCY_10;
 658                 break;
 659         case SPEED_100:
 660                 adjust = IGC_I225_TX_LATENCY_100;
 661                 break;
 662         case SPEED_1000:
 663                 adjust = IGC_I225_TX_LATENCY_1000;
 664                 break;
 665         case SPEED_2500:
 666                 adjust = IGC_I225_TX_LATENCY_2500;
 667                 break;
 668         }
 669
 670         shhwtstamps.hwtstamp =
 671                 ktime_add_ns(shhwtstamps.hwtstamp, adjust);
 672
 673         /* Clear the lock early before calling skb_tstamp_tx so that
 674          * applications are not woken up before the lock bit is clear. We use
 675          * a copy of the skb pointer to ensure other threads can't change it
 676          * while we're notifying the stack.
 677          */
 678         adapter->ptp_tx_skb = NULL;
 679         clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 680
 681         /* Notify the stack and free the skb after we've unlocked */
 682         skb_tstamp_tx(skb, &shhwtstamps);
 683         dev_kfree_skb_any(skb);
 684 }
 685
 686 /**
 687  * igc_ptp_tx_work
 688  * @work: pointer to work struct
 689  *
 690  * This work function polls the TSYNCTXCTL valid bit to determine when a
 691  * timestamp has been taken for the current stored skb.
 692  */
 693 static void igc_ptp_tx_work(struct work_struct *work)
 694 {
 695         struct igc_adapter *adapter = container_of(work, struct igc_adapter,
 696                                                    ptp_tx_work);
 697         struct igc_hw *hw = &adapter->hw;
 698         u32 tsynctxctl;
 699
 700         if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
 701                 return;
 702
 703         tsynctxctl = rd32(IGC_TSYNCTXCTL);
 704         if (WARN_ON_ONCE(!(tsynctxctl & IGC_TSYNCTXCTL_TXTT_0)))
 705                 return;
 706
 707         igc_ptp_tx_hwtstamp(adapter);
 708 }
 709
 710 /**
 711  * igc_ptp_set_ts_config - set hardware time stamping config
 712  * @netdev: network interface device structure
 713  * @ifr: interface request data
 714  *
 715  **/
 716 int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
 717 {
 718         struct igc_adapter *adapter = netdev_priv(netdev);
 719         struct hwtstamp_config config;
 720         int err;
 721
 722         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 723                 return -EFAULT;
 724
 725         err = igc_ptp_set_timestamp_mode(adapter, &config);
 726         if (err)
 727                 return err;
 728
 729         /* save these settings for future reference */
 730         memcpy(&adapter->tstamp_config, &config,
 731                sizeof(adapter->tstamp_config));
 732
 733         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 734                 -EFAULT : 0;
 735 }
 736
 737 /**
 738  * igc_ptp_get_ts_config - get hardware time stamping config
 739  * @netdev: network interface device structure
 740  * @ifr: interface request data
 741  *
 742  * Get the hwtstamp_config settings to return to the user. Rather than attempt
 743  * to deconstruct the settings from the registers, just return a shadow copy
 744  * of the last known settings.
 745  **/
 746 int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
 747 {
 748         struct igc_adapter *adapter = netdev_priv(netdev);
 749         struct hwtstamp_config *config = &adapter->tstamp_config;
 750
 751         return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
 752                 -EFAULT : 0;
 753 }
 754
 755 /**
 756  * igc_ptp_init - Initialize PTP functionality
 757  * @adapter: Board private structure
 758  *
 759  * This function is called at device probe to initialize the PTP
 760  * functionality.
 761  */
 762 void igc_ptp_init(struct igc_adapter *adapter)
 763 {
 764         struct net_device *netdev = adapter->netdev;
 765         struct igc_hw *hw = &adapter->hw;
 766         int i;
 767
 768         switch (hw->mac.type) {
 769         case igc_i225:
 770                 for (i = 0; i < IGC_N_SDP; i++) {
 771                         struct ptp_pin_desc *ppd = &adapter->sdp_config[i];
 772
 773                         snprintf(ppd->name, sizeof(ppd->name), "SDP%d", i);
 774                         ppd->index = i;
 775                         ppd->func = PTP_PF_NONE;
 776                 }
 777                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 778                 adapter->ptp_caps.owner = THIS_MODULE;
 779                 adapter->ptp_caps.max_adj = 62499999;
 780                 adapter->ptp_caps.adjfine = igc_ptp_adjfine_i225;
 781                 adapter->ptp_caps.adjtime = igc_ptp_adjtime_i225;
 782                 adapter->ptp_caps.gettimex64 = igc_ptp_gettimex64_i225;
 783                 adapter->ptp_caps.settime64 = igc_ptp_settime_i225;
 784                 adapter->ptp_caps.enable = igc_ptp_feature_enable_i225;
 785                 adapter->ptp_caps.pps = 1;
 786                 adapter->ptp_caps.pin_config = adapter->sdp_config;
 787                 adapter->ptp_caps.n_ext_ts = IGC_N_EXTTS;
 788                 adapter->ptp_caps.n_per_out = IGC_N_PEROUT;
 789                 adapter->ptp_caps.n_pins = IGC_N_SDP;
 790                 adapter->ptp_caps.verify = igc_ptp_verify_pin;
 791                 break;
 792         default:
 793                 adapter->ptp_clock = NULL;
 794                 return;
 795         }
 796
 797         spin_lock_init(&adapter->tmreg_lock);
 798         INIT_WORK(&adapter->ptp_tx_work, igc_ptp_tx_work);
 799
 800         adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
 801         adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
 802
 803         adapter->prev_ptp_time = ktime_to_timespec64(ktime_get_real());
 804         adapter->ptp_reset_start = ktime_get();
 805
 806         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
 807                                                 &adapter->pdev->dev);
 808         if (IS_ERR(adapter->ptp_clock)) {
 809                 adapter->ptp_clock = NULL;
 810                 netdev_err(netdev, "ptp_clock_register failed\n");
 811         } else if (adapter->ptp_clock) {
 812                 netdev_info(netdev, "PHC added\n");
 813                 adapter->ptp_flags |= IGC_PTP_ENABLED;
 814         }
 815 }
 816
 817 static void igc_ptp_time_save(struct igc_adapter *adapter)
 818 {
 819         igc_ptp_read(adapter, &adapter->prev_ptp_time);
 820         adapter->ptp_reset_start = ktime_get();
 821 }
 822
 823 static void igc_ptp_time_restore(struct igc_adapter *adapter)
 824 {
 825         struct timespec64 ts = adapter->prev_ptp_time;
 826         ktime_t delta;
 827
 828         delta = ktime_sub(ktime_get(), adapter->ptp_reset_start);
 829
 830         timespec64_add_ns(&ts, ktime_to_ns(delta));
 831
 832         igc_ptp_write_i225(adapter, &ts);
 833 }
 834
 835 /**
 836  * igc_ptp_suspend - Disable PTP work items and prepare for suspend
 837  * @adapter: Board private structure
 838  *
 839  * This function stops the overflow check work and PTP Tx timestamp work, and
 840  * will prepare the device for OS suspend.
 841  */
 842 void igc_ptp_suspend(struct igc_adapter *adapter)
 843 {
 844         if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
 845                 return;
 846
 847         cancel_work_sync(&adapter->ptp_tx_work);
 848         dev_kfree_skb_any(adapter->ptp_tx_skb);
 849         adapter->ptp_tx_skb = NULL;
 850         clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 851
 852         if (pci_device_is_present(adapter->pdev))
 853                 igc_ptp_time_save(adapter);
 854 }
 855
 856 /**
 857  * igc_ptp_stop - Disable PTP device and stop the overflow check.
 858  * @adapter: Board private structure.
 859  *
 860  * This function stops the PTP support and cancels the delayed work.
 861  **/
 862 void igc_ptp_stop(struct igc_adapter *adapter)
 863 {
 864         igc_ptp_suspend(adapter);
 865
 866         if (adapter->ptp_clock) {
 867                 ptp_clock_unregister(adapter->ptp_clock);
 868                 netdev_info(adapter->netdev, "PHC removed\n");
 869                 adapter->ptp_flags &= ~IGC_PTP_ENABLED;
 870         }
 871 }
 872
 873 /**
 874  * igc_ptp_reset - Re-enable the adapter for PTP following a reset.
 875  * @adapter: Board private structure.
 876  *
 877  * This function handles the reset work required to re-enable the PTP device.
 878  **/
 879 void igc_ptp_reset(struct igc_adapter *adapter)
 880 {
 881         struct igc_hw *hw = &adapter->hw;
 882         unsigned long flags;
 883
 884         /* reset the tstamp_config */
 885         igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
 886
 887         spin_lock_irqsave(&adapter->tmreg_lock, flags);
 888
 889         switch (adapter->hw.mac.type) {
 890         case igc_i225:
 891                 wr32(IGC_TSAUXC, 0x0);
 892                 wr32(IGC_TSSDP, 0x0);
 893                 wr32(IGC_TSIM,
 894                      IGC_TSICR_INTERRUPTS |
 895                      (adapter->pps_sys_wrap_on ? IGC_TSICR_SYS_WRAP : 0));
 896                 wr32(IGC_IMS, IGC_IMS_TS);
 897                 break;
 898         default:
 899                 /* No work to do. */
 900                 goto out;
 901         }
 902
 903         /* Re-initialize the timer. */
 904         if (hw->mac.type == igc_i225) {
 905                 igc_ptp_time_restore(adapter);
 906         } else {
 907                 timecounter_init(&adapter->tc, &adapter->cc,
 908                                  ktime_to_ns(ktime_get_real()));
 909         }
 910 out:
 911         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 912
 913         wrfl();
 914 }