drivers/net/ethernet/intel/i40e/i40e_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
   3
   4 #include <linux/etherdevice.h>
   5 #include <linux/of_net.h>
   6 #include <linux/pci.h>
   7 #include <linux/bpf.h>
   8 #include <generated/utsrelease.h>
   9
  10 /* Local includes */
  11 #include "i40e.h"
  12 #include "i40e_diag.h"
  13 #include "i40e_xsk.h"
  14 #include <net/udp_tunnel.h>
  15 #include <net/xdp_sock_drv.h>
  16 /* All i40e tracepoints are defined by the include below, which
  17  * must be included exactly once across the whole kernel with
  18  * CREATE_TRACE_POINTS defined
  19  */
  20 #define CREATE_TRACE_POINTS
  21 #include "i40e_trace.h"
  22
  23 const char i40e_driver_name[] = "i40e";
  24 static const char i40e_driver_string[] =
  25                         "Intel(R) Ethernet Connection XL710 Network Driver";
  26
  27 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
  28
  29 /* a bit of forward declarations */
  30 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
  31 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
  32 static int i40e_add_vsi(struct i40e_vsi *vsi);
  33 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
  34 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
  35 static int i40e_setup_misc_vector(struct i40e_pf *pf);
  36 static void i40e_determine_queue_usage(struct i40e_pf *pf);
  37 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
  38 static void i40e_prep_for_reset(struct i40e_pf *pf);
  39 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
  40                                    bool lock_acquired);
  41 static int i40e_reset(struct i40e_pf *pf);
  42 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  43 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
  44 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
  45 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
  46 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
  47 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
  48 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
  49 static int i40e_get_capabilities(struct i40e_pf *pf,
  50                                  enum i40e_admin_queue_opc list_type);
  51 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
  52
  53 /* i40e_pci_tbl - PCI Device ID Table
  54  *
  55  * Last entry must be all 0s
  56  *
  57  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  58  *   Class, Class Mask, private data (not used) }
  59  */
  60 static const struct pci_device_id i40e_pci_tbl[] = {
  61         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
  62         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
  63         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
  64         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
  65         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
  66         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
  67         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
  68         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
  69         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
  70         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
  71         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
  72         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
  73         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
  74         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
  75         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
  76         {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
  77         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
  78         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
  79         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
  80         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
  81         {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
  82         {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
  83         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
  84         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
  85         /* required last entry */
  86         {0, }
  87 };
  88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
  89
  90 #define I40E_MAX_VF_COUNT 128
  91 static int debug = -1;
  92 module_param(debug, uint, 0);
  93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
  94
  95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
  96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
  97 MODULE_LICENSE("GPL v2");
  98
  99 static struct workqueue_struct *i40e_wq;
 100
 101 /**
 102  * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
 103  * @hw:   pointer to the HW structure
 104  * @mem:  ptr to mem struct to fill out
 105  * @size: size of memory requested
 106  * @alignment: what to align the allocation to
 107  **/
 108 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
 109                             u64 size, u32 alignment)
 110 {
 111         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 112
 113         mem->size = ALIGN(size, alignment);
 114         mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
 115                                      GFP_KERNEL);
 116         if (!mem->va)
 117                 return -ENOMEM;
 118
 119         return 0;
 120 }
 121
 122 /**
 123  * i40e_free_dma_mem_d - OS specific memory free for shared code
 124  * @hw:   pointer to the HW structure
 125  * @mem:  ptr to mem struct to free
 126  **/
 127 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
 128 {
 129         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 130
 131         dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
 132         mem->va = NULL;
 133         mem->pa = 0;
 134         mem->size = 0;
 135
 136         return 0;
 137 }
 138
 139 /**
 140  * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
 141  * @hw:   pointer to the HW structure
 142  * @mem:  ptr to mem struct to fill out
 143  * @size: size of memory requested
 144  **/
 145 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
 146                              u32 size)
 147 {
 148         mem->size = size;
 149         mem->va = kzalloc(size, GFP_KERNEL);
 150
 151         if (!mem->va)
 152                 return -ENOMEM;
 153
 154         return 0;
 155 }
 156
 157 /**
 158  * i40e_free_virt_mem_d - OS specific memory free for shared code
 159  * @hw:   pointer to the HW structure
 160  * @mem:  ptr to mem struct to free
 161  **/
 162 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
 163 {
 164         /* it's ok to kfree a NULL pointer */
 165         kfree(mem->va);
 166         mem->va = NULL;
 167         mem->size = 0;
 168
 169         return 0;
 170 }
 171
 172 /**
 173  * i40e_get_lump - find a lump of free generic resource
 174  * @pf: board private structure
 175  * @pile: the pile of resource to search
 176  * @needed: the number of items needed
 177  * @id: an owner id to stick on the items assigned
 178  *
 179  * Returns the base item index of the lump, or negative for error
 180  *
 181  * The search_hint trick and lack of advanced fit-finding only work
 182  * because we're highly likely to have all the same size lump requests.
 183  * Linear search time and any fragmentation should be minimal.
 184  **/
 185 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
 186                          u16 needed, u16 id)
 187 {
 188         int ret = -ENOMEM;
 189         int i, j;
 190
 191         if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
 192                 dev_info(&pf->pdev->dev,
 193                          "param err: pile=%s needed=%d id=0x%04x\n",
 194                          pile ? "<valid>" : "<null>", needed, id);
 195                 return -EINVAL;
 196         }
 197
 198         /* start the linear search with an imperfect hint */
 199         i = pile->search_hint;
 200         while (i < pile->num_entries) {
 201                 /* skip already allocated entries */
 202                 if (pile->list[i] & I40E_PILE_VALID_BIT) {
 203                         i++;
 204                         continue;
 205                 }
 206
 207                 /* do we have enough in this lump? */
 208                 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
 209                         if (pile->list[i+j] & I40E_PILE_VALID_BIT)
 210                                 break;
 211                 }
 212
 213                 if (j == needed) {
 214                         /* there was enough, so assign it to the requestor */
 215                         for (j = 0; j < needed; j++)
 216                                 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
 217                         ret = i;
 218                         pile->search_hint = i + j;
 219                         break;
 220                 }
 221
 222                 /* not enough, so skip over it and continue looking */
 223                 i += j;
 224         }
 225
 226         return ret;
 227 }
 228
 229 /**
 230  * i40e_put_lump - return a lump of generic resource
 231  * @pile: the pile of resource to search
 232  * @index: the base item index
 233  * @id: the owner id of the items assigned
 234  *
 235  * Returns the count of items in the lump
 236  **/
 237 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
 238 {
 239         int valid_id = (id | I40E_PILE_VALID_BIT);
 240         int count = 0;
 241         int i;
 242
 243         if (!pile || index >= pile->num_entries)
 244                 return -EINVAL;
 245
 246         for (i = index;
 247              i < pile->num_entries && pile->list[i] == valid_id;
 248              i++) {
 249                 pile->list[i] = 0;
 250                 count++;
 251         }
 252
 253         if (count && index < pile->search_hint)
 254                 pile->search_hint = index;
 255
 256         return count;
 257 }
 258
 259 /**
 260  * i40e_find_vsi_from_id - searches for the vsi with the given id
 261  * @pf: the pf structure to search for the vsi
 262  * @id: id of the vsi it is searching for
 263  **/
 264 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
 265 {
 266         int i;
 267
 268         for (i = 0; i < pf->num_alloc_vsi; i++)
 269                 if (pf->vsi[i] && (pf->vsi[i]->id == id))
 270                         return pf->vsi[i];
 271
 272         return NULL;
 273 }
 274
 275 /**
 276  * i40e_service_event_schedule - Schedule the service task to wake up
 277  * @pf: board private structure
 278  *
 279  * If not already scheduled, this puts the task into the work queue
 280  **/
 281 void i40e_service_event_schedule(struct i40e_pf *pf)
 282 {
 283         if ((!test_bit(__I40E_DOWN, pf->state) &&
 284              !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
 285               test_bit(__I40E_RECOVERY_MODE, pf->state))
 286                 queue_work(i40e_wq, &pf->service_task);
 287 }
 288
 289 /**
 290  * i40e_tx_timeout - Respond to a Tx Hang
 291  * @netdev: network interface device structure
 292  * @txqueue: queue number timing out
 293  *
 294  * If any port has noticed a Tx timeout, it is likely that the whole
 295  * device is munged, not just the one netdev port, so go for the full
 296  * reset.
 297  **/
 298 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
 299 {
 300         struct i40e_netdev_priv *np = netdev_priv(netdev);
 301         struct i40e_vsi *vsi = np->vsi;
 302         struct i40e_pf *pf = vsi->back;
 303         struct i40e_ring *tx_ring = NULL;
 304         unsigned int i;
 305         u32 head, val;
 306
 307         pf->tx_timeout_count++;
 308
 309         /* with txqueue index, find the tx_ring struct */
 310         for (i = 0; i < vsi->num_queue_pairs; i++) {
 311                 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
 312                         if (txqueue ==
 313                             vsi->tx_rings[i]->queue_index) {
 314                                 tx_ring = vsi->tx_rings[i];
 315                                 break;
 316                         }
 317                 }
 318         }
 319
 320         if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
 321                 pf->tx_timeout_recovery_level = 1;  /* reset after some time */
 322         else if (time_before(jiffies,
 323                       (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
 324                 return;   /* don't do any new action before the next timeout */
 325
 326         /* don't kick off another recovery if one is already pending */
 327         if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
 328                 return;
 329
 330         if (tx_ring) {
 331                 head = i40e_get_head(tx_ring);
 332                 /* Read interrupt register */
 333                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
 334                         val = rd32(&pf->hw,
 335                              I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
 336                                                 tx_ring->vsi->base_vector - 1));
 337                 else
 338                         val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
 339
 340                 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
 341                             vsi->seid, txqueue, tx_ring->next_to_clean,
 342                             head, tx_ring->next_to_use,
 343                             readl(tx_ring->tail), val);
 344         }
 345
 346         pf->tx_timeout_last_recovery = jiffies;
 347         netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
 348                     pf->tx_timeout_recovery_level, txqueue);
 349
 350         switch (pf->tx_timeout_recovery_level) {
 351         case 1:
 352                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
 353                 break;
 354         case 2:
 355                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
 356                 break;
 357         case 3:
 358                 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
 359                 break;
 360         default:
 361                 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
 362                 break;
 363         }
 364
 365         i40e_service_event_schedule(pf);
 366         pf->tx_timeout_recovery_level++;
 367 }
 368
 369 /**
 370  * i40e_get_vsi_stats_struct - Get System Network Statistics
 371  * @vsi: the VSI we care about
 372  *
 373  * Returns the address of the device statistics structure.
 374  * The statistics are actually updated from the service task.
 375  **/
 376 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
 377 {
 378         return &vsi->net_stats;
 379 }
 380
 381 /**
 382  * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
 383  * @ring: Tx ring to get statistics from
 384  * @stats: statistics entry to be updated
 385  **/
 386 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
 387                                             struct rtnl_link_stats64 *stats)
 388 {
 389         u64 bytes, packets;
 390         unsigned int start;
 391
 392         do {
 393                 start = u64_stats_fetch_begin_irq(&ring->syncp);
 394                 packets = ring->stats.packets;
 395                 bytes   = ring->stats.bytes;
 396         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 397
 398         stats->tx_packets += packets;
 399         stats->tx_bytes   += bytes;
 400 }
 401
 402 /**
 403  * i40e_get_netdev_stats_struct - Get statistics for netdev interface
 404  * @netdev: network interface device structure
 405  * @stats: data structure to store statistics
 406  *
 407  * Returns the address of the device statistics structure.
 408  * The statistics are actually updated from the service task.
 409  **/
 410 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
 411                                   struct rtnl_link_stats64 *stats)
 412 {
 413         struct i40e_netdev_priv *np = netdev_priv(netdev);
 414         struct i40e_vsi *vsi = np->vsi;
 415         struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
 416         struct i40e_ring *ring;
 417         int i;
 418
 419         if (test_bit(__I40E_VSI_DOWN, vsi->state))
 420                 return;
 421
 422         if (!vsi->tx_rings)
 423                 return;
 424
 425         rcu_read_lock();
 426         for (i = 0; i < vsi->num_queue_pairs; i++) {
 427                 u64 bytes, packets;
 428                 unsigned int start;
 429
 430                 ring = READ_ONCE(vsi->tx_rings[i]);
 431                 if (!ring)
 432                         continue;
 433                 i40e_get_netdev_stats_struct_tx(ring, stats);
 434
 435                 if (i40e_enabled_xdp_vsi(vsi)) {
 436                         ring = READ_ONCE(vsi->xdp_rings[i]);
 437                         if (!ring)
 438                                 continue;
 439                         i40e_get_netdev_stats_struct_tx(ring, stats);
 440                 }
 441
 442                 ring = READ_ONCE(vsi->rx_rings[i]);
 443                 if (!ring)
 444                         continue;
 445                 do {
 446                         start   = u64_stats_fetch_begin_irq(&ring->syncp);
 447                         packets = ring->stats.packets;
 448                         bytes   = ring->stats.bytes;
 449                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 450
 451                 stats->rx_packets += packets;
 452                 stats->rx_bytes   += bytes;
 453
 454         }
 455         rcu_read_unlock();
 456
 457         /* following stats updated by i40e_watchdog_subtask() */
 458         stats->multicast        = vsi_stats->multicast;
 459         stats->tx_errors        = vsi_stats->tx_errors;
 460         stats->tx_dropped       = vsi_stats->tx_dropped;
 461         stats->rx_errors        = vsi_stats->rx_errors;
 462         stats->rx_dropped       = vsi_stats->rx_dropped;
 463         stats->rx_crc_errors    = vsi_stats->rx_crc_errors;
 464         stats->rx_length_errors = vsi_stats->rx_length_errors;
 465 }
 466
 467 /**
 468  * i40e_vsi_reset_stats - Resets all stats of the given vsi
 469  * @vsi: the VSI to have its stats reset
 470  **/
 471 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
 472 {
 473         struct rtnl_link_stats64 *ns;
 474         int i;
 475
 476         if (!vsi)
 477                 return;
 478
 479         ns = i40e_get_vsi_stats_struct(vsi);
 480         memset(ns, 0, sizeof(*ns));
 481         memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
 482         memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
 483         memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
 484         if (vsi->rx_rings && vsi->rx_rings[0]) {
 485                 for (i = 0; i < vsi->num_queue_pairs; i++) {
 486                         memset(&vsi->rx_rings[i]->stats, 0,
 487                                sizeof(vsi->rx_rings[i]->stats));
 488                         memset(&vsi->rx_rings[i]->rx_stats, 0,
 489                                sizeof(vsi->rx_rings[i]->rx_stats));
 490                         memset(&vsi->tx_rings[i]->stats, 0,
 491                                sizeof(vsi->tx_rings[i]->stats));
 492                         memset(&vsi->tx_rings[i]->tx_stats, 0,
 493                                sizeof(vsi->tx_rings[i]->tx_stats));
 494                 }
 495         }
 496         vsi->stat_offsets_loaded = false;
 497 }
 498
 499 /**
 500  * i40e_pf_reset_stats - Reset all of the stats for the given PF
 501  * @pf: the PF to be reset
 502  **/
 503 void i40e_pf_reset_stats(struct i40e_pf *pf)
 504 {
 505         int i;
 506
 507         memset(&pf->stats, 0, sizeof(pf->stats));
 508         memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
 509         pf->stat_offsets_loaded = false;
 510
 511         for (i = 0; i < I40E_MAX_VEB; i++) {
 512                 if (pf->veb[i]) {
 513                         memset(&pf->veb[i]->stats, 0,
 514                                sizeof(pf->veb[i]->stats));
 515                         memset(&pf->veb[i]->stats_offsets, 0,
 516                                sizeof(pf->veb[i]->stats_offsets));
 517                         memset(&pf->veb[i]->tc_stats, 0,
 518                                sizeof(pf->veb[i]->tc_stats));
 519                         memset(&pf->veb[i]->tc_stats_offsets, 0,
 520                                sizeof(pf->veb[i]->tc_stats_offsets));
 521                         pf->veb[i]->stat_offsets_loaded = false;
 522                 }
 523         }
 524         pf->hw_csum_rx_error = 0;
 525 }
 526
 527 /**
 528  * i40e_stat_update48 - read and update a 48 bit stat from the chip
 529  * @hw: ptr to the hardware info
 530  * @hireg: the high 32 bit reg to read
 531  * @loreg: the low 32 bit reg to read
 532  * @offset_loaded: has the initial offset been loaded yet
 533  * @offset: ptr to current offset value
 534  * @stat: ptr to the stat
 535  *
 536  * Since the device stats are not reset at PFReset, they likely will not
 537  * be zeroed when the driver starts.  We'll save the first values read
 538  * and use them as offsets to be subtracted from the raw values in order
 539  * to report stats that count from zero.  In the process, we also manage
 540  * the potential roll-over.
 541  **/
 542 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
 543                                bool offset_loaded, u64 *offset, u64 *stat)
 544 {
 545         u64 new_data;
 546
 547         if (hw->device_id == I40E_DEV_ID_QEMU) {
 548                 new_data = rd32(hw, loreg);
 549                 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
 550         } else {
 551                 new_data = rd64(hw, loreg);
 552         }
 553         if (!offset_loaded)
 554                 *offset = new_data;
 555         if (likely(new_data >= *offset))
 556                 *stat = new_data - *offset;
 557         else
 558                 *stat = (new_data + BIT_ULL(48)) - *offset;
 559         *stat &= 0xFFFFFFFFFFFFULL;
 560 }
 561
 562 /**
 563  * i40e_stat_update32 - read and update a 32 bit stat from the chip
 564  * @hw: ptr to the hardware info
 565  * @reg: the hw reg to read
 566  * @offset_loaded: has the initial offset been loaded yet
 567  * @offset: ptr to current offset value
 568  * @stat: ptr to the stat
 569  **/
 570 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
 571                                bool offset_loaded, u64 *offset, u64 *stat)
 572 {
 573         u32 new_data;
 574
 575         new_data = rd32(hw, reg);
 576         if (!offset_loaded)
 577                 *offset = new_data;
 578         if (likely(new_data >= *offset))
 579                 *stat = (u32)(new_data - *offset);
 580         else
 581                 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
 582 }
 583
 584 /**
 585  * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
 586  * @hw: ptr to the hardware info
 587  * @reg: the hw reg to read and clear
 588  * @stat: ptr to the stat
 589  **/
 590 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
 591 {
 592         u32 new_data = rd32(hw, reg);
 593
 594         wr32(hw, reg, 1); /* must write a nonzero value to clear register */
 595         *stat += new_data;
 596 }
 597
 598 /**
 599  * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
 600  * @vsi: the VSI to be updated
 601  **/
 602 void i40e_update_eth_stats(struct i40e_vsi *vsi)
 603 {
 604         int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
 605         struct i40e_pf *pf = vsi->back;
 606         struct i40e_hw *hw = &pf->hw;
 607         struct i40e_eth_stats *oes;
 608         struct i40e_eth_stats *es;     /* device's eth stats */
 609
 610         es = &vsi->eth_stats;
 611         oes = &vsi->eth_stats_offsets;
 612
 613         /* Gather up the stats that the hw collects */
 614         i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
 615                            vsi->stat_offsets_loaded,
 616                            &oes->tx_errors, &es->tx_errors);
 617         i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
 618                            vsi->stat_offsets_loaded,
 619                            &oes->rx_discards, &es->rx_discards);
 620         i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
 621                            vsi->stat_offsets_loaded,
 622                            &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
 623
 624         i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
 625                            I40E_GLV_GORCL(stat_idx),
 626                            vsi->stat_offsets_loaded,
 627                            &oes->rx_bytes, &es->rx_bytes);
 628         i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
 629                            I40E_GLV_UPRCL(stat_idx),
 630                            vsi->stat_offsets_loaded,
 631                            &oes->rx_unicast, &es->rx_unicast);
 632         i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
 633                            I40E_GLV_MPRCL(stat_idx),
 634                            vsi->stat_offsets_loaded,
 635                            &oes->rx_multicast, &es->rx_multicast);
 636         i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
 637                            I40E_GLV_BPRCL(stat_idx),
 638                            vsi->stat_offsets_loaded,
 639                            &oes->rx_broadcast, &es->rx_broadcast);
 640
 641         i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
 642                            I40E_GLV_GOTCL(stat_idx),
 643                            vsi->stat_offsets_loaded,
 644                            &oes->tx_bytes, &es->tx_bytes);
 645         i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
 646                            I40E_GLV_UPTCL(stat_idx),
 647                            vsi->stat_offsets_loaded,
 648                            &oes->tx_unicast, &es->tx_unicast);
 649         i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
 650                            I40E_GLV_MPTCL(stat_idx),
 651                            vsi->stat_offsets_loaded,
 652                            &oes->tx_multicast, &es->tx_multicast);
 653         i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
 654                            I40E_GLV_BPTCL(stat_idx),
 655                            vsi->stat_offsets_loaded,
 656                            &oes->tx_broadcast, &es->tx_broadcast);
 657         vsi->stat_offsets_loaded = true;
 658 }
 659
 660 /**
 661  * i40e_update_veb_stats - Update Switch component statistics
 662  * @veb: the VEB being updated
 663  **/
 664 void i40e_update_veb_stats(struct i40e_veb *veb)
 665 {
 666         struct i40e_pf *pf = veb->pf;
 667         struct i40e_hw *hw = &pf->hw;
 668         struct i40e_eth_stats *oes;
 669         struct i40e_eth_stats *es;     /* device's eth stats */
 670         struct i40e_veb_tc_stats *veb_oes;
 671         struct i40e_veb_tc_stats *veb_es;
 672         int i, idx = 0;
 673
 674         idx = veb->stats_idx;
 675         es = &veb->stats;
 676         oes = &veb->stats_offsets;
 677         veb_es = &veb->tc_stats;
 678         veb_oes = &veb->tc_stats_offsets;
 679
 680         /* Gather up the stats that the hw collects */
 681         i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
 682                            veb->stat_offsets_loaded,
 683                            &oes->tx_discards, &es->tx_discards);
 684         if (hw->revision_id > 0)
 685                 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
 686                                    veb->stat_offsets_loaded,
 687                                    &oes->rx_unknown_protocol,
 688                                    &es->rx_unknown_protocol);
 689         i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
 690                            veb->stat_offsets_loaded,
 691                            &oes->rx_bytes, &es->rx_bytes);
 692         i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
 693                            veb->stat_offsets_loaded,
 694                            &oes->rx_unicast, &es->rx_unicast);
 695         i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
 696                            veb->stat_offsets_loaded,
 697                            &oes->rx_multicast, &es->rx_multicast);
 698         i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
 699                            veb->stat_offsets_loaded,
 700                            &oes->rx_broadcast, &es->rx_broadcast);
 701
 702         i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
 703                            veb->stat_offsets_loaded,
 704                            &oes->tx_bytes, &es->tx_bytes);
 705         i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
 706                            veb->stat_offsets_loaded,
 707                            &oes->tx_unicast, &es->tx_unicast);
 708         i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
 709                            veb->stat_offsets_loaded,
 710                            &oes->tx_multicast, &es->tx_multicast);
 711         i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
 712                            veb->stat_offsets_loaded,
 713                            &oes->tx_broadcast, &es->tx_broadcast);
 714         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 715                 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
 716                                    I40E_GLVEBTC_RPCL(i, idx),
 717                                    veb->stat_offsets_loaded,
 718                                    &veb_oes->tc_rx_packets[i],
 719                                    &veb_es->tc_rx_packets[i]);
 720                 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
 721                                    I40E_GLVEBTC_RBCL(i, idx),
 722                                    veb->stat_offsets_loaded,
 723                                    &veb_oes->tc_rx_bytes[i],
 724                                    &veb_es->tc_rx_bytes[i]);
 725                 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
 726                                    I40E_GLVEBTC_TPCL(i, idx),
 727                                    veb->stat_offsets_loaded,
 728                                    &veb_oes->tc_tx_packets[i],
 729                                    &veb_es->tc_tx_packets[i]);
 730                 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
 731                                    I40E_GLVEBTC_TBCL(i, idx),
 732                                    veb->stat_offsets_loaded,
 733                                    &veb_oes->tc_tx_bytes[i],
 734                                    &veb_es->tc_tx_bytes[i]);
 735         }
 736         veb->stat_offsets_loaded = true;
 737 }
 738
 739 /**
 740  * i40e_update_vsi_stats - Update the vsi statistics counters.
 741  * @vsi: the VSI to be updated
 742  *
 743  * There are a few instances where we store the same stat in a
 744  * couple of different structs.  This is partly because we have
 745  * the netdev stats that need to be filled out, which is slightly
 746  * different from the "eth_stats" defined by the chip and used in
 747  * VF communications.  We sort it out here.
 748  **/
 749 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
 750 {
 751         struct i40e_pf *pf = vsi->back;
 752         struct rtnl_link_stats64 *ons;
 753         struct rtnl_link_stats64 *ns;   /* netdev stats */
 754         struct i40e_eth_stats *oes;
 755         struct i40e_eth_stats *es;     /* device's eth stats */
 756         u32 tx_restart, tx_busy;
 757         struct i40e_ring *p;
 758         u32 rx_page, rx_buf;
 759         u64 bytes, packets;
 760         unsigned int start;
 761         u64 tx_linearize;
 762         u64 tx_force_wb;
 763         u64 rx_p, rx_b;
 764         u64 tx_p, tx_b;
 765         u16 q;
 766
 767         if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
 768             test_bit(__I40E_CONFIG_BUSY, pf->state))
 769                 return;
 770
 771         ns = i40e_get_vsi_stats_struct(vsi);
 772         ons = &vsi->net_stats_offsets;
 773         es = &vsi->eth_stats;
 774         oes = &vsi->eth_stats_offsets;
 775
 776         /* Gather up the netdev and vsi stats that the driver collects
 777          * on the fly during packet processing
 778          */
 779         rx_b = rx_p = 0;
 780         tx_b = tx_p = 0;
 781         tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
 782         rx_page = 0;
 783         rx_buf = 0;
 784         rcu_read_lock();
 785         for (q = 0; q < vsi->num_queue_pairs; q++) {
 786                 /* locate Tx ring */
 787                 p = READ_ONCE(vsi->tx_rings[q]);
 788                 if (!p)
 789                         continue;
 790
 791                 do {
 792                         start = u64_stats_fetch_begin_irq(&p->syncp);
 793                         packets = p->stats.packets;
 794                         bytes = p->stats.bytes;
 795                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 796                 tx_b += bytes;
 797                 tx_p += packets;
 798                 tx_restart += p->tx_stats.restart_queue;
 799                 tx_busy += p->tx_stats.tx_busy;
 800                 tx_linearize += p->tx_stats.tx_linearize;
 801                 tx_force_wb += p->tx_stats.tx_force_wb;
 802
 803                 /* locate Rx ring */
 804                 p = READ_ONCE(vsi->rx_rings[q]);
 805                 if (!p)
 806                         continue;
 807
 808                 do {
 809                         start = u64_stats_fetch_begin_irq(&p->syncp);
 810                         packets = p->stats.packets;
 811                         bytes = p->stats.bytes;
 812                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 813                 rx_b += bytes;
 814                 rx_p += packets;
 815                 rx_buf += p->rx_stats.alloc_buff_failed;
 816                 rx_page += p->rx_stats.alloc_page_failed;
 817
 818                 if (i40e_enabled_xdp_vsi(vsi)) {
 819                         /* locate XDP ring */
 820                         p = READ_ONCE(vsi->xdp_rings[q]);
 821                         if (!p)
 822                                 continue;
 823
 824                         do {
 825                                 start = u64_stats_fetch_begin_irq(&p->syncp);
 826                                 packets = p->stats.packets;
 827                                 bytes = p->stats.bytes;
 828                         } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 829                         tx_b += bytes;
 830                         tx_p += packets;
 831                         tx_restart += p->tx_stats.restart_queue;
 832                         tx_busy += p->tx_stats.tx_busy;
 833                         tx_linearize += p->tx_stats.tx_linearize;
 834                         tx_force_wb += p->tx_stats.tx_force_wb;
 835                 }
 836         }
 837         rcu_read_unlock();
 838         vsi->tx_restart = tx_restart;
 839         vsi->tx_busy = tx_busy;
 840         vsi->tx_linearize = tx_linearize;
 841         vsi->tx_force_wb = tx_force_wb;
 842         vsi->rx_page_failed = rx_page;
 843         vsi->rx_buf_failed = rx_buf;
 844
 845         ns->rx_packets = rx_p;
 846         ns->rx_bytes = rx_b;
 847         ns->tx_packets = tx_p;
 848         ns->tx_bytes = tx_b;
 849
 850         /* update netdev stats from eth stats */
 851         i40e_update_eth_stats(vsi);
 852         ons->tx_errors = oes->tx_errors;
 853         ns->tx_errors = es->tx_errors;
 854         ons->multicast = oes->rx_multicast;
 855         ns->multicast = es->rx_multicast;
 856         ons->rx_dropped = oes->rx_discards;
 857         ns->rx_dropped = es->rx_discards;
 858         ons->tx_dropped = oes->tx_discards;
 859         ns->tx_dropped = es->tx_discards;
 860
 861         /* pull in a couple PF stats if this is the main vsi */
 862         if (vsi == pf->vsi[pf->lan_vsi]) {
 863                 ns->rx_crc_errors = pf->stats.crc_errors;
 864                 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
 865                 ns->rx_length_errors = pf->stats.rx_length_errors;
 866         }
 867 }
 868
 869 /**
 870  * i40e_update_pf_stats - Update the PF statistics counters.
 871  * @pf: the PF to be updated
 872  **/
 873 static void i40e_update_pf_stats(struct i40e_pf *pf)
 874 {
 875         struct i40e_hw_port_stats *osd = &pf->stats_offsets;
 876         struct i40e_hw_port_stats *nsd = &pf->stats;
 877         struct i40e_hw *hw = &pf->hw;
 878         u32 val;
 879         int i;
 880
 881         i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
 882                            I40E_GLPRT_GORCL(hw->port),
 883                            pf->stat_offsets_loaded,
 884                            &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
 885         i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
 886                            I40E_GLPRT_GOTCL(hw->port),
 887                            pf->stat_offsets_loaded,
 888                            &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
 889         i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
 890                            pf->stat_offsets_loaded,
 891                            &osd->eth.rx_discards,
 892                            &nsd->eth.rx_discards);
 893         i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
 894                            I40E_GLPRT_UPRCL(hw->port),
 895                            pf->stat_offsets_loaded,
 896                            &osd->eth.rx_unicast,
 897                            &nsd->eth.rx_unicast);
 898         i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
 899                            I40E_GLPRT_MPRCL(hw->port),
 900                            pf->stat_offsets_loaded,
 901                            &osd->eth.rx_multicast,
 902                            &nsd->eth.rx_multicast);
 903         i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
 904                            I40E_GLPRT_BPRCL(hw->port),
 905                            pf->stat_offsets_loaded,
 906                            &osd->eth.rx_broadcast,
 907                            &nsd->eth.rx_broadcast);
 908         i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
 909                            I40E_GLPRT_UPTCL(hw->port),
 910                            pf->stat_offsets_loaded,
 911                            &osd->eth.tx_unicast,
 912                            &nsd->eth.tx_unicast);
 913         i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
 914                            I40E_GLPRT_MPTCL(hw->port),
 915                            pf->stat_offsets_loaded,
 916                            &osd->eth.tx_multicast,
 917                            &nsd->eth.tx_multicast);
 918         i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
 919                            I40E_GLPRT_BPTCL(hw->port),
 920                            pf->stat_offsets_loaded,
 921                            &osd->eth.tx_broadcast,
 922                            &nsd->eth.tx_broadcast);
 923
 924         i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
 925                            pf->stat_offsets_loaded,
 926                            &osd->tx_dropped_link_down,
 927                            &nsd->tx_dropped_link_down);
 928
 929         i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
 930                            pf->stat_offsets_loaded,
 931                            &osd->crc_errors, &nsd->crc_errors);
 932
 933         i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
 934                            pf->stat_offsets_loaded,
 935                            &osd->illegal_bytes, &nsd->illegal_bytes);
 936
 937         i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
 938                            pf->stat_offsets_loaded,
 939                            &osd->mac_local_faults,
 940                            &nsd->mac_local_faults);
 941         i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
 942                            pf->stat_offsets_loaded,
 943                            &osd->mac_remote_faults,
 944                            &nsd->mac_remote_faults);
 945
 946         i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
 947                            pf->stat_offsets_loaded,
 948                            &osd->rx_length_errors,
 949                            &nsd->rx_length_errors);
 950
 951         i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
 952                            pf->stat_offsets_loaded,
 953                            &osd->link_xon_rx, &nsd->link_xon_rx);
 954         i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
 955                            pf->stat_offsets_loaded,
 956                            &osd->link_xon_tx, &nsd->link_xon_tx);
 957         i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
 958                            pf->stat_offsets_loaded,
 959                            &osd->link_xoff_rx, &nsd->link_xoff_rx);
 960         i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
 961                            pf->stat_offsets_loaded,
 962                            &osd->link_xoff_tx, &nsd->link_xoff_tx);
 963
 964         for (i = 0; i < 8; i++) {
 965                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
 966                                    pf->stat_offsets_loaded,
 967                                    &osd->priority_xoff_rx[i],
 968                                    &nsd->priority_xoff_rx[i]);
 969                 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
 970                                    pf->stat_offsets_loaded,
 971                                    &osd->priority_xon_rx[i],
 972                                    &nsd->priority_xon_rx[i]);
 973                 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
 974                                    pf->stat_offsets_loaded,
 975                                    &osd->priority_xon_tx[i],
 976                                    &nsd->priority_xon_tx[i]);
 977                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
 978                                    pf->stat_offsets_loaded,
 979                                    &osd->priority_xoff_tx[i],
 980                                    &nsd->priority_xoff_tx[i]);
 981                 i40e_stat_update32(hw,
 982                                    I40E_GLPRT_RXON2OFFCNT(hw->port, i),
 983                                    pf->stat_offsets_loaded,
 984                                    &osd->priority_xon_2_xoff[i],
 985                                    &nsd->priority_xon_2_xoff[i]);
 986         }
 987
 988         i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
 989                            I40E_GLPRT_PRC64L(hw->port),
 990                            pf->stat_offsets_loaded,
 991                            &osd->rx_size_64, &nsd->rx_size_64);
 992         i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
 993                            I40E_GLPRT_PRC127L(hw->port),
 994                            pf->stat_offsets_loaded,
 995                            &osd->rx_size_127, &nsd->rx_size_127);
 996         i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
 997                            I40E_GLPRT_PRC255L(hw->port),
 998                            pf->stat_offsets_loaded,
 999                            &osd->rx_size_255, &nsd->rx_size_255);
1000         i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1001                            I40E_GLPRT_PRC511L(hw->port),
1002                            pf->stat_offsets_loaded,
1003                            &osd->rx_size_511, &nsd->rx_size_511);
1004         i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1005                            I40E_GLPRT_PRC1023L(hw->port),
1006                            pf->stat_offsets_loaded,
1007                            &osd->rx_size_1023, &nsd->rx_size_1023);
1008         i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1009                            I40E_GLPRT_PRC1522L(hw->port),
1010                            pf->stat_offsets_loaded,
1011                            &osd->rx_size_1522, &nsd->rx_size_1522);
1012         i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1013                            I40E_GLPRT_PRC9522L(hw->port),
1014                            pf->stat_offsets_loaded,
1015                            &osd->rx_size_big, &nsd->rx_size_big);
1016
1017         i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1018                            I40E_GLPRT_PTC64L(hw->port),
1019                            pf->stat_offsets_loaded,
1020                            &osd->tx_size_64, &nsd->tx_size_64);
1021         i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1022                            I40E_GLPRT_PTC127L(hw->port),
1023                            pf->stat_offsets_loaded,
1024                            &osd->tx_size_127, &nsd->tx_size_127);
1025         i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1026                            I40E_GLPRT_PTC255L(hw->port),
1027                            pf->stat_offsets_loaded,
1028                            &osd->tx_size_255, &nsd->tx_size_255);
1029         i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1030                            I40E_GLPRT_PTC511L(hw->port),
1031                            pf->stat_offsets_loaded,
1032                            &osd->tx_size_511, &nsd->tx_size_511);
1033         i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1034                            I40E_GLPRT_PTC1023L(hw->port),
1035                            pf->stat_offsets_loaded,
1036                            &osd->tx_size_1023, &nsd->tx_size_1023);
1037         i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1038                            I40E_GLPRT_PTC1522L(hw->port),
1039                            pf->stat_offsets_loaded,
1040                            &osd->tx_size_1522, &nsd->tx_size_1522);
1041         i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1042                            I40E_GLPRT_PTC9522L(hw->port),
1043                            pf->stat_offsets_loaded,
1044                            &osd->tx_size_big, &nsd->tx_size_big);
1045
1046         i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1047                            pf->stat_offsets_loaded,
1048                            &osd->rx_undersize, &nsd->rx_undersize);
1049         i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1050                            pf->stat_offsets_loaded,
1051                            &osd->rx_fragments, &nsd->rx_fragments);
1052         i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1053                            pf->stat_offsets_loaded,
1054                            &osd->rx_oversize, &nsd->rx_oversize);
1055         i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1056                            pf->stat_offsets_loaded,
1057                            &osd->rx_jabber, &nsd->rx_jabber);
1058
1059         /* FDIR stats */
1060         i40e_stat_update_and_clear32(hw,
1061                         I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1062                         &nsd->fd_atr_match);
1063         i40e_stat_update_and_clear32(hw,
1064                         I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1065                         &nsd->fd_sb_match);
1066         i40e_stat_update_and_clear32(hw,
1067                         I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1068                         &nsd->fd_atr_tunnel_match);
1069
1070         val = rd32(hw, I40E_PRTPM_EEE_STAT);
1071         nsd->tx_lpi_status =
1072                        (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1073                         I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1074         nsd->rx_lpi_status =
1075                        (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1076                         I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1077         i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1078                            pf->stat_offsets_loaded,
1079                            &osd->tx_lpi_count, &nsd->tx_lpi_count);
1080         i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1081                            pf->stat_offsets_loaded,
1082                            &osd->rx_lpi_count, &nsd->rx_lpi_count);
1083
1084         if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1085             !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1086                 nsd->fd_sb_status = true;
1087         else
1088                 nsd->fd_sb_status = false;
1089
1090         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1091             !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1092                 nsd->fd_atr_status = true;
1093         else
1094                 nsd->fd_atr_status = false;
1095
1096         pf->stat_offsets_loaded = true;
1097 }
1098
1099 /**
1100  * i40e_update_stats - Update the various statistics counters.
1101  * @vsi: the VSI to be updated
1102  *
1103  * Update the various stats for this VSI and its related entities.
1104  **/
1105 void i40e_update_stats(struct i40e_vsi *vsi)
1106 {
1107         struct i40e_pf *pf = vsi->back;
1108
1109         if (vsi == pf->vsi[pf->lan_vsi])
1110                 i40e_update_pf_stats(pf);
1111
1112         i40e_update_vsi_stats(vsi);
1113 }
1114
1115 /**
1116  * i40e_count_filters - counts VSI mac filters
1117  * @vsi: the VSI to be searched
1118  *
1119  * Returns count of mac filters
1120  **/
1121 int i40e_count_filters(struct i40e_vsi *vsi)
1122 {
1123         struct i40e_mac_filter *f;
1124         struct hlist_node *h;
1125         int bkt;
1126         int cnt = 0;
1127
1128         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1129                 ++cnt;
1130
1131         return cnt;
1132 }
1133
1134 /**
1135  * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1136  * @vsi: the VSI to be searched
1137  * @macaddr: the MAC address
1138  * @vlan: the vlan
1139  *
1140  * Returns ptr to the filter object or NULL
1141  **/
1142 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1143                                                 const u8 *macaddr, s16 vlan)
1144 {
1145         struct i40e_mac_filter *f;
1146         u64 key;
1147
1148         if (!vsi || !macaddr)
1149                 return NULL;
1150
1151         key = i40e_addr_to_hkey(macaddr);
1152         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1153                 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1154                     (vlan == f->vlan))
1155                         return f;
1156         }
1157         return NULL;
1158 }
1159
1160 /**
1161  * i40e_find_mac - Find a mac addr in the macvlan filters list
1162  * @vsi: the VSI to be searched
1163  * @macaddr: the MAC address we are searching for
1164  *
1165  * Returns the first filter with the provided MAC address or NULL if
1166  * MAC address was not found
1167  **/
1168 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1169 {
1170         struct i40e_mac_filter *f;
1171         u64 key;
1172
1173         if (!vsi || !macaddr)
1174                 return NULL;
1175
1176         key = i40e_addr_to_hkey(macaddr);
1177         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1178                 if ((ether_addr_equal(macaddr, f->macaddr)))
1179                         return f;
1180         }
1181         return NULL;
1182 }
1183
1184 /**
1185  * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1186  * @vsi: the VSI to be searched
1187  *
1188  * Returns true if VSI is in vlan mode or false otherwise
1189  **/
1190 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1191 {
1192         /* If we have a PVID, always operate in VLAN mode */
1193         if (vsi->info.pvid)
1194                 return true;
1195
1196         /* We need to operate in VLAN mode whenever we have any filters with
1197          * a VLAN other than I40E_VLAN_ALL. We could check the table each
1198          * time, incurring search cost repeatedly. However, we can notice two
1199          * things:
1200          *
1201          * 1) the only place where we can gain a VLAN filter is in
1202          *    i40e_add_filter.
1203          *
1204          * 2) the only place where filters are actually removed is in
1205          *    i40e_sync_filters_subtask.
1206          *
1207          * Thus, we can simply use a boolean value, has_vlan_filters which we
1208          * will set to true when we add a VLAN filter in i40e_add_filter. Then
1209          * we have to perform the full search after deleting filters in
1210          * i40e_sync_filters_subtask, but we already have to search
1211          * filters here and can perform the check at the same time. This
1212          * results in avoiding embedding a loop for VLAN mode inside another
1213          * loop over all the filters, and should maintain correctness as noted
1214          * above.
1215          */
1216         return vsi->has_vlan_filter;
1217 }
1218
1219 /**
1220  * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1221  * @vsi: the VSI to configure
1222  * @tmp_add_list: list of filters ready to be added
1223  * @tmp_del_list: list of filters ready to be deleted
1224  * @vlan_filters: the number of active VLAN filters
1225  *
1226  * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1227  * behave as expected. If we have any active VLAN filters remaining or about
1228  * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1229  * so that they only match against untagged traffic. If we no longer have any
1230  * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1231  * so that they match against both tagged and untagged traffic. In this way,
1232  * we ensure that we correctly receive the desired traffic. This ensures that
1233  * when we have an active VLAN we will receive only untagged traffic and
1234  * traffic matching active VLANs. If we have no active VLANs then we will
1235  * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1236  *
1237  * Finally, in a similar fashion, this function also corrects filters when
1238  * there is an active PVID assigned to this VSI.
1239  *
1240  * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1241  *
1242  * This function is only expected to be called from within
1243  * i40e_sync_vsi_filters.
1244  *
1245  * NOTE: This function expects to be called while under the
1246  * mac_filter_hash_lock
1247  */
1248 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1249                                          struct hlist_head *tmp_add_list,
1250                                          struct hlist_head *tmp_del_list,
1251                                          int vlan_filters)
1252 {
1253         s16 pvid = le16_to_cpu(vsi->info.pvid);
1254         struct i40e_mac_filter *f, *add_head;
1255         struct i40e_new_mac_filter *new;
1256         struct hlist_node *h;
1257         int bkt, new_vlan;
1258
1259         /* To determine if a particular filter needs to be replaced we
1260          * have the three following conditions:
1261          *
1262          * a) if we have a PVID assigned, then all filters which are
1263          *    not marked as VLAN=PVID must be replaced with filters that
1264          *    are.
1265          * b) otherwise, if we have any active VLANS, all filters
1266          *    which are marked as VLAN=-1 must be replaced with
1267          *    filters marked as VLAN=0
1268          * c) finally, if we do not have any active VLANS, all filters
1269          *    which are marked as VLAN=0 must be replaced with filters
1270          *    marked as VLAN=-1
1271          */
1272
1273         /* Update the filters about to be added in place */
1274         hlist_for_each_entry(new, tmp_add_list, hlist) {
1275                 if (pvid && new->f->vlan != pvid)
1276                         new->f->vlan = pvid;
1277                 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1278                         new->f->vlan = 0;
1279                 else if (!vlan_filters && new->f->vlan == 0)
1280                         new->f->vlan = I40E_VLAN_ANY;
1281         }
1282
1283         /* Update the remaining active filters */
1284         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1285                 /* Combine the checks for whether a filter needs to be changed
1286                  * and then determine the new VLAN inside the if block, in
1287                  * order to avoid duplicating code for adding the new filter
1288                  * then deleting the old filter.
1289                  */
1290                 if ((pvid && f->vlan != pvid) ||
1291                     (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1292                     (!vlan_filters && f->vlan == 0)) {
1293                         /* Determine the new vlan we will be adding */
1294                         if (pvid)
1295                                 new_vlan = pvid;
1296                         else if (vlan_filters)
1297                                 new_vlan = 0;
1298                         else
1299                                 new_vlan = I40E_VLAN_ANY;
1300
1301                         /* Create the new filter */
1302                         add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1303                         if (!add_head)
1304                                 return -ENOMEM;
1305
1306                         /* Create a temporary i40e_new_mac_filter */
1307                         new = kzalloc(sizeof(*new), GFP_ATOMIC);
1308                         if (!new)
1309                                 return -ENOMEM;
1310
1311                         new->f = add_head;
1312                         new->state = add_head->state;
1313
1314                         /* Add the new filter to the tmp list */
1315                         hlist_add_head(&new->hlist, tmp_add_list);
1316
1317                         /* Put the original filter into the delete list */
1318                         f->state = I40E_FILTER_REMOVE;
1319                         hash_del(&f->hlist);
1320                         hlist_add_head(&f->hlist, tmp_del_list);
1321                 }
1322         }
1323
1324         vsi->has_vlan_filter = !!vlan_filters;
1325
1326         return 0;
1327 }
1328
1329 /**
1330  * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1331  * @vsi: the PF Main VSI - inappropriate for any other VSI
1332  * @macaddr: the MAC address
1333  *
1334  * Remove whatever filter the firmware set up so the driver can manage
1335  * its own filtering intelligently.
1336  **/
1337 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1338 {
1339         struct i40e_aqc_remove_macvlan_element_data element;
1340         struct i40e_pf *pf = vsi->back;
1341
1342         /* Only appropriate for the PF main VSI */
1343         if (vsi->type != I40E_VSI_MAIN)
1344                 return;
1345
1346         memset(&element, 0, sizeof(element));
1347         ether_addr_copy(element.mac_addr, macaddr);
1348         element.vlan_tag = 0;
1349         /* Ignore error returns, some firmware does it this way... */
1350         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1351         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1352
1353         memset(&element, 0, sizeof(element));
1354         ether_addr_copy(element.mac_addr, macaddr);
1355         element.vlan_tag = 0;
1356         /* ...and some firmware does it this way. */
1357         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1358                         I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1359         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1360 }
1361
1362 /**
1363  * i40e_add_filter - Add a mac/vlan filter to the VSI
1364  * @vsi: the VSI to be searched
1365  * @macaddr: the MAC address
1366  * @vlan: the vlan
1367  *
1368  * Returns ptr to the filter object or NULL when no memory available.
1369  *
1370  * NOTE: This function is expected to be called with mac_filter_hash_lock
1371  * being held.
1372  **/
1373 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1374                                         const u8 *macaddr, s16 vlan)
1375 {
1376         struct i40e_mac_filter *f;
1377         u64 key;
1378
1379         if (!vsi || !macaddr)
1380                 return NULL;
1381
1382         f = i40e_find_filter(vsi, macaddr, vlan);
1383         if (!f) {
1384                 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1385                 if (!f)
1386                         return NULL;
1387
1388                 /* Update the boolean indicating if we need to function in
1389                  * VLAN mode.
1390                  */
1391                 if (vlan >= 0)
1392                         vsi->has_vlan_filter = true;
1393
1394                 ether_addr_copy(f->macaddr, macaddr);
1395                 f->vlan = vlan;
1396                 f->state = I40E_FILTER_NEW;
1397                 INIT_HLIST_NODE(&f->hlist);
1398
1399                 key = i40e_addr_to_hkey(macaddr);
1400                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1401
1402                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1403                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1404         }
1405
1406         /* If we're asked to add a filter that has been marked for removal, it
1407          * is safe to simply restore it to active state. __i40e_del_filter
1408          * will have simply deleted any filters which were previously marked
1409          * NEW or FAILED, so if it is currently marked REMOVE it must have
1410          * previously been ACTIVE. Since we haven't yet run the sync filters
1411          * task, just restore this filter to the ACTIVE state so that the
1412          * sync task leaves it in place
1413          */
1414         if (f->state == I40E_FILTER_REMOVE)
1415                 f->state = I40E_FILTER_ACTIVE;
1416
1417         return f;
1418 }
1419
1420 /**
1421  * __i40e_del_filter - Remove a specific filter from the VSI
1422  * @vsi: VSI to remove from
1423  * @f: the filter to remove from the list
1424  *
1425  * This function should be called instead of i40e_del_filter only if you know
1426  * the exact filter you will remove already, such as via i40e_find_filter or
1427  * i40e_find_mac.
1428  *
1429  * NOTE: This function is expected to be called with mac_filter_hash_lock
1430  * being held.
1431  * ANOTHER NOTE: This function MUST be called from within the context of
1432  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1433  * instead of list_for_each_entry().
1434  **/
1435 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1436 {
1437         if (!f)
1438                 return;
1439
1440         /* If the filter was never added to firmware then we can just delete it
1441          * directly and we don't want to set the status to remove or else an
1442          * admin queue command will unnecessarily fire.
1443          */
1444         if ((f->state == I40E_FILTER_FAILED) ||
1445             (f->state == I40E_FILTER_NEW)) {
1446                 hash_del(&f->hlist);
1447                 kfree(f);
1448         } else {
1449                 f->state = I40E_FILTER_REMOVE;
1450         }
1451
1452         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1453         set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1454 }
1455
1456 /**
1457  * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1458  * @vsi: the VSI to be searched
1459  * @macaddr: the MAC address
1460  * @vlan: the VLAN
1461  *
1462  * NOTE: This function is expected to be called with mac_filter_hash_lock
1463  * being held.
1464  * ANOTHER NOTE: This function MUST be called from within the context of
1465  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1466  * instead of list_for_each_entry().
1467  **/
1468 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1469 {
1470         struct i40e_mac_filter *f;
1471
1472         if (!vsi || !macaddr)
1473                 return;
1474
1475         f = i40e_find_filter(vsi, macaddr, vlan);
1476         __i40e_del_filter(vsi, f);
1477 }
1478
1479 /**
1480  * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1481  * @vsi: the VSI to be searched
1482  * @macaddr: the mac address to be filtered
1483  *
1484  * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1485  * go through all the macvlan filters and add a macvlan filter for each
1486  * unique vlan that already exists. If a PVID has been assigned, instead only
1487  * add the macaddr to that VLAN.
1488  *
1489  * Returns last filter added on success, else NULL
1490  **/
1491 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1492                                             const u8 *macaddr)
1493 {
1494         struct i40e_mac_filter *f, *add = NULL;
1495         struct hlist_node *h;
1496         int bkt;
1497
1498         if (vsi->info.pvid)
1499                 return i40e_add_filter(vsi, macaddr,
1500                                        le16_to_cpu(vsi->info.pvid));
1501
1502         if (!i40e_is_vsi_in_vlan(vsi))
1503                 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1504
1505         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1506                 if (f->state == I40E_FILTER_REMOVE)
1507                         continue;
1508                 add = i40e_add_filter(vsi, macaddr, f->vlan);
1509                 if (!add)
1510                         return NULL;
1511         }
1512
1513         return add;
1514 }
1515
1516 /**
1517  * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1518  * @vsi: the VSI to be searched
1519  * @macaddr: the mac address to be removed
1520  *
1521  * Removes a given MAC address from a VSI regardless of what VLAN it has been
1522  * associated with.
1523  *
1524  * Returns 0 for success, or error
1525  **/
1526 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1527 {
1528         struct i40e_mac_filter *f;
1529         struct hlist_node *h;
1530         bool found = false;
1531         int bkt;
1532
1533         lockdep_assert_held(&vsi->mac_filter_hash_lock);
1534         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1535                 if (ether_addr_equal(macaddr, f->macaddr)) {
1536                         __i40e_del_filter(vsi, f);
1537                         found = true;
1538                 }
1539         }
1540
1541         if (found)
1542                 return 0;
1543         else
1544                 return -ENOENT;
1545 }
1546
1547 /**
1548  * i40e_set_mac - NDO callback to set mac address
1549  * @netdev: network interface device structure
1550  * @p: pointer to an address structure
1551  *
1552  * Returns 0 on success, negative on failure
1553  **/
1554 static int i40e_set_mac(struct net_device *netdev, void *p)
1555 {
1556         struct i40e_netdev_priv *np = netdev_priv(netdev);
1557         struct i40e_vsi *vsi = np->vsi;
1558         struct i40e_pf *pf = vsi->back;
1559         struct i40e_hw *hw = &pf->hw;
1560         struct sockaddr *addr = p;
1561
1562         if (!is_valid_ether_addr(addr->sa_data))
1563                 return -EADDRNOTAVAIL;
1564
1565         if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1566                 netdev_info(netdev, "already using mac address %pM\n",
1567                             addr->sa_data);
1568                 return 0;
1569         }
1570
1571         if (test_bit(__I40E_DOWN, pf->state) ||
1572             test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1573                 return -EADDRNOTAVAIL;
1574
1575         if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1576                 netdev_info(netdev, "returning to hw mac address %pM\n",
1577                             hw->mac.addr);
1578         else
1579                 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1580
1581         /* Copy the address first, so that we avoid a possible race with
1582          * .set_rx_mode().
1583          * - Remove old address from MAC filter
1584          * - Copy new address
1585          * - Add new address to MAC filter
1586          */
1587         spin_lock_bh(&vsi->mac_filter_hash_lock);
1588         i40e_del_mac_filter(vsi, netdev->dev_addr);
1589         ether_addr_copy(netdev->dev_addr, addr->sa_data);
1590         i40e_add_mac_filter(vsi, netdev->dev_addr);
1591         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1592
1593         if (vsi->type == I40E_VSI_MAIN) {
1594                 i40e_status ret;
1595
1596                 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1597                                                 addr->sa_data, NULL);
1598                 if (ret)
1599                         netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1600                                     i40e_stat_str(hw, ret),
1601                                     i40e_aq_str(hw, hw->aq.asq_last_status));
1602         }
1603
1604         /* schedule our worker thread which will take care of
1605          * applying the new filter changes
1606          */
1607         i40e_service_event_schedule(pf);
1608         return 0;
1609 }
1610
1611 /**
1612  * i40e_config_rss_aq - Prepare for RSS using AQ commands
1613  * @vsi: vsi structure
1614  * @seed: RSS hash seed
1615  * @lut: pointer to lookup table of lut_size
1616  * @lut_size: size of the lookup table
1617  **/
1618 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1619                               u8 *lut, u16 lut_size)
1620 {
1621         struct i40e_pf *pf = vsi->back;
1622         struct i40e_hw *hw = &pf->hw;
1623         int ret = 0;
1624
1625         if (seed) {
1626                 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1627                         (struct i40e_aqc_get_set_rss_key_data *)seed;
1628                 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1629                 if (ret) {
1630                         dev_info(&pf->pdev->dev,
1631                                  "Cannot set RSS key, err %s aq_err %s\n",
1632                                  i40e_stat_str(hw, ret),
1633                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1634                         return ret;
1635                 }
1636         }
1637         if (lut) {
1638                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1639
1640                 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1641                 if (ret) {
1642                         dev_info(&pf->pdev->dev,
1643                                  "Cannot set RSS lut, err %s aq_err %s\n",
1644                                  i40e_stat_str(hw, ret),
1645                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1646                         return ret;
1647                 }
1648         }
1649         return ret;
1650 }
1651
1652 /**
1653  * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1654  * @vsi: VSI structure
1655  **/
1656 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1657 {
1658         struct i40e_pf *pf = vsi->back;
1659         u8 seed[I40E_HKEY_ARRAY_SIZE];
1660         u8 *lut;
1661         int ret;
1662
1663         if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1664                 return 0;
1665         if (!vsi->rss_size)
1666                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1667                                       vsi->num_queue_pairs);
1668         if (!vsi->rss_size)
1669                 return -EINVAL;
1670         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1671         if (!lut)
1672                 return -ENOMEM;
1673
1674         /* Use the user configured hash keys and lookup table if there is one,
1675          * otherwise use default
1676          */
1677         if (vsi->rss_lut_user)
1678                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1679         else
1680                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1681         if (vsi->rss_hkey_user)
1682                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1683         else
1684                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1685         ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1686         kfree(lut);
1687         return ret;
1688 }
1689
1690 /**
1691  * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1692  * @vsi: the VSI being configured,
1693  * @ctxt: VSI context structure
1694  * @enabled_tc: number of traffic classes to enable
1695  *
1696  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1697  **/
1698 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1699                                            struct i40e_vsi_context *ctxt,
1700                                            u8 enabled_tc)
1701 {
1702         u16 qcount = 0, max_qcount, qmap, sections = 0;
1703         int i, override_q, pow, num_qps, ret;
1704         u8 netdev_tc = 0, offset = 0;
1705
1706         if (vsi->type != I40E_VSI_MAIN)
1707                 return -EINVAL;
1708         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1709         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1710         vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1711         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1712         num_qps = vsi->mqprio_qopt.qopt.count[0];
1713
1714         /* find the next higher power-of-2 of num queue pairs */
1715         pow = ilog2(num_qps);
1716         if (!is_power_of_2(num_qps))
1717                 pow++;
1718         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1719                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1720
1721         /* Setup queue offset/count for all TCs for given VSI */
1722         max_qcount = vsi->mqprio_qopt.qopt.count[0];
1723         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1724                 /* See if the given TC is enabled for the given VSI */
1725                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1726                         offset = vsi->mqprio_qopt.qopt.offset[i];
1727                         qcount = vsi->mqprio_qopt.qopt.count[i];
1728                         if (qcount > max_qcount)
1729                                 max_qcount = qcount;
1730                         vsi->tc_config.tc_info[i].qoffset = offset;
1731                         vsi->tc_config.tc_info[i].qcount = qcount;
1732                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1733                 } else {
1734                         /* TC is not enabled so set the offset to
1735                          * default queue and allocate one queue
1736                          * for the given TC.
1737                          */
1738                         vsi->tc_config.tc_info[i].qoffset = 0;
1739                         vsi->tc_config.tc_info[i].qcount = 1;
1740                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1741                 }
1742         }
1743
1744         /* Set actual Tx/Rx queue pairs */
1745         vsi->num_queue_pairs = offset + qcount;
1746
1747         /* Setup queue TC[0].qmap for given VSI context */
1748         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1749         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1750         ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1751         ctxt->info.valid_sections |= cpu_to_le16(sections);
1752
1753         /* Reconfigure RSS for main VSI with max queue count */
1754         vsi->rss_size = max_qcount;
1755         ret = i40e_vsi_config_rss(vsi);
1756         if (ret) {
1757                 dev_info(&vsi->back->pdev->dev,
1758                          "Failed to reconfig rss for num_queues (%u)\n",
1759                          max_qcount);
1760                 return ret;
1761         }
1762         vsi->reconfig_rss = true;
1763         dev_dbg(&vsi->back->pdev->dev,
1764                 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1765
1766         /* Find queue count available for channel VSIs and starting offset
1767          * for channel VSIs
1768          */
1769         override_q = vsi->mqprio_qopt.qopt.count[0];
1770         if (override_q && override_q < vsi->num_queue_pairs) {
1771                 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1772                 vsi->next_base_queue = override_q;
1773         }
1774         return 0;
1775 }
1776
1777 /**
1778  * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1779  * @vsi: the VSI being setup
1780  * @ctxt: VSI context structure
1781  * @enabled_tc: Enabled TCs bitmap
1782  * @is_add: True if called before Add VSI
1783  *
1784  * Setup VSI queue mapping for enabled traffic classes.
1785  **/
1786 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1787                                      struct i40e_vsi_context *ctxt,
1788                                      u8 enabled_tc,
1789                                      bool is_add)
1790 {
1791         struct i40e_pf *pf = vsi->back;
1792         u16 sections = 0;
1793         u8 netdev_tc = 0;
1794         u16 numtc = 1;
1795         u16 qcount;
1796         u8 offset;
1797         u16 qmap;
1798         int i;
1799         u16 num_tc_qps = 0;
1800
1801         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1802         offset = 0;
1803
1804         /* Number of queues per enabled TC */
1805         num_tc_qps = vsi->alloc_queue_pairs;
1806         if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1807                 /* Find numtc from enabled TC bitmap */
1808                 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1809                         if (enabled_tc & BIT(i)) /* TC is enabled */
1810                                 numtc++;
1811                 }
1812                 if (!numtc) {
1813                         dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1814                         numtc = 1;
1815                 }
1816                 num_tc_qps = num_tc_qps / numtc;
1817                 num_tc_qps = min_t(int, num_tc_qps,
1818                                    i40e_pf_get_max_q_per_tc(pf));
1819         }
1820
1821         vsi->tc_config.numtc = numtc;
1822         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1823
1824         /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1825         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1826                 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1827
1828         /* Setup queue offset/count for all TCs for given VSI */
1829         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1830                 /* See if the given TC is enabled for the given VSI */
1831                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1832                         /* TC is enabled */
1833                         int pow, num_qps;
1834
1835                         switch (vsi->type) {
1836                         case I40E_VSI_MAIN:
1837                                 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1838                                     I40E_FLAG_FD_ATR_ENABLED)) ||
1839                                     vsi->tc_config.enabled_tc != 1) {
1840                                         qcount = min_t(int, pf->alloc_rss_size,
1841                                                        num_tc_qps);
1842                                         break;
1843                                 }
1844                                 fallthrough;
1845                         case I40E_VSI_FDIR:
1846                         case I40E_VSI_SRIOV:
1847                         case I40E_VSI_VMDQ2:
1848                         default:
1849                                 qcount = num_tc_qps;
1850                                 WARN_ON(i != 0);
1851                                 break;
1852                         }
1853                         vsi->tc_config.tc_info[i].qoffset = offset;
1854                         vsi->tc_config.tc_info[i].qcount = qcount;
1855
1856                         /* find the next higher power-of-2 of num queue pairs */
1857                         num_qps = qcount;
1858                         pow = 0;
1859                         while (num_qps && (BIT_ULL(pow) < qcount)) {
1860                                 pow++;
1861                                 num_qps >>= 1;
1862                         }
1863
1864                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1865                         qmap =
1866                             (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1867                             (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1868
1869                         offset += qcount;
1870                 } else {
1871                         /* TC is not enabled so set the offset to
1872                          * default queue and allocate one queue
1873                          * for the given TC.
1874                          */
1875                         vsi->tc_config.tc_info[i].qoffset = 0;
1876                         vsi->tc_config.tc_info[i].qcount = 1;
1877                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1878
1879                         qmap = 0;
1880                 }
1881                 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1882         }
1883
1884         /* Set actual Tx/Rx queue pairs */
1885         vsi->num_queue_pairs = offset;
1886         if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1887                 if (vsi->req_queue_pairs > 0)
1888                         vsi->num_queue_pairs = vsi->req_queue_pairs;
1889                 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1890                         vsi->num_queue_pairs = pf->num_lan_msix;
1891         }
1892
1893         /* Scheduler section valid can only be set for ADD VSI */
1894         if (is_add) {
1895                 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1896
1897                 ctxt->info.up_enable_bits = enabled_tc;
1898         }
1899         if (vsi->type == I40E_VSI_SRIOV) {
1900                 ctxt->info.mapping_flags |=
1901                                      cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1902                 for (i = 0; i < vsi->num_queue_pairs; i++)
1903                         ctxt->info.queue_mapping[i] =
1904                                                cpu_to_le16(vsi->base_queue + i);
1905         } else {
1906                 ctxt->info.mapping_flags |=
1907                                         cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1908                 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1909         }
1910         ctxt->info.valid_sections |= cpu_to_le16(sections);
1911 }
1912
1913 /**
1914  * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1915  * @netdev: the netdevice
1916  * @addr: address to add
1917  *
1918  * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1919  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1920  */
1921 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1922 {
1923         struct i40e_netdev_priv *np = netdev_priv(netdev);
1924         struct i40e_vsi *vsi = np->vsi;
1925
1926         if (i40e_add_mac_filter(vsi, addr))
1927                 return 0;
1928         else
1929                 return -ENOMEM;
1930 }
1931
1932 /**
1933  * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1934  * @netdev: the netdevice
1935  * @addr: address to add
1936  *
1937  * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1938  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1939  */
1940 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1941 {
1942         struct i40e_netdev_priv *np = netdev_priv(netdev);
1943         struct i40e_vsi *vsi = np->vsi;
1944
1945         /* Under some circumstances, we might receive a request to delete
1946          * our own device address from our uc list. Because we store the
1947          * device address in the VSI's MAC/VLAN filter list, we need to ignore
1948          * such requests and not delete our device address from this list.
1949          */
1950         if (ether_addr_equal(addr, netdev->dev_addr))
1951                 return 0;
1952
1953         i40e_del_mac_filter(vsi, addr);
1954
1955         return 0;
1956 }
1957
1958 /**
1959  * i40e_set_rx_mode - NDO callback to set the netdev filters
1960  * @netdev: network interface device structure
1961  **/
1962 static void i40e_set_rx_mode(struct net_device *netdev)
1963 {
1964         struct i40e_netdev_priv *np = netdev_priv(netdev);
1965         struct i40e_vsi *vsi = np->vsi;
1966
1967         spin_lock_bh(&vsi->mac_filter_hash_lock);
1968
1969         __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1970         __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1971
1972         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1973
1974         /* check for other flag changes */
1975         if (vsi->current_netdev_flags != vsi->netdev->flags) {
1976                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1977                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1978         }
1979 }
1980
1981 /**
1982  * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1983  * @vsi: Pointer to VSI struct
1984  * @from: Pointer to list which contains MAC filter entries - changes to
1985  *        those entries needs to be undone.
1986  *
1987  * MAC filter entries from this list were slated for deletion.
1988  **/
1989 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1990                                          struct hlist_head *from)
1991 {
1992         struct i40e_mac_filter *f;
1993         struct hlist_node *h;
1994
1995         hlist_for_each_entry_safe(f, h, from, hlist) {
1996                 u64 key = i40e_addr_to_hkey(f->macaddr);
1997
1998                 /* Move the element back into MAC filter list*/
1999                 hlist_del(&f->hlist);
2000                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2001         }
2002 }
2003
2004 /**
2005  * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2006  * @vsi: Pointer to vsi struct
2007  * @from: Pointer to list which contains MAC filter entries - changes to
2008  *        those entries needs to be undone.
2009  *
2010  * MAC filter entries from this list were slated for addition.
2011  **/
2012 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2013                                          struct hlist_head *from)
2014 {
2015         struct i40e_new_mac_filter *new;
2016         struct hlist_node *h;
2017
2018         hlist_for_each_entry_safe(new, h, from, hlist) {
2019                 /* We can simply free the wrapper structure */
2020                 hlist_del(&new->hlist);
2021                 kfree(new);
2022         }
2023 }
2024
2025 /**
2026  * i40e_next_entry - Get the next non-broadcast filter from a list
2027  * @next: pointer to filter in list
2028  *
2029  * Returns the next non-broadcast filter in the list. Required so that we
2030  * ignore broadcast filters within the list, since these are not handled via
2031  * the normal firmware update path.
2032  */
2033 static
2034 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2035 {
2036         hlist_for_each_entry_continue(next, hlist) {
2037                 if (!is_broadcast_ether_addr(next->f->macaddr))
2038                         return next;
2039         }
2040
2041         return NULL;
2042 }
2043
2044 /**
2045  * i40e_update_filter_state - Update filter state based on return data
2046  * from firmware
2047  * @count: Number of filters added
2048  * @add_list: return data from fw
2049  * @add_head: pointer to first filter in current batch
2050  *
2051  * MAC filter entries from list were slated to be added to device. Returns
2052  * number of successful filters. Note that 0 does NOT mean success!
2053  **/
2054 static int
2055 i40e_update_filter_state(int count,
2056                          struct i40e_aqc_add_macvlan_element_data *add_list,
2057                          struct i40e_new_mac_filter *add_head)
2058 {
2059         int retval = 0;
2060         int i;
2061
2062         for (i = 0; i < count; i++) {
2063                 /* Always check status of each filter. We don't need to check
2064                  * the firmware return status because we pre-set the filter
2065                  * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2066                  * request to the adminq. Thus, if it no longer matches then
2067                  * we know the filter is active.
2068                  */
2069                 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2070                         add_head->state = I40E_FILTER_FAILED;
2071                 } else {
2072                         add_head->state = I40E_FILTER_ACTIVE;
2073                         retval++;
2074                 }
2075
2076                 add_head = i40e_next_filter(add_head);
2077                 if (!add_head)
2078                         break;
2079         }
2080
2081         return retval;
2082 }
2083
2084 /**
2085  * i40e_aqc_del_filters - Request firmware to delete a set of filters
2086  * @vsi: ptr to the VSI
2087  * @vsi_name: name to display in messages
2088  * @list: the list of filters to send to firmware
2089  * @num_del: the number of filters to delete
2090  * @retval: Set to -EIO on failure to delete
2091  *
2092  * Send a request to firmware via AdminQ to delete a set of filters. Uses
2093  * *retval instead of a return value so that success does not force ret_val to
2094  * be set to 0. This ensures that a sequence of calls to this function
2095  * preserve the previous value of *retval on successful delete.
2096  */
2097 static
2098 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2099                           struct i40e_aqc_remove_macvlan_element_data *list,
2100                           int num_del, int *retval)
2101 {
2102         struct i40e_hw *hw = &vsi->back->hw;
2103         i40e_status aq_ret;
2104         int aq_err;
2105
2106         aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2107         aq_err = hw->aq.asq_last_status;
2108
2109         /* Explicitly ignore and do not report when firmware returns ENOENT */
2110         if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2111                 *retval = -EIO;
2112                 dev_info(&vsi->back->pdev->dev,
2113                          "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2114                          vsi_name, i40e_stat_str(hw, aq_ret),
2115                          i40e_aq_str(hw, aq_err));
2116         }
2117 }
2118
2119 /**
2120  * i40e_aqc_add_filters - Request firmware to add a set of filters
2121  * @vsi: ptr to the VSI
2122  * @vsi_name: name to display in messages
2123  * @list: the list of filters to send to firmware
2124  * @add_head: Position in the add hlist
2125  * @num_add: the number of filters to add
2126  *
2127  * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2128  * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2129  * space for more filters.
2130  */
2131 static
2132 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2133                           struct i40e_aqc_add_macvlan_element_data *list,
2134                           struct i40e_new_mac_filter *add_head,
2135                           int num_add)
2136 {
2137         struct i40e_hw *hw = &vsi->back->hw;
2138         int aq_err, fcnt;
2139
2140         i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2141         aq_err = hw->aq.asq_last_status;
2142         fcnt = i40e_update_filter_state(num_add, list, add_head);
2143
2144         if (fcnt != num_add) {
2145                 if (vsi->type == I40E_VSI_MAIN) {
2146                         set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2147                         dev_warn(&vsi->back->pdev->dev,
2148                                  "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2149                                  i40e_aq_str(hw, aq_err), vsi_name);
2150                 } else if (vsi->type == I40E_VSI_SRIOV ||
2151                            vsi->type == I40E_VSI_VMDQ1 ||
2152                            vsi->type == I40E_VSI_VMDQ2) {
2153                         dev_warn(&vsi->back->pdev->dev,
2154                                  "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2155                                  i40e_aq_str(hw, aq_err), vsi_name, vsi_name);
2156                 } else {
2157                         dev_warn(&vsi->back->pdev->dev,
2158                                  "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2159                                  i40e_aq_str(hw, aq_err), vsi_name, vsi->type);
2160                 }
2161         }
2162 }
2163
2164 /**
2165  * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2166  * @vsi: pointer to the VSI
2167  * @vsi_name: the VSI name
2168  * @f: filter data
2169  *
2170  * This function sets or clears the promiscuous broadcast flags for VLAN
2171  * filters in order to properly receive broadcast frames. Assumes that only
2172  * broadcast filters are passed.
2173  *
2174  * Returns status indicating success or failure;
2175  **/
2176 static i40e_status
2177 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2178                           struct i40e_mac_filter *f)
2179 {
2180         bool enable = f->state == I40E_FILTER_NEW;
2181         struct i40e_hw *hw = &vsi->back->hw;
2182         i40e_status aq_ret;
2183
2184         if (f->vlan == I40E_VLAN_ANY) {
2185                 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2186                                                    vsi->seid,
2187                                                    enable,
2188                                                    NULL);
2189         } else {
2190                 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2191                                                             vsi->seid,
2192                                                             enable,
2193                                                             f->vlan,
2194                                                             NULL);
2195         }
2196
2197         if (aq_ret) {
2198                 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2199                 dev_warn(&vsi->back->pdev->dev,
2200                          "Error %s, forcing overflow promiscuous on %s\n",
2201                          i40e_aq_str(hw, hw->aq.asq_last_status),
2202                          vsi_name);
2203         }
2204
2205         return aq_ret;
2206 }
2207
2208 /**
2209  * i40e_set_promiscuous - set promiscuous mode
2210  * @pf: board private structure
2211  * @promisc: promisc on or off
2212  *
2213  * There are different ways of setting promiscuous mode on a PF depending on
2214  * what state/environment we're in.  This identifies and sets it appropriately.
2215  * Returns 0 on success.
2216  **/
2217 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2218 {
2219         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2220         struct i40e_hw *hw = &pf->hw;
2221         i40e_status aq_ret;
2222
2223         if (vsi->type == I40E_VSI_MAIN &&
2224             pf->lan_veb != I40E_NO_VEB &&
2225             !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2226                 /* set defport ON for Main VSI instead of true promisc
2227                  * this way we will get all unicast/multicast and VLAN
2228                  * promisc behavior but will not get VF or VMDq traffic
2229                  * replicated on the Main VSI.
2230                  */
2231                 if (promisc)
2232                         aq_ret = i40e_aq_set_default_vsi(hw,
2233                                                          vsi->seid,
2234                                                          NULL);
2235                 else
2236                         aq_ret = i40e_aq_clear_default_vsi(hw,
2237                                                            vsi->seid,
2238                                                            NULL);
2239                 if (aq_ret) {
2240                         dev_info(&pf->pdev->dev,
2241                                  "Set default VSI failed, err %s, aq_err %s\n",
2242                                  i40e_stat_str(hw, aq_ret),
2243                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2244                 }
2245         } else {
2246                 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2247                                                   hw,
2248                                                   vsi->seid,
2249                                                   promisc, NULL,
2250                                                   true);
2251                 if (aq_ret) {
2252                         dev_info(&pf->pdev->dev,
2253                                  "set unicast promisc failed, err %s, aq_err %s\n",
2254                                  i40e_stat_str(hw, aq_ret),
2255                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2256                 }
2257                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2258                                                   hw,
2259                                                   vsi->seid,
2260                                                   promisc, NULL);
2261                 if (aq_ret) {
2262                         dev_info(&pf->pdev->dev,
2263                                  "set multicast promisc failed, err %s, aq_err %s\n",
2264                                  i40e_stat_str(hw, aq_ret),
2265                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2266                 }
2267         }
2268
2269         if (!aq_ret)
2270                 pf->cur_promisc = promisc;
2271
2272         return aq_ret;
2273 }
2274
2275 /**
2276  * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2277  * @vsi: ptr to the VSI
2278  *
2279  * Push any outstanding VSI filter changes through the AdminQ.
2280  *
2281  * Returns 0 or error value
2282  **/
2283 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2284 {
2285         struct hlist_head tmp_add_list, tmp_del_list;
2286         struct i40e_mac_filter *f;
2287         struct i40e_new_mac_filter *new, *add_head = NULL;
2288         struct i40e_hw *hw = &vsi->back->hw;
2289         bool old_overflow, new_overflow;
2290         unsigned int failed_filters = 0;
2291         unsigned int vlan_filters = 0;
2292         char vsi_name[16] = "PF";
2293         int filter_list_len = 0;
2294         i40e_status aq_ret = 0;
2295         u32 changed_flags = 0;
2296         struct hlist_node *h;
2297         struct i40e_pf *pf;
2298         int num_add = 0;
2299         int num_del = 0;
2300         int retval = 0;
2301         u16 cmd_flags;
2302         int list_size;
2303         int bkt;
2304
2305         /* empty array typed pointers, kcalloc later */
2306         struct i40e_aqc_add_macvlan_element_data *add_list;
2307         struct i40e_aqc_remove_macvlan_element_data *del_list;
2308
2309         while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2310                 usleep_range(1000, 2000);
2311         pf = vsi->back;
2312
2313         old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2314
2315         if (vsi->netdev) {
2316                 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2317                 vsi->current_netdev_flags = vsi->netdev->flags;
2318         }
2319
2320         INIT_HLIST_HEAD(&tmp_add_list);
2321         INIT_HLIST_HEAD(&tmp_del_list);
2322
2323         if (vsi->type == I40E_VSI_SRIOV)
2324                 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2325         else if (vsi->type != I40E_VSI_MAIN)
2326                 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2327
2328         if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2329                 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2330
2331                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2332                 /* Create a list of filters to delete. */
2333                 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2334                         if (f->state == I40E_FILTER_REMOVE) {
2335                                 /* Move the element into temporary del_list */
2336                                 hash_del(&f->hlist);
2337                                 hlist_add_head(&f->hlist, &tmp_del_list);
2338
2339                                 /* Avoid counting removed filters */
2340                                 continue;
2341                         }
2342                         if (f->state == I40E_FILTER_NEW) {
2343                                 /* Create a temporary i40e_new_mac_filter */
2344                                 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2345                                 if (!new)
2346                                         goto err_no_memory_locked;
2347
2348                                 /* Store pointer to the real filter */
2349                                 new->f = f;
2350                                 new->state = f->state;
2351
2352                                 /* Add it to the hash list */
2353                                 hlist_add_head(&new->hlist, &tmp_add_list);
2354                         }
2355
2356                         /* Count the number of active (current and new) VLAN
2357                          * filters we have now. Does not count filters which
2358                          * are marked for deletion.
2359                          */
2360                         if (f->vlan > 0)
2361                                 vlan_filters++;
2362                 }
2363
2364                 retval = i40e_correct_mac_vlan_filters(vsi,
2365                                                        &tmp_add_list,
2366                                                        &tmp_del_list,
2367                                                        vlan_filters);
2368                 if (retval)
2369                         goto err_no_memory_locked;
2370
2371                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2372         }
2373
2374         /* Now process 'del_list' outside the lock */
2375         if (!hlist_empty(&tmp_del_list)) {
2376                 filter_list_len = hw->aq.asq_buf_size /
2377                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2378                 list_size = filter_list_len *
2379                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2380                 del_list = kzalloc(list_size, GFP_ATOMIC);
2381                 if (!del_list)
2382                         goto err_no_memory;
2383
2384                 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2385                         cmd_flags = 0;
2386
2387                         /* handle broadcast filters by updating the broadcast
2388                          * promiscuous flag and release filter list.
2389                          */
2390                         if (is_broadcast_ether_addr(f->macaddr)) {
2391                                 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2392
2393                                 hlist_del(&f->hlist);
2394                                 kfree(f);
2395                                 continue;
2396                         }
2397
2398                         /* add to delete list */
2399                         ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2400                         if (f->vlan == I40E_VLAN_ANY) {
2401                                 del_list[num_del].vlan_tag = 0;
2402                                 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2403                         } else {
2404                                 del_list[num_del].vlan_tag =
2405                                         cpu_to_le16((u16)(f->vlan));
2406                         }
2407
2408                         cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2409                         del_list[num_del].flags = cmd_flags;
2410                         num_del++;
2411
2412                         /* flush a full buffer */
2413                         if (num_del == filter_list_len) {
2414                                 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2415                                                      num_del, &retval);
2416                                 memset(del_list, 0, list_size);
2417                                 num_del = 0;
2418                         }
2419                         /* Release memory for MAC filter entries which were
2420                          * synced up with HW.
2421                          */
2422                         hlist_del(&f->hlist);
2423                         kfree(f);
2424                 }
2425
2426                 if (num_del) {
2427                         i40e_aqc_del_filters(vsi, vsi_name, del_list,
2428                                              num_del, &retval);
2429                 }
2430
2431                 kfree(del_list);
2432                 del_list = NULL;
2433         }
2434
2435         if (!hlist_empty(&tmp_add_list)) {
2436                 /* Do all the adds now. */
2437                 filter_list_len = hw->aq.asq_buf_size /
2438                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2439                 list_size = filter_list_len *
2440                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2441                 add_list = kzalloc(list_size, GFP_ATOMIC);
2442                 if (!add_list)
2443                         goto err_no_memory;
2444
2445                 num_add = 0;
2446                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2447                         /* handle broadcast filters by updating the broadcast
2448                          * promiscuous flag instead of adding a MAC filter.
2449                          */
2450                         if (is_broadcast_ether_addr(new->f->macaddr)) {
2451                                 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2452                                                               new->f))
2453                                         new->state = I40E_FILTER_FAILED;
2454                                 else
2455                                         new->state = I40E_FILTER_ACTIVE;
2456                                 continue;
2457                         }
2458
2459                         /* add to add array */
2460                         if (num_add == 0)
2461                                 add_head = new;
2462                         cmd_flags = 0;
2463                         ether_addr_copy(add_list[num_add].mac_addr,
2464                                         new->f->macaddr);
2465                         if (new->f->vlan == I40E_VLAN_ANY) {
2466                                 add_list[num_add].vlan_tag = 0;
2467                                 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2468                         } else {
2469                                 add_list[num_add].vlan_tag =
2470                                         cpu_to_le16((u16)(new->f->vlan));
2471                         }
2472                         add_list[num_add].queue_number = 0;
2473                         /* set invalid match method for later detection */
2474                         add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2475                         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2476                         add_list[num_add].flags = cpu_to_le16(cmd_flags);
2477                         num_add++;
2478
2479                         /* flush a full buffer */
2480                         if (num_add == filter_list_len) {
2481                                 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2482                                                      add_head, num_add);
2483                                 memset(add_list, 0, list_size);
2484                                 num_add = 0;
2485                         }
2486                 }
2487                 if (num_add) {
2488                         i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2489                                              num_add);
2490                 }
2491                 /* Now move all of the filters from the temp add list back to
2492                  * the VSI's list.
2493                  */
2494                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2495                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2496                         /* Only update the state if we're still NEW */
2497                         if (new->f->state == I40E_FILTER_NEW)
2498                                 new->f->state = new->state;
2499                         hlist_del(&new->hlist);
2500                         kfree(new);
2501                 }
2502                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2503                 kfree(add_list);
2504                 add_list = NULL;
2505         }
2506
2507         /* Determine the number of active and failed filters. */
2508         spin_lock_bh(&vsi->mac_filter_hash_lock);
2509         vsi->active_filters = 0;
2510         hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2511                 if (f->state == I40E_FILTER_ACTIVE)
2512                         vsi->active_filters++;
2513                 else if (f->state == I40E_FILTER_FAILED)
2514                         failed_filters++;
2515         }
2516         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2517
2518         /* Check if we are able to exit overflow promiscuous mode. We can
2519          * safely exit if we didn't just enter, we no longer have any failed
2520          * filters, and we have reduced filters below the threshold value.
2521          */
2522         if (old_overflow && !failed_filters &&
2523             vsi->active_filters < vsi->promisc_threshold) {
2524                 dev_info(&pf->pdev->dev,
2525                          "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2526                          vsi_name);
2527                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2528                 vsi->promisc_threshold = 0;
2529         }
2530
2531         /* if the VF is not trusted do not do promisc */
2532         if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2533                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2534                 goto out;
2535         }
2536
2537         new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2538
2539         /* If we are entering overflow promiscuous, we need to calculate a new
2540          * threshold for when we are safe to exit
2541          */
2542         if (!old_overflow && new_overflow)
2543                 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2544
2545         /* check for changes in promiscuous modes */
2546         if (changed_flags & IFF_ALLMULTI) {
2547                 bool cur_multipromisc;
2548
2549                 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2550                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2551                                                                vsi->seid,
2552                                                                cur_multipromisc,
2553                                                                NULL);
2554                 if (aq_ret) {
2555                         retval = i40e_aq_rc_to_posix(aq_ret,
2556                                                      hw->aq.asq_last_status);
2557                         dev_info(&pf->pdev->dev,
2558                                  "set multi promisc failed on %s, err %s aq_err %s\n",
2559                                  vsi_name,
2560                                  i40e_stat_str(hw, aq_ret),
2561                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2562                 } else {
2563                         dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2564                                  cur_multipromisc ? "entering" : "leaving");
2565                 }
2566         }
2567
2568         if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2569                 bool cur_promisc;
2570
2571                 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2572                                new_overflow);
2573                 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2574                 if (aq_ret) {
2575                         retval = i40e_aq_rc_to_posix(aq_ret,
2576                                                      hw->aq.asq_last_status);
2577                         dev_info(&pf->pdev->dev,
2578                                  "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2579                                  cur_promisc ? "on" : "off",
2580                                  vsi_name,
2581                                  i40e_stat_str(hw, aq_ret),
2582                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2583                 }
2584         }
2585 out:
2586         /* if something went wrong then set the changed flag so we try again */
2587         if (retval)
2588                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2589
2590         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2591         return retval;
2592
2593 err_no_memory:
2594         /* Restore elements on the temporary add and delete lists */
2595         spin_lock_bh(&vsi->mac_filter_hash_lock);
2596 err_no_memory_locked:
2597         i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2598         i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2599         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2600
2601         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2602         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2603         return -ENOMEM;
2604 }
2605
2606 /**
2607  * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2608  * @pf: board private structure
2609  **/
2610 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2611 {
2612         int v;
2613
2614         if (!pf)
2615                 return;
2616         if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2617                 return;
2618         if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2619                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2620                 return;
2621         }
2622
2623         for (v = 0; v < pf->num_alloc_vsi; v++) {
2624                 if (pf->vsi[v] &&
2625                     (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2626                         int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2627
2628                         if (ret) {
2629                                 /* come back and try again later */
2630                                 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2631                                         pf->state);
2632                                 break;
2633                         }
2634                 }
2635         }
2636 }
2637
2638 /**
2639  * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2640  * @vsi: the vsi
2641  **/
2642 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2643 {
2644         if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2645                 return I40E_RXBUFFER_2048;
2646         else
2647                 return I40E_RXBUFFER_3072;
2648 }
2649
2650 /**
2651  * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2652  * @netdev: network interface device structure
2653  * @new_mtu: new value for maximum frame size
2654  *
2655  * Returns 0 on success, negative on failure
2656  **/
2657 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2658 {
2659         struct i40e_netdev_priv *np = netdev_priv(netdev);
2660         struct i40e_vsi *vsi = np->vsi;
2661         struct i40e_pf *pf = vsi->back;
2662
2663         if (i40e_enabled_xdp_vsi(vsi)) {
2664                 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2665
2666                 if (frame_size > i40e_max_xdp_frame_size(vsi))
2667                         return -EINVAL;
2668         }
2669
2670         netdev_dbg(netdev, "changing MTU from %d to %d\n",
2671                    netdev->mtu, new_mtu);
2672         netdev->mtu = new_mtu;
2673         if (netif_running(netdev))
2674                 i40e_vsi_reinit_locked(vsi);
2675         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2676         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2677         return 0;
2678 }
2679
2680 /**
2681  * i40e_ioctl - Access the hwtstamp interface
2682  * @netdev: network interface device structure
2683  * @ifr: interface request data
2684  * @cmd: ioctl command
2685  **/
2686 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2687 {
2688         struct i40e_netdev_priv *np = netdev_priv(netdev);
2689         struct i40e_pf *pf = np->vsi->back;
2690
2691         switch (cmd) {
2692         case SIOCGHWTSTAMP:
2693                 return i40e_ptp_get_ts_config(pf, ifr);
2694         case SIOCSHWTSTAMP:
2695                 return i40e_ptp_set_ts_config(pf, ifr);
2696         default:
2697                 return -EOPNOTSUPP;
2698         }
2699 }
2700
2701 /**
2702  * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2703  * @vsi: the vsi being adjusted
2704  **/
2705 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2706 {
2707         struct i40e_vsi_context ctxt;
2708         i40e_status ret;
2709
2710         /* Don't modify stripping options if a port VLAN is active */
2711         if (vsi->info.pvid)
2712                 return;
2713
2714         if ((vsi->info.valid_sections &
2715              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2716             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2717                 return;  /* already enabled */
2718
2719         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2720         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2721                                     I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2722
2723         ctxt.seid = vsi->seid;
2724         ctxt.info = vsi->info;
2725         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2726         if (ret) {
2727                 dev_info(&vsi->back->pdev->dev,
2728                          "update vlan stripping failed, err %s aq_err %s\n",
2729                          i40e_stat_str(&vsi->back->hw, ret),
2730                          i40e_aq_str(&vsi->back->hw,
2731                                      vsi->back->hw.aq.asq_last_status));
2732         }
2733 }
2734
2735 /**
2736  * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2737  * @vsi: the vsi being adjusted
2738  **/
2739 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2740 {
2741         struct i40e_vsi_context ctxt;
2742         i40e_status ret;
2743
2744         /* Don't modify stripping options if a port VLAN is active */
2745         if (vsi->info.pvid)
2746                 return;
2747
2748         if ((vsi->info.valid_sections &
2749              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2750             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2751              I40E_AQ_VSI_PVLAN_EMOD_MASK))
2752                 return;  /* already disabled */
2753
2754         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2755         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2756                                     I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2757
2758         ctxt.seid = vsi->seid;
2759         ctxt.info = vsi->info;
2760         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2761         if (ret) {
2762                 dev_info(&vsi->back->pdev->dev,
2763                          "update vlan stripping failed, err %s aq_err %s\n",
2764                          i40e_stat_str(&vsi->back->hw, ret),
2765                          i40e_aq_str(&vsi->back->hw,
2766                                      vsi->back->hw.aq.asq_last_status));
2767         }
2768 }
2769
2770 /**
2771  * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2772  * @vsi: the vsi being configured
2773  * @vid: vlan id to be added (0 = untagged only , -1 = any)
2774  *
2775  * This is a helper function for adding a new MAC/VLAN filter with the
2776  * specified VLAN for each existing MAC address already in the hash table.
2777  * This function does *not* perform any accounting to update filters based on
2778  * VLAN mode.
2779  *
2780  * NOTE: this function expects to be called while under the
2781  * mac_filter_hash_lock
2782  **/
2783 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2784 {
2785         struct i40e_mac_filter *f, *add_f;
2786         struct hlist_node *h;
2787         int bkt;
2788
2789         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2790                 if (f->state == I40E_FILTER_REMOVE)
2791                         continue;
2792                 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2793                 if (!add_f) {
2794                         dev_info(&vsi->back->pdev->dev,
2795                                  "Could not add vlan filter %d for %pM\n",
2796                                  vid, f->macaddr);
2797                         return -ENOMEM;
2798                 }
2799         }
2800
2801         return 0;
2802 }
2803
2804 /**
2805  * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2806  * @vsi: the VSI being configured
2807  * @vid: VLAN id to be added
2808  **/
2809 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2810 {
2811         int err;
2812
2813         if (vsi->info.pvid)
2814                 return -EINVAL;
2815
2816         /* The network stack will attempt to add VID=0, with the intention to
2817          * receive priority tagged packets with a VLAN of 0. Our HW receives
2818          * these packets by default when configured to receive untagged
2819          * packets, so we don't need to add a filter for this case.
2820          * Additionally, HW interprets adding a VID=0 filter as meaning to
2821          * receive *only* tagged traffic and stops receiving untagged traffic.
2822          * Thus, we do not want to actually add a filter for VID=0
2823          */
2824         if (!vid)
2825                 return 0;
2826
2827         /* Locked once because all functions invoked below iterates list*/
2828         spin_lock_bh(&vsi->mac_filter_hash_lock);
2829         err = i40e_add_vlan_all_mac(vsi, vid);
2830         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2831         if (err)
2832                 return err;
2833
2834         /* schedule our worker thread which will take care of
2835          * applying the new filter changes
2836          */
2837         i40e_service_event_schedule(vsi->back);
2838         return 0;
2839 }
2840
2841 /**
2842  * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2843  * @vsi: the vsi being configured
2844  * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2845  *
2846  * This function should be used to remove all VLAN filters which match the
2847  * given VID. It does not schedule the service event and does not take the
2848  * mac_filter_hash_lock so it may be combined with other operations under
2849  * a single invocation of the mac_filter_hash_lock.
2850  *
2851  * NOTE: this function expects to be called while under the
2852  * mac_filter_hash_lock
2853  */
2854 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2855 {
2856         struct i40e_mac_filter *f;
2857         struct hlist_node *h;
2858         int bkt;
2859
2860         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2861                 if (f->vlan == vid)
2862                         __i40e_del_filter(vsi, f);
2863         }
2864 }
2865
2866 /**
2867  * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2868  * @vsi: the VSI being configured
2869  * @vid: VLAN id to be removed
2870  **/
2871 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2872 {
2873         if (!vid || vsi->info.pvid)
2874                 return;
2875
2876         spin_lock_bh(&vsi->mac_filter_hash_lock);
2877         i40e_rm_vlan_all_mac(vsi, vid);
2878         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2879
2880         /* schedule our worker thread which will take care of
2881          * applying the new filter changes
2882          */
2883         i40e_service_event_schedule(vsi->back);
2884 }
2885
2886 /**
2887  * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2888  * @netdev: network interface to be adjusted
2889  * @proto: unused protocol value
2890  * @vid: vlan id to be added
2891  *
2892  * net_device_ops implementation for adding vlan ids
2893  **/
2894 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2895                                 __always_unused __be16 proto, u16 vid)
2896 {
2897         struct i40e_netdev_priv *np = netdev_priv(netdev);
2898         struct i40e_vsi *vsi = np->vsi;
2899         int ret = 0;
2900
2901         if (vid >= VLAN_N_VID)
2902                 return -EINVAL;
2903
2904         ret = i40e_vsi_add_vlan(vsi, vid);
2905         if (!ret)
2906                 set_bit(vid, vsi->active_vlans);
2907
2908         return ret;
2909 }
2910
2911 /**
2912  * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2913  * @netdev: network interface to be adjusted
2914  * @proto: unused protocol value
2915  * @vid: vlan id to be added
2916  **/
2917 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
2918                                     __always_unused __be16 proto, u16 vid)
2919 {
2920         struct i40e_netdev_priv *np = netdev_priv(netdev);
2921         struct i40e_vsi *vsi = np->vsi;
2922
2923         if (vid >= VLAN_N_VID)
2924                 return;
2925         set_bit(vid, vsi->active_vlans);
2926 }
2927
2928 /**
2929  * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2930  * @netdev: network interface to be adjusted
2931  * @proto: unused protocol value
2932  * @vid: vlan id to be removed
2933  *
2934  * net_device_ops implementation for removing vlan ids
2935  **/
2936 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2937                                  __always_unused __be16 proto, u16 vid)
2938 {
2939         struct i40e_netdev_priv *np = netdev_priv(netdev);
2940         struct i40e_vsi *vsi = np->vsi;
2941
2942         /* return code is ignored as there is nothing a user
2943          * can do about failure to remove and a log message was
2944          * already printed from the other function
2945          */
2946         i40e_vsi_kill_vlan(vsi, vid);
2947
2948         clear_bit(vid, vsi->active_vlans);
2949
2950         return 0;
2951 }
2952
2953 /**
2954  * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2955  * @vsi: the vsi being brought back up
2956  **/
2957 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2958 {
2959         u16 vid;
2960
2961         if (!vsi->netdev)
2962                 return;
2963
2964         if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2965                 i40e_vlan_stripping_enable(vsi);
2966         else
2967                 i40e_vlan_stripping_disable(vsi);
2968
2969         for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2970                 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
2971                                         vid);
2972 }
2973
2974 /**
2975  * i40e_vsi_add_pvid - Add pvid for the VSI
2976  * @vsi: the vsi being adjusted
2977  * @vid: the vlan id to set as a PVID
2978  **/
2979 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2980 {
2981         struct i40e_vsi_context ctxt;
2982         i40e_status ret;
2983
2984         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2985         vsi->info.pvid = cpu_to_le16(vid);
2986         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2987                                     I40E_AQ_VSI_PVLAN_INSERT_PVID |
2988                                     I40E_AQ_VSI_PVLAN_EMOD_STR;
2989
2990         ctxt.seid = vsi->seid;
2991         ctxt.info = vsi->info;
2992         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2993         if (ret) {
2994                 dev_info(&vsi->back->pdev->dev,
2995                          "add pvid failed, err %s aq_err %s\n",
2996                          i40e_stat_str(&vsi->back->hw, ret),
2997                          i40e_aq_str(&vsi->back->hw,
2998                                      vsi->back->hw.aq.asq_last_status));
2999                 return -ENOENT;
3000         }
3001
3002         return 0;
3003 }
3004
3005 /**
3006  * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3007  * @vsi: the vsi being adjusted
3008  *
3009  * Just use the vlan_rx_register() service to put it back to normal
3010  **/
3011 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3012 {
3013         vsi->info.pvid = 0;
3014
3015         i40e_vlan_stripping_disable(vsi);
3016 }
3017
3018 /**
3019  * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3020  * @vsi: ptr to the VSI
3021  *
3022  * If this function returns with an error, then it's possible one or
3023  * more of the rings is populated (while the rest are not).  It is the
3024  * callers duty to clean those orphaned rings.
3025  *
3026  * Return 0 on success, negative on failure
3027  **/
3028 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3029 {
3030         int i, err = 0;
3031
3032         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3033                 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3034
3035         if (!i40e_enabled_xdp_vsi(vsi))
3036                 return err;
3037
3038         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3039                 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3040
3041         return err;
3042 }
3043
3044 /**
3045  * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3046  * @vsi: ptr to the VSI
3047  *
3048  * Free VSI's transmit software resources
3049  **/
3050 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3051 {
3052         int i;
3053
3054         if (vsi->tx_rings) {
3055                 for (i = 0; i < vsi->num_queue_pairs; i++)
3056                         if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3057                                 i40e_free_tx_resources(vsi->tx_rings[i]);
3058         }
3059
3060         if (vsi->xdp_rings) {
3061                 for (i = 0; i < vsi->num_queue_pairs; i++)
3062                         if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3063                                 i40e_free_tx_resources(vsi->xdp_rings[i]);
3064         }
3065 }
3066
3067 /**
3068  * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3069  * @vsi: ptr to the VSI
3070  *
3071  * If this function returns with an error, then it's possible one or
3072  * more of the rings is populated (while the rest are not).  It is the
3073  * callers duty to clean those orphaned rings.
3074  *
3075  * Return 0 on success, negative on failure
3076  **/
3077 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3078 {
3079         int i, err = 0;
3080
3081         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3082                 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3083         return err;
3084 }
3085
3086 /**
3087  * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3088  * @vsi: ptr to the VSI
3089  *
3090  * Free all receive software resources
3091  **/
3092 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3093 {
3094         int i;
3095
3096         if (!vsi->rx_rings)
3097                 return;
3098
3099         for (i = 0; i < vsi->num_queue_pairs; i++)
3100                 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3101                         i40e_free_rx_resources(vsi->rx_rings[i]);
3102 }
3103
3104 /**
3105  * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3106  * @ring: The Tx ring to configure
3107  *
3108  * This enables/disables XPS for a given Tx descriptor ring
3109  * based on the TCs enabled for the VSI that ring belongs to.
3110  **/
3111 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3112 {
3113         int cpu;
3114
3115         if (!ring->q_vector || !ring->netdev || ring->ch)
3116                 return;
3117
3118         /* We only initialize XPS once, so as not to overwrite user settings */
3119         if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3120                 return;
3121
3122         cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3123         netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3124                             ring->queue_index);
3125 }
3126
3127 /**
3128  * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3129  * @ring: The Tx or Rx ring
3130  *
3131  * Returns the AF_XDP buffer pool or NULL.
3132  **/
3133 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3134 {
3135         bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3136         int qid = ring->queue_index;
3137
3138         if (ring_is_xdp(ring))
3139                 qid -= ring->vsi->alloc_queue_pairs;
3140
3141         if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3142                 return NULL;
3143
3144         return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3145 }
3146
3147 /**
3148  * i40e_configure_tx_ring - Configure a transmit ring context and rest
3149  * @ring: The Tx ring to configure
3150  *
3151  * Configure the Tx descriptor ring in the HMC context.
3152  **/
3153 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3154 {
3155         struct i40e_vsi *vsi = ring->vsi;
3156         u16 pf_q = vsi->base_queue + ring->queue_index;
3157         struct i40e_hw *hw = &vsi->back->hw;
3158         struct i40e_hmc_obj_txq tx_ctx;
3159         i40e_status err = 0;
3160         u32 qtx_ctl = 0;
3161
3162         if (ring_is_xdp(ring))
3163                 ring->xsk_pool = i40e_xsk_pool(ring);
3164
3165         /* some ATR related tx ring init */
3166         if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3167                 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3168                 ring->atr_count = 0;
3169         } else {
3170                 ring->atr_sample_rate = 0;
3171         }
3172
3173         /* configure XPS */
3174         i40e_config_xps_tx_ring(ring);
3175
3176         /* clear the context structure first */
3177         memset(&tx_ctx, 0, sizeof(tx_ctx));
3178
3179         tx_ctx.new_context = 1;
3180         tx_ctx.base = (ring->dma / 128);
3181         tx_ctx.qlen = ring->count;
3182         tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3183                                                I40E_FLAG_FD_ATR_ENABLED));
3184         tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3185         /* FDIR VSI tx ring can still use RS bit and writebacks */
3186         if (vsi->type != I40E_VSI_FDIR)
3187                 tx_ctx.head_wb_ena = 1;
3188         tx_ctx.head_wb_addr = ring->dma +
3189                               (ring->count * sizeof(struct i40e_tx_desc));
3190
3191         /* As part of VSI creation/update, FW allocates certain
3192          * Tx arbitration queue sets for each TC enabled for
3193          * the VSI. The FW returns the handles to these queue
3194          * sets as part of the response buffer to Add VSI,
3195          * Update VSI, etc. AQ commands. It is expected that
3196          * these queue set handles be associated with the Tx
3197          * queues by the driver as part of the TX queue context
3198          * initialization. This has to be done regardless of
3199          * DCB as by default everything is mapped to TC0.
3200          */
3201
3202         if (ring->ch)
3203                 tx_ctx.rdylist =
3204                         le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3205
3206         else
3207                 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3208
3209         tx_ctx.rdylist_act = 0;
3210
3211         /* clear the context in the HMC */
3212         err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3213         if (err) {
3214                 dev_info(&vsi->back->pdev->dev,
3215                          "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3216                          ring->queue_index, pf_q, err);
3217                 return -ENOMEM;
3218         }
3219
3220         /* set the context in the HMC */
3221         err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3222         if (err) {
3223                 dev_info(&vsi->back->pdev->dev,
3224                          "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3225                          ring->queue_index, pf_q, err);
3226                 return -ENOMEM;
3227         }
3228
3229         /* Now associate this queue with this PCI function */
3230         if (ring->ch) {
3231                 if (ring->ch->type == I40E_VSI_VMDQ2)
3232                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3233                 else
3234                         return -EINVAL;
3235
3236                 qtx_ctl |= (ring->ch->vsi_number <<
3237                             I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3238                             I40E_QTX_CTL_VFVM_INDX_MASK;
3239         } else {
3240                 if (vsi->type == I40E_VSI_VMDQ2) {
3241                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3242                         qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3243                                     I40E_QTX_CTL_VFVM_INDX_MASK;
3244                 } else {
3245                         qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3246                 }
3247         }
3248
3249         qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3250                     I40E_QTX_CTL_PF_INDX_MASK);
3251         wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3252         i40e_flush(hw);
3253
3254         /* cache tail off for easier writes later */
3255         ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3256
3257         return 0;
3258 }
3259
3260 /**
3261  * i40e_rx_offset - Return expected offset into page to access data
3262  * @rx_ring: Ring we are requesting offset of
3263  *
3264  * Returns the offset value for ring into the data buffer.
3265  */
3266 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3267 {
3268         return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3269 }
3270
3271 /**
3272  * i40e_configure_rx_ring - Configure a receive ring context
3273  * @ring: The Rx ring to configure
3274  *
3275  * Configure the Rx descriptor ring in the HMC context.
3276  **/
3277 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3278 {
3279         struct i40e_vsi *vsi = ring->vsi;
3280         u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3281         u16 pf_q = vsi->base_queue + ring->queue_index;
3282         struct i40e_hw *hw = &vsi->back->hw;
3283         struct i40e_hmc_obj_rxq rx_ctx;
3284         i40e_status err = 0;
3285         bool ok;
3286         int ret;
3287
3288         bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3289
3290         /* clear the context structure first */
3291         memset(&rx_ctx, 0, sizeof(rx_ctx));
3292
3293         if (ring->vsi->type == I40E_VSI_MAIN)
3294                 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3295
3296         kfree(ring->rx_bi);
3297         ring->xsk_pool = i40e_xsk_pool(ring);
3298         if (ring->xsk_pool) {
3299                 ret = i40e_alloc_rx_bi_zc(ring);
3300                 if (ret)
3301                         return ret;
3302                 ring->rx_buf_len =
3303                   xsk_pool_get_rx_frame_size(ring->xsk_pool);
3304                 /* For AF_XDP ZC, we disallow packets to span on
3305                  * multiple buffers, thus letting us skip that
3306                  * handling in the fast-path.
3307                  */
3308                 chain_len = 1;
3309                 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3310                                                  MEM_TYPE_XSK_BUFF_POOL,
3311                                                  NULL);
3312                 if (ret)
3313                         return ret;
3314                 dev_info(&vsi->back->pdev->dev,
3315                          "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3316                          ring->queue_index);
3317
3318         } else {
3319                 ret = i40e_alloc_rx_bi(ring);
3320                 if (ret)
3321                         return ret;
3322                 ring->rx_buf_len = vsi->rx_buf_len;
3323                 if (ring->vsi->type == I40E_VSI_MAIN) {
3324                         ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3325                                                          MEM_TYPE_PAGE_SHARED,
3326                                                          NULL);
3327                         if (ret)
3328                                 return ret;
3329                 }
3330         }
3331
3332         rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3333                                     BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3334
3335         rx_ctx.base = (ring->dma / 128);
3336         rx_ctx.qlen = ring->count;
3337
3338         /* use 16 byte descriptors */
3339         rx_ctx.dsize = 0;
3340
3341         /* descriptor type is always zero
3342          * rx_ctx.dtype = 0;
3343          */
3344         rx_ctx.hsplit_0 = 0;
3345
3346         rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3347         if (hw->revision_id == 0)
3348                 rx_ctx.lrxqthresh = 0;
3349         else
3350                 rx_ctx.lrxqthresh = 1;
3351         rx_ctx.crcstrip = 1;
3352         rx_ctx.l2tsel = 1;
3353         /* this controls whether VLAN is stripped from inner headers */
3354         rx_ctx.showiv = 0;
3355         /* set the prefena field to 1 because the manual says to */
3356         rx_ctx.prefena = 1;
3357
3358         /* clear the context in the HMC */
3359         err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3360         if (err) {
3361                 dev_info(&vsi->back->pdev->dev,
3362                          "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3363                          ring->queue_index, pf_q, err);
3364                 return -ENOMEM;
3365         }
3366
3367         /* set the context in the HMC */
3368         err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3369         if (err) {
3370                 dev_info(&vsi->back->pdev->dev,
3371                          "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3372                          ring->queue_index, pf_q, err);
3373                 return -ENOMEM;
3374         }
3375
3376         /* configure Rx buffer alignment */
3377         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3378                 clear_ring_build_skb_enabled(ring);
3379         else
3380                 set_ring_build_skb_enabled(ring);
3381
3382         ring->rx_offset = i40e_rx_offset(ring);
3383
3384         /* cache tail for quicker writes, and clear the reg before use */
3385         ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3386         writel(0, ring->tail);
3387
3388         if (ring->xsk_pool) {
3389                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3390                 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3391         } else {
3392                 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3393         }
3394         if (!ok) {
3395                 /* Log this in case the user has forgotten to give the kernel
3396                  * any buffers, even later in the application.
3397                  */
3398                 dev_info(&vsi->back->pdev->dev,
3399                          "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3400                          ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3401                          ring->queue_index, pf_q);
3402         }
3403
3404         return 0;
3405 }
3406
3407 /**
3408  * i40e_vsi_configure_tx - Configure the VSI for Tx
3409  * @vsi: VSI structure describing this set of rings and resources
3410  *
3411  * Configure the Tx VSI for operation.
3412  **/
3413 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3414 {
3415         int err = 0;
3416         u16 i;
3417
3418         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3419                 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3420
3421         if (err || !i40e_enabled_xdp_vsi(vsi))
3422                 return err;
3423
3424         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3425                 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3426
3427         return err;
3428 }
3429
3430 /**
3431  * i40e_vsi_configure_rx - Configure the VSI for Rx
3432  * @vsi: the VSI being configured
3433  *
3434  * Configure the Rx VSI for operation.
3435  **/
3436 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3437 {
3438         int err = 0;
3439         u16 i;
3440
3441         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3442                 vsi->max_frame = I40E_MAX_RXBUFFER;
3443                 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3444 #if (PAGE_SIZE < 8192)
3445         } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3446                    (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3447                 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3448                 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3449 #endif
3450         } else {
3451                 vsi->max_frame = I40E_MAX_RXBUFFER;
3452                 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3453                                                        I40E_RXBUFFER_2048;
3454         }
3455
3456         /* set up individual rings */
3457         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3458                 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3459
3460         return err;
3461 }
3462
3463 /**
3464  * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3465  * @vsi: ptr to the VSI
3466  **/
3467 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3468 {
3469         struct i40e_ring *tx_ring, *rx_ring;
3470         u16 qoffset, qcount;
3471         int i, n;
3472
3473         if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3474                 /* Reset the TC information */
3475                 for (i = 0; i < vsi->num_queue_pairs; i++) {
3476                         rx_ring = vsi->rx_rings[i];
3477                         tx_ring = vsi->tx_rings[i];
3478                         rx_ring->dcb_tc = 0;
3479                         tx_ring->dcb_tc = 0;
3480                 }
3481                 return;
3482         }
3483
3484         for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3485                 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3486                         continue;
3487
3488                 qoffset = vsi->tc_config.tc_info[n].qoffset;
3489                 qcount = vsi->tc_config.tc_info[n].qcount;
3490                 for (i = qoffset; i < (qoffset + qcount); i++) {
3491                         rx_ring = vsi->rx_rings[i];
3492                         tx_ring = vsi->tx_rings[i];
3493                         rx_ring->dcb_tc = n;
3494                         tx_ring->dcb_tc = n;
3495                 }
3496         }
3497 }
3498
3499 /**
3500  * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3501  * @vsi: ptr to the VSI
3502  **/
3503 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3504 {
3505         if (vsi->netdev)
3506                 i40e_set_rx_mode(vsi->netdev);
3507 }
3508
3509 /**
3510  * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3511  * @pf: Pointer to the targeted PF
3512  *
3513  * Set all flow director counters to 0.
3514  */
3515 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3516 {
3517         pf->fd_tcp4_filter_cnt = 0;
3518         pf->fd_udp4_filter_cnt = 0;
3519         pf->fd_sctp4_filter_cnt = 0;
3520         pf->fd_ip4_filter_cnt = 0;
3521         pf->fd_tcp6_filter_cnt = 0;
3522         pf->fd_udp6_filter_cnt = 0;
3523         pf->fd_sctp6_filter_cnt = 0;
3524         pf->fd_ip6_filter_cnt = 0;
3525 }
3526
3527 /**
3528  * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3529  * @vsi: Pointer to the targeted VSI
3530  *
3531  * This function replays the hlist on the hw where all the SB Flow Director
3532  * filters were saved.
3533  **/
3534 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3535 {
3536         struct i40e_fdir_filter *filter;
3537         struct i40e_pf *pf = vsi->back;
3538         struct hlist_node *node;
3539
3540         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3541                 return;
3542
3543         /* Reset FDir counters as we're replaying all existing filters */
3544         i40e_reset_fdir_filter_cnt(pf);
3545
3546         hlist_for_each_entry_safe(filter, node,
3547                                   &pf->fdir_filter_list, fdir_node) {
3548                 i40e_add_del_fdir(vsi, filter, true);
3549         }
3550 }
3551
3552 /**
3553  * i40e_vsi_configure - Set up the VSI for action
3554  * @vsi: the VSI being configured
3555  **/
3556 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3557 {
3558         int err;
3559
3560         i40e_set_vsi_rx_mode(vsi);
3561         i40e_restore_vlan(vsi);
3562         i40e_vsi_config_dcb_rings(vsi);
3563         err = i40e_vsi_configure_tx(vsi);
3564         if (!err)
3565                 err = i40e_vsi_configure_rx(vsi);
3566
3567         return err;
3568 }
3569
3570 /**
3571  * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3572  * @vsi: the VSI being configured
3573  **/
3574 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3575 {
3576         bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3577         struct i40e_pf *pf = vsi->back;
3578         struct i40e_hw *hw = &pf->hw;
3579         u16 vector;
3580         int i, q;
3581         u32 qp;
3582
3583         /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3584          * and PFINT_LNKLSTn registers, e.g.:
3585          *   PFINT_ITRn[0..n-1] gets msix-1..msix-n  (qpair interrupts)
3586          */
3587         qp = vsi->base_queue;
3588         vector = vsi->base_vector;
3589         for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3590                 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3591
3592                 q_vector->rx.next_update = jiffies + 1;
3593                 q_vector->rx.target_itr =
3594                         ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3595                 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3596                      q_vector->rx.target_itr >> 1);
3597                 q_vector->rx.current_itr = q_vector->rx.target_itr;
3598
3599                 q_vector->tx.next_update = jiffies + 1;
3600                 q_vector->tx.target_itr =
3601                         ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3602                 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3603                      q_vector->tx.target_itr >> 1);
3604                 q_vector->tx.current_itr = q_vector->tx.target_itr;
3605
3606                 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3607                      i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3608
3609                 /* Linked list for the queuepairs assigned to this vector */
3610                 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3611                 for (q = 0; q < q_vector->num_ringpairs; q++) {
3612                         u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3613                         u32 val;
3614
3615                         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3616                               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3617                               (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3618                               (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3619                               (I40E_QUEUE_TYPE_TX <<
3620                                I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3621
3622                         wr32(hw, I40E_QINT_RQCTL(qp), val);
3623
3624                         if (has_xdp) {
3625                                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3626                                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3627                                       (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3628                                       (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3629                                       (I40E_QUEUE_TYPE_TX <<
3630                                        I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3631
3632                                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3633                         }
3634
3635                         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3636                               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3637                               (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3638                               ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3639                               (I40E_QUEUE_TYPE_RX <<
3640                                I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3641
3642                         /* Terminate the linked list */
3643                         if (q == (q_vector->num_ringpairs - 1))
3644                                 val |= (I40E_QUEUE_END_OF_LIST <<
3645                                         I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3646
3647                         wr32(hw, I40E_QINT_TQCTL(qp), val);
3648                         qp++;
3649                 }
3650         }
3651
3652         i40e_flush(hw);
3653 }
3654
3655 /**
3656  * i40e_enable_misc_int_causes - enable the non-queue interrupts
3657  * @pf: pointer to private device data structure
3658  **/
3659 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3660 {
3661         struct i40e_hw *hw = &pf->hw;
3662         u32 val;
3663
3664         /* clear things first */
3665         wr32(hw, I40E_PFINT_ICR0_ENA, 0);  /* disable all */
3666         rd32(hw, I40E_PFINT_ICR0);         /* read to clear */
3667
3668         val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK       |
3669               I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK    |
3670               I40E_PFINT_ICR0_ENA_GRST_MASK          |
3671               I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3672               I40E_PFINT_ICR0_ENA_GPIO_MASK          |
3673               I40E_PFINT_ICR0_ENA_HMC_ERR_MASK       |
3674               I40E_PFINT_ICR0_ENA_VFLR_MASK          |
3675               I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3676
3677         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3678                 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3679
3680         if (pf->flags & I40E_FLAG_PTP)
3681                 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3682
3683         wr32(hw, I40E_PFINT_ICR0_ENA, val);
3684
3685         /* SW_ITR_IDX = 0, but don't change INTENA */
3686         wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3687                                         I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3688
3689         /* OTHER_ITR_IDX = 0 */
3690         wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3691 }
3692
3693 /**
3694  * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3695  * @vsi: the VSI being configured
3696  **/
3697 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3698 {
3699         u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3700         struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3701         struct i40e_pf *pf = vsi->back;
3702         struct i40e_hw *hw = &pf->hw;
3703         u32 val;
3704
3705         /* set the ITR configuration */
3706         q_vector->rx.next_update = jiffies + 1;
3707         q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3708         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3709         q_vector->rx.current_itr = q_vector->rx.target_itr;
3710         q_vector->tx.next_update = jiffies + 1;
3711         q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3712         wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3713         q_vector->tx.current_itr = q_vector->tx.target_itr;
3714
3715         i40e_enable_misc_int_causes(pf);
3716
3717         /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3718         wr32(hw, I40E_PFINT_LNKLST0, 0);
3719
3720         /* Associate the queue pair to the vector and enable the queue int */
3721         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK                   |
3722               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT)  |
3723               (nextqp      << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3724               (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3725
3726         wr32(hw, I40E_QINT_RQCTL(0), val);
3727
3728         if (i40e_enabled_xdp_vsi(vsi)) {
3729                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                 |
3730                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3731                       (I40E_QUEUE_TYPE_TX
3732                        << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3733
3734                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3735         }
3736
3737         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                  |
3738               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3739               (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3740
3741         wr32(hw, I40E_QINT_TQCTL(0), val);
3742         i40e_flush(hw);
3743 }
3744
3745 /**
3746  * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3747  * @pf: board private structure
3748  **/
3749 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3750 {
3751         struct i40e_hw *hw = &pf->hw;
3752
3753         wr32(hw, I40E_PFINT_DYN_CTL0,
3754              I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3755         i40e_flush(hw);
3756 }
3757
3758 /**
3759  * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3760  * @pf: board private structure
3761  **/
3762 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3763 {
3764         struct i40e_hw *hw = &pf->hw;
3765         u32 val;
3766
3767         val = I40E_PFINT_DYN_CTL0_INTENA_MASK   |
3768               I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3769               (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3770
3771         wr32(hw, I40E_PFINT_DYN_CTL0, val);
3772         i40e_flush(hw);
3773 }
3774
3775 /**
3776  * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3777  * @irq: interrupt number
3778  * @data: pointer to a q_vector
3779  **/
3780 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3781 {
3782         struct i40e_q_vector *q_vector = data;
3783
3784         if (!q_vector->tx.ring && !q_vector->rx.ring)
3785                 return IRQ_HANDLED;
3786
3787         napi_schedule_irqoff(&q_vector->napi);
3788
3789         return IRQ_HANDLED;
3790 }
3791
3792 /**
3793  * i40e_irq_affinity_notify - Callback for affinity changes
3794  * @notify: context as to what irq was changed
3795  * @mask: the new affinity mask
3796  *
3797  * This is a callback function used by the irq_set_affinity_notifier function
3798  * so that we may register to receive changes to the irq affinity masks.
3799  **/
3800 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3801                                      const cpumask_t *mask)
3802 {
3803         struct i40e_q_vector *q_vector =
3804                 container_of(notify, struct i40e_q_vector, affinity_notify);
3805
3806         cpumask_copy(&q_vector->affinity_mask, mask);
3807 }
3808
3809 /**
3810  * i40e_irq_affinity_release - Callback for affinity notifier release
3811  * @ref: internal core kernel usage
3812  *
3813  * This is a callback function used by the irq_set_affinity_notifier function
3814  * to inform the current notification subscriber that they will no longer
3815  * receive notifications.
3816  **/
3817 static void i40e_irq_affinity_release(struct kref *ref) {}
3818
3819 /**
3820  * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3821  * @vsi: the VSI being configured
3822  * @basename: name for the vector
3823  *
3824  * Allocates MSI-X vectors and requests interrupts from the kernel.
3825  **/
3826 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3827 {
3828         int q_vectors = vsi->num_q_vectors;
3829         struct i40e_pf *pf = vsi->back;
3830         int base = vsi->base_vector;
3831         int rx_int_idx = 0;
3832         int tx_int_idx = 0;
3833         int vector, err;
3834         int irq_num;
3835         int cpu;
3836
3837         for (vector = 0; vector < q_vectors; vector++) {
3838                 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3839
3840                 irq_num = pf->msix_entries[base + vector].vector;
3841
3842                 if (q_vector->tx.ring && q_vector->rx.ring) {
3843                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3844                                  "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3845                         tx_int_idx++;
3846                 } else if (q_vector->rx.ring) {
3847                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3848                                  "%s-%s-%d", basename, "rx", rx_int_idx++);
3849                 } else if (q_vector->tx.ring) {
3850                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3851                                  "%s-%s-%d", basename, "tx", tx_int_idx++);
3852                 } else {
3853                         /* skip this unused q_vector */
3854                         continue;
3855                 }
3856                 err = request_irq(irq_num,
3857                                   vsi->irq_handler,
3858                                   0,
3859                                   q_vector->name,
3860                                   q_vector);
3861                 if (err) {
3862                         dev_info(&pf->pdev->dev,
3863                                  "MSIX request_irq failed, error: %d\n", err);
3864                         goto free_queue_irqs;
3865                 }
3866
3867                 /* register for affinity change notifications */
3868                 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3869                 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3870                 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3871                 /* Spread affinity hints out across online CPUs.
3872                  *
3873                  * get_cpu_mask returns a static constant mask with
3874                  * a permanent lifetime so it's ok to pass to
3875                  * irq_set_affinity_hint without making a copy.
3876                  */
3877                 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3878                 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3879         }
3880
3881         vsi->irqs_ready = true;
3882         return 0;
3883
3884 free_queue_irqs:
3885         while (vector) {
3886                 vector--;
3887                 irq_num = pf->msix_entries[base + vector].vector;
3888                 irq_set_affinity_notifier(irq_num, NULL);
3889                 irq_set_affinity_hint(irq_num, NULL);
3890                 free_irq(irq_num, &vsi->q_vectors[vector]);
3891         }
3892         return err;
3893 }
3894
3895 /**
3896  * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3897  * @vsi: the VSI being un-configured
3898  **/
3899 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3900 {
3901         struct i40e_pf *pf = vsi->back;
3902         struct i40e_hw *hw = &pf->hw;
3903         int base = vsi->base_vector;
3904         int i;
3905
3906         /* disable interrupt causation from each queue */
3907         for (i = 0; i < vsi->num_queue_pairs; i++) {
3908                 u32 val;
3909
3910                 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3911                 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3912                 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3913
3914                 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3915                 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3916                 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3917
3918                 if (!i40e_enabled_xdp_vsi(vsi))
3919                         continue;
3920                 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3921         }
3922
3923         /* disable each interrupt */
3924         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3925                 for (i = vsi->base_vector;
3926                      i < (vsi->num_q_vectors + vsi->base_vector); i++)
3927                         wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3928
3929                 i40e_flush(hw);
3930                 for (i = 0; i < vsi->num_q_vectors; i++)
3931                         synchronize_irq(pf->msix_entries[i + base].vector);
3932         } else {
3933                 /* Legacy and MSI mode - this stops all interrupt handling */
3934                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3935                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3936                 i40e_flush(hw);
3937                 synchronize_irq(pf->pdev->irq);
3938         }
3939 }
3940
3941 /**
3942  * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3943  * @vsi: the VSI being configured
3944  **/
3945 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3946 {
3947         struct i40e_pf *pf = vsi->back;
3948         int i;
3949
3950         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3951                 for (i = 0; i < vsi->num_q_vectors; i++)
3952                         i40e_irq_dynamic_enable(vsi, i);
3953         } else {
3954                 i40e_irq_dynamic_enable_icr0(pf);
3955         }
3956
3957         i40e_flush(&pf->hw);
3958         return 0;
3959 }
3960
3961 /**
3962  * i40e_free_misc_vector - Free the vector that handles non-queue events
3963  * @pf: board private structure
3964  **/
3965 static void i40e_free_misc_vector(struct i40e_pf *pf)
3966 {
3967         /* Disable ICR 0 */
3968         wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3969         i40e_flush(&pf->hw);
3970
3971         if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3972                 synchronize_irq(pf->msix_entries[0].vector);
3973                 free_irq(pf->msix_entries[0].vector, pf);
3974                 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3975         }
3976 }
3977
3978 /**
3979  * i40e_intr - MSI/Legacy and non-queue interrupt handler
3980  * @irq: interrupt number
3981  * @data: pointer to a q_vector
3982  *
3983  * This is the handler used for all MSI/Legacy interrupts, and deals
3984  * with both queue and non-queue interrupts.  This is also used in
3985  * MSIX mode to handle the non-queue interrupts.
3986  **/
3987 static irqreturn_t i40e_intr(int irq, void *data)
3988 {
3989         struct i40e_pf *pf = (struct i40e_pf *)data;
3990         struct i40e_hw *hw = &pf->hw;
3991         irqreturn_t ret = IRQ_NONE;
3992         u32 icr0, icr0_remaining;
3993         u32 val, ena_mask;
3994
3995         icr0 = rd32(hw, I40E_PFINT_ICR0);
3996         ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3997
3998         /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3999         if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4000                 goto enable_intr;
4001
4002         /* if interrupt but no bits showing, must be SWINT */
4003         if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4004             (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4005                 pf->sw_int_count++;
4006
4007         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4008             (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4009                 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4010                 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4011                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4012         }
4013
4014         /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4015         if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4016                 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4017                 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4018
4019                 /* We do not have a way to disarm Queue causes while leaving
4020                  * interrupt enabled for all other causes, ideally
4021                  * interrupt should be disabled while we are in NAPI but
4022                  * this is not a performance path and napi_schedule()
4023                  * can deal with rescheduling.
4024                  */
4025                 if (!test_bit(__I40E_DOWN, pf->state))
4026                         napi_schedule_irqoff(&q_vector->napi);
4027         }
4028
4029         if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4030                 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4031                 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4032                 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4033         }
4034
4035         if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4036                 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4037                 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4038         }
4039
4040         if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4041                 /* disable any further VFLR event notifications */
4042                 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4043                         u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4044
4045                         reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4046                         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4047                 } else {
4048                         ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4049                         set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4050                 }
4051         }
4052
4053         if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4054                 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4055                         set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4056                 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4057                 val = rd32(hw, I40E_GLGEN_RSTAT);
4058                 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4059                        >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4060                 if (val == I40E_RESET_CORER) {
4061                         pf->corer_count++;
4062                 } else if (val == I40E_RESET_GLOBR) {
4063                         pf->globr_count++;
4064                 } else if (val == I40E_RESET_EMPR) {
4065                         pf->empr_count++;
4066                         set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4067                 }
4068         }
4069
4070         if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4071                 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4072                 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4073                 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4074                          rd32(hw, I40E_PFHMC_ERRORINFO),
4075                          rd32(hw, I40E_PFHMC_ERRORDATA));
4076         }
4077
4078         if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4079                 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4080
4081                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
4082                         icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4083                         i40e_ptp_tx_hwtstamp(pf);
4084                 }
4085         }
4086
4087         /* If a critical error is pending we have no choice but to reset the
4088          * device.
4089          * Report and mask out any remaining unexpected interrupts.
4090          */
4091         icr0_remaining = icr0 & ena_mask;
4092         if (icr0_remaining) {
4093                 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4094                          icr0_remaining);
4095                 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4096                     (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4097                     (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4098                         dev_info(&pf->pdev->dev, "device will be reset\n");
4099                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4100                         i40e_service_event_schedule(pf);
4101                 }
4102                 ena_mask &= ~icr0_remaining;
4103         }
4104         ret = IRQ_HANDLED;
4105
4106 enable_intr:
4107         /* re-enable interrupt causes */
4108         wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4109         if (!test_bit(__I40E_DOWN, pf->state) ||
4110             test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4111                 i40e_service_event_schedule(pf);
4112                 i40e_irq_dynamic_enable_icr0(pf);
4113         }
4114
4115         return ret;
4116 }
4117
4118 /**
4119  * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4120  * @tx_ring:  tx ring to clean
4121  * @budget:   how many cleans we're allowed
4122  *
4123  * Returns true if there's any budget left (e.g. the clean is finished)
4124  **/
4125 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4126 {
4127         struct i40e_vsi *vsi = tx_ring->vsi;
4128         u16 i = tx_ring->next_to_clean;
4129         struct i40e_tx_buffer *tx_buf;
4130         struct i40e_tx_desc *tx_desc;
4131
4132         tx_buf = &tx_ring->tx_bi[i];
4133         tx_desc = I40E_TX_DESC(tx_ring, i);
4134         i -= tx_ring->count;
4135
4136         do {
4137                 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4138
4139                 /* if next_to_watch is not set then there is no work pending */
4140                 if (!eop_desc)
4141                         break;
4142
4143                 /* prevent any other reads prior to eop_desc */
4144                 smp_rmb();
4145
4146                 /* if the descriptor isn't done, no work yet to do */
4147                 if (!(eop_desc->cmd_type_offset_bsz &
4148                       cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4149                         break;
4150
4151                 /* clear next_to_watch to prevent false hangs */
4152                 tx_buf->next_to_watch = NULL;
4153
4154                 tx_desc->buffer_addr = 0;
4155                 tx_desc->cmd_type_offset_bsz = 0;
4156                 /* move past filter desc */
4157                 tx_buf++;
4158                 tx_desc++;
4159                 i++;
4160                 if (unlikely(!i)) {
4161                         i -= tx_ring->count;
4162                         tx_buf = tx_ring->tx_bi;
4163                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4164                 }
4165                 /* unmap skb header data */
4166                 dma_unmap_single(tx_ring->dev,
4167                                  dma_unmap_addr(tx_buf, dma),
4168                                  dma_unmap_len(tx_buf, len),
4169                                  DMA_TO_DEVICE);
4170                 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4171                         kfree(tx_buf->raw_buf);
4172
4173                 tx_buf->raw_buf = NULL;
4174                 tx_buf->tx_flags = 0;
4175                 tx_buf->next_to_watch = NULL;
4176                 dma_unmap_len_set(tx_buf, len, 0);
4177                 tx_desc->buffer_addr = 0;
4178                 tx_desc->cmd_type_offset_bsz = 0;
4179
4180                 /* move us past the eop_desc for start of next FD desc */
4181                 tx_buf++;
4182                 tx_desc++;
4183                 i++;
4184                 if (unlikely(!i)) {
4185                         i -= tx_ring->count;
4186                         tx_buf = tx_ring->tx_bi;
4187                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4188                 }
4189
4190                 /* update budget accounting */
4191                 budget--;
4192         } while (likely(budget));
4193
4194         i += tx_ring->count;
4195         tx_ring->next_to_clean = i;
4196
4197         if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4198                 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4199
4200         return budget > 0;
4201 }
4202
4203 /**
4204  * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4205  * @irq: interrupt number
4206  * @data: pointer to a q_vector
4207  **/
4208 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4209 {
4210         struct i40e_q_vector *q_vector = data;
4211         struct i40e_vsi *vsi;
4212
4213         if (!q_vector->tx.ring)
4214                 return IRQ_HANDLED;
4215
4216         vsi = q_vector->tx.ring->vsi;
4217         i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4218
4219         return IRQ_HANDLED;
4220 }
4221
4222 /**
4223  * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4224  * @vsi: the VSI being configured
4225  * @v_idx: vector index
4226  * @qp_idx: queue pair index
4227  **/
4228 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4229 {
4230         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4231         struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4232         struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4233
4234         tx_ring->q_vector = q_vector;
4235         tx_ring->next = q_vector->tx.ring;
4236         q_vector->tx.ring = tx_ring;
4237         q_vector->tx.count++;
4238
4239         /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4240         if (i40e_enabled_xdp_vsi(vsi)) {
4241                 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4242
4243                 xdp_ring->q_vector = q_vector;
4244                 xdp_ring->next = q_vector->tx.ring;
4245                 q_vector->tx.ring = xdp_ring;
4246                 q_vector->tx.count++;
4247         }
4248
4249         rx_ring->q_vector = q_vector;
4250         rx_ring->next = q_vector->rx.ring;
4251         q_vector->rx.ring = rx_ring;
4252         q_vector->rx.count++;
4253 }
4254
4255 /**
4256  * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4257  * @vsi: the VSI being configured
4258  *
4259  * This function maps descriptor rings to the queue-specific vectors
4260  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
4261  * one vector per queue pair, but on a constrained vector budget, we
4262  * group the queue pairs as "efficiently" as possible.
4263  **/
4264 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4265 {
4266         int qp_remaining = vsi->num_queue_pairs;
4267         int q_vectors = vsi->num_q_vectors;
4268         int num_ringpairs;
4269         int v_start = 0;
4270         int qp_idx = 0;
4271
4272         /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4273          * group them so there are multiple queues per vector.
4274          * It is also important to go through all the vectors available to be
4275          * sure that if we don't use all the vectors, that the remaining vectors
4276          * are cleared. This is especially important when decreasing the
4277          * number of queues in use.
4278          */
4279         for (; v_start < q_vectors; v_start++) {
4280                 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4281
4282                 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4283
4284                 q_vector->num_ringpairs = num_ringpairs;
4285                 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4286
4287                 q_vector->rx.count = 0;
4288                 q_vector->tx.count = 0;
4289                 q_vector->rx.ring = NULL;
4290                 q_vector->tx.ring = NULL;
4291
4292                 while (num_ringpairs--) {
4293                         i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4294                         qp_idx++;
4295                         qp_remaining--;
4296                 }
4297         }
4298 }
4299
4300 /**
4301  * i40e_vsi_request_irq - Request IRQ from the OS
4302  * @vsi: the VSI being configured
4303  * @basename: name for the vector
4304  **/
4305 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4306 {
4307         struct i40e_pf *pf = vsi->back;
4308         int err;
4309
4310         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4311                 err = i40e_vsi_request_irq_msix(vsi, basename);
4312         else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4313                 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4314                                   pf->int_name, pf);
4315         else
4316                 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4317                                   pf->int_name, pf);
4318
4319         if (err)
4320                 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4321
4322         return err;
4323 }
4324
4325 #ifdef CONFIG_NET_POLL_CONTROLLER
4326 /**
4327  * i40e_netpoll - A Polling 'interrupt' handler
4328  * @netdev: network interface device structure
4329  *
4330  * This is used by netconsole to send skbs without having to re-enable
4331  * interrupts.  It's not called while the normal interrupt routine is executing.
4332  **/
4333 static void i40e_netpoll(struct net_device *netdev)
4334 {
4335         struct i40e_netdev_priv *np = netdev_priv(netdev);
4336         struct i40e_vsi *vsi = np->vsi;
4337         struct i40e_pf *pf = vsi->back;
4338         int i;
4339
4340         /* if interface is down do nothing */
4341         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4342                 return;
4343
4344         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4345                 for (i = 0; i < vsi->num_q_vectors; i++)
4346                         i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4347         } else {
4348                 i40e_intr(pf->pdev->irq, netdev);
4349         }
4350 }
4351 #endif
4352
4353 #define I40E_QTX_ENA_WAIT_COUNT 50
4354
4355 /**
4356  * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4357  * @pf: the PF being configured
4358  * @pf_q: the PF queue
4359  * @enable: enable or disable state of the queue
4360  *
4361  * This routine will wait for the given Tx queue of the PF to reach the
4362  * enabled or disabled state.
4363  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4364  * multiple retries; else will return 0 in case of success.
4365  **/
4366 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4367 {
4368         int i;
4369         u32 tx_reg;
4370
4371         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4372                 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4373                 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4374                         break;
4375
4376                 usleep_range(10, 20);
4377         }
4378         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4379                 return -ETIMEDOUT;
4380
4381         return 0;
4382 }
4383
4384 /**
4385  * i40e_control_tx_q - Start or stop a particular Tx queue
4386  * @pf: the PF structure
4387  * @pf_q: the PF queue to configure
4388  * @enable: start or stop the queue
4389  *
4390  * This function enables or disables a single queue. Note that any delay
4391  * required after the operation is expected to be handled by the caller of
4392  * this function.
4393  **/
4394 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4395 {
4396         struct i40e_hw *hw = &pf->hw;
4397         u32 tx_reg;
4398         int i;
4399
4400         /* warn the TX unit of coming changes */
4401         i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4402         if (!enable)
4403                 usleep_range(10, 20);
4404
4405         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4406                 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4407                 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4408                     ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4409                         break;
4410                 usleep_range(1000, 2000);
4411         }
4412
4413         /* Skip if the queue is already in the requested state */
4414         if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4415                 return;
4416
4417         /* turn on/off the queue */
4418         if (enable) {
4419                 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4420                 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4421         } else {
4422                 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4423         }
4424
4425         wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4426 }
4427
4428 /**
4429  * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4430  * @seid: VSI SEID
4431  * @pf: the PF structure
4432  * @pf_q: the PF queue to configure
4433  * @is_xdp: true if the queue is used for XDP
4434  * @enable: start or stop the queue
4435  **/
4436 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4437                            bool is_xdp, bool enable)
4438 {
4439         int ret;
4440
4441         i40e_control_tx_q(pf, pf_q, enable);
4442
4443         /* wait for the change to finish */
4444         ret = i40e_pf_txq_wait(pf, pf_q, enable);
4445         if (ret) {
4446                 dev_info(&pf->pdev->dev,
4447                          "VSI seid %d %sTx ring %d %sable timeout\n",
4448                          seid, (is_xdp ? "XDP " : ""), pf_q,
4449                          (enable ? "en" : "dis"));
4450         }
4451
4452         return ret;
4453 }
4454
4455 /**
4456  * i40e_vsi_control_tx - Start or stop a VSI's rings
4457  * @vsi: the VSI being configured
4458  * @enable: start or stop the rings
4459  **/
4460 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4461 {
4462         struct i40e_pf *pf = vsi->back;
4463         int i, pf_q, ret = 0;
4464
4465         pf_q = vsi->base_queue;
4466         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4467                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4468                                              pf_q,
4469                                              false /*is xdp*/, enable);
4470                 if (ret)
4471                         break;
4472
4473                 if (!i40e_enabled_xdp_vsi(vsi))
4474                         continue;
4475
4476                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4477                                              pf_q + vsi->alloc_queue_pairs,
4478                                              true /*is xdp*/, enable);
4479                 if (ret)
4480                         break;
4481         }
4482         return ret;
4483 }
4484
4485 /**
4486  * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4487  * @pf: the PF being configured
4488  * @pf_q: the PF queue
4489  * @enable: enable or disable state of the queue
4490  *
4491  * This routine will wait for the given Rx queue of the PF to reach the
4492  * enabled or disabled state.
4493  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4494  * multiple retries; else will return 0 in case of success.
4495  **/
4496 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4497 {
4498         int i;
4499         u32 rx_reg;
4500
4501         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4502                 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4503                 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4504                         break;
4505
4506                 usleep_range(10, 20);
4507         }
4508         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4509                 return -ETIMEDOUT;
4510
4511         return 0;
4512 }
4513
4514 /**
4515  * i40e_control_rx_q - Start or stop a particular Rx queue
4516  * @pf: the PF structure
4517  * @pf_q: the PF queue to configure
4518  * @enable: start or stop the queue
4519  *
4520  * This function enables or disables a single queue. Note that
4521  * any delay required after the operation is expected to be
4522  * handled by the caller of this function.
4523  **/
4524 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4525 {
4526         struct i40e_hw *hw = &pf->hw;
4527         u32 rx_reg;
4528         int i;
4529
4530         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4531                 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4532                 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4533                     ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4534                         break;
4535                 usleep_range(1000, 2000);
4536         }
4537
4538         /* Skip if the queue is already in the requested state */
4539         if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4540                 return;
4541
4542         /* turn on/off the queue */
4543         if (enable)
4544                 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4545         else
4546                 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4547
4548         wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4549 }
4550
4551 /**
4552  * i40e_control_wait_rx_q
4553  * @pf: the PF structure
4554  * @pf_q: queue being configured
4555  * @enable: start or stop the rings
4556  *
4557  * This function enables or disables a single queue along with waiting
4558  * for the change to finish. The caller of this function should handle
4559  * the delays needed in the case of disabling queues.
4560  **/
4561 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4562 {
4563         int ret = 0;
4564
4565         i40e_control_rx_q(pf, pf_q, enable);
4566
4567         /* wait for the change to finish */
4568         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4569         if (ret)
4570                 return ret;
4571
4572         return ret;
4573 }
4574
4575 /**
4576  * i40e_vsi_control_rx - Start or stop a VSI's rings
4577  * @vsi: the VSI being configured
4578  * @enable: start or stop the rings
4579  **/
4580 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4581 {
4582         struct i40e_pf *pf = vsi->back;
4583         int i, pf_q, ret = 0;
4584
4585         pf_q = vsi->base_queue;
4586         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4587                 ret = i40e_control_wait_rx_q(pf, pf_q, enable);
4588                 if (ret) {
4589                         dev_info(&pf->pdev->dev,
4590                                  "VSI seid %d Rx ring %d %sable timeout\n",
4591                                  vsi->seid, pf_q, (enable ? "en" : "dis"));
4592                         break;
4593                 }
4594         }
4595
4596         /* Due to HW errata, on Rx disable only, the register can indicate done
4597          * before it really is. Needs 50ms to be sure
4598          */
4599         if (!enable)
4600                 mdelay(50);
4601
4602         return ret;
4603 }
4604
4605 /**
4606  * i40e_vsi_start_rings - Start a VSI's rings
4607  * @vsi: the VSI being configured
4608  **/
4609 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4610 {
4611         int ret = 0;
4612
4613         /* do rx first for enable and last for disable */
4614         ret = i40e_vsi_control_rx(vsi, true);
4615         if (ret)
4616                 return ret;
4617         ret = i40e_vsi_control_tx(vsi, true);
4618
4619         return ret;
4620 }
4621
4622 /**
4623  * i40e_vsi_stop_rings - Stop a VSI's rings
4624  * @vsi: the VSI being configured
4625  **/
4626 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4627 {
4628         /* When port TX is suspended, don't wait */
4629         if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4630                 return i40e_vsi_stop_rings_no_wait(vsi);
4631
4632         /* do rx first for enable and last for disable
4633          * Ignore return value, we need to shutdown whatever we can
4634          */
4635         i40e_vsi_control_tx(vsi, false);
4636         i40e_vsi_control_rx(vsi, false);
4637 }
4638
4639 /**
4640  * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4641  * @vsi: the VSI being shutdown
4642  *
4643  * This function stops all the rings for a VSI but does not delay to verify
4644  * that rings have been disabled. It is expected that the caller is shutting
4645  * down multiple VSIs at once and will delay together for all the VSIs after
4646  * initiating the shutdown. This is particularly useful for shutting down lots
4647  * of VFs together. Otherwise, a large delay can be incurred while configuring
4648  * each VSI in serial.
4649  **/
4650 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4651 {
4652         struct i40e_pf *pf = vsi->back;
4653         int i, pf_q;
4654
4655         pf_q = vsi->base_queue;
4656         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4657                 i40e_control_tx_q(pf, pf_q, false);
4658                 i40e_control_rx_q(pf, pf_q, false);
4659         }
4660 }
4661
4662 /**
4663  * i40e_vsi_free_irq - Free the irq association with the OS
4664  * @vsi: the VSI being configured
4665  **/
4666 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4667 {
4668         struct i40e_pf *pf = vsi->back;
4669         struct i40e_hw *hw = &pf->hw;
4670         int base = vsi->base_vector;
4671         u32 val, qp;
4672         int i;
4673
4674         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4675                 if (!vsi->q_vectors)
4676                         return;
4677
4678                 if (!vsi->irqs_ready)
4679                         return;
4680
4681                 vsi->irqs_ready = false;
4682                 for (i = 0; i < vsi->num_q_vectors; i++) {
4683                         int irq_num;
4684                         u16 vector;
4685
4686                         vector = i + base;
4687                         irq_num = pf->msix_entries[vector].vector;
4688
4689                         /* free only the irqs that were actually requested */
4690                         if (!vsi->q_vectors[i] ||
4691                             !vsi->q_vectors[i]->num_ringpairs)
4692                                 continue;
4693
4694                         /* clear the affinity notifier in the IRQ descriptor */
4695                         irq_set_affinity_notifier(irq_num, NULL);
4696                         /* remove our suggested affinity mask for this IRQ */
4697                         irq_set_affinity_hint(irq_num, NULL);
4698                         synchronize_irq(irq_num);
4699                         free_irq(irq_num, vsi->q_vectors[i]);
4700
4701                         /* Tear down the interrupt queue link list
4702                          *
4703                          * We know that they come in pairs and always
4704                          * the Rx first, then the Tx.  To clear the
4705                          * link list, stick the EOL value into the
4706                          * next_q field of the registers.
4707                          */
4708                         val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4709                         qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4710                                 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4711                         val |= I40E_QUEUE_END_OF_LIST
4712                                 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4713                         wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4714
4715                         while (qp != I40E_QUEUE_END_OF_LIST) {
4716                                 u32 next;
4717
4718                                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4719
4720                                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4721                                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4722                                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4723                                          I40E_QINT_RQCTL_INTEVENT_MASK);
4724
4725                                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4726                                          I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4727
4728                                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4729
4730                                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4731
4732                                 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4733                                         >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4734
4735                                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4736                                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4737                                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4738                                          I40E_QINT_TQCTL_INTEVENT_MASK);
4739
4740                                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4741                                          I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4742
4743                                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4744                                 qp = next;
4745                         }
4746                 }
4747         } else {
4748                 free_irq(pf->pdev->irq, pf);
4749
4750                 val = rd32(hw, I40E_PFINT_LNKLST0);
4751                 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4752                         >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4753                 val |= I40E_QUEUE_END_OF_LIST
4754                         << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4755                 wr32(hw, I40E_PFINT_LNKLST0, val);
4756
4757                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4758                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4759                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4760                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4761                          I40E_QINT_RQCTL_INTEVENT_MASK);
4762
4763                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4764                         I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4765
4766                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4767
4768                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4769
4770                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4771                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4772                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4773                          I40E_QINT_TQCTL_INTEVENT_MASK);
4774
4775                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4776                         I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4777
4778                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4779         }
4780 }
4781
4782 /**
4783  * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4784  * @vsi: the VSI being configured
4785  * @v_idx: Index of vector to be freed
4786  *
4787  * This function frees the memory allocated to the q_vector.  In addition if
4788  * NAPI is enabled it will delete any references to the NAPI struct prior
4789  * to freeing the q_vector.
4790  **/
4791 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4792 {
4793         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4794         struct i40e_ring *ring;
4795
4796         if (!q_vector)
4797                 return;
4798
4799         /* disassociate q_vector from rings */
4800         i40e_for_each_ring(ring, q_vector->tx)
4801                 ring->q_vector = NULL;
4802
4803         i40e_for_each_ring(ring, q_vector->rx)
4804                 ring->q_vector = NULL;
4805
4806         /* only VSI w/ an associated netdev is set up w/ NAPI */
4807         if (vsi->netdev)
4808                 netif_napi_del(&q_vector->napi);
4809
4810         vsi->q_vectors[v_idx] = NULL;
4811
4812         kfree_rcu(q_vector, rcu);
4813 }
4814
4815 /**
4816  * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4817  * @vsi: the VSI being un-configured
4818  *
4819  * This frees the memory allocated to the q_vectors and
4820  * deletes references to the NAPI struct.
4821  **/
4822 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4823 {
4824         int v_idx;
4825
4826         for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4827                 i40e_free_q_vector(vsi, v_idx);
4828 }
4829
4830 /**
4831  * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4832  * @pf: board private structure
4833  **/
4834 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4835 {
4836         /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4837         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4838                 pci_disable_msix(pf->pdev);
4839                 kfree(pf->msix_entries);
4840                 pf->msix_entries = NULL;
4841                 kfree(pf->irq_pile);
4842                 pf->irq_pile = NULL;
4843         } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4844                 pci_disable_msi(pf->pdev);
4845         }
4846         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4847 }
4848
4849 /**
4850  * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4851  * @pf: board private structure
4852  *
4853  * We go through and clear interrupt specific resources and reset the structure
4854  * to pre-load conditions
4855  **/
4856 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4857 {
4858         int i;
4859
4860         i40e_free_misc_vector(pf);
4861
4862         i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4863                       I40E_IWARP_IRQ_PILE_ID);
4864
4865         i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4866         for (i = 0; i < pf->num_alloc_vsi; i++)
4867                 if (pf->vsi[i])
4868                         i40e_vsi_free_q_vectors(pf->vsi[i]);
4869         i40e_reset_interrupt_capability(pf);
4870 }
4871
4872 /**
4873  * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4874  * @vsi: the VSI being configured
4875  **/
4876 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4877 {
4878         int q_idx;
4879
4880         if (!vsi->netdev)
4881                 return;
4882
4883         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4884                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4885
4886                 if (q_vector->rx.ring || q_vector->tx.ring)
4887                         napi_enable(&q_vector->napi);
4888         }
4889 }
4890
4891 /**
4892  * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4893  * @vsi: the VSI being configured
4894  **/
4895 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4896 {
4897         int q_idx;
4898
4899         if (!vsi->netdev)
4900                 return;
4901
4902         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4903                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4904
4905                 if (q_vector->rx.ring || q_vector->tx.ring)
4906                         napi_disable(&q_vector->napi);
4907         }
4908 }
4909
4910 /**
4911  * i40e_vsi_close - Shut down a VSI
4912  * @vsi: the vsi to be quelled
4913  **/
4914 static void i40e_vsi_close(struct i40e_vsi *vsi)
4915 {
4916         struct i40e_pf *pf = vsi->back;
4917         if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4918                 i40e_down(vsi);
4919         i40e_vsi_free_irq(vsi);
4920         i40e_vsi_free_tx_resources(vsi);
4921         i40e_vsi_free_rx_resources(vsi);
4922         vsi->current_netdev_flags = 0;
4923         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
4924         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4925                 set_bit(__I40E_CLIENT_RESET, pf->state);
4926 }
4927
4928 /**
4929  * i40e_quiesce_vsi - Pause a given VSI
4930  * @vsi: the VSI being paused
4931  **/
4932 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4933 {
4934         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4935                 return;
4936
4937         set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4938         if (vsi->netdev && netif_running(vsi->netdev))
4939                 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4940         else
4941                 i40e_vsi_close(vsi);
4942 }
4943
4944 /**
4945  * i40e_unquiesce_vsi - Resume a given VSI
4946  * @vsi: the VSI being resumed
4947  **/
4948 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4949 {
4950         if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4951                 return;
4952
4953         if (vsi->netdev && netif_running(vsi->netdev))
4954                 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4955         else
4956                 i40e_vsi_open(vsi);   /* this clears the DOWN bit */
4957 }
4958
4959 /**
4960  * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4961  * @pf: the PF
4962  **/
4963 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4964 {
4965         int v;
4966
4967         for (v = 0; v < pf->num_alloc_vsi; v++) {
4968                 if (pf->vsi[v])
4969                         i40e_quiesce_vsi(pf->vsi[v]);
4970         }
4971 }
4972
4973 /**
4974  * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4975  * @pf: the PF
4976  **/
4977 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4978 {
4979         int v;
4980
4981         for (v = 0; v < pf->num_alloc_vsi; v++) {
4982                 if (pf->vsi[v])
4983                         i40e_unquiesce_vsi(pf->vsi[v]);
4984         }
4985 }
4986
4987 /**
4988  * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4989  * @vsi: the VSI being configured
4990  *
4991  * Wait until all queues on a given VSI have been disabled.
4992  **/
4993 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4994 {
4995         struct i40e_pf *pf = vsi->back;
4996         int i, pf_q, ret;
4997
4998         pf_q = vsi->base_queue;
4999         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5000                 /* Check and wait for the Tx queue */
5001                 ret = i40e_pf_txq_wait(pf, pf_q, false);
5002                 if (ret) {
5003                         dev_info(&pf->pdev->dev,
5004                                  "VSI seid %d Tx ring %d disable timeout\n",
5005                                  vsi->seid, pf_q);
5006                         return ret;
5007                 }
5008
5009                 if (!i40e_enabled_xdp_vsi(vsi))
5010                         goto wait_rx;
5011
5012                 /* Check and wait for the XDP Tx queue */
5013                 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5014                                        false);
5015                 if (ret) {
5016                         dev_info(&pf->pdev->dev,
5017                                  "VSI seid %d XDP Tx ring %d disable timeout\n",
5018                                  vsi->seid, pf_q);
5019                         return ret;
5020                 }
5021 wait_rx:
5022                 /* Check and wait for the Rx queue */
5023                 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5024                 if (ret) {
5025                         dev_info(&pf->pdev->dev,
5026                                  "VSI seid %d Rx ring %d disable timeout\n",
5027                                  vsi->seid, pf_q);
5028                         return ret;
5029                 }
5030         }
5031
5032         return 0;
5033 }
5034
5035 #ifdef CONFIG_I40E_DCB
5036 /**
5037  * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5038  * @pf: the PF
5039  *
5040  * This function waits for the queues to be in disabled state for all the
5041  * VSIs that are managed by this PF.
5042  **/
5043 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5044 {
5045         int v, ret = 0;
5046
5047         for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5048                 if (pf->vsi[v]) {
5049                         ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5050                         if (ret)
5051                                 break;
5052                 }
5053         }
5054
5055         return ret;
5056 }
5057
5058 #endif
5059
5060 /**
5061  * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5062  * @pf: pointer to PF
5063  *
5064  * Get TC map for ISCSI PF type that will include iSCSI TC
5065  * and LAN TC.
5066  **/
5067 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5068 {
5069         struct i40e_dcb_app_priority_table app;
5070         struct i40e_hw *hw = &pf->hw;
5071         u8 enabled_tc = 1; /* TC0 is always enabled */
5072         u8 tc, i;
5073         /* Get the iSCSI APP TLV */
5074         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5075
5076         for (i = 0; i < dcbcfg->numapps; i++) {
5077                 app = dcbcfg->app[i];
5078                 if (app.selector == I40E_APP_SEL_TCPIP &&
5079                     app.protocolid == I40E_APP_PROTOID_ISCSI) {
5080                         tc = dcbcfg->etscfg.prioritytable[app.priority];
5081                         enabled_tc |= BIT(tc);
5082                         break;
5083                 }
5084         }
5085
5086         return enabled_tc;
5087 }
5088
5089 /**
5090  * i40e_dcb_get_num_tc -  Get the number of TCs from DCBx config
5091  * @dcbcfg: the corresponding DCBx configuration structure
5092  *
5093  * Return the number of TCs from given DCBx configuration
5094  **/
5095 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5096 {
5097         int i, tc_unused = 0;
5098         u8 num_tc = 0;
5099         u8 ret = 0;
5100
5101         /* Scan the ETS Config Priority Table to find
5102          * traffic class enabled for a given priority
5103          * and create a bitmask of enabled TCs
5104          */
5105         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5106                 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5107
5108         /* Now scan the bitmask to check for
5109          * contiguous TCs starting with TC0
5110          */
5111         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5112                 if (num_tc & BIT(i)) {
5113                         if (!tc_unused) {
5114                                 ret++;
5115                         } else {
5116                                 pr_err("Non-contiguous TC - Disabling DCB\n");
5117                                 return 1;
5118                         }
5119                 } else {
5120                         tc_unused = 1;
5121                 }
5122         }
5123
5124         /* There is always at least TC0 */
5125         if (!ret)
5126                 ret = 1;
5127
5128         return ret;
5129 }
5130
5131 /**
5132  * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5133  * @dcbcfg: the corresponding DCBx configuration structure
5134  *
5135  * Query the current DCB configuration and return the number of
5136  * traffic classes enabled from the given DCBX config
5137  **/
5138 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5139 {
5140         u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5141         u8 enabled_tc = 1;
5142         u8 i;
5143
5144         for (i = 0; i < num_tc; i++)
5145                 enabled_tc |= BIT(i);
5146
5147         return enabled_tc;
5148 }
5149
5150 /**
5151  * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5152  * @pf: PF being queried
5153  *
5154  * Query the current MQPRIO configuration and return the number of
5155  * traffic classes enabled.
5156  **/
5157 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5158 {
5159         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5160         u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5161         u8 enabled_tc = 1, i;
5162
5163         for (i = 1; i < num_tc; i++)
5164                 enabled_tc |= BIT(i);
5165         return enabled_tc;
5166 }
5167
5168 /**
5169  * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5170  * @pf: PF being queried
5171  *
5172  * Return number of traffic classes enabled for the given PF
5173  **/
5174 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5175 {
5176         struct i40e_hw *hw = &pf->hw;
5177         u8 i, enabled_tc = 1;
5178         u8 num_tc = 0;
5179         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5180
5181         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5182                 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5183
5184         /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5185         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5186                 return 1;
5187
5188         /* SFP mode will be enabled for all TCs on port */
5189         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5190                 return i40e_dcb_get_num_tc(dcbcfg);
5191
5192         /* MFP mode return count of enabled TCs for this PF */
5193         if (pf->hw.func_caps.iscsi)
5194                 enabled_tc =  i40e_get_iscsi_tc_map(pf);
5195         else
5196                 return 1; /* Only TC0 */
5197
5198         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5199                 if (enabled_tc & BIT(i))
5200                         num_tc++;
5201         }
5202         return num_tc;
5203 }
5204
5205 /**
5206  * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5207  * @pf: PF being queried
5208  *
5209  * Return a bitmap for enabled traffic classes for this PF.
5210  **/
5211 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5212 {
5213         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5214                 return i40e_mqprio_get_enabled_tc(pf);
5215
5216         /* If neither MQPRIO nor DCB is enabled for this PF then just return
5217          * default TC
5218          */
5219         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5220                 return I40E_DEFAULT_TRAFFIC_CLASS;
5221
5222         /* SFP mode we want PF to be enabled for all TCs */
5223         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5224                 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5225
5226         /* MFP enabled and iSCSI PF type */
5227         if (pf->hw.func_caps.iscsi)
5228                 return i40e_get_iscsi_tc_map(pf);
5229         else
5230                 return I40E_DEFAULT_TRAFFIC_CLASS;
5231 }
5232
5233 /**
5234  * i40e_vsi_get_bw_info - Query VSI BW Information
5235  * @vsi: the VSI being queried
5236  *
5237  * Returns 0 on success, negative value on failure
5238  **/
5239 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5240 {
5241         struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5242         struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5243         struct i40e_pf *pf = vsi->back;
5244         struct i40e_hw *hw = &pf->hw;
5245         i40e_status ret;
5246         u32 tc_bw_max;
5247         int i;
5248
5249         /* Get the VSI level BW configuration */
5250         ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5251         if (ret) {
5252                 dev_info(&pf->pdev->dev,
5253                          "couldn't get PF vsi bw config, err %s aq_err %s\n",
5254                          i40e_stat_str(&pf->hw, ret),
5255                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5256                 return -EINVAL;
5257         }
5258
5259         /* Get the VSI level BW configuration per TC */
5260         ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5261                                                NULL);
5262         if (ret) {
5263                 dev_info(&pf->pdev->dev,
5264                          "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5265                          i40e_stat_str(&pf->hw, ret),
5266                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5267                 return -EINVAL;
5268         }
5269
5270         if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5271                 dev_info(&pf->pdev->dev,
5272                          "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5273                          bw_config.tc_valid_bits,
5274                          bw_ets_config.tc_valid_bits);
5275                 /* Still continuing */
5276         }
5277
5278         vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5279         vsi->bw_max_quanta = bw_config.max_bw;
5280         tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5281                     (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5282         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5283                 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5284                 vsi->bw_ets_limit_credits[i] =
5285                                         le16_to_cpu(bw_ets_config.credits[i]);
5286                 /* 3 bits out of 4 for each TC */
5287                 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5288         }
5289
5290         return 0;
5291 }
5292
5293 /**
5294  * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5295  * @vsi: the VSI being configured
5296  * @enabled_tc: TC bitmap
5297  * @bw_share: BW shared credits per TC
5298  *
5299  * Returns 0 on success, negative value on failure
5300  **/
5301 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5302                                        u8 *bw_share)
5303 {
5304         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5305         struct i40e_pf *pf = vsi->back;
5306         i40e_status ret;
5307         int i;
5308
5309         /* There is no need to reset BW when mqprio mode is on.  */
5310         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5311                 return 0;
5312         if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5313                 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5314                 if (ret)
5315                         dev_info(&pf->pdev->dev,
5316                                  "Failed to reset tx rate for vsi->seid %u\n",
5317                                  vsi->seid);
5318                 return ret;
5319         }
5320         memset(&bw_data, 0, sizeof(bw_data));
5321         bw_data.tc_valid_bits = enabled_tc;
5322         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5323                 bw_data.tc_bw_credits[i] = bw_share[i];
5324
5325         ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5326         if (ret) {
5327                 dev_info(&pf->pdev->dev,
5328                          "AQ command Config VSI BW allocation per TC failed = %d\n",
5329                          pf->hw.aq.asq_last_status);
5330                 return -EINVAL;
5331         }
5332
5333         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5334                 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5335
5336         return 0;
5337 }
5338
5339 /**
5340  * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5341  * @vsi: the VSI being configured
5342  * @enabled_tc: TC map to be enabled
5343  *
5344  **/
5345 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5346 {
5347         struct net_device *netdev = vsi->netdev;
5348         struct i40e_pf *pf = vsi->back;
5349         struct i40e_hw *hw = &pf->hw;
5350         u8 netdev_tc = 0;
5351         int i;
5352         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5353
5354         if (!netdev)
5355                 return;
5356
5357         if (!enabled_tc) {
5358                 netdev_reset_tc(netdev);
5359                 return;
5360         }
5361
5362         /* Set up actual enabled TCs on the VSI */
5363         if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5364                 return;
5365
5366         /* set per TC queues for the VSI */
5367         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5368                 /* Only set TC queues for enabled tcs
5369                  *
5370                  * e.g. For a VSI that has TC0 and TC3 enabled the
5371                  * enabled_tc bitmap would be 0x00001001; the driver
5372                  * will set the numtc for netdev as 2 that will be
5373                  * referenced by the netdev layer as TC 0 and 1.
5374                  */
5375                 if (vsi->tc_config.enabled_tc & BIT(i))
5376                         netdev_set_tc_queue(netdev,
5377                                         vsi->tc_config.tc_info[i].netdev_tc,
5378                                         vsi->tc_config.tc_info[i].qcount,
5379                                         vsi->tc_config.tc_info[i].qoffset);
5380         }
5381
5382         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5383                 return;
5384
5385         /* Assign UP2TC map for the VSI */
5386         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5387                 /* Get the actual TC# for the UP */
5388                 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5389                 /* Get the mapped netdev TC# for the UP */
5390                 netdev_tc =  vsi->tc_config.tc_info[ets_tc].netdev_tc;
5391                 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5392         }
5393 }
5394
5395 /**
5396  * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5397  * @vsi: the VSI being configured
5398  * @ctxt: the ctxt buffer returned from AQ VSI update param command
5399  **/
5400 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5401                                       struct i40e_vsi_context *ctxt)
5402 {
5403         /* copy just the sections touched not the entire info
5404          * since not all sections are valid as returned by
5405          * update vsi params
5406          */
5407         vsi->info.mapping_flags = ctxt->info.mapping_flags;
5408         memcpy(&vsi->info.queue_mapping,
5409                &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5410         memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5411                sizeof(vsi->info.tc_mapping));
5412 }
5413
5414 /**
5415  * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5416  * @vsi: VSI to be configured
5417  * @enabled_tc: TC bitmap
5418  *
5419  * This configures a particular VSI for TCs that are mapped to the
5420  * given TC bitmap. It uses default bandwidth share for TCs across
5421  * VSIs to configure TC for a particular VSI.
5422  *
5423  * NOTE:
5424  * It is expected that the VSI queues have been quisced before calling
5425  * this function.
5426  **/
5427 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5428 {
5429         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5430         struct i40e_pf *pf = vsi->back;
5431         struct i40e_hw *hw = &pf->hw;
5432         struct i40e_vsi_context ctxt;
5433         int ret = 0;
5434         int i;
5435
5436         /* Check if enabled_tc is same as existing or new TCs */
5437         if (vsi->tc_config.enabled_tc == enabled_tc &&
5438             vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5439                 return ret;
5440
5441         /* Enable ETS TCs with equal BW Share for now across all VSIs */
5442         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5443                 if (enabled_tc & BIT(i))
5444                         bw_share[i] = 1;
5445         }
5446
5447         ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5448         if (ret) {
5449                 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5450
5451                 dev_info(&pf->pdev->dev,
5452                          "Failed configuring TC map %d for VSI %d\n",
5453                          enabled_tc, vsi->seid);
5454                 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5455                                                   &bw_config, NULL);
5456                 if (ret) {
5457                         dev_info(&pf->pdev->dev,
5458                                  "Failed querying vsi bw info, err %s aq_err %s\n",
5459                                  i40e_stat_str(hw, ret),
5460                                  i40e_aq_str(hw, hw->aq.asq_last_status));
5461                         goto out;
5462                 }
5463                 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5464                         u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5465
5466                         if (!valid_tc)
5467                                 valid_tc = bw_config.tc_valid_bits;
5468                         /* Always enable TC0, no matter what */
5469                         valid_tc |= 1;
5470                         dev_info(&pf->pdev->dev,
5471                                  "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5472                                  enabled_tc, bw_config.tc_valid_bits, valid_tc);
5473                         enabled_tc = valid_tc;
5474                 }
5475
5476                 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5477                 if (ret) {
5478                         dev_err(&pf->pdev->dev,
5479                                 "Unable to  configure TC map %d for VSI %d\n",
5480                                 enabled_tc, vsi->seid);
5481                         goto out;
5482                 }
5483         }
5484
5485         /* Update Queue Pairs Mapping for currently enabled UPs */
5486         ctxt.seid = vsi->seid;
5487         ctxt.pf_num = vsi->back->hw.pf_id;
5488         ctxt.vf_num = 0;
5489         ctxt.uplink_seid = vsi->uplink_seid;
5490         ctxt.info = vsi->info;
5491         if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5492                 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5493                 if (ret)
5494                         goto out;
5495         } else {
5496                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5497         }
5498
5499         /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5500          * queues changed.
5501          */
5502         if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5503                 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5504                                       vsi->num_queue_pairs);
5505                 ret = i40e_vsi_config_rss(vsi);
5506                 if (ret) {
5507                         dev_info(&vsi->back->pdev->dev,
5508                                  "Failed to reconfig rss for num_queues\n");
5509                         return ret;
5510                 }
5511                 vsi->reconfig_rss = false;
5512         }
5513         if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5514                 ctxt.info.valid_sections |=
5515                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5516                 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5517         }
5518
5519         /* Update the VSI after updating the VSI queue-mapping
5520          * information
5521          */
5522         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5523         if (ret) {
5524                 dev_info(&pf->pdev->dev,
5525                          "Update vsi tc config failed, err %s aq_err %s\n",
5526                          i40e_stat_str(hw, ret),
5527                          i40e_aq_str(hw, hw->aq.asq_last_status));
5528                 goto out;
5529         }
5530         /* update the local VSI info with updated queue map */
5531         i40e_vsi_update_queue_map(vsi, &ctxt);
5532         vsi->info.valid_sections = 0;
5533
5534         /* Update current VSI BW information */
5535         ret = i40e_vsi_get_bw_info(vsi);
5536         if (ret) {
5537                 dev_info(&pf->pdev->dev,
5538                          "Failed updating vsi bw info, err %s aq_err %s\n",
5539                          i40e_stat_str(hw, ret),
5540                          i40e_aq_str(hw, hw->aq.asq_last_status));
5541                 goto out;
5542         }
5543
5544         /* Update the netdev TC setup */
5545         i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5546 out:
5547         return ret;
5548 }
5549
5550 /**
5551  * i40e_get_link_speed - Returns link speed for the interface
5552  * @vsi: VSI to be configured
5553  *
5554  **/
5555 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5556 {
5557         struct i40e_pf *pf = vsi->back;
5558
5559         switch (pf->hw.phy.link_info.link_speed) {
5560         case I40E_LINK_SPEED_40GB:
5561                 return 40000;
5562         case I40E_LINK_SPEED_25GB:
5563                 return 25000;
5564         case I40E_LINK_SPEED_20GB:
5565                 return 20000;
5566         case I40E_LINK_SPEED_10GB:
5567                 return 10000;
5568         case I40E_LINK_SPEED_1GB:
5569                 return 1000;
5570         default:
5571                 return -EINVAL;
5572         }
5573 }
5574
5575 /**
5576  * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5577  * @vsi: VSI to be configured
5578  * @seid: seid of the channel/VSI
5579  * @max_tx_rate: max TX rate to be configured as BW limit
5580  *
5581  * Helper function to set BW limit for a given VSI
5582  **/
5583 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5584 {
5585         struct i40e_pf *pf = vsi->back;
5586         u64 credits = 0;
5587         int speed = 0;
5588         int ret = 0;
5589
5590         speed = i40e_get_link_speed(vsi);
5591         if (max_tx_rate > speed) {
5592                 dev_err(&pf->pdev->dev,
5593                         "Invalid max tx rate %llu specified for VSI seid %d.",
5594                         max_tx_rate, seid);
5595                 return -EINVAL;
5596         }
5597         if (max_tx_rate && max_tx_rate < 50) {
5598                 dev_warn(&pf->pdev->dev,
5599                          "Setting max tx rate to minimum usable value of 50Mbps.\n");
5600                 max_tx_rate = 50;
5601         }
5602
5603         /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5604         credits = max_tx_rate;
5605         do_div(credits, I40E_BW_CREDIT_DIVISOR);
5606         ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5607                                           I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5608         if (ret)
5609                 dev_err(&pf->pdev->dev,
5610                         "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5611                         max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5612                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5613         return ret;
5614 }
5615
5616 /**
5617  * i40e_remove_queue_channels - Remove queue channels for the TCs
5618  * @vsi: VSI to be configured
5619  *
5620  * Remove queue channels for the TCs
5621  **/
5622 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5623 {
5624         enum i40e_admin_queue_err last_aq_status;
5625         struct i40e_cloud_filter *cfilter;
5626         struct i40e_channel *ch, *ch_tmp;
5627         struct i40e_pf *pf = vsi->back;
5628         struct hlist_node *node;
5629         int ret, i;
5630
5631         /* Reset rss size that was stored when reconfiguring rss for
5632          * channel VSIs with non-power-of-2 queue count.
5633          */
5634         vsi->current_rss_size = 0;
5635
5636         /* perform cleanup for channels if they exist */
5637         if (list_empty(&vsi->ch_list))
5638                 return;
5639
5640         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5641                 struct i40e_vsi *p_vsi;
5642
5643                 list_del(&ch->list);
5644                 p_vsi = ch->parent_vsi;
5645                 if (!p_vsi || !ch->initialized) {
5646                         kfree(ch);
5647                         continue;
5648                 }
5649                 /* Reset queue contexts */
5650                 for (i = 0; i < ch->num_queue_pairs; i++) {
5651                         struct i40e_ring *tx_ring, *rx_ring;
5652                         u16 pf_q;
5653
5654                         pf_q = ch->base_queue + i;
5655                         tx_ring = vsi->tx_rings[pf_q];
5656                         tx_ring->ch = NULL;
5657
5658                         rx_ring = vsi->rx_rings[pf_q];
5659                         rx_ring->ch = NULL;
5660                 }
5661
5662                 /* Reset BW configured for this VSI via mqprio */
5663                 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5664                 if (ret)
5665                         dev_info(&vsi->back->pdev->dev,
5666                                  "Failed to reset tx rate for ch->seid %u\n",
5667                                  ch->seid);
5668
5669                 /* delete cloud filters associated with this channel */
5670                 hlist_for_each_entry_safe(cfilter, node,
5671                                           &pf->cloud_filter_list, cloud_node) {
5672                         if (cfilter->seid != ch->seid)
5673                                 continue;
5674
5675                         hash_del(&cfilter->cloud_node);
5676                         if (cfilter->dst_port)
5677                                 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5678                                                                         cfilter,
5679                                                                         false);
5680                         else
5681                                 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5682                                                                 false);
5683                         last_aq_status = pf->hw.aq.asq_last_status;
5684                         if (ret)
5685                                 dev_info(&pf->pdev->dev,
5686                                          "Failed to delete cloud filter, err %s aq_err %s\n",
5687                                          i40e_stat_str(&pf->hw, ret),
5688                                          i40e_aq_str(&pf->hw, last_aq_status));
5689                         kfree(cfilter);
5690                 }
5691
5692                 /* delete VSI from FW */
5693                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5694                                              NULL);
5695                 if (ret)
5696                         dev_err(&vsi->back->pdev->dev,
5697                                 "unable to remove channel (%d) for parent VSI(%d)\n",
5698                                 ch->seid, p_vsi->seid);
5699                 kfree(ch);
5700         }
5701         INIT_LIST_HEAD(&vsi->ch_list);
5702 }
5703
5704 /**
5705  * i40e_is_any_channel - channel exist or not
5706  * @vsi: ptr to VSI to which channels are associated with
5707  *
5708  * Returns true or false if channel(s) exist for associated VSI or not
5709  **/
5710 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5711 {
5712         struct i40e_channel *ch, *ch_tmp;
5713
5714         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5715                 if (ch->initialized)
5716                         return true;
5717         }
5718
5719         return false;
5720 }
5721
5722 /**
5723  * i40e_get_max_queues_for_channel
5724  * @vsi: ptr to VSI to which channels are associated with
5725  *
5726  * Helper function which returns max value among the queue counts set on the
5727  * channels/TCs created.
5728  **/
5729 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5730 {
5731         struct i40e_channel *ch, *ch_tmp;
5732         int max = 0;
5733
5734         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5735                 if (!ch->initialized)
5736                         continue;
5737                 if (ch->num_queue_pairs > max)
5738                         max = ch->num_queue_pairs;
5739         }
5740
5741         return max;
5742 }
5743
5744 /**
5745  * i40e_validate_num_queues - validate num_queues w.r.t channel
5746  * @pf: ptr to PF device
5747  * @num_queues: number of queues
5748  * @vsi: the parent VSI
5749  * @reconfig_rss: indicates should the RSS be reconfigured or not
5750  *
5751  * This function validates number of queues in the context of new channel
5752  * which is being established and determines if RSS should be reconfigured
5753  * or not for parent VSI.
5754  **/
5755 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5756                                     struct i40e_vsi *vsi, bool *reconfig_rss)
5757 {
5758         int max_ch_queues;
5759
5760         if (!reconfig_rss)
5761                 return -EINVAL;
5762
5763         *reconfig_rss = false;
5764         if (vsi->current_rss_size) {
5765                 if (num_queues > vsi->current_rss_size) {
5766                         dev_dbg(&pf->pdev->dev,
5767                                 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5768                                 num_queues, vsi->current_rss_size);
5769                         return -EINVAL;
5770                 } else if ((num_queues < vsi->current_rss_size) &&
5771                            (!is_power_of_2(num_queues))) {
5772                         dev_dbg(&pf->pdev->dev,
5773                                 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5774                                 num_queues, vsi->current_rss_size);
5775                         return -EINVAL;
5776                 }
5777         }
5778
5779         if (!is_power_of_2(num_queues)) {
5780                 /* Find the max num_queues configured for channel if channel
5781                  * exist.
5782                  * if channel exist, then enforce 'num_queues' to be more than
5783                  * max ever queues configured for channel.
5784                  */
5785                 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5786                 if (num_queues < max_ch_queues) {
5787                         dev_dbg(&pf->pdev->dev,
5788                                 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5789                                 num_queues, max_ch_queues);
5790                         return -EINVAL;
5791                 }
5792                 *reconfig_rss = true;
5793         }
5794
5795         return 0;
5796 }
5797
5798 /**
5799  * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5800  * @vsi: the VSI being setup
5801  * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5802  *
5803  * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5804  **/
5805 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5806 {
5807         struct i40e_pf *pf = vsi->back;
5808         u8 seed[I40E_HKEY_ARRAY_SIZE];
5809         struct i40e_hw *hw = &pf->hw;
5810         int local_rss_size;
5811         u8 *lut;
5812         int ret;
5813
5814         if (!vsi->rss_size)
5815                 return -EINVAL;
5816
5817         if (rss_size > vsi->rss_size)
5818                 return -EINVAL;
5819
5820         local_rss_size = min_t(int, vsi->rss_size, rss_size);
5821         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5822         if (!lut)
5823                 return -ENOMEM;
5824
5825         /* Ignoring user configured lut if there is one */
5826         i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5827
5828         /* Use user configured hash key if there is one, otherwise
5829          * use default.
5830          */
5831         if (vsi->rss_hkey_user)
5832                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5833         else
5834                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5835
5836         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5837         if (ret) {
5838                 dev_info(&pf->pdev->dev,
5839                          "Cannot set RSS lut, err %s aq_err %s\n",
5840                          i40e_stat_str(hw, ret),
5841                          i40e_aq_str(hw, hw->aq.asq_last_status));
5842                 kfree(lut);
5843                 return ret;
5844         }
5845         kfree(lut);
5846
5847         /* Do the update w.r.t. storing rss_size */
5848         if (!vsi->orig_rss_size)
5849                 vsi->orig_rss_size = vsi->rss_size;
5850         vsi->current_rss_size = local_rss_size;
5851
5852         return ret;
5853 }
5854
5855 /**
5856  * i40e_channel_setup_queue_map - Setup a channel queue map
5857  * @pf: ptr to PF device
5858  * @ctxt: VSI context structure
5859  * @ch: ptr to channel structure
5860  *
5861  * Setup queue map for a specific channel
5862  **/
5863 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5864                                          struct i40e_vsi_context *ctxt,
5865                                          struct i40e_channel *ch)
5866 {
5867         u16 qcount, qmap, sections = 0;
5868         u8 offset = 0;
5869         int pow;
5870
5871         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5872         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5873
5874         qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5875         ch->num_queue_pairs = qcount;
5876
5877         /* find the next higher power-of-2 of num queue pairs */
5878         pow = ilog2(qcount);
5879         if (!is_power_of_2(qcount))
5880                 pow++;
5881
5882         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5883                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5884
5885         /* Setup queue TC[0].qmap for given VSI context */
5886         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5887
5888         ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5889         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5890         ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5891         ctxt->info.valid_sections |= cpu_to_le16(sections);
5892 }
5893
5894 /**
5895  * i40e_add_channel - add a channel by adding VSI
5896  * @pf: ptr to PF device
5897  * @uplink_seid: underlying HW switching element (VEB) ID
5898  * @ch: ptr to channel structure
5899  *
5900  * Add a channel (VSI) using add_vsi and queue_map
5901  **/
5902 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5903                             struct i40e_channel *ch)
5904 {
5905         struct i40e_hw *hw = &pf->hw;
5906         struct i40e_vsi_context ctxt;
5907         u8 enabled_tc = 0x1; /* TC0 enabled */
5908         int ret;
5909
5910         if (ch->type != I40E_VSI_VMDQ2) {
5911                 dev_info(&pf->pdev->dev,
5912                          "add new vsi failed, ch->type %d\n", ch->type);
5913                 return -EINVAL;
5914         }
5915
5916         memset(&ctxt, 0, sizeof(ctxt));
5917         ctxt.pf_num = hw->pf_id;
5918         ctxt.vf_num = 0;
5919         ctxt.uplink_seid = uplink_seid;
5920         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5921         if (ch->type == I40E_VSI_VMDQ2)
5922                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5923
5924         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5925                 ctxt.info.valid_sections |=
5926                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5927                 ctxt.info.switch_id =
5928                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5929         }
5930
5931         /* Set queue map for a given VSI context */
5932         i40e_channel_setup_queue_map(pf, &ctxt, ch);
5933
5934         /* Now time to create VSI */
5935         ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5936         if (ret) {
5937                 dev_info(&pf->pdev->dev,
5938                          "add new vsi failed, err %s aq_err %s\n",
5939                          i40e_stat_str(&pf->hw, ret),
5940                          i40e_aq_str(&pf->hw,
5941                                      pf->hw.aq.asq_last_status));
5942                 return -ENOENT;
5943         }
5944
5945         /* Success, update channel, set enabled_tc only if the channel
5946          * is not a macvlan
5947          */
5948         ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
5949         ch->seid = ctxt.seid;
5950         ch->vsi_number = ctxt.vsi_number;
5951         ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
5952
5953         /* copy just the sections touched not the entire info
5954          * since not all sections are valid as returned by
5955          * update vsi params
5956          */
5957         ch->info.mapping_flags = ctxt.info.mapping_flags;
5958         memcpy(&ch->info.queue_mapping,
5959                &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5960         memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5961                sizeof(ctxt.info.tc_mapping));
5962
5963         return 0;
5964 }
5965
5966 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5967                                   u8 *bw_share)
5968 {
5969         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5970         i40e_status ret;
5971         int i;
5972
5973         memset(&bw_data, 0, sizeof(bw_data));
5974         bw_data.tc_valid_bits = ch->enabled_tc;
5975         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5976                 bw_data.tc_bw_credits[i] = bw_share[i];
5977
5978         ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5979                                        &bw_data, NULL);
5980         if (ret) {
5981                 dev_info(&vsi->back->pdev->dev,
5982                          "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5983                          vsi->back->hw.aq.asq_last_status, ch->seid);
5984                 return -EINVAL;
5985         }
5986
5987         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5988                 ch->info.qs_handle[i] = bw_data.qs_handles[i];
5989
5990         return 0;
5991 }
5992
5993 /**
5994  * i40e_channel_config_tx_ring - config TX ring associated with new channel
5995  * @pf: ptr to PF device
5996  * @vsi: the VSI being setup
5997  * @ch: ptr to channel structure
5998  *
5999  * Configure TX rings associated with channel (VSI) since queues are being
6000  * from parent VSI.
6001  **/
6002 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6003                                        struct i40e_vsi *vsi,
6004                                        struct i40e_channel *ch)
6005 {
6006         i40e_status ret;
6007         int i;
6008         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6009
6010         /* Enable ETS TCs with equal BW Share for now across all VSIs */
6011         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6012                 if (ch->enabled_tc & BIT(i))
6013                         bw_share[i] = 1;
6014         }
6015
6016         /* configure BW for new VSI */
6017         ret = i40e_channel_config_bw(vsi, ch, bw_share);
6018         if (ret) {
6019                 dev_info(&vsi->back->pdev->dev,
6020                          "Failed configuring TC map %d for channel (seid %u)\n",
6021                          ch->enabled_tc, ch->seid);
6022                 return ret;
6023         }
6024
6025         for (i = 0; i < ch->num_queue_pairs; i++) {
6026                 struct i40e_ring *tx_ring, *rx_ring;
6027                 u16 pf_q;
6028
6029                 pf_q = ch->base_queue + i;
6030
6031                 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6032                  * context
6033                  */
6034                 tx_ring = vsi->tx_rings[pf_q];
6035                 tx_ring->ch = ch;
6036
6037                 /* Get the RX ring ptr */
6038                 rx_ring = vsi->rx_rings[pf_q];
6039                 rx_ring->ch = ch;
6040         }
6041
6042         return 0;
6043 }
6044
6045 /**
6046  * i40e_setup_hw_channel - setup new channel
6047  * @pf: ptr to PF device
6048  * @vsi: the VSI being setup
6049  * @ch: ptr to channel structure
6050  * @uplink_seid: underlying HW switching element (VEB) ID
6051  * @type: type of channel to be created (VMDq2/VF)
6052  *
6053  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6054  * and configures TX rings accordingly
6055  **/
6056 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6057                                         struct i40e_vsi *vsi,
6058                                         struct i40e_channel *ch,
6059                                         u16 uplink_seid, u8 type)
6060 {
6061         int ret;
6062
6063         ch->initialized = false;
6064         ch->base_queue = vsi->next_base_queue;
6065         ch->type = type;
6066
6067         /* Proceed with creation of channel (VMDq2) VSI */
6068         ret = i40e_add_channel(pf, uplink_seid, ch);
6069         if (ret) {
6070                 dev_info(&pf->pdev->dev,
6071                          "failed to add_channel using uplink_seid %u\n",
6072                          uplink_seid);
6073                 return ret;
6074         }
6075
6076         /* Mark the successful creation of channel */
6077         ch->initialized = true;
6078
6079         /* Reconfigure TX queues using QTX_CTL register */
6080         ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6081         if (ret) {
6082                 dev_info(&pf->pdev->dev,
6083                          "failed to configure TX rings for channel %u\n",
6084                          ch->seid);
6085                 return ret;
6086         }
6087
6088         /* update 'next_base_queue' */
6089         vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6090         dev_dbg(&pf->pdev->dev,
6091                 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6092                 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6093                 ch->num_queue_pairs,
6094                 vsi->next_base_queue);
6095         return ret;
6096 }
6097
6098 /**
6099  * i40e_setup_channel - setup new channel using uplink element
6100  * @pf: ptr to PF device
6101  * @vsi: pointer to the VSI to set up the channel within
6102  * @ch: ptr to channel structure
6103  *
6104  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6105  * and uplink switching element (uplink_seid)
6106  **/
6107 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6108                                struct i40e_channel *ch)
6109 {
6110         u8 vsi_type;
6111         u16 seid;
6112         int ret;
6113
6114         if (vsi->type == I40E_VSI_MAIN) {
6115                 vsi_type = I40E_VSI_VMDQ2;
6116         } else {
6117                 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6118                         vsi->type);
6119                 return false;
6120         }
6121
6122         /* underlying switching element */
6123         seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6124
6125         /* create channel (VSI), configure TX rings */
6126         ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6127         if (ret) {
6128                 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6129                 return false;
6130         }
6131
6132         return ch->initialized ? true : false;
6133 }
6134
6135 /**
6136  * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6137  * @vsi: ptr to VSI which has PF backing
6138  *
6139  * Sets up switch mode correctly if it needs to be changed and perform
6140  * what are allowed modes.
6141  **/
6142 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6143 {
6144         u8 mode;
6145         struct i40e_pf *pf = vsi->back;
6146         struct i40e_hw *hw = &pf->hw;
6147         int ret;
6148
6149         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6150         if (ret)
6151                 return -EINVAL;
6152
6153         if (hw->dev_caps.switch_mode) {
6154                 /* if switch mode is set, support mode2 (non-tunneled for
6155                  * cloud filter) for now
6156                  */
6157                 u32 switch_mode = hw->dev_caps.switch_mode &
6158                                   I40E_SWITCH_MODE_MASK;
6159                 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6160                         if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6161                                 return 0;
6162                         dev_err(&pf->pdev->dev,
6163                                 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6164                                 hw->dev_caps.switch_mode);
6165                         return -EINVAL;
6166                 }
6167         }
6168
6169         /* Set Bit 7 to be valid */
6170         mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6171
6172         /* Set L4type for TCP support */
6173         mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6174
6175         /* Set cloud filter mode */
6176         mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6177
6178         /* Prep mode field for set_switch_config */
6179         ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6180                                         pf->last_sw_conf_valid_flags,
6181                                         mode, NULL);
6182         if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6183                 dev_err(&pf->pdev->dev,
6184                         "couldn't set switch config bits, err %s aq_err %s\n",
6185                         i40e_stat_str(hw, ret),
6186                         i40e_aq_str(hw,
6187                                     hw->aq.asq_last_status));
6188
6189         return ret;
6190 }
6191
6192 /**
6193  * i40e_create_queue_channel - function to create channel
6194  * @vsi: VSI to be configured
6195  * @ch: ptr to channel (it contains channel specific params)
6196  *
6197  * This function creates channel (VSI) using num_queues specified by user,
6198  * reconfigs RSS if needed.
6199  **/
6200 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6201                               struct i40e_channel *ch)
6202 {
6203         struct i40e_pf *pf = vsi->back;
6204         bool reconfig_rss;
6205         int err;
6206
6207         if (!ch)
6208                 return -EINVAL;
6209
6210         if (!ch->num_queue_pairs) {
6211                 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6212                         ch->num_queue_pairs);
6213                 return -EINVAL;
6214         }
6215
6216         /* validate user requested num_queues for channel */
6217         err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6218                                        &reconfig_rss);
6219         if (err) {
6220                 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6221                          ch->num_queue_pairs);
6222                 return -EINVAL;
6223         }
6224
6225         /* By default we are in VEPA mode, if this is the first VF/VMDq
6226          * VSI to be added switch to VEB mode.
6227          */
6228         if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6229             (!i40e_is_any_channel(vsi))) {
6230                 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6231                         dev_dbg(&pf->pdev->dev,
6232                                 "Failed to create channel. Override queues (%u) not power of 2\n",
6233                                 vsi->tc_config.tc_info[0].qcount);
6234                         return -EINVAL;
6235                 }
6236
6237                 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6238                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6239
6240                         if (vsi->type == I40E_VSI_MAIN) {
6241                                 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6242                                         i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6243                                                       true);
6244                                 else
6245                                         i40e_do_reset_safe(pf,
6246                                                            I40E_PF_RESET_FLAG);
6247                         }
6248                 }
6249                 /* now onwards for main VSI, number of queues will be value
6250                  * of TC0's queue count
6251                  */
6252         }
6253
6254         /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6255          * it should be more than num_queues
6256          */
6257         if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6258                 dev_dbg(&pf->pdev->dev,
6259                         "Error: cnt_q_avail (%u) less than num_queues %d\n",
6260                         vsi->cnt_q_avail, ch->num_queue_pairs);
6261                 return -EINVAL;
6262         }
6263
6264         /* reconfig_rss only if vsi type is MAIN_VSI */
6265         if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6266                 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6267                 if (err) {
6268                         dev_info(&pf->pdev->dev,
6269                                  "Error: unable to reconfig rss for num_queues (%u)\n",
6270                                  ch->num_queue_pairs);
6271                         return -EINVAL;
6272                 }
6273         }
6274
6275         if (!i40e_setup_channel(pf, vsi, ch)) {
6276                 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6277                 return -EINVAL;
6278         }
6279
6280         dev_info(&pf->pdev->dev,
6281                  "Setup channel (id:%u) utilizing num_queues %d\n",
6282                  ch->seid, ch->num_queue_pairs);
6283
6284         /* configure VSI for BW limit */
6285         if (ch->max_tx_rate) {
6286                 u64 credits = ch->max_tx_rate;
6287
6288                 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6289                         return -EINVAL;
6290
6291                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6292                 dev_dbg(&pf->pdev->dev,
6293                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6294                         ch->max_tx_rate,
6295                         credits,
6296                         ch->seid);
6297         }
6298
6299         /* in case of VF, this will be main SRIOV VSI */
6300         ch->parent_vsi = vsi;
6301
6302         /* and update main_vsi's count for queue_available to use */
6303         vsi->cnt_q_avail -= ch->num_queue_pairs;
6304
6305         return 0;
6306 }
6307
6308 /**
6309  * i40e_configure_queue_channels - Add queue channel for the given TCs
6310  * @vsi: VSI to be configured
6311  *
6312  * Configures queue channel mapping to the given TCs
6313  **/
6314 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6315 {
6316         struct i40e_channel *ch;
6317         u64 max_rate = 0;
6318         int ret = 0, i;
6319
6320         /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6321         vsi->tc_seid_map[0] = vsi->seid;
6322         for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6323                 if (vsi->tc_config.enabled_tc & BIT(i)) {
6324                         ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6325                         if (!ch) {
6326                                 ret = -ENOMEM;
6327                                 goto err_free;
6328                         }
6329
6330                         INIT_LIST_HEAD(&ch->list);
6331                         ch->num_queue_pairs =
6332                                 vsi->tc_config.tc_info[i].qcount;
6333                         ch->base_queue =
6334                                 vsi->tc_config.tc_info[i].qoffset;
6335
6336                         /* Bandwidth limit through tc interface is in bytes/s,
6337                          * change to Mbit/s
6338                          */
6339                         max_rate = vsi->mqprio_qopt.max_rate[i];
6340                         do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6341                         ch->max_tx_rate = max_rate;
6342
6343                         list_add_tail(&ch->list, &vsi->ch_list);
6344
6345                         ret = i40e_create_queue_channel(vsi, ch);
6346                         if (ret) {
6347                                 dev_err(&vsi->back->pdev->dev,
6348                                         "Failed creating queue channel with TC%d: queues %d\n",
6349                                         i, ch->num_queue_pairs);
6350                                 goto err_free;
6351                         }
6352                         vsi->tc_seid_map[i] = ch->seid;
6353                 }
6354         }
6355         return ret;
6356
6357 err_free:
6358         i40e_remove_queue_channels(vsi);
6359         return ret;
6360 }
6361
6362 /**
6363  * i40e_veb_config_tc - Configure TCs for given VEB
6364  * @veb: given VEB
6365  * @enabled_tc: TC bitmap
6366  *
6367  * Configures given TC bitmap for VEB (switching) element
6368  **/
6369 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6370 {
6371         struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6372         struct i40e_pf *pf = veb->pf;
6373         int ret = 0;
6374         int i;
6375
6376         /* No TCs or already enabled TCs just return */
6377         if (!enabled_tc || veb->enabled_tc == enabled_tc)
6378                 return ret;
6379
6380         bw_data.tc_valid_bits = enabled_tc;
6381         /* bw_data.absolute_credits is not set (relative) */
6382
6383         /* Enable ETS TCs with equal BW Share for now */
6384         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6385                 if (enabled_tc & BIT(i))
6386                         bw_data.tc_bw_share_credits[i] = 1;
6387         }
6388
6389         ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6390                                                    &bw_data, NULL);
6391         if (ret) {
6392                 dev_info(&pf->pdev->dev,
6393                          "VEB bw config failed, err %s aq_err %s\n",
6394                          i40e_stat_str(&pf->hw, ret),
6395                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6396                 goto out;
6397         }
6398
6399         /* Update the BW information */
6400         ret = i40e_veb_get_bw_info(veb);
6401         if (ret) {
6402                 dev_info(&pf->pdev->dev,
6403                          "Failed getting veb bw config, err %s aq_err %s\n",
6404                          i40e_stat_str(&pf->hw, ret),
6405                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6406         }
6407
6408 out:
6409         return ret;
6410 }
6411
6412 #ifdef CONFIG_I40E_DCB
6413 /**
6414  * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6415  * @pf: PF struct
6416  *
6417  * Reconfigure VEB/VSIs on a given PF; it is assumed that
6418  * the caller would've quiesce all the VSIs before calling
6419  * this function
6420  **/
6421 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6422 {
6423         u8 tc_map = 0;
6424         int ret;
6425         u8 v;
6426
6427         /* Enable the TCs available on PF to all VEBs */
6428         tc_map = i40e_pf_get_tc_map(pf);
6429         if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6430                 return;
6431
6432         for (v = 0; v < I40E_MAX_VEB; v++) {
6433                 if (!pf->veb[v])
6434                         continue;
6435                 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6436                 if (ret) {
6437                         dev_info(&pf->pdev->dev,
6438                                  "Failed configuring TC for VEB seid=%d\n",
6439                                  pf->veb[v]->seid);
6440                         /* Will try to configure as many components */
6441                 }
6442         }
6443
6444         /* Update each VSI */
6445         for (v = 0; v < pf->num_alloc_vsi; v++) {
6446                 if (!pf->vsi[v])
6447                         continue;
6448
6449                 /* - Enable all TCs for the LAN VSI
6450                  * - For all others keep them at TC0 for now
6451                  */
6452                 if (v == pf->lan_vsi)
6453                         tc_map = i40e_pf_get_tc_map(pf);
6454                 else
6455                         tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6456
6457                 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6458                 if (ret) {
6459                         dev_info(&pf->pdev->dev,
6460                                  "Failed configuring TC for VSI seid=%d\n",
6461                                  pf->vsi[v]->seid);
6462                         /* Will try to configure as many components */
6463                 } else {
6464                         /* Re-configure VSI vectors based on updated TC map */
6465                         i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6466                         if (pf->vsi[v]->netdev)
6467                                 i40e_dcbnl_set_all(pf->vsi[v]);
6468                 }
6469         }
6470 }
6471
6472 /**
6473  * i40e_resume_port_tx - Resume port Tx
6474  * @pf: PF struct
6475  *
6476  * Resume a port's Tx and issue a PF reset in case of failure to
6477  * resume.
6478  **/
6479 static int i40e_resume_port_tx(struct i40e_pf *pf)
6480 {
6481         struct i40e_hw *hw = &pf->hw;
6482         int ret;
6483
6484         ret = i40e_aq_resume_port_tx(hw, NULL);
6485         if (ret) {
6486                 dev_info(&pf->pdev->dev,
6487                          "Resume Port Tx failed, err %s aq_err %s\n",
6488                           i40e_stat_str(&pf->hw, ret),
6489                           i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6490                 /* Schedule PF reset to recover */
6491                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6492                 i40e_service_event_schedule(pf);
6493         }
6494
6495         return ret;
6496 }
6497
6498 /**
6499  * i40e_suspend_port_tx - Suspend port Tx
6500  * @pf: PF struct
6501  *
6502  * Suspend a port's Tx and issue a PF reset in case of failure.
6503  **/
6504 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6505 {
6506         struct i40e_hw *hw = &pf->hw;
6507         int ret;
6508
6509         ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6510         if (ret) {
6511                 dev_info(&pf->pdev->dev,
6512                          "Suspend Port Tx failed, err %s aq_err %s\n",
6513                          i40e_stat_str(&pf->hw, ret),
6514                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6515                 /* Schedule PF reset to recover */
6516                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6517                 i40e_service_event_schedule(pf);
6518         }
6519
6520         return ret;
6521 }
6522
6523 /**
6524  * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6525  * @pf: PF being configured
6526  * @new_cfg: New DCBX configuration
6527  *
6528  * Program DCB settings into HW and reconfigure VEB/VSIs on
6529  * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6530  **/
6531 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6532                                   struct i40e_dcbx_config *new_cfg)
6533 {
6534         struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6535         int ret;
6536
6537         /* Check if need reconfiguration */
6538         if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6539                 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6540                 return 0;
6541         }
6542
6543         /* Config change disable all VSIs */
6544         i40e_pf_quiesce_all_vsi(pf);
6545
6546         /* Copy the new config to the current config */
6547         *old_cfg = *new_cfg;
6548         old_cfg->etsrec = old_cfg->etscfg;
6549         ret = i40e_set_dcb_config(&pf->hw);
6550         if (ret) {
6551                 dev_info(&pf->pdev->dev,
6552                          "Set DCB Config failed, err %s aq_err %s\n",
6553                          i40e_stat_str(&pf->hw, ret),
6554                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6555                 goto out;
6556         }
6557
6558         /* Changes in configuration update VEB/VSI */
6559         i40e_dcb_reconfigure(pf);
6560 out:
6561         /* In case of reset do not try to resume anything */
6562         if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6563                 /* Re-start the VSIs if disabled */
6564                 ret = i40e_resume_port_tx(pf);
6565                 /* In case of error no point in resuming VSIs */
6566                 if (ret)
6567                         goto err;
6568                 i40e_pf_unquiesce_all_vsi(pf);
6569         }
6570 err:
6571         return ret;
6572 }
6573
6574 /**
6575  * i40e_hw_dcb_config - Program new DCBX settings into HW
6576  * @pf: PF being configured
6577  * @new_cfg: New DCBX configuration
6578  *
6579  * Program DCB settings into HW and reconfigure VEB/VSIs on
6580  * given PF
6581  **/
6582 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6583 {
6584         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6585         u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6586         u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6587         struct i40e_dcbx_config *old_cfg;
6588         u8 mode[I40E_MAX_TRAFFIC_CLASS];
6589         struct i40e_rx_pb_config pb_cfg;
6590         struct i40e_hw *hw = &pf->hw;
6591         u8 num_ports = hw->num_ports;
6592         bool need_reconfig;
6593         int ret = -EINVAL;
6594         u8 lltc_map = 0;
6595         u8 tc_map = 0;
6596         u8 new_numtc;
6597         u8 i;
6598
6599         dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6600         /* Un-pack information to Program ETS HW via shared API
6601          * numtc, tcmap
6602          * LLTC map
6603          * ETS/NON-ETS arbiter mode
6604          * max exponent (credit refills)
6605          * Total number of ports
6606          * PFC priority bit-map
6607          * Priority Table
6608          * BW % per TC
6609          * Arbiter mode between UPs sharing same TC
6610          * TSA table (ETS or non-ETS)
6611          * EEE enabled or not
6612          * MFS TC table
6613          */
6614
6615         new_numtc = i40e_dcb_get_num_tc(new_cfg);
6616
6617         memset(&ets_data, 0, sizeof(ets_data));
6618         for (i = 0; i < new_numtc; i++) {
6619                 tc_map |= BIT(i);
6620                 switch (new_cfg->etscfg.tsatable[i]) {
6621                 case I40E_IEEE_TSA_ETS:
6622                         prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6623                         ets_data.tc_bw_share_credits[i] =
6624                                         new_cfg->etscfg.tcbwtable[i];
6625                         break;
6626                 case I40E_IEEE_TSA_STRICT:
6627                         prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6628                         lltc_map |= BIT(i);
6629                         ets_data.tc_bw_share_credits[i] =
6630                                         I40E_DCB_STRICT_PRIO_CREDITS;
6631                         break;
6632                 default:
6633                         /* Invalid TSA type */
6634                         need_reconfig = false;
6635                         goto out;
6636                 }
6637         }
6638
6639         old_cfg = &hw->local_dcbx_config;
6640         /* Check if need reconfiguration */
6641         need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6642
6643         /* If needed, enable/disable frame tagging, disable all VSIs
6644          * and suspend port tx
6645          */
6646         if (need_reconfig) {
6647                 /* Enable DCB tagging only when more than one TC */
6648                 if (new_numtc > 1)
6649                         pf->flags |= I40E_FLAG_DCB_ENABLED;
6650                 else
6651                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6652
6653                 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6654                 /* Reconfiguration needed quiesce all VSIs */
6655                 i40e_pf_quiesce_all_vsi(pf);
6656                 ret = i40e_suspend_port_tx(pf);
6657                 if (ret)
6658                         goto err;
6659         }
6660
6661         /* Configure Port ETS Tx Scheduler */
6662         ets_data.tc_valid_bits = tc_map;
6663         ets_data.tc_strict_priority_flags = lltc_map;
6664         ret = i40e_aq_config_switch_comp_ets
6665                 (hw, pf->mac_seid, &ets_data,
6666                  i40e_aqc_opc_modify_switching_comp_ets, NULL);
6667         if (ret) {
6668                 dev_info(&pf->pdev->dev,
6669                          "Modify Port ETS failed, err %s aq_err %s\n",
6670                          i40e_stat_str(&pf->hw, ret),
6671                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6672                 goto out;
6673         }
6674
6675         /* Configure Rx ETS HW */
6676         memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
6677         i40e_dcb_hw_set_num_tc(hw, new_numtc);
6678         i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
6679                                    I40E_DCB_ARB_MODE_STRICT_PRIORITY,
6680                                    I40E_DCB_DEFAULT_MAX_EXPONENT,
6681                                    lltc_map);
6682         i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
6683         i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
6684                                      prio_type);
6685         i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
6686                                new_cfg->etscfg.prioritytable);
6687         i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
6688
6689         /* Configure Rx Packet Buffers in HW */
6690         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6691                 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
6692                 mfs_tc[i] += I40E_PACKET_HDR_PAD;
6693         }
6694
6695         i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
6696                                          false, new_cfg->pfc.pfcenable,
6697                                          mfs_tc, &pb_cfg);
6698         i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
6699
6700         /* Update the local Rx Packet buffer config */
6701         pf->pb_cfg = pb_cfg;
6702
6703         /* Inform the FW about changes to DCB configuration */
6704         ret = i40e_aq_dcb_updated(&pf->hw, NULL);
6705         if (ret) {
6706                 dev_info(&pf->pdev->dev,
6707                          "DCB Updated failed, err %s aq_err %s\n",
6708                          i40e_stat_str(&pf->hw, ret),
6709                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6710                 goto out;
6711         }
6712
6713         /* Update the port DCBx configuration */
6714         *old_cfg = *new_cfg;
6715
6716         /* Changes in configuration update VEB/VSI */
6717         i40e_dcb_reconfigure(pf);
6718 out:
6719         /* Re-start the VSIs if disabled */
6720         if (need_reconfig) {
6721                 ret = i40e_resume_port_tx(pf);
6722
6723                 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
6724                 /* In case of error no point in resuming VSIs */
6725                 if (ret)
6726                         goto err;
6727
6728                 /* Wait for the PF's queues to be disabled */
6729                 ret = i40e_pf_wait_queues_disabled(pf);
6730                 if (ret) {
6731                         /* Schedule PF reset to recover */
6732                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6733                         i40e_service_event_schedule(pf);
6734                         goto err;
6735                 } else {
6736                         i40e_pf_unquiesce_all_vsi(pf);
6737                         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6738                         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
6739                 }
6740                 /* registers are set, lets apply */
6741                 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
6742                         ret = i40e_hw_set_dcb_config(pf, new_cfg);
6743         }
6744
6745 err:
6746         return ret;
6747 }
6748
6749 /**
6750  * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
6751  * @pf: PF being queried
6752  *
6753  * Set default DCB configuration in case DCB is to be done in SW.
6754  **/
6755 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
6756 {
6757         struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
6758         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6759         struct i40e_hw *hw = &pf->hw;
6760         int err;
6761
6762         if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
6763                 /* Update the local cached instance with TC0 ETS */
6764                 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
6765                 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6766                 pf->tmp_cfg.etscfg.maxtcs = 0;
6767                 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6768                 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
6769                 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
6770                 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
6771                 /* FW needs one App to configure HW */
6772                 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
6773                 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
6774                 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
6775                 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
6776
6777                 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
6778         }
6779
6780         memset(&ets_data, 0, sizeof(ets_data));
6781         ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
6782         ets_data.tc_strict_priority_flags = 0; /* ETS */
6783         ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
6784
6785         /* Enable ETS on the Physical port */
6786         err = i40e_aq_config_switch_comp_ets
6787                 (hw, pf->mac_seid, &ets_data,
6788                  i40e_aqc_opc_enable_switching_comp_ets, NULL);
6789         if (err) {
6790                 dev_info(&pf->pdev->dev,
6791                          "Enable Port ETS failed, err %s aq_err %s\n",
6792                          i40e_stat_str(&pf->hw, err),
6793                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6794                 err = -ENOENT;
6795                 goto out;
6796         }
6797
6798         /* Update the local cached instance with TC0 ETS */
6799         dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6800         dcb_cfg->etscfg.cbs = 0;
6801         dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
6802         dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6803
6804 out:
6805         return err;
6806 }
6807
6808 /**
6809  * i40e_init_pf_dcb - Initialize DCB configuration
6810  * @pf: PF being configured
6811  *
6812  * Query the current DCB configuration and cache it
6813  * in the hardware structure
6814  **/
6815 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6816 {
6817         struct i40e_hw *hw = &pf->hw;
6818         int err;
6819
6820         /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6821          * Also do not enable DCBx if FW LLDP agent is disabled
6822          */
6823         if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
6824                 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
6825                 err = I40E_NOT_SUPPORTED;
6826                 goto out;
6827         }
6828         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
6829                 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
6830                 err = i40e_dcb_sw_default_config(pf);
6831                 if (err) {
6832                         dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
6833                         goto out;
6834                 }
6835                 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
6836                 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
6837                                DCB_CAP_DCBX_VER_IEEE;
6838                 /* at init capable but disabled */
6839                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6840                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6841                 goto out;
6842         }
6843         err = i40e_init_dcb(hw, true);
6844         if (!err) {
6845                 /* Device/Function is not DCBX capable */
6846                 if ((!hw->func_caps.dcb) ||
6847                     (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6848                         dev_info(&pf->pdev->dev,
6849                                  "DCBX offload is not supported or is disabled for this PF.\n");
6850                 } else {
6851                         /* When status is not DISABLED then DCBX in FW */
6852                         pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6853                                        DCB_CAP_DCBX_VER_IEEE;
6854
6855                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
6856                         /* Enable DCB tagging only when more than one TC
6857                          * or explicitly disable if only one TC
6858                          */
6859                         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6860                                 pf->flags |= I40E_FLAG_DCB_ENABLED;
6861                         else
6862                                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6863                         dev_dbg(&pf->pdev->dev,
6864                                 "DCBX offload is supported for this PF.\n");
6865                 }
6866         } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
6867                 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
6868                 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
6869         } else {
6870                 dev_info(&pf->pdev->dev,
6871                          "Query for DCB configuration failed, err %s aq_err %s\n",
6872                          i40e_stat_str(&pf->hw, err),
6873                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6874         }
6875
6876 out:
6877         return err;
6878 }
6879 #endif /* CONFIG_I40E_DCB */
6880
6881 /**
6882  * i40e_set_lldp_forwarding - set forwarding of lldp frames
6883  * @pf: PF being configured
6884  * @enable: if forwarding to OS shall be enabled
6885  *
6886  * Toggle forwarding of lldp frames behavior,
6887  * When passing DCB control from firmware to software
6888  * lldp frames must be forwarded to the software based
6889  * lldp agent.
6890  */
6891 void i40e_set_lldp_forwarding(struct i40e_pf *pf, bool enable)
6892 {
6893         if (pf->lan_vsi == I40E_NO_VSI)
6894                 return;
6895
6896         if (!pf->vsi[pf->lan_vsi])
6897                 return;
6898
6899         /* No need to check the outcome, commands may fail
6900          * if desired value is already set
6901          */
6902         i40e_aq_add_rem_control_packet_filter(&pf->hw, NULL, ETH_P_LLDP,
6903                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TX |
6904                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC,
6905                                               pf->vsi[pf->lan_vsi]->seid, 0,
6906                                               enable, NULL, NULL);
6907
6908         i40e_aq_add_rem_control_packet_filter(&pf->hw, NULL, ETH_P_LLDP,
6909                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_RX |
6910                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC,
6911                                               pf->vsi[pf->lan_vsi]->seid, 0,
6912                                               enable, NULL, NULL);
6913 }
6914
6915 /**
6916  * i40e_print_link_message - print link up or down
6917  * @vsi: the VSI for which link needs a message
6918  * @isup: true of link is up, false otherwise
6919  */
6920 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6921 {
6922         enum i40e_aq_link_speed new_speed;
6923         struct i40e_pf *pf = vsi->back;
6924         char *speed = "Unknown";
6925         char *fc = "Unknown";
6926         char *fec = "";
6927         char *req_fec = "";
6928         char *an = "";
6929
6930         if (isup)
6931                 new_speed = pf->hw.phy.link_info.link_speed;
6932         else
6933                 new_speed = I40E_LINK_SPEED_UNKNOWN;
6934
6935         if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6936                 return;
6937         vsi->current_isup = isup;
6938         vsi->current_speed = new_speed;
6939         if (!isup) {
6940                 netdev_info(vsi->netdev, "NIC Link is Down\n");
6941                 return;
6942         }
6943
6944         /* Warn user if link speed on NPAR enabled partition is not at
6945          * least 10GB
6946          */
6947         if (pf->hw.func_caps.npar_enable &&
6948             (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6949              pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6950                 netdev_warn(vsi->netdev,
6951                             "The partition detected link speed that is less than 10Gbps\n");
6952
6953         switch (pf->hw.phy.link_info.link_speed) {
6954         case I40E_LINK_SPEED_40GB:
6955                 speed = "40 G";
6956                 break;
6957         case I40E_LINK_SPEED_20GB:
6958                 speed = "20 G";
6959                 break;
6960         case I40E_LINK_SPEED_25GB:
6961                 speed = "25 G";
6962                 break;
6963         case I40E_LINK_SPEED_10GB:
6964                 speed = "10 G";
6965                 break;
6966         case I40E_LINK_SPEED_5GB:
6967                 speed = "5 G";
6968                 break;
6969         case I40E_LINK_SPEED_2_5GB:
6970                 speed = "2.5 G";
6971                 break;
6972         case I40E_LINK_SPEED_1GB:
6973                 speed = "1000 M";
6974                 break;
6975         case I40E_LINK_SPEED_100MB:
6976                 speed = "100 M";
6977                 break;
6978         default:
6979                 break;
6980         }
6981
6982         switch (pf->hw.fc.current_mode) {
6983         case I40E_FC_FULL:
6984                 fc = "RX/TX";
6985                 break;
6986         case I40E_FC_TX_PAUSE:
6987                 fc = "TX";
6988                 break;
6989         case I40E_FC_RX_PAUSE:
6990                 fc = "RX";
6991                 break;
6992         default:
6993                 fc = "None";
6994                 break;
6995         }
6996
6997         if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6998                 req_fec = "None";
6999                 fec = "None";
7000                 an = "False";
7001
7002                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7003                         an = "True";
7004
7005                 if (pf->hw.phy.link_info.fec_info &
7006                     I40E_AQ_CONFIG_FEC_KR_ENA)
7007                         fec = "CL74 FC-FEC/BASE-R";
7008                 else if (pf->hw.phy.link_info.fec_info &
7009                          I40E_AQ_CONFIG_FEC_RS_ENA)
7010                         fec = "CL108 RS-FEC";
7011
7012                 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7013                  * both RS and FC are requested
7014                  */
7015                 if (vsi->back->hw.phy.link_info.req_fec_info &
7016                     (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7017                         if (vsi->back->hw.phy.link_info.req_fec_info &
7018                             I40E_AQ_REQUEST_FEC_RS)
7019                                 req_fec = "CL108 RS-FEC";
7020                         else
7021                                 req_fec = "CL74 FC-FEC/BASE-R";
7022                 }
7023                 netdev_info(vsi->netdev,
7024                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7025                             speed, req_fec, fec, an, fc);
7026         } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7027                 req_fec = "None";
7028                 fec = "None";
7029                 an = "False";
7030
7031                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7032                         an = "True";
7033
7034                 if (pf->hw.phy.link_info.fec_info &
7035                     I40E_AQ_CONFIG_FEC_KR_ENA)
7036                         fec = "CL74 FC-FEC/BASE-R";
7037
7038                 if (pf->hw.phy.link_info.req_fec_info &
7039                     I40E_AQ_REQUEST_FEC_KR)
7040                         req_fec = "CL74 FC-FEC/BASE-R";
7041
7042                 netdev_info(vsi->netdev,
7043                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7044                             speed, req_fec, fec, an, fc);
7045         } else {
7046                 netdev_info(vsi->netdev,
7047                             "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7048                             speed, fc);
7049         }
7050
7051 }
7052
7053 /**
7054  * i40e_up_complete - Finish the last steps of bringing up a connection
7055  * @vsi: the VSI being configured
7056  **/
7057 static int i40e_up_complete(struct i40e_vsi *vsi)
7058 {
7059         struct i40e_pf *pf = vsi->back;
7060         int err;
7061
7062         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7063                 i40e_vsi_configure_msix(vsi);
7064         else
7065                 i40e_configure_msi_and_legacy(vsi);
7066
7067         /* start rings */
7068         err = i40e_vsi_start_rings(vsi);
7069         if (err)
7070                 return err;
7071
7072         clear_bit(__I40E_VSI_DOWN, vsi->state);
7073         i40e_napi_enable_all(vsi);
7074         i40e_vsi_enable_irq(vsi);
7075
7076         if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7077             (vsi->netdev)) {
7078                 i40e_print_link_message(vsi, true);
7079                 netif_tx_start_all_queues(vsi->netdev);
7080                 netif_carrier_on(vsi->netdev);
7081         }
7082
7083         /* replay FDIR SB filters */
7084         if (vsi->type == I40E_VSI_FDIR) {
7085                 /* reset fd counters */
7086                 pf->fd_add_err = 0;
7087                 pf->fd_atr_cnt = 0;
7088                 i40e_fdir_filter_restore(vsi);
7089         }
7090
7091         /* On the next run of the service_task, notify any clients of the new
7092          * opened netdev
7093          */
7094         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7095         i40e_service_event_schedule(pf);
7096
7097         return 0;
7098 }
7099
7100 /**
7101  * i40e_vsi_reinit_locked - Reset the VSI
7102  * @vsi: the VSI being configured
7103  *
7104  * Rebuild the ring structs after some configuration
7105  * has changed, e.g. MTU size.
7106  **/
7107 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7108 {
7109         struct i40e_pf *pf = vsi->back;
7110
7111         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7112                 usleep_range(1000, 2000);
7113         i40e_down(vsi);
7114
7115         i40e_up(vsi);
7116         clear_bit(__I40E_CONFIG_BUSY, pf->state);
7117 }
7118
7119 /**
7120  * i40e_force_link_state - Force the link status
7121  * @pf: board private structure
7122  * @is_up: whether the link state should be forced up or down
7123  **/
7124 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7125 {
7126         struct i40e_aq_get_phy_abilities_resp abilities;
7127         struct i40e_aq_set_phy_config config = {0};
7128         bool non_zero_phy_type = is_up;
7129         struct i40e_hw *hw = &pf->hw;
7130         i40e_status err;
7131         u64 mask;
7132         u8 speed;
7133
7134         /* Card might've been put in an unstable state by other drivers
7135          * and applications, which causes incorrect speed values being
7136          * set on startup. In order to clear speed registers, we call
7137          * get_phy_capabilities twice, once to get initial state of
7138          * available speeds, and once to get current PHY config.
7139          */
7140         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7141                                            NULL);
7142         if (err) {
7143                 dev_err(&pf->pdev->dev,
7144                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7145                         i40e_stat_str(hw, err),
7146                         i40e_aq_str(hw, hw->aq.asq_last_status));
7147                 return err;
7148         }
7149         speed = abilities.link_speed;
7150
7151         /* Get the current phy config */
7152         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7153                                            NULL);
7154         if (err) {
7155                 dev_err(&pf->pdev->dev,
7156                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7157                         i40e_stat_str(hw, err),
7158                         i40e_aq_str(hw, hw->aq.asq_last_status));
7159                 return err;
7160         }
7161
7162         /* If link needs to go up, but was not forced to go down,
7163          * and its speed values are OK, no need for a flap
7164          * if non_zero_phy_type was set, still need to force up
7165          */
7166         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7167                 non_zero_phy_type = true;
7168         else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7169                 return I40E_SUCCESS;
7170
7171         /* To force link we need to set bits for all supported PHY types,
7172          * but there are now more than 32, so we need to split the bitmap
7173          * across two fields.
7174          */
7175         mask = I40E_PHY_TYPES_BITMASK;
7176         config.phy_type =
7177                 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7178         config.phy_type_ext =
7179                 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7180         /* Copy the old settings, except of phy_type */
7181         config.abilities = abilities.abilities;
7182         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7183                 if (is_up)
7184                         config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7185                 else
7186                         config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7187         }
7188         if (abilities.link_speed != 0)
7189                 config.link_speed = abilities.link_speed;
7190         else
7191                 config.link_speed = speed;
7192         config.eee_capability = abilities.eee_capability;
7193         config.eeer = abilities.eeer_val;
7194         config.low_power_ctrl = abilities.d3_lpan;
7195         config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7196                             I40E_AQ_PHY_FEC_CONFIG_MASK;
7197         err = i40e_aq_set_phy_config(hw, &config, NULL);
7198
7199         if (err) {
7200                 dev_err(&pf->pdev->dev,
7201                         "set phy config ret =  %s last_status =  %s\n",
7202                         i40e_stat_str(&pf->hw, err),
7203                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7204                 return err;
7205         }
7206
7207         /* Update the link info */
7208         err = i40e_update_link_info(hw);
7209         if (err) {
7210                 /* Wait a little bit (on 40G cards it sometimes takes a really
7211                  * long time for link to come back from the atomic reset)
7212                  * and try once more
7213                  */
7214                 msleep(1000);
7215                 i40e_update_link_info(hw);
7216         }
7217
7218         i40e_aq_set_link_restart_an(hw, is_up, NULL);
7219
7220         return I40E_SUCCESS;
7221 }
7222
7223 /**
7224  * i40e_up - Bring the connection back up after being down
7225  * @vsi: the VSI being configured
7226  **/
7227 int i40e_up(struct i40e_vsi *vsi)
7228 {
7229         int err;
7230
7231         if (vsi->type == I40E_VSI_MAIN &&
7232             (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7233              vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7234                 i40e_force_link_state(vsi->back, true);
7235
7236         err = i40e_vsi_configure(vsi);
7237         if (!err)
7238                 err = i40e_up_complete(vsi);
7239
7240         return err;
7241 }
7242
7243 /**
7244  * i40e_down - Shutdown the connection processing
7245  * @vsi: the VSI being stopped
7246  **/
7247 void i40e_down(struct i40e_vsi *vsi)
7248 {
7249         int i;
7250
7251         /* It is assumed that the caller of this function
7252          * sets the vsi->state __I40E_VSI_DOWN bit.
7253          */
7254         if (vsi->netdev) {
7255                 netif_carrier_off(vsi->netdev);
7256                 netif_tx_disable(vsi->netdev);
7257         }
7258         i40e_vsi_disable_irq(vsi);
7259         i40e_vsi_stop_rings(vsi);
7260         if (vsi->type == I40E_VSI_MAIN &&
7261            (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7262             vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7263                 i40e_force_link_state(vsi->back, false);
7264         i40e_napi_disable_all(vsi);
7265
7266         for (i = 0; i < vsi->num_queue_pairs; i++) {
7267                 i40e_clean_tx_ring(vsi->tx_rings[i]);
7268                 if (i40e_enabled_xdp_vsi(vsi)) {
7269                         /* Make sure that in-progress ndo_xdp_xmit and
7270                          * ndo_xsk_wakeup calls are completed.
7271                          */
7272                         synchronize_rcu();
7273                         i40e_clean_tx_ring(vsi->xdp_rings[i]);
7274                 }
7275                 i40e_clean_rx_ring(vsi->rx_rings[i]);
7276         }
7277
7278 }
7279
7280 /**
7281  * i40e_validate_mqprio_qopt- validate queue mapping info
7282  * @vsi: the VSI being configured
7283  * @mqprio_qopt: queue parametrs
7284  **/
7285 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7286                                      struct tc_mqprio_qopt_offload *mqprio_qopt)
7287 {
7288         u64 sum_max_rate = 0;
7289         u64 max_rate = 0;
7290         int i;
7291
7292         if (mqprio_qopt->qopt.offset[0] != 0 ||
7293             mqprio_qopt->qopt.num_tc < 1 ||
7294             mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7295                 return -EINVAL;
7296         for (i = 0; ; i++) {
7297                 if (!mqprio_qopt->qopt.count[i])
7298                         return -EINVAL;
7299                 if (mqprio_qopt->min_rate[i]) {
7300                         dev_err(&vsi->back->pdev->dev,
7301                                 "Invalid min tx rate (greater than 0) specified\n");
7302                         return -EINVAL;
7303                 }
7304                 max_rate = mqprio_qopt->max_rate[i];
7305                 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7306                 sum_max_rate += max_rate;
7307
7308                 if (i >= mqprio_qopt->qopt.num_tc - 1)
7309                         break;
7310                 if (mqprio_qopt->qopt.offset[i + 1] !=
7311                     (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7312                         return -EINVAL;
7313         }
7314         if (vsi->num_queue_pairs <
7315             (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7316                 return -EINVAL;
7317         }
7318         if (sum_max_rate > i40e_get_link_speed(vsi)) {
7319                 dev_err(&vsi->back->pdev->dev,
7320                         "Invalid max tx rate specified\n");
7321                 return -EINVAL;
7322         }
7323         return 0;
7324 }
7325
7326 /**
7327  * i40e_vsi_set_default_tc_config - set default values for tc configuration
7328  * @vsi: the VSI being configured
7329  **/
7330 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7331 {
7332         u16 qcount;
7333         int i;
7334
7335         /* Only TC0 is enabled */
7336         vsi->tc_config.numtc = 1;
7337         vsi->tc_config.enabled_tc = 1;
7338         qcount = min_t(int, vsi->alloc_queue_pairs,
7339                        i40e_pf_get_max_q_per_tc(vsi->back));
7340         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7341                 /* For the TC that is not enabled set the offset to to default
7342                  * queue and allocate one queue for the given TC.
7343                  */
7344                 vsi->tc_config.tc_info[i].qoffset = 0;
7345                 if (i == 0)
7346                         vsi->tc_config.tc_info[i].qcount = qcount;
7347                 else
7348                         vsi->tc_config.tc_info[i].qcount = 1;
7349                 vsi->tc_config.tc_info[i].netdev_tc = 0;
7350         }
7351 }
7352
7353 /**
7354  * i40e_del_macvlan_filter
7355  * @hw: pointer to the HW structure
7356  * @seid: seid of the channel VSI
7357  * @macaddr: the mac address to apply as a filter
7358  * @aq_err: store the admin Q error
7359  *
7360  * This function deletes a mac filter on the channel VSI which serves as the
7361  * macvlan. Returns 0 on success.
7362  **/
7363 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7364                                            const u8 *macaddr, int *aq_err)
7365 {
7366         struct i40e_aqc_remove_macvlan_element_data element;
7367         i40e_status status;
7368
7369         memset(&element, 0, sizeof(element));
7370         ether_addr_copy(element.mac_addr, macaddr);
7371         element.vlan_tag = 0;
7372         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7373         status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7374         *aq_err = hw->aq.asq_last_status;
7375
7376         return status;
7377 }
7378
7379 /**
7380  * i40e_add_macvlan_filter
7381  * @hw: pointer to the HW structure
7382  * @seid: seid of the channel VSI
7383  * @macaddr: the mac address to apply as a filter
7384  * @aq_err: store the admin Q error
7385  *
7386  * This function adds a mac filter on the channel VSI which serves as the
7387  * macvlan. Returns 0 on success.
7388  **/
7389 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7390                                            const u8 *macaddr, int *aq_err)
7391 {
7392         struct i40e_aqc_add_macvlan_element_data element;
7393         i40e_status status;
7394         u16 cmd_flags = 0;
7395
7396         ether_addr_copy(element.mac_addr, macaddr);
7397         element.vlan_tag = 0;
7398         element.queue_number = 0;
7399         element.match_method = I40E_AQC_MM_ERR_NO_RES;
7400         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7401         element.flags = cpu_to_le16(cmd_flags);
7402         status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7403         *aq_err = hw->aq.asq_last_status;
7404
7405         return status;
7406 }
7407
7408 /**
7409  * i40e_reset_ch_rings - Reset the queue contexts in a channel
7410  * @vsi: the VSI we want to access
7411  * @ch: the channel we want to access
7412  */
7413 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7414 {
7415         struct i40e_ring *tx_ring, *rx_ring;
7416         u16 pf_q;
7417         int i;
7418
7419         for (i = 0; i < ch->num_queue_pairs; i++) {
7420                 pf_q = ch->base_queue + i;
7421                 tx_ring = vsi->tx_rings[pf_q];
7422                 tx_ring->ch = NULL;
7423                 rx_ring = vsi->rx_rings[pf_q];
7424                 rx_ring->ch = NULL;
7425         }
7426 }
7427
7428 /**
7429  * i40e_free_macvlan_channels
7430  * @vsi: the VSI we want to access
7431  *
7432  * This function frees the Qs of the channel VSI from
7433  * the stack and also deletes the channel VSIs which
7434  * serve as macvlans.
7435  */
7436 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7437 {
7438         struct i40e_channel *ch, *ch_tmp;
7439         int ret;
7440
7441         if (list_empty(&vsi->macvlan_list))
7442                 return;
7443
7444         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7445                 struct i40e_vsi *parent_vsi;
7446
7447                 if (i40e_is_channel_macvlan(ch)) {
7448                         i40e_reset_ch_rings(vsi, ch);
7449                         clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7450                         netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7451                         netdev_set_sb_channel(ch->fwd->netdev, 0);
7452                         kfree(ch->fwd);
7453                         ch->fwd = NULL;
7454                 }
7455
7456                 list_del(&ch->list);
7457                 parent_vsi = ch->parent_vsi;
7458                 if (!parent_vsi || !ch->initialized) {
7459                         kfree(ch);
7460                         continue;
7461                 }
7462
7463                 /* remove the VSI */
7464                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7465                                              NULL);
7466                 if (ret)
7467                         dev_err(&vsi->back->pdev->dev,
7468                                 "unable to remove channel (%d) for parent VSI(%d)\n",
7469                                 ch->seid, parent_vsi->seid);
7470                 kfree(ch);
7471         }
7472         vsi->macvlan_cnt = 0;
7473 }
7474
7475 /**
7476  * i40e_fwd_ring_up - bring the macvlan device up
7477  * @vsi: the VSI we want to access
7478  * @vdev: macvlan netdevice
7479  * @fwd: the private fwd structure
7480  */
7481 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7482                             struct i40e_fwd_adapter *fwd)
7483 {
7484         int ret = 0, num_tc = 1,  i, aq_err;
7485         struct i40e_channel *ch, *ch_tmp;
7486         struct i40e_pf *pf = vsi->back;
7487         struct i40e_hw *hw = &pf->hw;
7488
7489         if (list_empty(&vsi->macvlan_list))
7490                 return -EINVAL;
7491
7492         /* Go through the list and find an available channel */
7493         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7494                 if (!i40e_is_channel_macvlan(ch)) {
7495                         ch->fwd = fwd;
7496                         /* record configuration for macvlan interface in vdev */
7497                         for (i = 0; i < num_tc; i++)
7498                                 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7499                                                              i,
7500                                                              ch->num_queue_pairs,
7501                                                              ch->base_queue);
7502                         for (i = 0; i < ch->num_queue_pairs; i++) {
7503                                 struct i40e_ring *tx_ring, *rx_ring;
7504                                 u16 pf_q;
7505
7506                                 pf_q = ch->base_queue + i;
7507
7508                                 /* Get to TX ring ptr */
7509                                 tx_ring = vsi->tx_rings[pf_q];
7510                                 tx_ring->ch = ch;
7511
7512                                 /* Get the RX ring ptr */
7513                                 rx_ring = vsi->rx_rings[pf_q];
7514                                 rx_ring->ch = ch;
7515                         }
7516                         break;
7517                 }
7518         }
7519
7520         /* Guarantee all rings are updated before we update the
7521          * MAC address filter.
7522          */
7523         wmb();
7524
7525         /* Add a mac filter */
7526         ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7527         if (ret) {
7528                 /* if we cannot add the MAC rule then disable the offload */
7529                 macvlan_release_l2fw_offload(vdev);
7530                 for (i = 0; i < ch->num_queue_pairs; i++) {
7531                         struct i40e_ring *rx_ring;
7532                         u16 pf_q;
7533
7534                         pf_q = ch->base_queue + i;
7535                         rx_ring = vsi->rx_rings[pf_q];
7536                         rx_ring->netdev = NULL;
7537                 }
7538                 dev_info(&pf->pdev->dev,
7539                          "Error adding mac filter on macvlan err %s, aq_err %s\n",
7540                           i40e_stat_str(hw, ret),
7541                           i40e_aq_str(hw, aq_err));
7542                 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7543         }
7544
7545         return ret;
7546 }
7547
7548 /**
7549  * i40e_setup_macvlans - create the channels which will be macvlans
7550  * @vsi: the VSI we want to access
7551  * @macvlan_cnt: no. of macvlans to be setup
7552  * @qcnt: no. of Qs per macvlan
7553  * @vdev: macvlan netdevice
7554  */
7555 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7556                                struct net_device *vdev)
7557 {
7558         struct i40e_pf *pf = vsi->back;
7559         struct i40e_hw *hw = &pf->hw;
7560         struct i40e_vsi_context ctxt;
7561         u16 sections, qmap, num_qps;
7562         struct i40e_channel *ch;
7563         int i, pow, ret = 0;
7564         u8 offset = 0;
7565
7566         if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7567                 return -EINVAL;
7568
7569         num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7570
7571         /* find the next higher power-of-2 of num queue pairs */
7572         pow = fls(roundup_pow_of_two(num_qps) - 1);
7573
7574         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7575                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7576
7577         /* Setup context bits for the main VSI */
7578         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7579         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7580         memset(&ctxt, 0, sizeof(ctxt));
7581         ctxt.seid = vsi->seid;
7582         ctxt.pf_num = vsi->back->hw.pf_id;
7583         ctxt.vf_num = 0;
7584         ctxt.uplink_seid = vsi->uplink_seid;
7585         ctxt.info = vsi->info;
7586         ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7587         ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7588         ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7589         ctxt.info.valid_sections |= cpu_to_le16(sections);
7590
7591         /* Reconfigure RSS for main VSI with new max queue count */
7592         vsi->rss_size = max_t(u16, num_qps, qcnt);
7593         ret = i40e_vsi_config_rss(vsi);
7594         if (ret) {
7595                 dev_info(&pf->pdev->dev,
7596                          "Failed to reconfig RSS for num_queues (%u)\n",
7597                          vsi->rss_size);
7598                 return ret;
7599         }
7600         vsi->reconfig_rss = true;
7601         dev_dbg(&vsi->back->pdev->dev,
7602                 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7603         vsi->next_base_queue = num_qps;
7604         vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7605
7606         /* Update the VSI after updating the VSI queue-mapping
7607          * information
7608          */
7609         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7610         if (ret) {
7611                 dev_info(&pf->pdev->dev,
7612                          "Update vsi tc config failed, err %s aq_err %s\n",
7613                          i40e_stat_str(hw, ret),
7614                          i40e_aq_str(hw, hw->aq.asq_last_status));
7615                 return ret;
7616         }
7617         /* update the local VSI info with updated queue map */
7618         i40e_vsi_update_queue_map(vsi, &ctxt);
7619         vsi->info.valid_sections = 0;
7620
7621         /* Create channels for macvlans */
7622         INIT_LIST_HEAD(&vsi->macvlan_list);
7623         for (i = 0; i < macvlan_cnt; i++) {
7624                 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7625                 if (!ch) {
7626                         ret = -ENOMEM;
7627                         goto err_free;
7628                 }
7629                 INIT_LIST_HEAD(&ch->list);
7630                 ch->num_queue_pairs = qcnt;
7631                 if (!i40e_setup_channel(pf, vsi, ch)) {
7632                         ret = -EINVAL;
7633                         kfree(ch);
7634                         goto err_free;
7635                 }
7636                 ch->parent_vsi = vsi;
7637                 vsi->cnt_q_avail -= ch->num_queue_pairs;
7638                 vsi->macvlan_cnt++;
7639                 list_add_tail(&ch->list, &vsi->macvlan_list);
7640         }
7641
7642         return ret;
7643
7644 err_free:
7645         dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7646         i40e_free_macvlan_channels(vsi);
7647
7648         return ret;
7649 }
7650
7651 /**
7652  * i40e_fwd_add - configure macvlans
7653  * @netdev: net device to configure
7654  * @vdev: macvlan netdevice
7655  **/
7656 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7657 {
7658         struct i40e_netdev_priv *np = netdev_priv(netdev);
7659         u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7660         struct i40e_vsi *vsi = np->vsi;
7661         struct i40e_pf *pf = vsi->back;
7662         struct i40e_fwd_adapter *fwd;
7663         int avail_macvlan, ret;
7664
7665         if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7666                 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7667                 return ERR_PTR(-EINVAL);
7668         }
7669         if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7670                 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7671                 return ERR_PTR(-EINVAL);
7672         }
7673         if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7674                 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7675                 return ERR_PTR(-EINVAL);
7676         }
7677
7678         /* The macvlan device has to be a single Q device so that the
7679          * tc_to_txq field can be reused to pick the tx queue.
7680          */
7681         if (netif_is_multiqueue(vdev))
7682                 return ERR_PTR(-ERANGE);
7683
7684         if (!vsi->macvlan_cnt) {
7685                 /* reserve bit 0 for the pf device */
7686                 set_bit(0, vsi->fwd_bitmask);
7687
7688                 /* Try to reserve as many queues as possible for macvlans. First
7689                  * reserve 3/4th of max vectors, then half, then quarter and
7690                  * calculate Qs per macvlan as you go
7691                  */
7692                 vectors = pf->num_lan_msix;
7693                 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7694                         /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7695                         q_per_macvlan = 4;
7696                         macvlan_cnt = (vectors - 32) / 4;
7697                 } else if (vectors <= 64 && vectors > 32) {
7698                         /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7699                         q_per_macvlan = 2;
7700                         macvlan_cnt = (vectors - 16) / 2;
7701                 } else if (vectors <= 32 && vectors > 16) {
7702                         /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7703                         q_per_macvlan = 1;
7704                         macvlan_cnt = vectors - 16;
7705                 } else if (vectors <= 16 && vectors > 8) {
7706                         /* allocate 1 Q per macvlan and 8 Qs to the PF */
7707                         q_per_macvlan = 1;
7708                         macvlan_cnt = vectors - 8;
7709                 } else {
7710                         /* allocate 1 Q per macvlan and 1 Q to the PF */
7711                         q_per_macvlan = 1;
7712                         macvlan_cnt = vectors - 1;
7713                 }
7714
7715                 if (macvlan_cnt == 0)
7716                         return ERR_PTR(-EBUSY);
7717
7718                 /* Quiesce VSI queues */
7719                 i40e_quiesce_vsi(vsi);
7720
7721                 /* sets up the macvlans but does not "enable" them */
7722                 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7723                                           vdev);
7724                 if (ret)
7725                         return ERR_PTR(ret);
7726
7727                 /* Unquiesce VSI */
7728                 i40e_unquiesce_vsi(vsi);
7729         }
7730         avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7731                                             vsi->macvlan_cnt);
7732         if (avail_macvlan >= I40E_MAX_MACVLANS)
7733                 return ERR_PTR(-EBUSY);
7734
7735         /* create the fwd struct */
7736         fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7737         if (!fwd)
7738                 return ERR_PTR(-ENOMEM);
7739
7740         set_bit(avail_macvlan, vsi->fwd_bitmask);
7741         fwd->bit_no = avail_macvlan;
7742         netdev_set_sb_channel(vdev, avail_macvlan);
7743         fwd->netdev = vdev;
7744
7745         if (!netif_running(netdev))
7746                 return fwd;
7747
7748         /* Set fwd ring up */
7749         ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7750         if (ret) {
7751                 /* unbind the queues and drop the subordinate channel config */
7752                 netdev_unbind_sb_channel(netdev, vdev);
7753                 netdev_set_sb_channel(vdev, 0);
7754
7755                 kfree(fwd);
7756                 return ERR_PTR(-EINVAL);
7757         }
7758
7759         return fwd;
7760 }
7761
7762 /**
7763  * i40e_del_all_macvlans - Delete all the mac filters on the channels
7764  * @vsi: the VSI we want to access
7765  */
7766 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7767 {
7768         struct i40e_channel *ch, *ch_tmp;
7769         struct i40e_pf *pf = vsi->back;
7770         struct i40e_hw *hw = &pf->hw;
7771         int aq_err, ret = 0;
7772
7773         if (list_empty(&vsi->macvlan_list))
7774                 return;
7775
7776         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7777                 if (i40e_is_channel_macvlan(ch)) {
7778                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7779                                                       i40e_channel_mac(ch),
7780                                                       &aq_err);
7781                         if (!ret) {
7782                                 /* Reset queue contexts */
7783                                 i40e_reset_ch_rings(vsi, ch);
7784                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7785                                 netdev_unbind_sb_channel(vsi->netdev,
7786                                                          ch->fwd->netdev);
7787                                 netdev_set_sb_channel(ch->fwd->netdev, 0);
7788                                 kfree(ch->fwd);
7789                                 ch->fwd = NULL;
7790                         }
7791                 }
7792         }
7793 }
7794
7795 /**
7796  * i40e_fwd_del - delete macvlan interfaces
7797  * @netdev: net device to configure
7798  * @vdev: macvlan netdevice
7799  */
7800 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7801 {
7802         struct i40e_netdev_priv *np = netdev_priv(netdev);
7803         struct i40e_fwd_adapter *fwd = vdev;
7804         struct i40e_channel *ch, *ch_tmp;
7805         struct i40e_vsi *vsi = np->vsi;
7806         struct i40e_pf *pf = vsi->back;
7807         struct i40e_hw *hw = &pf->hw;
7808         int aq_err, ret = 0;
7809
7810         /* Find the channel associated with the macvlan and del mac filter */
7811         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7812                 if (i40e_is_channel_macvlan(ch) &&
7813                     ether_addr_equal(i40e_channel_mac(ch),
7814                                      fwd->netdev->dev_addr)) {
7815                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7816                                                       i40e_channel_mac(ch),
7817                                                       &aq_err);
7818                         if (!ret) {
7819                                 /* Reset queue contexts */
7820                                 i40e_reset_ch_rings(vsi, ch);
7821                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7822                                 netdev_unbind_sb_channel(netdev, fwd->netdev);
7823                                 netdev_set_sb_channel(fwd->netdev, 0);
7824                                 kfree(ch->fwd);
7825                                 ch->fwd = NULL;
7826                         } else {
7827                                 dev_info(&pf->pdev->dev,
7828                                          "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7829                                           i40e_stat_str(hw, ret),
7830                                           i40e_aq_str(hw, aq_err));
7831                         }
7832                         break;
7833                 }
7834         }
7835 }
7836
7837 /**
7838  * i40e_setup_tc - configure multiple traffic classes
7839  * @netdev: net device to configure
7840  * @type_data: tc offload data
7841  **/
7842 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7843 {
7844         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7845         struct i40e_netdev_priv *np = netdev_priv(netdev);
7846         struct i40e_vsi *vsi = np->vsi;
7847         struct i40e_pf *pf = vsi->back;
7848         u8 enabled_tc = 0, num_tc, hw;
7849         bool need_reset = false;
7850         int old_queue_pairs;
7851         int ret = -EINVAL;
7852         u16 mode;
7853         int i;
7854
7855         old_queue_pairs = vsi->num_queue_pairs;
7856         num_tc = mqprio_qopt->qopt.num_tc;
7857         hw = mqprio_qopt->qopt.hw;
7858         mode = mqprio_qopt->mode;
7859         if (!hw) {
7860                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7861                 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
7862                 goto config_tc;
7863         }
7864
7865         /* Check if MFP enabled */
7866         if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7867                 netdev_info(netdev,
7868                             "Configuring TC not supported in MFP mode\n");
7869                 return ret;
7870         }
7871         switch (mode) {
7872         case TC_MQPRIO_MODE_DCB:
7873                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7874
7875                 /* Check if DCB enabled to continue */
7876                 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7877                         netdev_info(netdev,
7878                                     "DCB is not enabled for adapter\n");
7879                         return ret;
7880                 }
7881
7882                 /* Check whether tc count is within enabled limit */
7883                 if (num_tc > i40e_pf_get_num_tc(pf)) {
7884                         netdev_info(netdev,
7885                                     "TC count greater than enabled on link for adapter\n");
7886                         return ret;
7887                 }
7888                 break;
7889         case TC_MQPRIO_MODE_CHANNEL:
7890                 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
7891                         netdev_info(netdev,
7892                                     "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
7893                         return ret;
7894                 }
7895                 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7896                         return ret;
7897                 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
7898                 if (ret)
7899                         return ret;
7900                 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
7901                        sizeof(*mqprio_qopt));
7902                 pf->flags |= I40E_FLAG_TC_MQPRIO;
7903                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7904                 break;
7905         default:
7906                 return -EINVAL;
7907         }
7908
7909 config_tc:
7910         /* Generate TC map for number of tc requested */
7911         for (i = 0; i < num_tc; i++)
7912                 enabled_tc |= BIT(i);
7913
7914         /* Requesting same TC configuration as already enabled */
7915         if (enabled_tc == vsi->tc_config.enabled_tc &&
7916             mode != TC_MQPRIO_MODE_CHANNEL)
7917                 return 0;
7918
7919         /* Quiesce VSI queues */
7920         i40e_quiesce_vsi(vsi);
7921
7922         if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
7923                 i40e_remove_queue_channels(vsi);
7924
7925         /* Configure VSI for enabled TCs */
7926         ret = i40e_vsi_config_tc(vsi, enabled_tc);
7927         if (ret) {
7928                 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
7929                             vsi->seid);
7930                 need_reset = true;
7931                 goto exit;
7932         } else {
7933                 dev_info(&vsi->back->pdev->dev,
7934                          "Setup channel (id:%u) utilizing num_queues %d\n",
7935                          vsi->seid, vsi->tc_config.tc_info[0].qcount);
7936         }
7937
7938         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
7939                 if (vsi->mqprio_qopt.max_rate[0]) {
7940                         u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
7941
7942                         do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
7943                         ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
7944                         if (!ret) {
7945                                 u64 credits = max_tx_rate;
7946
7947                                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
7948                                 dev_dbg(&vsi->back->pdev->dev,
7949                                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
7950                                         max_tx_rate,
7951                                         credits,
7952                                         vsi->seid);
7953                         } else {
7954                                 need_reset = true;
7955                                 goto exit;
7956                         }
7957                 }
7958                 ret = i40e_configure_queue_channels(vsi);
7959                 if (ret) {
7960                         vsi->num_queue_pairs = old_queue_pairs;
7961                         netdev_info(netdev,
7962                                     "Failed configuring queue channels\n");
7963                         need_reset = true;
7964                         goto exit;
7965                 }
7966         }
7967
7968 exit:
7969         /* Reset the configuration data to defaults, only TC0 is enabled */
7970         if (need_reset) {
7971                 i40e_vsi_set_default_tc_config(vsi);
7972                 need_reset = false;
7973         }
7974
7975         /* Unquiesce VSI */
7976         i40e_unquiesce_vsi(vsi);
7977         return ret;
7978 }
7979
7980 /**
7981  * i40e_set_cld_element - sets cloud filter element data
7982  * @filter: cloud filter rule
7983  * @cld: ptr to cloud filter element data
7984  *
7985  * This is helper function to copy data into cloud filter element
7986  **/
7987 static inline void
7988 i40e_set_cld_element(struct i40e_cloud_filter *filter,
7989                      struct i40e_aqc_cloud_filters_element_data *cld)
7990 {
7991         u32 ipa;
7992         int i;
7993
7994         memset(cld, 0, sizeof(*cld));
7995         ether_addr_copy(cld->outer_mac, filter->dst_mac);
7996         ether_addr_copy(cld->inner_mac, filter->src_mac);
7997
7998         if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
7999                 return;
8000
8001         if (filter->n_proto == ETH_P_IPV6) {
8002 #define IPV6_MAX_INDEX  (ARRAY_SIZE(filter->dst_ipv6) - 1)
8003                 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8004                         ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8005
8006                         *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8007                 }
8008         } else {
8009                 ipa = be32_to_cpu(filter->dst_ipv4);
8010
8011                 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8012         }
8013
8014         cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8015
8016         /* tenant_id is not supported by FW now, once the support is enabled
8017          * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8018          */
8019         if (filter->tenant_id)
8020                 return;
8021 }
8022
8023 /**
8024  * i40e_add_del_cloud_filter - Add/del cloud filter
8025  * @vsi: pointer to VSI
8026  * @filter: cloud filter rule
8027  * @add: if true, add, if false, delete
8028  *
8029  * Add or delete a cloud filter for a specific flow spec.
8030  * Returns 0 if the filter were successfully added.
8031  **/
8032 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8033                               struct i40e_cloud_filter *filter, bool add)
8034 {
8035         struct i40e_aqc_cloud_filters_element_data cld_filter;
8036         struct i40e_pf *pf = vsi->back;
8037         int ret;
8038         static const u16 flag_table[128] = {
8039                 [I40E_CLOUD_FILTER_FLAGS_OMAC]  =
8040                         I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8041                 [I40E_CLOUD_FILTER_FLAGS_IMAC]  =
8042                         I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8043                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN]  =
8044                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8045                 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8046                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8047                 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8048                         I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8049                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8050                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8051                 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8052                         I40E_AQC_ADD_CLOUD_FILTER_IIP,
8053         };
8054
8055         if (filter->flags >= ARRAY_SIZE(flag_table))
8056                 return I40E_ERR_CONFIG;
8057
8058         memset(&cld_filter, 0, sizeof(cld_filter));
8059
8060         /* copy element needed to add cloud filter from filter */
8061         i40e_set_cld_element(filter, &cld_filter);
8062
8063         if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8064                 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8065                                              I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8066
8067         if (filter->n_proto == ETH_P_IPV6)
8068                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8069                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8070         else
8071                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8072                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8073
8074         if (add)
8075                 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8076                                                 &cld_filter, 1);
8077         else
8078                 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8079                                                 &cld_filter, 1);
8080         if (ret)
8081                 dev_dbg(&pf->pdev->dev,
8082                         "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8083                         add ? "add" : "delete", filter->dst_port, ret,
8084                         pf->hw.aq.asq_last_status);
8085         else
8086                 dev_info(&pf->pdev->dev,
8087                          "%s cloud filter for VSI: %d\n",
8088                          add ? "Added" : "Deleted", filter->seid);
8089         return ret;
8090 }
8091
8092 /**
8093  * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8094  * @vsi: pointer to VSI
8095  * @filter: cloud filter rule
8096  * @add: if true, add, if false, delete
8097  *
8098  * Add or delete a cloud filter for a specific flow spec using big buffer.
8099  * Returns 0 if the filter were successfully added.
8100  **/
8101 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8102                                       struct i40e_cloud_filter *filter,
8103                                       bool add)
8104 {
8105         struct i40e_aqc_cloud_filters_element_bb cld_filter;
8106         struct i40e_pf *pf = vsi->back;
8107         int ret;
8108
8109         /* Both (src/dst) valid mac_addr are not supported */
8110         if ((is_valid_ether_addr(filter->dst_mac) &&
8111              is_valid_ether_addr(filter->src_mac)) ||
8112             (is_multicast_ether_addr(filter->dst_mac) &&
8113              is_multicast_ether_addr(filter->src_mac)))
8114                 return -EOPNOTSUPP;
8115
8116         /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8117          * ports are not supported via big buffer now.
8118          */
8119         if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8120                 return -EOPNOTSUPP;
8121
8122         /* adding filter using src_port/src_ip is not supported at this stage */
8123         if (filter->src_port ||
8124             (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8125             !ipv6_addr_any(&filter->ip.v6.src_ip6))
8126                 return -EOPNOTSUPP;
8127
8128         memset(&cld_filter, 0, sizeof(cld_filter));
8129
8130         /* copy element needed to add cloud filter from filter */
8131         i40e_set_cld_element(filter, &cld_filter.element);
8132
8133         if (is_valid_ether_addr(filter->dst_mac) ||
8134             is_valid_ether_addr(filter->src_mac) ||
8135             is_multicast_ether_addr(filter->dst_mac) ||
8136             is_multicast_ether_addr(filter->src_mac)) {
8137                 /* MAC + IP : unsupported mode */
8138                 if (filter->dst_ipv4)
8139                         return -EOPNOTSUPP;
8140
8141                 /* since we validated that L4 port must be valid before
8142                  * we get here, start with respective "flags" value
8143                  * and update if vlan is present or not
8144                  */
8145                 cld_filter.element.flags =
8146                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8147
8148                 if (filter->vlan_id) {
8149                         cld_filter.element.flags =
8150                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8151                 }
8152
8153         } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8154                    !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8155                 cld_filter.element.flags =
8156                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8157                 if (filter->n_proto == ETH_P_IPV6)
8158                         cld_filter.element.flags |=
8159                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8160                 else
8161                         cld_filter.element.flags |=
8162                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8163         } else {
8164                 dev_err(&pf->pdev->dev,
8165                         "either mac or ip has to be valid for cloud filter\n");
8166                 return -EINVAL;
8167         }
8168
8169         /* Now copy L4 port in Byte 6..7 in general fields */
8170         cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8171                                                 be16_to_cpu(filter->dst_port);
8172
8173         if (add) {
8174                 /* Validate current device switch mode, change if necessary */
8175                 ret = i40e_validate_and_set_switch_mode(vsi);
8176                 if (ret) {
8177                         dev_err(&pf->pdev->dev,
8178                                 "failed to set switch mode, ret %d\n",
8179                                 ret);
8180                         return ret;
8181                 }
8182
8183                 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8184                                                    &cld_filter, 1);
8185         } else {
8186                 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8187                                                    &cld_filter, 1);
8188         }
8189
8190         if (ret)
8191                 dev_dbg(&pf->pdev->dev,
8192                         "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8193                         add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8194         else
8195                 dev_info(&pf->pdev->dev,
8196                          "%s cloud filter for VSI: %d, L4 port: %d\n",
8197                          add ? "add" : "delete", filter->seid,
8198                          ntohs(filter->dst_port));
8199         return ret;
8200 }
8201
8202 /**
8203  * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8204  * @vsi: Pointer to VSI
8205  * @f: Pointer to struct flow_cls_offload
8206  * @filter: Pointer to cloud filter structure
8207  *
8208  **/
8209 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8210                                  struct flow_cls_offload *f,
8211                                  struct i40e_cloud_filter *filter)
8212 {
8213         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8214         struct flow_dissector *dissector = rule->match.dissector;
8215         u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8216         struct i40e_pf *pf = vsi->back;
8217         u8 field_flags = 0;
8218
8219         if (dissector->used_keys &
8220             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
8221               BIT(FLOW_DISSECTOR_KEY_BASIC) |
8222               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8223               BIT(FLOW_DISSECTOR_KEY_VLAN) |
8224               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8225               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8226               BIT(FLOW_DISSECTOR_KEY_PORTS) |
8227               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8228                 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
8229                         dissector->used_keys);
8230                 return -EOPNOTSUPP;
8231         }
8232
8233         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8234                 struct flow_match_enc_keyid match;
8235
8236                 flow_rule_match_enc_keyid(rule, &match);
8237                 if (match.mask->keyid != 0)
8238                         field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8239
8240                 filter->tenant_id = be32_to_cpu(match.key->keyid);
8241         }
8242
8243         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8244                 struct flow_match_basic match;
8245
8246                 flow_rule_match_basic(rule, &match);
8247                 n_proto_key = ntohs(match.key->n_proto);
8248                 n_proto_mask = ntohs(match.mask->n_proto);
8249
8250                 if (n_proto_key == ETH_P_ALL) {
8251                         n_proto_key = 0;
8252                         n_proto_mask = 0;
8253                 }
8254                 filter->n_proto = n_proto_key & n_proto_mask;
8255                 filter->ip_proto = match.key->ip_proto;
8256         }
8257
8258         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8259                 struct flow_match_eth_addrs match;
8260
8261                 flow_rule_match_eth_addrs(rule, &match);
8262
8263                 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8264                 if (!is_zero_ether_addr(match.mask->dst)) {
8265                         if (is_broadcast_ether_addr(match.mask->dst)) {
8266                                 field_flags |= I40E_CLOUD_FIELD_OMAC;
8267                         } else {
8268                                 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8269                                         match.mask->dst);
8270                                 return I40E_ERR_CONFIG;
8271                         }
8272                 }
8273
8274                 if (!is_zero_ether_addr(match.mask->src)) {
8275                         if (is_broadcast_ether_addr(match.mask->src)) {
8276                                 field_flags |= I40E_CLOUD_FIELD_IMAC;
8277                         } else {
8278                                 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8279                                         match.mask->src);
8280                                 return I40E_ERR_CONFIG;
8281                         }
8282                 }
8283                 ether_addr_copy(filter->dst_mac, match.key->dst);
8284                 ether_addr_copy(filter->src_mac, match.key->src);
8285         }
8286
8287         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8288                 struct flow_match_vlan match;
8289
8290                 flow_rule_match_vlan(rule, &match);
8291                 if (match.mask->vlan_id) {
8292                         if (match.mask->vlan_id == VLAN_VID_MASK) {
8293                                 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8294
8295                         } else {
8296                                 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8297                                         match.mask->vlan_id);
8298                                 return I40E_ERR_CONFIG;
8299                         }
8300                 }
8301
8302                 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8303         }
8304
8305         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8306                 struct flow_match_control match;
8307
8308                 flow_rule_match_control(rule, &match);
8309                 addr_type = match.key->addr_type;
8310         }
8311
8312         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8313                 struct flow_match_ipv4_addrs match;
8314
8315                 flow_rule_match_ipv4_addrs(rule, &match);
8316                 if (match.mask->dst) {
8317                         if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8318                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8319                         } else {
8320                                 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8321                                         &match.mask->dst);
8322                                 return I40E_ERR_CONFIG;
8323                         }
8324                 }
8325
8326                 if (match.mask->src) {
8327                         if (match.mask->src == cpu_to_be32(0xffffffff)) {
8328                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8329                         } else {
8330                                 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8331                                         &match.mask->src);
8332                                 return I40E_ERR_CONFIG;
8333                         }
8334                 }
8335
8336                 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8337                         dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8338                         return I40E_ERR_CONFIG;
8339                 }
8340                 filter->dst_ipv4 = match.key->dst;
8341                 filter->src_ipv4 = match.key->src;
8342         }
8343
8344         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8345                 struct flow_match_ipv6_addrs match;
8346
8347                 flow_rule_match_ipv6_addrs(rule, &match);
8348
8349                 /* src and dest IPV6 address should not be LOOPBACK
8350                  * (0:0:0:0:0:0:0:1), which can be represented as ::1
8351                  */
8352                 if (ipv6_addr_loopback(&match.key->dst) ||
8353                     ipv6_addr_loopback(&match.key->src)) {
8354                         dev_err(&pf->pdev->dev,
8355                                 "Bad ipv6, addr is LOOPBACK\n");
8356                         return I40E_ERR_CONFIG;
8357                 }
8358                 if (!ipv6_addr_any(&match.mask->dst) ||
8359                     !ipv6_addr_any(&match.mask->src))
8360                         field_flags |= I40E_CLOUD_FIELD_IIP;
8361
8362                 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8363                        sizeof(filter->src_ipv6));
8364                 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8365                        sizeof(filter->dst_ipv6));
8366         }
8367
8368         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8369                 struct flow_match_ports match;
8370
8371                 flow_rule_match_ports(rule, &match);
8372                 if (match.mask->src) {
8373                         if (match.mask->src == cpu_to_be16(0xffff)) {
8374                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8375                         } else {
8376                                 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8377                                         be16_to_cpu(match.mask->src));
8378                                 return I40E_ERR_CONFIG;
8379                         }
8380                 }
8381
8382                 if (match.mask->dst) {
8383                         if (match.mask->dst == cpu_to_be16(0xffff)) {
8384                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8385                         } else {
8386                                 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8387                                         be16_to_cpu(match.mask->dst));
8388                                 return I40E_ERR_CONFIG;
8389                         }
8390                 }
8391
8392                 filter->dst_port = match.key->dst;
8393                 filter->src_port = match.key->src;
8394
8395                 switch (filter->ip_proto) {
8396                 case IPPROTO_TCP:
8397                 case IPPROTO_UDP:
8398                         break;
8399                 default:
8400                         dev_err(&pf->pdev->dev,
8401                                 "Only UDP and TCP transport are supported\n");
8402                         return -EINVAL;
8403                 }
8404         }
8405         filter->flags = field_flags;
8406         return 0;
8407 }
8408
8409 /**
8410  * i40e_handle_tclass: Forward to a traffic class on the device
8411  * @vsi: Pointer to VSI
8412  * @tc: traffic class index on the device
8413  * @filter: Pointer to cloud filter structure
8414  *
8415  **/
8416 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8417                               struct i40e_cloud_filter *filter)
8418 {
8419         struct i40e_channel *ch, *ch_tmp;
8420
8421         /* direct to a traffic class on the same device */
8422         if (tc == 0) {
8423                 filter->seid = vsi->seid;
8424                 return 0;
8425         } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8426                 if (!filter->dst_port) {
8427                         dev_err(&vsi->back->pdev->dev,
8428                                 "Specify destination port to direct to traffic class that is not default\n");
8429                         return -EINVAL;
8430                 }
8431                 if (list_empty(&vsi->ch_list))
8432                         return -EINVAL;
8433                 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8434                                          list) {
8435                         if (ch->seid == vsi->tc_seid_map[tc])
8436                                 filter->seid = ch->seid;
8437                 }
8438                 return 0;
8439         }
8440         dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8441         return -EINVAL;
8442 }
8443
8444 /**
8445  * i40e_configure_clsflower - Configure tc flower filters
8446  * @vsi: Pointer to VSI
8447  * @cls_flower: Pointer to struct flow_cls_offload
8448  *
8449  **/
8450 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8451                                     struct flow_cls_offload *cls_flower)
8452 {
8453         int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8454         struct i40e_cloud_filter *filter = NULL;
8455         struct i40e_pf *pf = vsi->back;
8456         int err = 0;
8457
8458         if (tc < 0) {
8459                 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8460                 return -EOPNOTSUPP;
8461         }
8462
8463         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8464             test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8465                 return -EBUSY;
8466
8467         if (pf->fdir_pf_active_filters ||
8468             (!hlist_empty(&pf->fdir_filter_list))) {
8469                 dev_err(&vsi->back->pdev->dev,
8470                         "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8471                 return -EINVAL;
8472         }
8473
8474         if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8475                 dev_err(&vsi->back->pdev->dev,
8476                         "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8477                 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8478                 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8479         }
8480
8481         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8482         if (!filter)
8483                 return -ENOMEM;
8484
8485         filter->cookie = cls_flower->cookie;
8486
8487         err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8488         if (err < 0)
8489                 goto err;
8490
8491         err = i40e_handle_tclass(vsi, tc, filter);
8492         if (err < 0)
8493                 goto err;
8494
8495         /* Add cloud filter */
8496         if (filter->dst_port)
8497                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8498         else
8499                 err = i40e_add_del_cloud_filter(vsi, filter, true);
8500
8501         if (err) {
8502                 dev_err(&pf->pdev->dev,
8503                         "Failed to add cloud filter, err %s\n",
8504                         i40e_stat_str(&pf->hw, err));
8505                 goto err;
8506         }
8507
8508         /* add filter to the ordered list */
8509         INIT_HLIST_NODE(&filter->cloud_node);
8510
8511         hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8512
8513         pf->num_cloud_filters++;
8514
8515         return err;
8516 err:
8517         kfree(filter);
8518         return err;
8519 }
8520
8521 /**
8522  * i40e_find_cloud_filter - Find the could filter in the list
8523  * @vsi: Pointer to VSI
8524  * @cookie: filter specific cookie
8525  *
8526  **/
8527 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8528                                                         unsigned long *cookie)
8529 {
8530         struct i40e_cloud_filter *filter = NULL;
8531         struct hlist_node *node2;
8532
8533         hlist_for_each_entry_safe(filter, node2,
8534                                   &vsi->back->cloud_filter_list, cloud_node)
8535                 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8536                         return filter;
8537         return NULL;
8538 }
8539
8540 /**
8541  * i40e_delete_clsflower - Remove tc flower filters
8542  * @vsi: Pointer to VSI
8543  * @cls_flower: Pointer to struct flow_cls_offload
8544  *
8545  **/
8546 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8547                                  struct flow_cls_offload *cls_flower)
8548 {
8549         struct i40e_cloud_filter *filter = NULL;
8550         struct i40e_pf *pf = vsi->back;
8551         int err = 0;
8552
8553         filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8554
8555         if (!filter)
8556                 return -EINVAL;
8557
8558         hash_del(&filter->cloud_node);
8559
8560         if (filter->dst_port)
8561                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8562         else
8563                 err = i40e_add_del_cloud_filter(vsi, filter, false);
8564
8565         kfree(filter);
8566         if (err) {
8567                 dev_err(&pf->pdev->dev,
8568                         "Failed to delete cloud filter, err %s\n",
8569                         i40e_stat_str(&pf->hw, err));
8570                 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8571         }
8572
8573         pf->num_cloud_filters--;
8574         if (!pf->num_cloud_filters)
8575                 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8576                     !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8577                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8578                         pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8579                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8580                 }
8581         return 0;
8582 }
8583
8584 /**
8585  * i40e_setup_tc_cls_flower - flower classifier offloads
8586  * @np: net device to configure
8587  * @cls_flower: offload data
8588  **/
8589 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8590                                     struct flow_cls_offload *cls_flower)
8591 {
8592         struct i40e_vsi *vsi = np->vsi;
8593
8594         switch (cls_flower->command) {
8595         case FLOW_CLS_REPLACE:
8596                 return i40e_configure_clsflower(vsi, cls_flower);
8597         case FLOW_CLS_DESTROY:
8598                 return i40e_delete_clsflower(vsi, cls_flower);
8599         case FLOW_CLS_STATS:
8600                 return -EOPNOTSUPP;
8601         default:
8602                 return -EOPNOTSUPP;
8603         }
8604 }
8605
8606 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8607                                   void *cb_priv)
8608 {
8609         struct i40e_netdev_priv *np = cb_priv;
8610
8611         if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8612                 return -EOPNOTSUPP;
8613
8614         switch (type) {
8615         case TC_SETUP_CLSFLOWER:
8616                 return i40e_setup_tc_cls_flower(np, type_data);
8617
8618         default:
8619                 return -EOPNOTSUPP;
8620         }
8621 }
8622
8623 static LIST_HEAD(i40e_block_cb_list);
8624
8625 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8626                            void *type_data)
8627 {
8628         struct i40e_netdev_priv *np = netdev_priv(netdev);
8629
8630         switch (type) {
8631         case TC_SETUP_QDISC_MQPRIO:
8632                 return i40e_setup_tc(netdev, type_data);
8633         case TC_SETUP_BLOCK:
8634                 return flow_block_cb_setup_simple(type_data,
8635                                                   &i40e_block_cb_list,
8636                                                   i40e_setup_tc_block_cb,
8637                                                   np, np, true);
8638         default:
8639                 return -EOPNOTSUPP;
8640         }
8641 }
8642
8643 /**
8644  * i40e_open - Called when a network interface is made active
8645  * @netdev: network interface device structure
8646  *
8647  * The open entry point is called when a network interface is made
8648  * active by the system (IFF_UP).  At this point all resources needed
8649  * for transmit and receive operations are allocated, the interrupt
8650  * handler is registered with the OS, the netdev watchdog subtask is
8651  * enabled, and the stack is notified that the interface is ready.
8652  *
8653  * Returns 0 on success, negative value on failure
8654  **/
8655 int i40e_open(struct net_device *netdev)
8656 {
8657         struct i40e_netdev_priv *np = netdev_priv(netdev);
8658         struct i40e_vsi *vsi = np->vsi;
8659         struct i40e_pf *pf = vsi->back;
8660         int err;
8661
8662         /* disallow open during test or if eeprom is broken */
8663         if (test_bit(__I40E_TESTING, pf->state) ||
8664             test_bit(__I40E_BAD_EEPROM, pf->state))
8665                 return -EBUSY;
8666
8667         netif_carrier_off(netdev);
8668
8669         if (i40e_force_link_state(pf, true))
8670                 return -EAGAIN;
8671
8672         err = i40e_vsi_open(vsi);
8673         if (err)
8674                 return err;
8675
8676         /* configure global TSO hardware offload settings */
8677         wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8678                                                        TCP_FLAG_FIN) >> 16);
8679         wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8680                                                        TCP_FLAG_FIN |
8681                                                        TCP_FLAG_CWR) >> 16);
8682         wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8683         udp_tunnel_get_rx_info(netdev);
8684
8685         return 0;
8686 }
8687
8688 /**
8689  * i40e_vsi_open -
8690  * @vsi: the VSI to open
8691  *
8692  * Finish initialization of the VSI.
8693  *
8694  * Returns 0 on success, negative value on failure
8695  *
8696  * Note: expects to be called while under rtnl_lock()
8697  **/
8698 int i40e_vsi_open(struct i40e_vsi *vsi)
8699 {
8700         struct i40e_pf *pf = vsi->back;
8701         char int_name[I40E_INT_NAME_STR_LEN];
8702         int err;
8703
8704         /* allocate descriptors */
8705         err = i40e_vsi_setup_tx_resources(vsi);
8706         if (err)
8707                 goto err_setup_tx;
8708         err = i40e_vsi_setup_rx_resources(vsi);
8709         if (err)
8710                 goto err_setup_rx;
8711
8712         err = i40e_vsi_configure(vsi);
8713         if (err)
8714                 goto err_setup_rx;
8715
8716         if (vsi->netdev) {
8717                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8718                          dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8719                 err = i40e_vsi_request_irq(vsi, int_name);
8720                 if (err)
8721                         goto err_setup_rx;
8722
8723                 /* Notify the stack of the actual queue counts. */
8724                 err = netif_set_real_num_tx_queues(vsi->netdev,
8725                                                    vsi->num_queue_pairs);
8726                 if (err)
8727                         goto err_set_queues;
8728
8729                 err = netif_set_real_num_rx_queues(vsi->netdev,
8730                                                    vsi->num_queue_pairs);
8731                 if (err)
8732                         goto err_set_queues;
8733
8734         } else if (vsi->type == I40E_VSI_FDIR) {
8735                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8736                          dev_driver_string(&pf->pdev->dev),
8737                          dev_name(&pf->pdev->dev));
8738                 err = i40e_vsi_request_irq(vsi, int_name);
8739
8740         } else {
8741                 err = -EINVAL;
8742                 goto err_setup_rx;
8743         }
8744
8745         err = i40e_up_complete(vsi);
8746         if (err)
8747                 goto err_up_complete;
8748
8749         return 0;
8750
8751 err_up_complete:
8752         i40e_down(vsi);
8753 err_set_queues:
8754         i40e_vsi_free_irq(vsi);
8755 err_setup_rx:
8756         i40e_vsi_free_rx_resources(vsi);
8757 err_setup_tx:
8758         i40e_vsi_free_tx_resources(vsi);
8759         if (vsi == pf->vsi[pf->lan_vsi])
8760                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8761
8762         return err;
8763 }
8764
8765 /**
8766  * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8767  * @pf: Pointer to PF
8768  *
8769  * This function destroys the hlist where all the Flow Director
8770  * filters were saved.
8771  **/
8772 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8773 {
8774         struct i40e_fdir_filter *filter;
8775         struct i40e_flex_pit *pit_entry, *tmp;
8776         struct hlist_node *node2;
8777
8778         hlist_for_each_entry_safe(filter, node2,
8779                                   &pf->fdir_filter_list, fdir_node) {
8780                 hlist_del(&filter->fdir_node);
8781                 kfree(filter);
8782         }
8783
8784         list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8785                 list_del(&pit_entry->list);
8786                 kfree(pit_entry);
8787         }
8788         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8789
8790         list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8791                 list_del(&pit_entry->list);
8792                 kfree(pit_entry);
8793         }
8794         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8795
8796         pf->fdir_pf_active_filters = 0;
8797         i40e_reset_fdir_filter_cnt(pf);
8798
8799         /* Reprogram the default input set for TCP/IPv4 */
8800         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8801                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8802                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8803
8804         /* Reprogram the default input set for TCP/IPv6 */
8805         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
8806                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8807                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8808
8809         /* Reprogram the default input set for UDP/IPv4 */
8810         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8811                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8812                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8813
8814         /* Reprogram the default input set for UDP/IPv6 */
8815         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
8816                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8817                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8818
8819         /* Reprogram the default input set for SCTP/IPv4 */
8820         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8821                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8822                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8823
8824         /* Reprogram the default input set for SCTP/IPv6 */
8825         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
8826                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8827                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8828
8829         /* Reprogram the default input set for Other/IPv4 */
8830         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
8831                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8832
8833         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
8834                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8835
8836         /* Reprogram the default input set for Other/IPv6 */
8837         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
8838                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8839
8840         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
8841                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8842 }
8843
8844 /**
8845  * i40e_cloud_filter_exit - Cleans up the cloud filters
8846  * @pf: Pointer to PF
8847  *
8848  * This function destroys the hlist where all the cloud filters
8849  * were saved.
8850  **/
8851 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
8852 {
8853         struct i40e_cloud_filter *cfilter;
8854         struct hlist_node *node;
8855
8856         hlist_for_each_entry_safe(cfilter, node,
8857                                   &pf->cloud_filter_list, cloud_node) {
8858                 hlist_del(&cfilter->cloud_node);
8859                 kfree(cfilter);
8860         }
8861         pf->num_cloud_filters = 0;
8862
8863         if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8864             !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8865                 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8866                 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8867                 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8868         }
8869 }
8870
8871 /**
8872  * i40e_close - Disables a network interface
8873  * @netdev: network interface device structure
8874  *
8875  * The close entry point is called when an interface is de-activated
8876  * by the OS.  The hardware is still under the driver's control, but
8877  * this netdev interface is disabled.
8878  *
8879  * Returns 0, this is not allowed to fail
8880  **/
8881 int i40e_close(struct net_device *netdev)
8882 {
8883         struct i40e_netdev_priv *np = netdev_priv(netdev);
8884         struct i40e_vsi *vsi = np->vsi;
8885
8886         i40e_vsi_close(vsi);
8887
8888         return 0;
8889 }
8890
8891 /**
8892  * i40e_do_reset - Start a PF or Core Reset sequence
8893  * @pf: board private structure
8894  * @reset_flags: which reset is requested
8895  * @lock_acquired: indicates whether or not the lock has been acquired
8896  * before this function was called.
8897  *
8898  * The essential difference in resets is that the PF Reset
8899  * doesn't clear the packet buffers, doesn't reset the PE
8900  * firmware, and doesn't bother the other PFs on the chip.
8901  **/
8902 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
8903 {
8904         u32 val;
8905
8906         /* do the biggest reset indicated */
8907         if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
8908
8909                 /* Request a Global Reset
8910                  *
8911                  * This will start the chip's countdown to the actual full
8912                  * chip reset event, and a warning interrupt to be sent
8913                  * to all PFs, including the requestor.  Our handler
8914                  * for the warning interrupt will deal with the shutdown
8915                  * and recovery of the switch setup.
8916                  */
8917                 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
8918                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8919                 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
8920                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8921
8922         } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
8923
8924                 /* Request a Core Reset
8925                  *
8926                  * Same as Global Reset, except does *not* include the MAC/PHY
8927                  */
8928                 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
8929                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8930                 val |= I40E_GLGEN_RTRIG_CORER_MASK;
8931                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8932                 i40e_flush(&pf->hw);
8933
8934         } else if (reset_flags & I40E_PF_RESET_FLAG) {
8935
8936                 /* Request a PF Reset
8937                  *
8938                  * Resets only the PF-specific registers
8939                  *
8940                  * This goes directly to the tear-down and rebuild of
8941                  * the switch, since we need to do all the recovery as
8942                  * for the Core Reset.
8943                  */
8944                 dev_dbg(&pf->pdev->dev, "PFR requested\n");
8945                 i40e_handle_reset_warning(pf, lock_acquired);
8946
8947         } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
8948                 /* Request a PF Reset
8949                  *
8950                  * Resets PF and reinitializes PFs VSI.
8951                  */
8952                 i40e_prep_for_reset(pf);
8953                 i40e_reset_and_rebuild(pf, true, lock_acquired);
8954                 dev_info(&pf->pdev->dev,
8955                          pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
8956                          "FW LLDP is disabled\n" :
8957                          "FW LLDP is enabled\n");
8958
8959         } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
8960                 int v;
8961
8962                 /* Find the VSI(s) that requested a re-init */
8963                 dev_info(&pf->pdev->dev,
8964                          "VSI reinit requested\n");
8965                 for (v = 0; v < pf->num_alloc_vsi; v++) {
8966                         struct i40e_vsi *vsi = pf->vsi[v];
8967
8968                         if (vsi != NULL &&
8969                             test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
8970                                                vsi->state))
8971                                 i40e_vsi_reinit_locked(pf->vsi[v]);
8972                 }
8973         } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
8974                 int v;
8975
8976                 /* Find the VSI(s) that needs to be brought down */
8977                 dev_info(&pf->pdev->dev, "VSI down requested\n");
8978                 for (v = 0; v < pf->num_alloc_vsi; v++) {
8979                         struct i40e_vsi *vsi = pf->vsi[v];
8980
8981                         if (vsi != NULL &&
8982                             test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
8983                                                vsi->state)) {
8984                                 set_bit(__I40E_VSI_DOWN, vsi->state);
8985                                 i40e_down(vsi);
8986                         }
8987                 }
8988         } else {
8989                 dev_info(&pf->pdev->dev,
8990                          "bad reset request 0x%08x\n", reset_flags);
8991         }
8992 }
8993
8994 #ifdef CONFIG_I40E_DCB
8995 /**
8996  * i40e_dcb_need_reconfig - Check if DCB needs reconfig
8997  * @pf: board private structure
8998  * @old_cfg: current DCB config
8999  * @new_cfg: new DCB config
9000  **/
9001 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9002                             struct i40e_dcbx_config *old_cfg,
9003                             struct i40e_dcbx_config *new_cfg)
9004 {
9005         bool need_reconfig = false;
9006
9007         /* Check if ETS configuration has changed */
9008         if (memcmp(&new_cfg->etscfg,
9009                    &old_cfg->etscfg,
9010                    sizeof(new_cfg->etscfg))) {
9011                 /* If Priority Table has changed reconfig is needed */
9012                 if (memcmp(&new_cfg->etscfg.prioritytable,
9013                            &old_cfg->etscfg.prioritytable,
9014                            sizeof(new_cfg->etscfg.prioritytable))) {
9015                         need_reconfig = true;
9016                         dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9017                 }
9018
9019                 if (memcmp(&new_cfg->etscfg.tcbwtable,
9020                            &old_cfg->etscfg.tcbwtable,
9021                            sizeof(new_cfg->etscfg.tcbwtable)))
9022                         dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9023
9024                 if (memcmp(&new_cfg->etscfg.tsatable,
9025                            &old_cfg->etscfg.tsatable,
9026                            sizeof(new_cfg->etscfg.tsatable)))
9027                         dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9028         }
9029
9030         /* Check if PFC configuration has changed */
9031         if (memcmp(&new_cfg->pfc,
9032                    &old_cfg->pfc,
9033                    sizeof(new_cfg->pfc))) {
9034                 need_reconfig = true;
9035                 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9036         }
9037
9038         /* Check if APP Table has changed */
9039         if (memcmp(&new_cfg->app,
9040                    &old_cfg->app,
9041                    sizeof(new_cfg->app))) {
9042                 need_reconfig = true;
9043                 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9044         }
9045
9046         dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9047         return need_reconfig;
9048 }
9049
9050 /**
9051  * i40e_handle_lldp_event - Handle LLDP Change MIB event
9052  * @pf: board private structure
9053  * @e: event info posted on ARQ
9054  **/
9055 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9056                                   struct i40e_arq_event_info *e)
9057 {
9058         struct i40e_aqc_lldp_get_mib *mib =
9059                 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9060         struct i40e_hw *hw = &pf->hw;
9061         struct i40e_dcbx_config tmp_dcbx_cfg;
9062         bool need_reconfig = false;
9063         int ret = 0;
9064         u8 type;
9065
9066         /* X710-T*L 2.5G and 5G speeds don't support DCB */
9067         if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9068             (hw->phy.link_info.link_speed &
9069              ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9070              !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9071                 /* let firmware decide if the DCB should be disabled */
9072                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9073
9074         /* Not DCB capable or capability disabled */
9075         if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9076                 return ret;
9077
9078         /* Ignore if event is not for Nearest Bridge */
9079         type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9080                 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9081         dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9082         if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9083                 return ret;
9084
9085         /* Check MIB Type and return if event for Remote MIB update */
9086         type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9087         dev_dbg(&pf->pdev->dev,
9088                 "LLDP event mib type %s\n", type ? "remote" : "local");
9089         if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9090                 /* Update the remote cached instance and return */
9091                 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9092                                 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9093                                 &hw->remote_dcbx_config);
9094                 goto exit;
9095         }
9096
9097         /* Store the old configuration */
9098         tmp_dcbx_cfg = hw->local_dcbx_config;
9099
9100         /* Reset the old DCBx configuration data */
9101         memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9102         /* Get updated DCBX data from firmware */
9103         ret = i40e_get_dcb_config(&pf->hw);
9104         if (ret) {
9105                 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9106                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9107                     (hw->phy.link_info.link_speed &
9108                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9109                         dev_warn(&pf->pdev->dev,
9110                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9111                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9112                 } else {
9113                         dev_info(&pf->pdev->dev,
9114                                  "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
9115                                  i40e_stat_str(&pf->hw, ret),
9116                                  i40e_aq_str(&pf->hw,
9117                                              pf->hw.aq.asq_last_status));
9118                 }
9119                 goto exit;
9120         }
9121
9122         /* No change detected in DCBX configs */
9123         if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9124                     sizeof(tmp_dcbx_cfg))) {
9125                 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9126                 goto exit;
9127         }
9128
9129         need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9130                                                &hw->local_dcbx_config);
9131
9132         i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9133
9134         if (!need_reconfig)
9135                 goto exit;
9136
9137         /* Enable DCB tagging only when more than one TC */
9138         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9139                 pf->flags |= I40E_FLAG_DCB_ENABLED;
9140         else
9141                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9142
9143         set_bit(__I40E_PORT_SUSPENDED, pf->state);
9144         /* Reconfiguration needed quiesce all VSIs */
9145         i40e_pf_quiesce_all_vsi(pf);
9146
9147         /* Changes in configuration update VEB/VSI */
9148         i40e_dcb_reconfigure(pf);
9149
9150         ret = i40e_resume_port_tx(pf);
9151
9152         clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9153         /* In case of error no point in resuming VSIs */
9154         if (ret)
9155                 goto exit;
9156
9157         /* Wait for the PF's queues to be disabled */
9158         ret = i40e_pf_wait_queues_disabled(pf);
9159         if (ret) {
9160                 /* Schedule PF reset to recover */
9161                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9162                 i40e_service_event_schedule(pf);
9163         } else {
9164                 i40e_pf_unquiesce_all_vsi(pf);
9165                 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9166                 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9167         }
9168
9169 exit:
9170         return ret;
9171 }
9172 #endif /* CONFIG_I40E_DCB */
9173
9174 /**
9175  * i40e_do_reset_safe - Protected reset path for userland calls.
9176  * @pf: board private structure
9177  * @reset_flags: which reset is requested
9178  *
9179  **/
9180 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9181 {
9182         rtnl_lock();
9183         i40e_do_reset(pf, reset_flags, true);
9184         rtnl_unlock();
9185 }
9186
9187 /**
9188  * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9189  * @pf: board private structure
9190  * @e: event info posted on ARQ
9191  *
9192  * Handler for LAN Queue Overflow Event generated by the firmware for PF
9193  * and VF queues
9194  **/
9195 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9196                                            struct i40e_arq_event_info *e)
9197 {
9198         struct i40e_aqc_lan_overflow *data =
9199                 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9200         u32 queue = le32_to_cpu(data->prtdcb_rupto);
9201         u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9202         struct i40e_hw *hw = &pf->hw;
9203         struct i40e_vf *vf;
9204         u16 vf_id;
9205
9206         dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9207                 queue, qtx_ctl);
9208
9209         /* Queue belongs to VF, find the VF and issue VF reset */
9210         if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9211             >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9212                 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9213                          >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9214                 vf_id -= hw->func_caps.vf_base_id;
9215                 vf = &pf->vf[vf_id];
9216                 i40e_vc_notify_vf_reset(vf);
9217                 /* Allow VF to process pending reset notification */
9218                 msleep(20);
9219                 i40e_reset_vf(vf, false);
9220         }
9221 }
9222
9223 /**
9224  * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9225  * @pf: board private structure
9226  **/
9227 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9228 {
9229         u32 val, fcnt_prog;
9230
9231         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9232         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9233         return fcnt_prog;
9234 }
9235
9236 /**
9237  * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9238  * @pf: board private structure
9239  **/
9240 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9241 {
9242         u32 val, fcnt_prog;
9243
9244         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9245         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9246                     ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9247                       I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9248         return fcnt_prog;
9249 }
9250
9251 /**
9252  * i40e_get_global_fd_count - Get total FD filters programmed on device
9253  * @pf: board private structure
9254  **/
9255 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9256 {
9257         u32 val, fcnt_prog;
9258
9259         val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9260         fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9261                     ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9262                      I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9263         return fcnt_prog;
9264 }
9265
9266 /**
9267  * i40e_reenable_fdir_sb - Restore FDir SB capability
9268  * @pf: board private structure
9269  **/
9270 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9271 {
9272         if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9273                 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9274                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9275                         dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9276 }
9277
9278 /**
9279  * i40e_reenable_fdir_atr - Restore FDir ATR capability
9280  * @pf: board private structure
9281  **/
9282 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9283 {
9284         if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9285                 /* ATR uses the same filtering logic as SB rules. It only
9286                  * functions properly if the input set mask is at the default
9287                  * settings. It is safe to restore the default input set
9288                  * because there are no active TCPv4 filter rules.
9289                  */
9290                 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9291                                         I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9292                                         I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9293
9294                 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9295                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9296                         dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9297         }
9298 }
9299
9300 /**
9301  * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9302  * @pf: board private structure
9303  * @filter: FDir filter to remove
9304  */
9305 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9306                                        struct i40e_fdir_filter *filter)
9307 {
9308         /* Update counters */
9309         pf->fdir_pf_active_filters--;
9310         pf->fd_inv = 0;
9311
9312         switch (filter->flow_type) {
9313         case TCP_V4_FLOW:
9314                 pf->fd_tcp4_filter_cnt--;
9315                 break;
9316         case UDP_V4_FLOW:
9317                 pf->fd_udp4_filter_cnt--;
9318                 break;
9319         case SCTP_V4_FLOW:
9320                 pf->fd_sctp4_filter_cnt--;
9321                 break;
9322         case TCP_V6_FLOW:
9323                 pf->fd_tcp6_filter_cnt--;
9324                 break;
9325         case UDP_V6_FLOW:
9326                 pf->fd_udp6_filter_cnt--;
9327                 break;
9328         case SCTP_V6_FLOW:
9329                 pf->fd_udp6_filter_cnt--;
9330                 break;
9331         case IP_USER_FLOW:
9332                 switch (filter->ipl4_proto) {
9333                 case IPPROTO_TCP:
9334                         pf->fd_tcp4_filter_cnt--;
9335                         break;
9336                 case IPPROTO_UDP:
9337                         pf->fd_udp4_filter_cnt--;
9338                         break;
9339                 case IPPROTO_SCTP:
9340                         pf->fd_sctp4_filter_cnt--;
9341                         break;
9342                 case IPPROTO_IP:
9343                         pf->fd_ip4_filter_cnt--;
9344                         break;
9345                 }
9346                 break;
9347         case IPV6_USER_FLOW:
9348                 switch (filter->ipl4_proto) {
9349                 case IPPROTO_TCP:
9350                         pf->fd_tcp6_filter_cnt--;
9351                         break;
9352                 case IPPROTO_UDP:
9353                         pf->fd_udp6_filter_cnt--;
9354                         break;
9355                 case IPPROTO_SCTP:
9356                         pf->fd_sctp6_filter_cnt--;
9357                         break;
9358                 case IPPROTO_IP:
9359                         pf->fd_ip6_filter_cnt--;
9360                         break;
9361                 }
9362                 break;
9363         }
9364
9365         /* Remove the filter from the list and free memory */
9366         hlist_del(&filter->fdir_node);
9367         kfree(filter);
9368 }
9369
9370 /**
9371  * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9372  * @pf: board private structure
9373  **/
9374 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9375 {
9376         struct i40e_fdir_filter *filter;
9377         u32 fcnt_prog, fcnt_avail;
9378         struct hlist_node *node;
9379
9380         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9381                 return;
9382
9383         /* Check if we have enough room to re-enable FDir SB capability. */
9384         fcnt_prog = i40e_get_global_fd_count(pf);
9385         fcnt_avail = pf->fdir_pf_filter_count;
9386         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9387             (pf->fd_add_err == 0) ||
9388             (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9389                 i40e_reenable_fdir_sb(pf);
9390
9391         /* We should wait for even more space before re-enabling ATR.
9392          * Additionally, we cannot enable ATR as long as we still have TCP SB
9393          * rules active.
9394          */
9395         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9396             pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9397                 i40e_reenable_fdir_atr(pf);
9398
9399         /* if hw had a problem adding a filter, delete it */
9400         if (pf->fd_inv > 0) {
9401                 hlist_for_each_entry_safe(filter, node,
9402                                           &pf->fdir_filter_list, fdir_node)
9403                         if (filter->fd_id == pf->fd_inv)
9404                                 i40e_delete_invalid_filter(pf, filter);
9405         }
9406 }
9407
9408 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9409 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9410 /**
9411  * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9412  * @pf: board private structure
9413  **/
9414 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9415 {
9416         unsigned long min_flush_time;
9417         int flush_wait_retry = 50;
9418         bool disable_atr = false;
9419         int fd_room;
9420         int reg;
9421
9422         if (!time_after(jiffies, pf->fd_flush_timestamp +
9423                                  (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9424                 return;
9425
9426         /* If the flush is happening too quick and we have mostly SB rules we
9427          * should not re-enable ATR for some time.
9428          */
9429         min_flush_time = pf->fd_flush_timestamp +
9430                          (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9431         fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9432
9433         if (!(time_after(jiffies, min_flush_time)) &&
9434             (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9435                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9436                         dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9437                 disable_atr = true;
9438         }
9439
9440         pf->fd_flush_timestamp = jiffies;
9441         set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9442         /* flush all filters */
9443         wr32(&pf->hw, I40E_PFQF_CTL_1,
9444              I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9445         i40e_flush(&pf->hw);
9446         pf->fd_flush_cnt++;
9447         pf->fd_add_err = 0;
9448         do {
9449                 /* Check FD flush status every 5-6msec */
9450                 usleep_range(5000, 6000);
9451                 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9452                 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9453                         break;
9454         } while (flush_wait_retry--);
9455         if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9456                 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9457         } else {
9458                 /* replay sideband filters */
9459                 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9460                 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9461                         clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9462                 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9463                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9464                         dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9465         }
9466 }
9467
9468 /**
9469  * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
9470  * @pf: board private structure
9471  **/
9472 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9473 {
9474         return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9475 }
9476
9477 /**
9478  * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9479  * @pf: board private structure
9480  **/
9481 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9482 {
9483
9484         /* if interface is down do nothing */
9485         if (test_bit(__I40E_DOWN, pf->state))
9486                 return;
9487
9488         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9489                 i40e_fdir_flush_and_replay(pf);
9490
9491         i40e_fdir_check_and_reenable(pf);
9492
9493 }
9494
9495 /**
9496  * i40e_vsi_link_event - notify VSI of a link event
9497  * @vsi: vsi to be notified
9498  * @link_up: link up or down
9499  **/
9500 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9501 {
9502         if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9503                 return;
9504
9505         switch (vsi->type) {
9506         case I40E_VSI_MAIN:
9507                 if (!vsi->netdev || !vsi->netdev_registered)
9508                         break;
9509
9510                 if (link_up) {
9511                         netif_carrier_on(vsi->netdev);
9512                         netif_tx_wake_all_queues(vsi->netdev);
9513                 } else {
9514                         netif_carrier_off(vsi->netdev);
9515                         netif_tx_stop_all_queues(vsi->netdev);
9516                 }
9517                 break;
9518
9519         case I40E_VSI_SRIOV:
9520         case I40E_VSI_VMDQ2:
9521         case I40E_VSI_CTRL:
9522         case I40E_VSI_IWARP:
9523         case I40E_VSI_MIRROR:
9524         default:
9525                 /* there is no notification for other VSIs */
9526                 break;
9527         }
9528 }
9529
9530 /**
9531  * i40e_veb_link_event - notify elements on the veb of a link event
9532  * @veb: veb to be notified
9533  * @link_up: link up or down
9534  **/
9535 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9536 {
9537         struct i40e_pf *pf;
9538         int i;
9539
9540         if (!veb || !veb->pf)
9541                 return;
9542         pf = veb->pf;
9543
9544         /* depth first... */
9545         for (i = 0; i < I40E_MAX_VEB; i++)
9546                 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9547                         i40e_veb_link_event(pf->veb[i], link_up);
9548
9549         /* ... now the local VSIs */
9550         for (i = 0; i < pf->num_alloc_vsi; i++)
9551                 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9552                         i40e_vsi_link_event(pf->vsi[i], link_up);
9553 }
9554
9555 /**
9556  * i40e_link_event - Update netif_carrier status
9557  * @pf: board private structure
9558  **/
9559 static void i40e_link_event(struct i40e_pf *pf)
9560 {
9561         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9562         u8 new_link_speed, old_link_speed;
9563         i40e_status status;
9564         bool new_link, old_link;
9565 #ifdef CONFIG_I40E_DCB
9566         int err;
9567 #endif /* CONFIG_I40E_DCB */
9568
9569         /* set this to force the get_link_status call to refresh state */
9570         pf->hw.phy.get_link_info = true;
9571         old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9572         status = i40e_get_link_status(&pf->hw, &new_link);
9573
9574         /* On success, disable temp link polling */
9575         if (status == I40E_SUCCESS) {
9576                 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9577         } else {
9578                 /* Enable link polling temporarily until i40e_get_link_status
9579                  * returns I40E_SUCCESS
9580                  */
9581                 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9582                 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9583                         status);
9584                 return;
9585         }
9586
9587         old_link_speed = pf->hw.phy.link_info_old.link_speed;
9588         new_link_speed = pf->hw.phy.link_info.link_speed;
9589
9590         if (new_link == old_link &&
9591             new_link_speed == old_link_speed &&
9592             (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9593              new_link == netif_carrier_ok(vsi->netdev)))
9594                 return;
9595
9596         i40e_print_link_message(vsi, new_link);
9597
9598         /* Notify the base of the switch tree connected to
9599          * the link.  Floating VEBs are not notified.
9600          */
9601         if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9602                 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9603         else
9604                 i40e_vsi_link_event(vsi, new_link);
9605
9606         if (pf->vf)
9607                 i40e_vc_notify_link_state(pf);
9608
9609         if (pf->flags & I40E_FLAG_PTP)
9610                 i40e_ptp_set_increment(pf);
9611 #ifdef CONFIG_I40E_DCB
9612         if (new_link == old_link)
9613                 return;
9614         /* Not SW DCB so firmware will take care of default settings */
9615         if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9616                 return;
9617
9618         /* We cover here only link down, as after link up in case of SW DCB
9619          * SW LLDP agent will take care of setting it up
9620          */
9621         if (!new_link) {
9622                 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9623                 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9624                 err = i40e_dcb_sw_default_config(pf);
9625                 if (err) {
9626                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9627                                        I40E_FLAG_DCB_ENABLED);
9628                 } else {
9629                         pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9630                                        DCB_CAP_DCBX_VER_IEEE;
9631                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
9632                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9633                 }
9634         }
9635 #endif /* CONFIG_I40E_DCB */
9636 }
9637
9638 /**
9639  * i40e_watchdog_subtask - periodic checks not using event driven response
9640  * @pf: board private structure
9641  **/
9642 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9643 {
9644         int i;
9645
9646         /* if interface is down do nothing */
9647         if (test_bit(__I40E_DOWN, pf->state) ||
9648             test_bit(__I40E_CONFIG_BUSY, pf->state))
9649                 return;
9650
9651         /* make sure we don't do these things too often */
9652         if (time_before(jiffies, (pf->service_timer_previous +
9653                                   pf->service_timer_period)))
9654                 return;
9655         pf->service_timer_previous = jiffies;
9656
9657         if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9658             test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9659                 i40e_link_event(pf);
9660
9661         /* Update the stats for active netdevs so the network stack
9662          * can look at updated numbers whenever it cares to
9663          */
9664         for (i = 0; i < pf->num_alloc_vsi; i++)
9665                 if (pf->vsi[i] && pf->vsi[i]->netdev)
9666                         i40e_update_stats(pf->vsi[i]);
9667
9668         if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9669                 /* Update the stats for the active switching components */
9670                 for (i = 0; i < I40E_MAX_VEB; i++)
9671                         if (pf->veb[i])
9672                                 i40e_update_veb_stats(pf->veb[i]);
9673         }
9674
9675         i40e_ptp_rx_hang(pf);
9676         i40e_ptp_tx_hang(pf);
9677 }
9678
9679 /**
9680  * i40e_reset_subtask - Set up for resetting the device and driver
9681  * @pf: board private structure
9682  **/
9683 static void i40e_reset_subtask(struct i40e_pf *pf)
9684 {
9685         u32 reset_flags = 0;
9686
9687         if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9688                 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9689                 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9690         }
9691         if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9692                 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9693                 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9694         }
9695         if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9696                 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9697                 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9698         }
9699         if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9700                 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9701                 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9702         }
9703         if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9704                 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9705                 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9706         }
9707
9708         /* If there's a recovery already waiting, it takes
9709          * precedence before starting a new reset sequence.
9710          */
9711         if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9712                 i40e_prep_for_reset(pf);
9713                 i40e_reset(pf);
9714                 i40e_rebuild(pf, false, false);
9715         }
9716
9717         /* If we're already down or resetting, just bail */
9718         if (reset_flags &&
9719             !test_bit(__I40E_DOWN, pf->state) &&
9720             !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9721                 i40e_do_reset(pf, reset_flags, false);
9722         }
9723 }
9724
9725 /**
9726  * i40e_handle_link_event - Handle link event
9727  * @pf: board private structure
9728  * @e: event info posted on ARQ
9729  **/
9730 static void i40e_handle_link_event(struct i40e_pf *pf,
9731                                    struct i40e_arq_event_info *e)
9732 {
9733         struct i40e_aqc_get_link_status *status =
9734                 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9735
9736         /* Do a new status request to re-enable LSE reporting
9737          * and load new status information into the hw struct
9738          * This completely ignores any state information
9739          * in the ARQ event info, instead choosing to always
9740          * issue the AQ update link status command.
9741          */
9742         i40e_link_event(pf);
9743
9744         /* Check if module meets thermal requirements */
9745         if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9746                 dev_err(&pf->pdev->dev,
9747                         "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9748                 dev_err(&pf->pdev->dev,
9749                         "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9750         } else {
9751                 /* check for unqualified module, if link is down, suppress
9752                  * the message if link was forced to be down.
9753                  */
9754                 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9755                     (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9756                     (!(status->link_info & I40E_AQ_LINK_UP)) &&
9757                     (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9758                         dev_err(&pf->pdev->dev,
9759                                 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9760                         dev_err(&pf->pdev->dev,
9761                                 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9762                 }
9763         }
9764 }
9765
9766 /**
9767  * i40e_clean_adminq_subtask - Clean the AdminQ rings
9768  * @pf: board private structure
9769  **/
9770 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9771 {
9772         struct i40e_arq_event_info event;
9773         struct i40e_hw *hw = &pf->hw;
9774         u16 pending, i = 0;
9775         i40e_status ret;
9776         u16 opcode;
9777         u32 oldval;
9778         u32 val;
9779
9780         /* Do not run clean AQ when PF reset fails */
9781         if (test_bit(__I40E_RESET_FAILED, pf->state))
9782                 return;
9783
9784         /* check for error indications */
9785         val = rd32(&pf->hw, pf->hw.aq.arq.len);
9786         oldval = val;
9787         if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9788                 if (hw->debug_mask & I40E_DEBUG_AQ)
9789                         dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9790                 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9791         }
9792         if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9793                 if (hw->debug_mask & I40E_DEBUG_AQ)
9794                         dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9795                 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9796                 pf->arq_overflows++;
9797         }
9798         if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9799                 if (hw->debug_mask & I40E_DEBUG_AQ)
9800                         dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9801                 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9802         }
9803         if (oldval != val)
9804                 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9805
9806         val = rd32(&pf->hw, pf->hw.aq.asq.len);
9807         oldval = val;
9808         if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9809                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9810                         dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9811                 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9812         }
9813         if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9814                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9815                         dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9816                 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9817         }
9818         if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9819                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9820                         dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9821                 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
9822         }
9823         if (oldval != val)
9824                 wr32(&pf->hw, pf->hw.aq.asq.len, val);
9825
9826         event.buf_len = I40E_MAX_AQ_BUF_SIZE;
9827         event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
9828         if (!event.msg_buf)
9829                 return;
9830
9831         do {
9832                 ret = i40e_clean_arq_element(hw, &event, &pending);
9833                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
9834                         break;
9835                 else if (ret) {
9836                         dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
9837                         break;
9838                 }
9839
9840                 opcode = le16_to_cpu(event.desc.opcode);
9841                 switch (opcode) {
9842
9843                 case i40e_aqc_opc_get_link_status:
9844                         rtnl_lock();
9845                         i40e_handle_link_event(pf, &event);
9846                         rtnl_unlock();
9847                         break;
9848                 case i40e_aqc_opc_send_msg_to_pf:
9849                         ret = i40e_vc_process_vf_msg(pf,
9850                                         le16_to_cpu(event.desc.retval),
9851                                         le32_to_cpu(event.desc.cookie_high),
9852                                         le32_to_cpu(event.desc.cookie_low),
9853                                         event.msg_buf,
9854                                         event.msg_len);
9855                         break;
9856                 case i40e_aqc_opc_lldp_update_mib:
9857                         dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
9858 #ifdef CONFIG_I40E_DCB
9859                         rtnl_lock();
9860                         i40e_handle_lldp_event(pf, &event);
9861                         rtnl_unlock();
9862 #endif /* CONFIG_I40E_DCB */
9863                         break;
9864                 case i40e_aqc_opc_event_lan_overflow:
9865                         dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
9866                         i40e_handle_lan_overflow_event(pf, &event);
9867                         break;
9868                 case i40e_aqc_opc_send_msg_to_peer:
9869                         dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
9870                         break;
9871                 case i40e_aqc_opc_nvm_erase:
9872                 case i40e_aqc_opc_nvm_update:
9873                 case i40e_aqc_opc_oem_post_update:
9874                         i40e_debug(&pf->hw, I40E_DEBUG_NVM,
9875                                    "ARQ NVM operation 0x%04x completed\n",
9876                                    opcode);
9877                         break;
9878                 default:
9879                         dev_info(&pf->pdev->dev,
9880                                  "ARQ: Unknown event 0x%04x ignored\n",
9881                                  opcode);
9882                         break;
9883                 }
9884         } while (i++ < pf->adminq_work_limit);
9885
9886         if (i < pf->adminq_work_limit)
9887                 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
9888
9889         /* re-enable Admin queue interrupt cause */
9890         val = rd32(hw, I40E_PFINT_ICR0_ENA);
9891         val |=  I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
9892         wr32(hw, I40E_PFINT_ICR0_ENA, val);
9893         i40e_flush(hw);
9894
9895         kfree(event.msg_buf);
9896 }
9897
9898 /**
9899  * i40e_verify_eeprom - make sure eeprom is good to use
9900  * @pf: board private structure
9901  **/
9902 static void i40e_verify_eeprom(struct i40e_pf *pf)
9903 {
9904         int err;
9905
9906         err = i40e_diag_eeprom_test(&pf->hw);
9907         if (err) {
9908                 /* retry in case of garbage read */
9909                 err = i40e_diag_eeprom_test(&pf->hw);
9910                 if (err) {
9911                         dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
9912                                  err);
9913                         set_bit(__I40E_BAD_EEPROM, pf->state);
9914                 }
9915         }
9916
9917         if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
9918                 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
9919                 clear_bit(__I40E_BAD_EEPROM, pf->state);
9920         }
9921 }
9922
9923 /**
9924  * i40e_enable_pf_switch_lb
9925  * @pf: pointer to the PF structure
9926  *
9927  * enable switch loop back or die - no point in a return value
9928  **/
9929 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
9930 {
9931         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9932         struct i40e_vsi_context ctxt;
9933         int ret;
9934
9935         ctxt.seid = pf->main_vsi_seid;
9936         ctxt.pf_num = pf->hw.pf_id;
9937         ctxt.vf_num = 0;
9938         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9939         if (ret) {
9940                 dev_info(&pf->pdev->dev,
9941                          "couldn't get PF vsi config, err %s aq_err %s\n",
9942                          i40e_stat_str(&pf->hw, ret),
9943                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9944                 return;
9945         }
9946         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9947         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9948         ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9949
9950         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9951         if (ret) {
9952                 dev_info(&pf->pdev->dev,
9953                          "update vsi switch failed, err %s aq_err %s\n",
9954                          i40e_stat_str(&pf->hw, ret),
9955                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9956         }
9957 }
9958
9959 /**
9960  * i40e_disable_pf_switch_lb
9961  * @pf: pointer to the PF structure
9962  *
9963  * disable switch loop back or die - no point in a return value
9964  **/
9965 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
9966 {
9967         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9968         struct i40e_vsi_context ctxt;
9969         int ret;
9970
9971         ctxt.seid = pf->main_vsi_seid;
9972         ctxt.pf_num = pf->hw.pf_id;
9973         ctxt.vf_num = 0;
9974         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9975         if (ret) {
9976                 dev_info(&pf->pdev->dev,
9977                          "couldn't get PF vsi config, err %s aq_err %s\n",
9978                          i40e_stat_str(&pf->hw, ret),
9979                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9980                 return;
9981         }
9982         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9983         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9984         ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9985
9986         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9987         if (ret) {
9988                 dev_info(&pf->pdev->dev,
9989                          "update vsi switch failed, err %s aq_err %s\n",
9990                          i40e_stat_str(&pf->hw, ret),
9991                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9992         }
9993 }
9994
9995 /**
9996  * i40e_config_bridge_mode - Configure the HW bridge mode
9997  * @veb: pointer to the bridge instance
9998  *
9999  * Configure the loop back mode for the LAN VSI that is downlink to the
10000  * specified HW bridge instance. It is expected this function is called
10001  * when a new HW bridge is instantiated.
10002  **/
10003 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10004 {
10005         struct i40e_pf *pf = veb->pf;
10006
10007         if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10008                 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10009                          veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10010         if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10011                 i40e_disable_pf_switch_lb(pf);
10012         else
10013                 i40e_enable_pf_switch_lb(pf);
10014 }
10015
10016 /**
10017  * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10018  * @veb: pointer to the VEB instance
10019  *
10020  * This is a recursive function that first builds the attached VSIs then
10021  * recurses in to build the next layer of VEB.  We track the connections
10022  * through our own index numbers because the seid's from the HW could
10023  * change across the reset.
10024  **/
10025 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10026 {
10027         struct i40e_vsi *ctl_vsi = NULL;
10028         struct i40e_pf *pf = veb->pf;
10029         int v, veb_idx;
10030         int ret;
10031
10032         /* build VSI that owns this VEB, temporarily attached to base VEB */
10033         for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10034                 if (pf->vsi[v] &&
10035                     pf->vsi[v]->veb_idx == veb->idx &&
10036                     pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10037                         ctl_vsi = pf->vsi[v];
10038                         break;
10039                 }
10040         }
10041         if (!ctl_vsi) {
10042                 dev_info(&pf->pdev->dev,
10043                          "missing owner VSI for veb_idx %d\n", veb->idx);
10044                 ret = -ENOENT;
10045                 goto end_reconstitute;
10046         }
10047         if (ctl_vsi != pf->vsi[pf->lan_vsi])
10048                 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10049         ret = i40e_add_vsi(ctl_vsi);
10050         if (ret) {
10051                 dev_info(&pf->pdev->dev,
10052                          "rebuild of veb_idx %d owner VSI failed: %d\n",
10053                          veb->idx, ret);
10054                 goto end_reconstitute;
10055         }
10056         i40e_vsi_reset_stats(ctl_vsi);
10057
10058         /* create the VEB in the switch and move the VSI onto the VEB */
10059         ret = i40e_add_veb(veb, ctl_vsi);
10060         if (ret)
10061                 goto end_reconstitute;
10062
10063         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10064                 veb->bridge_mode = BRIDGE_MODE_VEB;
10065         else
10066                 veb->bridge_mode = BRIDGE_MODE_VEPA;
10067         i40e_config_bridge_mode(veb);
10068
10069         /* create the remaining VSIs attached to this VEB */
10070         for (v = 0; v < pf->num_alloc_vsi; v++) {
10071                 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10072                         continue;
10073
10074                 if (pf->vsi[v]->veb_idx == veb->idx) {
10075                         struct i40e_vsi *vsi = pf->vsi[v];
10076
10077                         vsi->uplink_seid = veb->seid;
10078                         ret = i40e_add_vsi(vsi);
10079                         if (ret) {
10080                                 dev_info(&pf->pdev->dev,
10081                                          "rebuild of vsi_idx %d failed: %d\n",
10082                                          v, ret);
10083                                 goto end_reconstitute;
10084                         }
10085                         i40e_vsi_reset_stats(vsi);
10086                 }
10087         }
10088
10089         /* create any VEBs attached to this VEB - RECURSION */
10090         for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10091                 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10092                         pf->veb[veb_idx]->uplink_seid = veb->seid;
10093                         ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10094                         if (ret)
10095                                 break;
10096                 }
10097         }
10098
10099 end_reconstitute:
10100         return ret;
10101 }
10102
10103 /**
10104  * i40e_get_capabilities - get info about the HW
10105  * @pf: the PF struct
10106  * @list_type: AQ capability to be queried
10107  **/
10108 static int i40e_get_capabilities(struct i40e_pf *pf,
10109                                  enum i40e_admin_queue_opc list_type)
10110 {
10111         struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10112         u16 data_size;
10113         int buf_len;
10114         int err;
10115
10116         buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10117         do {
10118                 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10119                 if (!cap_buf)
10120                         return -ENOMEM;
10121
10122                 /* this loads the data into the hw struct for us */
10123                 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10124                                                     &data_size, list_type,
10125                                                     NULL);
10126                 /* data loaded, buffer no longer needed */
10127                 kfree(cap_buf);
10128
10129                 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10130                         /* retry with a larger buffer */
10131                         buf_len = data_size;
10132                 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
10133                         dev_info(&pf->pdev->dev,
10134                                  "capability discovery failed, err %s aq_err %s\n",
10135                                  i40e_stat_str(&pf->hw, err),
10136                                  i40e_aq_str(&pf->hw,
10137                                              pf->hw.aq.asq_last_status));
10138                         return -ENODEV;
10139                 }
10140         } while (err);
10141
10142         if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10143                 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10144                         dev_info(&pf->pdev->dev,
10145                                  "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10146                                  pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10147                                  pf->hw.func_caps.num_msix_vectors,
10148                                  pf->hw.func_caps.num_msix_vectors_vf,
10149                                  pf->hw.func_caps.fd_filters_guaranteed,
10150                                  pf->hw.func_caps.fd_filters_best_effort,
10151                                  pf->hw.func_caps.num_tx_qp,
10152                                  pf->hw.func_caps.num_vsis);
10153                 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10154                         dev_info(&pf->pdev->dev,
10155                                  "switch_mode=0x%04x, function_valid=0x%08x\n",
10156                                  pf->hw.dev_caps.switch_mode,
10157                                  pf->hw.dev_caps.valid_functions);
10158                         dev_info(&pf->pdev->dev,
10159                                  "SR-IOV=%d, num_vfs for all function=%u\n",
10160                                  pf->hw.dev_caps.sr_iov_1_1,
10161                                  pf->hw.dev_caps.num_vfs);
10162                         dev_info(&pf->pdev->dev,
10163                                  "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10164                                  pf->hw.dev_caps.num_vsis,
10165                                  pf->hw.dev_caps.num_rx_qp,
10166                                  pf->hw.dev_caps.num_tx_qp);
10167                 }
10168         }
10169         if (list_type == i40e_aqc_opc_list_func_capabilities) {
10170 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10171                        + pf->hw.func_caps.num_vfs)
10172                 if (pf->hw.revision_id == 0 &&
10173                     pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10174                         dev_info(&pf->pdev->dev,
10175                                  "got num_vsis %d, setting num_vsis to %d\n",
10176                                  pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10177                         pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10178                 }
10179         }
10180         return 0;
10181 }
10182
10183 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10184
10185 /**
10186  * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10187  * @pf: board private structure
10188  **/
10189 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10190 {
10191         struct i40e_vsi *vsi;
10192
10193         /* quick workaround for an NVM issue that leaves a critical register
10194          * uninitialized
10195          */
10196         if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10197                 static const u32 hkey[] = {
10198                         0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10199                         0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10200                         0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10201                         0x95b3a76d};
10202                 int i;
10203
10204                 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10205                         wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10206         }
10207
10208         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10209                 return;
10210
10211         /* find existing VSI and see if it needs configuring */
10212         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10213
10214         /* create a new VSI if none exists */
10215         if (!vsi) {
10216                 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10217                                      pf->vsi[pf->lan_vsi]->seid, 0);
10218                 if (!vsi) {
10219                         dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10220                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10221                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10222                         return;
10223                 }
10224         }
10225
10226         i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10227 }
10228
10229 /**
10230  * i40e_fdir_teardown - release the Flow Director resources
10231  * @pf: board private structure
10232  **/
10233 static void i40e_fdir_teardown(struct i40e_pf *pf)
10234 {
10235         struct i40e_vsi *vsi;
10236
10237         i40e_fdir_filter_exit(pf);
10238         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10239         if (vsi)
10240                 i40e_vsi_release(vsi);
10241 }
10242
10243 /**
10244  * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10245  * @vsi: PF main vsi
10246  * @seid: seid of main or channel VSIs
10247  *
10248  * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10249  * existed before reset
10250  **/
10251 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10252 {
10253         struct i40e_cloud_filter *cfilter;
10254         struct i40e_pf *pf = vsi->back;
10255         struct hlist_node *node;
10256         i40e_status ret;
10257
10258         /* Add cloud filters back if they exist */
10259         hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10260                                   cloud_node) {
10261                 if (cfilter->seid != seid)
10262                         continue;
10263
10264                 if (cfilter->dst_port)
10265                         ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10266                                                                 true);
10267                 else
10268                         ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10269
10270                 if (ret) {
10271                         dev_dbg(&pf->pdev->dev,
10272                                 "Failed to rebuild cloud filter, err %s aq_err %s\n",
10273                                 i40e_stat_str(&pf->hw, ret),
10274                                 i40e_aq_str(&pf->hw,
10275                                             pf->hw.aq.asq_last_status));
10276                         return ret;
10277                 }
10278         }
10279         return 0;
10280 }
10281
10282 /**
10283  * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10284  * @vsi: PF main vsi
10285  *
10286  * Rebuilds channel VSIs if they existed before reset
10287  **/
10288 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10289 {
10290         struct i40e_channel *ch, *ch_tmp;
10291         i40e_status ret;
10292
10293         if (list_empty(&vsi->ch_list))
10294                 return 0;
10295
10296         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10297                 if (!ch->initialized)
10298                         break;
10299                 /* Proceed with creation of channel (VMDq2) VSI */
10300                 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10301                 if (ret) {
10302                         dev_info(&vsi->back->pdev->dev,
10303                                  "failed to rebuild channels using uplink_seid %u\n",
10304                                  vsi->uplink_seid);
10305                         return ret;
10306                 }
10307                 /* Reconfigure TX queues using QTX_CTL register */
10308                 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10309                 if (ret) {
10310                         dev_info(&vsi->back->pdev->dev,
10311                                  "failed to configure TX rings for channel %u\n",
10312                                  ch->seid);
10313                         return ret;
10314                 }
10315                 /* update 'next_base_queue' */
10316                 vsi->next_base_queue = vsi->next_base_queue +
10317                                                         ch->num_queue_pairs;
10318                 if (ch->max_tx_rate) {
10319                         u64 credits = ch->max_tx_rate;
10320
10321                         if (i40e_set_bw_limit(vsi, ch->seid,
10322                                               ch->max_tx_rate))
10323                                 return -EINVAL;
10324
10325                         do_div(credits, I40E_BW_CREDIT_DIVISOR);
10326                         dev_dbg(&vsi->back->pdev->dev,
10327                                 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10328                                 ch->max_tx_rate,
10329                                 credits,
10330                                 ch->seid);
10331                 }
10332                 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10333                 if (ret) {
10334                         dev_dbg(&vsi->back->pdev->dev,
10335                                 "Failed to rebuild cloud filters for channel VSI %u\n",
10336                                 ch->seid);
10337                         return ret;
10338                 }
10339         }
10340         return 0;
10341 }
10342
10343 /**
10344  * i40e_prep_for_reset - prep for the core to reset
10345  * @pf: board private structure
10346  *
10347  * Close up the VFs and other things in prep for PF Reset.
10348   **/
10349 static void i40e_prep_for_reset(struct i40e_pf *pf)
10350 {
10351         struct i40e_hw *hw = &pf->hw;
10352         i40e_status ret = 0;
10353         u32 v;
10354
10355         clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10356         if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10357                 return;
10358         if (i40e_check_asq_alive(&pf->hw))
10359                 i40e_vc_notify_reset(pf);
10360
10361         dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10362
10363         /* quiesce the VSIs and their queues that are not already DOWN */
10364         i40e_pf_quiesce_all_vsi(pf);
10365
10366         for (v = 0; v < pf->num_alloc_vsi; v++) {
10367                 if (pf->vsi[v])
10368                         pf->vsi[v]->seid = 0;
10369         }
10370
10371         i40e_shutdown_adminq(&pf->hw);
10372
10373         /* call shutdown HMC */
10374         if (hw->hmc.hmc_obj) {
10375                 ret = i40e_shutdown_lan_hmc(hw);
10376                 if (ret)
10377                         dev_warn(&pf->pdev->dev,
10378                                  "shutdown_lan_hmc failed: %d\n", ret);
10379         }
10380
10381         /* Save the current PTP time so that we can restore the time after the
10382          * reset completes.
10383          */
10384         i40e_ptp_save_hw_time(pf);
10385 }
10386
10387 /**
10388  * i40e_send_version - update firmware with driver version
10389  * @pf: PF struct
10390  */
10391 static void i40e_send_version(struct i40e_pf *pf)
10392 {
10393         struct i40e_driver_version dv;
10394
10395         dv.major_version = 0xff;
10396         dv.minor_version = 0xff;
10397         dv.build_version = 0xff;
10398         dv.subbuild_version = 0;
10399         strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10400         i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10401 }
10402
10403 /**
10404  * i40e_get_oem_version - get OEM specific version information
10405  * @hw: pointer to the hardware structure
10406  **/
10407 static void i40e_get_oem_version(struct i40e_hw *hw)
10408 {
10409         u16 block_offset = 0xffff;
10410         u16 block_length = 0;
10411         u16 capabilities = 0;
10412         u16 gen_snap = 0;
10413         u16 release = 0;
10414
10415 #define I40E_SR_NVM_OEM_VERSION_PTR             0x1B
10416 #define I40E_NVM_OEM_LENGTH_OFFSET              0x00
10417 #define I40E_NVM_OEM_CAPABILITIES_OFFSET        0x01
10418 #define I40E_NVM_OEM_GEN_OFFSET                 0x02
10419 #define I40E_NVM_OEM_RELEASE_OFFSET             0x03
10420 #define I40E_NVM_OEM_CAPABILITIES_MASK          0x000F
10421 #define I40E_NVM_OEM_LENGTH                     3
10422
10423         /* Check if pointer to OEM version block is valid. */
10424         i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10425         if (block_offset == 0xffff)
10426                 return;
10427
10428         /* Check if OEM version block has correct length. */
10429         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10430                            &block_length);
10431         if (block_length < I40E_NVM_OEM_LENGTH)
10432                 return;
10433
10434         /* Check if OEM version format is as expected. */
10435         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10436                            &capabilities);
10437         if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10438                 return;
10439
10440         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10441                            &gen_snap);
10442         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10443                            &release);
10444         hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10445         hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10446 }
10447
10448 /**
10449  * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10450  * @pf: board private structure
10451  **/
10452 static int i40e_reset(struct i40e_pf *pf)
10453 {
10454         struct i40e_hw *hw = &pf->hw;
10455         i40e_status ret;
10456
10457         ret = i40e_pf_reset(hw);
10458         if (ret) {
10459                 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10460                 set_bit(__I40E_RESET_FAILED, pf->state);
10461                 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10462         } else {
10463                 pf->pfr_count++;
10464         }
10465         return ret;
10466 }
10467
10468 /**
10469  * i40e_rebuild - rebuild using a saved config
10470  * @pf: board private structure
10471  * @reinit: if the Main VSI needs to re-initialized.
10472  * @lock_acquired: indicates whether or not the lock has been acquired
10473  * before this function was called.
10474  **/
10475 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10476 {
10477         int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
10478         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10479         struct i40e_hw *hw = &pf->hw;
10480         i40e_status ret;
10481         u32 val;
10482         int v;
10483
10484         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10485             i40e_check_recovery_mode(pf)) {
10486                 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10487         }
10488
10489         if (test_bit(__I40E_DOWN, pf->state) &&
10490             !test_bit(__I40E_RECOVERY_MODE, pf->state) &&
10491             !old_recovery_mode_bit)
10492                 goto clear_recovery;
10493         dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10494
10495         /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10496         ret = i40e_init_adminq(&pf->hw);
10497         if (ret) {
10498                 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
10499                          i40e_stat_str(&pf->hw, ret),
10500                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10501                 goto clear_recovery;
10502         }
10503         i40e_get_oem_version(&pf->hw);
10504
10505         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10506             ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
10507              hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
10508                 /* The following delay is necessary for 4.33 firmware and older
10509                  * to recover after EMP reset. 200 ms should suffice but we
10510                  * put here 300 ms to be sure that FW is ready to operate
10511                  * after reset.
10512                  */
10513                 mdelay(300);
10514         }
10515
10516         /* re-verify the eeprom if we just had an EMP reset */
10517         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10518                 i40e_verify_eeprom(pf);
10519
10520         /* if we are going out of or into recovery mode we have to act
10521          * accordingly with regard to resources initialization
10522          * and deinitialization
10523          */
10524         if (test_bit(__I40E_RECOVERY_MODE, pf->state) ||
10525             old_recovery_mode_bit) {
10526                 if (i40e_get_capabilities(pf,
10527                                           i40e_aqc_opc_list_func_capabilities))
10528                         goto end_unlock;
10529
10530                 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10531                         /* we're staying in recovery mode so we'll reinitialize
10532                          * misc vector here
10533                          */
10534                         if (i40e_setup_misc_vector_for_recovery_mode(pf))
10535                                 goto end_unlock;
10536                 } else {
10537                         if (!lock_acquired)
10538                                 rtnl_lock();
10539                         /* we're going out of recovery mode so we'll free
10540                          * the IRQ allocated specifically for recovery mode
10541                          * and restore the interrupt scheme
10542                          */
10543                         free_irq(pf->pdev->irq, pf);
10544                         i40e_clear_interrupt_scheme(pf);
10545                         if (i40e_restore_interrupt_scheme(pf))
10546                                 goto end_unlock;
10547                 }
10548
10549                 /* tell the firmware that we're starting */
10550                 i40e_send_version(pf);
10551
10552                 /* bail out in case recovery mode was detected, as there is
10553                  * no need for further configuration.
10554                  */
10555                 goto end_unlock;
10556         }
10557
10558         i40e_clear_pxe_mode(hw);
10559         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10560         if (ret)
10561                 goto end_core_reset;
10562
10563         ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10564                                 hw->func_caps.num_rx_qp, 0, 0);
10565         if (ret) {
10566                 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10567                 goto end_core_reset;
10568         }
10569         ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10570         if (ret) {
10571                 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10572                 goto end_core_reset;
10573         }
10574
10575 #ifdef CONFIG_I40E_DCB
10576         /* Enable FW to write a default DCB config on link-up
10577          * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10578          * is not supported with new link speed
10579          */
10580         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
10581                 i40e_aq_set_dcb_parameters(hw, false, NULL);
10582         } else {
10583                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10584                     (hw->phy.link_info.link_speed &
10585                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10586                         i40e_aq_set_dcb_parameters(hw, false, NULL);
10587                         dev_warn(&pf->pdev->dev,
10588                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10589                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10590                 } else {
10591                         i40e_aq_set_dcb_parameters(hw, true, NULL);
10592                         ret = i40e_init_pf_dcb(pf);
10593                         if (ret) {
10594                                 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10595                                          ret);
10596                                 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10597                                 /* Continue without DCB enabled */
10598                         }
10599                 }
10600         }
10601
10602 #endif /* CONFIG_I40E_DCB */
10603         if (!lock_acquired)
10604                 rtnl_lock();
10605         ret = i40e_setup_pf_switch(pf, reinit);
10606         if (ret)
10607                 goto end_unlock;
10608
10609         /* The driver only wants link up/down and module qualification
10610          * reports from firmware.  Note the negative logic.
10611          */
10612         ret = i40e_aq_set_phy_int_mask(&pf->hw,
10613                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
10614                                          I40E_AQ_EVENT_MEDIA_NA |
10615                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10616         if (ret)
10617                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10618                          i40e_stat_str(&pf->hw, ret),
10619                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10620
10621         /* Rebuild the VSIs and VEBs that existed before reset.
10622          * They are still in our local switch element arrays, so only
10623          * need to rebuild the switch model in the HW.
10624          *
10625          * If there were VEBs but the reconstitution failed, we'll try
10626          * try to recover minimal use by getting the basic PF VSI working.
10627          */
10628         if (vsi->uplink_seid != pf->mac_seid) {
10629                 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10630                 /* find the one VEB connected to the MAC, and find orphans */
10631                 for (v = 0; v < I40E_MAX_VEB; v++) {
10632                         if (!pf->veb[v])
10633                                 continue;
10634
10635                         if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10636                             pf->veb[v]->uplink_seid == 0) {
10637                                 ret = i40e_reconstitute_veb(pf->veb[v]);
10638
10639                                 if (!ret)
10640                                         continue;
10641
10642                                 /* If Main VEB failed, we're in deep doodoo,
10643                                  * so give up rebuilding the switch and set up
10644                                  * for minimal rebuild of PF VSI.
10645                                  * If orphan failed, we'll report the error
10646                                  * but try to keep going.
10647                                  */
10648                                 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10649                                         dev_info(&pf->pdev->dev,
10650                                                  "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10651                                                  ret);
10652                                         vsi->uplink_seid = pf->mac_seid;
10653                                         break;
10654                                 } else if (pf->veb[v]->uplink_seid == 0) {
10655                                         dev_info(&pf->pdev->dev,
10656                                                  "rebuild of orphan VEB failed: %d\n",
10657                                                  ret);
10658                                 }
10659                         }
10660                 }
10661         }
10662
10663         if (vsi->uplink_seid == pf->mac_seid) {
10664                 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10665                 /* no VEB, so rebuild only the Main VSI */
10666                 ret = i40e_add_vsi(vsi);
10667                 if (ret) {
10668                         dev_info(&pf->pdev->dev,
10669                                  "rebuild of Main VSI failed: %d\n", ret);
10670                         goto end_unlock;
10671                 }
10672         }
10673
10674         if (vsi->mqprio_qopt.max_rate[0]) {
10675                 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10676                 u64 credits = 0;
10677
10678                 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10679                 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10680                 if (ret)
10681                         goto end_unlock;
10682
10683                 credits = max_tx_rate;
10684                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10685                 dev_dbg(&vsi->back->pdev->dev,
10686                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10687                         max_tx_rate,
10688                         credits,
10689                         vsi->seid);
10690         }
10691
10692         ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10693         if (ret)
10694                 goto end_unlock;
10695
10696         /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10697          * for this main VSI if they exist
10698          */
10699         ret = i40e_rebuild_channels(vsi);
10700         if (ret)
10701                 goto end_unlock;
10702
10703         /* Reconfigure hardware for allowing smaller MSS in the case
10704          * of TSO, so that we avoid the MDD being fired and causing
10705          * a reset in the case of small MSS+TSO.
10706          */
10707 #define I40E_REG_MSS          0x000E64DC
10708 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10709 #define I40E_64BYTE_MSS       0x400000
10710         val = rd32(hw, I40E_REG_MSS);
10711         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10712                 val &= ~I40E_REG_MSS_MIN_MASK;
10713                 val |= I40E_64BYTE_MSS;
10714                 wr32(hw, I40E_REG_MSS, val);
10715         }
10716
10717         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10718                 msleep(75);
10719                 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10720                 if (ret)
10721                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10722                                  i40e_stat_str(&pf->hw, ret),
10723                                  i40e_aq_str(&pf->hw,
10724                                              pf->hw.aq.asq_last_status));
10725         }
10726         /* reinit the misc interrupt */
10727         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10728                 ret = i40e_setup_misc_vector(pf);
10729
10730         /* Add a filter to drop all Flow control frames from any VSI from being
10731          * transmitted. By doing so we stop a malicious VF from sending out
10732          * PAUSE or PFC frames and potentially controlling traffic for other
10733          * PF/VF VSIs.
10734          * The FW can still send Flow control frames if enabled.
10735          */
10736         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10737                                                        pf->main_vsi_seid);
10738 #ifdef CONFIG_I40E_DCB
10739         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP)
10740                 i40e_set_lldp_forwarding(pf, true);
10741 #endif /* CONFIG_I40E_DCB */
10742
10743         /* restart the VSIs that were rebuilt and running before the reset */
10744         i40e_pf_unquiesce_all_vsi(pf);
10745
10746         /* Release the RTNL lock before we start resetting VFs */
10747         if (!lock_acquired)
10748                 rtnl_unlock();
10749
10750         /* Restore promiscuous settings */
10751         ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10752         if (ret)
10753                 dev_warn(&pf->pdev->dev,
10754                          "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10755                          pf->cur_promisc ? "on" : "off",
10756                          i40e_stat_str(&pf->hw, ret),
10757                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10758
10759         i40e_reset_all_vfs(pf, true);
10760
10761         /* tell the firmware that we're starting */
10762         i40e_send_version(pf);
10763
10764         /* We've already released the lock, so don't do it again */
10765         goto end_core_reset;
10766
10767 end_unlock:
10768         if (!lock_acquired)
10769                 rtnl_unlock();
10770 end_core_reset:
10771         clear_bit(__I40E_RESET_FAILED, pf->state);
10772 clear_recovery:
10773         clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10774         clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10775 }
10776
10777 /**
10778  * i40e_reset_and_rebuild - reset and rebuild using a saved config
10779  * @pf: board private structure
10780  * @reinit: if the Main VSI needs to re-initialized.
10781  * @lock_acquired: indicates whether or not the lock has been acquired
10782  * before this function was called.
10783  **/
10784 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10785                                    bool lock_acquired)
10786 {
10787         int ret;
10788         /* Now we wait for GRST to settle out.
10789          * We don't have to delete the VEBs or VSIs from the hw switch
10790          * because the reset will make them disappear.
10791          */
10792         ret = i40e_reset(pf);
10793         if (!ret)
10794                 i40e_rebuild(pf, reinit, lock_acquired);
10795 }
10796
10797 /**
10798  * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10799  * @pf: board private structure
10800  *
10801  * Close up the VFs and other things in prep for a Core Reset,
10802  * then get ready to rebuild the world.
10803  * @lock_acquired: indicates whether or not the lock has been acquired
10804  * before this function was called.
10805  **/
10806 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10807 {
10808         i40e_prep_for_reset(pf);
10809         i40e_reset_and_rebuild(pf, false, lock_acquired);
10810 }
10811
10812 /**
10813  * i40e_handle_mdd_event
10814  * @pf: pointer to the PF structure
10815  *
10816  * Called from the MDD irq handler to identify possibly malicious vfs
10817  **/
10818 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10819 {
10820         struct i40e_hw *hw = &pf->hw;
10821         bool mdd_detected = false;
10822         struct i40e_vf *vf;
10823         u32 reg;
10824         int i;
10825
10826         if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10827                 return;
10828
10829         /* find what triggered the MDD event */
10830         reg = rd32(hw, I40E_GL_MDET_TX);
10831         if (reg & I40E_GL_MDET_TX_VALID_MASK) {
10832                 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
10833                                 I40E_GL_MDET_TX_PF_NUM_SHIFT;
10834                 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
10835                                 I40E_GL_MDET_TX_VF_NUM_SHIFT;
10836                 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
10837                                 I40E_GL_MDET_TX_EVENT_SHIFT;
10838                 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
10839                                 I40E_GL_MDET_TX_QUEUE_SHIFT) -
10840                                 pf->hw.func_caps.base_queue;
10841                 if (netif_msg_tx_err(pf))
10842                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
10843                                  event, queue, pf_num, vf_num);
10844                 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
10845                 mdd_detected = true;
10846         }
10847         reg = rd32(hw, I40E_GL_MDET_RX);
10848         if (reg & I40E_GL_MDET_RX_VALID_MASK) {
10849                 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
10850                                 I40E_GL_MDET_RX_FUNCTION_SHIFT;
10851                 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
10852                                 I40E_GL_MDET_RX_EVENT_SHIFT;
10853                 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
10854                                 I40E_GL_MDET_RX_QUEUE_SHIFT) -
10855                                 pf->hw.func_caps.base_queue;
10856                 if (netif_msg_rx_err(pf))
10857                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
10858                                  event, queue, func);
10859                 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
10860                 mdd_detected = true;
10861         }
10862
10863         if (mdd_detected) {
10864                 reg = rd32(hw, I40E_PF_MDET_TX);
10865                 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
10866                         wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
10867                         dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
10868                 }
10869                 reg = rd32(hw, I40E_PF_MDET_RX);
10870                 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
10871                         wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
10872                         dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
10873                 }
10874         }
10875
10876         /* see if one of the VFs needs its hand slapped */
10877         for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
10878                 vf = &(pf->vf[i]);
10879                 reg = rd32(hw, I40E_VP_MDET_TX(i));
10880                 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
10881                         wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
10882                         vf->num_mdd_events++;
10883                         dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
10884                                  i);
10885                         dev_info(&pf->pdev->dev,
10886                                  "Use PF Control I/F to re-enable the VF\n");
10887                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10888                 }
10889
10890                 reg = rd32(hw, I40E_VP_MDET_RX(i));
10891                 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
10892                         wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
10893                         vf->num_mdd_events++;
10894                         dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
10895                                  i);
10896                         dev_info(&pf->pdev->dev,
10897                                  "Use PF Control I/F to re-enable the VF\n");
10898                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10899                 }
10900         }
10901
10902         /* re-enable mdd interrupt cause */
10903         clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
10904         reg = rd32(hw, I40E_PFINT_ICR0_ENA);
10905         reg |=  I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
10906         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
10907         i40e_flush(hw);
10908 }
10909
10910 /**
10911  * i40e_service_task - Run the driver's async subtasks
10912  * @work: pointer to work_struct containing our data
10913  **/
10914 static void i40e_service_task(struct work_struct *work)
10915 {
10916         struct i40e_pf *pf = container_of(work,
10917                                           struct i40e_pf,
10918                                           service_task);
10919         unsigned long start_time = jiffies;
10920
10921         /* don't bother with service tasks if a reset is in progress */
10922         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
10923             test_bit(__I40E_SUSPENDED, pf->state))
10924                 return;
10925
10926         if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
10927                 return;
10928
10929         if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10930                 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
10931                 i40e_sync_filters_subtask(pf);
10932                 i40e_reset_subtask(pf);
10933                 i40e_handle_mdd_event(pf);
10934                 i40e_vc_process_vflr_event(pf);
10935                 i40e_watchdog_subtask(pf);
10936                 i40e_fdir_reinit_subtask(pf);
10937                 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
10938                         /* Client subtask will reopen next time through. */
10939                         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
10940                                                            true);
10941                 } else {
10942                         i40e_client_subtask(pf);
10943                         if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
10944                                                pf->state))
10945                                 i40e_notify_client_of_l2_param_changes(
10946                                                                 pf->vsi[pf->lan_vsi]);
10947                 }
10948                 i40e_sync_filters_subtask(pf);
10949         } else {
10950                 i40e_reset_subtask(pf);
10951         }
10952
10953         i40e_clean_adminq_subtask(pf);
10954
10955         /* flush memory to make sure state is correct before next watchdog */
10956         smp_mb__before_atomic();
10957         clear_bit(__I40E_SERVICE_SCHED, pf->state);
10958
10959         /* If the tasks have taken longer than one timer cycle or there
10960          * is more work to be done, reschedule the service task now
10961          * rather than wait for the timer to tick again.
10962          */
10963         if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
10964             test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state)             ||
10965             test_bit(__I40E_MDD_EVENT_PENDING, pf->state)                ||
10966             test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
10967                 i40e_service_event_schedule(pf);
10968 }
10969
10970 /**
10971  * i40e_service_timer - timer callback
10972  * @t: timer list pointer
10973  **/
10974 static void i40e_service_timer(struct timer_list *t)
10975 {
10976         struct i40e_pf *pf = from_timer(pf, t, service_timer);
10977
10978         mod_timer(&pf->service_timer,
10979                   round_jiffies(jiffies + pf->service_timer_period));
10980         i40e_service_event_schedule(pf);
10981 }
10982
10983 /**
10984  * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
10985  * @vsi: the VSI being configured
10986  **/
10987 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
10988 {
10989         struct i40e_pf *pf = vsi->back;
10990
10991         switch (vsi->type) {
10992         case I40E_VSI_MAIN:
10993                 vsi->alloc_queue_pairs = pf->num_lan_qps;
10994                 if (!vsi->num_tx_desc)
10995                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10996                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
10997                 if (!vsi->num_rx_desc)
10998                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10999                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11000                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11001                         vsi->num_q_vectors = pf->num_lan_msix;
11002                 else
11003                         vsi->num_q_vectors = 1;
11004
11005                 break;
11006
11007         case I40E_VSI_FDIR:
11008                 vsi->alloc_queue_pairs = 1;
11009                 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11010                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11011                 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11012                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11013                 vsi->num_q_vectors = pf->num_fdsb_msix;
11014                 break;
11015
11016         case I40E_VSI_VMDQ2:
11017                 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11018                 if (!vsi->num_tx_desc)
11019                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11020                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11021                 if (!vsi->num_rx_desc)
11022                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11023                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11024                 vsi->num_q_vectors = pf->num_vmdq_msix;
11025                 break;
11026
11027         case I40E_VSI_SRIOV:
11028                 vsi->alloc_queue_pairs = pf->num_vf_qps;
11029                 if (!vsi->num_tx_desc)
11030                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11031                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11032                 if (!vsi->num_rx_desc)
11033                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11034                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11035                 break;
11036
11037         default:
11038                 WARN_ON(1);
11039                 return -ENODATA;
11040         }
11041
11042         return 0;
11043 }
11044
11045 /**
11046  * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11047  * @vsi: VSI pointer
11048  * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11049  *
11050  * On error: returns error code (negative)
11051  * On success: returns 0
11052  **/
11053 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11054 {
11055         struct i40e_ring **next_rings;
11056         int size;
11057         int ret = 0;
11058
11059         /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11060         size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11061                (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11062         vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11063         if (!vsi->tx_rings)
11064                 return -ENOMEM;
11065         next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11066         if (i40e_enabled_xdp_vsi(vsi)) {
11067                 vsi->xdp_rings = next_rings;
11068                 next_rings += vsi->alloc_queue_pairs;
11069         }
11070         vsi->rx_rings = next_rings;
11071
11072         if (alloc_qvectors) {
11073                 /* allocate memory for q_vector pointers */
11074                 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11075                 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11076                 if (!vsi->q_vectors) {
11077                         ret = -ENOMEM;
11078                         goto err_vectors;
11079                 }
11080         }
11081         return ret;
11082
11083 err_vectors:
11084         kfree(vsi->tx_rings);
11085         return ret;
11086 }
11087
11088 /**
11089  * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11090  * @pf: board private structure
11091  * @type: type of VSI
11092  *
11093  * On error: returns error code (negative)
11094  * On success: returns vsi index in PF (positive)
11095  **/
11096 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11097 {
11098         int ret = -ENODEV;
11099         struct i40e_vsi *vsi;
11100         int vsi_idx;
11101         int i;
11102
11103         /* Need to protect the allocation of the VSIs at the PF level */
11104         mutex_lock(&pf->switch_mutex);
11105
11106         /* VSI list may be fragmented if VSI creation/destruction has
11107          * been happening.  We can afford to do a quick scan to look
11108          * for any free VSIs in the list.
11109          *
11110          * find next empty vsi slot, looping back around if necessary
11111          */
11112         i = pf->next_vsi;
11113         while (i < pf->num_alloc_vsi && pf->vsi[i])
11114                 i++;
11115         if (i >= pf->num_alloc_vsi) {
11116                 i = 0;
11117                 while (i < pf->next_vsi && pf->vsi[i])
11118                         i++;
11119         }
11120
11121         if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11122                 vsi_idx = i;             /* Found one! */
11123         } else {
11124                 ret = -ENODEV;
11125                 goto unlock_pf;  /* out of VSI slots! */
11126         }
11127         pf->next_vsi = ++i;
11128
11129         vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11130         if (!vsi) {
11131                 ret = -ENOMEM;
11132                 goto unlock_pf;
11133         }
11134         vsi->type = type;
11135         vsi->back = pf;
11136         set_bit(__I40E_VSI_DOWN, vsi->state);
11137         vsi->flags = 0;
11138         vsi->idx = vsi_idx;
11139         vsi->int_rate_limit = 0;
11140         vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11141                                 pf->rss_table_size : 64;
11142         vsi->netdev_registered = false;
11143         vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11144         hash_init(vsi->mac_filter_hash);
11145         vsi->irqs_ready = false;
11146
11147         if (type == I40E_VSI_MAIN) {
11148                 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11149                 if (!vsi->af_xdp_zc_qps)
11150                         goto err_rings;
11151         }
11152
11153         ret = i40e_set_num_rings_in_vsi(vsi);
11154         if (ret)
11155                 goto err_rings;
11156
11157         ret = i40e_vsi_alloc_arrays(vsi, true);
11158         if (ret)
11159                 goto err_rings;
11160
11161         /* Setup default MSIX irq handler for VSI */
11162         i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11163
11164         /* Initialize VSI lock */
11165         spin_lock_init(&vsi->mac_filter_hash_lock);
11166         pf->vsi[vsi_idx] = vsi;
11167         ret = vsi_idx;
11168         goto unlock_pf;
11169
11170 err_rings:
11171         bitmap_free(vsi->af_xdp_zc_qps);
11172         pf->next_vsi = i - 1;
11173         kfree(vsi);
11174 unlock_pf:
11175         mutex_unlock(&pf->switch_mutex);
11176         return ret;
11177 }
11178
11179 /**
11180  * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11181  * @vsi: VSI pointer
11182  * @free_qvectors: a bool to specify if q_vectors need to be freed.
11183  *
11184  * On error: returns error code (negative)
11185  * On success: returns 0
11186  **/
11187 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11188 {
11189         /* free the ring and vector containers */
11190         if (free_qvectors) {
11191                 kfree(vsi->q_vectors);
11192                 vsi->q_vectors = NULL;
11193         }
11194         kfree(vsi->tx_rings);
11195         vsi->tx_rings = NULL;
11196         vsi->rx_rings = NULL;
11197         vsi->xdp_rings = NULL;
11198 }
11199
11200 /**
11201  * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11202  * and lookup table
11203  * @vsi: Pointer to VSI structure
11204  */
11205 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11206 {
11207         if (!vsi)
11208                 return;
11209
11210         kfree(vsi->rss_hkey_user);
11211         vsi->rss_hkey_user = NULL;
11212
11213         kfree(vsi->rss_lut_user);
11214         vsi->rss_lut_user = NULL;
11215 }
11216
11217 /**
11218  * i40e_vsi_clear - Deallocate the VSI provided
11219  * @vsi: the VSI being un-configured
11220  **/
11221 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11222 {
11223         struct i40e_pf *pf;
11224
11225         if (!vsi)
11226                 return 0;
11227
11228         if (!vsi->back)
11229                 goto free_vsi;
11230         pf = vsi->back;
11231
11232         mutex_lock(&pf->switch_mutex);
11233         if (!pf->vsi[vsi->idx]) {
11234                 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11235                         vsi->idx, vsi->idx, vsi->type);
11236                 goto unlock_vsi;
11237         }
11238
11239         if (pf->vsi[vsi->idx] != vsi) {
11240                 dev_err(&pf->pdev->dev,
11241                         "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11242                         pf->vsi[vsi->idx]->idx,
11243                         pf->vsi[vsi->idx]->type,
11244                         vsi->idx, vsi->type);
11245                 goto unlock_vsi;
11246         }
11247
11248         /* updates the PF for this cleared vsi */
11249         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11250         i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11251
11252         bitmap_free(vsi->af_xdp_zc_qps);
11253         i40e_vsi_free_arrays(vsi, true);
11254         i40e_clear_rss_config_user(vsi);
11255
11256         pf->vsi[vsi->idx] = NULL;
11257         if (vsi->idx < pf->next_vsi)
11258                 pf->next_vsi = vsi->idx;
11259
11260 unlock_vsi:
11261         mutex_unlock(&pf->switch_mutex);
11262 free_vsi:
11263         kfree(vsi);
11264
11265         return 0;
11266 }
11267
11268 /**
11269  * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11270  * @vsi: the VSI being cleaned
11271  **/
11272 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11273 {
11274         int i;
11275
11276         if (vsi->tx_rings && vsi->tx_rings[0]) {
11277                 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11278                         kfree_rcu(vsi->tx_rings[i], rcu);
11279                         WRITE_ONCE(vsi->tx_rings[i], NULL);
11280                         WRITE_ONCE(vsi->rx_rings[i], NULL);
11281                         if (vsi->xdp_rings)
11282                                 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11283                 }
11284         }
11285 }
11286
11287 /**
11288  * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11289  * @vsi: the VSI being configured
11290  **/
11291 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11292 {
11293         int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11294         struct i40e_pf *pf = vsi->back;
11295         struct i40e_ring *ring;
11296
11297         /* Set basic values in the rings to be used later during open() */
11298         for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11299                 /* allocate space for both Tx and Rx in one shot */
11300                 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11301                 if (!ring)
11302                         goto err_out;
11303
11304                 ring->queue_index = i;
11305                 ring->reg_idx = vsi->base_queue + i;
11306                 ring->ring_active = false;
11307                 ring->vsi = vsi;
11308                 ring->netdev = vsi->netdev;
11309                 ring->dev = &pf->pdev->dev;
11310                 ring->count = vsi->num_tx_desc;
11311                 ring->size = 0;
11312                 ring->dcb_tc = 0;
11313                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11314                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11315                 ring->itr_setting = pf->tx_itr_default;
11316                 WRITE_ONCE(vsi->tx_rings[i], ring++);
11317
11318                 if (!i40e_enabled_xdp_vsi(vsi))
11319                         goto setup_rx;
11320
11321                 ring->queue_index = vsi->alloc_queue_pairs + i;
11322                 ring->reg_idx = vsi->base_queue + ring->queue_index;
11323                 ring->ring_active = false;
11324                 ring->vsi = vsi;
11325                 ring->netdev = NULL;
11326                 ring->dev = &pf->pdev->dev;
11327                 ring->count = vsi->num_tx_desc;
11328                 ring->size = 0;
11329                 ring->dcb_tc = 0;
11330                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11331                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11332                 set_ring_xdp(ring);
11333                 ring->itr_setting = pf->tx_itr_default;
11334                 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11335
11336 setup_rx:
11337                 ring->queue_index = i;
11338                 ring->reg_idx = vsi->base_queue + i;
11339                 ring->ring_active = false;
11340                 ring->vsi = vsi;
11341                 ring->netdev = vsi->netdev;
11342                 ring->dev = &pf->pdev->dev;
11343                 ring->count = vsi->num_rx_desc;
11344                 ring->size = 0;
11345                 ring->dcb_tc = 0;
11346                 ring->itr_setting = pf->rx_itr_default;
11347                 WRITE_ONCE(vsi->rx_rings[i], ring);
11348         }
11349
11350         return 0;
11351
11352 err_out:
11353         i40e_vsi_clear_rings(vsi);
11354         return -ENOMEM;
11355 }
11356
11357 /**
11358  * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11359  * @pf: board private structure
11360  * @vectors: the number of MSI-X vectors to request
11361  *
11362  * Returns the number of vectors reserved, or error
11363  **/
11364 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11365 {
11366         vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11367                                         I40E_MIN_MSIX, vectors);
11368         if (vectors < 0) {
11369                 dev_info(&pf->pdev->dev,
11370                          "MSI-X vector reservation failed: %d\n", vectors);
11371                 vectors = 0;
11372         }
11373
11374         return vectors;
11375 }
11376
11377 /**
11378  * i40e_init_msix - Setup the MSIX capability
11379  * @pf: board private structure
11380  *
11381  * Work with the OS to set up the MSIX vectors needed.
11382  *
11383  * Returns the number of vectors reserved or negative on failure
11384  **/
11385 static int i40e_init_msix(struct i40e_pf *pf)
11386 {
11387         struct i40e_hw *hw = &pf->hw;
11388         int cpus, extra_vectors;
11389         int vectors_left;
11390         int v_budget, i;
11391         int v_actual;
11392         int iwarp_requested = 0;
11393
11394         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11395                 return -ENODEV;
11396
11397         /* The number of vectors we'll request will be comprised of:
11398          *   - Add 1 for "other" cause for Admin Queue events, etc.
11399          *   - The number of LAN queue pairs
11400          *      - Queues being used for RSS.
11401          *              We don't need as many as max_rss_size vectors.
11402          *              use rss_size instead in the calculation since that
11403          *              is governed by number of cpus in the system.
11404          *      - assumes symmetric Tx/Rx pairing
11405          *   - The number of VMDq pairs
11406          *   - The CPU count within the NUMA node if iWARP is enabled
11407          * Once we count this up, try the request.
11408          *
11409          * If we can't get what we want, we'll simplify to nearly nothing
11410          * and try again.  If that still fails, we punt.
11411          */
11412         vectors_left = hw->func_caps.num_msix_vectors;
11413         v_budget = 0;
11414
11415         /* reserve one vector for miscellaneous handler */
11416         if (vectors_left) {
11417                 v_budget++;
11418                 vectors_left--;
11419         }
11420
11421         /* reserve some vectors for the main PF traffic queues. Initially we
11422          * only reserve at most 50% of the available vectors, in the case that
11423          * the number of online CPUs is large. This ensures that we can enable
11424          * extra features as well. Once we've enabled the other features, we
11425          * will use any remaining vectors to reach as close as we can to the
11426          * number of online CPUs.
11427          */
11428         cpus = num_online_cpus();
11429         pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11430         vectors_left -= pf->num_lan_msix;
11431
11432         /* reserve one vector for sideband flow director */
11433         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11434                 if (vectors_left) {
11435                         pf->num_fdsb_msix = 1;
11436                         v_budget++;
11437                         vectors_left--;
11438                 } else {
11439                         pf->num_fdsb_msix = 0;
11440                 }
11441         }
11442
11443         /* can we reserve enough for iWARP? */
11444         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11445                 iwarp_requested = pf->num_iwarp_msix;
11446
11447                 if (!vectors_left)
11448                         pf->num_iwarp_msix = 0;
11449                 else if (vectors_left < pf->num_iwarp_msix)
11450                         pf->num_iwarp_msix = 1;
11451                 v_budget += pf->num_iwarp_msix;
11452                 vectors_left -= pf->num_iwarp_msix;
11453         }
11454
11455         /* any vectors left over go for VMDq support */
11456         if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11457                 if (!vectors_left) {
11458                         pf->num_vmdq_msix = 0;
11459                         pf->num_vmdq_qps = 0;
11460                 } else {
11461                         int vmdq_vecs_wanted =
11462                                 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11463                         int vmdq_vecs =
11464                                 min_t(int, vectors_left, vmdq_vecs_wanted);
11465
11466                         /* if we're short on vectors for what's desired, we limit
11467                          * the queues per vmdq.  If this is still more than are
11468                          * available, the user will need to change the number of
11469                          * queues/vectors used by the PF later with the ethtool
11470                          * channels command
11471                          */
11472                         if (vectors_left < vmdq_vecs_wanted) {
11473                                 pf->num_vmdq_qps = 1;
11474                                 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11475                                 vmdq_vecs = min_t(int,
11476                                                   vectors_left,
11477                                                   vmdq_vecs_wanted);
11478                         }
11479                         pf->num_vmdq_msix = pf->num_vmdq_qps;
11480
11481                         v_budget += vmdq_vecs;
11482                         vectors_left -= vmdq_vecs;
11483                 }
11484         }
11485
11486         /* On systems with a large number of SMP cores, we previously limited
11487          * the number of vectors for num_lan_msix to be at most 50% of the
11488          * available vectors, to allow for other features. Now, we add back
11489          * the remaining vectors. However, we ensure that the total
11490          * num_lan_msix will not exceed num_online_cpus(). To do this, we
11491          * calculate the number of vectors we can add without going over the
11492          * cap of CPUs. For systems with a small number of CPUs this will be
11493          * zero.
11494          */
11495         extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11496         pf->num_lan_msix += extra_vectors;
11497         vectors_left -= extra_vectors;
11498
11499         WARN(vectors_left < 0,
11500              "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11501
11502         v_budget += pf->num_lan_msix;
11503         pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11504                                    GFP_KERNEL);
11505         if (!pf->msix_entries)
11506                 return -ENOMEM;
11507
11508         for (i = 0; i < v_budget; i++)
11509                 pf->msix_entries[i].entry = i;
11510         v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11511
11512         if (v_actual < I40E_MIN_MSIX) {
11513                 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11514                 kfree(pf->msix_entries);
11515                 pf->msix_entries = NULL;
11516                 pci_disable_msix(pf->pdev);
11517                 return -ENODEV;
11518
11519         } else if (v_actual == I40E_MIN_MSIX) {
11520                 /* Adjust for minimal MSIX use */
11521                 pf->num_vmdq_vsis = 0;
11522                 pf->num_vmdq_qps = 0;
11523                 pf->num_lan_qps = 1;
11524                 pf->num_lan_msix = 1;
11525
11526         } else if (v_actual != v_budget) {
11527                 /* If we have limited resources, we will start with no vectors
11528                  * for the special features and then allocate vectors to some
11529                  * of these features based on the policy and at the end disable
11530                  * the features that did not get any vectors.
11531                  */
11532                 int vec;
11533
11534                 dev_info(&pf->pdev->dev,
11535                          "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11536                          v_actual, v_budget);
11537                 /* reserve the misc vector */
11538                 vec = v_actual - 1;
11539
11540                 /* Scale vector usage down */
11541                 pf->num_vmdq_msix = 1;    /* force VMDqs to only one vector */
11542                 pf->num_vmdq_vsis = 1;
11543                 pf->num_vmdq_qps = 1;
11544
11545                 /* partition out the remaining vectors */
11546                 switch (vec) {
11547                 case 2:
11548                         pf->num_lan_msix = 1;
11549                         break;
11550                 case 3:
11551                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11552                                 pf->num_lan_msix = 1;
11553                                 pf->num_iwarp_msix = 1;
11554                         } else {
11555                                 pf->num_lan_msix = 2;
11556                         }
11557                         break;
11558                 default:
11559                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11560                                 pf->num_iwarp_msix = min_t(int, (vec / 3),
11561                                                  iwarp_requested);
11562                                 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11563                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11564                         } else {
11565                                 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11566                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11567                         }
11568                         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11569                                 pf->num_fdsb_msix = 1;
11570                                 vec--;
11571                         }
11572                         pf->num_lan_msix = min_t(int,
11573                                (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11574                                                               pf->num_lan_msix);
11575                         pf->num_lan_qps = pf->num_lan_msix;
11576                         break;
11577                 }
11578         }
11579
11580         if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11581             (pf->num_fdsb_msix == 0)) {
11582                 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11583                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11584                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11585         }
11586         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11587             (pf->num_vmdq_msix == 0)) {
11588                 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11589                 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11590         }
11591
11592         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11593             (pf->num_iwarp_msix == 0)) {
11594                 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11595                 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11596         }
11597         i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11598                    "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11599                    pf->num_lan_msix,
11600                    pf->num_vmdq_msix * pf->num_vmdq_vsis,
11601                    pf->num_fdsb_msix,
11602                    pf->num_iwarp_msix);
11603
11604         return v_actual;
11605 }
11606
11607 /**
11608  * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11609  * @vsi: the VSI being configured
11610  * @v_idx: index of the vector in the vsi struct
11611  *
11612  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
11613  **/
11614 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11615 {
11616         struct i40e_q_vector *q_vector;
11617
11618         /* allocate q_vector */
11619         q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11620         if (!q_vector)
11621                 return -ENOMEM;
11622
11623         q_vector->vsi = vsi;
11624         q_vector->v_idx = v_idx;
11625         cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11626
11627         if (vsi->netdev)
11628                 netif_napi_add(vsi->netdev, &q_vector->napi,
11629                                i40e_napi_poll, NAPI_POLL_WEIGHT);
11630
11631         /* tie q_vector and vsi together */
11632         vsi->q_vectors[v_idx] = q_vector;
11633
11634         return 0;
11635 }
11636
11637 /**
11638  * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11639  * @vsi: the VSI being configured
11640  *
11641  * We allocate one q_vector per queue interrupt.  If allocation fails we
11642  * return -ENOMEM.
11643  **/
11644 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11645 {
11646         struct i40e_pf *pf = vsi->back;
11647         int err, v_idx, num_q_vectors;
11648
11649         /* if not MSIX, give the one vector only to the LAN VSI */
11650         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11651                 num_q_vectors = vsi->num_q_vectors;
11652         else if (vsi == pf->vsi[pf->lan_vsi])
11653                 num_q_vectors = 1;
11654         else
11655                 return -EINVAL;
11656
11657         for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11658                 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
11659                 if (err)
11660                         goto err_out;
11661         }
11662
11663         return 0;
11664
11665 err_out:
11666         while (v_idx--)
11667                 i40e_free_q_vector(vsi, v_idx);
11668
11669         return err;
11670 }
11671
11672 /**
11673  * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11674  * @pf: board private structure to initialize
11675  **/
11676 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11677 {
11678         int vectors = 0;
11679         ssize_t size;
11680
11681         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11682                 vectors = i40e_init_msix(pf);
11683                 if (vectors < 0) {
11684                         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED   |
11685                                        I40E_FLAG_IWARP_ENABLED  |
11686                                        I40E_FLAG_RSS_ENABLED    |
11687                                        I40E_FLAG_DCB_CAPABLE    |
11688                                        I40E_FLAG_DCB_ENABLED    |
11689                                        I40E_FLAG_SRIOV_ENABLED  |
11690                                        I40E_FLAG_FD_SB_ENABLED  |
11691                                        I40E_FLAG_FD_ATR_ENABLED |
11692                                        I40E_FLAG_VMDQ_ENABLED);
11693                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11694
11695                         /* rework the queue expectations without MSIX */
11696                         i40e_determine_queue_usage(pf);
11697                 }
11698         }
11699
11700         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11701             (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11702                 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11703                 vectors = pci_enable_msi(pf->pdev);
11704                 if (vectors < 0) {
11705                         dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11706                                  vectors);
11707                         pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11708                 }
11709                 vectors = 1;  /* one MSI or Legacy vector */
11710         }
11711
11712         if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11713                 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11714
11715         /* set up vector assignment tracking */
11716         size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11717         pf->irq_pile = kzalloc(size, GFP_KERNEL);
11718         if (!pf->irq_pile)
11719                 return -ENOMEM;
11720
11721         pf->irq_pile->num_entries = vectors;
11722         pf->irq_pile->search_hint = 0;
11723
11724         /* track first vector for misc interrupts, ignore return */
11725         (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11726
11727         return 0;
11728 }
11729
11730 /**
11731  * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11732  * @pf: private board data structure
11733  *
11734  * Restore the interrupt scheme that was cleared when we suspended the
11735  * device. This should be called during resume to re-allocate the q_vectors
11736  * and reacquire IRQs.
11737  */
11738 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11739 {
11740         int err, i;
11741
11742         /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11743          * scheme. We need to re-enabled them here in order to attempt to
11744          * re-acquire the MSI or MSI-X vectors
11745          */
11746         pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11747
11748         err = i40e_init_interrupt_scheme(pf);
11749         if (err)
11750                 return err;
11751
11752         /* Now that we've re-acquired IRQs, we need to remap the vectors and
11753          * rings together again.
11754          */
11755         for (i = 0; i < pf->num_alloc_vsi; i++) {
11756                 if (pf->vsi[i]) {
11757                         err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11758                         if (err)
11759                                 goto err_unwind;
11760                         i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11761                 }
11762         }
11763
11764         err = i40e_setup_misc_vector(pf);
11765         if (err)
11766                 goto err_unwind;
11767
11768         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11769                 i40e_client_update_msix_info(pf);
11770
11771         return 0;
11772
11773 err_unwind:
11774         while (i--) {
11775                 if (pf->vsi[i])
11776                         i40e_vsi_free_q_vectors(pf->vsi[i]);
11777         }
11778
11779         return err;
11780 }
11781
11782 /**
11783  * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11784  * non queue events in recovery mode
11785  * @pf: board private structure
11786  *
11787  * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11788  * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11789  * This is handled differently than in recovery mode since no Tx/Rx resources
11790  * are being allocated.
11791  **/
11792 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11793 {
11794         int err;
11795
11796         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11797                 err = i40e_setup_misc_vector(pf);
11798
11799                 if (err) {
11800                         dev_info(&pf->pdev->dev,
11801                                  "MSI-X misc vector request failed, error %d\n",
11802                                  err);
11803                         return err;
11804                 }
11805         } else {
11806                 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11807
11808                 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11809                                   pf->int_name, pf);
11810
11811                 if (err) {
11812                         dev_info(&pf->pdev->dev,
11813                                  "MSI/legacy misc vector request failed, error %d\n",
11814                                  err);
11815                         return err;
11816                 }
11817                 i40e_enable_misc_int_causes(pf);
11818                 i40e_irq_dynamic_enable_icr0(pf);
11819         }
11820
11821         return 0;
11822 }
11823
11824 /**
11825  * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11826  * @pf: board private structure
11827  *
11828  * This sets up the handler for MSIX 0, which is used to manage the
11829  * non-queue interrupts, e.g. AdminQ and errors.  This is not used
11830  * when in MSI or Legacy interrupt mode.
11831  **/
11832 static int i40e_setup_misc_vector(struct i40e_pf *pf)
11833 {
11834         struct i40e_hw *hw = &pf->hw;
11835         int err = 0;
11836
11837         /* Only request the IRQ once, the first time through. */
11838         if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
11839                 err = request_irq(pf->msix_entries[0].vector,
11840                                   i40e_intr, 0, pf->int_name, pf);
11841                 if (err) {
11842                         clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
11843                         dev_info(&pf->pdev->dev,
11844                                  "request_irq for %s failed: %d\n",
11845                                  pf->int_name, err);
11846                         return -EFAULT;
11847                 }
11848         }
11849
11850         i40e_enable_misc_int_causes(pf);
11851
11852         /* associate no queues to the misc vector */
11853         wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
11854         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
11855
11856         i40e_flush(hw);
11857
11858         i40e_irq_dynamic_enable_icr0(pf);
11859
11860         return err;
11861 }
11862
11863 /**
11864  * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
11865  * @vsi: Pointer to vsi structure
11866  * @seed: Buffter to store the hash keys
11867  * @lut: Buffer to store the lookup table entries
11868  * @lut_size: Size of buffer to store the lookup table entries
11869  *
11870  * Return 0 on success, negative on failure
11871  */
11872 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
11873                            u8 *lut, u16 lut_size)
11874 {
11875         struct i40e_pf *pf = vsi->back;
11876         struct i40e_hw *hw = &pf->hw;
11877         int ret = 0;
11878
11879         if (seed) {
11880                 ret = i40e_aq_get_rss_key(hw, vsi->id,
11881                         (struct i40e_aqc_get_set_rss_key_data *)seed);
11882                 if (ret) {
11883                         dev_info(&pf->pdev->dev,
11884                                  "Cannot get RSS key, err %s aq_err %s\n",
11885                                  i40e_stat_str(&pf->hw, ret),
11886                                  i40e_aq_str(&pf->hw,
11887                                              pf->hw.aq.asq_last_status));
11888                         return ret;
11889                 }
11890         }
11891
11892         if (lut) {
11893                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
11894
11895                 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11896                 if (ret) {
11897                         dev_info(&pf->pdev->dev,
11898                                  "Cannot get RSS lut, err %s aq_err %s\n",
11899                                  i40e_stat_str(&pf->hw, ret),
11900                                  i40e_aq_str(&pf->hw,
11901                                              pf->hw.aq.asq_last_status));
11902                         return ret;
11903                 }
11904         }
11905
11906         return ret;
11907 }
11908
11909 /**
11910  * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
11911  * @vsi: Pointer to vsi structure
11912  * @seed: RSS hash seed
11913  * @lut: Lookup table
11914  * @lut_size: Lookup table size
11915  *
11916  * Returns 0 on success, negative on failure
11917  **/
11918 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
11919                                const u8 *lut, u16 lut_size)
11920 {
11921         struct i40e_pf *pf = vsi->back;
11922         struct i40e_hw *hw = &pf->hw;
11923         u16 vf_id = vsi->vf_id;
11924         u8 i;
11925
11926         /* Fill out hash function seed */
11927         if (seed) {
11928                 u32 *seed_dw = (u32 *)seed;
11929
11930                 if (vsi->type == I40E_VSI_MAIN) {
11931                         for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11932                                 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
11933                 } else if (vsi->type == I40E_VSI_SRIOV) {
11934                         for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
11935                                 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
11936                 } else {
11937                         dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
11938                 }
11939         }
11940
11941         if (lut) {
11942                 u32 *lut_dw = (u32 *)lut;
11943
11944                 if (vsi->type == I40E_VSI_MAIN) {
11945                         if (lut_size != I40E_HLUT_ARRAY_SIZE)
11946                                 return -EINVAL;
11947                         for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11948                                 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
11949                 } else if (vsi->type == I40E_VSI_SRIOV) {
11950                         if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
11951                                 return -EINVAL;
11952                         for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11953                                 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
11954                 } else {
11955                         dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11956                 }
11957         }
11958         i40e_flush(hw);
11959
11960         return 0;
11961 }
11962
11963 /**
11964  * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
11965  * @vsi: Pointer to VSI structure
11966  * @seed: Buffer to store the keys
11967  * @lut: Buffer to store the lookup table entries
11968  * @lut_size: Size of buffer to store the lookup table entries
11969  *
11970  * Returns 0 on success, negative on failure
11971  */
11972 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
11973                             u8 *lut, u16 lut_size)
11974 {
11975         struct i40e_pf *pf = vsi->back;
11976         struct i40e_hw *hw = &pf->hw;
11977         u16 i;
11978
11979         if (seed) {
11980                 u32 *seed_dw = (u32 *)seed;
11981
11982                 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11983                         seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
11984         }
11985         if (lut) {
11986                 u32 *lut_dw = (u32 *)lut;
11987
11988                 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11989                         return -EINVAL;
11990                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11991                         lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
11992         }
11993
11994         return 0;
11995 }
11996
11997 /**
11998  * i40e_config_rss - Configure RSS keys and lut
11999  * @vsi: Pointer to VSI structure
12000  * @seed: RSS hash seed
12001  * @lut: Lookup table
12002  * @lut_size: Lookup table size
12003  *
12004  * Returns 0 on success, negative on failure
12005  */
12006 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12007 {
12008         struct i40e_pf *pf = vsi->back;
12009
12010         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12011                 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12012         else
12013                 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12014 }
12015
12016 /**
12017  * i40e_get_rss - Get RSS keys and lut
12018  * @vsi: Pointer to VSI structure
12019  * @seed: Buffer to store the keys
12020  * @lut: Buffer to store the lookup table entries
12021  * @lut_size: Size of buffer to store the lookup table entries
12022  *
12023  * Returns 0 on success, negative on failure
12024  */
12025 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12026 {
12027         struct i40e_pf *pf = vsi->back;
12028
12029         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12030                 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12031         else
12032                 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12033 }
12034
12035 /**
12036  * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12037  * @pf: Pointer to board private structure
12038  * @lut: Lookup table
12039  * @rss_table_size: Lookup table size
12040  * @rss_size: Range of queue number for hashing
12041  */
12042 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12043                        u16 rss_table_size, u16 rss_size)
12044 {
12045         u16 i;
12046
12047         for (i = 0; i < rss_table_size; i++)
12048                 lut[i] = i % rss_size;
12049 }
12050
12051 /**
12052  * i40e_pf_config_rss - Prepare for RSS if used
12053  * @pf: board private structure
12054  **/
12055 static int i40e_pf_config_rss(struct i40e_pf *pf)
12056 {
12057         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12058         u8 seed[I40E_HKEY_ARRAY_SIZE];
12059         u8 *lut;
12060         struct i40e_hw *hw = &pf->hw;
12061         u32 reg_val;
12062         u64 hena;
12063         int ret;
12064
12065         /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12066         hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12067                 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12068         hena |= i40e_pf_get_default_rss_hena(pf);
12069
12070         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12071         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12072
12073         /* Determine the RSS table size based on the hardware capabilities */
12074         reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12075         reg_val = (pf->rss_table_size == 512) ?
12076                         (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12077                         (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12078         i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12079
12080         /* Determine the RSS size of the VSI */
12081         if (!vsi->rss_size) {
12082                 u16 qcount;
12083                 /* If the firmware does something weird during VSI init, we
12084                  * could end up with zero TCs. Check for that to avoid
12085                  * divide-by-zero. It probably won't pass traffic, but it also
12086                  * won't panic.
12087                  */
12088                 qcount = vsi->num_queue_pairs /
12089                          (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12090                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12091         }
12092         if (!vsi->rss_size)
12093                 return -EINVAL;
12094
12095         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12096         if (!lut)
12097                 return -ENOMEM;
12098
12099         /* Use user configured lut if there is one, otherwise use default */
12100         if (vsi->rss_lut_user)
12101                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12102         else
12103                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12104
12105         /* Use user configured hash key if there is one, otherwise
12106          * use default.
12107          */
12108         if (vsi->rss_hkey_user)
12109                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12110         else
12111                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12112         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12113         kfree(lut);
12114
12115         return ret;
12116 }
12117
12118 /**
12119  * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12120  * @pf: board private structure
12121  * @queue_count: the requested queue count for rss.
12122  *
12123  * returns 0 if rss is not enabled, if enabled returns the final rss queue
12124  * count which may be different from the requested queue count.
12125  * Note: expects to be called while under rtnl_lock()
12126  **/
12127 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12128 {
12129         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12130         int new_rss_size;
12131
12132         if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12133                 return 0;
12134
12135         queue_count = min_t(int, queue_count, num_online_cpus());
12136         new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12137
12138         if (queue_count != vsi->num_queue_pairs) {
12139                 u16 qcount;
12140
12141                 vsi->req_queue_pairs = queue_count;
12142                 i40e_prep_for_reset(pf);
12143
12144                 pf->alloc_rss_size = new_rss_size;
12145
12146                 i40e_reset_and_rebuild(pf, true, true);
12147
12148                 /* Discard the user configured hash keys and lut, if less
12149                  * queues are enabled.
12150                  */
12151                 if (queue_count < vsi->rss_size) {
12152                         i40e_clear_rss_config_user(vsi);
12153                         dev_dbg(&pf->pdev->dev,
12154                                 "discard user configured hash keys and lut\n");
12155                 }
12156
12157                 /* Reset vsi->rss_size, as number of enabled queues changed */
12158                 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12159                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12160
12161                 i40e_pf_config_rss(pf);
12162         }
12163         dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count:  %d/%d\n",
12164                  vsi->req_queue_pairs, pf->rss_size_max);
12165         return pf->alloc_rss_size;
12166 }
12167
12168 /**
12169  * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12170  * @pf: board private structure
12171  **/
12172 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
12173 {
12174         i40e_status status;
12175         bool min_valid, max_valid;
12176         u32 max_bw, min_bw;
12177
12178         status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12179                                            &min_valid, &max_valid);
12180
12181         if (!status) {
12182                 if (min_valid)
12183                         pf->min_bw = min_bw;
12184                 if (max_valid)
12185                         pf->max_bw = max_bw;
12186         }
12187
12188         return status;
12189 }
12190
12191 /**
12192  * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12193  * @pf: board private structure
12194  **/
12195 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
12196 {
12197         struct i40e_aqc_configure_partition_bw_data bw_data;
12198         i40e_status status;
12199
12200         memset(&bw_data, 0, sizeof(bw_data));
12201
12202         /* Set the valid bit for this PF */
12203         bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12204         bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12205         bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12206
12207         /* Set the new bandwidths */
12208         status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12209
12210         return status;
12211 }
12212
12213 /**
12214  * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12215  * @pf: board private structure
12216  **/
12217 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12218 {
12219         /* Commit temporary BW setting to permanent NVM image */
12220         enum i40e_admin_queue_err last_aq_status;
12221         i40e_status ret;
12222         u16 nvm_word;
12223
12224         if (pf->hw.partition_id != 1) {
12225                 dev_info(&pf->pdev->dev,
12226                          "Commit BW only works on partition 1! This is partition %d",
12227                          pf->hw.partition_id);
12228                 ret = I40E_NOT_SUPPORTED;
12229                 goto bw_commit_out;
12230         }
12231
12232         /* Acquire NVM for read access */
12233         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12234         last_aq_status = pf->hw.aq.asq_last_status;
12235         if (ret) {
12236                 dev_info(&pf->pdev->dev,
12237                          "Cannot acquire NVM for read access, err %s aq_err %s\n",
12238                          i40e_stat_str(&pf->hw, ret),
12239                          i40e_aq_str(&pf->hw, last_aq_status));
12240                 goto bw_commit_out;
12241         }
12242
12243         /* Read word 0x10 of NVM - SW compatibility word 1 */
12244         ret = i40e_aq_read_nvm(&pf->hw,
12245                                I40E_SR_NVM_CONTROL_WORD,
12246                                0x10, sizeof(nvm_word), &nvm_word,
12247                                false, NULL);
12248         /* Save off last admin queue command status before releasing
12249          * the NVM
12250          */
12251         last_aq_status = pf->hw.aq.asq_last_status;
12252         i40e_release_nvm(&pf->hw);
12253         if (ret) {
12254                 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
12255                          i40e_stat_str(&pf->hw, ret),
12256                          i40e_aq_str(&pf->hw, last_aq_status));
12257                 goto bw_commit_out;
12258         }
12259
12260         /* Wait a bit for NVM release to complete */
12261         msleep(50);
12262
12263         /* Acquire NVM for write access */
12264         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12265         last_aq_status = pf->hw.aq.asq_last_status;
12266         if (ret) {
12267                 dev_info(&pf->pdev->dev,
12268                          "Cannot acquire NVM for write access, err %s aq_err %s\n",
12269                          i40e_stat_str(&pf->hw, ret),
12270                          i40e_aq_str(&pf->hw, last_aq_status));
12271                 goto bw_commit_out;
12272         }
12273         /* Write it back out unchanged to initiate update NVM,
12274          * which will force a write of the shadow (alt) RAM to
12275          * the NVM - thus storing the bandwidth values permanently.
12276          */
12277         ret = i40e_aq_update_nvm(&pf->hw,
12278                                  I40E_SR_NVM_CONTROL_WORD,
12279                                  0x10, sizeof(nvm_word),
12280                                  &nvm_word, true, 0, NULL);
12281         /* Save off last admin queue command status before releasing
12282          * the NVM
12283          */
12284         last_aq_status = pf->hw.aq.asq_last_status;
12285         i40e_release_nvm(&pf->hw);
12286         if (ret)
12287                 dev_info(&pf->pdev->dev,
12288                          "BW settings NOT SAVED, err %s aq_err %s\n",
12289                          i40e_stat_str(&pf->hw, ret),
12290                          i40e_aq_str(&pf->hw, last_aq_status));
12291 bw_commit_out:
12292
12293         return ret;
12294 }
12295
12296 /**
12297  * i40e_is_total_port_shutdown_enabled - read NVM and return value
12298  * if total port shutdown feature is enabled for this PF
12299  * @pf: board private structure
12300  **/
12301 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12302 {
12303 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED        BIT(4)
12304 #define I40E_FEATURES_ENABLE_PTR                0x2A
12305 #define I40E_CURRENT_SETTING_PTR                0x2B
12306 #define I40E_LINK_BEHAVIOR_WORD_OFFSET          0x2D
12307 #define I40E_LINK_BEHAVIOR_WORD_LENGTH          0x1
12308 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED    BIT(0)
12309 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH      4
12310         i40e_status read_status = I40E_SUCCESS;
12311         u16 sr_emp_sr_settings_ptr = 0;
12312         u16 features_enable = 0;
12313         u16 link_behavior = 0;
12314         bool ret = false;
12315
12316         read_status = i40e_read_nvm_word(&pf->hw,
12317                                          I40E_SR_EMP_SR_SETTINGS_PTR,
12318                                          &sr_emp_sr_settings_ptr);
12319         if (read_status)
12320                 goto err_nvm;
12321         read_status = i40e_read_nvm_word(&pf->hw,
12322                                          sr_emp_sr_settings_ptr +
12323                                          I40E_FEATURES_ENABLE_PTR,
12324                                          &features_enable);
12325         if (read_status)
12326                 goto err_nvm;
12327         if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12328                 read_status = i40e_read_nvm_module_data(&pf->hw,
12329                                                         I40E_SR_EMP_SR_SETTINGS_PTR,
12330                                                         I40E_CURRENT_SETTING_PTR,
12331                                                         I40E_LINK_BEHAVIOR_WORD_OFFSET,
12332                                                         I40E_LINK_BEHAVIOR_WORD_LENGTH,
12333                                                         &link_behavior);
12334                 if (read_status)
12335                         goto err_nvm;
12336                 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12337                 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12338         }
12339         return ret;
12340
12341 err_nvm:
12342         dev_warn(&pf->pdev->dev,
12343                  "total-port-shutdown feature is off due to read nvm error: %s\n",
12344                  i40e_stat_str(&pf->hw, read_status));
12345         return ret;
12346 }
12347
12348 /**
12349  * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12350  * @pf: board private structure to initialize
12351  *
12352  * i40e_sw_init initializes the Adapter private data structure.
12353  * Fields are initialized based on PCI device information and
12354  * OS network device settings (MTU size).
12355  **/
12356 static int i40e_sw_init(struct i40e_pf *pf)
12357 {
12358         int err = 0;
12359         int size;
12360
12361         /* Set default capability flags */
12362         pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12363                     I40E_FLAG_MSI_ENABLED     |
12364                     I40E_FLAG_MSIX_ENABLED;
12365
12366         /* Set default ITR */
12367         pf->rx_itr_default = I40E_ITR_RX_DEF;
12368         pf->tx_itr_default = I40E_ITR_TX_DEF;
12369
12370         /* Depending on PF configurations, it is possible that the RSS
12371          * maximum might end up larger than the available queues
12372          */
12373         pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12374         pf->alloc_rss_size = 1;
12375         pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12376         pf->rss_size_max = min_t(int, pf->rss_size_max,
12377                                  pf->hw.func_caps.num_tx_qp);
12378         if (pf->hw.func_caps.rss) {
12379                 pf->flags |= I40E_FLAG_RSS_ENABLED;
12380                 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12381                                            num_online_cpus());
12382         }
12383
12384         /* MFP mode enabled */
12385         if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12386                 pf->flags |= I40E_FLAG_MFP_ENABLED;
12387                 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12388                 if (i40e_get_partition_bw_setting(pf)) {
12389                         dev_warn(&pf->pdev->dev,
12390                                  "Could not get partition bw settings\n");
12391                 } else {
12392                         dev_info(&pf->pdev->dev,
12393                                  "Partition BW Min = %8.8x, Max = %8.8x\n",
12394                                  pf->min_bw, pf->max_bw);
12395
12396                         /* nudge the Tx scheduler */
12397                         i40e_set_partition_bw_setting(pf);
12398                 }
12399         }
12400
12401         if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12402             (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12403                 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12404                 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12405                 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12406                     pf->hw.num_partitions > 1)
12407                         dev_info(&pf->pdev->dev,
12408                                  "Flow Director Sideband mode Disabled in MFP mode\n");
12409                 else
12410                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12411                 pf->fdir_pf_filter_count =
12412                                  pf->hw.func_caps.fd_filters_guaranteed;
12413                 pf->hw.fdir_shared_filter_count =
12414                                  pf->hw.func_caps.fd_filters_best_effort;
12415         }
12416
12417         if (pf->hw.mac.type == I40E_MAC_X722) {
12418                 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12419                                     I40E_HW_128_QP_RSS_CAPABLE |
12420                                     I40E_HW_ATR_EVICT_CAPABLE |
12421                                     I40E_HW_WB_ON_ITR_CAPABLE |
12422                                     I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12423                                     I40E_HW_NO_PCI_LINK_CHECK |
12424                                     I40E_HW_USE_SET_LLDP_MIB |
12425                                     I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12426                                     I40E_HW_PTP_L4_CAPABLE |
12427                                     I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12428                                     I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12429
12430 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12431                 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12432                     I40E_FDEVICT_PCTYPE_DEFAULT) {
12433                         dev_warn(&pf->pdev->dev,
12434                                  "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12435                         pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12436                 }
12437         } else if ((pf->hw.aq.api_maj_ver > 1) ||
12438                    ((pf->hw.aq.api_maj_ver == 1) &&
12439                     (pf->hw.aq.api_min_ver > 4))) {
12440                 /* Supported in FW API version higher than 1.4 */
12441                 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12442         }
12443
12444         /* Enable HW ATR eviction if possible */
12445         if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12446                 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12447
12448         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12449             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12450             (pf->hw.aq.fw_maj_ver < 4))) {
12451                 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12452                 /* No DCB support  for FW < v4.33 */
12453                 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12454         }
12455
12456         /* Disable FW LLDP if FW < v4.3 */
12457         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12458             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12459             (pf->hw.aq.fw_maj_ver < 4)))
12460                 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12461
12462         /* Use the FW Set LLDP MIB API if FW > v4.40 */
12463         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12464             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12465             (pf->hw.aq.fw_maj_ver >= 5)))
12466                 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12467
12468         /* Enable PTP L4 if FW > v6.0 */
12469         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12470             pf->hw.aq.fw_maj_ver >= 6)
12471                 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12472
12473         if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12474                 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12475                 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12476                 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12477         }
12478
12479         if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12480                 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12481                 /* IWARP needs one extra vector for CQP just like MISC.*/
12482                 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12483         }
12484         /* Stopping FW LLDP engine is supported on XL710 and X722
12485          * starting from FW versions determined in i40e_init_adminq.
12486          * Stopping the FW LLDP engine is not supported on XL710
12487          * if NPAR is functioning so unset this hw flag in this case.
12488          */
12489         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12490             pf->hw.func_caps.npar_enable &&
12491             (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12492                 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12493
12494 #ifdef CONFIG_PCI_IOV
12495         if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12496                 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12497                 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12498                 pf->num_req_vfs = min_t(int,
12499                                         pf->hw.func_caps.num_vfs,
12500                                         I40E_MAX_VF_COUNT);
12501         }
12502 #endif /* CONFIG_PCI_IOV */
12503         pf->eeprom_version = 0xDEAD;
12504         pf->lan_veb = I40E_NO_VEB;
12505         pf->lan_vsi = I40E_NO_VSI;
12506
12507         /* By default FW has this off for performance reasons */
12508         pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12509
12510         /* set up queue assignment tracking */
12511         size = sizeof(struct i40e_lump_tracking)
12512                 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12513         pf->qp_pile = kzalloc(size, GFP_KERNEL);
12514         if (!pf->qp_pile) {
12515                 err = -ENOMEM;
12516                 goto sw_init_done;
12517         }
12518         pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12519         pf->qp_pile->search_hint = 0;
12520
12521         pf->tx_timeout_recovery_level = 1;
12522
12523         if (pf->hw.mac.type != I40E_MAC_X722 &&
12524             i40e_is_total_port_shutdown_enabled(pf)) {
12525                 /* Link down on close must be on when total port shutdown
12526                  * is enabled for a given port
12527                  */
12528                 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12529                               I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12530                 dev_info(&pf->pdev->dev,
12531                          "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12532         }
12533         mutex_init(&pf->switch_mutex);
12534
12535 sw_init_done:
12536         return err;
12537 }
12538
12539 /**
12540  * i40e_set_ntuple - set the ntuple feature flag and take action
12541  * @pf: board private structure to initialize
12542  * @features: the feature set that the stack is suggesting
12543  *
12544  * returns a bool to indicate if reset needs to happen
12545  **/
12546 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12547 {
12548         bool need_reset = false;
12549
12550         /* Check if Flow Director n-tuple support was enabled or disabled.  If
12551          * the state changed, we need to reset.
12552          */
12553         if (features & NETIF_F_NTUPLE) {
12554                 /* Enable filters and mark for reset */
12555                 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12556                         need_reset = true;
12557                 /* enable FD_SB only if there is MSI-X vector and no cloud
12558                  * filters exist
12559                  */
12560                 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12561                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12562                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12563                 }
12564         } else {
12565                 /* turn off filters, mark for reset and clear SW filter list */
12566                 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12567                         need_reset = true;
12568                         i40e_fdir_filter_exit(pf);
12569                 }
12570                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12571                 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12572                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12573
12574                 /* reset fd counters */
12575                 pf->fd_add_err = 0;
12576                 pf->fd_atr_cnt = 0;
12577                 /* if ATR was auto disabled it can be re-enabled. */
12578                 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12579                         if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12580                             (I40E_DEBUG_FD & pf->hw.debug_mask))
12581                                 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12582         }
12583         return need_reset;
12584 }
12585
12586 /**
12587  * i40e_clear_rss_lut - clear the rx hash lookup table
12588  * @vsi: the VSI being configured
12589  **/
12590 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12591 {
12592         struct i40e_pf *pf = vsi->back;
12593         struct i40e_hw *hw = &pf->hw;
12594         u16 vf_id = vsi->vf_id;
12595         u8 i;
12596
12597         if (vsi->type == I40E_VSI_MAIN) {
12598                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12599                         wr32(hw, I40E_PFQF_HLUT(i), 0);
12600         } else if (vsi->type == I40E_VSI_SRIOV) {
12601                 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12602                         i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12603         } else {
12604                 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12605         }
12606 }
12607
12608 /**
12609  * i40e_set_features - set the netdev feature flags
12610  * @netdev: ptr to the netdev being adjusted
12611  * @features: the feature set that the stack is suggesting
12612  * Note: expects to be called while under rtnl_lock()
12613  **/
12614 static int i40e_set_features(struct net_device *netdev,
12615                              netdev_features_t features)
12616 {
12617         struct i40e_netdev_priv *np = netdev_priv(netdev);
12618         struct i40e_vsi *vsi = np->vsi;
12619         struct i40e_pf *pf = vsi->back;
12620         bool need_reset;
12621
12622         if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12623                 i40e_pf_config_rss(pf);
12624         else if (!(features & NETIF_F_RXHASH) &&
12625                  netdev->features & NETIF_F_RXHASH)
12626                 i40e_clear_rss_lut(vsi);
12627
12628         if (features & NETIF_F_HW_VLAN_CTAG_RX)
12629                 i40e_vlan_stripping_enable(vsi);
12630         else
12631                 i40e_vlan_stripping_disable(vsi);
12632
12633         if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12634                 dev_err(&pf->pdev->dev,
12635                         "Offloaded tc filters active, can't turn hw_tc_offload off");
12636                 return -EINVAL;
12637         }
12638
12639         if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12640                 i40e_del_all_macvlans(vsi);
12641
12642         need_reset = i40e_set_ntuple(pf, features);
12643
12644         if (need_reset)
12645                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12646
12647         return 0;
12648 }
12649
12650 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12651                                     unsigned int table, unsigned int idx,
12652                                     struct udp_tunnel_info *ti)
12653 {
12654         struct i40e_netdev_priv *np = netdev_priv(netdev);
12655         struct i40e_hw *hw = &np->vsi->back->hw;
12656         u8 type, filter_index;
12657         i40e_status ret;
12658
12659         type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12660                                                    I40E_AQC_TUNNEL_TYPE_NGE;
12661
12662         ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12663                                      NULL);
12664         if (ret) {
12665                 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n",
12666                             i40e_stat_str(hw, ret),
12667                             i40e_aq_str(hw, hw->aq.asq_last_status));
12668                 return -EIO;
12669         }
12670
12671         udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
12672         return 0;
12673 }
12674
12675 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12676                                       unsigned int table, unsigned int idx,
12677                                       struct udp_tunnel_info *ti)
12678 {
12679         struct i40e_netdev_priv *np = netdev_priv(netdev);
12680         struct i40e_hw *hw = &np->vsi->back->hw;
12681         i40e_status ret;
12682
12683         ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
12684         if (ret) {
12685                 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n",
12686                             i40e_stat_str(hw, ret),
12687                             i40e_aq_str(hw, hw->aq.asq_last_status));
12688                 return -EIO;
12689         }
12690
12691         return 0;
12692 }
12693
12694 static int i40e_get_phys_port_id(struct net_device *netdev,
12695                                  struct netdev_phys_item_id *ppid)
12696 {
12697         struct i40e_netdev_priv *np = netdev_priv(netdev);
12698         struct i40e_pf *pf = np->vsi->back;
12699         struct i40e_hw *hw = &pf->hw;
12700
12701         if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12702                 return -EOPNOTSUPP;
12703
12704         ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12705         memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12706
12707         return 0;
12708 }
12709
12710 /**
12711  * i40e_ndo_fdb_add - add an entry to the hardware database
12712  * @ndm: the input from the stack
12713  * @tb: pointer to array of nladdr (unused)
12714  * @dev: the net device pointer
12715  * @addr: the MAC address entry being added
12716  * @vid: VLAN ID
12717  * @flags: instructions from stack about fdb operation
12718  * @extack: netlink extended ack, unused currently
12719  */
12720 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12721                             struct net_device *dev,
12722                             const unsigned char *addr, u16 vid,
12723                             u16 flags,
12724                             struct netlink_ext_ack *extack)
12725 {
12726         struct i40e_netdev_priv *np = netdev_priv(dev);
12727         struct i40e_pf *pf = np->vsi->back;
12728         int err = 0;
12729
12730         if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12731                 return -EOPNOTSUPP;
12732
12733         if (vid) {
12734                 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12735                 return -EINVAL;
12736         }
12737
12738         /* Hardware does not support aging addresses so if a
12739          * ndm_state is given only allow permanent addresses
12740          */
12741         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12742                 netdev_info(dev, "FDB only supports static addresses\n");
12743                 return -EINVAL;
12744         }
12745
12746         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12747                 err = dev_uc_add_excl(dev, addr);
12748         else if (is_multicast_ether_addr(addr))
12749                 err = dev_mc_add_excl(dev, addr);
12750         else
12751                 err = -EINVAL;
12752
12753         /* Only return duplicate errors if NLM_F_EXCL is set */
12754         if (err == -EEXIST && !(flags & NLM_F_EXCL))
12755                 err = 0;
12756
12757         return err;
12758 }
12759
12760 /**
12761  * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12762  * @dev: the netdev being configured
12763  * @nlh: RTNL message
12764  * @flags: bridge flags
12765  * @extack: netlink extended ack
12766  *
12767  * Inserts a new hardware bridge if not already created and
12768  * enables the bridging mode requested (VEB or VEPA). If the
12769  * hardware bridge has already been inserted and the request
12770  * is to change the mode then that requires a PF reset to
12771  * allow rebuild of the components with required hardware
12772  * bridge mode enabled.
12773  *
12774  * Note: expects to be called while under rtnl_lock()
12775  **/
12776 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12777                                    struct nlmsghdr *nlh,
12778                                    u16 flags,
12779                                    struct netlink_ext_ack *extack)
12780 {
12781         struct i40e_netdev_priv *np = netdev_priv(dev);
12782         struct i40e_vsi *vsi = np->vsi;
12783         struct i40e_pf *pf = vsi->back;
12784         struct i40e_veb *veb = NULL;
12785         struct nlattr *attr, *br_spec;
12786         int i, rem;
12787
12788         /* Only for PF VSI for now */
12789         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12790                 return -EOPNOTSUPP;
12791
12792         /* Find the HW bridge for PF VSI */
12793         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12794                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12795                         veb = pf->veb[i];
12796         }
12797
12798         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12799
12800         nla_for_each_nested(attr, br_spec, rem) {
12801                 __u16 mode;
12802
12803                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12804                         continue;
12805
12806                 mode = nla_get_u16(attr);
12807                 if ((mode != BRIDGE_MODE_VEPA) &&
12808                     (mode != BRIDGE_MODE_VEB))
12809                         return -EINVAL;
12810
12811                 /* Insert a new HW bridge */
12812                 if (!veb) {
12813                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12814                                              vsi->tc_config.enabled_tc);
12815                         if (veb) {
12816                                 veb->bridge_mode = mode;
12817                                 i40e_config_bridge_mode(veb);
12818                         } else {
12819                                 /* No Bridge HW offload available */
12820                                 return -ENOENT;
12821                         }
12822                         break;
12823                 } else if (mode != veb->bridge_mode) {
12824                         /* Existing HW bridge but different mode needs reset */
12825                         veb->bridge_mode = mode;
12826                         /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
12827                         if (mode == BRIDGE_MODE_VEB)
12828                                 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
12829                         else
12830                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12831                         i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12832                         break;
12833                 }
12834         }
12835
12836         return 0;
12837 }
12838
12839 /**
12840  * i40e_ndo_bridge_getlink - Get the hardware bridge mode
12841  * @skb: skb buff
12842  * @pid: process id
12843  * @seq: RTNL message seq #
12844  * @dev: the netdev being configured
12845  * @filter_mask: unused
12846  * @nlflags: netlink flags passed in
12847  *
12848  * Return the mode in which the hardware bridge is operating in
12849  * i.e VEB or VEPA.
12850  **/
12851 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
12852                                    struct net_device *dev,
12853                                    u32 __always_unused filter_mask,
12854                                    int nlflags)
12855 {
12856         struct i40e_netdev_priv *np = netdev_priv(dev);
12857         struct i40e_vsi *vsi = np->vsi;
12858         struct i40e_pf *pf = vsi->back;
12859         struct i40e_veb *veb = NULL;
12860         int i;
12861
12862         /* Only for PF VSI for now */
12863         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12864                 return -EOPNOTSUPP;
12865
12866         /* Find the HW bridge for the PF VSI */
12867         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12868                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12869                         veb = pf->veb[i];
12870         }
12871
12872         if (!veb)
12873                 return 0;
12874
12875         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
12876                                        0, 0, nlflags, filter_mask, NULL);
12877 }
12878
12879 /**
12880  * i40e_features_check - Validate encapsulated packet conforms to limits
12881  * @skb: skb buff
12882  * @dev: This physical port's netdev
12883  * @features: Offload features that the stack believes apply
12884  **/
12885 static netdev_features_t i40e_features_check(struct sk_buff *skb,
12886                                              struct net_device *dev,
12887                                              netdev_features_t features)
12888 {
12889         size_t len;
12890
12891         /* No point in doing any of this if neither checksum nor GSO are
12892          * being requested for this frame.  We can rule out both by just
12893          * checking for CHECKSUM_PARTIAL
12894          */
12895         if (skb->ip_summed != CHECKSUM_PARTIAL)
12896                 return features;
12897
12898         /* We cannot support GSO if the MSS is going to be less than
12899          * 64 bytes.  If it is then we need to drop support for GSO.
12900          */
12901         if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
12902                 features &= ~NETIF_F_GSO_MASK;
12903
12904         /* MACLEN can support at most 63 words */
12905         len = skb_network_header(skb) - skb->data;
12906         if (len & ~(63 * 2))
12907                 goto out_err;
12908
12909         /* IPLEN and EIPLEN can support at most 127 dwords */
12910         len = skb_transport_header(skb) - skb_network_header(skb);
12911         if (len & ~(127 * 4))
12912                 goto out_err;
12913
12914         if (skb->encapsulation) {
12915                 /* L4TUNLEN can support 127 words */
12916                 len = skb_inner_network_header(skb) - skb_transport_header(skb);
12917                 if (len & ~(127 * 2))
12918                         goto out_err;
12919
12920                 /* IPLEN can support at most 127 dwords */
12921                 len = skb_inner_transport_header(skb) -
12922                       skb_inner_network_header(skb);
12923                 if (len & ~(127 * 4))
12924                         goto out_err;
12925         }
12926
12927         /* No need to validate L4LEN as TCP is the only protocol with a
12928          * a flexible value and we support all possible values supported
12929          * by TCP, which is at most 15 dwords
12930          */
12931
12932         return features;
12933 out_err:
12934         return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
12935 }
12936
12937 /**
12938  * i40e_xdp_setup - add/remove an XDP program
12939  * @vsi: VSI to changed
12940  * @prog: XDP program
12941  * @extack: netlink extended ack
12942  **/
12943 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
12944                           struct netlink_ext_ack *extack)
12945 {
12946         int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
12947         struct i40e_pf *pf = vsi->back;
12948         struct bpf_prog *old_prog;
12949         bool need_reset;
12950         int i;
12951
12952         /* Don't allow frames that span over multiple buffers */
12953         if (frame_size > vsi->rx_buf_len) {
12954                 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP");
12955                 return -EINVAL;
12956         }
12957
12958         /* When turning XDP on->off/off->on we reset and rebuild the rings. */
12959         need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
12960
12961         if (need_reset)
12962                 i40e_prep_for_reset(pf);
12963
12964         old_prog = xchg(&vsi->xdp_prog, prog);
12965
12966         if (need_reset) {
12967                 if (!prog)
12968                         /* Wait until ndo_xsk_wakeup completes. */
12969                         synchronize_rcu();
12970                 i40e_reset_and_rebuild(pf, true, true);
12971         }
12972
12973         for (i = 0; i < vsi->num_queue_pairs; i++)
12974                 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
12975
12976         if (old_prog)
12977                 bpf_prog_put(old_prog);
12978
12979         /* Kick start the NAPI context if there is an AF_XDP socket open
12980          * on that queue id. This so that receiving will start.
12981          */
12982         if (need_reset && prog)
12983                 for (i = 0; i < vsi->num_queue_pairs; i++)
12984                         if (vsi->xdp_rings[i]->xsk_pool)
12985                                 (void)i40e_xsk_wakeup(vsi->netdev, i,
12986                                                       XDP_WAKEUP_RX);
12987
12988         return 0;
12989 }
12990
12991 /**
12992  * i40e_enter_busy_conf - Enters busy config state
12993  * @vsi: vsi
12994  *
12995  * Returns 0 on success, <0 for failure.
12996  **/
12997 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
12998 {
12999         struct i40e_pf *pf = vsi->back;
13000         int timeout = 50;
13001
13002         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13003                 timeout--;
13004                 if (!timeout)
13005                         return -EBUSY;
13006                 usleep_range(1000, 2000);
13007         }
13008
13009         return 0;
13010 }
13011
13012 /**
13013  * i40e_exit_busy_conf - Exits busy config state
13014  * @vsi: vsi
13015  **/
13016 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13017 {
13018         struct i40e_pf *pf = vsi->back;
13019
13020         clear_bit(__I40E_CONFIG_BUSY, pf->state);
13021 }
13022
13023 /**
13024  * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13025  * @vsi: vsi
13026  * @queue_pair: queue pair
13027  **/
13028 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13029 {
13030         memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13031                sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13032         memset(&vsi->tx_rings[queue_pair]->stats, 0,
13033                sizeof(vsi->tx_rings[queue_pair]->stats));
13034         if (i40e_enabled_xdp_vsi(vsi)) {
13035                 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13036                        sizeof(vsi->xdp_rings[queue_pair]->stats));
13037         }
13038 }
13039
13040 /**
13041  * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13042  * @vsi: vsi
13043  * @queue_pair: queue pair
13044  **/
13045 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13046 {
13047         i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13048         if (i40e_enabled_xdp_vsi(vsi)) {
13049                 /* Make sure that in-progress ndo_xdp_xmit calls are
13050                  * completed.
13051                  */
13052                 synchronize_rcu();
13053                 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13054         }
13055         i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13056 }
13057
13058 /**
13059  * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13060  * @vsi: vsi
13061  * @queue_pair: queue pair
13062  * @enable: true for enable, false for disable
13063  **/
13064 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13065                                         bool enable)
13066 {
13067         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13068         struct i40e_q_vector *q_vector = rxr->q_vector;
13069
13070         if (!vsi->netdev)
13071                 return;
13072
13073         /* All rings in a qp belong to the same qvector. */
13074         if (q_vector->rx.ring || q_vector->tx.ring) {
13075                 if (enable)
13076                         napi_enable(&q_vector->napi);
13077                 else
13078                         napi_disable(&q_vector->napi);
13079         }
13080 }
13081
13082 /**
13083  * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13084  * @vsi: vsi
13085  * @queue_pair: queue pair
13086  * @enable: true for enable, false for disable
13087  *
13088  * Returns 0 on success, <0 on failure.
13089  **/
13090 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13091                                         bool enable)
13092 {
13093         struct i40e_pf *pf = vsi->back;
13094         int pf_q, ret = 0;
13095
13096         pf_q = vsi->base_queue + queue_pair;
13097         ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13098                                      false /*is xdp*/, enable);
13099         if (ret) {
13100                 dev_info(&pf->pdev->dev,
13101                          "VSI seid %d Tx ring %d %sable timeout\n",
13102                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13103                 return ret;
13104         }
13105
13106         i40e_control_rx_q(pf, pf_q, enable);
13107         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13108         if (ret) {
13109                 dev_info(&pf->pdev->dev,
13110                          "VSI seid %d Rx ring %d %sable timeout\n",
13111                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13112                 return ret;
13113         }
13114
13115         /* Due to HW errata, on Rx disable only, the register can
13116          * indicate done before it really is. Needs 50ms to be sure
13117          */
13118         if (!enable)
13119                 mdelay(50);
13120
13121         if (!i40e_enabled_xdp_vsi(vsi))
13122                 return ret;
13123
13124         ret = i40e_control_wait_tx_q(vsi->seid, pf,
13125                                      pf_q + vsi->alloc_queue_pairs,
13126                                      true /*is xdp*/, enable);
13127         if (ret) {
13128                 dev_info(&pf->pdev->dev,
13129                          "VSI seid %d XDP Tx ring %d %sable timeout\n",
13130                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13131         }
13132
13133         return ret;
13134 }
13135
13136 /**
13137  * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13138  * @vsi: vsi
13139  * @queue_pair: queue_pair
13140  **/
13141 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13142 {
13143         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13144         struct i40e_pf *pf = vsi->back;
13145         struct i40e_hw *hw = &pf->hw;
13146
13147         /* All rings in a qp belong to the same qvector. */
13148         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13149                 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13150         else
13151                 i40e_irq_dynamic_enable_icr0(pf);
13152
13153         i40e_flush(hw);
13154 }
13155
13156 /**
13157  * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13158  * @vsi: vsi
13159  * @queue_pair: queue_pair
13160  **/
13161 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13162 {
13163         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13164         struct i40e_pf *pf = vsi->back;
13165         struct i40e_hw *hw = &pf->hw;
13166
13167         /* For simplicity, instead of removing the qp interrupt causes
13168          * from the interrupt linked list, we simply disable the interrupt, and
13169          * leave the list intact.
13170          *
13171          * All rings in a qp belong to the same qvector.
13172          */
13173         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13174                 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13175
13176                 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13177                 i40e_flush(hw);
13178                 synchronize_irq(pf->msix_entries[intpf].vector);
13179         } else {
13180                 /* Legacy and MSI mode - this stops all interrupt handling */
13181                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13182                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13183                 i40e_flush(hw);
13184                 synchronize_irq(pf->pdev->irq);
13185         }
13186 }
13187
13188 /**
13189  * i40e_queue_pair_disable - Disables a queue pair
13190  * @vsi: vsi
13191  * @queue_pair: queue pair
13192  *
13193  * Returns 0 on success, <0 on failure.
13194  **/
13195 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13196 {
13197         int err;
13198
13199         err = i40e_enter_busy_conf(vsi);
13200         if (err)
13201                 return err;
13202
13203         i40e_queue_pair_disable_irq(vsi, queue_pair);
13204         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13205         i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13206         i40e_queue_pair_clean_rings(vsi, queue_pair);
13207         i40e_queue_pair_reset_stats(vsi, queue_pair);
13208
13209         return err;
13210 }
13211
13212 /**
13213  * i40e_queue_pair_enable - Enables a queue pair
13214  * @vsi: vsi
13215  * @queue_pair: queue pair
13216  *
13217  * Returns 0 on success, <0 on failure.
13218  **/
13219 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13220 {
13221         int err;
13222
13223         err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13224         if (err)
13225                 return err;
13226
13227         if (i40e_enabled_xdp_vsi(vsi)) {
13228                 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13229                 if (err)
13230                         return err;
13231         }
13232
13233         err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13234         if (err)
13235                 return err;
13236
13237         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13238         i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13239         i40e_queue_pair_enable_irq(vsi, queue_pair);
13240
13241         i40e_exit_busy_conf(vsi);
13242
13243         return err;
13244 }
13245
13246 /**
13247  * i40e_xdp - implements ndo_bpf for i40e
13248  * @dev: netdevice
13249  * @xdp: XDP command
13250  **/
13251 static int i40e_xdp(struct net_device *dev,
13252                     struct netdev_bpf *xdp)
13253 {
13254         struct i40e_netdev_priv *np = netdev_priv(dev);
13255         struct i40e_vsi *vsi = np->vsi;
13256
13257         if (vsi->type != I40E_VSI_MAIN)
13258                 return -EINVAL;
13259
13260         switch (xdp->command) {
13261         case XDP_SETUP_PROG:
13262                 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13263         case XDP_SETUP_XSK_POOL:
13264                 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13265                                            xdp->xsk.queue_id);
13266         default:
13267                 return -EINVAL;
13268         }
13269 }
13270
13271 static const struct net_device_ops i40e_netdev_ops = {
13272         .ndo_open               = i40e_open,
13273         .ndo_stop               = i40e_close,
13274         .ndo_start_xmit         = i40e_lan_xmit_frame,
13275         .ndo_get_stats64        = i40e_get_netdev_stats_struct,
13276         .ndo_set_rx_mode        = i40e_set_rx_mode,
13277         .ndo_validate_addr      = eth_validate_addr,
13278         .ndo_set_mac_address    = i40e_set_mac,
13279         .ndo_change_mtu         = i40e_change_mtu,
13280         .ndo_do_ioctl           = i40e_ioctl,
13281         .ndo_tx_timeout         = i40e_tx_timeout,
13282         .ndo_vlan_rx_add_vid    = i40e_vlan_rx_add_vid,
13283         .ndo_vlan_rx_kill_vid   = i40e_vlan_rx_kill_vid,
13284 #ifdef CONFIG_NET_POLL_CONTROLLER
13285         .ndo_poll_controller    = i40e_netpoll,
13286 #endif
13287         .ndo_setup_tc           = __i40e_setup_tc,
13288         .ndo_set_features       = i40e_set_features,
13289         .ndo_set_vf_mac         = i40e_ndo_set_vf_mac,
13290         .ndo_set_vf_vlan        = i40e_ndo_set_vf_port_vlan,
13291         .ndo_get_vf_stats       = i40e_get_vf_stats,
13292         .ndo_set_vf_rate        = i40e_ndo_set_vf_bw,
13293         .ndo_get_vf_config      = i40e_ndo_get_vf_config,
13294         .ndo_set_vf_link_state  = i40e_ndo_set_vf_link_state,
13295         .ndo_set_vf_spoofchk    = i40e_ndo_set_vf_spoofchk,
13296         .ndo_set_vf_trust       = i40e_ndo_set_vf_trust,
13297         .ndo_get_phys_port_id   = i40e_get_phys_port_id,
13298         .ndo_fdb_add            = i40e_ndo_fdb_add,
13299         .ndo_features_check     = i40e_features_check,
13300         .ndo_bridge_getlink     = i40e_ndo_bridge_getlink,
13301         .ndo_bridge_setlink     = i40e_ndo_bridge_setlink,
13302         .ndo_bpf                = i40e_xdp,
13303         .ndo_xdp_xmit           = i40e_xdp_xmit,
13304         .ndo_xsk_wakeup         = i40e_xsk_wakeup,
13305         .ndo_dfwd_add_station   = i40e_fwd_add,
13306         .ndo_dfwd_del_station   = i40e_fwd_del,
13307 };
13308
13309 /**
13310  * i40e_config_netdev - Setup the netdev flags
13311  * @vsi: the VSI being configured
13312  *
13313  * Returns 0 on success, negative value on failure
13314  **/
13315 static int i40e_config_netdev(struct i40e_vsi *vsi)
13316 {
13317         struct i40e_pf *pf = vsi->back;
13318         struct i40e_hw *hw = &pf->hw;
13319         struct i40e_netdev_priv *np;
13320         struct net_device *netdev;
13321         u8 broadcast[ETH_ALEN];
13322         u8 mac_addr[ETH_ALEN];
13323         int etherdev_size;
13324         netdev_features_t hw_enc_features;
13325         netdev_features_t hw_features;
13326
13327         etherdev_size = sizeof(struct i40e_netdev_priv);
13328         netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13329         if (!netdev)
13330                 return -ENOMEM;
13331
13332         vsi->netdev = netdev;
13333         np = netdev_priv(netdev);
13334         np->vsi = vsi;
13335
13336         hw_enc_features = NETIF_F_SG                    |
13337                           NETIF_F_IP_CSUM               |
13338                           NETIF_F_IPV6_CSUM             |
13339                           NETIF_F_HIGHDMA               |
13340                           NETIF_F_SOFT_FEATURES         |
13341                           NETIF_F_TSO                   |
13342                           NETIF_F_TSO_ECN               |
13343                           NETIF_F_TSO6                  |
13344                           NETIF_F_GSO_GRE               |
13345                           NETIF_F_GSO_GRE_CSUM          |
13346                           NETIF_F_GSO_PARTIAL           |
13347                           NETIF_F_GSO_IPXIP4            |
13348                           NETIF_F_GSO_IPXIP6            |
13349                           NETIF_F_GSO_UDP_TUNNEL        |
13350                           NETIF_F_GSO_UDP_TUNNEL_CSUM   |
13351                           NETIF_F_GSO_UDP_L4            |
13352                           NETIF_F_SCTP_CRC              |
13353                           NETIF_F_RXHASH                |
13354                           NETIF_F_RXCSUM                |
13355                           0;
13356
13357         if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13358                 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13359
13360         netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13361
13362         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13363
13364         netdev->hw_enc_features |= hw_enc_features;
13365
13366         /* record features VLANs can make use of */
13367         netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13368
13369         /* enable macvlan offloads */
13370         netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13371
13372         hw_features = hw_enc_features           |
13373                       NETIF_F_HW_VLAN_CTAG_TX   |
13374                       NETIF_F_HW_VLAN_CTAG_RX;
13375
13376         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13377                 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13378
13379         netdev->hw_features |= hw_features;
13380
13381         netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13382         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13383
13384         if (vsi->type == I40E_VSI_MAIN) {
13385                 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13386                 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13387                 /* The following steps are necessary for two reasons. First,
13388                  * some older NVM configurations load a default MAC-VLAN
13389                  * filter that will accept any tagged packet, and we want to
13390                  * replace this with a normal filter. Additionally, it is
13391                  * possible our MAC address was provided by the platform using
13392                  * Open Firmware or similar.
13393                  *
13394                  * Thus, we need to remove the default filter and install one
13395                  * specific to the MAC address.
13396                  */
13397                 i40e_rm_default_mac_filter(vsi, mac_addr);
13398                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13399                 i40e_add_mac_filter(vsi, mac_addr);
13400                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13401         } else {
13402                 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13403                  * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13404                  * the end, which is 4 bytes long, so force truncation of the
13405                  * original name by IFNAMSIZ - 4
13406                  */
13407                 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13408                          IFNAMSIZ - 4,
13409                          pf->vsi[pf->lan_vsi]->netdev->name);
13410                 eth_random_addr(mac_addr);
13411
13412                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13413                 i40e_add_mac_filter(vsi, mac_addr);
13414                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13415         }
13416
13417         /* Add the broadcast filter so that we initially will receive
13418          * broadcast packets. Note that when a new VLAN is first added the
13419          * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13420          * specific filters as part of transitioning into "vlan" operation.
13421          * When more VLANs are added, the driver will copy each existing MAC
13422          * filter and add it for the new VLAN.
13423          *
13424          * Broadcast filters are handled specially by
13425          * i40e_sync_filters_subtask, as the driver must to set the broadcast
13426          * promiscuous bit instead of adding this directly as a MAC/VLAN
13427          * filter. The subtask will update the correct broadcast promiscuous
13428          * bits as VLANs become active or inactive.
13429          */
13430         eth_broadcast_addr(broadcast);
13431         spin_lock_bh(&vsi->mac_filter_hash_lock);
13432         i40e_add_mac_filter(vsi, broadcast);
13433         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13434
13435         ether_addr_copy(netdev->dev_addr, mac_addr);
13436         ether_addr_copy(netdev->perm_addr, mac_addr);
13437
13438         /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13439         netdev->neigh_priv_len = sizeof(u32) * 4;
13440
13441         netdev->priv_flags |= IFF_UNICAST_FLT;
13442         netdev->priv_flags |= IFF_SUPP_NOFCS;
13443         /* Setup netdev TC information */
13444         i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13445
13446         netdev->netdev_ops = &i40e_netdev_ops;
13447         netdev->watchdog_timeo = 5 * HZ;
13448         i40e_set_ethtool_ops(netdev);
13449
13450         /* MTU range: 68 - 9706 */
13451         netdev->min_mtu = ETH_MIN_MTU;
13452         netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13453
13454         return 0;
13455 }
13456
13457 /**
13458  * i40e_vsi_delete - Delete a VSI from the switch
13459  * @vsi: the VSI being removed
13460  *
13461  * Returns 0 on success, negative value on failure
13462  **/
13463 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13464 {
13465         /* remove default VSI is not allowed */
13466         if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13467                 return;
13468
13469         i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13470 }
13471
13472 /**
13473  * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13474  * @vsi: the VSI being queried
13475  *
13476  * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13477  **/
13478 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13479 {
13480         struct i40e_veb *veb;
13481         struct i40e_pf *pf = vsi->back;
13482
13483         /* Uplink is not a bridge so default to VEB */
13484         if (vsi->veb_idx >= I40E_MAX_VEB)
13485                 return 1;
13486
13487         veb = pf->veb[vsi->veb_idx];
13488         if (!veb) {
13489                 dev_info(&pf->pdev->dev,
13490                          "There is no veb associated with the bridge\n");
13491                 return -ENOENT;
13492         }
13493
13494         /* Uplink is a bridge in VEPA mode */
13495         if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13496                 return 0;
13497         } else {
13498                 /* Uplink is a bridge in VEB mode */
13499                 return 1;
13500         }
13501
13502         /* VEPA is now default bridge, so return 0 */
13503         return 0;
13504 }
13505
13506 /**
13507  * i40e_add_vsi - Add a VSI to the switch
13508  * @vsi: the VSI being configured
13509  *
13510  * This initializes a VSI context depending on the VSI type to be added and
13511  * passes it down to the add_vsi aq command.
13512  **/
13513 static int i40e_add_vsi(struct i40e_vsi *vsi)
13514 {
13515         int ret = -ENODEV;
13516         struct i40e_pf *pf = vsi->back;
13517         struct i40e_hw *hw = &pf->hw;
13518         struct i40e_vsi_context ctxt;
13519         struct i40e_mac_filter *f;
13520         struct hlist_node *h;
13521         int bkt;
13522
13523         u8 enabled_tc = 0x1; /* TC0 enabled */
13524         int f_count = 0;
13525
13526         memset(&ctxt, 0, sizeof(ctxt));
13527         switch (vsi->type) {
13528         case I40E_VSI_MAIN:
13529                 /* The PF's main VSI is already setup as part of the
13530                  * device initialization, so we'll not bother with
13531                  * the add_vsi call, but we will retrieve the current
13532                  * VSI context.
13533                  */
13534                 ctxt.seid = pf->main_vsi_seid;
13535                 ctxt.pf_num = pf->hw.pf_id;
13536                 ctxt.vf_num = 0;
13537                 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13538                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13539                 if (ret) {
13540                         dev_info(&pf->pdev->dev,
13541                                  "couldn't get PF vsi config, err %s aq_err %s\n",
13542                                  i40e_stat_str(&pf->hw, ret),
13543                                  i40e_aq_str(&pf->hw,
13544                                              pf->hw.aq.asq_last_status));
13545                         return -ENOENT;
13546                 }
13547                 vsi->info = ctxt.info;
13548                 vsi->info.valid_sections = 0;
13549
13550                 vsi->seid = ctxt.seid;
13551                 vsi->id = ctxt.vsi_number;
13552
13553                 enabled_tc = i40e_pf_get_tc_map(pf);
13554
13555                 /* Source pruning is enabled by default, so the flag is
13556                  * negative logic - if it's set, we need to fiddle with
13557                  * the VSI to disable source pruning.
13558                  */
13559                 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13560                         memset(&ctxt, 0, sizeof(ctxt));
13561                         ctxt.seid = pf->main_vsi_seid;
13562                         ctxt.pf_num = pf->hw.pf_id;
13563                         ctxt.vf_num = 0;
13564                         ctxt.info.valid_sections |=
13565                                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13566                         ctxt.info.switch_id =
13567                                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13568                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13569                         if (ret) {
13570                                 dev_info(&pf->pdev->dev,
13571                                          "update vsi failed, err %s aq_err %s\n",
13572                                          i40e_stat_str(&pf->hw, ret),
13573                                          i40e_aq_str(&pf->hw,
13574                                                      pf->hw.aq.asq_last_status));
13575                                 ret = -ENOENT;
13576                                 goto err;
13577                         }
13578                 }
13579
13580                 /* MFP mode setup queue map and update VSI */
13581                 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13582                     !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13583                         memset(&ctxt, 0, sizeof(ctxt));
13584                         ctxt.seid = pf->main_vsi_seid;
13585                         ctxt.pf_num = pf->hw.pf_id;
13586                         ctxt.vf_num = 0;
13587                         i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13588                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13589                         if (ret) {
13590                                 dev_info(&pf->pdev->dev,
13591                                          "update vsi failed, err %s aq_err %s\n",
13592                                          i40e_stat_str(&pf->hw, ret),
13593                                          i40e_aq_str(&pf->hw,
13594                                                     pf->hw.aq.asq_last_status));
13595                                 ret = -ENOENT;
13596                                 goto err;
13597                         }
13598                         /* update the local VSI info queue map */
13599                         i40e_vsi_update_queue_map(vsi, &ctxt);
13600                         vsi->info.valid_sections = 0;
13601                 } else {
13602                         /* Default/Main VSI is only enabled for TC0
13603                          * reconfigure it to enable all TCs that are
13604                          * available on the port in SFP mode.
13605                          * For MFP case the iSCSI PF would use this
13606                          * flow to enable LAN+iSCSI TC.
13607                          */
13608                         ret = i40e_vsi_config_tc(vsi, enabled_tc);
13609                         if (ret) {
13610                                 /* Single TC condition is not fatal,
13611                                  * message and continue
13612                                  */
13613                                 dev_info(&pf->pdev->dev,
13614                                          "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13615                                          enabled_tc,
13616                                          i40e_stat_str(&pf->hw, ret),
13617                                          i40e_aq_str(&pf->hw,
13618                                                     pf->hw.aq.asq_last_status));
13619                         }
13620                 }
13621                 break;
13622
13623         case I40E_VSI_FDIR:
13624                 ctxt.pf_num = hw->pf_id;
13625                 ctxt.vf_num = 0;
13626                 ctxt.uplink_seid = vsi->uplink_seid;
13627                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13628                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13629                 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13630                     (i40e_is_vsi_uplink_mode_veb(vsi))) {
13631                         ctxt.info.valid_sections |=
13632                              cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13633                         ctxt.info.switch_id =
13634                            cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13635                 }
13636                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13637                 break;
13638
13639         case I40E_VSI_VMDQ2:
13640                 ctxt.pf_num = hw->pf_id;
13641                 ctxt.vf_num = 0;
13642                 ctxt.uplink_seid = vsi->uplink_seid;
13643                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13644                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13645
13646                 /* This VSI is connected to VEB so the switch_id
13647                  * should be set to zero by default.
13648                  */
13649                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13650                         ctxt.info.valid_sections |=
13651                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13652                         ctxt.info.switch_id =
13653                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13654                 }
13655
13656                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13657                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13658                 break;
13659
13660         case I40E_VSI_SRIOV:
13661                 ctxt.pf_num = hw->pf_id;
13662                 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13663                 ctxt.uplink_seid = vsi->uplink_seid;
13664                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13665                 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13666
13667                 /* This VSI is connected to VEB so the switch_id
13668                  * should be set to zero by default.
13669                  */
13670                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13671                         ctxt.info.valid_sections |=
13672                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13673                         ctxt.info.switch_id =
13674                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13675                 }
13676
13677                 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13678                         ctxt.info.valid_sections |=
13679                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13680                         ctxt.info.queueing_opt_flags |=
13681                                 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13682                                  I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13683                 }
13684
13685                 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13686                 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13687                 if (pf->vf[vsi->vf_id].spoofchk) {
13688                         ctxt.info.valid_sections |=
13689                                 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13690                         ctxt.info.sec_flags |=
13691                                 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13692                                  I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13693                 }
13694                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13695                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13696                 break;
13697
13698         case I40E_VSI_IWARP:
13699                 /* send down message to iWARP */
13700                 break;
13701
13702         default:
13703                 return -ENODEV;
13704         }
13705
13706         if (vsi->type != I40E_VSI_MAIN) {
13707                 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13708                 if (ret) {
13709                         dev_info(&vsi->back->pdev->dev,
13710                                  "add vsi failed, err %s aq_err %s\n",
13711                                  i40e_stat_str(&pf->hw, ret),
13712                                  i40e_aq_str(&pf->hw,
13713                                              pf->hw.aq.asq_last_status));
13714                         ret = -ENOENT;
13715                         goto err;
13716                 }
13717                 vsi->info = ctxt.info;
13718                 vsi->info.valid_sections = 0;
13719                 vsi->seid = ctxt.seid;
13720                 vsi->id = ctxt.vsi_number;
13721         }
13722
13723         vsi->active_filters = 0;
13724         clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13725         spin_lock_bh(&vsi->mac_filter_hash_lock);
13726         /* If macvlan filters already exist, force them to get loaded */
13727         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13728                 f->state = I40E_FILTER_NEW;
13729                 f_count++;
13730         }
13731         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13732
13733         if (f_count) {
13734                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13735                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13736         }
13737
13738         /* Update VSI BW information */
13739         ret = i40e_vsi_get_bw_info(vsi);
13740         if (ret) {
13741                 dev_info(&pf->pdev->dev,
13742                          "couldn't get vsi bw info, err %s aq_err %s\n",
13743                          i40e_stat_str(&pf->hw, ret),
13744                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13745                 /* VSI is already added so not tearing that up */
13746                 ret = 0;
13747         }
13748
13749 err:
13750         return ret;
13751 }
13752
13753 /**
13754  * i40e_vsi_release - Delete a VSI and free its resources
13755  * @vsi: the VSI being removed
13756  *
13757  * Returns 0 on success or < 0 on error
13758  **/
13759 int i40e_vsi_release(struct i40e_vsi *vsi)
13760 {
13761         struct i40e_mac_filter *f;
13762         struct hlist_node *h;
13763         struct i40e_veb *veb = NULL;
13764         struct i40e_pf *pf;
13765         u16 uplink_seid;
13766         int i, n, bkt;
13767
13768         pf = vsi->back;
13769
13770         /* release of a VEB-owner or last VSI is not allowed */
13771         if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13772                 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13773                          vsi->seid, vsi->uplink_seid);
13774                 return -ENODEV;
13775         }
13776         if (vsi == pf->vsi[pf->lan_vsi] &&
13777             !test_bit(__I40E_DOWN, pf->state)) {
13778                 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13779                 return -ENODEV;
13780         }
13781
13782         uplink_seid = vsi->uplink_seid;
13783         if (vsi->type != I40E_VSI_SRIOV) {
13784                 if (vsi->netdev_registered) {
13785                         vsi->netdev_registered = false;
13786                         if (vsi->netdev) {
13787                                 /* results in a call to i40e_close() */
13788                                 unregister_netdev(vsi->netdev);
13789                         }
13790                 } else {
13791                         i40e_vsi_close(vsi);
13792                 }
13793                 i40e_vsi_disable_irq(vsi);
13794         }
13795
13796         spin_lock_bh(&vsi->mac_filter_hash_lock);
13797
13798         /* clear the sync flag on all filters */
13799         if (vsi->netdev) {
13800                 __dev_uc_unsync(vsi->netdev, NULL);
13801                 __dev_mc_unsync(vsi->netdev, NULL);
13802         }
13803
13804         /* make sure any remaining filters are marked for deletion */
13805         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
13806                 __i40e_del_filter(vsi, f);
13807
13808         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13809
13810         i40e_sync_vsi_filters(vsi);
13811
13812         i40e_vsi_delete(vsi);
13813         i40e_vsi_free_q_vectors(vsi);
13814         if (vsi->netdev) {
13815                 free_netdev(vsi->netdev);
13816                 vsi->netdev = NULL;
13817         }
13818         i40e_vsi_clear_rings(vsi);
13819         i40e_vsi_clear(vsi);
13820
13821         /* If this was the last thing on the VEB, except for the
13822          * controlling VSI, remove the VEB, which puts the controlling
13823          * VSI onto the next level down in the switch.
13824          *
13825          * Well, okay, there's one more exception here: don't remove
13826          * the orphan VEBs yet.  We'll wait for an explicit remove request
13827          * from up the network stack.
13828          */
13829         for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
13830                 if (pf->vsi[i] &&
13831                     pf->vsi[i]->uplink_seid == uplink_seid &&
13832                     (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13833                         n++;      /* count the VSIs */
13834                 }
13835         }
13836         for (i = 0; i < I40E_MAX_VEB; i++) {
13837                 if (!pf->veb[i])
13838                         continue;
13839                 if (pf->veb[i]->uplink_seid == uplink_seid)
13840                         n++;     /* count the VEBs */
13841                 if (pf->veb[i]->seid == uplink_seid)
13842                         veb = pf->veb[i];
13843         }
13844         if (n == 0 && veb && veb->uplink_seid != 0)
13845                 i40e_veb_release(veb);
13846
13847         return 0;
13848 }
13849
13850 /**
13851  * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
13852  * @vsi: ptr to the VSI
13853  *
13854  * This should only be called after i40e_vsi_mem_alloc() which allocates the
13855  * corresponding SW VSI structure and initializes num_queue_pairs for the
13856  * newly allocated VSI.
13857  *
13858  * Returns 0 on success or negative on failure
13859  **/
13860 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
13861 {
13862         int ret = -ENOENT;
13863         struct i40e_pf *pf = vsi->back;
13864
13865         if (vsi->q_vectors[0]) {
13866                 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
13867                          vsi->seid);
13868                 return -EEXIST;
13869         }
13870
13871         if (vsi->base_vector) {
13872                 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
13873                          vsi->seid, vsi->base_vector);
13874                 return -EEXIST;
13875         }
13876
13877         ret = i40e_vsi_alloc_q_vectors(vsi);
13878         if (ret) {
13879                 dev_info(&pf->pdev->dev,
13880                          "failed to allocate %d q_vector for VSI %d, ret=%d\n",
13881                          vsi->num_q_vectors, vsi->seid, ret);
13882                 vsi->num_q_vectors = 0;
13883                 goto vector_setup_out;
13884         }
13885
13886         /* In Legacy mode, we do not have to get any other vector since we
13887          * piggyback on the misc/ICR0 for queue interrupts.
13888         */
13889         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
13890                 return ret;
13891         if (vsi->num_q_vectors)
13892                 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
13893                                                  vsi->num_q_vectors, vsi->idx);
13894         if (vsi->base_vector < 0) {
13895                 dev_info(&pf->pdev->dev,
13896                          "failed to get tracking for %d vectors for VSI %d, err=%d\n",
13897                          vsi->num_q_vectors, vsi->seid, vsi->base_vector);
13898                 i40e_vsi_free_q_vectors(vsi);
13899                 ret = -ENOENT;
13900                 goto vector_setup_out;
13901         }
13902
13903 vector_setup_out:
13904         return ret;
13905 }
13906
13907 /**
13908  * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
13909  * @vsi: pointer to the vsi.
13910  *
13911  * This re-allocates a vsi's queue resources.
13912  *
13913  * Returns pointer to the successfully allocated and configured VSI sw struct
13914  * on success, otherwise returns NULL on failure.
13915  **/
13916 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
13917 {
13918         u16 alloc_queue_pairs;
13919         struct i40e_pf *pf;
13920         u8 enabled_tc;
13921         int ret;
13922
13923         if (!vsi)
13924                 return NULL;
13925
13926         pf = vsi->back;
13927
13928         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
13929         i40e_vsi_clear_rings(vsi);
13930
13931         i40e_vsi_free_arrays(vsi, false);
13932         i40e_set_num_rings_in_vsi(vsi);
13933         ret = i40e_vsi_alloc_arrays(vsi, false);
13934         if (ret)
13935                 goto err_vsi;
13936
13937         alloc_queue_pairs = vsi->alloc_queue_pairs *
13938                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13939
13940         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13941         if (ret < 0) {
13942                 dev_info(&pf->pdev->dev,
13943                          "failed to get tracking for %d queues for VSI %d err %d\n",
13944                          alloc_queue_pairs, vsi->seid, ret);
13945                 goto err_vsi;
13946         }
13947         vsi->base_queue = ret;
13948
13949         /* Update the FW view of the VSI. Force a reset of TC and queue
13950          * layout configurations.
13951          */
13952         enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13953         pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13954         pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13955         i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13956         if (vsi->type == I40E_VSI_MAIN)
13957                 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
13958
13959         /* assign it some queues */
13960         ret = i40e_alloc_rings(vsi);
13961         if (ret)
13962                 goto err_rings;
13963
13964         /* map all of the rings to the q_vectors */
13965         i40e_vsi_map_rings_to_vectors(vsi);
13966         return vsi;
13967
13968 err_rings:
13969         i40e_vsi_free_q_vectors(vsi);
13970         if (vsi->netdev_registered) {
13971                 vsi->netdev_registered = false;
13972                 unregister_netdev(vsi->netdev);
13973                 free_netdev(vsi->netdev);
13974                 vsi->netdev = NULL;
13975         }
13976         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13977 err_vsi:
13978         i40e_vsi_clear(vsi);
13979         return NULL;
13980 }
13981
13982 /**
13983  * i40e_vsi_setup - Set up a VSI by a given type
13984  * @pf: board private structure
13985  * @type: VSI type
13986  * @uplink_seid: the switch element to link to
13987  * @param1: usage depends upon VSI type. For VF types, indicates VF id
13988  *
13989  * This allocates the sw VSI structure and its queue resources, then add a VSI
13990  * to the identified VEB.
13991  *
13992  * Returns pointer to the successfully allocated and configure VSI sw struct on
13993  * success, otherwise returns NULL on failure.
13994  **/
13995 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
13996                                 u16 uplink_seid, u32 param1)
13997 {
13998         struct i40e_vsi *vsi = NULL;
13999         struct i40e_veb *veb = NULL;
14000         u16 alloc_queue_pairs;
14001         int ret, i;
14002         int v_idx;
14003
14004         /* The requested uplink_seid must be either
14005          *     - the PF's port seid
14006          *              no VEB is needed because this is the PF
14007          *              or this is a Flow Director special case VSI
14008          *     - seid of an existing VEB
14009          *     - seid of a VSI that owns an existing VEB
14010          *     - seid of a VSI that doesn't own a VEB
14011          *              a new VEB is created and the VSI becomes the owner
14012          *     - seid of the PF VSI, which is what creates the first VEB
14013          *              this is a special case of the previous
14014          *
14015          * Find which uplink_seid we were given and create a new VEB if needed
14016          */
14017         for (i = 0; i < I40E_MAX_VEB; i++) {
14018                 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14019                         veb = pf->veb[i];
14020                         break;
14021                 }
14022         }
14023
14024         if (!veb && uplink_seid != pf->mac_seid) {
14025
14026                 for (i = 0; i < pf->num_alloc_vsi; i++) {
14027                         if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14028                                 vsi = pf->vsi[i];
14029                                 break;
14030                         }
14031                 }
14032                 if (!vsi) {
14033                         dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14034                                  uplink_seid);
14035                         return NULL;
14036                 }
14037
14038                 if (vsi->uplink_seid == pf->mac_seid)
14039                         veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14040                                              vsi->tc_config.enabled_tc);
14041                 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14042                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14043                                              vsi->tc_config.enabled_tc);
14044                 if (veb) {
14045                         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14046                                 dev_info(&vsi->back->pdev->dev,
14047                                          "New VSI creation error, uplink seid of LAN VSI expected.\n");
14048                                 return NULL;
14049                         }
14050                         /* We come up by default in VEPA mode if SRIOV is not
14051                          * already enabled, in which case we can't force VEPA
14052                          * mode.
14053                          */
14054                         if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14055                                 veb->bridge_mode = BRIDGE_MODE_VEPA;
14056                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14057                         }
14058                         i40e_config_bridge_mode(veb);
14059                 }
14060                 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14061                         if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14062                                 veb = pf->veb[i];
14063                 }
14064                 if (!veb) {
14065                         dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14066                         return NULL;
14067                 }
14068
14069                 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14070                 uplink_seid = veb->seid;
14071         }
14072
14073         /* get vsi sw struct */
14074         v_idx = i40e_vsi_mem_alloc(pf, type);
14075         if (v_idx < 0)
14076                 goto err_alloc;
14077         vsi = pf->vsi[v_idx];
14078         if (!vsi)
14079                 goto err_alloc;
14080         vsi->type = type;
14081         vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14082
14083         if (type == I40E_VSI_MAIN)
14084                 pf->lan_vsi = v_idx;
14085         else if (type == I40E_VSI_SRIOV)
14086                 vsi->vf_id = param1;
14087         /* assign it some queues */
14088         alloc_queue_pairs = vsi->alloc_queue_pairs *
14089                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14090
14091         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14092         if (ret < 0) {
14093                 dev_info(&pf->pdev->dev,
14094                          "failed to get tracking for %d queues for VSI %d err=%d\n",
14095                          alloc_queue_pairs, vsi->seid, ret);
14096                 goto err_vsi;
14097         }
14098         vsi->base_queue = ret;
14099
14100         /* get a VSI from the hardware */
14101         vsi->uplink_seid = uplink_seid;
14102         ret = i40e_add_vsi(vsi);
14103         if (ret)
14104                 goto err_vsi;
14105
14106         switch (vsi->type) {
14107         /* setup the netdev if needed */
14108         case I40E_VSI_MAIN:
14109         case I40E_VSI_VMDQ2:
14110                 ret = i40e_config_netdev(vsi);
14111                 if (ret)
14112                         goto err_netdev;
14113                 ret = register_netdev(vsi->netdev);
14114                 if (ret)
14115                         goto err_netdev;
14116                 vsi->netdev_registered = true;
14117                 netif_carrier_off(vsi->netdev);
14118 #ifdef CONFIG_I40E_DCB
14119                 /* Setup DCB netlink interface */
14120                 i40e_dcbnl_setup(vsi);
14121 #endif /* CONFIG_I40E_DCB */
14122                 fallthrough;
14123         case I40E_VSI_FDIR:
14124                 /* set up vectors and rings if needed */
14125                 ret = i40e_vsi_setup_vectors(vsi);
14126                 if (ret)
14127                         goto err_msix;
14128
14129                 ret = i40e_alloc_rings(vsi);
14130                 if (ret)
14131                         goto err_rings;
14132
14133                 /* map all of the rings to the q_vectors */
14134                 i40e_vsi_map_rings_to_vectors(vsi);
14135
14136                 i40e_vsi_reset_stats(vsi);
14137                 break;
14138         default:
14139                 /* no netdev or rings for the other VSI types */
14140                 break;
14141         }
14142
14143         if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14144             (vsi->type == I40E_VSI_VMDQ2)) {
14145                 ret = i40e_vsi_config_rss(vsi);
14146         }
14147         return vsi;
14148
14149 err_rings:
14150         i40e_vsi_free_q_vectors(vsi);
14151 err_msix:
14152         if (vsi->netdev_registered) {
14153                 vsi->netdev_registered = false;
14154                 unregister_netdev(vsi->netdev);
14155                 free_netdev(vsi->netdev);
14156                 vsi->netdev = NULL;
14157         }
14158 err_netdev:
14159         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14160 err_vsi:
14161         i40e_vsi_clear(vsi);
14162 err_alloc:
14163         return NULL;
14164 }
14165
14166 /**
14167  * i40e_veb_get_bw_info - Query VEB BW information
14168  * @veb: the veb to query
14169  *
14170  * Query the Tx scheduler BW configuration data for given VEB
14171  **/
14172 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14173 {
14174         struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14175         struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14176         struct i40e_pf *pf = veb->pf;
14177         struct i40e_hw *hw = &pf->hw;
14178         u32 tc_bw_max;
14179         int ret = 0;
14180         int i;
14181
14182         ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14183                                                   &bw_data, NULL);
14184         if (ret) {
14185                 dev_info(&pf->pdev->dev,
14186                          "query veb bw config failed, err %s aq_err %s\n",
14187                          i40e_stat_str(&pf->hw, ret),
14188                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14189                 goto out;
14190         }
14191
14192         ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14193                                                    &ets_data, NULL);
14194         if (ret) {
14195                 dev_info(&pf->pdev->dev,
14196                          "query veb bw ets config failed, err %s aq_err %s\n",
14197                          i40e_stat_str(&pf->hw, ret),
14198                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14199                 goto out;
14200         }
14201
14202         veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14203         veb->bw_max_quanta = ets_data.tc_bw_max;
14204         veb->is_abs_credits = bw_data.absolute_credits_enable;
14205         veb->enabled_tc = ets_data.tc_valid_bits;
14206         tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14207                     (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14208         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14209                 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14210                 veb->bw_tc_limit_credits[i] =
14211                                         le16_to_cpu(bw_data.tc_bw_limits[i]);
14212                 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14213         }
14214
14215 out:
14216         return ret;
14217 }
14218
14219 /**
14220  * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14221  * @pf: board private structure
14222  *
14223  * On error: returns error code (negative)
14224  * On success: returns vsi index in PF (positive)
14225  **/
14226 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14227 {
14228         int ret = -ENOENT;
14229         struct i40e_veb *veb;
14230         int i;
14231
14232         /* Need to protect the allocation of switch elements at the PF level */
14233         mutex_lock(&pf->switch_mutex);
14234
14235         /* VEB list may be fragmented if VEB creation/destruction has
14236          * been happening.  We can afford to do a quick scan to look
14237          * for any free slots in the list.
14238          *
14239          * find next empty veb slot, looping back around if necessary
14240          */
14241         i = 0;
14242         while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14243                 i++;
14244         if (i >= I40E_MAX_VEB) {
14245                 ret = -ENOMEM;
14246                 goto err_alloc_veb;  /* out of VEB slots! */
14247         }
14248
14249         veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14250         if (!veb) {
14251                 ret = -ENOMEM;
14252                 goto err_alloc_veb;
14253         }
14254         veb->pf = pf;
14255         veb->idx = i;
14256         veb->enabled_tc = 1;
14257
14258         pf->veb[i] = veb;
14259         ret = i;
14260 err_alloc_veb:
14261         mutex_unlock(&pf->switch_mutex);
14262         return ret;
14263 }
14264
14265 /**
14266  * i40e_switch_branch_release - Delete a branch of the switch tree
14267  * @branch: where to start deleting
14268  *
14269  * This uses recursion to find the tips of the branch to be
14270  * removed, deleting until we get back to and can delete this VEB.
14271  **/
14272 static void i40e_switch_branch_release(struct i40e_veb *branch)
14273 {
14274         struct i40e_pf *pf = branch->pf;
14275         u16 branch_seid = branch->seid;
14276         u16 veb_idx = branch->idx;
14277         int i;
14278
14279         /* release any VEBs on this VEB - RECURSION */
14280         for (i = 0; i < I40E_MAX_VEB; i++) {
14281                 if (!pf->veb[i])
14282                         continue;
14283                 if (pf->veb[i]->uplink_seid == branch->seid)
14284                         i40e_switch_branch_release(pf->veb[i]);
14285         }
14286
14287         /* Release the VSIs on this VEB, but not the owner VSI.
14288          *
14289          * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14290          *       the VEB itself, so don't use (*branch) after this loop.
14291          */
14292         for (i = 0; i < pf->num_alloc_vsi; i++) {
14293                 if (!pf->vsi[i])
14294                         continue;
14295                 if (pf->vsi[i]->uplink_seid == branch_seid &&
14296                    (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14297                         i40e_vsi_release(pf->vsi[i]);
14298                 }
14299         }
14300
14301         /* There's one corner case where the VEB might not have been
14302          * removed, so double check it here and remove it if needed.
14303          * This case happens if the veb was created from the debugfs
14304          * commands and no VSIs were added to it.
14305          */
14306         if (pf->veb[veb_idx])
14307                 i40e_veb_release(pf->veb[veb_idx]);
14308 }
14309
14310 /**
14311  * i40e_veb_clear - remove veb struct
14312  * @veb: the veb to remove
14313  **/
14314 static void i40e_veb_clear(struct i40e_veb *veb)
14315 {
14316         if (!veb)
14317                 return;
14318
14319         if (veb->pf) {
14320                 struct i40e_pf *pf = veb->pf;
14321
14322                 mutex_lock(&pf->switch_mutex);
14323                 if (pf->veb[veb->idx] == veb)
14324                         pf->veb[veb->idx] = NULL;
14325                 mutex_unlock(&pf->switch_mutex);
14326         }
14327
14328         kfree(veb);
14329 }
14330
14331 /**
14332  * i40e_veb_release - Delete a VEB and free its resources
14333  * @veb: the VEB being removed
14334  **/
14335 void i40e_veb_release(struct i40e_veb *veb)
14336 {
14337         struct i40e_vsi *vsi = NULL;
14338         struct i40e_pf *pf;
14339         int i, n = 0;
14340
14341         pf = veb->pf;
14342
14343         /* find the remaining VSI and check for extras */
14344         for (i = 0; i < pf->num_alloc_vsi; i++) {
14345                 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14346                         n++;
14347                         vsi = pf->vsi[i];
14348                 }
14349         }
14350         if (n != 1) {
14351                 dev_info(&pf->pdev->dev,
14352                          "can't remove VEB %d with %d VSIs left\n",
14353                          veb->seid, n);
14354                 return;
14355         }
14356
14357         /* move the remaining VSI to uplink veb */
14358         vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14359         if (veb->uplink_seid) {
14360                 vsi->uplink_seid = veb->uplink_seid;
14361                 if (veb->uplink_seid == pf->mac_seid)
14362                         vsi->veb_idx = I40E_NO_VEB;
14363                 else
14364                         vsi->veb_idx = veb->veb_idx;
14365         } else {
14366                 /* floating VEB */
14367                 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14368                 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14369         }
14370
14371         i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14372         i40e_veb_clear(veb);
14373 }
14374
14375 /**
14376  * i40e_add_veb - create the VEB in the switch
14377  * @veb: the VEB to be instantiated
14378  * @vsi: the controlling VSI
14379  **/
14380 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14381 {
14382         struct i40e_pf *pf = veb->pf;
14383         bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14384         int ret;
14385
14386         ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14387                               veb->enabled_tc, false,
14388                               &veb->seid, enable_stats, NULL);
14389
14390         /* get a VEB from the hardware */
14391         if (ret) {
14392                 dev_info(&pf->pdev->dev,
14393                          "couldn't add VEB, err %s aq_err %s\n",
14394                          i40e_stat_str(&pf->hw, ret),
14395                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14396                 return -EPERM;
14397         }
14398
14399         /* get statistics counter */
14400         ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14401                                          &veb->stats_idx, NULL, NULL, NULL);
14402         if (ret) {
14403                 dev_info(&pf->pdev->dev,
14404                          "couldn't get VEB statistics idx, err %s aq_err %s\n",
14405                          i40e_stat_str(&pf->hw, ret),
14406                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14407                 return -EPERM;
14408         }
14409         ret = i40e_veb_get_bw_info(veb);
14410         if (ret) {
14411                 dev_info(&pf->pdev->dev,
14412                          "couldn't get VEB bw info, err %s aq_err %s\n",
14413                          i40e_stat_str(&pf->hw, ret),
14414                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14415                 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14416                 return -ENOENT;
14417         }
14418
14419         vsi->uplink_seid = veb->seid;
14420         vsi->veb_idx = veb->idx;
14421         vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14422
14423         return 0;
14424 }
14425
14426 /**
14427  * i40e_veb_setup - Set up a VEB
14428  * @pf: board private structure
14429  * @flags: VEB setup flags
14430  * @uplink_seid: the switch element to link to
14431  * @vsi_seid: the initial VSI seid
14432  * @enabled_tc: Enabled TC bit-map
14433  *
14434  * This allocates the sw VEB structure and links it into the switch
14435  * It is possible and legal for this to be a duplicate of an already
14436  * existing VEB.  It is also possible for both uplink and vsi seids
14437  * to be zero, in order to create a floating VEB.
14438  *
14439  * Returns pointer to the successfully allocated VEB sw struct on
14440  * success, otherwise returns NULL on failure.
14441  **/
14442 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14443                                 u16 uplink_seid, u16 vsi_seid,
14444                                 u8 enabled_tc)
14445 {
14446         struct i40e_veb *veb, *uplink_veb = NULL;
14447         int vsi_idx, veb_idx;
14448         int ret;
14449
14450         /* if one seid is 0, the other must be 0 to create a floating relay */
14451         if ((uplink_seid == 0 || vsi_seid == 0) &&
14452             (uplink_seid + vsi_seid != 0)) {
14453                 dev_info(&pf->pdev->dev,
14454                          "one, not both seid's are 0: uplink=%d vsi=%d\n",
14455                          uplink_seid, vsi_seid);
14456                 return NULL;
14457         }
14458
14459         /* make sure there is such a vsi and uplink */
14460         for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14461                 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14462                         break;
14463         if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14464                 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14465                          vsi_seid);
14466                 return NULL;
14467         }
14468
14469         if (uplink_seid && uplink_seid != pf->mac_seid) {
14470                 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14471                         if (pf->veb[veb_idx] &&
14472                             pf->veb[veb_idx]->seid == uplink_seid) {
14473                                 uplink_veb = pf->veb[veb_idx];
14474                                 break;
14475                         }
14476                 }
14477                 if (!uplink_veb) {
14478                         dev_info(&pf->pdev->dev,
14479                                  "uplink seid %d not found\n", uplink_seid);
14480                         return NULL;
14481                 }
14482         }
14483
14484         /* get veb sw struct */
14485         veb_idx = i40e_veb_mem_alloc(pf);
14486         if (veb_idx < 0)
14487                 goto err_alloc;
14488         veb = pf->veb[veb_idx];
14489         veb->flags = flags;
14490         veb->uplink_seid = uplink_seid;
14491         veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14492         veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14493
14494         /* create the VEB in the switch */
14495         ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14496         if (ret)
14497                 goto err_veb;
14498         if (vsi_idx == pf->lan_vsi)
14499                 pf->lan_veb = veb->idx;
14500
14501         return veb;
14502
14503 err_veb:
14504         i40e_veb_clear(veb);
14505 err_alloc:
14506         return NULL;
14507 }
14508
14509 /**
14510  * i40e_setup_pf_switch_element - set PF vars based on switch type
14511  * @pf: board private structure
14512  * @ele: element we are building info from
14513  * @num_reported: total number of elements
14514  * @printconfig: should we print the contents
14515  *
14516  * helper function to assist in extracting a few useful SEID values.
14517  **/
14518 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14519                                 struct i40e_aqc_switch_config_element_resp *ele,
14520                                 u16 num_reported, bool printconfig)
14521 {
14522         u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14523         u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14524         u8 element_type = ele->element_type;
14525         u16 seid = le16_to_cpu(ele->seid);
14526
14527         if (printconfig)
14528                 dev_info(&pf->pdev->dev,
14529                          "type=%d seid=%d uplink=%d downlink=%d\n",
14530                          element_type, seid, uplink_seid, downlink_seid);
14531
14532         switch (element_type) {
14533         case I40E_SWITCH_ELEMENT_TYPE_MAC:
14534                 pf->mac_seid = seid;
14535                 break;
14536         case I40E_SWITCH_ELEMENT_TYPE_VEB:
14537                 /* Main VEB? */
14538                 if (uplink_seid != pf->mac_seid)
14539                         break;
14540                 if (pf->lan_veb >= I40E_MAX_VEB) {
14541                         int v;
14542
14543                         /* find existing or else empty VEB */
14544                         for (v = 0; v < I40E_MAX_VEB; v++) {
14545                                 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14546                                         pf->lan_veb = v;
14547                                         break;
14548                                 }
14549                         }
14550                         if (pf->lan_veb >= I40E_MAX_VEB) {
14551                                 v = i40e_veb_mem_alloc(pf);
14552                                 if (v < 0)
14553                                         break;
14554                                 pf->lan_veb = v;
14555                         }
14556                 }
14557                 if (pf->lan_veb >= I40E_MAX_VEB)
14558                         break;
14559
14560                 pf->veb[pf->lan_veb]->seid = seid;
14561                 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14562                 pf->veb[pf->lan_veb]->pf = pf;
14563                 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14564                 break;
14565         case I40E_SWITCH_ELEMENT_TYPE_VSI:
14566                 if (num_reported != 1)
14567                         break;
14568                 /* This is immediately after a reset so we can assume this is
14569                  * the PF's VSI
14570                  */
14571                 pf->mac_seid = uplink_seid;
14572                 pf->pf_seid = downlink_seid;
14573                 pf->main_vsi_seid = seid;
14574                 if (printconfig)
14575                         dev_info(&pf->pdev->dev,
14576                                  "pf_seid=%d main_vsi_seid=%d\n",
14577                                  pf->pf_seid, pf->main_vsi_seid);
14578                 break;
14579         case I40E_SWITCH_ELEMENT_TYPE_PF:
14580         case I40E_SWITCH_ELEMENT_TYPE_VF:
14581         case I40E_SWITCH_ELEMENT_TYPE_EMP:
14582         case I40E_SWITCH_ELEMENT_TYPE_BMC:
14583         case I40E_SWITCH_ELEMENT_TYPE_PE:
14584         case I40E_SWITCH_ELEMENT_TYPE_PA:
14585                 /* ignore these for now */
14586                 break;
14587         default:
14588                 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14589                          element_type, seid);
14590                 break;
14591         }
14592 }
14593
14594 /**
14595  * i40e_fetch_switch_configuration - Get switch config from firmware
14596  * @pf: board private structure
14597  * @printconfig: should we print the contents
14598  *
14599  * Get the current switch configuration from the device and
14600  * extract a few useful SEID values.
14601  **/
14602 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14603 {
14604         struct i40e_aqc_get_switch_config_resp *sw_config;
14605         u16 next_seid = 0;
14606         int ret = 0;
14607         u8 *aq_buf;
14608         int i;
14609
14610         aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14611         if (!aq_buf)
14612                 return -ENOMEM;
14613
14614         sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14615         do {
14616                 u16 num_reported, num_total;
14617
14618                 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14619                                                 I40E_AQ_LARGE_BUF,
14620                                                 &next_seid, NULL);
14621                 if (ret) {
14622                         dev_info(&pf->pdev->dev,
14623                                  "get switch config failed err %s aq_err %s\n",
14624                                  i40e_stat_str(&pf->hw, ret),
14625                                  i40e_aq_str(&pf->hw,
14626                                              pf->hw.aq.asq_last_status));
14627                         kfree(aq_buf);
14628                         return -ENOENT;
14629                 }
14630
14631                 num_reported = le16_to_cpu(sw_config->header.num_reported);
14632                 num_total = le16_to_cpu(sw_config->header.num_total);
14633
14634                 if (printconfig)
14635                         dev_info(&pf->pdev->dev,
14636                                  "header: %d reported %d total\n",
14637                                  num_reported, num_total);
14638
14639                 for (i = 0; i < num_reported; i++) {
14640                         struct i40e_aqc_switch_config_element_resp *ele =
14641                                 &sw_config->element[i];
14642
14643                         i40e_setup_pf_switch_element(pf, ele, num_reported,
14644                                                      printconfig);
14645                 }
14646         } while (next_seid != 0);
14647
14648         kfree(aq_buf);
14649         return ret;
14650 }
14651
14652 /**
14653  * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14654  * @pf: board private structure
14655  * @reinit: if the Main VSI needs to re-initialized.
14656  *
14657  * Returns 0 on success, negative value on failure
14658  **/
14659 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
14660 {
14661         u16 flags = 0;
14662         int ret;
14663
14664         /* find out what's out there already */
14665         ret = i40e_fetch_switch_configuration(pf, false);
14666         if (ret) {
14667                 dev_info(&pf->pdev->dev,
14668                          "couldn't fetch switch config, err %s aq_err %s\n",
14669                          i40e_stat_str(&pf->hw, ret),
14670                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14671                 return ret;
14672         }
14673         i40e_pf_reset_stats(pf);
14674
14675         /* set the switch config bit for the whole device to
14676          * support limited promisc or true promisc
14677          * when user requests promisc. The default is limited
14678          * promisc.
14679         */
14680
14681         if ((pf->hw.pf_id == 0) &&
14682             !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14683                 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14684                 pf->last_sw_conf_flags = flags;
14685         }
14686
14687         if (pf->hw.pf_id == 0) {
14688                 u16 valid_flags;
14689
14690                 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14691                 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14692                                                 NULL);
14693                 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14694                         dev_info(&pf->pdev->dev,
14695                                  "couldn't set switch config bits, err %s aq_err %s\n",
14696                                  i40e_stat_str(&pf->hw, ret),
14697                                  i40e_aq_str(&pf->hw,
14698                                              pf->hw.aq.asq_last_status));
14699                         /* not a fatal problem, just keep going */
14700                 }
14701                 pf->last_sw_conf_valid_flags = valid_flags;
14702         }
14703
14704         /* first time setup */
14705         if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14706                 struct i40e_vsi *vsi = NULL;
14707                 u16 uplink_seid;
14708
14709                 /* Set up the PF VSI associated with the PF's main VSI
14710                  * that is already in the HW switch
14711                  */
14712                 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14713                         uplink_seid = pf->veb[pf->lan_veb]->seid;
14714                 else
14715                         uplink_seid = pf->mac_seid;
14716                 if (pf->lan_vsi == I40E_NO_VSI)
14717                         vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14718                 else if (reinit)
14719                         vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14720                 if (!vsi) {
14721                         dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14722                         i40e_cloud_filter_exit(pf);
14723                         i40e_fdir_teardown(pf);
14724                         return -EAGAIN;
14725                 }
14726         } else {
14727                 /* force a reset of TC and queue layout configurations */
14728                 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14729
14730                 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14731                 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14732                 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14733         }
14734         i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14735
14736         i40e_fdir_sb_setup(pf);
14737
14738         /* Setup static PF queue filter control settings */
14739         ret = i40e_setup_pf_filter_control(pf);
14740         if (ret) {
14741                 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14742                          ret);
14743                 /* Failure here should not stop continuing other steps */
14744         }
14745
14746         /* enable RSS in the HW, even for only one queue, as the stack can use
14747          * the hash
14748          */
14749         if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14750                 i40e_pf_config_rss(pf);
14751
14752         /* fill in link information and enable LSE reporting */
14753         i40e_link_event(pf);
14754
14755         /* Initialize user-specific link properties */
14756         pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14757                                   I40E_AQ_AN_COMPLETED) ? true : false);
14758
14759         i40e_ptp_init(pf);
14760
14761         /* repopulate tunnel port filters */
14762         udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
14763
14764         return ret;
14765 }
14766
14767 /**
14768  * i40e_determine_queue_usage - Work out queue distribution
14769  * @pf: board private structure
14770  **/
14771 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14772 {
14773         int queues_left;
14774         int q_max;
14775
14776         pf->num_lan_qps = 0;
14777
14778         /* Find the max queues to be put into basic use.  We'll always be
14779          * using TC0, whether or not DCB is running, and TC0 will get the
14780          * big RSS set.
14781          */
14782         queues_left = pf->hw.func_caps.num_tx_qp;
14783
14784         if ((queues_left == 1) ||
14785             !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
14786                 /* one qp for PF, no queues for anything else */
14787                 queues_left = 0;
14788                 pf->alloc_rss_size = pf->num_lan_qps = 1;
14789
14790                 /* make sure all the fancies are disabled */
14791                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
14792                                I40E_FLAG_IWARP_ENABLED  |
14793                                I40E_FLAG_FD_SB_ENABLED  |
14794                                I40E_FLAG_FD_ATR_ENABLED |
14795                                I40E_FLAG_DCB_CAPABLE    |
14796                                I40E_FLAG_DCB_ENABLED    |
14797                                I40E_FLAG_SRIOV_ENABLED  |
14798                                I40E_FLAG_VMDQ_ENABLED);
14799                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14800         } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
14801                                   I40E_FLAG_FD_SB_ENABLED |
14802                                   I40E_FLAG_FD_ATR_ENABLED |
14803                                   I40E_FLAG_DCB_CAPABLE))) {
14804                 /* one qp for PF */
14805                 pf->alloc_rss_size = pf->num_lan_qps = 1;
14806                 queues_left -= pf->num_lan_qps;
14807
14808                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
14809                                I40E_FLAG_IWARP_ENABLED  |
14810                                I40E_FLAG_FD_SB_ENABLED  |
14811                                I40E_FLAG_FD_ATR_ENABLED |
14812                                I40E_FLAG_DCB_ENABLED    |
14813                                I40E_FLAG_VMDQ_ENABLED);
14814                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14815         } else {
14816                 /* Not enough queues for all TCs */
14817                 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
14818                     (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
14819                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
14820                                         I40E_FLAG_DCB_ENABLED);
14821                         dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
14822                 }
14823
14824                 /* limit lan qps to the smaller of qps, cpus or msix */
14825                 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
14826                 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
14827                 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
14828                 pf->num_lan_qps = q_max;
14829
14830                 queues_left -= pf->num_lan_qps;
14831         }
14832
14833         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14834                 if (queues_left > 1) {
14835                         queues_left -= 1; /* save 1 queue for FD */
14836                 } else {
14837                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
14838                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14839                         dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
14840                 }
14841         }
14842
14843         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14844             pf->num_vf_qps && pf->num_req_vfs && queues_left) {
14845                 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
14846                                         (queues_left / pf->num_vf_qps));
14847                 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
14848         }
14849
14850         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
14851             pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
14852                 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
14853                                           (queues_left / pf->num_vmdq_qps));
14854                 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
14855         }
14856
14857         pf->queues_left = queues_left;
14858         dev_dbg(&pf->pdev->dev,
14859                 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
14860                 pf->hw.func_caps.num_tx_qp,
14861                 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
14862                 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
14863                 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
14864                 queues_left);
14865 }
14866
14867 /**
14868  * i40e_setup_pf_filter_control - Setup PF static filter control
14869  * @pf: PF to be setup
14870  *
14871  * i40e_setup_pf_filter_control sets up a PF's initial filter control
14872  * settings. If PE/FCoE are enabled then it will also set the per PF
14873  * based filter sizes required for them. It also enables Flow director,
14874  * ethertype and macvlan type filter settings for the pf.
14875  *
14876  * Returns 0 on success, negative on failure
14877  **/
14878 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
14879 {
14880         struct i40e_filter_control_settings *settings = &pf->filter_settings;
14881
14882         settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
14883
14884         /* Flow Director is enabled */
14885         if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
14886                 settings->enable_fdir = true;
14887
14888         /* Ethtype and MACVLAN filters enabled for PF */
14889         settings->enable_ethtype = true;
14890         settings->enable_macvlan = true;
14891
14892         if (i40e_set_filter_control(&pf->hw, settings))
14893                 return -ENOENT;
14894
14895         return 0;
14896 }
14897
14898 #define INFO_STRING_LEN 255
14899 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
14900 static void i40e_print_features(struct i40e_pf *pf)
14901 {
14902         struct i40e_hw *hw = &pf->hw;
14903         char *buf;
14904         int i;
14905
14906         buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
14907         if (!buf)
14908                 return;
14909
14910         i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
14911 #ifdef CONFIG_PCI_IOV
14912         i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
14913 #endif
14914         i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
14915                       pf->hw.func_caps.num_vsis,
14916                       pf->vsi[pf->lan_vsi]->num_queue_pairs);
14917         if (pf->flags & I40E_FLAG_RSS_ENABLED)
14918                 i += scnprintf(&buf[i], REMAIN(i), " RSS");
14919         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
14920                 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
14921         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14922                 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
14923                 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
14924         }
14925         if (pf->flags & I40E_FLAG_DCB_CAPABLE)
14926                 i += scnprintf(&buf[i], REMAIN(i), " DCB");
14927         i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
14928         i += scnprintf(&buf[i], REMAIN(i), " Geneve");
14929         if (pf->flags & I40E_FLAG_PTP)
14930                 i += scnprintf(&buf[i], REMAIN(i), " PTP");
14931         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
14932                 i += scnprintf(&buf[i], REMAIN(i), " VEB");
14933         else
14934                 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
14935
14936         dev_info(&pf->pdev->dev, "%s\n", buf);
14937         kfree(buf);
14938         WARN_ON(i > INFO_STRING_LEN);
14939 }
14940
14941 /**
14942  * i40e_get_platform_mac_addr - get platform-specific MAC address
14943  * @pdev: PCI device information struct
14944  * @pf: board private structure
14945  *
14946  * Look up the MAC address for the device. First we'll try
14947  * eth_platform_get_mac_address, which will check Open Firmware, or arch
14948  * specific fallback. Otherwise, we'll default to the stored value in
14949  * firmware.
14950  **/
14951 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
14952 {
14953         if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
14954                 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
14955 }
14956
14957 /**
14958  * i40e_set_fec_in_flags - helper function for setting FEC options in flags
14959  * @fec_cfg: FEC option to set in flags
14960  * @flags: ptr to flags in which we set FEC option
14961  **/
14962 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
14963 {
14964         if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
14965                 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
14966         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
14967             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
14968                 *flags |= I40E_FLAG_RS_FEC;
14969                 *flags &= ~I40E_FLAG_BASE_R_FEC;
14970         }
14971         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
14972             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
14973                 *flags |= I40E_FLAG_BASE_R_FEC;
14974                 *flags &= ~I40E_FLAG_RS_FEC;
14975         }
14976         if (fec_cfg == 0)
14977                 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
14978 }
14979
14980 /**
14981  * i40e_check_recovery_mode - check if we are running transition firmware
14982  * @pf: board private structure
14983  *
14984  * Check registers indicating the firmware runs in recovery mode. Sets the
14985  * appropriate driver state.
14986  *
14987  * Returns true if the recovery mode was detected, false otherwise
14988  **/
14989 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
14990 {
14991         u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
14992
14993         if (val & I40E_GL_FWSTS_FWS1B_MASK) {
14994                 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
14995                 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
14996                 set_bit(__I40E_RECOVERY_MODE, pf->state);
14997
14998                 return true;
14999         }
15000         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15001                 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15002
15003         return false;
15004 }
15005
15006 /**
15007  * i40e_pf_loop_reset - perform reset in a loop.
15008  * @pf: board private structure
15009  *
15010  * This function is useful when a NIC is about to enter recovery mode.
15011  * When a NIC's internal data structures are corrupted the NIC's
15012  * firmware is going to enter recovery mode.
15013  * Right after a POR it takes about 7 minutes for firmware to enter
15014  * recovery mode. Until that time a NIC is in some kind of intermediate
15015  * state. After that time period the NIC almost surely enters
15016  * recovery mode. The only way for a driver to detect intermediate
15017  * state is to issue a series of pf-resets and check a return value.
15018  * If a PF reset returns success then the firmware could be in recovery
15019  * mode so the caller of this code needs to check for recovery mode
15020  * if this function returns success. There is a little chance that
15021  * firmware will hang in intermediate state forever.
15022  * Since waiting 7 minutes is quite a lot of time this function waits
15023  * 10 seconds and then gives up by returning an error.
15024  *
15025  * Return 0 on success, negative on failure.
15026  **/
15027 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
15028 {
15029         /* wait max 10 seconds for PF reset to succeed */
15030         const unsigned long time_end = jiffies + 10 * HZ;
15031
15032         struct i40e_hw *hw = &pf->hw;
15033         i40e_status ret;
15034
15035         ret = i40e_pf_reset(hw);
15036         while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) {
15037                 usleep_range(10000, 20000);
15038                 ret = i40e_pf_reset(hw);
15039         }
15040
15041         if (ret == I40E_SUCCESS)
15042                 pf->pfr_count++;
15043         else
15044                 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15045
15046         return ret;
15047 }
15048
15049 /**
15050  * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15051  * @pf: board private structure
15052  *
15053  * Check FW registers to determine if FW issued unexpected EMP Reset.
15054  * Every time when unexpected EMP Reset occurs the FW increments
15055  * a counter of unexpected EMP Resets. When the counter reaches 10
15056  * the FW should enter the Recovery mode
15057  *
15058  * Returns true if FW issued unexpected EMP Reset
15059  **/
15060 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15061 {
15062         const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15063                            I40E_GL_FWSTS_FWS1B_MASK;
15064         return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15065                (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15066 }
15067
15068 /**
15069  * i40e_handle_resets - handle EMP resets and PF resets
15070  * @pf: board private structure
15071  *
15072  * Handle both EMP resets and PF resets and conclude whether there are
15073  * any issues regarding these resets. If there are any issues then
15074  * generate log entry.
15075  *
15076  * Return 0 if NIC is healthy or negative value when there are issues
15077  * with resets
15078  **/
15079 static i40e_status i40e_handle_resets(struct i40e_pf *pf)
15080 {
15081         const i40e_status pfr = i40e_pf_loop_reset(pf);
15082         const bool is_empr = i40e_check_fw_empr(pf);
15083
15084         if (is_empr || pfr != I40E_SUCCESS)
15085                 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15086
15087         return is_empr ? I40E_ERR_RESET_FAILED : pfr;
15088 }
15089
15090 /**
15091  * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15092  * @pf: board private structure
15093  * @hw: ptr to the hardware info
15094  *
15095  * This function does a minimal setup of all subsystems needed for running
15096  * recovery mode.
15097  *
15098  * Returns 0 on success, negative on failure
15099  **/
15100 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15101 {
15102         struct i40e_vsi *vsi;
15103         int err;
15104         int v_idx;
15105
15106         pci_save_state(pf->pdev);
15107
15108         /* set up periodic task facility */
15109         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15110         pf->service_timer_period = HZ;
15111
15112         INIT_WORK(&pf->service_task, i40e_service_task);
15113         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15114
15115         err = i40e_init_interrupt_scheme(pf);
15116         if (err)
15117                 goto err_switch_setup;
15118
15119         /* The number of VSIs reported by the FW is the minimum guaranteed
15120          * to us; HW supports far more and we share the remaining pool with
15121          * the other PFs. We allocate space for more than the guarantee with
15122          * the understanding that we might not get them all later.
15123          */
15124         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15125                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15126         else
15127                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15128
15129         /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15130         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15131                           GFP_KERNEL);
15132         if (!pf->vsi) {
15133                 err = -ENOMEM;
15134                 goto err_switch_setup;
15135         }
15136
15137         /* We allocate one VSI which is needed as absolute minimum
15138          * in order to register the netdev
15139          */
15140         v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15141         if (v_idx < 0)
15142                 goto err_switch_setup;
15143         pf->lan_vsi = v_idx;
15144         vsi = pf->vsi[v_idx];
15145         if (!vsi)
15146                 goto err_switch_setup;
15147         vsi->alloc_queue_pairs = 1;
15148         err = i40e_config_netdev(vsi);
15149         if (err)
15150                 goto err_switch_setup;
15151         err = register_netdev(vsi->netdev);
15152         if (err)
15153                 goto err_switch_setup;
15154         vsi->netdev_registered = true;
15155         i40e_dbg_pf_init(pf);
15156
15157         err = i40e_setup_misc_vector_for_recovery_mode(pf);
15158         if (err)
15159                 goto err_switch_setup;
15160
15161         /* tell the firmware that we're starting */
15162         i40e_send_version(pf);
15163
15164         /* since everything's happy, start the service_task timer */
15165         mod_timer(&pf->service_timer,
15166                   round_jiffies(jiffies + pf->service_timer_period));
15167
15168         return 0;
15169
15170 err_switch_setup:
15171         i40e_reset_interrupt_capability(pf);
15172         del_timer_sync(&pf->service_timer);
15173         i40e_shutdown_adminq(hw);
15174         iounmap(hw->hw_addr);
15175         pci_disable_pcie_error_reporting(pf->pdev);
15176         pci_release_mem_regions(pf->pdev);
15177         pci_disable_device(pf->pdev);
15178         kfree(pf);
15179
15180         return err;
15181 }
15182
15183 /**
15184  * i40e_probe - Device initialization routine
15185  * @pdev: PCI device information struct
15186  * @ent: entry in i40e_pci_tbl
15187  *
15188  * i40e_probe initializes a PF identified by a pci_dev structure.
15189  * The OS initialization, configuring of the PF private structure,
15190  * and a hardware reset occur.
15191  *
15192  * Returns 0 on success, negative on failure
15193  **/
15194 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15195 {
15196         struct i40e_aq_get_phy_abilities_resp abilities;
15197 #ifdef CONFIG_I40E_DCB
15198         enum i40e_get_fw_lldp_status_resp lldp_status;
15199         i40e_status status;
15200 #endif /* CONFIG_I40E_DCB */
15201         struct i40e_pf *pf;
15202         struct i40e_hw *hw;
15203         static u16 pfs_found;
15204         u16 wol_nvm_bits;
15205         u16 link_status;
15206         int err;
15207         u32 val;
15208         u32 i;
15209
15210         err = pci_enable_device_mem(pdev);
15211         if (err)
15212                 return err;
15213
15214         /* set up for high or low dma */
15215         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15216         if (err) {
15217                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
15218                 if (err) {
15219                         dev_err(&pdev->dev,
15220                                 "DMA configuration failed: 0x%x\n", err);
15221                         goto err_dma;
15222                 }
15223         }
15224
15225         /* set up pci connections */
15226         err = pci_request_mem_regions(pdev, i40e_driver_name);
15227         if (err) {
15228                 dev_info(&pdev->dev,
15229                          "pci_request_selected_regions failed %d\n", err);
15230                 goto err_pci_reg;
15231         }
15232
15233         pci_enable_pcie_error_reporting(pdev);
15234         pci_set_master(pdev);
15235
15236         /* Now that we have a PCI connection, we need to do the
15237          * low level device setup.  This is primarily setting up
15238          * the Admin Queue structures and then querying for the
15239          * device's current profile information.
15240          */
15241         pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15242         if (!pf) {
15243                 err = -ENOMEM;
15244                 goto err_pf_alloc;
15245         }
15246         pf->next_vsi = 0;
15247         pf->pdev = pdev;
15248         set_bit(__I40E_DOWN, pf->state);
15249
15250         hw = &pf->hw;
15251         hw->back = pf;
15252
15253         pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15254                                 I40E_MAX_CSR_SPACE);
15255         /* We believe that the highest register to read is
15256          * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15257          * is not less than that before mapping to prevent a
15258          * kernel panic.
15259          */
15260         if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15261                 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15262                         pf->ioremap_len);
15263                 err = -ENOMEM;
15264                 goto err_ioremap;
15265         }
15266         hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15267         if (!hw->hw_addr) {
15268                 err = -EIO;
15269                 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15270                          (unsigned int)pci_resource_start(pdev, 0),
15271                          pf->ioremap_len, err);
15272                 goto err_ioremap;
15273         }
15274         hw->vendor_id = pdev->vendor;
15275         hw->device_id = pdev->device;
15276         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15277         hw->subsystem_vendor_id = pdev->subsystem_vendor;
15278         hw->subsystem_device_id = pdev->subsystem_device;
15279         hw->bus.device = PCI_SLOT(pdev->devfn);
15280         hw->bus.func = PCI_FUNC(pdev->devfn);
15281         hw->bus.bus_id = pdev->bus->number;
15282         pf->instance = pfs_found;
15283
15284         /* Select something other than the 802.1ad ethertype for the
15285          * switch to use internally and drop on ingress.
15286          */
15287         hw->switch_tag = 0xffff;
15288         hw->first_tag = ETH_P_8021AD;
15289         hw->second_tag = ETH_P_8021Q;
15290
15291         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15292         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15293         INIT_LIST_HEAD(&pf->ddp_old_prof);
15294
15295         /* set up the locks for the AQ, do this only once in probe
15296          * and destroy them only once in remove
15297          */
15298         mutex_init(&hw->aq.asq_mutex);
15299         mutex_init(&hw->aq.arq_mutex);
15300
15301         pf->msg_enable = netif_msg_init(debug,
15302                                         NETIF_MSG_DRV |
15303                                         NETIF_MSG_PROBE |
15304                                         NETIF_MSG_LINK);
15305         if (debug < -1)
15306                 pf->hw.debug_mask = debug;
15307
15308         /* do a special CORER for clearing PXE mode once at init */
15309         if (hw->revision_id == 0 &&
15310             (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15311                 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15312                 i40e_flush(hw);
15313                 msleep(200);
15314                 pf->corer_count++;
15315
15316                 i40e_clear_pxe_mode(hw);
15317         }
15318
15319         /* Reset here to make sure all is clean and to define PF 'n' */
15320         i40e_clear_hw(hw);
15321
15322         err = i40e_set_mac_type(hw);
15323         if (err) {
15324                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15325                          err);
15326                 goto err_pf_reset;
15327         }
15328
15329         err = i40e_handle_resets(pf);
15330         if (err)
15331                 goto err_pf_reset;
15332
15333         i40e_check_recovery_mode(pf);
15334
15335         hw->aq.num_arq_entries = I40E_AQ_LEN;
15336         hw->aq.num_asq_entries = I40E_AQ_LEN;
15337         hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15338         hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15339         pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15340
15341         snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15342                  "%s-%s:misc",
15343                  dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15344
15345         err = i40e_init_shared_code(hw);
15346         if (err) {
15347                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15348                          err);
15349                 goto err_pf_reset;
15350         }
15351
15352         /* set up a default setting for link flow control */
15353         pf->hw.fc.requested_mode = I40E_FC_NONE;
15354
15355         err = i40e_init_adminq(hw);
15356         if (err) {
15357                 if (err == I40E_ERR_FIRMWARE_API_VERSION)
15358                         dev_info(&pdev->dev,
15359                                  "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15360                                  hw->aq.api_maj_ver,
15361                                  hw->aq.api_min_ver,
15362                                  I40E_FW_API_VERSION_MAJOR,
15363                                  I40E_FW_MINOR_VERSION(hw));
15364                 else
15365                         dev_info(&pdev->dev,
15366                                  "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15367
15368                 goto err_pf_reset;
15369         }
15370         i40e_get_oem_version(hw);
15371
15372         /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15373         dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15374                  hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15375                  hw->aq.api_maj_ver, hw->aq.api_min_ver,
15376                  i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15377                  hw->subsystem_vendor_id, hw->subsystem_device_id);
15378
15379         if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15380             hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15381                 dev_info(&pdev->dev,
15382                          "The driver for the device detected a newer version of the NVM image v%u.%u than expected v%u.%u. Please install the most recent version of the network driver.\n",
15383                          hw->aq.api_maj_ver,
15384                          hw->aq.api_min_ver,
15385                          I40E_FW_API_VERSION_MAJOR,
15386                          I40E_FW_MINOR_VERSION(hw));
15387         else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15388                 dev_info(&pdev->dev,
15389                          "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15390                          hw->aq.api_maj_ver,
15391                          hw->aq.api_min_ver,
15392                          I40E_FW_API_VERSION_MAJOR,
15393                          I40E_FW_MINOR_VERSION(hw));
15394
15395         i40e_verify_eeprom(pf);
15396
15397         /* Rev 0 hardware was never productized */
15398         if (hw->revision_id < 1)
15399                 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15400
15401         i40e_clear_pxe_mode(hw);
15402
15403         err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15404         if (err)
15405                 goto err_adminq_setup;
15406
15407         err = i40e_sw_init(pf);
15408         if (err) {
15409                 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15410                 goto err_sw_init;
15411         }
15412
15413         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15414                 return i40e_init_recovery_mode(pf, hw);
15415
15416         err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15417                                 hw->func_caps.num_rx_qp, 0, 0);
15418         if (err) {
15419                 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15420                 goto err_init_lan_hmc;
15421         }
15422
15423         err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15424         if (err) {
15425                 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15426                 err = -ENOENT;
15427                 goto err_configure_lan_hmc;
15428         }
15429
15430         /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15431          * Ignore error return codes because if it was already disabled via
15432          * hardware settings this will fail
15433          */
15434         if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15435                 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15436                 i40e_aq_stop_lldp(hw, true, false, NULL);
15437         }
15438
15439         /* allow a platform config to override the HW addr */
15440         i40e_get_platform_mac_addr(pdev, pf);
15441
15442         if (!is_valid_ether_addr(hw->mac.addr)) {
15443                 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15444                 err = -EIO;
15445                 goto err_mac_addr;
15446         }
15447         dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15448         ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15449         i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15450         if (is_valid_ether_addr(hw->mac.port_addr))
15451                 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15452
15453         pci_set_drvdata(pdev, pf);
15454         pci_save_state(pdev);
15455
15456 #ifdef CONFIG_I40E_DCB
15457         status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15458         (!status &&
15459          lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15460                 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15461                 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15462         dev_info(&pdev->dev,
15463                  (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15464                         "FW LLDP is disabled\n" :
15465                         "FW LLDP is enabled\n");
15466
15467         /* Enable FW to write default DCB config on link-up */
15468         i40e_aq_set_dcb_parameters(hw, true, NULL);
15469
15470         err = i40e_init_pf_dcb(pf);
15471         if (err) {
15472                 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15473                 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15474                 /* Continue without DCB enabled */
15475         }
15476 #endif /* CONFIG_I40E_DCB */
15477
15478         /* set up periodic task facility */
15479         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15480         pf->service_timer_period = HZ;
15481
15482         INIT_WORK(&pf->service_task, i40e_service_task);
15483         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15484
15485         /* NVM bit on means WoL disabled for the port */
15486         i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15487         if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15488                 pf->wol_en = false;
15489         else
15490                 pf->wol_en = true;
15491         device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15492
15493         /* set up the main switch operations */
15494         i40e_determine_queue_usage(pf);
15495         err = i40e_init_interrupt_scheme(pf);
15496         if (err)
15497                 goto err_switch_setup;
15498
15499         pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15500         pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15501         pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15502         pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15503         pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15504         pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15505                                                     UDP_TUNNEL_TYPE_GENEVE;
15506
15507         /* The number of VSIs reported by the FW is the minimum guaranteed
15508          * to us; HW supports far more and we share the remaining pool with
15509          * the other PFs. We allocate space for more than the guarantee with
15510          * the understanding that we might not get them all later.
15511          */
15512         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15513                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15514         else
15515                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15516         if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15517                 dev_warn(&pf->pdev->dev,
15518                          "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15519                          pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15520                 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15521         }
15522
15523         /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15524         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15525                           GFP_KERNEL);
15526         if (!pf->vsi) {
15527                 err = -ENOMEM;
15528                 goto err_switch_setup;
15529         }
15530
15531 #ifdef CONFIG_PCI_IOV
15532         /* prep for VF support */
15533         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15534             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15535             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15536                 if (pci_num_vf(pdev))
15537                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15538         }
15539 #endif
15540         err = i40e_setup_pf_switch(pf, false);
15541         if (err) {
15542                 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15543                 goto err_vsis;
15544         }
15545         INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15546
15547         /* if FDIR VSI was set up, start it now */
15548         for (i = 0; i < pf->num_alloc_vsi; i++) {
15549                 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15550                         i40e_vsi_open(pf->vsi[i]);
15551                         break;
15552                 }
15553         }
15554
15555         /* The driver only wants link up/down and module qualification
15556          * reports from firmware.  Note the negative logic.
15557          */
15558         err = i40e_aq_set_phy_int_mask(&pf->hw,
15559                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
15560                                          I40E_AQ_EVENT_MEDIA_NA |
15561                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15562         if (err)
15563                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15564                          i40e_stat_str(&pf->hw, err),
15565                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15566
15567         /* Reconfigure hardware for allowing smaller MSS in the case
15568          * of TSO, so that we avoid the MDD being fired and causing
15569          * a reset in the case of small MSS+TSO.
15570          */
15571         val = rd32(hw, I40E_REG_MSS);
15572         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15573                 val &= ~I40E_REG_MSS_MIN_MASK;
15574                 val |= I40E_64BYTE_MSS;
15575                 wr32(hw, I40E_REG_MSS, val);
15576         }
15577
15578         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15579                 msleep(75);
15580                 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15581                 if (err)
15582                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15583                                  i40e_stat_str(&pf->hw, err),
15584                                  i40e_aq_str(&pf->hw,
15585                                              pf->hw.aq.asq_last_status));
15586         }
15587         /* The main driver is (mostly) up and happy. We need to set this state
15588          * before setting up the misc vector or we get a race and the vector
15589          * ends up disabled forever.
15590          */
15591         clear_bit(__I40E_DOWN, pf->state);
15592
15593         /* In case of MSIX we are going to setup the misc vector right here
15594          * to handle admin queue events etc. In case of legacy and MSI
15595          * the misc functionality and queue processing is combined in
15596          * the same vector and that gets setup at open.
15597          */
15598         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15599                 err = i40e_setup_misc_vector(pf);
15600                 if (err) {
15601                         dev_info(&pdev->dev,
15602                                  "setup of misc vector failed: %d\n", err);
15603                         i40e_cloud_filter_exit(pf);
15604                         i40e_fdir_teardown(pf);
15605                         goto err_vsis;
15606                 }
15607         }
15608
15609 #ifdef CONFIG_PCI_IOV
15610         /* prep for VF support */
15611         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15612             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15613             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15614                 /* disable link interrupts for VFs */
15615                 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15616                 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15617                 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15618                 i40e_flush(hw);
15619
15620                 if (pci_num_vf(pdev)) {
15621                         dev_info(&pdev->dev,
15622                                  "Active VFs found, allocating resources.\n");
15623                         err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15624                         if (err)
15625                                 dev_info(&pdev->dev,
15626                                          "Error %d allocating resources for existing VFs\n",
15627                                          err);
15628                 }
15629         }
15630 #endif /* CONFIG_PCI_IOV */
15631
15632         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15633                 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15634                                                       pf->num_iwarp_msix,
15635                                                       I40E_IWARP_IRQ_PILE_ID);
15636                 if (pf->iwarp_base_vector < 0) {
15637                         dev_info(&pdev->dev,
15638                                  "failed to get tracking for %d vectors for IWARP err=%d\n",
15639                                  pf->num_iwarp_msix, pf->iwarp_base_vector);
15640                         pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15641                 }
15642         }
15643
15644         i40e_dbg_pf_init(pf);
15645
15646         /* tell the firmware that we're starting */
15647         i40e_send_version(pf);
15648
15649         /* since everything's happy, start the service_task timer */
15650         mod_timer(&pf->service_timer,
15651                   round_jiffies(jiffies + pf->service_timer_period));
15652
15653         /* add this PF to client device list and launch a client service task */
15654         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15655                 err = i40e_lan_add_device(pf);
15656                 if (err)
15657                         dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15658                                  err);
15659         }
15660
15661 #define PCI_SPEED_SIZE 8
15662 #define PCI_WIDTH_SIZE 8
15663         /* Devices on the IOSF bus do not have this information
15664          * and will report PCI Gen 1 x 1 by default so don't bother
15665          * checking them.
15666          */
15667         if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15668                 char speed[PCI_SPEED_SIZE] = "Unknown";
15669                 char width[PCI_WIDTH_SIZE] = "Unknown";
15670
15671                 /* Get the negotiated link width and speed from PCI config
15672                  * space
15673                  */
15674                 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15675                                           &link_status);
15676
15677                 i40e_set_pci_config_data(hw, link_status);
15678
15679                 switch (hw->bus.speed) {
15680                 case i40e_bus_speed_8000:
15681                         strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15682                 case i40e_bus_speed_5000:
15683                         strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15684                 case i40e_bus_speed_2500:
15685                         strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15686                 default:
15687                         break;
15688                 }
15689                 switch (hw->bus.width) {
15690                 case i40e_bus_width_pcie_x8:
15691                         strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15692                 case i40e_bus_width_pcie_x4:
15693                         strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15694                 case i40e_bus_width_pcie_x2:
15695                         strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15696                 case i40e_bus_width_pcie_x1:
15697                         strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15698                 default:
15699                         break;
15700                 }
15701
15702                 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15703                          speed, width);
15704
15705                 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15706                     hw->bus.speed < i40e_bus_speed_8000) {
15707                         dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15708                         dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15709                 }
15710         }
15711
15712         /* get the requested speeds from the fw */
15713         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15714         if (err)
15715                 dev_dbg(&pf->pdev->dev, "get requested speeds ret =  %s last_status =  %s\n",
15716                         i40e_stat_str(&pf->hw, err),
15717                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15718         pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15719
15720         /* set the FEC config due to the board capabilities */
15721         i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15722
15723         /* get the supported phy types from the fw */
15724         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15725         if (err)
15726                 dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %s last_status =  %s\n",
15727                         i40e_stat_str(&pf->hw, err),
15728                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15729
15730         /* make sure the MFS hasn't been set lower than the default */
15731 #define MAX_FRAME_SIZE_DEFAULT 0x2600
15732         val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
15733                I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
15734         if (val < MAX_FRAME_SIZE_DEFAULT)
15735                 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
15736                          i, val);
15737
15738         /* Add a filter to drop all Flow control frames from any VSI from being
15739          * transmitted. By doing so we stop a malicious VF from sending out
15740          * PAUSE or PFC frames and potentially controlling traffic for other
15741          * PF/VF VSIs.
15742          * The FW can still send Flow control frames if enabled.
15743          */
15744         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15745                                                        pf->main_vsi_seid);
15746 #ifdef CONFIG_I40E_DCB
15747         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP)
15748                 i40e_set_lldp_forwarding(pf, true);
15749 #endif /* CONFIG_I40E_DCB */
15750
15751         if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15752                 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15753                 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15754         if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15755                 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15756         /* print a string summarizing features */
15757         i40e_print_features(pf);
15758
15759         return 0;
15760
15761         /* Unwind what we've done if something failed in the setup */
15762 err_vsis:
15763         set_bit(__I40E_DOWN, pf->state);
15764         i40e_clear_interrupt_scheme(pf);
15765         kfree(pf->vsi);
15766 err_switch_setup:
15767         i40e_reset_interrupt_capability(pf);
15768         del_timer_sync(&pf->service_timer);
15769 err_mac_addr:
15770 err_configure_lan_hmc:
15771         (void)i40e_shutdown_lan_hmc(hw);
15772 err_init_lan_hmc:
15773         kfree(pf->qp_pile);
15774 err_sw_init:
15775 err_adminq_setup:
15776 err_pf_reset:
15777         iounmap(hw->hw_addr);
15778 err_ioremap:
15779         kfree(pf);
15780 err_pf_alloc:
15781         pci_disable_pcie_error_reporting(pdev);
15782         pci_release_mem_regions(pdev);
15783 err_pci_reg:
15784 err_dma:
15785         pci_disable_device(pdev);
15786         return err;
15787 }
15788
15789 /**
15790  * i40e_remove - Device removal routine
15791  * @pdev: PCI device information struct
15792  *
15793  * i40e_remove is called by the PCI subsystem to alert the driver
15794  * that is should release a PCI device.  This could be caused by a
15795  * Hot-Plug event, or because the driver is going to be removed from
15796  * memory.
15797  **/
15798 static void i40e_remove(struct pci_dev *pdev)
15799 {
15800         struct i40e_pf *pf = pci_get_drvdata(pdev);
15801         struct i40e_hw *hw = &pf->hw;
15802         i40e_status ret_code;
15803         int i;
15804
15805         i40e_dbg_pf_exit(pf);
15806
15807         i40e_ptp_stop(pf);
15808
15809         /* Disable RSS in hw */
15810         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
15811         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
15812
15813         while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
15814                 usleep_range(1000, 2000);
15815
15816         if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
15817                 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
15818                 i40e_free_vfs(pf);
15819                 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
15820         }
15821         /* no more scheduling of any task */
15822         set_bit(__I40E_SUSPENDED, pf->state);
15823         set_bit(__I40E_DOWN, pf->state);
15824         if (pf->service_timer.function)
15825                 del_timer_sync(&pf->service_timer);
15826         if (pf->service_task.func)
15827                 cancel_work_sync(&pf->service_task);
15828
15829         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
15830                 struct i40e_vsi *vsi = pf->vsi[0];
15831
15832                 /* We know that we have allocated only one vsi for this PF,
15833                  * it was just for registering netdevice, so the interface
15834                  * could be visible in the 'ifconfig' output
15835                  */
15836                 unregister_netdev(vsi->netdev);
15837                 free_netdev(vsi->netdev);
15838
15839                 goto unmap;
15840         }
15841
15842         /* Client close must be called explicitly here because the timer
15843          * has been stopped.
15844          */
15845         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15846
15847         i40e_fdir_teardown(pf);
15848
15849         /* If there is a switch structure or any orphans, remove them.
15850          * This will leave only the PF's VSI remaining.
15851          */
15852         for (i = 0; i < I40E_MAX_VEB; i++) {
15853                 if (!pf->veb[i])
15854                         continue;
15855
15856                 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
15857                     pf->veb[i]->uplink_seid == 0)
15858                         i40e_switch_branch_release(pf->veb[i]);
15859         }
15860
15861         /* Now we can shutdown the PF's VSI, just before we kill
15862          * adminq and hmc.
15863          */
15864         if (pf->vsi[pf->lan_vsi])
15865                 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
15866
15867         i40e_cloud_filter_exit(pf);
15868
15869         /* remove attached clients */
15870         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15871                 ret_code = i40e_lan_del_device(pf);
15872                 if (ret_code)
15873                         dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
15874                                  ret_code);
15875         }
15876
15877         /* shutdown and destroy the HMC */
15878         if (hw->hmc.hmc_obj) {
15879                 ret_code = i40e_shutdown_lan_hmc(hw);
15880                 if (ret_code)
15881                         dev_warn(&pdev->dev,
15882                                  "Failed to destroy the HMC resources: %d\n",
15883                                  ret_code);
15884         }
15885
15886 unmap:
15887         /* Free MSI/legacy interrupt 0 when in recovery mode. */
15888         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15889             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15890                 free_irq(pf->pdev->irq, pf);
15891
15892         /* shutdown the adminq */
15893         i40e_shutdown_adminq(hw);
15894
15895         /* destroy the locks only once, here */
15896         mutex_destroy(&hw->aq.arq_mutex);
15897         mutex_destroy(&hw->aq.asq_mutex);
15898
15899         /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
15900         rtnl_lock();
15901         i40e_clear_interrupt_scheme(pf);
15902         for (i = 0; i < pf->num_alloc_vsi; i++) {
15903                 if (pf->vsi[i]) {
15904                         if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
15905                                 i40e_vsi_clear_rings(pf->vsi[i]);
15906                         i40e_vsi_clear(pf->vsi[i]);
15907                         pf->vsi[i] = NULL;
15908                 }
15909         }
15910         rtnl_unlock();
15911
15912         for (i = 0; i < I40E_MAX_VEB; i++) {
15913                 kfree(pf->veb[i]);
15914                 pf->veb[i] = NULL;
15915         }
15916
15917         kfree(pf->qp_pile);
15918         kfree(pf->vsi);
15919
15920         iounmap(hw->hw_addr);
15921         kfree(pf);
15922         pci_release_mem_regions(pdev);
15923
15924         pci_disable_pcie_error_reporting(pdev);
15925         pci_disable_device(pdev);
15926 }
15927
15928 /**
15929  * i40e_pci_error_detected - warning that something funky happened in PCI land
15930  * @pdev: PCI device information struct
15931  * @error: the type of PCI error
15932  *
15933  * Called to warn that something happened and the error handling steps
15934  * are in progress.  Allows the driver to quiesce things, be ready for
15935  * remediation.
15936  **/
15937 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
15938                                                 pci_channel_state_t error)
15939 {
15940         struct i40e_pf *pf = pci_get_drvdata(pdev);
15941
15942         dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
15943
15944         if (!pf) {
15945                 dev_info(&pdev->dev,
15946                          "Cannot recover - error happened during device probe\n");
15947                 return PCI_ERS_RESULT_DISCONNECT;
15948         }
15949
15950         /* shutdown all operations */
15951         if (!test_bit(__I40E_SUSPENDED, pf->state))
15952                 i40e_prep_for_reset(pf);
15953
15954         /* Request a slot reset */
15955         return PCI_ERS_RESULT_NEED_RESET;
15956 }
15957
15958 /**
15959  * i40e_pci_error_slot_reset - a PCI slot reset just happened
15960  * @pdev: PCI device information struct
15961  *
15962  * Called to find if the driver can work with the device now that
15963  * the pci slot has been reset.  If a basic connection seems good
15964  * (registers are readable and have sane content) then return a
15965  * happy little PCI_ERS_RESULT_xxx.
15966  **/
15967 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
15968 {
15969         struct i40e_pf *pf = pci_get_drvdata(pdev);
15970         pci_ers_result_t result;
15971         u32 reg;
15972
15973         dev_dbg(&pdev->dev, "%s\n", __func__);
15974         if (pci_enable_device_mem(pdev)) {
15975                 dev_info(&pdev->dev,
15976                          "Cannot re-enable PCI device after reset.\n");
15977                 result = PCI_ERS_RESULT_DISCONNECT;
15978         } else {
15979                 pci_set_master(pdev);
15980                 pci_restore_state(pdev);
15981                 pci_save_state(pdev);
15982                 pci_wake_from_d3(pdev, false);
15983
15984                 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
15985                 if (reg == 0)
15986                         result = PCI_ERS_RESULT_RECOVERED;
15987                 else
15988                         result = PCI_ERS_RESULT_DISCONNECT;
15989         }
15990
15991         return result;
15992 }
15993
15994 /**
15995  * i40e_pci_error_reset_prepare - prepare device driver for pci reset
15996  * @pdev: PCI device information struct
15997  */
15998 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
15999 {
16000         struct i40e_pf *pf = pci_get_drvdata(pdev);
16001
16002         i40e_prep_for_reset(pf);
16003 }
16004
16005 /**
16006  * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16007  * @pdev: PCI device information struct
16008  */
16009 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16010 {
16011         struct i40e_pf *pf = pci_get_drvdata(pdev);
16012
16013         i40e_reset_and_rebuild(pf, false, false);
16014 }
16015
16016 /**
16017  * i40e_pci_error_resume - restart operations after PCI error recovery
16018  * @pdev: PCI device information struct
16019  *
16020  * Called to allow the driver to bring things back up after PCI error
16021  * and/or reset recovery has finished.
16022  **/
16023 static void i40e_pci_error_resume(struct pci_dev *pdev)
16024 {
16025         struct i40e_pf *pf = pci_get_drvdata(pdev);
16026
16027         dev_dbg(&pdev->dev, "%s\n", __func__);
16028         if (test_bit(__I40E_SUSPENDED, pf->state))
16029                 return;
16030
16031         i40e_handle_reset_warning(pf, false);
16032 }
16033
16034 /**
16035  * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16036  * using the mac_address_write admin q function
16037  * @pf: pointer to i40e_pf struct
16038  **/
16039 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16040 {
16041         struct i40e_hw *hw = &pf->hw;
16042         i40e_status ret;
16043         u8 mac_addr[6];
16044         u16 flags = 0;
16045
16046         /* Get current MAC address in case it's an LAA */
16047         if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16048                 ether_addr_copy(mac_addr,
16049                                 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16050         } else {
16051                 dev_err(&pf->pdev->dev,
16052                         "Failed to retrieve MAC address; using default\n");
16053                 ether_addr_copy(mac_addr, hw->mac.addr);
16054         }
16055
16056         /* The FW expects the mac address write cmd to first be called with
16057          * one of these flags before calling it again with the multicast
16058          * enable flags.
16059          */
16060         flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16061
16062         if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16063                 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16064
16065         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16066         if (ret) {
16067                 dev_err(&pf->pdev->dev,
16068                         "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16069                 return;
16070         }
16071
16072         flags = I40E_AQC_MC_MAG_EN
16073                         | I40E_AQC_WOL_PRESERVE_ON_PFR
16074                         | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16075         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16076         if (ret)
16077                 dev_err(&pf->pdev->dev,
16078                         "Failed to enable Multicast Magic Packet wake up\n");
16079 }
16080
16081 /**
16082  * i40e_shutdown - PCI callback for shutting down
16083  * @pdev: PCI device information struct
16084  **/
16085 static void i40e_shutdown(struct pci_dev *pdev)
16086 {
16087         struct i40e_pf *pf = pci_get_drvdata(pdev);
16088         struct i40e_hw *hw = &pf->hw;
16089
16090         set_bit(__I40E_SUSPENDED, pf->state);
16091         set_bit(__I40E_DOWN, pf->state);
16092
16093         del_timer_sync(&pf->service_timer);
16094         cancel_work_sync(&pf->service_task);
16095         i40e_cloud_filter_exit(pf);
16096         i40e_fdir_teardown(pf);
16097
16098         /* Client close must be called explicitly here because the timer
16099          * has been stopped.
16100          */
16101         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16102
16103         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16104                 i40e_enable_mc_magic_wake(pf);
16105
16106         i40e_prep_for_reset(pf);
16107
16108         wr32(hw, I40E_PFPM_APM,
16109              (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16110         wr32(hw, I40E_PFPM_WUFC,
16111              (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16112
16113         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16114         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16115             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16116                 free_irq(pf->pdev->irq, pf);
16117
16118         /* Since we're going to destroy queues during the
16119          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16120          * whole section
16121          */
16122         rtnl_lock();
16123         i40e_clear_interrupt_scheme(pf);
16124         rtnl_unlock();
16125
16126         if (system_state == SYSTEM_POWER_OFF) {
16127                 pci_wake_from_d3(pdev, pf->wol_en);
16128                 pci_set_power_state(pdev, PCI_D3hot);
16129         }
16130 }
16131
16132 /**
16133  * i40e_suspend - PM callback for moving to D3
16134  * @dev: generic device information structure
16135  **/
16136 static int __maybe_unused i40e_suspend(struct device *dev)
16137 {
16138         struct i40e_pf *pf = dev_get_drvdata(dev);
16139         struct i40e_hw *hw = &pf->hw;
16140
16141         /* If we're already suspended, then there is nothing to do */
16142         if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16143                 return 0;
16144
16145         set_bit(__I40E_DOWN, pf->state);
16146
16147         /* Ensure service task will not be running */
16148         del_timer_sync(&pf->service_timer);
16149         cancel_work_sync(&pf->service_task);
16150
16151         /* Client close must be called explicitly here because the timer
16152          * has been stopped.
16153          */
16154         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16155
16156         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16157                 i40e_enable_mc_magic_wake(pf);
16158
16159         /* Since we're going to destroy queues during the
16160          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16161          * whole section
16162          */
16163         rtnl_lock();
16164
16165         i40e_prep_for_reset(pf);
16166
16167         wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16168         wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16169
16170         /* Clear the interrupt scheme and release our IRQs so that the system
16171          * can safely hibernate even when there are a large number of CPUs.
16172          * Otherwise hibernation might fail when mapping all the vectors back
16173          * to CPU0.
16174          */
16175         i40e_clear_interrupt_scheme(pf);
16176
16177         rtnl_unlock();
16178
16179         return 0;
16180 }
16181
16182 /**
16183  * i40e_resume - PM callback for waking up from D3
16184  * @dev: generic device information structure
16185  **/
16186 static int __maybe_unused i40e_resume(struct device *dev)
16187 {
16188         struct i40e_pf *pf = dev_get_drvdata(dev);
16189         int err;
16190
16191         /* If we're not suspended, then there is nothing to do */
16192         if (!test_bit(__I40E_SUSPENDED, pf->state))
16193                 return 0;
16194
16195         /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16196          * since we're going to be restoring queues
16197          */
16198         rtnl_lock();
16199
16200         /* We cleared the interrupt scheme when we suspended, so we need to
16201          * restore it now to resume device functionality.
16202          */
16203         err = i40e_restore_interrupt_scheme(pf);
16204         if (err) {
16205                 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16206                         err);
16207         }
16208
16209         clear_bit(__I40E_DOWN, pf->state);
16210         i40e_reset_and_rebuild(pf, false, true);
16211
16212         rtnl_unlock();
16213
16214         /* Clear suspended state last after everything is recovered */
16215         clear_bit(__I40E_SUSPENDED, pf->state);
16216
16217         /* Restart the service task */
16218         mod_timer(&pf->service_timer,
16219                   round_jiffies(jiffies + pf->service_timer_period));
16220
16221         return 0;
16222 }
16223
16224 static const struct pci_error_handlers i40e_err_handler = {
16225         .error_detected = i40e_pci_error_detected,
16226         .slot_reset = i40e_pci_error_slot_reset,
16227         .reset_prepare = i40e_pci_error_reset_prepare,
16228         .reset_done = i40e_pci_error_reset_done,
16229         .resume = i40e_pci_error_resume,
16230 };
16231
16232 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16233
16234 static struct pci_driver i40e_driver = {
16235         .name     = i40e_driver_name,
16236         .id_table = i40e_pci_tbl,
16237         .probe    = i40e_probe,
16238         .remove   = i40e_remove,
16239         .driver   = {
16240                 .pm = &i40e_pm_ops,
16241         },
16242         .shutdown = i40e_shutdown,
16243         .err_handler = &i40e_err_handler,
16244         .sriov_configure = i40e_pci_sriov_configure,
16245 };
16246
16247 /**
16248  * i40e_init_module - Driver registration routine
16249  *
16250  * i40e_init_module is the first routine called when the driver is
16251  * loaded. All it does is register with the PCI subsystem.
16252  **/
16253 static int __init i40e_init_module(void)
16254 {
16255         pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16256         pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16257
16258         /* There is no need to throttle the number of active tasks because
16259          * each device limits its own task using a state bit for scheduling
16260          * the service task, and the device tasks do not interfere with each
16261          * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16262          * since we need to be able to guarantee forward progress even under
16263          * memory pressure.
16264          */
16265         i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16266         if (!i40e_wq) {
16267                 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16268                 return -ENOMEM;
16269         }
16270
16271         i40e_dbg_init();
16272         return pci_register_driver(&i40e_driver);
16273 }
16274 module_init(i40e_init_module);
16275
16276 /**
16277  * i40e_exit_module - Driver exit cleanup routine
16278  *
16279  * i40e_exit_module is called just before the driver is removed
16280  * from memory.
16281  **/
16282 static void __exit i40e_exit_module(void)
16283 {
16284         pci_unregister_driver(&i40e_driver);
16285         destroy_workqueue(i40e_wq);
16286         i40e_dbg_exit();
16287 }
16288 module_exit(i40e_exit_module);