drivers/net/ethernet/hisilicon/hns3/hnae3.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #ifndef __HNAE3_H
   5 #define __HNAE3_H
   6
   7 /* Names used in this framework:
   8  *      ae handle (handle):
   9  *        a set of queues provided by AE
  10  *      ring buffer queue (rbq):
  11  *        the channel between upper layer and the AE, can do tx and rx
  12  *      ring:
  13  *        a tx or rx channel within a rbq
  14  *      ring description (desc):
  15  *        an element in the ring with packet information
  16  *      buffer:
  17  *        a memory region referred by desc with the full packet payload
  18  *
  19  * "num" means a static number set as a parameter, "count" mean a dynamic
  20  *   number set while running
  21  * "cb" means control block
  22  */
  23
  24 #include <linux/acpi.h>
  25 #include <linux/dcbnl.h>
  26 #include <linux/delay.h>
  27 #include <linux/device.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/module.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/pci.h>
  32 #include <linux/pkt_sched.h>
  33 #include <linux/types.h>
  34 #include <net/pkt_cls.h>
  35
  36 #define HNAE3_MOD_VERSION "1.0"
  37
  38 #define HNAE3_MIN_VECTOR_NUM    2 /* first one for misc, another for IO */
  39
  40 /* Device version */
  41 #define HNAE3_DEVICE_VERSION_V1   0x00020
  42 #define HNAE3_DEVICE_VERSION_V2   0x00021
  43 #define HNAE3_DEVICE_VERSION_V3   0x00030
  44
  45 #define HNAE3_PCI_REVISION_BIT_SIZE             8
  46
  47 /* Device IDs */
  48 #define HNAE3_DEV_ID_GE                         0xA220
  49 #define HNAE3_DEV_ID_25GE                       0xA221
  50 #define HNAE3_DEV_ID_25GE_RDMA                  0xA222
  51 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC           0xA223
  52 #define HNAE3_DEV_ID_50GE_RDMA                  0xA224
  53 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC           0xA225
  54 #define HNAE3_DEV_ID_100G_RDMA_MACSEC           0xA226
  55 #define HNAE3_DEV_ID_200G_RDMA                  0xA228
  56 #define HNAE3_DEV_ID_VF                         0xA22E
  57 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF            0xA22F
  58
  59 #define HNAE3_CLASS_NAME_SIZE 16
  60
  61 #define HNAE3_DEV_INITED_B                      0x0
  62 #define HNAE3_DEV_SUPPORT_ROCE_B                0x1
  63 #define HNAE3_DEV_SUPPORT_DCB_B                 0x2
  64 #define HNAE3_KNIC_CLIENT_INITED_B              0x3
  65 #define HNAE3_UNIC_CLIENT_INITED_B              0x4
  66 #define HNAE3_ROCE_CLIENT_INITED_B              0x5
  67
  68 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) | \
  69                 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
  70
  71 #define hnae3_dev_roce_supported(hdev) \
  72         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
  73
  74 #define hnae3_dev_dcb_supported(hdev) \
  75         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
  76
  77 enum HNAE3_DEV_CAP_BITS {
  78         HNAE3_DEV_SUPPORT_FD_B,
  79         HNAE3_DEV_SUPPORT_GRO_B,
  80         HNAE3_DEV_SUPPORT_FEC_B,
  81         HNAE3_DEV_SUPPORT_UDP_GSO_B,
  82         HNAE3_DEV_SUPPORT_QB_B,
  83         HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
  84         HNAE3_DEV_SUPPORT_PTP_B,
  85         HNAE3_DEV_SUPPORT_INT_QL_B,
  86         HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
  87         HNAE3_DEV_SUPPORT_TX_PUSH_B,
  88         HNAE3_DEV_SUPPORT_PHY_IMP_B,
  89         HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
  90         HNAE3_DEV_SUPPORT_HW_PAD_B,
  91         HNAE3_DEV_SUPPORT_STASH_B,
  92         HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
  93         HNAE3_DEV_SUPPORT_PAUSE_B,
  94         HNAE3_DEV_SUPPORT_RAS_IMP_B,
  95         HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
  96         HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,
  97         HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
  98         HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,
  99 };
 100
 101 #define hnae3_dev_fd_supported(hdev) \
 102         test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps)
 103
 104 #define hnae3_dev_gro_supported(hdev) \
 105         test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps)
 106
 107 #define hnae3_dev_fec_supported(hdev) \
 108         test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
 109
 110 #define hnae3_dev_udp_gso_supported(hdev) \
 111         test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
 112
 113 #define hnae3_dev_qb_supported(hdev) \
 114         test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
 115
 116 #define hnae3_dev_fd_forward_tc_supported(hdev) \
 117         test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
 118
 119 #define hnae3_dev_ptp_supported(hdev) \
 120         test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
 121
 122 #define hnae3_dev_int_ql_supported(hdev) \
 123         test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
 124
 125 #define hnae3_dev_hw_csum_supported(hdev) \
 126         test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
 127
 128 #define hnae3_dev_tx_push_supported(hdev) \
 129         test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
 130
 131 #define hnae3_dev_phy_imp_supported(hdev) \
 132         test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
 133
 134 #define hnae3_dev_ras_imp_supported(hdev) \
 135         test_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, (hdev)->ae_dev->caps)
 136
 137 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
 138         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
 139
 140 #define hnae3_dev_hw_pad_supported(hdev) \
 141         test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
 142
 143 #define hnae3_dev_stash_supported(hdev) \
 144         test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
 145
 146 #define hnae3_dev_pause_supported(hdev) \
 147         test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, (hdev)->ae_dev->caps)
 148
 149 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
 150         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
 151
 152 #define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \
 153         test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)
 154
 155 #define hnae3_ae_dev_mc_mac_mng_supported(ae_dev) \
 156         test_bit(HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, (ae_dev)->caps)
 157
 158 enum HNAE3_PF_CAP_BITS {
 159         HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,
 160 };
 161 #define ring_ptr_move_fw(ring, p) \
 162         ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 163 #define ring_ptr_move_bw(ring, p) \
 164         ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
 165
 166 struct hnae3_handle;
 167
 168 struct hnae3_queue {
 169         void __iomem *io_base;
 170         void __iomem *mem_base;
 171         struct hnae3_ae_algo *ae_algo;
 172         struct hnae3_handle *handle;
 173         int tqp_index;          /* index in a handle */
 174         u32 buf_size;           /* size for hnae_desc->addr, preset by AE */
 175         u16 tx_desc_num;        /* total number of tx desc */
 176         u16 rx_desc_num;        /* total number of rx desc */
 177 };
 178
 179 struct hns3_mac_stats {
 180         u64 tx_pause_cnt;
 181         u64 rx_pause_cnt;
 182 };
 183
 184 /* hnae3 loop mode */
 185 enum hnae3_loop {
 186         HNAE3_LOOP_APP,
 187         HNAE3_LOOP_SERIAL_SERDES,
 188         HNAE3_LOOP_PARALLEL_SERDES,
 189         HNAE3_LOOP_PHY,
 190         HNAE3_LOOP_NONE,
 191 };
 192
 193 enum hnae3_client_type {
 194         HNAE3_CLIENT_KNIC,
 195         HNAE3_CLIENT_ROCE,
 196 };
 197
 198 /* mac media type */
 199 enum hnae3_media_type {
 200         HNAE3_MEDIA_TYPE_UNKNOWN,
 201         HNAE3_MEDIA_TYPE_FIBER,
 202         HNAE3_MEDIA_TYPE_COPPER,
 203         HNAE3_MEDIA_TYPE_BACKPLANE,
 204         HNAE3_MEDIA_TYPE_NONE,
 205 };
 206
 207 /* must be consistent with definition in firmware */
 208 enum hnae3_module_type {
 209         HNAE3_MODULE_TYPE_UNKNOWN       = 0x00,
 210         HNAE3_MODULE_TYPE_FIBRE_LR      = 0x01,
 211         HNAE3_MODULE_TYPE_FIBRE_SR      = 0x02,
 212         HNAE3_MODULE_TYPE_AOC           = 0x03,
 213         HNAE3_MODULE_TYPE_CR            = 0x04,
 214         HNAE3_MODULE_TYPE_KR            = 0x05,
 215         HNAE3_MODULE_TYPE_TP            = 0x06,
 216 };
 217
 218 enum hnae3_fec_mode {
 219         HNAE3_FEC_AUTO = 0,
 220         HNAE3_FEC_BASER,
 221         HNAE3_FEC_RS,
 222         HNAE3_FEC_USER_DEF,
 223 };
 224
 225 enum hnae3_reset_notify_type {
 226         HNAE3_UP_CLIENT,
 227         HNAE3_DOWN_CLIENT,
 228         HNAE3_INIT_CLIENT,
 229         HNAE3_UNINIT_CLIENT,
 230 };
 231
 232 enum hnae3_hw_error_type {
 233         HNAE3_PPU_POISON_ERROR,
 234         HNAE3_CMDQ_ECC_ERROR,
 235         HNAE3_IMP_RD_POISON_ERROR,
 236         HNAE3_ROCEE_AXI_RESP_ERROR,
 237 };
 238
 239 enum hnae3_reset_type {
 240         HNAE3_VF_RESET,
 241         HNAE3_VF_FUNC_RESET,
 242         HNAE3_VF_PF_FUNC_RESET,
 243         HNAE3_VF_FULL_RESET,
 244         HNAE3_FLR_RESET,
 245         HNAE3_FUNC_RESET,
 246         HNAE3_GLOBAL_RESET,
 247         HNAE3_IMP_RESET,
 248         HNAE3_NONE_RESET,
 249         HNAE3_MAX_RESET,
 250 };
 251
 252 enum hnae3_port_base_vlan_state {
 253         HNAE3_PORT_BASE_VLAN_DISABLE,
 254         HNAE3_PORT_BASE_VLAN_ENABLE,
 255         HNAE3_PORT_BASE_VLAN_MODIFY,
 256         HNAE3_PORT_BASE_VLAN_NOCHANGE,
 257 };
 258
 259 enum hnae3_dbg_cmd {
 260         HNAE3_DBG_CMD_TM_NODES,
 261         HNAE3_DBG_CMD_TM_PRI,
 262         HNAE3_DBG_CMD_TM_QSET,
 263         HNAE3_DBG_CMD_TM_MAP,
 264         HNAE3_DBG_CMD_TM_PG,
 265         HNAE3_DBG_CMD_TM_PORT,
 266         HNAE3_DBG_CMD_TC_SCH_INFO,
 267         HNAE3_DBG_CMD_QOS_PAUSE_CFG,
 268         HNAE3_DBG_CMD_QOS_PRI_MAP,
 269         HNAE3_DBG_CMD_QOS_BUF_CFG,
 270         HNAE3_DBG_CMD_DEV_INFO,
 271         HNAE3_DBG_CMD_TX_BD,
 272         HNAE3_DBG_CMD_RX_BD,
 273         HNAE3_DBG_CMD_MAC_UC,
 274         HNAE3_DBG_CMD_MAC_MC,
 275         HNAE3_DBG_CMD_MNG_TBL,
 276         HNAE3_DBG_CMD_LOOPBACK,
 277         HNAE3_DBG_CMD_PTP_INFO,
 278         HNAE3_DBG_CMD_INTERRUPT_INFO,
 279         HNAE3_DBG_CMD_RESET_INFO,
 280         HNAE3_DBG_CMD_IMP_INFO,
 281         HNAE3_DBG_CMD_NCL_CONFIG,
 282         HNAE3_DBG_CMD_REG_BIOS_COMMON,
 283         HNAE3_DBG_CMD_REG_SSU,
 284         HNAE3_DBG_CMD_REG_IGU_EGU,
 285         HNAE3_DBG_CMD_REG_RPU,
 286         HNAE3_DBG_CMD_REG_NCSI,
 287         HNAE3_DBG_CMD_REG_RTC,
 288         HNAE3_DBG_CMD_REG_PPP,
 289         HNAE3_DBG_CMD_REG_RCB,
 290         HNAE3_DBG_CMD_REG_TQP,
 291         HNAE3_DBG_CMD_REG_MAC,
 292         HNAE3_DBG_CMD_REG_DCB,
 293         HNAE3_DBG_CMD_VLAN_CONFIG,
 294         HNAE3_DBG_CMD_QUEUE_MAP,
 295         HNAE3_DBG_CMD_RX_QUEUE_INFO,
 296         HNAE3_DBG_CMD_TX_QUEUE_INFO,
 297         HNAE3_DBG_CMD_FD_TCAM,
 298         HNAE3_DBG_CMD_FD_COUNTER,
 299         HNAE3_DBG_CMD_MAC_TNL_STATUS,
 300         HNAE3_DBG_CMD_SERV_INFO,
 301         HNAE3_DBG_CMD_UMV_INFO,
 302         HNAE3_DBG_CMD_PAGE_POOL_INFO,
 303         HNAE3_DBG_CMD_COAL_INFO,
 304         HNAE3_DBG_CMD_UNKNOWN,
 305 };
 306
 307 struct hnae3_vector_info {
 308         u8 __iomem *io_addr;
 309         int vector;
 310 };
 311
 312 #define HNAE3_RING_TYPE_B 0
 313 #define HNAE3_RING_TYPE_TX 0
 314 #define HNAE3_RING_TYPE_RX 1
 315 #define HNAE3_RING_GL_IDX_S 0
 316 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
 317 #define HNAE3_RING_GL_RX 0
 318 #define HNAE3_RING_GL_TX 1
 319
 320 #define HNAE3_FW_VERSION_BYTE3_SHIFT    24
 321 #define HNAE3_FW_VERSION_BYTE3_MASK     GENMASK(31, 24)
 322 #define HNAE3_FW_VERSION_BYTE2_SHIFT    16
 323 #define HNAE3_FW_VERSION_BYTE2_MASK     GENMASK(23, 16)
 324 #define HNAE3_FW_VERSION_BYTE1_SHIFT    8
 325 #define HNAE3_FW_VERSION_BYTE1_MASK     GENMASK(15, 8)
 326 #define HNAE3_FW_VERSION_BYTE0_SHIFT    0
 327 #define HNAE3_FW_VERSION_BYTE0_MASK     GENMASK(7, 0)
 328
 329 struct hnae3_ring_chain_node {
 330         struct hnae3_ring_chain_node *next;
 331         u32 tqp_index;
 332         u32 flag;
 333         u32 int_gl_idx;
 334 };
 335
 336 #define HNAE3_IS_TX_RING(node) \
 337         (((node)->flag & 1 << HNAE3_RING_TYPE_B) == HNAE3_RING_TYPE_TX)
 338
 339 /* device specification info from firmware */
 340 struct hnae3_dev_specs {
 341         u32 mac_entry_num; /* number of mac-vlan table entry */
 342         u32 mng_entry_num; /* number of manager table entry */
 343         u32 max_tm_rate;
 344         u16 rss_ind_tbl_size;
 345         u16 rss_key_size;
 346         u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
 347         u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
 348         u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
 349         u16 max_frm_size;
 350         u16 max_qset_num;
 351         u16 umv_size;
 352         u16 mc_mac_size;
 353         u32 mac_stats_num;
 354 };
 355
 356 struct hnae3_client_ops {
 357         int (*init_instance)(struct hnae3_handle *handle);
 358         void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
 359         void (*link_status_change)(struct hnae3_handle *handle, bool state);
 360         int (*reset_notify)(struct hnae3_handle *handle,
 361                             enum hnae3_reset_notify_type type);
 362         void (*process_hw_error)(struct hnae3_handle *handle,
 363                                  enum hnae3_hw_error_type);
 364 };
 365
 366 #define HNAE3_CLIENT_NAME_LENGTH 16
 367 struct hnae3_client {
 368         char name[HNAE3_CLIENT_NAME_LENGTH];
 369         unsigned long state;
 370         enum hnae3_client_type type;
 371         const struct hnae3_client_ops *ops;
 372         struct list_head node;
 373 };
 374
 375 #define HNAE3_DEV_CAPS_MAX_NUM  96
 376 struct hnae3_ae_dev {
 377         struct pci_dev *pdev;
 378         const struct hnae3_ae_ops *ops;
 379         struct list_head node;
 380         u32 flag;
 381         unsigned long hw_err_reset_req;
 382         struct hnae3_dev_specs dev_specs;
 383         u32 dev_version;
 384         unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];
 385         void *priv;
 386 };
 387
 388 /* This struct defines the operation on the handle.
 389  *
 390  * init_ae_dev(): (mandatory)
 391  *   Get PF configure from pci_dev and initialize PF hardware
 392  * uninit_ae_dev()
 393  *   Disable PF device and release PF resource
 394  * register_client
 395  *   Register client to ae_dev
 396  * unregister_client()
 397  *   Unregister client from ae_dev
 398  * start()
 399  *   Enable the hardware
 400  * stop()
 401  *   Disable the hardware
 402  * start_client()
 403  *   Inform the hclge that client has been started
 404  * stop_client()
 405  *   Inform the hclge that client has been stopped
 406  * get_status()
 407  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
 408  *   non-ok
 409  * get_ksettings_an_result()
 410  *   Get negotiation status,speed and duplex
 411  * get_media_type()
 412  *   Get media type of MAC
 413  * check_port_speed()
 414  *   Check target speed whether is supported
 415  * adjust_link()
 416  *   Adjust link status
 417  * set_loopback()
 418  *   Set loopback
 419  * set_promisc_mode
 420  *   Set promisc mode
 421  * request_update_promisc_mode
 422  *   request to hclge(vf) to update promisc mode
 423  * set_mtu()
 424  *   set mtu
 425  * get_pauseparam()
 426  *   get tx and rx of pause frame use
 427  * set_pauseparam()
 428  *   set tx and rx of pause frame use
 429  * set_autoneg()
 430  *   set auto autonegotiation of pause frame use
 431  * get_autoneg()
 432  *   get auto autonegotiation of pause frame use
 433  * restart_autoneg()
 434  *   restart autonegotiation
 435  * halt_autoneg()
 436  *   halt/resume autonegotiation when autonegotiation on
 437  * get_coalesce_usecs()
 438  *   get usecs to delay a TX interrupt after a packet is sent
 439  * get_rx_max_coalesced_frames()
 440  *   get Maximum number of packets to be sent before a TX interrupt.
 441  * set_coalesce_usecs()
 442  *   set usecs to delay a TX interrupt after a packet is sent
 443  * set_coalesce_frames()
 444  *   set Maximum number of packets to be sent before a TX interrupt.
 445  * get_mac_addr()
 446  *   get mac address
 447  * set_mac_addr()
 448  *   set mac address
 449  * add_uc_addr
 450  *   Add unicast addr to mac table
 451  * rm_uc_addr
 452  *   Remove unicast addr from mac table
 453  * set_mc_addr()
 454  *   Set multicast address
 455  * add_mc_addr
 456  *   Add multicast address to mac table
 457  * rm_mc_addr
 458  *   Remove multicast address from mac table
 459  * update_stats()
 460  *   Update Old network device statistics
 461  * get_mac_stats()
 462  *   get mac pause statistics including tx_cnt and rx_cnt
 463  * get_ethtool_stats()
 464  *   Get ethtool network device statistics
 465  * get_strings()
 466  *   Get a set of strings that describe the requested objects
 467  * get_sset_count()
 468  *   Get number of strings that @get_strings will write
 469  * update_led_status()
 470  *   Update the led status
 471  * set_led_id()
 472  *   Set led id
 473  * get_regs()
 474  *   Get regs dump
 475  * get_regs_len()
 476  *   Get the len of the regs dump
 477  * get_rss_key_size()
 478  *   Get rss key size
 479  * get_rss()
 480  *   Get rss table
 481  * set_rss()
 482  *   Set rss table
 483  * get_tc_size()
 484  *   Get tc size of handle
 485  * get_vector()
 486  *   Get vector number and vector information
 487  * put_vector()
 488  *   Put the vector in hdev
 489  * map_ring_to_vector()
 490  *   Map rings to vector
 491  * unmap_ring_from_vector()
 492  *   Unmap rings from vector
 493  * reset_queue()
 494  *   Reset queue
 495  * get_fw_version()
 496  *   Get firmware version
 497  * get_mdix_mode()
 498  *   Get media typr of phy
 499  * enable_vlan_filter()
 500  *   Enable vlan filter
 501  * set_vlan_filter()
 502  *   Set vlan filter config of Ports
 503  * set_vf_vlan_filter()
 504  *   Set vlan filter config of vf
 505  * enable_hw_strip_rxvtag()
 506  *   Enable/disable hardware strip vlan tag of packets received
 507  * set_gro_en
 508  *   Enable/disable HW GRO
 509  * add_arfs_entry
 510  *   Check the 5-tuples of flow, and create flow director rule
 511  * get_vf_config
 512  *   Get the VF configuration setting by the host
 513  * set_vf_link_state
 514  *   Set VF link status
 515  * set_vf_spoofchk
 516  *   Enable/disable spoof check for specified vf
 517  * set_vf_trust
 518  *   Enable/disable trust for specified vf, if the vf being trusted, then
 519  *   it can enable promisc mode
 520  * set_vf_rate
 521  *   Set the max tx rate of specified vf.
 522  * set_vf_mac
 523  *   Configure the default MAC for specified VF
 524  * get_module_eeprom
 525  *   Get the optical module eeprom info.
 526  * add_cls_flower
 527  *   Add clsflower rule
 528  * del_cls_flower
 529  *   Delete clsflower rule
 530  * cls_flower_active
 531  *   Check if any cls flower rule exist
 532  * dbg_read_cmd
 533  *   Execute debugfs read command.
 534  * set_tx_hwts_info
 535  *   Save information for 1588 tx packet
 536  * get_rx_hwts
 537  *   Get 1588 rx hwstamp
 538  * get_ts_info
 539  *   Get phc info
 540  * clean_vf_config
 541  *   Clean residual vf info after disable sriov
 542  */
 543 struct hnae3_ae_ops {
 544         int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
 545         void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
 546         void (*reset_prepare)(struct hnae3_ae_dev *ae_dev,
 547                               enum hnae3_reset_type rst_type);
 548         void (*reset_done)(struct hnae3_ae_dev *ae_dev);
 549         int (*init_client_instance)(struct hnae3_client *client,
 550                                     struct hnae3_ae_dev *ae_dev);
 551         void (*uninit_client_instance)(struct hnae3_client *client,
 552                                        struct hnae3_ae_dev *ae_dev);
 553         int (*start)(struct hnae3_handle *handle);
 554         void (*stop)(struct hnae3_handle *handle);
 555         int (*client_start)(struct hnae3_handle *handle);
 556         void (*client_stop)(struct hnae3_handle *handle);
 557         int (*get_status)(struct hnae3_handle *handle);
 558         void (*get_ksettings_an_result)(struct hnae3_handle *handle,
 559                                         u8 *auto_neg, u32 *speed, u8 *duplex);
 560
 561         int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
 562                                    u8 duplex);
 563
 564         void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
 565                                u8 *module_type);
 566         int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
 567         void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
 568                         u8 *fec_mode);
 569         int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
 570         void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
 571         int (*set_loopback)(struct hnae3_handle *handle,
 572                             enum hnae3_loop loop_mode, bool en);
 573
 574         int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
 575                                 bool en_mc_pmc);
 576         void (*request_update_promisc_mode)(struct hnae3_handle *handle);
 577         int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
 578
 579         void (*get_pauseparam)(struct hnae3_handle *handle,
 580                                u32 *auto_neg, u32 *rx_en, u32 *tx_en);
 581         int (*set_pauseparam)(struct hnae3_handle *handle,
 582                               u32 auto_neg, u32 rx_en, u32 tx_en);
 583
 584         int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
 585         int (*get_autoneg)(struct hnae3_handle *handle);
 586         int (*restart_autoneg)(struct hnae3_handle *handle);
 587         int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
 588
 589         void (*get_coalesce_usecs)(struct hnae3_handle *handle,
 590                                    u32 *tx_usecs, u32 *rx_usecs);
 591         void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
 592                                             u32 *tx_frames, u32 *rx_frames);
 593         int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
 594         int (*set_coalesce_frames)(struct hnae3_handle *handle,
 595                                    u32 coalesce_frames);
 596         void (*get_coalesce_range)(struct hnae3_handle *handle,
 597                                    u32 *tx_frames_low, u32 *rx_frames_low,
 598                                    u32 *tx_frames_high, u32 *rx_frames_high,
 599                                    u32 *tx_usecs_low, u32 *rx_usecs_low,
 600                                    u32 *tx_usecs_high, u32 *rx_usecs_high);
 601
 602         void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
 603         int (*set_mac_addr)(struct hnae3_handle *handle, const void *p,
 604                             bool is_first);
 605         int (*do_ioctl)(struct hnae3_handle *handle,
 606                         struct ifreq *ifr, int cmd);
 607         int (*add_uc_addr)(struct hnae3_handle *handle,
 608                            const unsigned char *addr);
 609         int (*rm_uc_addr)(struct hnae3_handle *handle,
 610                           const unsigned char *addr);
 611         int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
 612         int (*add_mc_addr)(struct hnae3_handle *handle,
 613                            const unsigned char *addr);
 614         int (*rm_mc_addr)(struct hnae3_handle *handle,
 615                           const unsigned char *addr);
 616         void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
 617         void (*update_stats)(struct hnae3_handle *handle,
 618                              struct net_device_stats *net_stats);
 619         void (*get_stats)(struct hnae3_handle *handle, u64 *data);
 620         void (*get_mac_stats)(struct hnae3_handle *handle,
 621                               struct hns3_mac_stats *mac_stats);
 622         void (*get_strings)(struct hnae3_handle *handle,
 623                             u32 stringset, u8 *data);
 624         int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
 625
 626         void (*get_regs)(struct hnae3_handle *handle, u32 *version,
 627                          void *data);
 628         int (*get_regs_len)(struct hnae3_handle *handle);
 629
 630         u32 (*get_rss_key_size)(struct hnae3_handle *handle);
 631         int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
 632                        u8 *hfunc);
 633         int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
 634                        const u8 *key, const u8 hfunc);
 635         int (*set_rss_tuple)(struct hnae3_handle *handle,
 636                              struct ethtool_rxnfc *cmd);
 637         int (*get_rss_tuple)(struct hnae3_handle *handle,
 638                              struct ethtool_rxnfc *cmd);
 639
 640         int (*get_tc_size)(struct hnae3_handle *handle);
 641
 642         int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
 643                           struct hnae3_vector_info *vector_info);
 644         int (*put_vector)(struct hnae3_handle *handle, int vector_num);
 645         int (*map_ring_to_vector)(struct hnae3_handle *handle,
 646                                   int vector_num,
 647                                   struct hnae3_ring_chain_node *vr_chain);
 648         int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
 649                                       int vector_num,
 650                                       struct hnae3_ring_chain_node *vr_chain);
 651
 652         int (*reset_queue)(struct hnae3_handle *handle);
 653         u32 (*get_fw_version)(struct hnae3_handle *handle);
 654         void (*get_mdix_mode)(struct hnae3_handle *handle,
 655                               u8 *tp_mdix_ctrl, u8 *tp_mdix);
 656
 657         int (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
 658         int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
 659                                u16 vlan_id, bool is_kill);
 660         int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
 661                                   u16 vlan, u8 qos, __be16 proto);
 662         int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
 663         void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
 664         enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
 665                                                  unsigned long *addr);
 666         void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
 667                                           enum hnae3_reset_type rst_type);
 668         void (*get_channels)(struct hnae3_handle *handle,
 669                              struct ethtool_channels *ch);
 670         void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
 671                                       u16 *alloc_tqps, u16 *max_rss_size);
 672         int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
 673                             bool rxfh_configured);
 674         void (*get_flowctrl_adv)(struct hnae3_handle *handle,
 675                                  u32 *flowctrl_adv);
 676         int (*set_led_id)(struct hnae3_handle *handle,
 677                           enum ethtool_phys_id_state status);
 678         void (*get_link_mode)(struct hnae3_handle *handle,
 679                               unsigned long *supported,
 680                               unsigned long *advertising);
 681         int (*add_fd_entry)(struct hnae3_handle *handle,
 682                             struct ethtool_rxnfc *cmd);
 683         int (*del_fd_entry)(struct hnae3_handle *handle,
 684                             struct ethtool_rxnfc *cmd);
 685         int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
 686                                struct ethtool_rxnfc *cmd);
 687         int (*get_fd_rule_info)(struct hnae3_handle *handle,
 688                                 struct ethtool_rxnfc *cmd);
 689         int (*get_fd_all_rules)(struct hnae3_handle *handle,
 690                                 struct ethtool_rxnfc *cmd, u32 *rule_locs);
 691         void (*enable_fd)(struct hnae3_handle *handle, bool enable);
 692         int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
 693                               u16 flow_id, struct flow_keys *fkeys);
 694         int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
 695                             char *buf, int len);
 696         pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
 697         bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
 698         bool (*ae_dev_resetting)(struct hnae3_handle *handle);
 699         unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
 700         int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
 701         u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
 702         void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
 703         int (*mac_connect_phy)(struct hnae3_handle *handle);
 704         void (*mac_disconnect_phy)(struct hnae3_handle *handle);
 705         int (*get_vf_config)(struct hnae3_handle *handle, int vf,
 706                              struct ifla_vf_info *ivf);
 707         int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
 708                                  int link_state);
 709         int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
 710                                bool enable);
 711         int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
 712         int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
 713                            int min_tx_rate, int max_tx_rate, bool force);
 714         int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
 715         int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
 716                                  u32 len, u8 *data);
 717         bool (*get_cmdq_stat)(struct hnae3_handle *handle);
 718         int (*add_cls_flower)(struct hnae3_handle *handle,
 719                               struct flow_cls_offload *cls_flower, int tc);
 720         int (*del_cls_flower)(struct hnae3_handle *handle,
 721                               struct flow_cls_offload *cls_flower);
 722         bool (*cls_flower_active)(struct hnae3_handle *handle);
 723         int (*get_phy_link_ksettings)(struct hnae3_handle *handle,
 724                                       struct ethtool_link_ksettings *cmd);
 725         int (*set_phy_link_ksettings)(struct hnae3_handle *handle,
 726                                       const struct ethtool_link_ksettings *cmd);
 727         bool (*set_tx_hwts_info)(struct hnae3_handle *handle,
 728                                  struct sk_buff *skb);
 729         void (*get_rx_hwts)(struct hnae3_handle *handle, struct sk_buff *skb,
 730                             u32 nsec, u32 sec);
 731         int (*get_ts_info)(struct hnae3_handle *handle,
 732                            struct ethtool_ts_info *info);
 733         int (*get_link_diagnosis_info)(struct hnae3_handle *handle,
 734                                        u32 *status_code);
 735         void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs);
 736 };
 737
 738 struct hnae3_dcb_ops {
 739         /* IEEE 802.1Qaz std */
 740         int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
 741         int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
 742         int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
 743         int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
 744
 745         /* DCBX configuration */
 746         u8   (*getdcbx)(struct hnae3_handle *);
 747         u8   (*setdcbx)(struct hnae3_handle *, u8);
 748
 749         int (*setup_tc)(struct hnae3_handle *handle,
 750                         struct tc_mqprio_qopt_offload *mqprio_qopt);
 751 };
 752
 753 struct hnae3_ae_algo {
 754         const struct hnae3_ae_ops *ops;
 755         struct list_head node;
 756         const struct pci_device_id *pdev_id_table;
 757 };
 758
 759 #define HNAE3_INT_NAME_LEN        32
 760 #define HNAE3_ITR_COUNTDOWN_START 100
 761
 762 #define HNAE3_MAX_TC            8
 763 #define HNAE3_MAX_USER_PRIO     8
 764 struct hnae3_tc_info {
 765         u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
 766         u16 tqp_count[HNAE3_MAX_TC];
 767         u16 tqp_offset[HNAE3_MAX_TC];
 768         u8 num_tc; /* Total number of enabled TCs */
 769         bool mqprio_active;
 770 };
 771
 772 struct hnae3_knic_private_info {
 773         struct net_device *netdev; /* Set by KNIC client when init instance */
 774         u16 rss_size;              /* Allocated RSS queues */
 775         u16 req_rss_size;
 776         u16 rx_buf_len;
 777         u16 num_tx_desc;
 778         u16 num_rx_desc;
 779         u32 tx_spare_buf_size;
 780
 781         struct hnae3_tc_info tc_info;
 782
 783         u16 num_tqps;             /* total number of TQPs in this handle */
 784         struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
 785         const struct hnae3_dcb_ops *dcb_ops;
 786
 787         u16 int_rl_setting;
 788         enum pkt_hash_types rss_type;
 789         void __iomem *io_base;
 790 };
 791
 792 struct hnae3_roce_private_info {
 793         struct net_device *netdev;
 794         void __iomem *roce_io_base;
 795         void __iomem *roce_mem_base;
 796         int base_vector;
 797         int num_vectors;
 798
 799         /* The below attributes defined for RoCE client, hnae3 gives
 800          * initial values to them, and RoCE client can modify and use
 801          * them.
 802          */
 803         unsigned long reset_state;
 804         unsigned long instance_state;
 805         unsigned long state;
 806 };
 807
 808 #define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
 809 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
 810 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK    BIT(2)
 811 #define HNAE3_SUPPORT_VF              BIT(3)
 812 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK  BIT(4)
 813
 814 #define HNAE3_USER_UPE          BIT(0)  /* unicast promisc enabled by user */
 815 #define HNAE3_USER_MPE          BIT(1)  /* mulitcast promisc enabled by user */
 816 #define HNAE3_BPE               BIT(2)  /* broadcast promisc enable */
 817 #define HNAE3_OVERFLOW_UPE      BIT(3)  /* unicast mac vlan overflow */
 818 #define HNAE3_OVERFLOW_MPE      BIT(4)  /* multicast mac vlan overflow */
 819 #define HNAE3_UPE               (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
 820 #define HNAE3_MPE               (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
 821
 822 enum hnae3_pflag {
 823         HNAE3_PFLAG_LIMIT_PROMISC,
 824         HNAE3_PFLAG_MAX
 825 };
 826
 827 struct hnae3_handle {
 828         struct hnae3_client *client;
 829         struct pci_dev *pdev;
 830         void *priv;
 831         struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
 832         u64 flags; /* Indicate the capabilities for this handle */
 833
 834         union {
 835                 struct net_device *netdev; /* first member */
 836                 struct hnae3_knic_private_info kinfo;
 837                 struct hnae3_roce_private_info rinfo;
 838         };
 839
 840         u32 numa_node_mask;     /* for multi-chip support */
 841
 842         enum hnae3_port_base_vlan_state port_base_vlan_state;
 843
 844         u8 netdev_flags;
 845         struct dentry *hnae3_dbgfs;
 846         /* protects concurrent contention between debugfs commands */
 847         struct mutex dbgfs_lock;
 848
 849         /* Network interface message level enabled bits */
 850         u32 msg_enable;
 851
 852         unsigned long supported_pflags;
 853         unsigned long priv_flags;
 854 };
 855
 856 #define hnae3_set_field(origin, mask, shift, val) \
 857         do { \
 858                 (origin) &= (~(mask)); \
 859                 (origin) |= ((val) << (shift)) & (mask); \
 860         } while (0)
 861 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
 862
 863 #define hnae3_set_bit(origin, shift, val) \
 864         hnae3_set_field(origin, 0x1 << (shift), shift, val)
 865 #define hnae3_get_bit(origin, shift) \
 866         hnae3_get_field(origin, 0x1 << (shift), shift)
 867
 868 #define HNAE3_FORMAT_MAC_ADDR_LEN       18
 869 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_0  0
 870 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_4  4
 871 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_5  5
 872
 873 static inline void hnae3_format_mac_addr(char *format_mac_addr,
 874                                          const u8 *mac_addr)
 875 {
 876         snprintf(format_mac_addr, HNAE3_FORMAT_MAC_ADDR_LEN, "%02x:**:**:**:%02x:%02x",
 877                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_0],
 878                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_4],
 879                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_5]);
 880 }
 881
 882 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
 883 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
 884
 885 void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo);
 886 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
 887 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
 888
 889 void hnae3_unregister_client(struct hnae3_client *client);
 890 int hnae3_register_client(struct hnae3_client *client);
 891
 892 void hnae3_set_client_init_flag(struct hnae3_client *client,
 893                                 struct hnae3_ae_dev *ae_dev,
 894                                 unsigned int inited);
 895 #endif