1 /* SPDX-License-Identifier: GPL-2.0+ */
2 // Copyright (c) 2016-2017 Hisilicon Limited.
7 /* Names used in this framework:
9 * a set of queues provided by AE
10 * ring buffer queue (rbq):
11 * the channel between upper layer and the AE, can do tx and rx
13 * a tx or rx channel within a rbq
14 * ring description (desc):
15 * an element in the ring with packet information
17 * a memory region referred by desc with the full packet payload
19 * "num" means a static number set as a parameter, "count" mean a dynamic
20 * number set while running
21 * "cb" means control block
24 #include <linux/acpi.h>
25 #include <linux/dcbnl.h>
26 #include <linux/delay.h>
27 #include <linux/device.h>
28 #include <linux/ethtool.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
31 #include <linux/pci.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/types.h>
34 #include <net/pkt_cls.h>
36 #define HNAE3_MOD_VERSION "1.0"
38 #define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */
41 #define HNAE3_DEVICE_VERSION_V1 0x00020
42 #define HNAE3_DEVICE_VERSION_V2 0x00021
43 #define HNAE3_DEVICE_VERSION_V3 0x00030
45 #define HNAE3_PCI_REVISION_BIT_SIZE 8
48 #define HNAE3_DEV_ID_GE 0xA220
49 #define HNAE3_DEV_ID_25GE 0xA221
50 #define HNAE3_DEV_ID_25GE_RDMA 0xA222
51 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223
52 #define HNAE3_DEV_ID_50GE_RDMA 0xA224
53 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
54 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
55 #define HNAE3_DEV_ID_200G_RDMA 0xA228
56 #define HNAE3_DEV_ID_VF 0xA22E
57 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F
59 #define HNAE3_CLASS_NAME_SIZE 16
61 #define HNAE3_DEV_INITED_B 0x0
62 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1
63 #define HNAE3_DEV_SUPPORT_DCB_B 0x2
64 #define HNAE3_KNIC_CLIENT_INITED_B 0x3
65 #define HNAE3_UNIC_CLIENT_INITED_B 0x4
66 #define HNAE3_ROCE_CLIENT_INITED_B 0x5
68 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
69 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
71 #define hnae3_dev_roce_supported(hdev) \
72 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
74 #define hnae3_dev_dcb_supported(hdev) \
75 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
77 enum HNAE3_DEV_CAP_BITS {
78 HNAE3_DEV_SUPPORT_FD_B,
79 HNAE3_DEV_SUPPORT_GRO_B,
80 HNAE3_DEV_SUPPORT_FEC_B,
81 HNAE3_DEV_SUPPORT_UDP_GSO_B,
82 HNAE3_DEV_SUPPORT_QB_B,
83 HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
84 HNAE3_DEV_SUPPORT_PTP_B,
85 HNAE3_DEV_SUPPORT_INT_QL_B,
86 HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
87 HNAE3_DEV_SUPPORT_TX_PUSH_B,
88 HNAE3_DEV_SUPPORT_PHY_IMP_B,
89 HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
90 HNAE3_DEV_SUPPORT_HW_PAD_B,
91 HNAE3_DEV_SUPPORT_STASH_B,
92 HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
95 #define hnae3_dev_fd_supported(hdev) \
96 test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps)
98 #define hnae3_dev_gro_supported(hdev) \
99 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps)
101 #define hnae3_dev_fec_supported(hdev) \
102 test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
104 #define hnae3_dev_udp_gso_supported(hdev) \
105 test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
107 #define hnae3_dev_qb_supported(hdev) \
108 test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
110 #define hnae3_dev_fd_forward_tc_supported(hdev) \
111 test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
113 #define hnae3_dev_ptp_supported(hdev) \
114 test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
116 #define hnae3_dev_int_ql_supported(hdev) \
117 test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
119 #define hnae3_dev_hw_csum_supported(hdev) \
120 test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
122 #define hnae3_dev_tx_push_supported(hdev) \
123 test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
125 #define hnae3_dev_phy_imp_supported(hdev) \
126 test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
128 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
129 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
131 #define hnae3_dev_hw_pad_supported(hdev) \
132 test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
134 #define hnae3_dev_stash_supported(hdev) \
135 test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
137 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
138 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
140 #define ring_ptr_move_fw(ring, p) \
141 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
142 #define ring_ptr_move_bw(ring, p) \
143 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
148 DESC_TYPE_FRAGLIST_SKB,
155 void __iomem *io_base;
156 struct hnae3_ae_algo *ae_algo;
157 struct hnae3_handle *handle;
158 int tqp_index; /* index in a handle */
159 u32 buf_size; /* size for hnae_desc->addr, preset by AE */
160 u16 tx_desc_num; /* total number of tx desc */
161 u16 rx_desc_num; /* total number of rx desc */
164 struct hns3_mac_stats {
169 /* hnae3 loop mode */
172 HNAE3_LOOP_SERIAL_SERDES,
173 HNAE3_LOOP_PARALLEL_SERDES,
178 enum hnae3_client_type {
184 enum hnae3_media_type {
185 HNAE3_MEDIA_TYPE_UNKNOWN,
186 HNAE3_MEDIA_TYPE_FIBER,
187 HNAE3_MEDIA_TYPE_COPPER,
188 HNAE3_MEDIA_TYPE_BACKPLANE,
189 HNAE3_MEDIA_TYPE_NONE,
192 /* must be consistent with definition in firmware */
193 enum hnae3_module_type {
194 HNAE3_MODULE_TYPE_UNKNOWN = 0x00,
195 HNAE3_MODULE_TYPE_FIBRE_LR = 0x01,
196 HNAE3_MODULE_TYPE_FIBRE_SR = 0x02,
197 HNAE3_MODULE_TYPE_AOC = 0x03,
198 HNAE3_MODULE_TYPE_CR = 0x04,
199 HNAE3_MODULE_TYPE_KR = 0x05,
200 HNAE3_MODULE_TYPE_TP = 0x06,
203 enum hnae3_fec_mode {
210 enum hnae3_reset_notify_type {
217 enum hnae3_hw_error_type {
218 HNAE3_PPU_POISON_ERROR,
219 HNAE3_CMDQ_ECC_ERROR,
220 HNAE3_IMP_RD_POISON_ERROR,
221 HNAE3_ROCEE_AXI_RESP_ERROR,
224 enum hnae3_reset_type {
227 HNAE3_VF_PF_FUNC_RESET,
238 enum hnae3_port_base_vlan_state {
239 HNAE3_PORT_BASE_VLAN_DISABLE,
240 HNAE3_PORT_BASE_VLAN_ENABLE,
241 HNAE3_PORT_BASE_VLAN_MODIFY,
242 HNAE3_PORT_BASE_VLAN_NOCHANGE,
245 struct hnae3_vector_info {
250 #define HNAE3_RING_TYPE_B 0
251 #define HNAE3_RING_TYPE_TX 0
252 #define HNAE3_RING_TYPE_RX 1
253 #define HNAE3_RING_GL_IDX_S 0
254 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
255 #define HNAE3_RING_GL_RX 0
256 #define HNAE3_RING_GL_TX 1
258 #define HNAE3_FW_VERSION_BYTE3_SHIFT 24
259 #define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24)
260 #define HNAE3_FW_VERSION_BYTE2_SHIFT 16
261 #define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16)
262 #define HNAE3_FW_VERSION_BYTE1_SHIFT 8
263 #define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8)
264 #define HNAE3_FW_VERSION_BYTE0_SHIFT 0
265 #define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0)
267 struct hnae3_ring_chain_node {
268 struct hnae3_ring_chain_node *next;
274 #define HNAE3_IS_TX_RING(node) \
275 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
277 /* device specification info from firmware */
278 struct hnae3_dev_specs {
279 u32 mac_entry_num; /* number of mac-vlan table entry */
280 u32 mng_entry_num; /* number of manager table entry */
282 u16 rss_ind_tbl_size;
284 u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
285 u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
286 u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
289 struct hnae3_client_ops {
290 int (*init_instance)(struct hnae3_handle *handle);
291 void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
292 void (*link_status_change)(struct hnae3_handle *handle, bool state);
293 int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
294 int (*reset_notify)(struct hnae3_handle *handle,
295 enum hnae3_reset_notify_type type);
296 void (*process_hw_error)(struct hnae3_handle *handle,
297 enum hnae3_hw_error_type);
300 #define HNAE3_CLIENT_NAME_LENGTH 16
301 struct hnae3_client {
302 char name[HNAE3_CLIENT_NAME_LENGTH];
304 enum hnae3_client_type type;
305 const struct hnae3_client_ops *ops;
306 struct list_head node;
309 #define HNAE3_DEV_CAPS_MAX_NUM 96
310 struct hnae3_ae_dev {
311 struct pci_dev *pdev;
312 const struct hnae3_ae_ops *ops;
313 struct list_head node;
315 unsigned long hw_err_reset_req;
316 struct hnae3_dev_specs dev_specs;
318 unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];
322 /* This struct defines the operation on the handle.
324 * init_ae_dev(): (mandatory)
325 * Get PF configure from pci_dev and initialize PF hardware
327 * Disable PF device and release PF resource
329 * Register client to ae_dev
330 * unregister_client()
331 * Unregister client from ae_dev
333 * Enable the hardware
335 * Disable the hardware
337 * Inform the hclge that client has been started
339 * Inform the hclge that client has been stopped
341 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for
343 * get_ksettings_an_result()
344 * Get negotiation status,speed and duplex
346 * Get media type of MAC
348 * Check target speed whether is supported
355 * request_update_promisc_mode
356 * request to hclge(vf) to update promisc mode
360 * get tx and rx of pause frame use
362 * set tx and rx of pause frame use
364 * set auto autonegotiation of pause frame use
366 * get auto autonegotiation of pause frame use
368 * restart autonegotiation
370 * halt/resume autonegotiation when autonegotiation on
371 * get_coalesce_usecs()
372 * get usecs to delay a TX interrupt after a packet is sent
373 * get_rx_max_coalesced_frames()
374 * get Maximum number of packets to be sent before a TX interrupt.
375 * set_coalesce_usecs()
376 * set usecs to delay a TX interrupt after a packet is sent
377 * set_coalesce_frames()
378 * set Maximum number of packets to be sent before a TX interrupt.
384 * Add unicast addr to mac table
386 * Remove unicast addr from mac table
388 * Set multicast address
390 * Add multicast address to mac table
392 * Remove multicast address from mac table
394 * Update Old network device statistics
396 * get mac pause statistics including tx_cnt and rx_cnt
397 * get_ethtool_stats()
398 * Get ethtool network device statistics
400 * Get a set of strings that describe the requested objects
402 * Get number of strings that @get_strings will write
403 * update_led_status()
404 * Update the led status
410 * Get the len of the regs dump
413 * get_rss_indir_size()
414 * Get rss indirection table size
420 * Get tc size of handle
422 * Get vector number and vector information
424 * Put the vector in hdev
425 * map_ring_to_vector()
426 * Map rings to vector
427 * unmap_ring_from_vector()
428 * Unmap rings from vector
432 * Get firmware version
434 * Get media typr of phy
435 * enable_vlan_filter()
438 * Set vlan filter config of Ports
439 * set_vf_vlan_filter()
440 * Set vlan filter config of vf
441 * enable_hw_strip_rxvtag()
442 * Enable/disable hardware strip vlan tag of packets received
444 * Enable/disable HW GRO
446 * Check the 5-tuples of flow, and create flow director rule
448 * Get the VF configuration setting by the host
452 * Enable/disable spoof check for specified vf
454 * Enable/disable trust for specified vf, if the vf being trusted, then
455 * it can enable promisc mode
457 * Set the max tx rate of specified vf.
459 * Configure the default MAC for specified VF
461 * Get the optical module eeprom info.
463 struct hnae3_ae_ops {
464 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
465 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
466 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
467 void (*flr_done)(struct hnae3_ae_dev *ae_dev);
468 int (*init_client_instance)(struct hnae3_client *client,
469 struct hnae3_ae_dev *ae_dev);
470 void (*uninit_client_instance)(struct hnae3_client *client,
471 struct hnae3_ae_dev *ae_dev);
472 int (*start)(struct hnae3_handle *handle);
473 void (*stop)(struct hnae3_handle *handle);
474 int (*client_start)(struct hnae3_handle *handle);
475 void (*client_stop)(struct hnae3_handle *handle);
476 int (*get_status)(struct hnae3_handle *handle);
477 void (*get_ksettings_an_result)(struct hnae3_handle *handle,
478 u8 *auto_neg, u32 *speed, u8 *duplex);
480 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
483 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
485 int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
486 void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
488 int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
489 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
490 int (*set_loopback)(struct hnae3_handle *handle,
491 enum hnae3_loop loop_mode, bool en);
493 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
495 void (*request_update_promisc_mode)(struct hnae3_handle *handle);
496 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
498 void (*get_pauseparam)(struct hnae3_handle *handle,
499 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
500 int (*set_pauseparam)(struct hnae3_handle *handle,
501 u32 auto_neg, u32 rx_en, u32 tx_en);
503 int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
504 int (*get_autoneg)(struct hnae3_handle *handle);
505 int (*restart_autoneg)(struct hnae3_handle *handle);
506 int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
508 void (*get_coalesce_usecs)(struct hnae3_handle *handle,
509 u32 *tx_usecs, u32 *rx_usecs);
510 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
511 u32 *tx_frames, u32 *rx_frames);
512 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
513 int (*set_coalesce_frames)(struct hnae3_handle *handle,
514 u32 coalesce_frames);
515 void (*get_coalesce_range)(struct hnae3_handle *handle,
516 u32 *tx_frames_low, u32 *rx_frames_low,
517 u32 *tx_frames_high, u32 *rx_frames_high,
518 u32 *tx_usecs_low, u32 *rx_usecs_low,
519 u32 *tx_usecs_high, u32 *rx_usecs_high);
521 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
522 int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
524 int (*do_ioctl)(struct hnae3_handle *handle,
525 struct ifreq *ifr, int cmd);
526 int (*add_uc_addr)(struct hnae3_handle *handle,
527 const unsigned char *addr);
528 int (*rm_uc_addr)(struct hnae3_handle *handle,
529 const unsigned char *addr);
530 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
531 int (*add_mc_addr)(struct hnae3_handle *handle,
532 const unsigned char *addr);
533 int (*rm_mc_addr)(struct hnae3_handle *handle,
534 const unsigned char *addr);
535 void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
536 void (*update_stats)(struct hnae3_handle *handle,
537 struct net_device_stats *net_stats);
538 void (*get_stats)(struct hnae3_handle *handle, u64 *data);
539 void (*get_mac_stats)(struct hnae3_handle *handle,
540 struct hns3_mac_stats *mac_stats);
541 void (*get_strings)(struct hnae3_handle *handle,
542 u32 stringset, u8 *data);
543 int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
545 void (*get_regs)(struct hnae3_handle *handle, u32 *version,
547 int (*get_regs_len)(struct hnae3_handle *handle);
549 u32 (*get_rss_key_size)(struct hnae3_handle *handle);
550 u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
551 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
553 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
554 const u8 *key, const u8 hfunc);
555 int (*set_rss_tuple)(struct hnae3_handle *handle,
556 struct ethtool_rxnfc *cmd);
557 int (*get_rss_tuple)(struct hnae3_handle *handle,
558 struct ethtool_rxnfc *cmd);
560 int (*get_tc_size)(struct hnae3_handle *handle);
562 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
563 struct hnae3_vector_info *vector_info);
564 int (*put_vector)(struct hnae3_handle *handle, int vector_num);
565 int (*map_ring_to_vector)(struct hnae3_handle *handle,
567 struct hnae3_ring_chain_node *vr_chain);
568 int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
570 struct hnae3_ring_chain_node *vr_chain);
572 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
573 u32 (*get_fw_version)(struct hnae3_handle *handle);
574 void (*get_mdix_mode)(struct hnae3_handle *handle,
575 u8 *tp_mdix_ctrl, u8 *tp_mdix);
577 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
578 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
579 u16 vlan_id, bool is_kill);
580 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
581 u16 vlan, u8 qos, __be16 proto);
582 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
583 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
584 enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
585 unsigned long *addr);
586 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
587 enum hnae3_reset_type rst_type);
588 void (*get_channels)(struct hnae3_handle *handle,
589 struct ethtool_channels *ch);
590 void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
591 u16 *alloc_tqps, u16 *max_rss_size);
592 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
593 bool rxfh_configured);
594 void (*get_flowctrl_adv)(struct hnae3_handle *handle,
596 int (*set_led_id)(struct hnae3_handle *handle,
597 enum ethtool_phys_id_state status);
598 void (*get_link_mode)(struct hnae3_handle *handle,
599 unsigned long *supported,
600 unsigned long *advertising);
601 int (*add_fd_entry)(struct hnae3_handle *handle,
602 struct ethtool_rxnfc *cmd);
603 int (*del_fd_entry)(struct hnae3_handle *handle,
604 struct ethtool_rxnfc *cmd);
605 void (*del_all_fd_entries)(struct hnae3_handle *handle,
607 int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
608 struct ethtool_rxnfc *cmd);
609 int (*get_fd_rule_info)(struct hnae3_handle *handle,
610 struct ethtool_rxnfc *cmd);
611 int (*get_fd_all_rules)(struct hnae3_handle *handle,
612 struct ethtool_rxnfc *cmd, u32 *rule_locs);
613 void (*enable_fd)(struct hnae3_handle *handle, bool enable);
614 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
615 u16 flow_id, struct flow_keys *fkeys);
616 int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf);
617 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
618 bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
619 bool (*ae_dev_resetting)(struct hnae3_handle *handle);
620 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
621 int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
622 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
623 void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
624 int (*mac_connect_phy)(struct hnae3_handle *handle);
625 void (*mac_disconnect_phy)(struct hnae3_handle *handle);
626 int (*get_vf_config)(struct hnae3_handle *handle, int vf,
627 struct ifla_vf_info *ivf);
628 int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
630 int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
632 int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
633 int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
634 int min_tx_rate, int max_tx_rate, bool force);
635 int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
636 int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
638 bool (*get_cmdq_stat)(struct hnae3_handle *handle);
641 struct hnae3_dcb_ops {
642 /* IEEE 802.1Qaz std */
643 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
644 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
645 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
646 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
648 /* DCBX configuration */
649 u8 (*getdcbx)(struct hnae3_handle *);
650 u8 (*setdcbx)(struct hnae3_handle *, u8);
652 int (*setup_tc)(struct hnae3_handle *handle,
653 struct tc_mqprio_qopt_offload *mqprio_qopt);
656 struct hnae3_ae_algo {
657 const struct hnae3_ae_ops *ops;
658 struct list_head node;
659 const struct pci_device_id *pdev_id_table;
662 #define HNAE3_INT_NAME_LEN 32
663 #define HNAE3_ITR_COUNTDOWN_START 100
665 #define HNAE3_MAX_TC 8
666 #define HNAE3_MAX_USER_PRIO 8
667 struct hnae3_tc_info {
668 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
669 u16 tqp_count[HNAE3_MAX_TC];
670 u16 tqp_offset[HNAE3_MAX_TC];
671 unsigned long tc_en; /* bitmap of TC enabled */
672 u8 num_tc; /* Total number of enabled TCs */
676 struct hnae3_knic_private_info {
677 struct net_device *netdev; /* Set by KNIC client when init instance */
678 u16 rss_size; /* Allocated RSS queues */
684 struct hnae3_tc_info tc_info;
686 u16 num_tqps; /* total number of TQPs in this handle */
687 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */
688 const struct hnae3_dcb_ops *dcb_ops;
691 enum pkt_hash_types rss_type;
694 struct hnae3_roce_private_info {
695 struct net_device *netdev;
696 void __iomem *roce_io_base;
697 void __iomem *roce_mem_base;
701 /* The below attributes defined for RoCE client, hnae3 gives
702 * initial values to them, and RoCE client can modify and use
705 unsigned long reset_state;
706 unsigned long instance_state;
710 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0)
711 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1)
712 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2)
713 #define HNAE3_SUPPORT_VF BIT(3)
714 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4)
716 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */
717 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */
718 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */
719 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */
720 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */
721 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */
722 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
723 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
726 HNAE3_PFLAG_LIMIT_PROMISC,
730 struct hnae3_handle {
731 struct hnae3_client *client;
732 struct pci_dev *pdev;
734 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */
735 u64 flags; /* Indicate the capabilities for this handle */
738 struct net_device *netdev; /* first member */
739 struct hnae3_knic_private_info kinfo;
740 struct hnae3_roce_private_info rinfo;
743 u32 numa_node_mask; /* for multi-chip support */
745 enum hnae3_port_base_vlan_state port_base_vlan_state;
748 struct dentry *hnae3_dbgfs;
750 /* Network interface message level enabled bits */
753 unsigned long supported_pflags;
754 unsigned long priv_flags;
757 #define hnae3_set_field(origin, mask, shift, val) \
759 (origin) &= (~(mask)); \
760 (origin) |= ((val) << (shift)) & (mask); \
762 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
764 #define hnae3_set_bit(origin, shift, val) \
765 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
766 #define hnae3_get_bit(origin, shift) \
767 hnae3_get_field((origin), (0x1 << (shift)), (shift))
769 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
770 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
772 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
773 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
775 void hnae3_unregister_client(struct hnae3_client *client);
776 int hnae3_register_client(struct hnae3_client *client);
778 void hnae3_set_client_init_flag(struct hnae3_client *client,
779 struct hnae3_ae_dev *ae_dev,
780 unsigned int inited);