drivers/net/ethernet/broadcom/genet/bcmmii.c

   1 /*
   2  * Broadcom GENET MDIO routines
   3  *
   4  * Copyright (c) 2014-2017 Broadcom
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11
  12 #include <linux/types.h>
  13 #include <linux/delay.h>
  14 #include <linux/wait.h>
  15 #include <linux/mii.h>
  16 #include <linux/ethtool.h>
  17 #include <linux/bitops.h>
  18 #include <linux/netdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/phy.h>
  21 #include <linux/phy_fixed.h>
  22 #include <linux/brcmphy.h>
  23 #include <linux/of.h>
  24 #include <linux/of_net.h>
  25 #include <linux/of_mdio.h>
  26 #include <linux/platform_data/bcmgenet.h>
  27 #include <linux/platform_data/mdio-bcm-unimac.h>
  28
  29 #include "bcmgenet.h"
  30
  31 /* setup netdev link state when PHY link status change and
  32  * update UMAC and RGMII block when link up
  33  */
  34 void bcmgenet_mii_setup(struct net_device *dev)
  35 {
  36         struct bcmgenet_priv *priv = netdev_priv(dev);
  37         struct phy_device *phydev = priv->phydev;
  38         u32 reg, cmd_bits = 0;
  39         bool status_changed = false;
  40
  41         if (priv->old_link != phydev->link) {
  42                 status_changed = true;
  43                 priv->old_link = phydev->link;
  44         }
  45
  46         if (phydev->link) {
  47                 /* check speed/duplex/pause changes */
  48                 if (priv->old_speed != phydev->speed) {
  49                         status_changed = true;
  50                         priv->old_speed = phydev->speed;
  51                 }
  52
  53                 if (priv->old_duplex != phydev->duplex) {
  54                         status_changed = true;
  55                         priv->old_duplex = phydev->duplex;
  56                 }
  57
  58                 if (priv->old_pause != phydev->pause) {
  59                         status_changed = true;
  60                         priv->old_pause = phydev->pause;
  61                 }
  62
  63                 /* done if nothing has changed */
  64                 if (!status_changed)
  65                         return;
  66
  67                 /* speed */
  68                 if (phydev->speed == SPEED_1000)
  69                         cmd_bits = UMAC_SPEED_1000;
  70                 else if (phydev->speed == SPEED_100)
  71                         cmd_bits = UMAC_SPEED_100;
  72                 else
  73                         cmd_bits = UMAC_SPEED_10;
  74                 cmd_bits <<= CMD_SPEED_SHIFT;
  75
  76                 /* duplex */
  77                 if (phydev->duplex != DUPLEX_FULL)
  78                         cmd_bits |= CMD_HD_EN;
  79
  80                 /* pause capability */
  81                 if (!phydev->pause)
  82                         cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
  83
  84                 /*
  85                  * Program UMAC and RGMII block based on established
  86                  * link speed, duplex, and pause. The speed set in
  87                  * umac->cmd tell RGMII block which clock to use for
  88                  * transmit -- 25MHz(100Mbps) or 125MHz(1Gbps).
  89                  * Receive clock is provided by the PHY.
  90                  */
  91                 reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL);
  92                 reg &= ~OOB_DISABLE;
  93                 reg |= RGMII_LINK;
  94                 bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL);
  95
  96                 reg = bcmgenet_umac_readl(priv, UMAC_CMD);
  97                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
  98                                CMD_HD_EN |
  99                                CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE);
 100                 reg |= cmd_bits;
 101                 bcmgenet_umac_writel(priv, reg, UMAC_CMD);
 102         } else {
 103                 /* done if nothing has changed */
 104                 if (!status_changed)
 105                         return;
 106
 107                 /* needed for MoCA fixed PHY to reflect correct link status */
 108                 netif_carrier_off(dev);
 109         }
 110
 111         phy_print_status(phydev);
 112 }
 113
 114
 115 static int bcmgenet_fixed_phy_link_update(struct net_device *dev,
 116                                           struct fixed_phy_status *status)
 117 {
 118         if (dev && dev->phydev && status)
 119                 status->link = dev->phydev->link;
 120
 121         return 0;
 122 }
 123
 124 /* Perform a voluntary PHY software reset, since the EPHY is very finicky about
 125  * not doing it and will start corrupting packets
 126  */
 127 void bcmgenet_mii_reset(struct net_device *dev)
 128 {
 129         struct bcmgenet_priv *priv = netdev_priv(dev);
 130
 131         if (GENET_IS_V4(priv))
 132                 return;
 133
 134         if (priv->phydev) {
 135                 phy_init_hw(priv->phydev);
 136                 phy_start_aneg(priv->phydev);
 137         }
 138 }
 139
 140 void bcmgenet_phy_power_set(struct net_device *dev, bool enable)
 141 {
 142         struct bcmgenet_priv *priv = netdev_priv(dev);
 143         u32 reg = 0;
 144
 145         /* EXT_GPHY_CTRL is only valid for GENETv4 and onward */
 146         if (GENET_IS_V4(priv)) {
 147                 reg = bcmgenet_ext_readl(priv, EXT_GPHY_CTRL);
 148                 if (enable) {
 149                         reg &= ~EXT_CK25_DIS;
 150                         bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
 151                         mdelay(1);
 152
 153                         reg &= ~(EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN);
 154                         reg |= EXT_GPHY_RESET;
 155                         bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
 156                         mdelay(1);
 157
 158                         reg &= ~EXT_GPHY_RESET;
 159                 } else {
 160                         reg |= EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN |
 161                                EXT_GPHY_RESET;
 162                         bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
 163                         mdelay(1);
 164                         reg |= EXT_CK25_DIS;
 165                 }
 166                 bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);
 167                 udelay(60);
 168         } else {
 169                 mdelay(1);
 170         }
 171 }
 172
 173 static void bcmgenet_moca_phy_setup(struct bcmgenet_priv *priv)
 174 {
 175         u32 reg;
 176
 177         if (!GENET_IS_V5(priv)) {
 178                 /* Speed settings are set in bcmgenet_mii_setup() */
 179                 reg = bcmgenet_sys_readl(priv, SYS_PORT_CTRL);
 180                 reg |= LED_ACT_SOURCE_MAC;
 181                 bcmgenet_sys_writel(priv, reg, SYS_PORT_CTRL);
 182         }
 183
 184         if (priv->hw_params->flags & GENET_HAS_MOCA_LINK_DET)
 185                 fixed_phy_set_link_update(priv->phydev,
 186                                           bcmgenet_fixed_phy_link_update);
 187 }
 188
 189 int bcmgenet_mii_config(struct net_device *dev, bool init)
 190 {
 191         struct bcmgenet_priv *priv = netdev_priv(dev);
 192         struct phy_device *phydev = priv->phydev;
 193         struct device *kdev = &priv->pdev->dev;
 194         const char *phy_name = NULL;
 195         u32 id_mode_dis = 0;
 196         u32 port_ctrl;
 197         u32 reg;
 198
 199         priv->ext_phy = !priv->internal_phy &&
 200                         (priv->phy_interface != PHY_INTERFACE_MODE_MOCA);
 201
 202         switch (priv->phy_interface) {
 203         case PHY_INTERFACE_MODE_INTERNAL:
 204         case PHY_INTERFACE_MODE_MOCA:
 205                 /* Irrespective of the actually configured PHY speed (100 or
 206                  * 1000) GENETv4 only has an internal GPHY so we will just end
 207                  * up masking the Gigabit features from what we support, not
 208                  * switching to the EPHY
 209                  */
 210                 if (GENET_IS_V4(priv))
 211                         port_ctrl = PORT_MODE_INT_GPHY;
 212                 else
 213                         port_ctrl = PORT_MODE_INT_EPHY;
 214
 215                 bcmgenet_sys_writel(priv, port_ctrl, SYS_PORT_CTRL);
 216
 217                 if (priv->internal_phy) {
 218                         phy_name = "internal PHY";
 219                 } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) {
 220                         phy_name = "MoCA";
 221                         bcmgenet_moca_phy_setup(priv);
 222                 }
 223                 break;
 224
 225         case PHY_INTERFACE_MODE_MII:
 226                 phy_name = "external MII";
 227                 phydev->supported &= PHY_BASIC_FEATURES;
 228                 bcmgenet_sys_writel(priv,
 229                                     PORT_MODE_EXT_EPHY, SYS_PORT_CTRL);
 230                 break;
 231
 232         case PHY_INTERFACE_MODE_REVMII:
 233                 phy_name = "external RvMII";
 234                 /* of_mdiobus_register took care of reading the 'max-speed'
 235                  * PHY property for us, effectively limiting the PHY supported
 236                  * capabilities, use that knowledge to also configure the
 237                  * Reverse MII interface correctly.
 238                  */
 239                 if ((priv->phydev->supported & PHY_BASIC_FEATURES) ==
 240                                 PHY_BASIC_FEATURES)
 241                         port_ctrl = PORT_MODE_EXT_RVMII_25;
 242                 else
 243                         port_ctrl = PORT_MODE_EXT_RVMII_50;
 244                 bcmgenet_sys_writel(priv, port_ctrl, SYS_PORT_CTRL);
 245                 break;
 246
 247         case PHY_INTERFACE_MODE_RGMII:
 248                 /* RGMII_NO_ID: TXC transitions at the same time as TXD
 249                  *              (requires PCB or receiver-side delay)
 250                  * RGMII:       Add 2ns delay on TXC (90 degree shift)
 251                  *
 252                  * ID is implicitly disabled for 100Mbps (RG)MII operation.
 253                  */
 254                 id_mode_dis = BIT(16);
 255                 /* fall through */
 256         case PHY_INTERFACE_MODE_RGMII_TXID:
 257                 if (id_mode_dis)
 258                         phy_name = "external RGMII (no delay)";
 259                 else
 260                         phy_name = "external RGMII (TX delay)";
 261                 bcmgenet_sys_writel(priv,
 262                                     PORT_MODE_EXT_GPHY, SYS_PORT_CTRL);
 263                 break;
 264         default:
 265                 dev_err(kdev, "unknown phy mode: %d\n", priv->phy_interface);
 266                 return -EINVAL;
 267         }
 268
 269         /* This is an external PHY (xMII), so we need to enable the RGMII
 270          * block for the interface to work
 271          */
 272         if (priv->ext_phy) {
 273                 reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL);
 274                 reg |= RGMII_MODE_EN | id_mode_dis;
 275                 bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL);
 276         }
 277
 278         if (init)
 279                 dev_info(kdev, "configuring instance for %s\n", phy_name);
 280
 281         return 0;
 282 }
 283
 284 int bcmgenet_mii_probe(struct net_device *dev)
 285 {
 286         struct bcmgenet_priv *priv = netdev_priv(dev);
 287         struct device_node *dn = priv->pdev->dev.of_node;
 288         struct phy_device *phydev;
 289         u32 phy_flags;
 290         int ret;
 291
 292         /* Communicate the integrated PHY revision */
 293         phy_flags = priv->gphy_rev;
 294
 295         /* Initialize link state variables that bcmgenet_mii_setup() uses */
 296         priv->old_link = -1;
 297         priv->old_speed = -1;
 298         priv->old_duplex = -1;
 299         priv->old_pause = -1;
 300
 301         if (dn) {
 302                 phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup,
 303                                         phy_flags, priv->phy_interface);
 304                 if (!phydev) {
 305                         pr_err("could not attach to PHY\n");
 306                         return -ENODEV;
 307                 }
 308         } else {
 309                 phydev = priv->phydev;
 310                 phydev->dev_flags = phy_flags;
 311
 312                 ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup,
 313                                          priv->phy_interface);
 314                 if (ret) {
 315                         pr_err("could not attach to PHY\n");
 316                         return -ENODEV;
 317                 }
 318         }
 319
 320         priv->phydev = phydev;
 321
 322         /* Configure port multiplexer based on what the probed PHY device since
 323          * reading the 'max-speed' property determines the maximum supported
 324          * PHY speed which is needed for bcmgenet_mii_config() to configure
 325          * things appropriately.
 326          */
 327         ret = bcmgenet_mii_config(dev, true);
 328         if (ret) {
 329                 phy_disconnect(priv->phydev);
 330                 return ret;
 331         }
 332
 333         phydev->advertising = phydev->supported;
 334
 335         /* The internal PHY has its link interrupts routed to the
 336          * Ethernet MAC ISRs
 337          */
 338         if (priv->internal_phy)
 339                 priv->phydev->irq = PHY_IGNORE_INTERRUPT;
 340
 341         return 0;
 342 }
 343
 344 static struct device_node *bcmgenet_mii_of_find_mdio(struct bcmgenet_priv *priv)
 345 {
 346         struct device_node *dn = priv->pdev->dev.of_node;
 347         struct device *kdev = &priv->pdev->dev;
 348         char *compat;
 349
 350         compat = kasprintf(GFP_KERNEL, "brcm,genet-mdio-v%d", priv->version);
 351         if (!compat)
 352                 return NULL;
 353
 354         priv->mdio_dn = of_find_compatible_node(dn, NULL, compat);
 355         kfree(compat);
 356         if (!priv->mdio_dn) {
 357                 dev_err(kdev, "unable to find MDIO bus node\n");
 358                 return NULL;
 359         }
 360
 361         return priv->mdio_dn;
 362 }
 363
 364 static void bcmgenet_mii_pdata_init(struct bcmgenet_priv *priv,
 365                                     struct unimac_mdio_pdata *ppd)
 366 {
 367         struct device *kdev = &priv->pdev->dev;
 368         struct bcmgenet_platform_data *pd = kdev->platform_data;
 369
 370         if (pd->phy_interface != PHY_INTERFACE_MODE_MOCA && pd->mdio_enabled) {
 371                 /*
 372                  * Internal or external PHY with MDIO access
 373                  */
 374                 if (pd->phy_address >= 0 && pd->phy_address < PHY_MAX_ADDR)
 375                         ppd->phy_mask = 1 << pd->phy_address;
 376                 else
 377                         ppd->phy_mask = 0;
 378         }
 379 }
 380
 381 static int bcmgenet_mii_wait(void *wait_func_data)
 382 {
 383         struct bcmgenet_priv *priv = wait_func_data;
 384
 385         wait_event_timeout(priv->wq,
 386                            !(bcmgenet_umac_readl(priv, UMAC_MDIO_CMD)
 387                            & MDIO_START_BUSY),
 388                            HZ / 100);
 389         return 0;
 390 }
 391
 392 static int bcmgenet_mii_register(struct bcmgenet_priv *priv)
 393 {
 394         struct platform_device *pdev = priv->pdev;
 395         struct bcmgenet_platform_data *pdata = pdev->dev.platform_data;
 396         struct device_node *dn = pdev->dev.of_node;
 397         struct unimac_mdio_pdata ppd;
 398         struct platform_device *ppdev;
 399         struct resource *pres, res;
 400         int id, ret;
 401
 402         pres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 403         memset(&res, 0, sizeof(res));
 404         memset(&ppd, 0, sizeof(ppd));
 405
 406         ppd.wait_func = bcmgenet_mii_wait;
 407         ppd.wait_func_data = priv;
 408         ppd.bus_name = "bcmgenet MII bus";
 409
 410         /* Unimac MDIO bus controller starts at UniMAC offset + MDIO_CMD
 411          * and is 2 * 32-bits word long, 8 bytes total.
 412          */
 413         res.start = pres->start + GENET_UMAC_OFF + UMAC_MDIO_CMD;
 414         res.end = res.start + 8;
 415         res.flags = IORESOURCE_MEM;
 416
 417         if (dn)
 418                 id = of_alias_get_id(dn, "eth");
 419         else
 420                 id = pdev->id;
 421
 422         ppdev = platform_device_alloc(UNIMAC_MDIO_DRV_NAME, id);
 423         if (!ppdev)
 424                 return -ENOMEM;
 425
 426         /* Retain this platform_device pointer for later cleanup */
 427         priv->mii_pdev = ppdev;
 428         ppdev->dev.parent = &pdev->dev;
 429         ppdev->dev.of_node = bcmgenet_mii_of_find_mdio(priv);
 430         if (pdata)
 431                 bcmgenet_mii_pdata_init(priv, &ppd);
 432
 433         ret = platform_device_add_resources(ppdev, &res, 1);
 434         if (ret)
 435                 goto out;
 436
 437         ret = platform_device_add_data(ppdev, &ppd, sizeof(ppd));
 438         if (ret)
 439                 goto out;
 440
 441         ret = platform_device_add(ppdev);
 442         if (ret)
 443                 goto out;
 444
 445         return 0;
 446 out:
 447         platform_device_put(ppdev);
 448         return ret;
 449 }
 450
 451 static int bcmgenet_mii_of_init(struct bcmgenet_priv *priv)
 452 {
 453         struct device_node *dn = priv->pdev->dev.of_node;
 454         struct device *kdev = &priv->pdev->dev;
 455         struct phy_device *phydev;
 456         int phy_mode;
 457         int ret;
 458
 459         /* Fetch the PHY phandle */
 460         priv->phy_dn = of_parse_phandle(dn, "phy-handle", 0);
 461
 462         /* In the case of a fixed PHY, the DT node associated
 463          * to the PHY is the Ethernet MAC DT node.
 464          */
 465         if (!priv->phy_dn && of_phy_is_fixed_link(dn)) {
 466                 ret = of_phy_register_fixed_link(dn);
 467                 if (ret)
 468                         return ret;
 469
 470                 priv->phy_dn = of_node_get(dn);
 471         }
 472
 473         /* Get the link mode */
 474         phy_mode = of_get_phy_mode(dn);
 475         if (phy_mode < 0) {
 476                 dev_err(kdev, "invalid PHY mode property\n");
 477                 return phy_mode;
 478         }
 479
 480         priv->phy_interface = phy_mode;
 481
 482         /* We need to specifically look up whether this PHY interface is internal
 483          * or not *before* we even try to probe the PHY driver over MDIO as we
 484          * may have shut down the internal PHY for power saving purposes.
 485          */
 486         if (priv->phy_interface == PHY_INTERFACE_MODE_INTERNAL)
 487                 priv->internal_phy = true;
 488
 489         /* Make sure we initialize MoCA PHYs with a link down */
 490         if (phy_mode == PHY_INTERFACE_MODE_MOCA) {
 491                 phydev = of_phy_find_device(dn);
 492                 if (phydev) {
 493                         phydev->link = 0;
 494                         put_device(&phydev->mdio.dev);
 495                 }
 496         }
 497
 498         return 0;
 499 }
 500
 501 static int bcmgenet_mii_pd_init(struct bcmgenet_priv *priv)
 502 {
 503         struct device *kdev = &priv->pdev->dev;
 504         struct bcmgenet_platform_data *pd = kdev->platform_data;
 505         char phy_name[MII_BUS_ID_SIZE + 3];
 506         char mdio_bus_id[MII_BUS_ID_SIZE];
 507         struct phy_device *phydev;
 508
 509         snprintf(mdio_bus_id, MII_BUS_ID_SIZE, "%s-%d",
 510                  UNIMAC_MDIO_DRV_NAME, priv->pdev->id);
 511
 512         if (pd->phy_interface != PHY_INTERFACE_MODE_MOCA && pd->mdio_enabled) {
 513                 snprintf(phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT,
 514                          mdio_bus_id, pd->phy_address);
 515
 516                 /*
 517                  * Internal or external PHY with MDIO access
 518                  */
 519                 phydev = phy_attach(priv->dev, phy_name, pd->phy_interface);
 520                 if (!phydev) {
 521                         dev_err(kdev, "failed to register PHY device\n");
 522                         return -ENODEV;
 523                 }
 524         } else {
 525                 /*
 526                  * MoCA port or no MDIO access.
 527                  * Use fixed PHY to represent the link layer.
 528                  */
 529                 struct fixed_phy_status fphy_status = {
 530                         .link = 1,
 531                         .speed = pd->phy_speed,
 532                         .duplex = pd->phy_duplex,
 533                         .pause = 0,
 534                         .asym_pause = 0,
 535                 };
 536
 537                 phydev = fixed_phy_register(PHY_POLL, &fphy_status, -1, NULL);
 538                 if (!phydev || IS_ERR(phydev)) {
 539                         dev_err(kdev, "failed to register fixed PHY device\n");
 540                         return -ENODEV;
 541                 }
 542
 543                 /* Make sure we initialize MoCA PHYs with a link down */
 544                 phydev->link = 0;
 545
 546         }
 547
 548         priv->phydev = phydev;
 549         priv->phy_interface = pd->phy_interface;
 550
 551         return 0;
 552 }
 553
 554 static int bcmgenet_mii_bus_init(struct bcmgenet_priv *priv)
 555 {
 556         struct device_node *dn = priv->pdev->dev.of_node;
 557
 558         if (dn)
 559                 return bcmgenet_mii_of_init(priv);
 560         else
 561                 return bcmgenet_mii_pd_init(priv);
 562 }
 563
 564 int bcmgenet_mii_init(struct net_device *dev)
 565 {
 566         struct bcmgenet_priv *priv = netdev_priv(dev);
 567         int ret;
 568
 569         ret = bcmgenet_mii_register(priv);
 570         if (ret)
 571                 return ret;
 572
 573         ret = bcmgenet_mii_bus_init(priv);
 574         if (ret)
 575                 goto out;
 576
 577         return 0;
 578
 579 out:
 580         bcmgenet_mii_exit(dev);
 581         return ret;
 582 }
 583
 584 void bcmgenet_mii_exit(struct net_device *dev)
 585 {
 586         struct bcmgenet_priv *priv = netdev_priv(dev);
 587         struct device_node *dn = priv->pdev->dev.of_node;
 588
 589         if (of_phy_is_fixed_link(dn))
 590                 of_phy_deregister_fixed_link(dn);
 591         of_node_put(priv->phy_dn);
 592         platform_device_unregister(priv->mii_pdev);
 593         platform_device_put(priv->mii_pdev);
 594 }