1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019 NXP Semiconductors
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
8 #include <uapi/linux/if_bridge.h>
9 #include <soc/mscc/ocelot_vcap.h>
10 #include <soc/mscc/ocelot_qsys.h>
11 #include <soc/mscc/ocelot_sys.h>
12 #include <soc/mscc/ocelot_dev.h>
13 #include <soc/mscc/ocelot_ana.h>
14 #include <soc/mscc/ocelot_ptp.h>
15 #include <soc/mscc/ocelot.h>
16 #include <linux/platform_device.h>
17 #include <linux/packing.h>
18 #include <linux/module.h>
19 #include <linux/of_net.h>
20 #include <linux/pci.h>
22 #include <linux/pcs-lynx.h>
23 #include <net/pkt_sched.h>
27 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
29 enum dsa_tag_protocol mp)
31 return DSA_TAG_PROTO_OCELOT;
34 static int felix_set_ageing_time(struct dsa_switch *ds,
35 unsigned int ageing_time)
37 struct ocelot *ocelot = ds->priv;
39 ocelot_set_ageing_time(ocelot, ageing_time);
44 static int felix_fdb_dump(struct dsa_switch *ds, int port,
45 dsa_fdb_dump_cb_t *cb, void *data)
47 struct ocelot *ocelot = ds->priv;
49 return ocelot_fdb_dump(ocelot, port, cb, data);
52 static int felix_fdb_add(struct dsa_switch *ds, int port,
53 const unsigned char *addr, u16 vid)
55 struct ocelot *ocelot = ds->priv;
57 return ocelot_fdb_add(ocelot, port, addr, vid);
60 static int felix_fdb_del(struct dsa_switch *ds, int port,
61 const unsigned char *addr, u16 vid)
63 struct ocelot *ocelot = ds->priv;
65 return ocelot_fdb_del(ocelot, port, addr, vid);
68 /* This callback needs to be present */
69 static int felix_mdb_prepare(struct dsa_switch *ds, int port,
70 const struct switchdev_obj_port_mdb *mdb)
75 static void felix_mdb_add(struct dsa_switch *ds, int port,
76 const struct switchdev_obj_port_mdb *mdb)
78 struct ocelot *ocelot = ds->priv;
80 ocelot_port_mdb_add(ocelot, port, mdb);
83 static int felix_mdb_del(struct dsa_switch *ds, int port,
84 const struct switchdev_obj_port_mdb *mdb)
86 struct ocelot *ocelot = ds->priv;
88 return ocelot_port_mdb_del(ocelot, port, mdb);
91 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
94 struct ocelot *ocelot = ds->priv;
96 return ocelot_bridge_stp_state_set(ocelot, port, state);
99 static int felix_bridge_join(struct dsa_switch *ds, int port,
100 struct net_device *br)
102 struct ocelot *ocelot = ds->priv;
104 return ocelot_port_bridge_join(ocelot, port, br);
107 static void felix_bridge_leave(struct dsa_switch *ds, int port,
108 struct net_device *br)
110 struct ocelot *ocelot = ds->priv;
112 ocelot_port_bridge_leave(ocelot, port, br);
115 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
116 const struct switchdev_obj_port_vlan *vlan)
118 struct ocelot *ocelot = ds->priv;
119 u16 vid, flags = vlan->flags;
122 /* Ocelot switches copy frames as-is to the CPU, so the flags:
123 * egress-untagged or not, pvid or not, make no difference. This
124 * behavior is already better than what DSA just tries to approximate
125 * when it installs the VLAN with the same flags on the CPU port.
126 * Just accept any configuration, and don't let ocelot deny installing
127 * multiple native VLANs on the NPI port, because the switch doesn't
128 * look at the port tag settings towards the NPI interface anyway.
130 if (port == ocelot->npi)
133 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
134 err = ocelot_vlan_prepare(ocelot, port, vid,
135 flags & BRIDGE_VLAN_INFO_PVID,
136 flags & BRIDGE_VLAN_INFO_UNTAGGED);
144 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
145 struct switchdev_trans *trans)
147 struct ocelot *ocelot = ds->priv;
149 return ocelot_port_vlan_filtering(ocelot, port, enabled, trans);
152 static void felix_vlan_add(struct dsa_switch *ds, int port,
153 const struct switchdev_obj_port_vlan *vlan)
155 struct ocelot *ocelot = ds->priv;
156 u16 flags = vlan->flags;
160 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
161 err = ocelot_vlan_add(ocelot, port, vid,
162 flags & BRIDGE_VLAN_INFO_PVID,
163 flags & BRIDGE_VLAN_INFO_UNTAGGED);
165 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
172 static int felix_vlan_del(struct dsa_switch *ds, int port,
173 const struct switchdev_obj_port_vlan *vlan)
175 struct ocelot *ocelot = ds->priv;
179 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
180 err = ocelot_vlan_del(ocelot, port, vid);
182 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
190 static int felix_port_enable(struct dsa_switch *ds, int port,
191 struct phy_device *phy)
193 struct ocelot *ocelot = ds->priv;
195 ocelot_port_enable(ocelot, port, phy);
200 static void felix_port_disable(struct dsa_switch *ds, int port)
202 struct ocelot *ocelot = ds->priv;
204 return ocelot_port_disable(ocelot, port);
207 static void felix_phylink_validate(struct dsa_switch *ds, int port,
208 unsigned long *supported,
209 struct phylink_link_state *state)
211 struct ocelot *ocelot = ds->priv;
212 struct felix *felix = ocelot_to_felix(ocelot);
214 if (felix->info->phylink_validate)
215 felix->info->phylink_validate(ocelot, port, supported, state);
218 static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
219 unsigned int link_an_mode,
220 const struct phylink_link_state *state)
222 struct ocelot *ocelot = ds->priv;
223 struct felix *felix = ocelot_to_felix(ocelot);
224 struct dsa_port *dp = dsa_to_port(ds, port);
226 if (felix->pcs[port])
227 phylink_set_pcs(dp->pl, &felix->pcs[port]->pcs);
230 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
231 unsigned int link_an_mode,
232 phy_interface_t interface)
234 struct ocelot *ocelot = ds->priv;
235 struct ocelot_port *ocelot_port = ocelot->ports[port];
237 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG);
238 ocelot_fields_write(ocelot, port, QSYS_SWITCH_PORT_MODE_PORT_ENA, 0);
241 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
242 unsigned int link_an_mode,
243 phy_interface_t interface,
244 struct phy_device *phydev,
245 int speed, int duplex,
246 bool tx_pause, bool rx_pause)
248 struct ocelot *ocelot = ds->priv;
249 struct ocelot_port *ocelot_port = ocelot->ports[port];
250 struct felix *felix = ocelot_to_felix(ocelot);
253 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and
254 * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is
255 * integrated is that the MAC speed is fixed and it's the PCS who is
256 * performing the rate adaptation, so we have to write "1000Mbps" into
257 * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default
260 ocelot_port_writel(ocelot_port,
261 DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000),
266 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(3);
269 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(2);
273 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(1);
276 dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n",
281 /* handle Rx pause in all cases, with 2500base-X this is used for rate
284 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
287 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
288 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |
289 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) |
290 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA;
292 /* Flow control. Link speed is only used here to evaluate the time
293 * specification in incoming pause frames.
295 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port);
297 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port);
299 /* Undo the effects of felix_phylink_mac_link_down:
302 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
303 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
305 /* Enable receiving frames on the port, and activate auto-learning of
308 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO |
309 ANA_PORT_PORT_CFG_RECV_ENA |
310 ANA_PORT_PORT_CFG_PORTID_VAL(port),
311 ANA_PORT_PORT_CFG, port);
313 /* Core: Enable port for frame transfer */
314 ocelot_fields_write(ocelot, port,
315 QSYS_SWITCH_PORT_MODE_PORT_ENA, 1);
317 if (felix->info->port_sched_speed_set)
318 felix->info->port_sched_speed_set(ocelot, port, speed);
321 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
325 ocelot_rmw_gix(ocelot,
326 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
327 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
331 for (i = 0; i < FELIX_NUM_TC * 2; i++) {
332 ocelot_rmw_ix(ocelot,
333 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
334 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
335 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
336 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
337 ANA_PORT_PCP_DEI_MAP,
342 static void felix_get_strings(struct dsa_switch *ds, int port,
343 u32 stringset, u8 *data)
345 struct ocelot *ocelot = ds->priv;
347 return ocelot_get_strings(ocelot, port, stringset, data);
350 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
352 struct ocelot *ocelot = ds->priv;
354 ocelot_get_ethtool_stats(ocelot, port, data);
357 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
359 struct ocelot *ocelot = ds->priv;
361 return ocelot_get_sset_count(ocelot, port, sset);
364 static int felix_get_ts_info(struct dsa_switch *ds, int port,
365 struct ethtool_ts_info *info)
367 struct ocelot *ocelot = ds->priv;
369 return ocelot_get_ts_info(ocelot, port, info);
372 static int felix_parse_ports_node(struct felix *felix,
373 struct device_node *ports_node,
374 phy_interface_t *port_phy_modes)
376 struct ocelot *ocelot = &felix->ocelot;
377 struct device *dev = felix->ocelot.dev;
378 struct device_node *child;
380 for_each_available_child_of_node(ports_node, child) {
381 phy_interface_t phy_mode;
385 /* Get switch port number from DT */
386 if (of_property_read_u32(child, "reg", &port) < 0) {
387 dev_err(dev, "Port number not defined in device tree "
388 "(property \"reg\")\n");
393 /* Get PHY mode from DT */
394 err = of_get_phy_mode(child, &phy_mode);
396 dev_err(dev, "Failed to read phy-mode or "
397 "phy-interface-type property for port %d\n",
403 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode);
405 dev_err(dev, "Unsupported PHY mode %s on port %d\n",
406 phy_modes(phy_mode), port);
411 port_phy_modes[port] = phy_mode;
417 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
419 struct device *dev = felix->ocelot.dev;
420 struct device_node *switch_node;
421 struct device_node *ports_node;
424 switch_node = dev->of_node;
426 ports_node = of_get_child_by_name(switch_node, "ports");
428 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
432 err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
433 of_node_put(ports_node);
438 static int felix_init_structs(struct felix *felix, int num_phys_ports)
440 struct ocelot *ocelot = &felix->ocelot;
441 phy_interface_t *port_phy_modes;
445 ocelot->num_phys_ports = num_phys_ports;
446 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
447 sizeof(struct ocelot_port *), GFP_KERNEL);
451 ocelot->map = felix->info->map;
452 ocelot->stats_layout = felix->info->stats_layout;
453 ocelot->num_stats = felix->info->num_stats;
454 ocelot->shared_queue_sz = felix->info->shared_queue_sz;
455 ocelot->num_mact_rows = felix->info->num_mact_rows;
456 ocelot->vcap = felix->info->vcap;
457 ocelot->ops = felix->info->ops;
458 ocelot->inj_prefix = OCELOT_TAG_PREFIX_SHORT;
459 ocelot->xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
461 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
466 err = felix_parse_dt(felix, port_phy_modes);
468 kfree(port_phy_modes);
472 for (i = 0; i < TARGET_MAX; i++) {
473 struct regmap *target;
475 if (!felix->info->target_io_res[i].name)
478 memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
479 res.flags = IORESOURCE_MEM;
480 res.start += felix->switch_base;
481 res.end += felix->switch_base;
483 target = ocelot_regmap_init(ocelot, &res);
484 if (IS_ERR(target)) {
486 "Failed to map device memory space\n");
487 kfree(port_phy_modes);
488 return PTR_ERR(target);
491 ocelot->targets[i] = target;
494 err = ocelot_regfields_init(ocelot, felix->info->regfields);
496 dev_err(ocelot->dev, "failed to init reg fields map\n");
497 kfree(port_phy_modes);
501 for (port = 0; port < num_phys_ports; port++) {
502 struct ocelot_port *ocelot_port;
503 struct regmap *target;
506 ocelot_port = devm_kzalloc(ocelot->dev,
507 sizeof(struct ocelot_port),
511 "failed to allocate port memory\n");
512 kfree(port_phy_modes);
516 memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
517 res.flags = IORESOURCE_MEM;
518 res.start += felix->switch_base;
519 res.end += felix->switch_base;
521 target = ocelot_regmap_init(ocelot, &res);
522 if (IS_ERR(target)) {
524 "Failed to map memory space for port %d\n",
526 kfree(port_phy_modes);
527 return PTR_ERR(target);
530 template = devm_kzalloc(ocelot->dev, OCELOT_TOTAL_TAG_LEN,
534 "Failed to allocate memory for DSA tag\n");
535 kfree(port_phy_modes);
539 ocelot_port->phy_mode = port_phy_modes[port];
540 ocelot_port->ocelot = ocelot;
541 ocelot_port->target = target;
542 ocelot_port->xmit_template = template;
543 ocelot->ports[port] = ocelot_port;
545 felix->info->xmit_template_populate(ocelot, port);
548 kfree(port_phy_modes);
550 if (felix->info->mdio_bus_alloc) {
551 err = felix->info->mdio_bus_alloc(ocelot);
559 /* The CPU port module is connected to the Node Processor Interface (NPI). This
560 * is the mode through which frames can be injected from and extracted to an
561 * external CPU, over Ethernet.
563 static void felix_npi_port_init(struct ocelot *ocelot, int port)
567 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
568 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
571 /* NPI port Injection/Extraction configuration */
572 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
574 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
577 /* Disable transmission of pause frames */
578 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
581 /* Hardware initialization done here so that we can allocate structures with
582 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
583 * us to allocate structures twice (leak memory) and map PCI memory twice
584 * (which will not work).
586 static int felix_setup(struct dsa_switch *ds)
588 struct ocelot *ocelot = ds->priv;
589 struct felix *felix = ocelot_to_felix(ocelot);
592 err = felix_init_structs(felix, ds->num_ports);
596 err = ocelot_init(ocelot);
601 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
604 "Timestamp initialization failed\n");
609 for (port = 0; port < ds->num_ports; port++) {
610 ocelot_init_port(ocelot, port);
612 if (dsa_is_cpu_port(ds, port))
613 felix_npi_port_init(ocelot, port);
615 /* Set the default QoS Classification based on PCP and DEI
618 felix_port_qos_map_init(ocelot, port);
621 /* Include the CPU port module in the forwarding mask for unknown
622 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST
623 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since
624 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU.
626 ocelot_write_rix(ocelot,
627 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)),
628 ANA_PGID_PGID, PGID_UC);
630 ds->mtu_enforcement_ingress = true;
631 ds->configure_vlan_while_not_filtering = true;
632 ds->assisted_learning_on_cpu_port = true;
637 static void felix_teardown(struct dsa_switch *ds)
639 struct ocelot *ocelot = ds->priv;
640 struct felix *felix = ocelot_to_felix(ocelot);
643 if (felix->info->mdio_bus_free)
644 felix->info->mdio_bus_free(ocelot);
646 for (port = 0; port < ocelot->num_phys_ports; port++)
647 ocelot_deinit_port(ocelot, port);
648 ocelot_deinit_timestamp(ocelot);
649 /* stop workqueue thread */
650 ocelot_deinit(ocelot);
653 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
656 struct ocelot *ocelot = ds->priv;
658 return ocelot_hwstamp_get(ocelot, port, ifr);
661 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
664 struct ocelot *ocelot = ds->priv;
666 return ocelot_hwstamp_set(ocelot, port, ifr);
669 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
670 struct sk_buff *skb, unsigned int type)
672 struct skb_shared_hwtstamps *shhwtstamps;
673 struct ocelot *ocelot = ds->priv;
674 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN;
675 u32 tstamp_lo, tstamp_hi;
676 struct timespec64 ts;
679 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
680 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
682 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0);
683 tstamp_lo = (u32)val;
685 tstamp_hi = tstamp >> 32;
686 if ((tstamp & 0xffffffff) < tstamp_lo)
689 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
691 shhwtstamps = skb_hwtstamps(skb);
692 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
693 shhwtstamps->hwtstamp = tstamp;
697 static bool felix_txtstamp(struct dsa_switch *ds, int port,
698 struct sk_buff *clone, unsigned int type)
700 struct ocelot *ocelot = ds->priv;
701 struct ocelot_port *ocelot_port = ocelot->ports[port];
703 if (ocelot->ptp && (skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP) &&
704 ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) {
705 ocelot_port_add_txtstamp_skb(ocelot, port, clone);
712 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
714 struct ocelot *ocelot = ds->priv;
716 ocelot_port_set_maxlen(ocelot, port, new_mtu);
721 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
723 struct ocelot *ocelot = ds->priv;
725 return ocelot_get_max_mtu(ocelot, port);
728 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
729 struct flow_cls_offload *cls, bool ingress)
731 struct ocelot *ocelot = ds->priv;
733 return ocelot_cls_flower_replace(ocelot, port, cls, ingress);
736 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
737 struct flow_cls_offload *cls, bool ingress)
739 struct ocelot *ocelot = ds->priv;
741 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
744 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
745 struct flow_cls_offload *cls, bool ingress)
747 struct ocelot *ocelot = ds->priv;
749 return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
752 static int felix_port_policer_add(struct dsa_switch *ds, int port,
753 struct dsa_mall_policer_tc_entry *policer)
755 struct ocelot *ocelot = ds->priv;
756 struct ocelot_policer pol = {
757 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
758 .burst = policer->burst,
761 return ocelot_port_policer_add(ocelot, port, &pol);
764 static void felix_port_policer_del(struct dsa_switch *ds, int port)
766 struct ocelot *ocelot = ds->priv;
768 ocelot_port_policer_del(ocelot, port);
771 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
772 enum tc_setup_type type,
775 struct ocelot *ocelot = ds->priv;
776 struct felix *felix = ocelot_to_felix(ocelot);
778 if (felix->info->port_setup_tc)
779 return felix->info->port_setup_tc(ds, port, type, type_data);
784 const struct dsa_switch_ops felix_switch_ops = {
785 .get_tag_protocol = felix_get_tag_protocol,
786 .setup = felix_setup,
787 .teardown = felix_teardown,
788 .set_ageing_time = felix_set_ageing_time,
789 .get_strings = felix_get_strings,
790 .get_ethtool_stats = felix_get_ethtool_stats,
791 .get_sset_count = felix_get_sset_count,
792 .get_ts_info = felix_get_ts_info,
793 .phylink_validate = felix_phylink_validate,
794 .phylink_mac_config = felix_phylink_mac_config,
795 .phylink_mac_link_down = felix_phylink_mac_link_down,
796 .phylink_mac_link_up = felix_phylink_mac_link_up,
797 .port_enable = felix_port_enable,
798 .port_disable = felix_port_disable,
799 .port_fdb_dump = felix_fdb_dump,
800 .port_fdb_add = felix_fdb_add,
801 .port_fdb_del = felix_fdb_del,
802 .port_mdb_prepare = felix_mdb_prepare,
803 .port_mdb_add = felix_mdb_add,
804 .port_mdb_del = felix_mdb_del,
805 .port_bridge_join = felix_bridge_join,
806 .port_bridge_leave = felix_bridge_leave,
807 .port_stp_state_set = felix_bridge_stp_state_set,
808 .port_vlan_prepare = felix_vlan_prepare,
809 .port_vlan_filtering = felix_vlan_filtering,
810 .port_vlan_add = felix_vlan_add,
811 .port_vlan_del = felix_vlan_del,
812 .port_hwtstamp_get = felix_hwtstamp_get,
813 .port_hwtstamp_set = felix_hwtstamp_set,
814 .port_rxtstamp = felix_rxtstamp,
815 .port_txtstamp = felix_txtstamp,
816 .port_change_mtu = felix_change_mtu,
817 .port_max_mtu = felix_get_max_mtu,
818 .port_policer_add = felix_port_policer_add,
819 .port_policer_del = felix_port_policer_del,
820 .cls_flower_add = felix_cls_flower_add,
821 .cls_flower_del = felix_cls_flower_del,
822 .cls_flower_stats = felix_cls_flower_stats,
823 .port_setup_tc = felix_port_setup_tc,
826 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
828 struct felix *felix = ocelot_to_felix(ocelot);
829 struct dsa_switch *ds = felix->ds;
831 if (!dsa_is_user_port(ds, port))
834 return dsa_to_port(ds, port)->slave;
837 int felix_netdev_to_port(struct net_device *dev)
841 dp = dsa_port_from_netdev(dev);